Allegro A6818SEP, A6818EEP, A6818EA Datasheet
6818
DABiC-IV, 32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
26182.128A
Data Sheet
A6818xA
LOAD
1
V
SUPPLY
SERIAL
DATA OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BLANKING
GROUND
BB
2
338
32
4
31
5
30
6
29
7
28
8
27
9
26
10
25
11
24
12
23
13
22
14
21
15
20
16
19
17
18
18
17
19
20
LATCHES
BLNK
REGISTER
LATCHES
REGISTER
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Logic Supply Voltage, VDD................... 7.0 V
Driver Supply Voltage, V
Continuous Output Current Range,
I
......................... -40 mA to +15 mA
OUT
Input Voltage Range,
VIN....................... -0.3 V to VDD + 0.3 V
Package Power Dissipation,
........................................ See Graph
P
D
Operating Temperature Range, T
(Suffix ‘E–’) .................. -40°C to +85°C
(Suffix ‘S–’) .................. -20
Storage Temperature Range,
TS............................... -55°C to +125°C
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
................... 60 V
BB
LOGIC
40
V
DD
SUPPLY
SERIAL
39
DATA IN
OUT
OUT
37
OUT
36
35
OUT
34
OUT
33
OUT
32
OUT
31
OUT
30
OUT
OUT
29
OUT
28
OUT
27
OUT
26
25
OUT
24
OUT
23
OUT
22
STROBE
ST
CLOCK
21
CLK
Dwg. PP-029-4
A
°C to +85°C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
The A6818– devices combine a 32-bit CMOS shift register,
accompanying data latches and control circuitry with bipolar sourcing
outputs and pnp active pull downs. Designed primarily to drive
vacuum-fluorescent displays, the 60 V and -40 mA output ratings also
allow these devices to be used in many other peripheral power driver
applications. The A6818– features an increased data input rate (compared with the older UCN/UCQ5818–F) and a controlled output slew
rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply,
typical serial-data input rates are up to 33 MHz.
A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are available as
the A6809– and A6810– (10 bits), A6811– (12 bits), and A6812– (20
bits).
The A6818– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.
Two temperature ranges are available for optimum performance in
commercial (suffix S-) or industrial (suffix E-) applications. Package
styles are provided for through-hole DIP (suffix -A) or minimum-area
surface-mount PLCC (suffix -EP). Copper lead frames, low logicpower dissipation, and low output-saturation voltages allow these
devices to drive most multiplexed vacuum-fluorescent displays over
the maximum operating temperature range.
FEATURES
■ Controlled Output Slew Rate
■ High-Speed Data Storage
■ 60 V Minimum
Output Breakdown
■ High Data Input Rate
■ PNP Active Pull-Downs
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A or -EP). Always
order by complete part number, e.g., A6818SEP .
■ Low Output-Saturation Voltages
■ Low-Power CMOS Logic
and Latches
■ Improved Replacements
for SN75518N, SN75518NF,
UCN5818–, and UCQ5818–
6818
32-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
TYPICAL INPUT CIRCUIT
V
DD
IN
Dwg. EP-010-5
OUT
OUT
OUT
A6818xEP
SERIAL
SUPPLY
43
25
16
OUT
OUT
DATA IN
42
26
OUT
1
2
OUT
41
2
LATCHES
REGISTER
OUT
8
27
15
14
OUT
OUT
40
28
NC
3
39
OUT
4
38
37
36
35
34
33
19
32
31
30
OUT
13
29
NC
Dwg. PP-059-2
30
32
31
OUT
OUT
OUT
NC
6
5
4
7
29
8
9
10
11
12
13
14
15
16
17
19
LATCHES
REGISTER
19
18
OUT
20
17
OUT
18
NC
SERIAL
3
2
BLNK
21
22
GROUND
BLANKING
LOAD
SUPPLY
DATA OUT
1
BB
V
CLK
23
CLOCK
LOGIC
44
DD
V
ST
24
STROBE
TYPICAL OUTPUT DRIVER
V
BB
OUT
N
Dwg. EP-021-19
3.0
2.5
SUFFIX 'A', R = 36°C/W
θJA
2.0
1.5
SUFFIX 'EP', R = 46°C/W
θJA
1.0
0.5
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
0
25
50 75 100 125 150
AMBIENT TEMPERATURE IN °C
Dwg. GP-025A
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1998, 2000 Allegro MicroSystems, Inc.
LATCHED SOURCE DRIVER
FUNCTIONAL BLOCK DIAGRAM
6818
32-BIT SERIAL-INPUT,
CLOCK
SERIAL
DATA IN
STROBE
BLANKING
GROUND
OUT1OUT
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
OUT
2
3
OUT
N
V
DD
MOS
BIPOLAR
V
BB
LOGIC
SUPPLY
SERIAL
DATA OUT
LOAD
SUPPLY
Dwg. FP-013-1
TRUTH TABLE
Serial Shift Register Contents Serial Latch Contents Output Contents
Data Clock Data Strobe
Input Input I
1I2I3
HHR
LLR
XR
1R2R3
XXX...X X X L R1R2R3... R
P1P2P3... P
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
www.allegromicro.com
1R2
1R2
... I
... R
... R
... R
N-1IN
N-2RN-1
N-2RN-1
N-1RN
N-1PN
Output Input I1I2I3... I
R
N-1
R
N-1
R
N
P
N
HP1P2P3... P
X X X ... X X H L L L ... L L
N-1IN
N-1 RN
N-1 PN
Blanklng I1I2I3... I
LP1P2P3... P
N-1
N-1 PN
I
N
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