Allegro A6811SLW, A6811SEP, A6811SA, A6811ELW, A6811EEP Datasheet
...
6811
Data Sheet
26182.120
PRELIMINARY INFORMATION
(subject to change without notice)
May 15, 2000
A6811xA
OUT
OUT
BLANKING
SERIAL
DATA OUT
SERIAL
DATA IN
LOGIC
SUPPLY
CLOCK
STROBE
OUT
OUT
1
11
2
12
BLNK
3
4
5
V
6
DD
7
CLK
8
ST
9
1
10
2
LATCHES
REGISTER
V
OUT
20
19
18
17
16
BB
15
14
13
12
11
10
OUT
9
OUT
8
OUT
7
LOAD
SUPPLY
GROUND
OUT
6
OUT
5
OUT
4
OUT
3
Dwg. PP-029-5
DABiC-IV, 12-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
The A6811– devices combine a 12-bit CMOS shift register,
accompanying data latches and control circuitry with bipolar sourcing
outputs and pnp active pull downs. Designed primarily to drive
vacuum-fluorescent displays, the 60 V and -40 mA output ratings also
allow these devices to be used in many other peripheral power driver
applications. The A6811– features an increased data input rate (compared with the older UCN/UCQ5811A) and a controlled output slew
rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply,
typical serial-data input rates are up to 33 MHz.
A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are available as
the A6809– and A6810– (10 bits), A6812– (20 bits), and A6818– (32
bits).
The A6811– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Logic Supply Voltage, VDD................... 7.0 V
Driver Supply Voltage, V
Continuous Output Current Range,
I
......................... -40 mA to +15 mA
OUT
Input Voltage Range,
V
....................... -0.3 V to VDD + 0.3 V
IN
Package Power Dissipation,
P
........................................ See Graph
D
Operating Temperature Range, T
(Suffix ‘E–’) .................. -40°C to +85°C
(Suffix ‘S–’) .................. -20
Storage Temperature Range,
T
............................... -55°C to +125°C
S
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
................... 60 V
BB
A
°C to +85°C
Two temperature ranges are available for optimum performance in
commercial (suffix S-) or industrial (suffix E-) applications. Package
styles are provided for through-hole DIP (suffix -A) and surface-mount
SOIC or PLCC (suffix -LW or -EP). Copper lead frames, low logicpower dissipation, and low output-saturation voltages allow all devices
to source 25 mA from all outputs continuously at up to 83°C.
FEATURES
■ Controlled Output Slew Rate
■ High-Speed Data Storage
■ 60 V Minimum
Output Breakdown
■ High Data Input Rate
■ PNP Active Pull-Downs
■ Low Output-Saturation Voltages
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A, -EP, or -LW).
Always order by complete part number, e.g., A6811SLW .
■ Low-Power CMOS Logic
and Latches
■ Improved Replacements
for SN75512B, UCN5811–,
and UCQ5811–
6811
12-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
A6811xEP
12
OUT
BLANKING
3
2
1
V
DD
CLK
ST
BLNK
9
1
OUT
11
10
SERIAL
DATA OUT
SERIAL
DATA IN
LOGIC
SUPPLY
CLOCK GROUND
STROBE
4
5
6
7
8
9
OUT
19
20
V
LATCHES
REGISTER
12
13
5
OUT
BB
18
17
16
15
14
OUT
OUT
LOAD
SUPPLY
OUT
Dwg. PP-059-4
TYPICAL INPUT CIRCUIT
A6811xLW
OUT
OUT
BLANKING
8
7
SERIAL
DATA OUT
SERIAL
DATA IN
LOGIC
SUPPLY
CLOCK
6
STROBE
OUT
OUT
1
11
2
12
BLNK
3
4
5
V
6
DD
7
CLK
8
ST
9
1
10
2
LATCHES
REGISTER
20
OUT
10
OUT
19
18
17
16
V
BB
15
14
13
12
11
9
OUT
8
OUT
7
LOAD
SUPPLY
GROUND
OUT
6
OUT
5
OUT
4
OUT
3
Dwg. PP-029-6
V
DD
IN
Dwg. EP-010-5
TYPICAL OUTPUT DRIVER
V
BB
OUT
Dwg. EP-021-19
2.5
SUFFIX 'A', R = 55°C/W
θJA
2.0
SUFFIX 'EP', R = 59°C/W
θJA
1.5
1.0
0.5
N
0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
25
SUFFIX 'LW', R = 70°C/W
50 75 100 125 150
θJA
AMBIENT TEMPERATURE IN °C
Dwg. GP-024-5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 2000, Allegro MicroSystems, Inc.
LATCHED SOURCE DRIVER
FUNCTIONAL BLOCK DIAGRAM
6811
12-BIT SERIAL-INPUT,
CLOCK
SERIAL
DATA IN
STROBE
BLANKING
GROUND
OUT1OUT
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
OUT
2
3
OUT
N
V
DD
MOS
BIPOLAR
V
BB
LOGIC
SUPPLY
SERIAL
DATA OUT
LOAD
SUPPLY
Dwg. FP-013-1
TRUTH TABLE
Serial Shift Register Contents Serial Latch Contents Output Contents
Data Clock Data Strobe
Input Input I
1I2I3
HHR
LLR
XR
1R2R3
XXX...X X X L R1R2R3... R
P1P2P3... P
L = Low Logic Level H = High Logic Level X = Irrelevant P = Present State R = Previous State
www.allegromicro.com
1R2
1R2
... I
... R
... R
... R
N-1IN
N-2RN-1
N-2RN-1
N-1RN
N-1PN
Output Input I1I2I3... I
R
N-1
R
N-1
R
N
P
N
HP1P2P3... P
X X X ... X X H L L L ... L L
N-1IN
N-1 RN
N-1 PN
Blanklng I1I2I3... I
LP1P2P3... P
N-1
N-1 PN
I
N
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