ALLEGRO A3979 User Manual

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Microstepping DMOS Driver with Translator
Package LP, 28-pin TSSOP with Exposed Thermal Pad
1
SENSE1
2
HOME
3
DIR
4
OUT1A
5
PFD
RC1
AGND
REF
RC2
VDD
OUT2A
MS2
MS1
SENSE2
PWM Timer
6
7
8
9
10
11
12
13
14
AGND and PGND must be
connected together externally.
÷8
Translator
and
Control
Logic
Approximate Scale 1:1
AB SO LUTE MAX I MUM RAT INGS
Load Supply Voltage,V Output Current, I
OUT
Logic Supply Voltage, V Logic Input Voltage Range, V t
> 30 ns........................–0.3 V to VDD + 0.3 V
W
t
< 30 ns..............................–1 V to VDD + 1 V
W
Sense Voltage, V
SENSE
Reference Voltage, V Package Power Dissipation, P Operating Temperature Range Ambient, T
, Range S ...................–20°C to 85°C
A
Junction Temperature, T Storage Temperature, T
*
Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C.
...................................35 V
BB
...................................... ±2.5 A
...............................7.0 V
DD
IN
.......................................0.5 V
......................................V
REF
S
.................See page 5
D
J(MAX)
.................... –55°C to 150°C
28
VBB1
27
SLEEP
26
ENABLE
25
OUT1B
24
23
22
21
20
19
18
17
16
15
CP2
CP1
VCP
PGND
VREG
STEP
OUT2B
RESET
SR
VBB2
Charge
Pump
Reg
.....................150°C
A3979
The A3979 is a complete microstepping motor driver with built-in translator, designed as a pin-compatible replacement for the successful A3977, with enhanced microstepping (1/16 step) precision. It is designed to operate bipolar stepper motors in full-, half-, quarter-, and sixteenth­step modes, with an output drive capacity of up to 35 V and ±2.5 A. The A3979 includes a fixed off-time current regulator that has the ability to operate in Slow, Fast, or Mixed decay modes. This current-decay control scheme results in reduced audible motor noise, increased step accuracy, and reduced power dissipation.
The translator is the key to the easy implementation of the A3979. It allows the simple input of one pulse on the STEP pin to drive the motor one microstep, which can be either a full step, half, quarter, or sixteenth, depending on the setting of the MS1 and MS2 logic inputs. There are no phase-sequence tables, high-frequency control lines, or complex inter­faces to program. The A3979 interface is an ideal fit for applications where a complex microprocessor is unavailable or is overburdened.
Internal synchronous-rectification control circuitry is provided to improve power dissipation during PWM operation. Internal circuit protection includes: thermal shutdown with hysteresis, UVLO (under­voltage lockout), and crossover-current protection. Special power-on sequencing is not required.
The A3979 is supplied in a low-profile (maximum height 1.20 mm), 28-pin TSSOP with exposed thermal pad. The package is available in a lead (Pb) free version, with 100% matte tin leadframe plating.
*
FEATURES
±2.5 A, 35 V output ratingLow RAutomatic current decay mode detection/selection3.0 to 5.5 V logic supply voltage range
DD
Slow, Fast or Mixed current decay modesHome outputSynchronous rectification for low power dissipationInternal UVLO and thermal shutdown circuitryCrossover-current protection
Use the following complete part number when ordering:
Part Number Pb-free Ambient, TA (°C)
A3979SLP – A3979SLP-T Yes
outputs: 0.28 Ω source, 0.22 Ω sink, typical
DS(On)
–20 to 85
26184.23
DMOS Microstepping Driver with Translator
Functional Block Diagram
A3979
R
T1
Logic Supply
Reference Supply
STEP
C
T1
RESET
HOME
SLEEP
ENABLE
V
PFD
0.1 µF
VDD
REF
RC1
DIR
MS1
MS2
SR
PFD
RC2
UVLO and
Fault
Translator
Charge
Pump
0.22 µF
CP1
VCP
VBB1
OUT1A
OUT1B
SENSE1
VBB2
OUT2A
OUT2B
SENSE2
R
0.22 µF
S1
>47 µF
C
S1
Load
Supply
0.22 µF
VREG
Regulator
Bandgap
DAC
4
PWM Timer:
PWM Latch
Blanking
Mixed Decay
Gate Drive
4
Control
Logic
PWM Timer:
PWM Latch
Blanking
Mixed Decay
CP2
2 V
DMOS Full Bridge
DMOS Full Bridge
26184.23
C
R
T2
T2
AGND PGND
DAC
Exposed Thermal Pad
C
R
S2
S2
(Required)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
A3979
DMOS Microstepping Driver with Translator
ELECTRICAL CHARACTERISTICS at T
Characteristics Symbol Test Conditions Min.
Output Drivers
Load Supply Voltage Range V
Output Leakage Current
2
Output On Resistance R
Body Diode Forward Voltage V
Motor Supply Current I
Control Logic
Logic Supply Voltage Range V
Logic Supply Current I
Logic Input Voltage
Logic Input Current
2
Reference Input Voltage Range V Reference Input Current I
HOME Output Voltage
Mixed Decay Mode Trip Point
Gain (G
m
) Error
3
STEP Pulse Width t Blank Time t Fixed Off-Time Crossover Dead Time t
BB
I
DSS
DS(On)
F
BB
DD
DD
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
REF
REF
V
HOME(1)
V
HOME(0)
V
PFDH
V
PFDL
E
G
W
BLANKRT
t
OFF
DT
= 25°C, V
A
= 35 V, VDD = 3.0 to 5.5 V (unless otherwise noted)
BB
1
Typ.
Max. Units
Operating 8 35 V During Sleep mode 0 35 V V
= V
OUT
V
OUT
Source driver, I Source driver, I
BB
= 0 V <1.0 –20 μA
= –2.5 A 0.28 0.335 Ω
OUT
= 2.5 A 0.22 0.265 Ω
OUT
<1.0 20 μA
Source diode, IF = –2.5 A 1.4 V Sink diode, IF = 2.5 A 1.4 V f
< 50 kHz 8.0 mA
PWM
Operating, outputs disabled 6.0 mA Sleep mode 20 μA
Operating 3.0 5.0 5.5 V f
< 50 kHz 12 mA
PWM
Outputs off 10 mA Sleep mode 20 μA
0.7× V
DD
–– VIN = 0.7 × V V
= 0.3 × V
IN
DD
DD
–20 <1.0 20 μA –20 <1.0 20 μA
Operating 0 V
––V
0.3
×V
DD
DD
–0±3μA I I
V V V
= –200 μA
HOME(1)
= 200 μA–
HOME(0)
0.7
× V
DD
= 2 V, Phase Current = 38.27% ±10 %
REF
= 2 V, Phase Current = 70.71% ±5.0 %
REF
= 2 V, Phase Current = 100.00% ±5.0 %
REF
––V
0.3
× V
0.6
0.21
×V
×V
DD
DD
–V –V
DD
1––μs
= 56 kΩ, CT = 680 pF 700 950 1200 ns RT = 56 kΩ, CT = 680 pF 30 38 46 μs Synchronous rectification enabled 100 475 800 ns
V
V
V
Continued on the next page...
26184.23
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A3979
DMOS Microstepping Driver with Translator
ELECTRICAL CHARACTERISTICS, continued at T
= 25°C, V
A
Characteristics Symbol Test Conditions Min.
Thermal Shutdown Temperature T Thermal Shutdown Hysteresis T UVLO Enable Threshold V UVLO Hysteresis V
1
Typical data are for initial design estimations only, and assume optimum manufacturing and application conditions. Performance may vary for
individual units, within the specified maximum and minimum limits.
2
Negative current is defined as coming out of (sourcing from) the specified device pin.
3
EG = ( [ V
REF
/ 8] – V
SENSE
) / ( V
REF
/ 8 ).
JSD
JSDHYS
UVLO
UVLOHYS
Increasing VDD 2.45 2.7 2.95 V
= 35 V, VDD = 3.0 to 5.5 V (unless otherwise noted)
BB
1
Typ.
Max. Units
165 °C –15–°C
0.05 0.10 V
26184.23
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A3979
DMOS Microstepping Driver with Translator
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Units
Two-layer PCB with 3.8 in.2 of copper area on each side
Package Thermal Resistance R
θJA
connected with thermal vias and to device exposed pad High-K PCB (multilayer with significant copper areas,
based on JEDEC standard)
*Additional thermal information available on Allegro Web site.
32 ºC/W
28 ºC/W
Maximum Power Dissipation, P
5.0
4.5
(W)
D
Power Dissipation, P
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
High-K PCB
(R
θJA
= 28 ºC/W)
2-Layer PCB with 3.8 in
(R
θJA
= 32 ºC/W)
2
copper per side
20 40 60 80 100 120 140 160
Temperature (°C)
D(max)
26184.23
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5
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