ALLEGRO A 1326 LUA-T Datasheet

A1324, A1325, and A1326

Low Noise, Linear Hall Effect Sensor ICs with Analog Output

Features and Benefits

• Temperature-stable quiescent output voltage and sensitivity

• Output voltage proportional to magnetic flux density

• Low-noise output increases accuracy

• Precise recoverability after temperature cycling

• Ratiometric rail-to-rail output

• Wide ambient temperature range: –40°C to 150°C

• Immune to mechanical stress

• Solid-state reliability

• Enhanced EMC performance for stringent automotive
applications

Packages

3-pin ultramini SIP

1.5 mm × 4 mm × 3 mm
(suffix UA)

3-pin SOT23-W
2 mm × 3 mm × 1 mm
(suffix LH)

Description

New applications for linear output Hall-effect devices, such
as displacement, angular position, and current measurement,
require high accuracy in conjunction with small package size.
The Allegro® A1324, A1325, and A1326 linear Hall-effect
sensor ICs are designed specifically to achieve both goals. This
temperature-stable device is available in a miniature surface
mount package (SOT23W) and an ultra-mini through-hole
single in-line package.

These ratiometric Hall effect sensor ICs provide a voltage
output that is proportional to the applied magnetic field. They
feature a quiescent voltage output of 50% of the supply voltage.
The A1324/25/26 feature factory programmed sensitivities of

5.0 mV/G, 3.125 mV/G, and 2.5 mV/G, respectively.

The features of these linear devices make them ideal for use in
automotive and industrial applications requiring high accuracy,
and are guaranteed through an extended temperature range,
–40°C to 150°C.

Each BiCMOS monolithic circuit integrates a Hall element,
temperature-compensating circuitry to reduce the intrinsic
sensitivity drift of the Hall element, a small-signal high-gain
amplifier, a clamped low-impedance output stage, and a
proprietary dynamic offset cancellation technique.

Approximate footprint

Functional Block Diagram

To All Subcircuits

VCV+C

GND

Cancellation

Dynamic Offset

Sensitivity and
Sensitivity TC

These devices are available in a 3-pin ultra-mini SIP package
(UA), and a 3-pin surface mount SOT-23 style package (LH). Both
are lead (Pb) free, with 100% matte tin leadframe plating.

VOUT

Tuned Filter

Offset

Trim Control

A1324-DS, Rev. 1

A1324, A1325,

and A1326

Selection Guide

Part Number Packing

A1324LLHLX-T 10 000 pieces per reel 3-pin SOT-23W surface mount

A1324LUA-T

A1325LLHLX-T 10 000 pieces per reel 3-pin SOT-23W surface mount

A1325LUA-T

A1326LLHLX-T 10 000 pieces per reel 3-pin SOT-23W surface mount

A1326LUA-T

1

Contact Allegro® for additional packing options.

2

Contact factory for availability.

Absolute Maximum Ratings

Forward Supply Voltage V

Reverse Supply Voltage V

Forward Output Voltage V

Reverse Output Voltage V

Output Source Current I

Output Sink Current I

Operating Ambient Temperature T

Maximum Junction Temperature TJ(max) 165 ºC

Storage Temperature T

2

500 pieces per bag 3-pin ultramini SIP through hole mount

2

500 pieces per bag 3-pin ultramini SIP through hole mount

2

500 pieces per bag 3-pin ultramini SIP through hole mount

Characteristic Symbol Notes Rating Unit

Linear Hall Effect Sensor ICs with Analog Output

1

OUT(SOURCE)

OUT(SINK)

CC

RCC

OUT

ROUT

A

stg

Package

VOUT to GND 2 mA

VCC to VOUT 10 mA

L temperature range –40 to 150 ºC

Sensitivity (Typ.)

(mV/G)

5.000

3.125

2.500

8V

–0.1 V

15 V

–0.1 V

–65 to 170 ºC

Thermal Characteristics may require derating at maximum conditions, see application information

Characteristic Symbol Test Conditions* Value Unit

Package LH, on 4-layer PCB with copper limited to solder pads 228 ºC/W

Package Thermal Resistance

*Additional thermal information available on the Allegro website

R

θJA

Package LH, on 2-layer PCB with 0.463 in.2 of copper area each
side, connected by thermal vias

Package UA, on 1-layer PCB with copper limited to solder pads 165 ºC/W

Pin-out Diagrams

3

231

LH Package UA Package

Terminal List Table

Name

VCC 1 1

VOUT 2 3

GND 3 2 Ground

Number

LH UA

Input power supply; tie to GND with
bypass capacitor

Output signal; also used for
programming

110 ºC/W

Function

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115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.

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2

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

OPERATING CHARACTERISTICS Valid throughout T

range, C

A

= 0.1 μF, VCC = 5 V; unless otherwise noted

BYPASS

Characteristics Symbol Test Conditions Min. Typ. Max. Unit

Electrical Characteristics

Supply Voltage V

Supply Current I

Power-On Time2 t

Supply Zener Clamp Voltage V

CC

No load on VOUT – 6.9 9 mA

CC

TA = 25°C, CL (PROBE) = 10 pF – 32 – μs

PO

TA = 25°C, ICC = 12 mA 6 8.3 – V

Z

4.5 5.0 5.5 V

Internal Bandwidth BWiSmall signal, –3 dB – 17 – kHz

Chopping Frequency

3

f

TA = 25°C – 400 – kHz

C

Output Characteristics

Quiescent Voltage Output V

OUT(Q)

Output Referred Noise V

Input Referred RMS Noise Density V

DC Output Resistance R

Output Load Resistance R

Output Load Capacitance C

V

Output Saturation Voltage

OUT(sat)HIGH

V

OUT(sat)LOW

NRMS

B = 0 G, TA = 25°C 2.425 2.500 2.575 V

A1324, TA = 25°C, C

A1325, TA = 25°C, C

N

A1326, TA = 25°C, C

TA = 25°C, C
f << BW

OUT

BYPASS

i

= 0.1 μF – 7.0 – mV

BYPASS

= 0.1 μF – 4.4 – mV

BYPASS

= 0.1 μF – 3.5 – mV

BYPASS

= open, no load on VOUT,

– 1.3 – mG/√Hz

–< 1– Ω

VOUT to VCC 4.7 – – kΩ

L

VOUT to GND 4.7 – – kΩ

VOUT to GND – – 10 nF

L

R

PULLDOWN

R

PULLUP

= 4.7 kΩ, VCC = 5 V 4.7 – – V

= 4.7 kΩ, VCC = 5 V – – 0.30 V

Magnetic Characteristics

A1324, TA = 25°C 4.750 5.000 5.250 mV/G

Sensitivity Sens

Sensitivity Temperature Coefficient TC

A1325, TA = 25°C 2.969 3.125 3.281 mV/G

A1326, T

LH package; programmed at TA = 150°C,
calculated relative to Sens at 25°C

Sens

UA package; programmed at T
calculated relative to Sens at 25°C

= 25°C 2.375 2.500 2.625 mV/G

A

– 0 – %/°C

= 150°C,

A

– 0.03 – %/°C

Error Components

Sensitivity Drift at Maximum Ambient
Operating Temperature

Sensitivity Drift at Minimum Ambient
Operating Temperature

∆Sens

∆Sens

LH package; from hot to room temperature –5 – 5 %

(TAmax)

UA package; from hot to room temperature –2.5 – 7.5 %

LH package; from cold to room temperature –3.5 – 8.5 %

(TAmin)

UA package; from cold to room temperature –6 – 4 %

1

(p-p)

(p-p)

(p-p)

Continued on the next page…

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115 Northeast Cutoff
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3

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

OPERATING CHARACTERISTICS (continued) Valid throughout T

range, C

A

BYPASS

Characteristics Symbol Test Conditions Min. Typ. Max. Unit

Error Components (continued)

Quiescent Voltage Output Drift
Through Temperature Range

Linearity Sensitivity Error Lin

Symmetry Sensitivity Error Sym

Ratiometry Quiescent Voltage
Output Error

4

∆V

Rat

OUT(Q)

ERR

ERR

VOUT(Q)

Defined in terms of magnetic flux density, B –10 – 10 G

Throughout guaranteed supply voltage range
(relative to VCC = 5 V)

Throughout guaranteed supply voltage range

Ratiometry Sensitivity Error

Sensitivity Drift Due to Package
Hysteresis

1

1 G (gauss) = 0.1 mT (millitesla).

2

See Characteristic Definitions section.

3

fC varies up to approximately ±20% over the full operating ambient temperature range and process.

4

Percent change from actual value at VCC = 5 V, for a given temperature.

4

Rat

∆Sens

(relative to VCC = 5 V), TA = 25°C and 150°C

Sens

Throughout guaranteed supply voltage range
(relative to V

TA = 25°C, after temperature cycling – ±2 – %

PKG

= 5 V), TA = –40°C

CC

= 0.1 μF, VCC = 5 V; unless otherwise noted

1

–1.5 – 1.5 %

–1.5 – 1.5 %

–1.3 – 1.3 %

–1.5 – 1.5 %

–2 – 2 %

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4

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

Characteristic Definitions

Power-On Time When the supply is ramped to its operating

voltage, the device output requires a finite time to react to an
input magnetic field. Power-On Time is defined as the time it
takes for the output voltage to begin responding to an applied
magnetic field after the power supply has reached its minimum
specified operating voltage, V

V

V

VCC(typ.)
90% V

OUT

VCC(min.)

0

CC

t

1

t1= time at which power supply reaches
minimum specified operating voltage

t2= time at which output voltage settles
within ±10% of its steady state value
under an applied magnetic field

(min).

CC

V

OUT

t

PO

t

2

+t

Quiescent Voltage Output In the quiescent state (that is, with

no significant magnetic field: B = 0), the output, V

OUT(Q)

, equals
a ratio of the supply voltage, VCC , throughout the entire operat­ing range of VCC and the ambient temperature, TA .

Quiescent Voltage Output Drift Through Temperature
Range Due to internal component tolerances and thermal con-

siderations, the quiescent voltage output, V

, may drift from

OUT(Q)

its nominal value through the operating ambient temperature
range, TA . For purposes of specification, the Quiescent Voltage
Output Drift Through Temperature Range, ∆V

OUT(Q)

(mV), is

defined as:

∆V

OUT(Q)

V

=

OUT(Q)TA

– V

OUT(Q)25°C

(1)

Sensitivity The presence of a south-polarity magnetic field

perpendicular to the branded surface of the package increases the
output voltage from its quiescent value toward the supply voltage
rail. The amount of the output voltage increase is proportional
to the magnitude of the magnetic field applied. Conversely, the
application of a north polarity field will decrease the output volt-

age from its quiescent value. This proportionality is specified
as the magnetic sensitivity, Sens (mV/G), of the device and is
defined as:

V

=

OUT(B+)

Sens

– V

OUT(B–)

B(+) – B(–)

(2)

where B(+) and B(–) are two magnetic fields with opposite
polarities.

Sensitivity Temperature Coefficient The device sensitivity

changes with temperature, with respect to its sensitivity tem­perature coefficient, TC

SENS

. TC

is programmed at 150°C,

SENS

and calculated relative to the nominal sensitivity programming
temperature of 25°C. TC



Sens

Sens



=




TC

(%/°C) is defined as:

SENS

– Sens

T2

Sens

T1

T1

×

100%













T2–T1







1






(3)

where T1 is the nominal Sens programming temperature of 25°C,
and T2 is the TC

programming temperature of 150°C.

SENS

The ideal value of sensitivity through the temperature range,
Sens

IDEAL(TA)

ens

, is defined as:

IDEAL(TA)

=

Sens

T1

× (100% + TC

SENS(TA –T1)

)

(4)

Sensitivity Drift Through Temperature Range Second

order sensitivity temperature coefficient effects cause the mag­netic sensitivity to drift from its ideal value through the operating
ambient temperature, T
tivity drift through temperature range, ∆Sens

∆Sens

TC

. For purposes of specification, the sensi-

A

Sens

=

TA

Sens

– Sens

IDEAL(TA)

IDEAL(TA)

, is defined as:

TC

100%

×

(5)

Sensitivity Drift Due to Package Hysteresis Package

stress and relaxation can cause the device sensitivity at TA = 25°C
to change during or after temperature cycling. This change in
sensitivity follows a hysteresis curve.

For purposes of specification, the Sensitivity Drift Due to Pack­age Hysteresis, ∆Sens

∆Sens

PKG

where Sens

is the programmed value of sensitivity at

(25°C)1

, is defined as:

PKG

Sens

(25°C)2

=

Sens

– Sens

(25°C)1

(25°C)1

100%

×

(6)

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115 Northeast Cutoff

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5

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

TA = 25°C, and Sens

is the value of sensitivity at TA = 25°C

(25°C)1

after temperature cycling TA up to 150°C, down to –40°C, and
back to up 25°C.

Linearity Sensitivity Error The 132x is designed to provide

linear output in response to a ramping applied magnetic field.
Consider two magnetic fields, B1 and B2. Ideally the sensitivity
of a device is the same for both fields for a given supply voltage
and temperature. Linearity sensitivity error is present when there
is a difference between the sensitivities measured at B1 and B2.

Linearity Sensitivity Error is calculated separately for the positive
(LIN

) and negative (LIN

ERR+

) applied magnetic fields. Lin-

ERR–

earity Sensitivity Error (%) is measured and defined as:

Lin

Lin

ERR+

ERR–

Sens




1–

=



Sens



Sens




1–

=



Sens



B(++)

B(+)

B(– –)

B(–)













×

×

100%

100%

(7)

and

Lin

= max(| Lin

ERR

ERR+|

, |Lin

| ) (8)

ERR–

where:



|V

OUT(Bx)

Bx



=




Sens

– V

B

OUT(Q)

X



|






(9)

and B(++), B(+), B(– –), and B(–) are positive and negative mag­netic fields with respect to the quiescent voltage output such that
|B(++)| > |B(+)| and |B(– –)| > |B(– )| .

Symmetry Sensitivity Error The magnetic sensitivity of a

device is constant for any two applied magnetic fields of equal
magnitude and opposite polarities.

Symmetry Error (%), is measured and defined as:

Sym

ERR

Sens




1–

=



Sens



B(+)

B(–)







100%

×

(11)

where SensBx is defined as in equation 9, and B(+), B(–) are posi­tive and negative magnetic fields such that |B(+)| = |B(–)|.

Ratiometry Error The A132x features a ratiometric output.

This means that the quiescent voltage output, V
sensitivity, Sens, and clamp voltages, V

CLPHIGH

OUT(Q)

and V

, magnetic

CLPLOW

,
are proportional to the supply voltage, VCC. In other words, when
the supply voltage increases or decreases by a certain percent­age, each characteristic also increases or decreases by the same
percentage. Error is the difference between the measured change
in the supply voltage, relative to 5 V, and the measured change in
each characteristic.

The ratiometric error in quiescent voltage output, Rat

VOUT(Q)

(%), for a given supply voltage, VCC, is defined as:

V



OUT(Q)VCC



Rat

VOUT(Q)

1–

=




The ratiometric error in magnetic sensitivity, Rat

V

CC

cV

OUT(Q)5V

c V







100%

×

SENS

(12)

(%), for a

given supply voltage, VCC, is defined as:

Rat

VOUT(Q)

Sens




1–

=




VCC

V

CC

cSens

cV

5V







100%

×

(13)

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6

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

Typical Characteristics

(30 pieces, 3 fabrication lots)

Average Supply Current versus Ambient Temperature

12

11

10

9

8

CCav (mA)

I

7

6

5

4

Average Postive Linearity versus Ambient Temperature

V

= 5 V

CC

105

104

103

102

(%)

101

av

100

Lin+

99

98

97

96

95

–40 25 150

(°C)

T

A

V

= 5 V

CC

–40 25 150

T

(°C)

A

Average Negative Linearity versus Ambient Temperature

105

104

103

102

(%)

101

av

100

Lin–

99

98

97

96

95

–40 25 150

VCC = 5 V

TA (°C)

101.0

100.8

100.6

100.4

(%)

100.2

av)

100.0

99.8

VOUTQ(

99.6

Rat

99.4

99.2

99.0

5.5 to 5.0 V

4.5 to 5.0 V

–40 25 150

T

(°C)

A

Average Sensitivity Ratiometry versus Ambient TemperatureAverage Quiescent Voltage Output Ratiometry versus Ambient Temperature

102.0

V

CC

(%)

av)

Sens(

Rat

101.5

101.0

100.5

100.0

99.5

99.0

98.5

98.0
–40 25 150

TA (°C)

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V

CC

5.5 to 5.0 V

4.5 to 5.0 V

7

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

Typical Characteristics, continued

(30 pieces, 3 fabrication lots)

Average Absolute Quiescent Voltage Output versus Ambient Temperature

V

= 5 V

CC

2.565

2.545

2.525

(V)

2.505

OUT(Q)av

2.485

V

2.465

2.445

2.425

–40 25 150

T

(°C)

A

A1324

A1325

A1326

Average Absolute Sensitivity versus Ambient Temperature

VCC = 5 V

6.0

5.5

5.0

4.5

(mV/G)

av

4.0

3.5

Sens

3.0

2.5

2.0
–40 25 150

A1324

A1325

A1326

(°C)

T

A

3.0

2.9

2.8

2.7

(V)

2.6

2.5

OUT(Q)

V

2.4

2.3

2.2

2.1

2.0

6.0

5.5

5.0

4.5

4.0

(mV/G)

av

3.5

3.0

Sens

2.5

2.0

1.5

1.0

Quiescent Voltage Output versus Supply Voltage

TA = 25°C

A1324

A1325

A1326

4.5 5
V

CC

(V)

5.5

Average Sensitivity versus Supply Voltage

T

= 25°C

A

A1324

A1325

A1326

4.5 5
V

CC

(V)

5.5

Average Quiescent Voltage Output Drift versus Ambient Temperature

values relative to 25°C, VCC = 5 V

OUT(Q)av

T

(°C)

A

10

8

6

4

(G)

2

0

OUT(Q)av

-2

V

∆

-4

-6

-8

-10

∆V

–40 25 150

Average Sensitivity Drift versus Ambient Temperature

∆Sensav values relative to 25°C, VCC = 5 V

10

8

6

4

2

(%)

av

0

-2

∆Sens

-4

-6

-8

-10
–40 25 150

T

(°C)

A

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8

A1324, A1325,

and A1326

Linear Hall Effect Sensor ICs with Analog Output

V+

1[1]

VCC

C

BYPASS

0.1 μF

Typical Application Circuit

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for
switchpoint accuracy is the small signal voltage developed across
the Hall element. This voltage is disproportionally small relative
to the offset that can be produced at the output of the Hall IC.
This makes it difficult to process the signal while maintaining an
accurate, reliable output over the specified operating temperature
and voltage ranges. Chopper stabilization is a unique approach
used to minimize Hall offset on the chip. Allegro employs a
patented technique to remove key sources of the output drift
induced by thermal and mechanical stresses. This offset reduc­tion technique is based on a signal modulation-demodulation
process. The undesired offset signal is separated from the
magnetic field-induced signal in the frequency domain, through
modulation. The subsequent demodulation acts as a modulation
process for the offset, causing the magnetic field-induced signal
to recover its original spectrum at baseband, while the DC offset
becomes a high-frequency signal. The magnetic-sourced signal

V

OUT

2[3]

VOUT

A132x

GND

3[2]

Pin numbers in brackets
refer to the UA package

then can pass through a low-pass filter, while the modulated DC
offset is suppressed. In addition to the removal of the thermal and
stress related offset, this novel technique also reduces the amount
of thermal noise in the Hall IC while completely removing the
modulated residue resulting from the chopper operation. The
chopper stabilization technique uses a high frequency sampling
clock. For demodulation process, a sample-and-hold technique
is used. This high-frequency operation allows a greater sampling
rate, which results in higher accuracy and faster signal-processing
capability. This approach desensitizes the chip to the effects
of thermal and mechanical stresses, and produces devices that
have extremely stable quiescent Hall output voltages and precise
recoverability after temperature cycling. This technique is made
possible through the use of a BiCMOS process, which allows the
use of low-offset, low-noise amplifiers in combination with high­density logic integration and sample-and-hold circuits.

Hall Element

Regulator

Clock/Logic

Amp

Anti-Aliasing

Concept of Chopper Stabilization Technique

LP Filter

Tuned

Filter

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9

A1324, A1325,

and A1326

+0.10

2.90

–0.20

1

8X 10° REF

Linear Hall Effect Sensor ICs with Analog Output

Package LH, 3-Pin SOT23W

+0.12

2.98

–0.08

D

1.49

3

0.96

D

2

0.55 REF

Branded Face

A

D

+0.19

1.91

–0.06

0.25 BSC

+4°

4°

–0°

+0.020

0.180

–0.053

0.25 MIN

Seating Plane

Gauge Plane

1.00

0.70

PCB Layout Reference View

B

0.95

2.40

0.05

0.95 BSC

For Reference Only; not for tooling use (reference DWG-2840)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

Active Area Depth, 0.28 mm REF

A
B

Reference land pattern layout
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances

C

Branding scale and appearance at supplier discretion

D

Hall element, not to scale

0.40 ±0.10

1.00 ±0.13

+0.10
–0.05

NNN

1

C

Standard Branding Reference View

N = Last three digits of device part number

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115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

10

A1324, A1325,

o
s

and A1326

Linear Hall Effect Sensor ICs with Analog Output

Package UA, 3-Pin SIP

+0.08

4.09

–0.05

+0.08

3.02

–0.05

14.99 ±0.25

1.44 NOM

E

0.43

45°

+0.05
–0.07

E

1.02
MAX

2.05 NOM

B

C

1.52 ±0.05

10°

E

Branded
Face

0.79 REF

A

231

0.41

45°

Mold Ejector
Pin Indent

NNN

1

Standard Branding Reference View

D
= Supplier emblem

N = Last three digits of device part number

+0.03
–0.06

For Reference Only; not for tooling use (reference DWG-9065)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusi
Exact case and lead configuration at supplier discretion within limits

Dambar removal protrusion (6X)

A

B

Gate and tie bar burr area

Active Area Depth, 0.50 mm REF

C

D

Branding scale and appearance at supplier discretion

E

Hall element (not to scale)

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

11

A1324, A1325,

and A1326

Revision History

Linear Hall Effect Sensor ICs with Analog Output

Revision Revision Date Description of Revision

Rev. 1 October 11, 2011 Update Sensitivity specifications

Copyright ©2010-2011, Allegro MicroSystems, Inc.

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per­mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

12