ALLEGRO A1180, A1181, A1182 User Manual

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Sensitive Two-Wire Field-Programmable Chopper-Stabilized
Package LH, 3-pin SOT
1. VCC
2. No connection
3. GND
Package UA, 3-pin SIP
A1180/81/82/83
Unipolar Hall-Effect Switches
The A1180, A1181, A1182, and A1183 devices are sensitive, two-wire, unipolar, Hall effect switches. The operate point, BOP, can be fi eld-programmed, after fi nal
3
NC
packaging of the sensor and placement into the application. This advanced feature allows the optimization of the sensor switching performance, by effectively accounting for variations caused by mounting tolerances for the device and the target magnet.
This family of devices are produced on the Allegro MicroSystems advanced BiCMOS wafer fabrication process, which implements a patented, high-frequency, chopper-stabilization technique that achieves magnetic stability and eliminates the offsets that are inherent in single-element devices exposed to harsh applica­tion environments. Commonly found in a number of automotive applications, the A1180-83 family of devices are utilized to sense: seat track position, seat belt buckle presence, hood/trunk latching, and shift selector position.
1. VCC
2. GND
3. GND
1 2 3
AB SO LUTE MAX I MUM RAT INGS
Magnetic Flux Density, B.........................Unlimited
Operating Temperature Ambient, T Ambient, T Maximum Junction, T Storage Temperature, T
..........................................28 V
CC
, Range E..................–40ºC to 85ºC
A
, Range L................–40ºC to 150ºC
A
........................–18 V
RCC
........................165ºC
J(max)
.................. –65ºC to 170ºC
S
Two-wire unipolar switches are particularly advantageous in price-sensitive appli­cations, because they require one less wire than the more traditional open-collec­tor output switches. Additionally, the system designer gains inherent diagnostics because output current normally fl ows in either of two narrowly-specifi ed ranges. Any output current level outside of these two ranges is a fault condition. The A1180-83 family of devices also features on-chip transient protection, and a Zener clamp to protect against overvoltage conditions on the supply line.
The output currents of the A1181 and A1183 switch
HIGH in the presence of a south
polarity magnetic fi eld of suffi cient strength; and switch LOW otherwise, including when there is no signifi cant magnetic fi eld present. The A1180 and A1182 have inverted output current levels: switching LOW in the presence of a south polarity magnetic fi eld of suffi cient strength, and HIGH otherwise. The devices also differ in their specifi ed LOW current supply levels.
Both devices are offered in two package styles: LH, a SOT-23W miniature low­profi le package for surface-mount applications, and UA, a three-lead ultramini Single Inline Package (SIP) for through-hole mounting. Each package is available
in a lead (Pb) free version (suffi x, –T) with 100% matte tin plated leadframe.
Factory-programmed versions are also available. Refer to: A1140, A1141, A1142, A1143, A1145, and A1146.
Features and Benefi ts
Chopper stabilization
Low switchpoint drift over operating
temperature range
Low stress sensitivity
Field-programmable for optimized
switchpoints
On-chip protection
Supply transient protection
Reverse-battery protection
On-board voltage regulator
3.5 V to 24 V operation
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Product Selection Guide
Part Number
A1180ELHLT
A1180ELHLT-T Yes
A1180EUA
A1180EUA-T Yes
A1180LLHLT
A1180LLHLT-T Yes
A1180LUA
A1180LUA-T Yes
A1181ELHLT
A1181ELHLT-T Yes
A1181EUA
A1181EUA-T Yes
A1181LLHLT
A1181LLHLT-T Yes
A1181LUA
A1181LUA-T Yes
A1182ELHLT
A1182ELHLT-T Yes
A1182EUA
A1182EUA-T Yes
A1182LLHLT
A1182LLHLT-T Yes
A1182LUA
A1182LUA-T Yes
A1183ELHLT
A1183ELHLT-T Yes
A1183EUA
A1183EUA-T Yes
A1183LLHLT
A1183LLHLT-T Yes
A1183LUA
A1183LUA-T Yes
1
Contact Allegro for additional packing options.
2
South (+) magnetic fields must be of sufficient strength.
3
These variants are in production but have been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of this device is cur-
Pb-
free
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
3
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
3
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
7-in. reel, 3000 pieces/reel Surface mount
Bulk, 500 pieces/bag 4-pin SIP through hole
Packing
1
Mounting
Ambient, T
(°C)
–40 to 85
–40 to 150
–40 to 85
–40 to 150
–40 to 85
–40 to 150
–40 to 85
–40 to 150
A
Output
South (+) Field
Low
High
Low
High
Supply Current at Low Output, I
2
(mA)
2 to 5
5 to 6.9
CC(L)
rently restricted to existing customer applications. The device should not be purchased for new design applications because obsolescence in the near future is probable. Samples are no longer available. Status date change May 2, 2005.
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
2
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Functional Block Diagram
V+
VCC
Program/Lock
0.01 uF
Dynamic Offset
Cancellation
Programming
Logic
Clock/Logic
Amp
Offset
Regulator
Low-Pass Filter
Sample and Hold
GND
Package UA Only
GND
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
ELECTRICAL CHARACTERISTICS over the operating voltage and temperature range, unless otherwise speci ed
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Supply Voltage
Supply Current
1
2
Supply Zener Clamp Voltage V
Supply Zener Clamp Current I
Reverse Supply Current I
Output Slew Rate
3
Chopping Frequency f
Power-On Time
Power-On State
1
VCC represents the generated voltage between the VCC pin and the GND pin.
2
Relative values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north magnetic
polarity; therefore greater B values indicate a stronger south polarity fi eld (or a weaker north polarity fi eld, if present).
3
Measured without bypass capacitor between VCC and GND. Use of a bypass capacitor results in slower current change.
4Measured with and without bypass capacitor of 0.01 μF. Adding a larger bypass capacitor causes longer Power-On Time.
5
POS is defi ned as true only with a VCC slew rate of 25 mV / μs or greater. Operation with a VCC slew rate less than 25 mV / μs can permanently harm
device performance.
6
POS is undefi ned for t > ton or BRP < B < BOP .
4
5,6
V
CC
Device powered on 3.5 24 V
B >BOP for A1180; B <BRP for A1181 2 5 mA
I
CC(L)
I
CC(H)
Z(supply)ICC
Z(supply)VZ(supply)
RCC
B >B
OP
B >BOP for A1181, A1183 B <B
RP
= I
CC(L)(max)
V
= –18 V –1.6 mA
RCC
No bypass capacitor; capacitance of the
di/dt
oscilloscope performing the measurement = 20 pF
C
t
on
POS ton t
After factory trimming; with and without bypass capacitor (C
on(max)
for A1182; B <BRP for A1183 5 6.9 mA
for A1180, A1182
12 17 mA
+ 3 mA; TA = 25°C 28 40 V
= 28 V
CC(L)(max)
+ 3 mA
mA
I
36 mA/μs
200 kHz
= 0.01 μF)
BYP
; V
slew rate 25 mV/μs HIGH
CC
––25μs
MAGNETIC CHARACTERISTICS
1
over the operating voltage and temperature range, unless otherwise specifi ed
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Programmable Operate Point Range B
Initial Operate Point Range B
Switchpoint Step Size
2
OPrange
OPinitVCC
B
RES
ICC = I ICC = I
VCC = 5 V, TA = 25°C 4 8 12 G
for A1180 and A1182
CC(H)
for A1181 and A1183
CC(L)
60 200 G
= 12 V 33 60 G
Switchpoint setting 5 Bit
Number of Programming Bits
Temperature Drift of B
OP
Hysteresis B
1
Relative values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north magnetic
polarity; therefore greater B values indicate a stronger south polarity fi eld (or a weaker north polarity fi eld, if present).
2
The range of values specifi ed for B
A1180-DS, Rev. 2
is a maximum, derived from the cumulative programming bit errors.
RES
ΔB
Programming locking 1 Bit
OP
HYS
B
HYS
= BOP – B
RP
±20 G
51530G
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
4
A1180/81/82/83
10
12
14
16
18
20
3.5
12
24
3.5
12
24
3.5
12
24
3.5
12
24
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Characteristic Data
I
versus Ambient Temperature
CC(L)
at Various Levels of V
CC
(A1180, A1181)
10
10
I
versus Ambient Temperature
CC(L)
at Various Levels of V
(A1182, A1183)
CC
8
6
(mA)
4
CC(L)
I
2
0
-50 0 50 100 150 200
Ambient Temperature, TA(°C)
(mA)
CC(H)
I
-50 0 50 100 150 200
VCC(V)
I
versus Ambient Temperature
CC(H)
at Various Levels of V
(A1180, A1181, A1182, A1183)
8
6
(mA)
4
CC(L)
I
2
0
-50 0 50 100 150 200
Ambient Temperature, TA(°C)
CC
VCC(V)
VCC(V)
200
175
(G)
150
OP
125
100
75
Average B
50
25
A1180-DS, Rev. 2
Ambient Temperature, T
Average BOPBits versus Ambient Temperature
(A1180, A1181, A1182, A1183)
(°C)
A
Hysteresis versus Ambient Temperature
at Various Levels of V
CC
(A1180, A1181, A1182, A1183)
30
(G)
HYS
B
25
20
15
10
5
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
B
OPinit
B
it 1
B
it 2
B
it 3
B
it 4
B
it 5
0
-50 0 50 100 150 200 -50 0 50 100 150 200
Ambient Temperature, T
(°C) Ambient Temperature, TA(°C)
A
VCC(V)
5
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Device Qualifi cation Program
Contact Allegro for information.
EMC (Electromagnetic Compatibility) Requirements
Contact your local representative for EMC results.
Test Name Reference Specifi cation
ESD – Human Body Model AEC-Q100-002
ESD – Machine Model AEC-Q100-003
Conducted Transients ISO 7637-1
Direct RF Injection ISO 11452-7
Bulk Current Injection ISO 11452-4
TEM Cell ISO 11452-3
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
6
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information
Characteristic Symbol Test Conditions* Value Units
Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W
Package Thermal Resistance
R
θJA
Package LH, 2-layer PCB with 0.463 in. connected by thermal vias
Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W
*Additional thermal information available on Allegro Web site.
Power Derating Curve
25 24 23 22 21
(V)
20
CC
19 18 17 16
15 14 13 12 11
10
9
Maximum Allowable V
8 7 6 5 4 3 2
2-layer PCB, Package LH (R
= 110 ºC/W)
θJA
1-layer PCB, Package UA (R
= 165 ºC/W)
θJA
1-layer PCB, Package LH (R
= 228 ºC/W)
θJA
20 40 60 80 100 120 140 160 180
Temperature (ºC)
2
of copper area each side
V
CC(max)
V
CC(min)
110 ºC/W
A1180-DS, Rev. 2
Power Dissipation versus Ambient Temperature
1900 1800 1700 1600 1500 1400 1300
(mW)
D
Power Dissipation, P
1200 1100 1000
900 800 700 600 500 400 300 200
2-layer PCB, Package LH
(R
θJA
= 110 ºC/W)
1-layer
(R
PCB, Pa
θ
JA
= 165 ºC/W)
1-lay
e
rP
(R
θ
J
=
A
22
ckage
UA
CB, Package LH
8ºC
/
W
)
100
0
20 40 60 80 100 120 140 160 180
Temperature (°C)
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
7
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Functional Description
Operation
The output, I
, of the A1180 and A1182 devices switch low
CC
after the magnetic fi eld at the Hall sensor exceeds the oper- ate point threshold, BOP. When the magnetic fi eld is reduced to below the release point threshold, BRP, the device output goes high. The differences between the magnetic operate and release point is called the hysteresis of the device, B
. This built-
HYS
I+
I
CC(H)
I
Switch to Low
CC
Switch to High
I
CC(L)
0
B–
RP
B
B
OP
B+
in hysteresis allows clean switching of the output even in the presence of external mechanical vibration and electrical noise. The A1181 and A1183 devices switch with opposite polarity for similar BOP and BRP values, in comparison to the A1180 and A1183 (see fi gure 1).
I+
I
CC(H)
I
Switch to Low
CC
Switch to High
I
CC(L)
0
B–
RP
B
B
B+
OP
B
HYS
(A) A1180 and A1182
Figure 1. Alternative switching behaviors are available in the A118x device family. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic fi eld strength, and the B– direction indicates decreasing south polarity fi eld strength (including the case of increasing north polarity).
A1180-DS, Rev. 2
(B) A1181 and A1183
B
HYS
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
8
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Chopper Stabilization Technique
A limiting factor for switchpoint accuracy when using Hall effect technology is the small signal voltage developed across the Hall element. This voltage is proportionally small relative to the offset that can be produced at the output of the Hall sensor device. This makes it diffi cult to process the signal and maintain an accurate, reliable output over the specifi ed temperature and voltage range.
Chopper stabilization is a unique approach used to minimize Hall offset on the chip. The Allegro patented technique, dynamic quadrature offset cancellation, removes key sources of the output drift induced by temperature and package stress. This offset reduction technique is based on a signal modulation-demodula­tion process. The undesired offset signal is separated from the magnetically induced signal in the frequency domain through modulation. The subsequent demodulation acts as a modulation process for the offset causing the magnetically induced signal to recover its original spectrum at base band while the dc offset becomes a high frequency signal. Then, using a low-pass fi lter, the signal passes while the modulated dc offset is suppressed.
The chopper stabilization technique uses a 200 kHz high fre­quency clock. For demodulation process, a sample-and-hold
technique is used, where the sampling is performed at twice the chopper frequency (400KHz). The sampling demodulation process produces higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is desensitized to the effects of temperature and stress. This tech­nique produces devices that have an extremely stable quiescent Hall output voltage, is immune to thermal stress, and has precise recoverability after temperature cycling. This technique is made possible through the use of a BiCMOS process which allows the use of low-offset and low-noise amplifi ers in combination with high-density logic integration and sample-and-hold circuits.
The repeatability of switching with a magnetic fi eld is slightly affected using a chopper technique. The Allegro high frequency chopping approach minimizes the affect of jitter and makes it imperceptible in most applications. Applications that may notice the degradation are those that require the precise sensing of alter­nating magnetic fi elds such as ring magnet speed sensing. For those applications, Allegro recommends the “low jitter” family of digital sensors.
A1180-DS, Rev. 2
Regulator
Clock/Logic
Low-Pass
Hall Element
Amp
Figure 2. Chopper stabilization circuit (dynamic quadrature offset cancellation)
Filter
Hold
Sample and
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
9
A1180/81/82/83
GND
A118x
VCC
V+
0.01 uF
A
B
B
GND
ECU
Package UA Only
A
B
Maximum separation 5 mm
R
SENSE
C
BYP
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Application Information
For additional general application information, visit the Allegro MicroSystems Web site at www. allegromicro.com.
Typical Application Circuit
The A118x family of devices must be protected by an external bypass capacitor, C and the ground, GND, of the device. C noise and the noise generated by the chopper-stabilization func­tion. As shown in fi gure 3, a 0.01 μF capacitor is typical.
, connected between the supply, VCC,
BYP
reduces both external
BYP
Installation of C
must ensure that the traces that connect it to
BYP
the A118x pins are no greater than 5 mm in length.
All high-frequency interferences conducted along the supply lines are passed directly to the load through C
, and it serves
BYP
only to protect the A118x internal circuitry. As a result, the load ECU (electronic control unit) must have suffi cient protection, other than C
, installed in parallel with the A118x.
BYP
A series resistor on the supply side, RS (not shown), in combi­nation with C
, creates a fi lter for EMI pulses. (Additional
BYP
information on EMC is provided on the Allegro MicroSystems Web site.)
When determining the minimum VCC requirement of the A118x device, the voltage drops across RS and the ECU sense resistor, R
, must be taken into consideration. The typical value for
SENSE
R
is approximately 100 Ω.
SENSE
Figure 3. Typical application circuit
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
10
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Power Derating
The device must be operated below the maximum junction temperature of the device, T
. Under certain combinations of
J(max)
peak conditions, reliable operation may require derating sup­plied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.)
The Package Thermal Resistance, R
, is a fi gure of merit sum-
θJA
marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R relatively small component of R
. Ambient air temperature,
θJA
θJC
, is
TA, and air motion are signifi cant external factors, damped by overmolding.
The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD.
PD = VIN × I
ΔT = PD × R
IN
(2)
θJA
(1)
Example: Reliability for V
minimum-K PCB.
Observe the worst-case ratings for the device, specifi cally: R
165°C/W, T
θJA =
I
CC(max) = 17
J(max) =
mA.
Calculate the maximum allowable power level, P invert equation 3:
ΔT
max
= T
– TA = 165 °C – 150 °C = 15 °C
J(max)
This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2:
P
D(max)
= ΔT
max
÷ R
Finally, invert equation 1 with respect to voltage:
V
CC(est)
= P
D(max)
÷ I
The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages V
Compare V
CC(est)
to V able operation between V R
θJA
V
CC(max)
. If V
is reliable under these conditions.
CC(est)
V
CC(max)
at TA = 150°C, package UA, using
CC
165°C, V
= 15°C ÷ 165 °C/W = 91 mW
θJA
CC(max)
CC(max)
CC(est)
CC(max) =
= 91 mW ÷ 17 mA = 5 V
. If V
CC(est)
and V
24 V, and
V
CC(max)
requires enhanced
CC(max)
, then operation between V
D(max)
CC(est)
, then reli-
. First,
.
CC(est)
and
TJ = TA + ΔT (3)
For example, given common conditions such as: T
V
= 12 V, I
CC
P
= VCC × I
D
ΔT = PD × R
= 4 mA, and R
CC
= 12 V × 4 mA = 48 mW
CC
= 48 mW × 140 °C/W = 7°C
θJA
θJA
= 140 °C/W, then:
TJ = TA + ΔT = 25°C + 7°C = 32°C
A worst-case estimate, P able power level (V at a selected R
A1180-DS, Rev. 2
and TA.
θJA
CC(max)
, represents the maximum allow-
D(max)
, I
), without exceeding T
CC(max)
= 25°C,
A
J(max)
,
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
11
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Programming Protocol
The operate switchpoint, B
, can be fi eld-programmed. To do
OP
so, a coded series of voltage pulses through the VCC pin is used to set bitfi elds in onboard registers. The effect on the device output can be monitored, and the registers can be cleared and set repeatedly until the required BOP is achieved. To make the setting permanent, bitfi eld-level solid state fuses are blown, and nally, a device-level fuse is blown, blocking any further cod­ing. It is not necessary to program the release switchpoint, BRP , because the difference between BOP and BRP , referred to as the hysteresis, B
The range of values between B
HYS
, is fi xed.
OP(min)
and B
OP(max)
is scaled to 31 increments. The actual change in magnetic fl ux (G) repre- sented by each increment is indicated by B
(see the Operating
RES
Characteristics table; however, testing is the only method for verifying the resulting B
). For programming, the 31 incre-
OP
ments are individually identifi ed using 5 data bits, which are physically represented by 5 bitfi elds in the onboard registers. By setting these bitfi elds, the corresponding calibration value is programmed into the device.
Three voltage levels are used in programming the device: a low voltage, V
, a minimum required to sustain register settings; a
PL
mid-level voltage, VPM , used to increment the address counter in the device; and a high voltage, VPH , used to separate sets of VPM pulses (when short in duration) and to blow fuses (when long in duration). A fourth voltage level, essentially 0 V, is used to clear the registers between pulse sequences. The pulse values are shown in the Programming Protocol Characteristics table and in fi gure 4.
V+
V
PH
V
PM
V
PL
T
0
T
d(1)
Figure 4. Pulse amplitudes and durations
d(P)
T
d(0)
t
Additional information on device programming and program­ming products is available on www. allegromicro.com. Program­ming hardware is available for purchase, and programming software is available free of charge.
Code Programming. Each bitfi eld must be individually set. To
do so, a pulse sequence must be transmitted for each bitfi eld that is being set to 1. If more than one bitfi eld is being set to 1, all pulse sequences must be sent, one after the other, without allow­ing VCC to fall to zero (which clears the registers).
The same pulse sequence is used to provisionally set bitfi elds as is used to permanently set bitfi eld-level fuses. The only differ- ence is that when provisionally setting bitfi elds, no fuse-blowing pulse is sent at the end of the pulse sequence.
PROGRAMMING PROTOCOL CHARACTERISTICS, over operating temperature range, unless otherwise noted
Characteristic Symbol Test Conditions Min. Typ. Max. Units
V
Programming Voltage
1
V
V
Programming Current
2
t
Pulse Width
t
t
Pulse Rise Time t
Pulse Fall Time t
1
Programming voltages are measured at the VCC pin.
2
A bypass capacitor with a minimum capacitance of 0.1 μF must be connected from VCC to the GND pin of the A118x device in order to
Minimum voltage range during programming 4.5 5.0 5.5 V
PL
PM
PH
I
PPtr
d(0)
d(1)
d(P)
r
= 11 μs; 5 V 26 V; C
= 0.1 μF - 190 - mA
BYP
OFF time between programming bits 20 - - μs
Pulse duration for enable and addressing sequences
Pulse duration for fuse blowing 100 300 - μs
VPL to VPM; VPL to V
VPM to VPL; VPH to V
f
PH
PL
11.5 12.5 13.5 V
25.0 26.0 27.0 V
20 - - μs
5-20μs
5 - 100 μs
provide the current necessary to blow the fuse.
Allegro MicroSystems, Inc.
A1180-DS, Rev. 2
115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 www.allegromicro.com
12
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
The pulse sequences consist of the following groups of pulses:
1. An enable sequence.
2. A bitfi eld address sequence.
3. When permanently setting the bitfi eld, a long VPH fuse-blow-
ing pulse. (Note: Blown bit fuses cannot be reset.)
4. When permanently setting the bitfi eld, the level of VCC must
be allowed to drop to zero between each pulse sequence, in order to clear all registers. However, when provisionally set­ting bitfi elds, V
must be maintained at VPL between pulse
CC
sequences, in order to maintain the prior bitfi eld settings while preparing to set additional bitfi elds.
Bitfi elds that are not set are evaluated as zeros. The bitfi eld-level fuses for 0 value bitfi elds are never blown. This prevents inad-
V+
V
PH
V
PM
V
PL
vertently setting the bitfi eld to 1. Instead, blowing the device- level fuse protects the 0 bitfi elds from being accidentally set in the future.
When provisionally trying the calibration value, one pulse sequence is used, using decimal values. The sequence for setting the value 5
is shown in fi gure 5.
10
When permanently setting values, the bitfi elds must be set indi- vidually, and 510 must be programmed as binary 101. Bit 3 is set to 1 (0001002, which is 410), then bit 1 is set to 1 (0000012, which is 1
). Bit 2 is ignored, and so remains 0.Two pulse
10
sequences for permanently setting the calibration value 5 are shown in fi gure 6. The fi nal V
pulse is maintained for a longer
PH
period, enough to blow the corresponding bitfi eld-level fuse.
0
Enable Address Clear
Try 5
10
Optional
Monitoring
t
Figure 5. Pulse sequence to provisionally try calibration value 5.
V+
V
PH
V
PM
V
PL
0
Enable
Address
Encode 001002 (410)
Blow BlowEnable
Encode 00001
Figure 6. Pulse sequence to permanently encode calibration value 5 (101 binary, or
bitfi eld address 3 and bitfi eld address 1).
Address
(110)
2
t
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
13
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
V+
V
Enabling Addressing Mode. The fi rst segment of code is a
keying sequence used to enable the bitfi eld addressing mode. As shown in fi gure 7, this segment consists of one short VPH pulse, one VPM pulse, and one short VPH pulse, with no supply inter­ruptions. This sequence is designed to prevent the device from being programmed accidentally, such as by noise on the supply line.
PH
V
PM
V
PL
0
Address Selection. After addressing mode is enabled, the
target bitfi eld address, is indicated by a series of VPM pulses, as shown in fi gure 8.
Figure 7. Addressing mode enable pulse sequence
t
V+
V
PH
V
PM
V
PL
0
Address 1
Address 2
Address n ( 31)
t
Figure 8. Pulse sequence to select addresses
V+
V
PH
Falling edge of final BOP address digit
Lock Bit Programming. After the desired B
calibration value
OP
is programmed, and all of the corresponding bitfi eld-level fuses are blown, the device-level fuse should be blown. To do so, the lock bit (bitfi eld address 32) should be encoded as 1 and have its fuse blown. This is done in the same manner as permanently setting the other bitfi elds, as shown in fi gure 9.
A1180-DS, Rev. 2
V
PM
V
PL
0
Enable
32 pulses
Address Blow
Encode Lock Bit
Figure 9. Pulse sequence to encode lock bit
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
t
14
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
Package LH, 3-Pin (SOT-23W)
3.10
.122
2.90
.114
1.49
3.00
2.70
.118 .106
2.10
1.85
0.55 REF
.083 .073
0.96
.038
NOM
0.50 .020
0.30
.012
.022
.059
3
NOM
0.28
.011
NOM
A
21
1.13
0.87
0.95 BSC
.037
0.15
0.00
.006 .000
.045 .034
8º 0º
0.20
0.13
0.25 MIN
0.25
.010
BSC
Seating Plane
Gauge Plane
.008 .005
.010
1.00 BSC
0.70
.028
BSC
.039
A
B
C
C
Dimensions in millimeters U.S. Customary dimensions (in.) in brackets, for reference only
Hall element
Active Area Depth 0.28 [.011]
Fits SC–59A Solder Pad Layout
2.40 BSC
0.95 BSC
.094
.037
.122 .117
3.10
2.97
.640 .600
16.26
15.24
.0565 NOM
.085 MAX
Package UA, 3-Pin
.164
4.17
.159
4.04
45° BSC
.0805
2.04
NOM
1.44
B
2.16
A
231
.019
0.48
.014
0.36
Dimensions in inches Metric dimensions (mm) in brackets, for reference only
A
Dambar removal protrusion
B
Hall element
.050 BSC
.062 .058
1.27
.031 REF
.017 .014
1.57
1.47
0.79
0.44
0.35
.0195 NOM
0.50
45° BSC
A1180-DS, Rev. 2
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
15
A1180/81/82/83
Sensitive Two-Wire Field-Programmable Chopper-Stabilized Unipolar Hall Effect Switches
A1180-DS, Rev. 2
The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pend­ing.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufactur­ability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.
Allegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval.
The in for ma tion in clud ed herein is believed to be ac cu rate and reli­able. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use.
Copyright © 2004, 2005 Allegro MicroSystems, Inc.
Allegro MicroSystems, Inc. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
16
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