ALLEGRO 6277 DATA SHEET

6277

Selection Guide

Part Number Pb-free* Package Packing

Ambient

Temperature (°C)

A6277EA-T Yes 20-pin DIP 18 per tube –40 to 85
A6277ELW-T Yes 20-pin SOICW 37 per tube –40 to 85

A6277ELWTR-T Yes 20-pin SOICW 1000 per reel –40 to 85
*Pb-based variants are being phased out of the product line. The variants cited in this
footnote are in production but have been determined to be NOT FOR NEW DESIGN.
This classification indicates that sale of this device is currently restricted to existing
customer applications. The variants should not be purchased for new design applica­tions because obsolescence in the near future is probable. Samples are no longer
available. Status change: May 1, 2006. These variants include: A6277EA, A6277ELW,
A6277ELWTR, A6277SA, A6277SLW, and A6277SLWTR.

8-BIT SERIAL-INPUT, CONSTANT­CURRENT LATCHED LED DRIVER

2

D

6

a

1

t

a

8
5

S

.

2

h

0

e

2

e

c

t

The A6277x is specifically designed for LED-display applications.
Each BiCMOS device includes an 8-bit CMOS shift register, accompa­nying data latches, and eight npn constant-current sink drivers. Two
package styles and two operating temperature ranges are available.

The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 5 V logic supply, typical serial
data-input rates are up to 20 MHz. The LED drive current is deter­mined by the user’s selection of a single resistor. A CMOS serial data
output permits cascade connections in applications requiring additional
drive lines. For inter-digit blanking, all output drivers can be disabled
with an ENABLE input high. In addition, a HIGH/LOW function
enables full selected current with the application of a logic low, or 50%
selected current with the application of a logic high.

The first character of the part number suffix determines the device
operating temperature range. Suffix ‘E–’ is for -40°C to +85°C, and

LOGIC

GROUND

SERIAL

DATA IN

CLOCK

LATCH

ENABLE

HIGH/LOW

(CURRENT)

POWER

GROUND

OUT

OUT

OUT

OUT

A6277ELW

1

2

CK

3

L

4

5

6

SUB

7

0

8

1

9

2

10

3

REGULATOR

REGISTER

LATCHES

V

I

O

FF

OE

SUB

LOGIC

20

DD

SUPPLY

R

19

EXT

SERIAL

18

17

16

15

14

13

12

11

DATA OUT

SERIAL
DATA OUT

OUTPUT
ENABLE

POWER
GROUND

OUT

OUT

OUT

OUT

1

2

7

6

5

4

suffix ‘S–’ is -20°C to +85°C. Two package styles are provided for

Dwg. PP-029-17A

Note that the A6277EA (DIP) and the A6277ELW
(SOIC) are electrically identical and share a
common terminal number assignment.

through-hole DIP (suffix ‘–A’) or surface-mount SOIC (suffix ‘–LW’)
applications. The copper lead frame and low logic-power dissipation
allow the dual in-line package to sink 122 mA through all outputs
continuously over the operating temperature range (1.0 V drop,
+85°C).

ABSOLUTE MAXIMUM RATINGS

Supply Voltage, VDD...................... 7.0 V

Output Voltage Range,

VO............................ -0.5 V to +24 V

Output Current, I
Input Voltage Range,

VI.................... -0.4 V to VDD + 0.4 V

Package Power Dissipation,

....................... 150 mA

O

FEATURES

■ To 150 mA Constant-Current Outputs

■ Under-Voltage Lockout

■ Low-Power CMOS Logic and Latches

■ High Data Input Rate

■ Similar to Toshiba TD62715FN

■ High/Low Output Current Function

PD..................................... See Graph

Operating Temperature Range, T

A

Suffix ‘S-’ ................ -20°C to +85°C

Suffix ‘E-’ ................ -40°C to +85°C

Storage Temperature Range,

TS........................... -55°C to +150°C

Caution: These CMOS devices have input
static protection (Class 2) but are still suscep­tible to damage if exposed to extremely high
static electrical charges.

Digital “Dim” Control

6277

8-BIT SERIAL-INPUT,
CONSTANT-CURRENT
LATCHED LED DRIVER

2.5

2.0

1.5

1.0

0.5

0

ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS

25

SUFFIX 'A', R = 55°C/W

50 75 100 125 150

AMBIENT TEMPERATURE IN °°°°C

θJA

SUFFIX 'LW', R = 70°C/W

θJA

Dwg. GP-018-1

FUNCTIONAL BLOCK DIAGRAM

UVLO

V

DD

LOGIC
SUPPLY

CLOCK

SERIAL

DATA IN

LATCH

ENABLE

LOGIC

GROUND

POWER

GROUND

POWER

GROUND

Dwg. FP-013-7

2

SUB

OUT0OUT

SERIAL-PARALLEL SHIFT REGISTER

LATCHES

OUT

1

2

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]
Copyright © 2001, 2003 Allegro MicroSystems, Inc.

OUT

N

FF

MOS

BIPOLAR

I

O

REGULATOR

SERIAL DATA
OUT

2

SERIAL DATA
OUT

1

OUTPUT ENABLE
(ACTIVE LOW)

HIGH/LOW
(CURRENT)

R

EXT

6277

DD

8-BIT SERIAL-INPUT,

CONSTANT-CURRENT

LATCHED LED DRIVER

V

DD

V

DD

IN

Dwg. EP-010-11

IN

Dwg. EP-010-12

LATCH ENABLE and HIGH/LOWOUTPUT ENABLE (active low)

V

DD

IN

Dwg. EP-063-6

Dwg. EP-010-13

V

CLOCK and SERIAL DATA IN SERIAL DATA OUT

OUT

TRUTH TABLE

Serial Shift Register Contents Serial Latch Latch Contents Output Output Contents
Data Clock Data Enable Enable
Input Input I

1I2I3

HHR

LLR

XR

1R2R3

XXX...X X X L R1R2R3... R

P1P2P3... P

L = Low Logic (Voltage) Level H = High Logic (Voltage) Level X = Irrelevant P = Present State R = Previous State

www.allegromicro.com

1R2

1R2

... I

N-1IN

... R

N-2RN-1RN-1

... R

N-2RN-1RN-1

... R

N-1RN

N-1PN

Output Input I1I2I3... I

R

N

P

N

HP1P2P3... P

XXX...X X H H H H ... H H

N-1IN

N-1 RN

N-1 PN

Input I1I2I3... I

LP1P2P3... P

I

N-1

N-1 PN

N

3

6277

8-BIT SERIAL-INPUT,
CONSTANT-CURRENT
LATCHED LED DRIVER

ELECTRICAL CHARACTERISTICS at T

= +25°C, V

A

= VDD = 5 V (unless otherwise noted).

H/L

Limits

Characteristic Symbol Test Conditions Min. Typ. Max. Unit

Supply Voltage Range V

Under-Voltage Lockout V

Output Current I

DD

DD(UV)

O

(any single output)

Output Current Matching ∆I

O

(difference between any R
two outputs at same VCE)

Output Leakage Current I

Logic Input Voltage V

SERIAL DATA OUT Voltage V

(SDO1 & SDO2)

CEX

V

V

IH

IL

OL

OH

Operating 4.5 5.0 5.5 V

VDD = 0 to 5 V 3.4 – 4.0 V

VCE = 1.0 V, R

VCE = 0.4 V, R

0.4 V ≤ V

V

OH

CE(A)

EXT

R

EXT

= 20 V – 1.0 5.0 µA

= 160 Ω 100 120 140 mA

EXT

= 470 Ω 34 42 48 mA

EXT

= V

CE(B)

≤ 1.0 V:
= 160 Ω – ±1.5 ±6.0 %
= 470 Ω – ±1.5 ±6.0 %

0.7V

– – 0.3V

––V

DD

DD

IOL = 1.0 mA – – 0.4 V

IOH = -1.0 mA 4.6 – – V

V

Input Resistance R

I

ENABLE input, pull up 150 300 600 kΩ
LATCH & HIGH/LOW inputs, pull down 100 270 400 kΩ

Supply Current I

DD(OFF)

I

DD(ON)

R

= open, VOE = 5 V – 0.8 1.6 mA

EXT

R

= 470 Ω, V

EXT

R

= 160 Ω, V

EXT

R

= 470 Ω, V

EXT

R

= 160 Ω, V

EXT

Typical Data is at VDD = 5 V and is for design information only.

4

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

= 5 V 3.5 6.5 9.5 mA

OE

= 5 V 14 17 22 mA

OE

= 0 V 5.0 10 15 mA

OE

= 0 V 20 27 40 mA

OE