ALLEGRO 3974 DATA SHEET

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1

GND

44

24

GND

1

LOAD

SUPPLY

43

V

BB1

LOGIC

LOGIC

V

BB2

25

2

LOAD

SUPPLY

IN

ENABLE

42

26

2

ENABLE

NC

41

27

NC

DD

DD

1B

OUT

40

CHARGE PUMP

28

2B

OUT

+ 0.3 V
+ 1.0 V

1A

OUT

6

NC

7

STROBE

8

CLOCK

9

V

SERIAL PORT

÷
÷

DD

18

2A

OUT

DATA

10

GND

11

GND

12

GND

13

REF

1

14

REF

2

15

LOGIC

16

SUPPLY

NC

17 29

1

NC

NC

SENSE

GND

GND

2

3

21

2

SENSE

1

PROGRAM

PWM TIMER

PROGRAM

PWM TIMER

23

22

GND

GND

4

5

20

19

NC

NC

ABSOLUTE MAXIMUM RATINGS

= +25°C

at T

A

Load Supply Voltage, VBB............................ 50 V

Output Current, I

Logic Supply Voltage, VDD.......................... 7.0 V

Logic Input Voltage Range, V

Continous ................... -0.3 V to V

tW < 30 ns ................... -1.0 V to V

Reference Voltage, V
Sense Voltage (dc), V

Continous .............................................. 0.5 V

t

< 1 µs ................................................ 2.5 V

W

Package Power Dissipation, PD.................. 3.9 W

Operating Temperature Range,

T

......................................... -20°C to +85°C

A

Junction Temperature, T
Storage Temperature Range,

T

....................................... -55°C to +150°C

S

Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any set
of conditions, do not exceed the specified current rating

or a junction temperature of 150°C.

.................................. ±1.5 A

OUT

................................. 3 V

REF

S

......................... +150°C

J

3974

Designed for pulse-width modulated (PWM) current control

of two dc motors, the A3974SED is capable of output currents to

±1.5 A and operating voltages to 50 V. Internal fixed off-time

NC

39

CP2

38

CP1

37

CP

36

GND

35

GND

34

GND

33

OSC

32

SLEEP

31

REG

V

30

NC

Dwg. PP-073

PWM current-control timing circuitry can be programmed via a
serial interface to operate in slow, fast, and mixed current-decay
modes.

Independant ENABLE input terminals are provided for use in
controlling the speed and torque of each dc motor with externally
applied PWM control signals.

Synchronous rectification circuitry allows the load current to
flow through the low
the current decay. This feature will eliminate the need for
external clamp diodes in most applications, saving cost and
external component count, while minimizing power dissipation.

Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage monitoring of V
pump, and crossover-current protection. Special power-up
sequencing is not required.

The A3974SED is supplied in a 44-lead plastic PLCC with
four copper batwing tabs for maximum heat dissipation. The
power tabs are at ground potential and need no electrical isola­tion.

FEATURES

■ ±1.5 A, 50 V Continuous Output Rating

■ Low

■

■ Serial-Interface Controls Chip Functions

■ Synchronous Rectification for Low Power Dissipation

■ Internal UVLO and Thermal Shutdown Circuitry

■ Crossover-Current Protection

■ Sleep and Idle Modes

Always order by complete part number: A3974SED .

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

r

of the DMOS output driver during

DS(on)

and the charge

DD

r

DMOS Output Drivers

DS(on)

Programmable Slow, Fast, and Mixed Current-Decay Modes

Data Sheet

29319.35

3974

DMOS DUAL FULL-BRIDGE
PWM MOTOR DRIVER

FUNCTIONAL BLOCK DIAGRAM

DD

V

LOGIC

SUPPLY

CHARGE PUMP

BANDGAP

C

V

REG

TSD

DD

UNDER-

VOLTAGE &

FAULT DETECT

CP1

CHARGE

PUMP

CP2

CP

V

BB1

LOAD
SUPPLY

+

1

BANDGAP

REGULATOR

V

REG

ENABLE

OSC

CLOCK

DATA

STROBE

SLEEP

MODE

ENABLE

1

PROGRAMMABLE

PROGRAMMABLE

2

PWM TIMER

PWM TIMER

CONTROL LOGIC

FIXED OFF

BLANK

DECAY

SERIAL

PORT

FIXED OFF

BLANK

DECAY

CONTROL LOGIC

TO PWM TIMER

PHASE

SYNC RECT MODE

SYNC RECT DISABLE

PHASE

ENABLE

SYNC RECT MODE

SYNC RECT DISABLE

MODE

PWM MODE INT

PWM MODE EXT

GATE DRIVE

CHARGE

PUMP

GATE DRIVE

ZERO CURRENT DETECT

CURRENT SENSE

ZERO CURRENT DETECT

REFERENCE

BUFFER &

DIVIDER

OUT

1A

OUT

1B

SENSE

REF

1

LOAD
SUPPLY

OUT

OUT

SENSE

1

C

S1

R

S1

V

REF

2

V

BB2

+

2A

2B

2

C

S2

R

S2

CURRENT SENSE

REFERENCE

BUFFER &

DIVIDER

2

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

REF

2

V

REF2

Dwg. FP-048-1

Copyright © 2001 Allegro MicroSystems, Inc.

3974

DMOS DUAL FULL-BRIDGE

PWM MOTOR DRIVER

ELECTRICAL CHARACTERISTICS at T

= +25°C, V

A

= 50 V, VDD = 5.0 V, f

BB

< 50 kHz (unless

PWM

otherwise noted).

Limits

Characteristic Symbol Test Conditions Min. Typ. Max. Units

Output Drivers

Load Supply Voltage Range V

Output Leakage Current I

Output ON Resistance r

DS(on)

Body Diode Forward Voltage V

Load Supply Current I

BB

DSS

F

BB

Operating 15 — 50 V

During sleep mode 0 — 50 V

V

= V

OUT

V

OUT

Source driver, I

Sink driver, I

BB

= 0 V — <-1.0 -20 µA

= -1.5 A — 0.5 0.55 Ω

OUT

= 1.5 A — 0.315 0.35 Ω

OUT

— <1.0 20 µA

Source diode, IF = 1.5 A — — 1.2 V

Sink diode, IF = 1.5 A — — 1.2 V

f

< 50 kHz — 4.0 7.0 mA

PWM

Charge pump on, outputs disabled — 2.0 5.0 mA

Sleep or idle mode — — 20 µA

Control Logic

Logic Supply Voltage Range V

Logic Input Voltage V

V

Logic Input Current I
(except ENABLE)

ENABLE Input Current I

I

OSC Input Frequency f

DD

IN(1)

IN(0)

IN(1)

I

IN(0)

EN(1)

EN(0)

OSC

Operating 4.5 5.0 5.5 V

2.0 — — V

— — 0.8 V

V

= 2.0 V — <1.0 ±20 µA

IN

V

= 0.8 V — <1.0 ±20 µA

IN

V

= 2.0 V — 40 100 µA

EN

V

= 0.8 V — 16 30 µA

EN

2.9 — 6.1 MHz

OSC Input Duty Cycle — 40 — 60 %

OSC Input Hysterisis ∆V

Reference Input Voltage Range V

REF

IN

Operating 0 — 2.6 V

200 — 400 mV

continued next page ...

www.allegromicro.com

3

3974

DMOS DUAL FULL-BRIDGE
PWM MOTOR DRIVER

ELECTRICAL CHARACTERISTICS at T

= +25°C, V

A

= 50 V, VDD = 5.0 V, f

BB

< 50 kHz (unless

PWM

otherwise noted), continued.

Limits

Characteristic Symbol Test Conditions Min. Typ. Max. Units
Control Logic (continued)

Reference Input Current I

Reference Input Offset Voltage V

Reference Divider Ratio V

REF/VS

Gain (Gm) Error (note 3) E

Propagation Delay Time t

REF

IO

G

pd

V

= 2.6 V — — ±1.0 µA

REF

— ±10 — mV

D16 = 1 — 10 — —

D16 = 0 — 5.0 — —

V

= 2.6 V, D16 = 0 — 0 ±4.0 %

REF

V

= 0.5 V, D16 = 0 — 0 ±14 %

REF

V

= 2.6 V, D16 = 1 — 0 ±4.0 %

REF

V

= 0.5 V, D16 = 1 — 0 ±10 %

REF

50% TO 90%:
PWM change to source on 600 750 1000 ns
PWM change to source off 50 150 350 ns
PWM change to sink on 600 750 1000 ns
PWM change to sink off 50 150 350 ns

Crossover Delay Time t

Thermal Shutdown Temperature T

Thermal Shutdown Hysteresis ∆T

UVLO Enable Threshold V

UVLO Hysteresis ∆V

Logic Supply Current I

COD

J

J

UVLO

UVLO

DD

NOTES: 1. Typical Data is for design information only.

2. Negative current is defined as coming out of (sourcing) the specified device terminal.

3. EG = [(V

/Range) - VS]/(V

REF

/Range).

REF

4

SR enabled 300 600 1000 ns

— 165 — °C
—15— °C

Increasing V

DD

3.9 4.2 4.45 V

0.05 0.10 — V

f

< 50 kHz — — 10 mA

PWM

Outputs off — — 8.0 mA

Idle mode (D18 = 1, D19 = 0) — — 1.5 mA

Sleep mode (inputs below 0.5 V) — — 100 µA

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]