ALLEGRO 3952 DATA SHEET

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A3952SB

LOAD

BRAKE

GROUND

GROUND

LOGIC

SUPPLY

PHASE

ENABLE

Note that the A3952SB (DIP) and the A3952SLB
(SOIC) are electrically identical and share a

common terminal number assignment.

1

2

REF

3

RC

4

5

V

6

CC

7

89

LOGIC

V

BB

V

BB

ABSOLUTE MAXIMUM RATINGS

Load Supply Voltage, V
Output Current, I

(t

≤ 20 µs).................................. ±3.5 A

w

OUT

(Continuous) ...............................

Logic Supply Voltage, V
Logic Input Voltage Range,

....................... -0.3 V to VCC + 0.3 V

V

IN

Sense Voltage, V

SENSE

Reference Voltage, V
Package Power Dissipation,

....................................... See Graph

P

D

Operating Temperature Range,

............................... –20°C to +85°C

T

A

Junction Temperature, T
Storage Temperature Range,

............................. –55°C to +150°C

T

S

Output current rating may be limited by duty cycle,
ambient temperature, heat sinking and/or forced
cooling. Under any set of conditions, do not
exceed the specified current rating or a junction
temperature of +150°C.

* Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated but
should be avoided.

BB

CC

...................... 1.5 V

.................... 15 V

REF

............. +150°C*

J

16

SUPPLY

15

OUT

14

MODE

13

GROUND

12

GROUND

11

SENSE

10

OUT
LOAD

SUPPLY

Dwg. PP-056

.................. 50 V

±2.0 A

................. 7.0 V

3952

FULL-BRIDGE PWM MOTOR DRIVER

Designed for bidirectional pulse-width modulated current control of
inductive loads, the A3952S– is capable of continuous output currents
to ±2 A and operating voltages to 50 V. Internal fixed off-time PWM
current-control circuitry can be used to regulate the maximum load
current to a desired value. The peak load current limit is set by the

B

A

user’s selection of an input reference voltage and external sensing
resistor. The fixed OFF-time pulse duration is set by a user-selected
external RC timing network. Internal circuit protection includes thermal
shutdown with hysteresis, transient suppression diodes, and crossover­current protection. Special power-up sequencing is not required.

With the ENABLE input held low, the PHASE input controls load
current polarity by selecting the appropriate source and sink driver pair.
The MODE input determines whether the PWM current-control circuitry
operates in a slow current-decay mode (only the selected sink driver
switching) or in a fast current-decay mode (selected source and sink
switching). A user-selectable blanking window prevents false triggering
of the PWM current control circuitry. With the ENABLE input held high,
all output drivers are disabled. A sleep mode is provided to reduce
power consumption when inactive.

When a logic low is applied to the BRAKE input, the braking
function is enabled. This overrides ENABLE and PHASE to turn OFF
both source drivers and turn ON both sink drivers. The brake function
can be safely used to dynamically brake brush dc motors.

The A3952S– is supplied in a choice of four power packages. In all
package styles, the batwing/power tab is at ground potential and needs
no isolation. These devices are also available for operation from -40°C
to +125°C. To order, change the suffix from 'S–' to 'K–'.

FEATURES

■ ±2 A Continuous Output Current Rating

■ 50 V Output Voltage Rating

■ Internal PWM Current Control

■ Fast and Slow Current-Decay Modes

■ Sleep (Low Current Consumption) Mode

■ Internal Transient Suppression Diodes

■ Under-Voltage Lockout

■ Internal Thermal Shutdown Circuitry

■ Crossover-Current Protection

Always order by complete part number:

Part Number Package R

θJA

A3952SB 16-Pin DIP 43°C/W 6.0°C/W
A3952SEB 28-Lead PLCC 42°C/W 6.0°C/W
A3952SLB 16-Lead SOIC 67°C/W 6.0°C/W
A3952SW 12-Pin Power-Tab SIP 36°C/W 2.0°C/W

R

θJT

Data Sheet

29319.1*

3952

FULL-BRIDGE
PWM MOTOR DRIVER

FUNCTIONAL BLOCK DIAGRAM

MODE

PHASE

ENABLE

BRAKE

LOGIC

SUPPLY

REF

GROUND

9R

A

OUT

LOAD

SUPPLY

SLEEP &
STANDBY MODES

UVLO

& TSD

INPUT LOGIC

V

CC

1.5 V

R

BLANKING

V

CC

R

Q

S

PWM LATCH

BB

V

+ –

V

TH

B

OUT

EMITTERS

'EB' ONLY

+
–

SENSE

'B', 'LB', & 'W'
PACKAGES

R

T

RC

R

S

C

T

10

8

6

4

2

0

ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS

25

'W' AMBIENT

'B' & 'EB' AMBIENT

'LB' AMBIENT

50 75 100 125 150

TEMPERATURE IN °C

'B' , 'EB', & 'LB' TAB

Dwg. GP-007-1A

'W' TAB

Dwg. FP-036

TRUTH TABLE

BRAKE ENABLE PHASE MODE OUT

H H X H Z Z Sleep Mode
H H X L Z Z Standby, Note 1
H L H H H L Forward,

H L H L H L Forward,

H L L H L H Reverse,

H L L L L H Reverse,

L X X H L L Brake,

L X X L L L Brake, No Current

X = Irrelevant Z = High Impedance (source and sink both OFF)
NOTES: 1. Includes active pull-offs for power outputs.

2. Includes internal default V

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

Copyright © 1994 Allegro MicroSystems, Inc.

sense

OUTBDESCRIPTION

A

Fast-Decay Mode

Slow-Decay Mode

Fast-Decay Mode

Slow-Decay Mode

Fast-Decay Mode

Control, Note 2

level for over-current protection.

3952

FULL-BRIDGE
PWM MOTOR DRIVER

A3952SEB A3952SW

B

BRAKE

LOAD

REF

RC

3

4

5

GROUND

6

7

8

9

10

11

GROUND

V

CC

13

12

LOGIC

PHASE

SUPPLY

ELECTRICAL CHARACTERISTICS at T
V

= 0 V, RC = 20 kΩ/1000 pF to Ground (unless noted otherwise).

SENSE

SUPPLY

OUT

MODE

NOCONNECTION

1

2

V

BB

14

LOAD

ENABLE

LOGIC

15

SUPPLY

28

16

OUT

27

26

GROUND

25

24

23

22

21

20

19

GROUND

17

18

A

SENSE

EMITTERS

Dwg. PP-057

= +25°C, V

A

LOGIC

BB

V

CC

V

12345 678 9101112

B

OUT

LOAD

BRAKE

GROUND

= 50 V, VCC = 5.0 V, V

BB

SUPPLY

REF

RC

LOGIC

SUPPLY

BRAKE

PHASE

ENABLE

= 2.0 V,

MODE

Limits

A

OUT

Dwg. PP-058

SENSE

Characteristic Symbol Test Conditions Min. Typ. Max. Units
Output Drivers

Load Supply Voltage Range V
Output Leakage Current I

Output Saturation Voltage V

CE(SAT)

Clamp Diode Forward Voltage V

BB

CEX

F

Operating, I
V

= V

OUT

V

= 0 V – <-1.0 -50 µA

OUT

Source Driver, I
Source Driver, I
Source Driver, I
Sink Driver, I
Sink Driver, I
Sink Driver, I

= ±2.0 A, L = 3 mH V

OUT

BB

= -0.5 A – 0.9 1.2 V

OUT

= -1.0 A – 1.0 1.4 V

OUT

= -2.0 A – 1.2 1.8 V

OUT

= +0.5 A – 0.9 1.2 V

OUT

= +1.0 A – 1.0 1.4 V

OUT

= +2.0 A – 1.3 1.8 V

OUT

CC

– <1.0 50 µA

– 50 V

IF = 0.5 A – 1.0 1.4 V

(Source or Sink) IF = 1.0 A – 1.1 1.6 V

IF = 2.0 A – 1.4 2.0 V
Load Supply Current I
(No Load) I

BB(ON)

BB(OFF)

I

BB(SLEEP)

V

V

V

V

= 0.8 V – 2.9 6.0 mA

ENABLE

= 2.0 V, V

ENABLE

= 0.8 V – 3.1 6.5 mA

BRAKE

= V

ENABLE

MODE

= 0.8 V – 3.1 6.5 mA

MODE

= 2.0 V – <1.0 50 µA

Continued next page …

3952

FULL-BRIDGE
PWM MOTOR DRIVER

Limits

Characteristic Symbol Test Conditions Min. Typ. Max. Units

Control Logic

Logic Supply Voltage Range V
Logic Input Voltage V

Logic Input Current I

Reference Voltage Range V
Reference Input Current I

V

I

CC

IN(1)

IN(0)

IN(1)

IN(0)

REF

REF

Reference Voltage Divider Ratio – V
Comparator Input Offset Voltage V
PWM RC Fixed OFF Time t
PWM Minimum ON Time t

IO

off

on(min)

Operating 4.5 5.0 5.5 V

2.0 ––V
––0.8 V

VIN = 2.0 V – <1.0 20 µA
VIN = 0.8 V – <-2.0 -200 µA
Operating 0 – 15 V
V

= 2.0 V 25 40 55 µA

REF

= 15 V 9.5 10.0 10.5 –

REF

V

= 0 V – ±1.0 ±10 mV

REF

CT = 1000 pF, RT = 20 kΩ 18 20 22 µs
CT = 820 pF, RT ≥ 12 kΩ – 1.7 3.0 µs
CT = 1200 pF, RT ≥ 12 kΩ – 2.5 3.8 µs

Propagation Delay Time t

t

pd(pwm)

Thermal Shutdown Temperature T
Thermal Shutdown Hysteresis ∆T
UVLO Disable Threshold V
UVLO Hysteresis ∆V
Logic Supply Current I
(No Load) I

CC(UVLO)

CC(UVLO)

CC(ON)

CC(OFF)

I

CC(BRAKE)

I

CC(SLEEP)

I

pd

= ±2.0 A, 50% EIN to 90% E

OUT

Transition:

OUT

ENABLE ON to Source ON – 2.9 – µs
ENABLE OFF to Source OFF – 0.7 – µs
ENABLE ON to Sink ON – 2.4 – µs
ENABLE OFF to Sink OFF – 0.7 – µs
PHASE Change to Source ON – 2.9 – µs
PHASE Change to Source OFF – 0.7 – µs
PHASE Change to Sink ON – 2.4 – µs
PHASE Change to Sink OFF – 0.7 – µs

Comparator Trip to Sink OFF – 0.8 1.5 µs

J

J

– 165 – °C
– 15 – °C

3.15 3.50 3.85 V

300 400 500 mV
V
V
V
V

= 0.8 V, V

ENABLE

= 2.0 V, V

ENABLE

= 0.8 V – 26 40 mA

BRAKE

= V

ENABLE

MODE

= 2.0 V – 20 30 mA

BRAKE

= 0.8 V – 12 18 mA

MODE

= V

= 2.0 V – 3.0 5.0 mA

BRAKE

NOTES: 1. Typical Data is for design information only.

2. Each driver is tested separately.

3. Negative current is defined as coming out of (sourcing) the specified device terminal.

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 [phone]

3952

FULL-BRIDGE
PWM MOTOR DRIVER

FUNCTIONAL DESCRIPTION

INTERNAL PWM CURRENT CONTROL DURING
FORWARD AND REVERSE OPERATION

The A3952S– contains a fixed OFF-time pulse-width
modulated (PWM) current-control circuit that can be used
to limit the load current to a desired value. The value of
the current limiting (I

) is set by the selection of an

TRIP

external current sensing resistor (RS) and reference input
voltage (V

). The internal circuitry compares the voltage

REF

across the external sense resistor to one tenth the voltage
on the REF input terminal, resulting in a function approxi­mated by

I

TRIP

= V

/(10RS).

REF

In forward or reverse mode the current-control circuitry
limits the load current. When the load current reaches
I

, the comparator resets a latch to turn OFF the

TRIP

selected sink driver (in the slow-decay mode) or selected
sink and source driver pair (in the fast-decay mode). In
slow-decay mode, the selected sink driver is disabled; the
load inductance causes the current to recirculate through
the source driver and flyback diode (see figure 1). In fast­decay mode, the selected sink and source driver pair are
disabled; the load inductance causes the current to flow
from ground to the load supply via the ground clamp and
flyback diodes.

V

BB

DRIVE CURRENT
RECIRCULATION

(SLOW-DECAY MODE)
RECIRCULATION

(FAST-DECAY MODE)

R

S

Dwg. EP-006-2A

Figure 1 — Load-Current Paths

The user selects an external resistor (RT) and capaci­tor (CT) to determine the time period (t

= RTCT) during

off

which the drivers remain disabled (see “RC Fixed OFF
Time” below). At the end of the RTCT interval, the drivers
are re-enabled allowing the load current to increase again.
The PWM cycle repeats, maintaining the load current at
the desired value (see figure 2).

ENABLE

MODE

I

LOAD

CURRENT

TRIP

RC

RC

Dwg. WP-015-1

Figure 2 — Fast and Slow Current-Decay Waveforms

INTERNAL PWM CURRENT CONTROL DURING
BRAKE MODE OPERATION

The brake circuit turns OFF both source drivers and
turns ON both sink drivers. For dc motor applications, this
has the effect of shorting the motor’s back-EMF voltage,
resulting in current flow that brakes the motor dynamically.
However, if the back-EMF voltage is large, and there is no
PWM current limiting, then the load current can increase to
a value that approaches a locked rotor condition. To limit
the current, when the I

level is reached, the PWM

TRIP

circuit disables the conducting sink driver. The energy
stored in the motor’s inductance is then discharged into
the load supply causing the motor current to decay.

As in the case of forward/reverse operation, the drivers
are re-enabled after a time given by t

= RTCT (see “RC

off

Fixed OFF Time” below). Depending on the back-EMF
voltage (proportional to the motor’s decreasing speed), the
load current again may increase to I

. If so, the PWM

TRIP

cycle will repeat, limiting the load current to the desired
value.

Brake Operation - MODE Input High

During braking, when the MODE input is high, the
current limit can be approximated by

I

TRIP

= V

REF

/(10RS).

CAUTION: Because the kinetic energy stored in the
motor and load inertia is being converted into current,
which charges the VBB supply bulk capacitance (power
supply output and decoupling capacitance), care must be
taken to ensure the capacitance is sufficient to absorb the
energy without exceeding the voltage rating of any devices
connected to the motor supply.