The A3935 is designed specifically for automotive applications that
require high-power motors. Each provides six high-current gate drive
outputs capable of driving a wide range of n-channel power MOSFETs.
A requirement of automotive systems is steady operation over a
varying battery input range. The A3935 integrates a pulse-frequency
modulated boost converter to create a constant supply voltage for
driving the external MOSFETs. Bootstrap capacitors are utilized to
provide the above battery supply voltage required for n-channel FETs.
Direct control of each gate output is possible via six TTL-compatible inputs. A differential amplifier is integrated to allow accurate
measurement of the current in the three-phase bridge.
Diagnostic outputs can be continuously monitored to protect the
driver from short-to-battery, short-to-supply, bridge-open, and battery
under/overvoltage conditions. Additional protection features include
dead-time, VDD undervoltage, and thermal shutdown.
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltages, VBAT, VDRAIN,
VBOOST, BOOSTD ... -0.6 V to 40 V
Output Voltage Ranges,
GHA/GHB/GHC, V
SA/SB/SC, VSX............... -4 V to 40 V
GLA/GLB/GLC, V
CA/CB/CC, VCX.......... -0.6 V to 55 V
Sense Circuit Voltages,
CSP,CSN, LSS............... -4 V to 6.5 V
Logic Supply Voltage,
VDD........................... -0.3 V to +6.5 V
Logic Input/Outputs and OVSET, BOOSTS,
CSOUT, VDSTH ......... -0.3 V to 6.5 V
Operating Temperature Range,
TA........................... -40°C to +135°C
Junction Temperature, TJ........... +150°C
Storage Temperature Range,
TS........................... -55°C to +150°C
* Fault conditions that produce excessive
junction temperature will activate device
thermal shutdown circuitry. These conditions
can be tolerated, but should be avoided.
.. -4 V to 55 V
GHX
.... -4 V to 16 V
GLX
The A3935 is supplied in a choice of three packages, a 44-lead
PLCC with copper batwing tabs (suffix ED), a 48-lead low profile QFP
with exposed thermal pad (suffix JP), and a 36-lead 0.8 mm pitch SOIC
(suffix LQ).
FEATURES
!!
! Drives wide range of n-channel MOSFETs in 3-phase bridges
!!
!!
! PFM boost converter for use with low-voltage battery supplies
!!
!!
! Internal LDO regulator for gate-driver supply
!!
!!
! Bootstrap circuits for high-side gate drivers
!!
!!
! Current monitor output
!!
!!
! Adjustable battery overvoltage detection.
!!
!!
! Diagnostic outputs
!!
!Motor lead short-to-battery, short-to-ground, and
bridge-open protection
!Undervoltage protection
!!
! -40 °C to +150 °C, T
!!
!!
! Thermal shutdown
!!
Always order by complete part number, e.g., A3935KLQ .
operation
J
3935
THREE-PHASE POWER
MOSFET CONTROLLER
Functional Block Diagram
See pages 8 and 9 for terminal assignments and descriptions.
* Measured on “High-K” multi-layer PWB per JEDEC Standard JESD51-7.
† Measured on typical two-sided PWB with power tabs (terminals 1, 2, 11, 12, 22, 23, 34, and 35) connected to copper foil with an
area of 3.8 square inches (2452 mm2) on each side. See Application Note 29501.5, Improving Batwing Power Dissipation, for
additional information.
www.allegromicro.com
3
3935
THREE-PHASE POWER
MOSFET CONTROLLER
ELECTRICAL CHARACTERISTICS: unless otherwise noted at T
V
= 4.75 V to 5.25 V, ENABLE = 22.5 kHz, 50% Duty Cycle, Two Phases Active.
DD
= -40°C to +150°C, V
J
= 7 V to 16 V,
BAT
Limits
CharacteristicsSymbolConditionsMinTypMaxUnits
Power Supply
VDD Supply CurrentI
V
Supply CurrentI
BAT
Battery Voltage Operating RangeV
Bootstrap Diode Forward VoltageV
ELECTRICAL CHARACTERISTICS: unless otherwise noted at T
VDD = 4.75 V to 5.25 V, ENABLE = 22.5 kHz, 50% Duty Cycle, Two Phases Active.
= -40°C to +150°C, V
J
CharacteristicsSymbolConditions
Control Logic
Logic Input VoltagesV
Logic Input CurrentsI
Input HysteresisV
Logic Output High VoltageV
Logic Output Low VoltageV
I(1)
V
I(0)
I(1)
I
I(0)
hys
O(H)
I(L)
Minimum high level input for logical “one”2.0––V
Maximum low level input for logical “zero”––0.8V
VI = V
DD
VI = 0.8 V50––µA
I
= -800 µAV
O(H)
I
= 1.6 mA––0.4V
O(L)
Gate Drives, GHx ( internal SOURCE or upper switch stages)
Output High VoltageV
Source Current (pulsed)I
Source ON Resistancer
DSL(H)
xU
SDU(on)
GHx: I
GLx: I
V
V
I
xU
I
xU
= –10 mA, Vsx = 0V
xU
= –10 mA, V
xU
= 10 V, TJ = 25 °C –800–mA
SDU
= 10 V, TJ = 135 °C400––mA
SDU
= 0V
lss
= –150 mA, TJ = 25 °C4.0–10Ω
= –150 mA, TJ = 35 °C7.0–15Ω
Gate Drives, GLx ( internal SINK or lower switch stages)
V
Sink Current (pulsed)I
Sink ON Resistancer
xL
DSL(on)
= 10 V, TJ = 25 °C –850–mA
DSL
= 10 V, TJ = 135 °C 550––mA
V
DSL
I
= +150 mA, TJ = 25 °C1.8–6.0Ω
xL
= +150 mA, TJ = 135 °C3.0–7.5Ω
I
xL
Gate Drives, GHx, GLx (General)
Phase Leakage (Source)I
Propagation Delay, Logic onlyt
Output Skew Timet
Dead Time (Shoot-Through
t
Sx
pd
sk(o)
dead
ENABLE = 0, VSx = 1.7 V0–100µA
Logic input to unloaded GHx, GLx––150ns
Grouped by edge, phase-to-phase––50ns
Between GHx, GLx transitions of same phase75–180ns
Prevention)
= 7 V to 16 V,
BAT
Limits
MinTypMaxUnits
––500µA
100–300mV
– 0.8––V
DD
– 2.26–V
REG
– 0.26–V
REG
REG
REG
V
V
NOTES: Typical Data and Typical Characteristics are for design information only.
Negative current is defi ned as coming out of (sourcing) the specifi ed device terminal.
For GH
For GL
X
: V
X
= VCX – V
SDU
= V
SDU
REG
– V
GHX
GLX
, V
, V
DSL
DSL
= V
= V
– VSX, V
GHX
– V
GLX
LSS
, V
DSL(H)
DSL(H)
= VCX – V
= V
REG
– V
– VSX.
SDU
SDU
– V
LSS.
: V
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5
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