AKM AKD4551 Datasheet

ASAHI KASEI [AKD4551]

AKD4551

Evaluation board Rev.C for AK4551

GENERAL DESCRIPTION

AKD4551 is an evaluation board for the portable digital audio 20bit A/D and D/A converter, AK4551. The
AKD4551 can evaluate A/D converter and D/A converter separately in addition to loopback mode (A/D →
D/A). The A/D section can be evaluated by interfacing with AKM’s DAC evaluation boards directly. The
AKD4551 has the interface with AKM’s wave generator using ROM data and AKM’s ADC evaluation
boards. Therefore, it’s easy to evaluate the D/A section. The AKD4551 also has the digital audio interface
and can achieve the interface with digital audio systems via opt-connector.

n Ordering guide

AKD4551 --- Evaluation board for AK4551

FUNCTION

• Compatible with 2 types of interface

- Direct interface with AKM’s A/D & D/A converter evaluation boards

- DIT/DIR with optical input/output

• BNC connector for an external clock input

2.2 ∼ 3.6V

GND

CS8412

(DIR)

CS8402

AK4551

(DIT)

Clock

Generator

Opt In

Opt Out

A/D, D/A Data
ROM Data

Figure 1. AKD4551 Block Diagram

* Circuit diagram is attached at the end of this manual.

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ASAHI KASEI [AKD4551]

n Input Circuit

External analog signal fed through the BNC connector is terminated by a resistor of 560 ohms. The resistor value should be
properly selected in order to meet the output impedance of the signal source.

AINL(AINR)

4.7u
+

560

Figure 2. Input buffer circuit on board

* AKM assumes no responsibility for the trouble when using the circuit examples.

470

AINL(AINR)

2.2n

n Analog Output Circuit

The AK4551 includes a combination of switched-capacitor filter (SCF) and continuous-time filter (CTF), so any external
filters are not required.

n Grounding and Power Supply Decoupling

To minimize the coupling by digital noise, VDD pin should be supplied from analog power supply in system. Decouling
capacitors should be connected to AK4551 as near as possible. Especially, the capacitor between VDD and VSS pins
should be connected nearest.

n Operation sequence

1) Set up the power supply lines.

[VA] (orange) = 2.2 ∼ 3.6V : for VDD of AK4551
[VP] (orange) = 2.2 ∼ 3.6V : for VP of 74HC4050
[VD] (red) = 3.6 ∼ 5.0V : for logic
[AGND] (black) = 0V : for analog ground (including VSS of AK4551)
[DGND] (black) = 0V : for logic ground

Each supply line should be distributed from the power supply unit.
VP and VA must be same voltage level.

2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.)

3) Power on.

The AK4551 should be reset once bringing SW1,2 ( PWAD

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, PWDA ) “OFF” upon power-up.

ASAHI KASEI [AKD4551]

R

R

R

n Evaluation mode

Applicable Evaluation Mode

1) Evaluation of loopback mode (default)

2) Evaluation of D/A using ideal sin wave generated by ROM data

3) Evaluation of D/A using A/D converted data

4) Evaluation of D/A using DIR (Optical Link)

5) Evaluation of A/D using D/A converted data

6) Evaluation of A/D using DIT (Optical Link)

7) All interface signals including master clock are fed externally.

6)

5)

PORT2

DIT

AKD43XX

D/A Board

AKD4551

1)
PORT3

DIR

1) Evaluation of loopback mode. (default)

Nothing should be connected to PORT1/PORT3. In case of using external clock through a BNC connector
(J5), select EXT on JP12 (XTI) and short JP10 (XTE).This mode corresponds to only JP13 (X_SCLK) 64fs.

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64fs32fs

DI

PORT1

10pin-Header

3)

2)

JP10

XTE

4)

JP12

XTI

DIR

XTL

EXT

CD Player

A/D Board

ROM Board

JP13

X_SCLK

AKD53XX

JP14

DIR

OFFON

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ASAHI KASEI [AKD4551]

R

R

R

s

R

R

R

s

R

R

R

R

R

R

s

2) Evaluation of D/A using A/D converted data from ideal sine wave generated by ROM data.

Digital signals generated by AKD43XX are used. PORT1 is used for the interface with AKD43XX. Master
clock is sent from AKD4551 to AKD43XX and SCLK, LRCK, SDTI are sent from AKD43XX to
AKD4551. Nothing should be connected to PORT3. In case of using external clock through a BNC
connector (J5), select EXT on JP12 (XTI) and short JP10 (XTE).

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64f

DI

3) Evaluation of D/A using A/D converted data.

It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various
AKM’s A/D evaluation boards with PORT1. Nothing should be connected to PORT3. In case of using
external clock through a BNC connector (J5), select EXT on JP12 (XTI) and short JP10 (XTE).

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64f

DI

4) Evaluation of D/A using DIR. (Optical link)

PORT3 (TORX176) is used. DIR generates MCLK, SCLK, LRCK and SDATA from the received data
through optical connector (TORX176). Used for the evaluation using CD test disk. Nothing should be
connected to PORT1/PORT2.

JP10

XTE

JP10

XTE

JP12

XTI

DIR

JP12

XTI

DIR

XTL

XTL

EXT

EXT

JP13

X_SCLK

32fs

JP13

X_SCLK

32fs

JP14

DIR

OFFON

JP14

DIR

OFFON

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64fs32fs

DI

JP10

XTE

JP12

XTI

DIR

XTL

EXT

JP13

X_SCLK

JP14

DIR

OFFON

5) Evaluation of A/D using D/A converted data.

It is possible to make evaluation in the form of analog inputs and analog outputs by interfacing with various
AKM’s D/A evaluation boards with PORT1. Nothing should be connected to PORT3.

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64f

DI

JP10

XTE

JP12

XTI

DIR

XTL

JP13

X_SCLK

32fs

EXT

JP14

DIR

OFFON

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ASAHI KASEI [AKD4551]

R

R

R

s

R

R

R

6) Evaluation of A/D using DIT. (Optical link)

PORT2 (TOTX176) is used. DIT generates audio bi-phase signal from received data and which is output
through optical connector (TOTX176). It is possible to connect AKM’s D/A converter evaluation boards on
the digital-amplifier which equips DIR input. In case of using external clock through a BNC connector (J5),
select EXT on JP12 (XTI) and short JP10 (XTE).

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64f

DI

JP10

XTE

JP12

XTI

DIR

XTL

JP13

X_SCLK

32fs

EXT

JP14

DIR

7) All interfacing signals (MCLK, SCLK, LRCK) are fed from the external circuit through PORT1.

Under the following set-up, all external signals needed for the AK4551 to operate could be fed through
PORT1. In case of interfacing external sources to D/A converter, JP9 (SDTI) should be open. And in case of
using A/D data to externally, JP9 (SDTI) is set ADC side. When JP9 (SDTI) is open, the A/D data can be
output from the SDTO pin of PORT1 at the same time if JP7 (SDTO) is short.

ADC

JP6

SCLK

DI

ADC

JP8

LRCK

DI

JP9

SDTI

ADC 64fs32fs

DI

JP10

XTE

JP12

XTI

DIR

XTL

X_SCLK

EXT

JP13

JP14

DIR

OFFON

OFFON

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ASAHI KASEI [AKD4551]

n DIP switch set up

Upper-side is “ON” (“H”) and lower-side is “OFF” (“L”).

[SW3]: Sets the C-bit of CS8402. (Default is the consumer mode.)

This set up does not affect the evaluation of the AK4551. In case of using DIT, need to set it up correctly.
For more detailed configurations, please refer to the CS8402 data sheet.

Switch OFF=0, ON=1 Contents

8 PRO = 0 Professional mode, C0=1

7, 6 C6 ,C7 C6,C7 – Sampling frequency

11
10
01
00

5C9C8,C9,C10,C11 – 1bit of channel mode

1
0

4C1C1 – Audio mode

1
0

3 TRNPT Transparent mode *CS8402 is CRE

0
1

2, 1 EM1, EM0 C2,C3,C4 – Encoded audio signal emphasis

11

10
01
00

Table 1. DIP switch set-up of CS8402 (Professional mode)

00 – Not indicated. Receiver default to 48kHz.
01 – 48kHz
10 – 44.1kHz
11 – 32kHz

0000 – Mode not indicated. Receiver default to 2-channel mode.
0100 – Stereophonic.

0 – Normal audio
1 – Non-audio

Normal mode
Transparent mode

000 – Emphasis not indicated. Receiver defaults to no emphasis
with manual override enabled.
100 – None
110 – 50/15usec
111 – CCITT J.17

Switch OFF=0, ON=1 Contents

8 PRO = 1 Consumer mode, C0=1 <Default>
7C2C2 – Copy

1

Default

6C3C3,C4,C5 – Pre-emphasis

Default 1

5 C15 C15 – General Status

Default

4, 3 FC1,FC0 C24,C25,C26,C27 – Sampling frequency

Default

2, 1 C8 ,C9 C8-C14 – Category code

Default 11

0

0

1
0

00
01
10
11

10
01
00

Table 2. DIP switch set-up of CS8402 (Consumer mode; default)

0 – Copy inhibited
1 – Copy permitted

000 – None
100 – 50/15usec

0 – See the standard
1 – See the standard

0000 – 44.1kHz
0100 – 48kHz
1100 – 32kHz
0000 – 44.1kHz, CD mode

0000000 – General
0100000 – PCM encoder/decoder
1000000 – CD
1100000 – DAT

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