Akira 29whp3 schematic

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Model No: 29WHP3ANZ
Version 1.0

3

CONTENT

THE MAIN CHIPS TDA9384/ TDA9363............................................................................................... 4

SIGNAL PROCESS................................................................................................................................. 7

THE HORIZONTAL AND VERTICAL CIRCUIT ................................................................................8

POWER SUPPLY .................................................................................................................................... 9

FACTORY MODE................................................................................................................................. 10

APPENDIX ............................................................................................................................................ 14

CIRCUIT DIAGRAM............................................................................................................................ 20

EXPLODED VIEW AND PART NAME.............................................................................................. 22

Model No: 29WHP3ANZ
Version 1.0

4

THE MAIN CHIPS TDA9384/TDA9363

The UOC (“Ultimate One Chip”) TDA9363 is adopted in this chassis. This IC is the first available
component that contains the complete control and small signal functionality needed for a TV
application in one device.

1. The UOC TDA9363 pins function description: (total 64 pins

Pin1: Standby control,“1” is on,“0”is off.
Pin2: SCL.
Pin3: SDA.
Pin4: Tuning PWM output.

Pin5:

Pin6: Key board input.
Pin7: Mute control, “1” is mute, “0”is off.
Pin8: CTL, the earth magnetic field rectification output.
Pin9: Pin12, Pin18, Pin30, Pin35, Pin41, Pin55: GND.

Pin10:

Pin11: RELAY, control the K701,“1”is degaussing,“0”is not.
Pin13: SECAM PLL connected with a capacitance.
Pin14: +8V power source supply

Pin15:

Pin16: PHI-2 control loop, this pin requires a capacitor at 2.2nF (C) in series to GND.

Pin17:

Pin18: GND.

Pin19:

Pin20: East-west pillow signal output.
Pin21:
Pin22:
Pin23:
Pin24:

Pin25:

Pin26: Vertical sawtooth, This pin requires a capacitor to ground of 100nF.
Pin27: AGC output. This output is used to control (reduce) the tuner gain for strong RF signals.
Pin28: Audio de-emphasis.

Auto AV control SW, connected with the SCART2’s 8th pin.
Input. The rising edge or the falling edge operates.

LED, the lamp control output.
“1” is on standby, the lamp is light,
“0” is turn-on. The lamp is dim.

Using a capacitor of 220n in series to GND, This pin decouples the internal digital supply
voltage of the video processor and minimizes the disturbance to the sensitive analogue
parts.

PHI-1 control loop, the loop filter connected to pin 17 is suitable for various signal
conditions like strong/weak and VCR signal. This is achieved by switching of the loop
filter time constant by changing the PHI-1 output current.

Bandgap decoupling, the bandgap circuit provides a very stable and temperature
independent reference voltage. This reference voltage (4.0 V) ensures optimal
performance of the analogue video processor part of the TDA9363 and is used in almost
all functional circuit blocks.

Vertical drive output.

IF input.

Reference current, This pin requires a resistor to ground. The optimal reference current is
100mA, which is determined by this resistor. The 100mA reference current should not be
changed because the geometry processor is optimised for this current.
Furthermore the output current of vertical drive and EW are proportional to this current.

）

Model No: 29WHP3ANZ
Version 1.0

5

Pin29:

Pin30: GND.
Pin31: Sound loop filter.
Pin32: AVL filter.
Pin33: Horizontal drive signal output, needs a resistor in series to +8V.
Pin34: Sandcastle output/flyback input
Pin35: External audio input, this pin should be grounded in this chassis.

Pin36:

Pin37: PLL loop filter.
Pin38: CVBS output. Monitor or RF videos can be selected.
Pin39: +8V supply source.
Pin40: CVBS input
Pin42: Y signal input.
Pin43: C signal input.
Pin44: Main audio output, this pin is connected to the TDA9859.
Pin45: RGB signal input blanking.
Pin46,
Pin47,
Pin48:
Pin49: ABL. It means been current limiter input. The R410 is the control resister.
Pin50: Black current input from the CRT board.

Pin51,
Pin52,
Pin53:

Pin54: +3.3V.
Pin55: GND.
Pin56: +3.3V.
Pin57,
Pin58,
Pin59:
Pin60: Reset, NC in this chassis.
Pin61: +3.3V
Pin62: NC.
Pin63: This pin is connected to the HEF4094, Functions expanding.
Pin64: IR signal input.

Sound decoupling. This pin requires a capacitor connected to ground. The pin acts as a
low pass filter needed for the DC feedback loop.

EHT tracking/ overvoltage protection. If something is wrong, the anode high voltage rises,
the heater voltage will rise too. When the rising voltage arrive some limit, the V406
works, the voltage of pin 36 will exceed 3.9V, the TDA9363 will stop working.

RGB signal input.

RGB drive signal output to the CRT board.

12MHz crystal.

Model No: 29WHP3ANZ
Version 1.0

6

2. Memory AT24C08 is an E

Pin1,
Pin2,
Pin4,
Pin7:
Pin3,
Pin8:
Pin5: SDA.
Pin6: SCL.

GND.

+5V-1 supply.

2

PROM of 8k, pins describe as follows:

3. HEF4094B is described as follows:

Pin1: Connected with UOC Pin63.
Pin2: SDA.
Pin3: SCL.

AV control switch output, connected to the HEF4052. Data as follows:

HEF4094B Pin5

HEF4052 Pin9

Pin4,
Pin5:

Pin8: GND.

Tuner bands control output. Data as follows:

HEF4094B Pin11 HEF4094B Pin 12 Band
Pin11,
Pin12:

Pin14: NC.
Pin15: Control port, it is high level in this chassis.
Pin16: +5V supply.

0 0 AV1
1 0 AV2
0 1 AV3
1 1 SVHS

0 0 VHF－L
1 0 VHF－H
0 1 UHF

total 16 pins）

（

HEF4094B Pin4

HEF4052 Pin10

STATE

Model No: 29WHP3ANZ
Version 1.0

7

SIGNAL PROCESS

The main chip is N201 TDA9363, AV control switch HEF4052, sound process chip is TDA9859,
sound driver is N601 TDA7495S.

The TV signal inputs into the tuner (U101) from CABLE or antenna. The pin 11 and pin 12 of the
N502 are combined to select the band. The pin 4 of the N201 outputs the PWM tuning signal. The IF
video signal comes from the IF pin of the tuner. The 38.9MHz IF signal is coupled to the N101 (pre­amplify) and then to SAWF (Z101). After processed in the SAWF, the 38.9MHz signal gets to the pin
23 and pin 24 of TDA9363. The IF circuit in TDA9363 includes such unit as the AGC amplifying
circuit, 38.9MHz oscillator, PLL video demodulator, video amplifier, IF identify circuit and AFT
circuit. The demodulated signal (CVBS) comes from the pin 38 of TDA9363, the sound signal comes
from the pin 44.

The internal CVBS signal needs norm identification then outputs from the pin 38 of TDA9363, via the
trap-wave circuit (composed of the V504, Z501, Z502, Z503, V506 and so on) feeds back to the pin 40
of TDA9363. The RGB signal comes from the pin51, Pin52, Pin53 of TDA9363, and outputs to the
CRT board.

The V901, V902 and V903 are the R
V909 are the auto low bright balance level output circuit, and generate the low bright level current into
the pin 50 of TDA9363.

The internal sound signal comes from the pin 44 of TDA9363, via the coupling capacitor C224
connects to the pin 3 and 5 of TDA9859. The TDA9859 is the audio effect processor, the TDA9495S is
the driver. The TDA9859 includes bass, treble, balance, surround, effect shortcut options.

G B drive transistors. The V904, V905, V906, V907, V908,

、、

Model No: 29WHP3ANZ
Version 1.0