20 MSa/s Digitizer
HP E 1429B
Technical Specifications
0.05 Sa/s to 20 MSa/s sample rate, 12-bit
D
resolution
2 channels of 512 kSa/channel, segmentable
D
memory
Built-in test
D
Local Bus capability
D
Message-/register-based programming supported
D
Description
The HP E1429B digitizer is a C-size, 1-slot, messagebased VXI module. It makes12-bit,20 MSa/s mea-
surements, and contains two analog channels, memory,
timebase, and data paths. The HP E1429B is functionally identical to the HP E1429A, except the E1429B
supports local bus.
Ideally suited for transient signals, the HP E1429B’s
arm/trigger circuits can be programmed to wait for the
transient to occur. Up to128 pre- and post-arm data
sets can be stored in its segmentable memory. If power
is lost, the HP E1429B keeps the data intact in its nonvolatile memory. Both message- and some registerbased programming is supported by the HP E1429B.
SCPI commands are used to program at a high level.
Register-based reads and writes are supported for highspeed data-only access. An on-board voltage reference
is used to verify that the HP E1429B is operational.
Attenuators, amplifiers, A/Ds, memory, timebase, and
digital circuits are tested upon power-up and upon
receipt of the *TST command. The normal path for
retrieving data is the VXI data transfer bus. An alternate
higher-speed data path over the VXI Local Bus is available on the HP E1429B.
Refer to the HP Website directory of addresses (URLs)
for instrument driver availability and downloading instructions.
Analog
Each channel has its own analog electronics, including
signal conditioning and A/D converters. By providing
separate paths, the input gains and impedances can be
matched to the incoming signals.
Programming
Both message- and some register-based programming is
supported by the HP E1429B. SCPI commands are used
to program at a high level. Register-based reads and
writes are supported for high-speed data-only access.
A differential and a single-ended input on each channel
allow a mix of signal types to be connected. The differential inputs offer a high impedance to minimize circuit
loading, while the single-ended inputs can be programmed for 50 or 75 V to match source impedances.
Memory
A segmentable, battery-backed memory is dedicated to
each channel. Up to128 segments can be defined to
allow multiple pre- and post-arm events to be captured.
When using the pre- and post-arm mode, the
HP E1429B loops within a segment until it records the
programmed number of post-arm readings. The
HP E1429B will then move to the next segment and wait
for the next arm. The single ported memory (not FIFO)
can be read after the measurements have taken place.
A replaceable battery preserves readings in memory
when power is lost. The data will still be intact even
when the HP E1429B is removed from the mainframe.
Time Base and Triggering
Both channels sample at the same time. The sample rate
can be driven by internal or external timebase references. These references can be divided to provide variable sample rates up to 20 MSa/s in1-2-5 steps. Dual
sample rates can be used in the pre- and post-arm
mode, wherein the sample rate changes upon receipt of
an arm event.
Arm and trigger signals can be generated internally or
received from a variety of sources on the VXI backplane
and the faceplate BNCs. In addition, the arm and trigger
signals can be sourced by the HP E1429B to synchronize multiple instruments.
Data Paths
The normal path for retrieving data is the VXI data
transfer bus. An alternate higher-speed data path over
the VXI Local Bus is also available on the HP E1429B.
Built-in Self-T est
An extensive self-test uses an on-board voltage reference to verify that the HP E1429B is operational. Attenuators, amplifiers, A/Ds, memory, time-base, and digital
circuits are tested upon power-up and upon receipt of
the *TST command. By running the self-test, you gain a
high degree of confidence that the HP E1429B is operational.
HP E1429B Block Diagram
Specifications
In accordance with IEEE Std. 1057 Trial-Use Standard for
Digitizing Waveform Recorders. This document available from
IEEE.
General
Number of channels: 2
Built-in DSP: No
Alias protection: Oversample
Basic accuracy: 0.5%
Low-Frequency CMRR: 68 dB
Variable bandwidth: External Filters
2 dB Input range
headroom: No
Dual-Ported memory: No
Dual-Rate sampling: Yes
Sampling
Resolution: 12 bits, including sign
Effective bits: 10 bits at 100 kHz; 9.5 bits at 10 MHz
Sample rates: 0.05 to 20 MSa/s
Sample sequence: 1-2-5
Dual sample rate: switches between programmed rates upon
on 1V range, 50
receipt of arm
V input, full scale input)
(typical
The HP E1429B uses VXI Local Bus according to a
protocol common to several VXI products. With this
protocol, data is transferred at very high speeds into
modules such as the HP E1488A Instrument Memory.
Other Local Bus compatible products are the
HP E1430A, HP E1431A, HP E1432A, HP E1485A,and
HP E1488A.
Memory
Memory: 512 kSa/channel, battery-backed
Segmented memory: yes
Input
Input impedance: 50 or 75 V single-ended and 1 MV20 pF
Signal ranges: 50/75 V:0.1Vto1V;1MV:0.1Vto100Vin
Bandwidth: 50MHz@1Vsingle-ended, 5 MHz @ 10 V
Filtering: 10 MHz nominal, 2-pole Bessel, switchable
Signal to noise ratio: −62 dB typical
differential
coupled nominal)
1-2-5 steps
differential, typical
(both inputs on each channel, DC
Time Base
Internal reference: 20 MHz, ±50 ppm, <25 ps rms jitter typical
Reference sources: internal crystal, faceplate BNC, CLK 10, and
Timebase resolution: 50 ns
ECLTRG
Arm and Trigger
Each trigger event chuases one A/D conversion in both channels; each Arm event allows acquisition of a burst of one or
more dual-channel A/D conversions.
Programmable arm
delay: 50 ns to 32 ms using internal 20 MHz reference
Pre-arm capture: yes
Readings per arm: 1, 7 or 16,777,215, or continuous post-arm; 0
Re-arm rate: up to 2 MHz
Arm sources: internal, faceplate BNC, input voltage level,
Trigger: on event
Trigger (sample clock)
sources: internal, VME read, faceplate BNC, TTLTRG,
ECLTRG functions: arm, trigger, and reference
TTLTRG functions: trigger and arm
(derived from reference)
or 3 to 65,535 pre-arm
TTLTRG, and ECLTRG, and logical OR of any
two signals
and ECLTRG
trigger
(non-segmented memory)
(input)
(output)
arm and ready for
(input and output)
Connectors
EXT1 faceplate BNC: arm and trigger (input)arm, trigger and
EXT2 faceplate BNC: trigger and reference
reference (output)
(input)
Backplane Connector Shielding
To ensure compliance with RFI levels specified in standards
EN55001and CISPR11, this product requires the Backplane
Connector Shields installed in an HP VXI C-size mainframe.
Option 918is available with the purchase of a new HP mainframe; accessories, HP P/Ns E1400-80920 and E1421-80920, are
available for retrofitting existing HP mainframes HP E1401A/B
and HP E1421B respectively (one accessory per mainframe
required).
VXI Characteristics
VXI device type: Message-based
Data transfer bus: A24 slave;A16/A24, D8/D16, D32 data read
Size: C
Slots: 1
Connectors: P1/2
Shared memory: n/a
VXI busses: Local Bus A-row (left), Local Bus C-row (right),
C-size compatibility: Yes
only
TTL Trigger Bus, ECL Trigger Bus
Instrument Drivers
See the HP Website(http://www.hp.com/go/inst—drivers) for
driver availability and downloading.
Command module
firmware: n/a
Command module
firmware rev: n/a
I-SCPI Win 3.1: n/a
I-SCPI Series 700: n/a
C-SCPI LynxOS: n/a
C-SCPI Series 700: n/a
HP VEE Drivers: Yes
VXI
plug&play
Framework: Yes
VXI
plug&play
Framework: Yes
VXI
plug&play
Framework: No (not available at time of publication)
Win
Win95/NT
HP-UX
Module Current
I
PM
+5V: 3.1 0.5
+12 V: 0.2 0.04
−12 V: 0.2 0.04
+24 V: 0.1 0.05
−24 V: 0.1 0.05
−5.2 V: 4.1 0.05
−2V: 1.3 0.12
I
DM
Cooling/Slot
Watts/slot: 41.50
DPmmH2O: 0.80
Air Flow liter/s: 3.80
Ordering Information
Description Product No.
20 MSa/s, 12-bit digitizer w/ local bus HP E1429B
3 yr. retn. to HP to 1 yr. OnSite warr. HP E1429B W01
SHIELD, BACKPLANE CONN HP E1400-80920
VXI BACKPLANE CONN SHLD KT HP E1421-80920
Data Subject to Change
Copyright
January 1997
Hewlett Packard Co.
HP Publication No.: 5965-5566E
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