Affordable logic analyzers
designed for your exact needs
Agilent Technologies 1670G
Series benchtop logic analyzers
enable design engineers to purchase a logic analyzer that meets
their exact needs and their budget.
Agilent Technologies 1670G Series
Benchtop Logic Analyzers
Technical Data
The 1670G Series models have the
option of a built-in, 500 MHz, 2
GSa/s oscilloscope that can be
triggered by the logic analyzer.
Some of the toughest hardware
debug problems can be found
only with the digital triggering
capabilities of a logic analyzer
and can be solved only with the
analog resolution of an oscilloscope.
An optional pattern generator in
the 1670G Series allows designers
to substitute stimulus for missing
subsystems during product development.
The 1670G Series helps simplify
the capture and analysis of complex events with optional 256K or
2M deep memory. Deep memory
is a valuable logic analyzer feature for debugging embedded
microprocessor systems.
Figure 1. Agilent’s 1670G Series Benchtop Logic Analyzers Offer Deep Memory and Integrated
Oscilloscope or Pattern Generator Options.
Agilent Model Number 1670G 1671G 1672G 1673G
Channel count 136 102 68 34
Timing analysis speed 250/500 MHz (full/half channels)
State analysis speed 150 MHz
State clock/qualifiers 4 2
Memory depth/channel
with option 1
with option 2
Option 3
(oscilloscope) sample oscilloscope
Option 4 32-channel, 100/200 MHz, 256K
(pattern generator) vector pattern generator
Built-in display color
LAN port Thin LAN & Ethertwist
[1]
Choose memory option 1 or 2.
[2]
Choose either the scope or the pattern generator (compatible with option 1 or 2).
[3]
Time or state tags halve the acquisition memory when there are no unassigned pods.
[1], [3]
[3]
[2]
The units include a VGA resolution color flat panel display to
help you find information
quickly. The user interface helps
to locate the source of designproblems in less time. You have
[3]
64/128K (full/half channels)
256/512K
2/4M
2-channel, 500 MHz, 2 GSa/s, 32K
the front panel to easily navigate
through the user interface; a PC
style keyboard is also supported.
A compact all-in-one design helps
save space on a crowded lab
bench.
the option of using a mouse or
Agilent Technologies 1670G Series Specifications
Features Benefits
State/timing analyzer Select the number of channels to match your application
(34, 68, 102, 136).
Optional deep memory 256K or 2M of memory allows capture and analysis of much
longer periods of execution. Helps solve poorly understood
or difficult to reproduce problems.
Optional oscilloscope An integrated oscilloscope can be triggered from the
analyzer (and vice versa) and provides the ability to view
analog and digital signals simultaneously.
Optional pattern An integrated pattern generator provides stimulus for
generator missing components, so that testing can begin before the
system is complete.
Trigger functions Trigger functions are depicted graphically and textually, and
may be combined to create custom trigger sequences for
capturing a complex series of events.
Global markers Track a symptom in one domain (e.g. timing) to its cause in
another domain (e.g. analog).
Documentation capability Save screen shots in standard TIFF, PCX, and EPS formats on
disk. Print screen shots and trace listings to a local
printer. Save acquired data in ASCII format for post
processing.
Processor and bus Quickly and reliably connect to a wide variety of specific
support processors and buses. Inverse assemblers allow data to be
viewed at the assembly level.
LAN Ethertwist and ThinLAN connectors support FTP, PC/NFS
protocols, and work with X11 windows packages. Users can
program the analyzer, archive data, and setup files via telnet
sockets.
Probing A wide variety of IC clips, QFP adapters, QFP probes, and
headers are available to help connect the analyzer to the
system under test.
Figure 2. Logic Analyzer Dimensions and Weight
14.5 in.
367 mm
13.0 in.
330 mm
8.1 in.
205 mm
17.3 in.
440 mm
Weight = 28.6 lbs.
13 kg
Quick memu keys
Select key
Display
Movement keys
Done key
Power on/off
data entry keys Disk drive
Oscilloscope channel
Shift key
Figure 3. Diagram of Logic Analyzer’s Front and Rear Panels
Keyboard
RS-232C Connector
GPIB Connector
Mouse
Pods
Parallel printer
connector
LAN
Connectors
External
trigger BNCs
Line power
module
2
Agilent Technologies 1670G Series Annotated Screen Shots
Run—starts data acquisition in
specified trace mode.
Stop—halts acquisition and displays current data.
Acquisition mode and number of
channels (assign pods) are specified. Timing and State measurements can be taken
simultaneously.
Activity indicators allow users to
monitor device-under-test activity
during analyzer setup.
Figure 4. Configuration Screen
Figure 5. Format Screen
User mnemonics defined (for bit
patterns or ranges), or up to 1000
symbols extracted from popular
object module formats. In symbol
mode, symbols will be dis-played
in place of data.
Logic threshold levels.
State speed can be specified
when analyzer is in state mode.
Full channel (250 MHz) or half
channel (500 MHz) can be specified in timing mode. (Screen shot
is in state mode.)
Activity indicators.
Appropriate channels assigned to
a label.
Channels can be grouped and
given a 6-character label.
Maximum of 126 labels with up to
32 channels each.
3
Analyzer and oscilloscope or pattern generator can cross-arm
each other. Arming is started by
Run, Group Run, or the PortIn
BNC (rising edge). PortOut is
asserted as a rising edge at the
PortOut BNC.
Twenty-three trigger functions
(shown graphically and textually)
can be combined to create custom
trigger sequences.
Figure 6. Trigger Screen
Figure 7. Graphical Trigger Function
Up to twelve sequence levels with
branching and timers can be
defined.
Ten pattern recognizers (and bit
patterns in each label) can be
defined.
Edge terms make it easy to trigger
on rising or falling edges on any
number of specified signals. They
can also be used to trigger on
glitches to 3.5 ns.
Knob (or hold down right mouse
button) scrolls through listing display.
Figure 8. Listing Display
4
Markers measure the time
between events, search for specific events, and gather statistical
data.
Trigger is located at line 0.
Figure 9. Waveform Display
Accumulate—waveform is not
erased between successive
acquisitions (persistence).
All displays are time-correlated,
so the trigger, x, and o markers
are located at equivalent positions in time on each display.
Overlay—multiple channels displayed on one line, with value in
selected base if space permits.
Maximum of 24 lines per screen;
may scroll through up to 96 lines.
Chart mode plots the value of a
specified label (on y-axis) versus
a state number or another label
(on x-axis). Both axes can be
scaled. Useful for A/D converters
and obtaining a visual overview
of bus activity (address flow or
data flow).
Figure 10. Chart Display (State Mode Only)
Figure 11. System Performance Analyzer (SPA)
There are three SPA modes available: State Overview (shown here
provides a visual indication of
memory use), State Histogram (%
time spent in each function), and
Time Interval (execution time of a
particular function).
5
Figure 12. Compare Screen
(State Mode Only)
Compare performs a post-processing, bit-by-bit comparison of
acquired state data and compare
image data. Copy state acquisition into compare image buffer
(may edit any bit in compare
image). The compare feature
halves the memory depth (1/4
memory with Opt. 002)
Stop Measurement halts repetitive acquisitions when current
and compare acquisitions are
equal or not equal.
Compare Partial allows masking
of a compare image in order to
compare only certain bits or set
ranges of states (rows). (It compares data that falls within
enabled channels and specified
range.)
Difference Listing highlights differences between the current
state listing and compare image.
(Reference listing shows compare image and bit masks.)
Figure 13. Oscilloscope Display (Option 003)
Figure 14. Pattern Generator Sequence Window (Option 004)
Several different views of the
oscilloscope display are available,
each offering different control
options. The Scope Channel display is shown here.
The pattern generator allows the
user to create data streams from
provided macros or from various
external sources and use them to
stimulate a target. Since the pattern generator is internal to the
logic analyzer, the target response
can be measured with the logic
analyzer to identify incorrect output and potential target system
malfunction.
6
Agilent Technologies 1670G Series
Specifications and Characteristics
Probes (general-purpose lead set)
Input resistance 100 kΩ ±2%
Parasitic tip capacitance 1.5 pF
Minimum voltage swing 500 mV, peak-to-peak
Threshold accuracy* ±(100 mV + 3% of threshold setting)
Maximum input voltage ±40 V peak
State Analysis
Minimum state clock pulse width 3.5 ns
Time tag resolution
Maximum time count
between states 34.4 seconds
Maximum state tag
count between states
Minimum master-to-master
clock time* 6.67 ns
Minimum master-to-slave
clock time 0.0 ns
Minimum slave-to-master
clock time 4.0 ns
Clock qualifier
setup/hold 4.0/0 ns fixed
[3]
[3]
8 ns or ± 0.1% (whichever is greater)
4.29 x 109states
Timing Analysis
Sample period accuracy 0.01% of sample period
Channel-to-channel skew 2 ns typical (not > 3 ns)
Time interval accuracy ± (sample period accuracy + channel-to-channel
Minimum detectable glitch 3.5 ns
skew + 0.01% of time interval reading)
370 ohms
1.5pF 7.4pF
GROUND
Figure 15. Equivalent Probe Load for the
01650-61608 General-Purpose Lead Set.
100 K
ohm
Triggering
Sequencer speed >150 MHz
Maximum occurrence counter 1,048,575
Range width 32 bits each
Timer value range 400 ns to 500 seconds
Timer resolution 16 ns or 0.1% (whichever is greater)
Timer accuracy ±32 ns or ±0.1% (whichever is greater)
Operating Environment
Temperature Instrument: 0°C to 55° C (+32°F to 131°F)
Humidity Instrument: up to 95% relative humidity at +40° C
Altitude 4,572 m (15,000 ft)
[3]
Time or state tags halve the acquisition memory when there are no unassigned pods.
* Warranted Specifications
Disk media: 10°C to 40°C (+50°F to 104°F)
Probe lead sets and cables:
0°C to 65°C (+32°F to 149°F)
Disk media and hard drive: 8% to 85% relative
humidity
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