AGERE 2417H4A, 2417G4A Datasheet

Data Sheet, Rev. 1

August 2001

NetLight

®

2417G4A and 2417H4A

ATM/SONET/SDH Transceivers

Available in a smal l form-factor, RJ-45 size, plastic package,
the 2417G4A and 2417H4A are high-performan ce, cost-effec­tive transceivers for ATM/SONET/SDH applications at
155 Mbits/s and 622 Mbits/s.

Features

ATM/SONET/SDH Compliant (ITU-T G.957 Speci-

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fications):
— IR-1/S1.1, S4.1

Small form-factor, RJ-45 size, multisourced 10-pin

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package
Requires single 3.3 V power supply

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LC duplex receptacle

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Uncooled 1300 nm laser transmitter with automatic

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output power control
Transmitter disable input

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Signal-detect output

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Low power dissipation

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Raised ECL (LVPECL) logic data interfaces

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Operating case temperature range: –40 °C to

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85 °C
Agere Systems Inc. Reliability and Qualification

■

Program for built-in quality and reliability

Description

The 2417G4A and 2417H4A transceivers are high­speed, cost-effective optical transceivers that are
compliant with the International Telecommunication
Union Telecommunication (ITU-T) G.957 specifica­tions for use in ATM, SONET, and SDH applications.
The 2417G4A operates at the OC-3/STM-1 rate of
155 Mbits/s, and the 2417H4A operates at the OC­12/STM-4 rate of 622 Mbits/s. The transceivers fea­ture Agere Systems high-reliability optics and are
packaged in a narrow-width plastic housing with an
LC duplex receptacle. This receptacle fits into an
RJ-45 form-factor outline. The 10-pin package and
pinout conform to a multisource transceiver agree­ment.

The transmitter features differential LVPECL logic
level data inputs and an LVTTL logic level disable
input. The receiver f eatu res differential LVPECL logic
level data and an LVPECL logic level signal-detect
output for the 2417G4A, and a LVTTL logic level sig­nal-detect output for the 2417H4A.

Wide dynamic range receiver with InGaAs PIN

■

photodetector

NetLight

2417G4A and 2417H4A Data Sheet, Rev. 1

ATM/SONET/SDH Transceivers August 2001

Absolute Maximum Rat ings

Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso­lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.

Parameter Symbol Min Max Unit

Supply Voltage V
Operating Case Temperature Range T
Storage Case Temperature Range T

CC

C

stg

03.6V
–40 85 °C
–40 85 °C

Lead Soldering Temperature/Time — — 250/10 °C/s
Operating Wavelength Range λ 1.1 1.6 µm

Pin Information

TX

RX

Figure 1. 2417G4A and 2714H4A Transceivers, 10-Pin Configuration, Top View

Table 1. Transceiver Pin Descriptions

Pin

Number

MS MS

Symbol Name/Description Logic Family

Mounting Studs.

mechanical attachment to the circuit board. The y ma y also pro vide an
optional connection of the transceiver to the equipment chassis

ground.
1V
2V

EER
CCR

3SD

Receiver Signal Ground.

Receiver Power Supply.

Signal Detect.

Normal operation: logic one output.

Fault condition: logic zero output.

4RD–
5RD+

6V
7V
8T

CCT
EET

DIS

9TD+

10 TD–

Received

DATA

Received DATA Out.

Transmitter Power Supply.

Transmitter Signal Ground.

Transmitter Disable.

Transmitter DATA In

Transmitter

109876

10-PIN MODULE - TOP VIEW

12345

Receiver

The mounting studs are provided for transceiver

Out.

Transmitter

. LVPECL

In

DATA

. LVPECL

1-967.a

NA

NA
NA

LVTTL

(2417H4A);

LVPECL

(2417G4A)

LVPECL
LVPECL

NA
NA

LVTTL

2 Agere Systems Inc.

Data Sheet, Rev. 1

NetLight

2417G4A and 2417H4A

August 2001 ATM/SONET/SDH Transceivers

Electrostatic Discharge

Caution: This device is susceptible to damage as

a result of electrostatic discharge (ESD).
Take proper precautions during both
handling and testing. Follow

EIA

dard

Although protection circuitry is designed into the
device, take proper precautions to avoid exposure to
ESD.

Agere Systems employs a human-body model (HBM)
for ESD susceptibility testing and protection-design
evaluation. ESD voltage thresholds are dependent on
the critical parameters used to define the model. A
standard HBM (resistance = 1.5 kΩ, capacitance =
100 pF) is widely used and, therefore, can be used for
comparison purposes. The HBM ESD threshold estab­lished for the 2417G4A and 2417H4A transceivers is
±1500 V.

-625.

EIA

®

Stan-

Application Information

The 2417 receiver section is a highly sensitive fiber­optic receiver. Although the data outputs are digital
logic levels (LVPECL), the device should be thought of
as an analog component. When laying out system
application boards, the 2417 tr ansceiv er should receiv e
the same type of consideration one would give to a
sensitive analog component.

Printed-Wiring Board Layout Consider­ations

A fiber-optic receiver employs a very high gain, wide
bandwidth transimpedance amplifier. This amplifier
detects and amplifies signals that are only tens of nA in
amplitude when the receiver is operating near its sensi ­tivity limit. Any unwanted signal currents that couple
into the receiver circuitry cause a decrease in the
receiver's sensitivity and can also degrade the perfor­mance of the receiver's signal detect (SD) circuit. To
minimize the coupling of unwanted noise into the
receiver, careful attention must be given to the printed­wiring board layout.

At a minimum, a double-sided printed-wiring board
(PWB) with a large component-side ground plane
beneath the transceiver must be used. In applications
that include many other high-speed devices, a multi­layer PWB is highly recommended. This permits the
placement of power and ground on separate layers,
which allows them to be isolated from the signal lines.

Multilayer construction also permits the routing of sen­sitive signal traces away from high-level, high-speed
signal lines. To minimize the possibility of coupling
noise into the receiver section, high-level, high-speed
signals such as transmitter inputs and clock lines
should be routed as far away as possible from the
receiver pins.

Noise that couples into the receiver through the power
supply pins can also degrade performance. It is
recommended that the pi filter, shown in Figure 2, be
used for both the transmitter and receiver power
supplies.

Data and Signal Detect Outputs

The data and signal detect outputs of the 2417 trans­ceiver are driven by open-emitter NPN transistors,
which have an outpu t impedance of appr o xima tely 7 Ω.
Each output can provide approximately 50 mA maxi­mum current to a 50 Ω load terminated to V

Due to the high switching speeds of ECL outputs,
transmission line design must be used to interconnect
components. To ensure optimum signal fidelity, both
data outputs (RD+/RD–) should be terminated identi­cally. The signal lines connecting the data outputs to
the next device should be equal in length and have
matched impedances. Controlled impedance stripline
or microstrip construction must be used to preserve the
quality of the signal into the next component and to
minimize reflections bac k int o the receiver, which could
degrade its performance. Excessive ringing due to
reflections caused by improperly terminated signal
lines makes it difficult for the component receiving
these signals to decipher the proper logic levels and
can cause transitions to occur where none were
intended. Also, by minimizing high-frequency ringing,
possible EMI problems can be avoided.

The signal-detect output is positive ECL (LVPECL)
logic for the 2417G4A and TTL for the 2417H4A. A
logic low at this output indicates that the optical signal
into the receiver has been interrupted or that the light
level has fallen below the minimum signal detect
threshold. This output should not be used as an error
rate indicator, since its switching threshold is deter­mined only by the magnitude of the incoming optical
signal.

– 2.0 V.

CC

Agere Systems Inc. 3