Aeroflex UTMC UT54ACTS190, UT54ACS190 Datasheet
125 RadHard MSI Logic
UT54ACS190/UT54ACTS190
Radiation-Hardened
Synchronous 4-Bit Up-Down BCD Counters
FEATURES
Single down/up count control line
Look-ahead circuitry enhances speed of cascaded counters
Fully synchronous in count modes
Asynchronously presettable with load control
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 16-pin DIP
- 16-lead flatpack
DESCRIPTION
The UT54ACS190 and the UT54ACTS190 are synchronous 4bit reversible up-down BCD decade counters. Synchronous
counting operation is provided by having all flip-flops clocked
simultaneously so that the outputs change coincident with each
other when so instructed. Synchronous operation eliminates the
output counting spikes associated with asynchronous counters.
The outputs of the four flip-flops are triggered on a low-to-highlevel transition of the clock input if the enable input (CTEN) is
low. A logic one applied to CTEN inhibits counting. The direction of the count is determined by the level of the down/up
(D/U) input. When D/U is low, the counter counts up and when
D/U is high, it counts down.
The counters feature a fully independent clock circuit. Changes
at control inputs (CTEN and D/U) that will modify the operating
mode have no effect on the contents of the counter until clocking
occurs.
The counters are fully programmable. The outputs may be preset to either logic level by placing a low on the load input and
entering the desired data at the data inputs. The output will
change to agree with the data inputs independently of the level
of the clock input. The asynchronous load allows counters to
be used as modulo-N dividers by simply modifying the count
length with the preset inputs.
If preset to an illegal state, the counter returns to a normal sequence in one or two counts.
PINOUTS
16-Pin DIP
Top View
16-Lead Flatpack
Top View
Two outputs have been made available to perform the cascading
function: ripple clock and maximum/minimum (MAX/MIN)
count. The MAX/MIN output produces a high-level output
pulse with a duration approximately equal to one complete cycle
of the clock while the count is zero (all outputs low) counting
down or maximum (9) counting up.
The ripple clock output (RCO) produces a low-level output
pulse under those same conditions but only while the clock input
is low. The counters easily cascade by feeding the RCO to the
enable input of the succeeding counter if parallel clocking is
used, or to the clock input if parallel enabling is used. Use the
MAX/MIN count output to accomplish look-ahead for highspeed operation.
The devices are characterized over full military temperature
range of -55 C to +125 C.
1
2
3
4
5
7
6
16
15
14
13
12
10
11
B
Q
B
Q
A
CTEN
D/U
Q
C
Q
D
V
DD
A
CLK
RCO
MAX/MIN
C
8 9V
SS
D
LOAD
1
2
3
4
5
7
6
16
15
14
13
12
10
11
V
DD
8 9
B
Q
B
Q
A
CTEN
D/U
Q
C
Q
D
A
CLK
RCO
MAX/MIN
LOAD
C
V
SS
D
RadHard MSI Logic 126
UT54ACS190/UT54ACTS190
FUNCTION TABLE LOGIC SYMBOL
LOGIC DIAGRAM
Function LOAD CTEN D/U CLK
Count up H L L
Count down H L H
Asynchronous L X X
No change H X
(4)
CTEN
D/U
G
CTRDIV 10
CLK
(15)
(1)
B
C
(9)
(12)
MAX/MIN
Q
A
Q
D
(6)
Q
(2)
Q
5D
(1)
(4)
(8)
M2 (DOWN)
G4
(11)
LOAD
(13)
RCO
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and IEC
Publication 617-12.
7
(14)
(5)
(15)
(4)
(1)
(10)
(13)
(12)
(3)
(2)
(6)
(7)
RCO
Q
A
Q
B
Q
C
Q
D
(9)
(11)
LOAD
CTEN
CLK
D/U
MAX/MIN
A
B
C
D
R
S
J Q
C
K
Q
R
J Q
C
K
Q
S
R
S
J Q
C
K
Q
R
S
J Q
C
K
Q
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