Aeroflex UTMC UT54ACTS374, UT54ACS374 Datasheet
UT54ACS374/UT54ACTS374
Radiation-Hardened
Octal D-Type Flip-Flops with Three-State Outputs
FEATURES
8 latches in a single package
Three-state bus-driving true outputs
Full parallel access for loading
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
DESCRIPTION
The UT54ACS374 and the UT54ACTS374 are non-inverting
octal D type flip-flops with three-state outputs designed for driving highly capacitive or relatively low-impedance loads. The
device is suitable for buffer registers, I/O ports, and bidirectional
bus drivers.
The eight flip-flops are edge triggered D-type flip-flops. On the
positive transition of the clock the Q outputs will follow the data
(D) inputs.
An output-control input (OC) places the eight outputs in either
a normal logic state (high or low logic level) or a high-impedance state. The high-impedance third state and increased drive
provide the capability to drive the bus line in a bus-organized
system without the need for interface or pull-up components.
The output control OC does not affect the internal operations of
the flip-flops. Old data can be retained or new data can be
entered while the outputs are off.
The devices are characterized over full military temperature
range of -55 C to +125 C.
FUNCTION TABLE
INPUTS OUTPUT
OC CLK nD nQ
L H H
L L L
L L X nQ
H X X
0
Z
PINOUTS 20-Pin DIP
Top View
1
OC
1Q
1D
2D
2Q
3Q
3D
SS
20
V
2
19
8Q
3
18
8D
4
17
7D
5
16
7Q
6
15
6Q
7
14
6D
8 134D 5D
9 124Q 5Q
10 11V
CLK
DD
20-Lead Flatpack
Top View
1
OC
1Q
1D
2D
2Q
3Q
3D
SS
20
2
19
3
18
4
17
5
16
6
15
7
14
8 134D 5D
9 124Q 5Q
10 11V
V
8Q
8D
7D
7Q
6Q
6D
CLK
DD
LOGIC SYMBOL
(1)
OC EN
(11)
CLK C1
(3)
1D
(4)
2D
(7)
3D
(8)
4D
(13)
5D
(14)
6D
(17)
7D
(18)
8D
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1D
(2)
(5)
(6)
(9)
(12)
(15)
(16)
(19)
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
223 RadHard MSI Logic
LOGIC DIAGRAM
UT54ACS374/UT54ACTS374
C
D
CD
Q
CD
QQ
RADIATION HARDNESS SPECIFICATIONS
PARAMETER LIMIT UNITS
Total Dose 1.0E6 rads(Si)
SEU Threshold
2
SEL Threshold 120
Neutron Fluence 1.0E14
1D2D3D4D5D6D7D8D
(13)(14)(17)(18)
CDCD
Q
1
CD
(4)(7)(8)
(3)
D CCD
QQQQ
1Q2Q3Q4Q5Q6Q7Q8Q
80
OC
CLK
(11)
(1)
(2)(5)(6)(9)(12)(15)(16)(19)
MeV-cm2/mg
MeV-cm2/mg
2
n/cm
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATING
SYMBOL PARAMETER LIMIT UNITS
V
DD
V
I/O
T
STG
T
J
T
LS
JC
I
I
P
D
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Maximum junction temperature +175 C
Lead temperature (soldering 5 seconds) +300 C
Thermal resistance junction to case 20 C/W
Supply voltage -0.3 to 7.0 V
Voltage any pin -.3 to VDD +.3 V
Storage Temperature range -65 to +150 C
DC input current 10 mA
Maximum power dissipation 1 W
RadHard MSI Logic 224
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