Aeroflex UTMC UT54ACS245S Datasheet
171 RadHard MSI Logic
UT54ACS245S
Radiation-Hardened
Schmitt Octal Bus Transceiver with Three-State Outputs
FEATURES
Three-state outputs drive bus line directly
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
DESCRIPTION
The UT54ACS245S is a non-inverting octal bus transceiver
with Schmitt Trigger input levels. The circuit is designed for
asynchronous two-way communication between data buses.
The control function implementation minimizes external timing
requirements.
The device allows data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic level
at the direction control (DIR) input. The enable input (G) disables the device so that the buses are effectively isolated.
The device is characterized over full military temperature range
of -55 C to +125 C.
FUNCTION TABLE
PINOUTS
20-Pin DIP
Top View
20-Lead Flatpack
Top View
LOGIC SYMBOL
ENABLEGDIRECTION
CONTROL DIR OPERATION
L L B Data To A Bus
L H A Data To B Bus
H X Isolation
1
2
3
4
5
7
6
20
19
18
17
16
14
15
DIR
A1
A2
A3
A4
A5
A6
V
DD
G
B1
B2
B3
B5
8
13
A7
B6
B4
9
12
A8 B7
10
11
V
SS
B8
1
2
3
4
5
7
6
20
19
18
17
16
14
15
DIR
A1
A2
A3
A4
A5
A6
V
DD
G
B1
B2
B3
B5
8
13
A7
B6
B4
9
12
A8
B7
10
11
V
SS
B8
(19)
G G3
(2)
A1
(3)
A2
(4)
(18)
B1
(16)
(17)
B2
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
A3
(5)
A4
(6)
A5
(7)
A6
B3
(13)
B6
(14)
B5
(15)
B4
(8)
A7
(9)
A8
(11)
B8
(12)
B7
(1)
DIR 3 EN1 (BA)
3 EN2 (AB)
1
2
RadHard MSI Logic 172
UT54ACS245S
LOGIC DIAGRAM
A1
A2
A3
A4
A5
A6
A7
A8
DIR
(1)
(2)
(19)
(18)
(3)
(17)
(4)
(16)
(5)
(15)
(6)
(14)
(7)
(13)
(8)
(12)
(9)
(11)
B1
B2
B3
B6
B5
B4
B8
B7
G
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