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MT70014
TWO CHANNEL ARINC TRANSMITTER
• 8 bit parallel interface
• TTL/CMOS compatible I/P
• Single 5V supply with low power
consumption < 50mW
• Full MIL operating range
• Automatic parity generation
• HIGH/LOW speed programmable
independently in each channel
VLSI COMPONENTS FOR ARINC 429 DATA TRANSMISSION SYSTEMS
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MT70014
MAXIMUM RATINGS (Above which the useful life may be impaired)
Storage Temperature - 65ºC to +150ºC
Temperature (Ambient) under Bias - 55ºC to +125ºC
Supply Voltage VDD -0.3V to + 7V
DC Input Voltage -0.3 to VDD +0.3V
Output Current (Single O/P) 10mA
Output Current (Total O/P) 20mA
ELECTRICAL CHARACTERISTICS over operating range
PARAMETER DESCRIPTION TEST CONDITIONS MIN TYP MAX UNITS
IOH Output High Current VOH=2.8V VDD= 4.5V 1.0
IOL Output Low Current VOL=0.4V 3.2
VIH Input High Voltage 2.4 VCC
VIL Input Low Voltage -0.3 0.8
IIL Input Load Current VSS 0.45
IOZ Output Leakage Current
CI Input Capacitance
CI/O I/O Capacitance 7 9
ICC Supply Current
0.4V<VO<VCC Output Disabled
Test Frequency = 1.0 MHZ
VCC = MAX. All inputs
HIGH, All outputs open.
-40 40
2 2.6
1.5
mA
mA
Volts
Volts
mA
uA
pF
pF
mA
VLSI COMPONENTS FOR ARINC 429 DATA TRANSMISSION SYSTEMS
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3. SWITCHING CHARACTERISTICS (For CL = 50pF & RL = 3K ohms)
PARAMETER Min Max Units
MT70014
f
t
t
t
t
t
t
t
t
t
CLK
P
RES
RTC
RD
WL
GL
SU
H
LTC
Clock Frequency - 5 MHz
( Serial data bit period for HNL input high 50/f uS
(
( Serial data bit period for HNL input low 380/f uS
(
( (f = f
CLK
/MHz)
NRSET pulse width 200nS -
Propagation delay, NRESET falling edge to TXC high - 200nS
Propagation delay, NRESET falling edge to data outputs low - 200nS
NLD pulse width 200nS -
Gap between NLD pulses 400nS -
Data set up time 100nS -
Data hold time 100nS -
Propagation delay, NLD rising edge following last - 400nS
byte load to TXZ low
t
t
t
t
t
t
R
F
WTE
TED
DTC
M
Output rise time - 50nS
Output fall time - 50nS
NOT Transmit enable pulse width 100nS -
Propagation delay NOT transmit enable falling )
edge or ) tp 2tp
NOT Transmission complete falling edge to )
data output )
Last data bit of message to TXC high - 200nS
Time of data pulse output (mark time) tp + 1%
2
VLSI COMPONENTS FOR ARINC 429 DATA TRANSMISSION SYSTEMS
3