Advanced Linear Devices Inc ALD1117SA, ALD1117PB, ALD1117PA, ALD1117DB, ALD1117DA Datasheet
D
P1
(1)
D
P2
(14)
G
P1
(2)
S
P1
(3) S
P2
(12)
V+ (11)
G
P2
(13)
D
P3
(10)
D
P4
(5)
G
P3
(9)
S
P3
(8) S
P4
(7)
~
V- (4)
V+ (11)
G
P4
(6)
ALD1107
BLOCK DIAGRAM
GENERAL DESCRIPTION
The ALD1107/ALD1117 are monolithic quad/dual P-channel enhancement mode matched MOSFET transistor arrays intended for a broad range
of precision analog applications. The ALD1107/ALD1117 offer high input
impedance and negative current temperature coefficient. The transistor
pairs are matched for minimum offset voltage and differential thermal
response, and they are designed for precision analog switching and
amplifying applications in +2V to +12V systems where low input bias
current, low input capacitance and fast switching speed are desired. These
MOSFET devices feature very large (almost infinite) current gain in a low
frequency, or near DC operating environment. The ALD1107/ALD1117 are
builiding blocks for differential amplifier input stages, transmission gates,
multiplexer applications, current sources, current mirrors and other precision analog circuits.
APPLICATIONS
• Precision current sources
• Precision current mirrors
• Voltage Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Precision analog signal processing
ADVANCED
LINEAR
DEVICES, INC.
QUAD/DUAL P-CHANNEL MATCHED MOSFET ARRAY
ALD1107/ALD1117
FEATURES
• Low threshold voltage of -0.7
• Low input capacitance
• Low V
OS 2mV typical
• High input impedance -- 10
14
Ω typical
• Low input and output leakage currents
• Negative current (I
DS
) temperature coefficient
• Enhancement-mode (normally off)
• DC current gain 10
9
• Low input and output leakage currents
Operating Temperature Range*
-55°C to +125°C0°C to +70°C0°C to +70°C
8-Pin CERDIP 8-Pin Plastic Dip 8-Pin SOIC
Package Package Package
ALD1117 DA ALD1117PA ALD1117 SA
14-Pin CERDIP 14-Pin Plastic Dip 14-Pin SOIC
Package Package Package
ALD1107 DB ALD1107 PB ALD1107 SB
ORDERING INFORMATION
* Contact factory for industrial temperature range.
PIN CONFIGURATION
BLOCK DIAGRAM
D
P2
G
P2
S
P2
G
P3
S
P3
G
P1
S
P1
D
P4
G
P4
1
2
3
4
DB, PB, SB PACKAGE
5
6
7
8
9
10
11
12
13
14
D
P1
V
+
V
-
D
P3
S
P4
1
ALD1107
D
P1
(1)
D
P2
(8)
~
G
P1
(2)
S
P1
(3) S
P2
(6)
V - (4)
V+ (5)
G
P2
(7)
ALD1117
D
P2
G
P2
S
P2
G
P1
S
P1
1
2
3
4
DA, PA, SA PACKAGE
5
6
7
8
D
P1
V
+
V
-
1
ALD1117
© 1998 Advanced Linear Devices, Inc. 415 T asman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www .aldinc.com
ALD1107/ALD1117 Advanced Linear Devices 2
Gate Threshold V
T
-0.4 -0.7 -1.0 -0.4 -0.7 -1.0 V IDS = -1.0µA VGS = V
DS
Voltage
Offset Voltage V
OS
2 10 2 10 mV IDS = -10µA VGS = V
DS
V
GS1-VGS2
Gate Threshold
Temperature TC
VT
-1.3 -1.3 mV/°C
Drift
2
On Drain I
DS (ON)
-1.3 -2 -1.3 -2 mA VGS = V
DS
= -5V
Current
Transconductance G
IS
0.25 0.67 0.25 0.67 mmho VDS = -5V I
DS
= -10mA
Mismatch ∆G
fs
0.5 0.5 %
Output G
OS
40 40 µmho VDS = -5V I
DS
= -10mA
Conductance
Drain Source R
DS (ON)
1200 1800 1200 1800 Ω VDS = -0.1V V
GS
= -5V
On Resistance
Drain Source
On Resistance ∆R
DS (ON)
0.5 0.5 % VDS = -0.1V V
GS
= -5V
Mismatch
Drain Source
Breakdown BV
DSS
-12 -12 V IDS = -1.0µA V
GS
= 0V
Voltage
Off Drain I
DS (OFF)
10 400 10 400 pA VDS = -12V V
GS
= 0V
Current
1
44nAT
A
= 125°C
Gate Leakage I
GSS
0.1 10 0.1 10 pA VDS = 0V V
GS
= -12V
Current 1 1 nA T
A
= 125°C
Input C
ISS
13 13pF
Capacitance
2
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25°C unless otherwise specified
ALD1107 ALD1117 Test
Parameter Symbol Min Typ Max Min Typ Max Unit Conditions
Notes:
1
Consists of junction leakage currents
2
Sample tested parameters
ABSOLUTE MAXIMUM RATINGS
Drain-source voltage, V
DS
-13.2V
Gate-source voltage, V
GS
-13.2V
Power dissipation 500 mW
Operating temperature range PA, SA, PB, SB package 0°C to +70°C
DA, DB package -55°C to +125°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
Loading...