ADLINK Express-BE User Manual

Express-BE

User’s Manual

Manual Revision: 1.00
Revision Date:
Part Number: 50-1J060-1000

May 7, 2015

Revision History

Revision Description Date By

1.00 Initial release 2015-05-07 JC

Page 2 Express-BE

Preface

Copyright 2015 ADLINK Technology, Inc.

This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by
any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.

Disclaimer
The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not

represent a commitment on the part of the manufacturer. In no event will the manufacturer be liable for direct, indirect, special, incidental, or
consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such
damages.

Environmental Responsibility

ADLINK is committed to fulfill its social responsibility to global environmental preservation through compliance with the European Union's
Restriction of Hazardous Substances (RoHS) directive and Waste Electrical and Electronic Equipment (WEEE) directive. Environmental
protection is a top priority for ADLINK. We have enforced measures to ensure that our products, manufacturing processes, components, and
raw materials have as little impact on the environment as possible. When products are at their end of life, our customers are encouraged to
dispose of them in accordance with the product disposal and/or recovery programs prescribed by their nation or company.

Trademarks

Product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their
respective companies.

Express-BE Page 3

Table of Contents

Revision History ............................................................................................................ 2

Preface............................................................................................................................ 3

1. Introduction......................................................................................................... 8

2. Specifications....................................................................................................... 9

2.1. Core System..............................................................................................................................9

2.2. Expansion Busses......................................................................................................................9

2.3. SEMA Board Controller.............................................................................................................9

2.4. Debug Headers .........................................................................................................................9

2.5. Video...................................................................................................................................... 10

2.6. Audio...................................................................................................................................... 10

2.7. LAN ........................................................................................................................................ 10

2.8. Multi I/O and Storage............................................................................................................ 10

2.9. TPM (Trusted Platform Module) ........................................................................................... 10

2.10. Power Specifications ............................................................................................................. 11

2.11. Power Consumption.............................................................................................................. 11

2.12. Operating Temperatures ....................................................................................................... 11

2.13. Environmental ....................................................................................................................... 11

2.14. Specification Compliance ...................................................................................................... 11

2.15. Operating Systems................................................................................................................. 11

2.16. Functional Diagram................................................................................................................ 12

2.17. Mechanical Dimensions......................................................................................................... 13

3. Pinouts and Signal Descriptions......................................................................

3.1. AB/CD Pin Definitions............................................................................................................ 14

3.2. Signal Description Terminology............................................................................................. 17

14

3.3. AB Signal Descriptions ........................................................................................................... 18

3.3.1. Audio Signals ...............................................................................................................................18

3.3.2. Analog VGA (No VGA support)....................................................................................................18

3.3.3. LVDS ............................................................................................................................................18

3.3.4. Gigabit Ethernet ..........................................................................................................................19

3.3.5. SATA ............................................................................................................................................19

3.3.6. PCI Express ..................................................................................................................................20

3.3.7. Express Card................................................................................................................................21

3.3.8. LPC Bus ........................................................................................................................................21

3.3.9. USB ..............................................................................................................................................21

Page 4 Express-BE

3.3.10. USB Root Segmentation ..............................................................................................................22

3.3.11. SPI (BIOS only).............................................................................................................................22

3.3.12. Miscellaneous..............................................................................................................................23

3.3.13. SMBus..........................................................................................................................................23

3.3.14. I2C Bus.........................................................................................................................................23

3.3.15. General Purpose I/O (GPIO) ........................................................................................................23

3.3.16. Serial Interface Signals ................................................................................................................24

3.3.17. Power and System Management ................................................................................................24

3.3.18. Power and Ground ......................................................................................................................25

3.4. CD Signal Descriptions ........................................................................................................... 26

3.4.1. USB 3.0 Extension .......................................................................................................................26

3.4.2. PCI Express x1..............................................................................................................................26

3.4.3. DDI Channels ...............................................................................................................................27

3.4.4. DDI to DP/HDMI Mapping...........................................................................................................29

3.4.5. PCI Express Graphics x16 (PEG)...................................................................................................30

3.4.6. Module Type Definition ..............................................................................................................31

3.4.7. Power and Ground ......................................................................................................................31

4. Module Interfaces and Configuration ............................................................ 32

4.1. Connector, Switch and LED Locations ................................................................................... 32

4.1.1. Express-BE and the DB40 Module connected.............................................................................32

4.2. 40-pin Multipurpose Connector ............................................................................................ 33

4.3. Status LEDs ............................................................................................................................ 34

4.4. Fan Connector ....................................................................................................................... 35

4.5. BIOS Setup Defaults Reset Button......................................................................................... 36

4.6. Express-BE Switch Settings .................................................................................................... 37

4.6.1. Switch Locations..........................................................................................................................37

4.6.2. SW1: BIOS Select and Mode Configuration Switch .....................................................................37

4.7. PCIe x 16-to-two-x8 Adapter Card......................................................................................... 38

5. Smart Embedded Management Agent (SEMA) ............................................. 39

5.1. Board Specific SEMA Functions ............................................................................................. 40

5.1.1. Voltages.......................................................................................................................................40

5.1.2. Main Current...............................................................................................................................40

5.1.3. BMC Status..................................................................................................................................40

5.1.4. Exception Codes ..........................................................................................................................41

5.1.5. BMC Flags....................................................................................................................................41

6. System Resources.............................................................................................. 42

6.1. System Memory Map ............................................................................................................ 42

Express-BE Page 5

6.2. Direct Memory Access Channels ........................................................................................... 42

6.3. I/O Map.................................................................................................................................. 43

6.4. Interrupt Request (IRQ) Lines................................................................................................ 44

6.4.1. PIC Mode.....................................................................................................................................44

6.4.2. APIC Mode...................................................................................................................................45

6.5. PCI Configuration Space Map ................................................................................................ 46

6.6. PCI Interrupt Routing Map .................................................................................................... 47

6.7. SMBus Address Table ............................................................................................................ 47

7. BIOS Setup .........................................................................................................48

7.1. Menu Structure ..................................................................................................................... 48

7.2. Main....................................................................................................................................... 49

7.2.1. System Information.....................................................................................................................49

7.2.2. Memory Information...................................................................................................................49

7.2.3. System Management ..................................................................................................................49

7.2.4. System Date and Time.................................................................................................................52

7.3. Advanced ............................................................................................................................... 52

7.3.1. CPU..............................................................................................................................................52

7.3.2. Memory.......................................................................................................................................53

7.3.3. Graphics ......................................................................................................................................53

7.3.4. SATA ............................................................................................................................................54

7.3.5. USB ..............................................................................................................................................55

7.3.6. Network.......................................................................................................................................57

7.3.7. PCI and PCIe ................................................................................................................................57

7.3.8. Super IO.......................................................................................................................................62

7.3.9. ACPI and Power Management ....................................................................................................62

7.3.10. Sound ..........................................................................................................................................63

7.3.11. Serial Port Console ......................................................................................................................63

7.3.12. Thermal .......................................................................................................................................65

7.3.13. Miscellaneous..............................................................................................................................65

7.4. Boot ....................................................................................................................................... 65

7.4.1. Boot Configuration......................................................................................................................65

7.4.2. Boot Configuration > CSM16 Parameters ...................................................................................66

7.4.3. Boot Configuration > CSM Parameters .......................................................................................66

7.5. Security.................................................................................................................................. 67

7.5.1. Password Description..................................................................................................................67

7.6. Save & Exit ............................................................................................................................. 67

7.6.1. Save and Exit > Reset Options.....................................................................................................67

7.6.2. Save and Exit > Save Options ......................................................................................................67

Page 6 Express-BE

7.6.3. Boot Override..............................................................................................................................67

8. BIOS Checkpoints, Beep Codes........................................................................ 68

8.1. Status Code Ranges ............................................................................................................... 69

8.2. Standard Status Codes........................................................................................................... 69

8.2.1. SEC Status Codes .........................................................................................................................69

8.2.2. SEC Beep Codes...........................................................................................................................70

8.2.3. PEI Status Codes..........................................................................................................................70

8.2.4. PEI Beep Codes............................................................................................................................72

8.2.5. DXE Status Codes ........................................................................................................................72

8.2.6. DXE Beep Codes ..........................................................................................................................75

8.2.7. ACPI/ASL Checkpoint...................................................................................................................75

8.3. OEM-Reserved Checkpoint Ranges ....................................................................................... 75

9. Mechanical Information ...................................................................................

9.1. Board-to-Board Connectors .................................................................................................. 76

9.2. Thermal Solution ................................................................................................................... 77

9.2.1. Heat Spreaders............................................................................................................................77

9.2.2. Heat Sinks....................................................................................................................................77

9.2.3. Installation...................................................................................................................................77

9.3. Mounting Methods................................................................................................................ 80

9.4. Standoff Types....................................................................................................................... 81

Safety Instructions ...................................................................................................... 82

Getting Service ............................................................................................................ 83

76

Express-BE Page 7

1. Introduction

The Express-BE is a COM Express® COM.0 R2.1 Basic Size Type 6 module supporting the AMD R-Series APU (codename: Bald Eagle)
with A77E Fusion Controller Hub. The Express-BE is specifically designed for customers who need excellent graphics performance and
high-level processing performance with low power consumption in a long product life solution.

The Express-BE features the AMD R-Series APU supporting Heterogeneous System Architecture (HSA) and non-ECC type DDR3L dual­channel memory at 1333/1600 MHz to provide excellent overall performance.

AMD Radeon HD 9000 Graphics integrated on the APU includes features such as OpenGL 4.2, DirectX 11.1, OpenCL 1.2, OpenGLES 2.0,
OpenCV, and support for H.264, MPEG2, VC1, MPEG4, WMV9, and MVC hardware decode. Graphics outputs include dual-channel
18/24-bit LVDS and DDI ports supporting HDMI, DVI, DisplayPort and optional eDP
supported. The Express-BE is specifically designed for customers with high-performance processing and graphics requirements who want to
outsource the core logic of their systems for reduced development time.

The Express-BE has dual stacked SODIMM sockets for up to 16 GB non-ECC type DDR3L memory. In addition to the onboard integrated
graphics, a multiplexed PCI Express® x16 Graphics bus is available for discrete graphics expansion. Input/output features include a single
onboard Gigabit Ethernet port, USB 3.0 ports and USB 2.0 ports, and SATA 6 Gb/s ports. Support is provided for SMBus and I2C. The
module is equipped with SPI AMI EFI BIOS with CMOS backup, supporting embedded features such as remote console, hardware monitor,
and watchdog timer.

(TBD). In addition, up to four independent displays are

Page 8 Express-BE

2. Specifications

2.1. Core System

¾ CPU: Dual or quad-core AMD R-Series APU (codename: Bald Eagle)

• RX-427BB 2.7 GHz (3.6 GHz boost), 35W (4C/8CU)

• RX-425BB 2.5 GHz(3.4 GHz boost), 35W (4C/6CU)

• RX-225FB 2.2 GHz (3.0 GHz boost), 17W (2C/3CU)

Supporting: AMD-V, Intel® SSE4.1 and SSE4.2, AMD Thermal Monitor (SB-TSI)
Note: The availability of the features may vary between processor SKUs.

¾ Cache: 4MB L2 cache for RX-427BB and RX-425BB, 2MB L2 cache for RX-225FB

¾ Memory: Dual channel non-ECC 1333/1600 MHz DDR3L memory up to 16GB in dual stacked SODIMM sockets

Note: The lower SODIMM slot must be populated.

¾

Chipset: AMD A77E Fusion Controller Hub (codename: Bolton-E4)

¾ Embedded BIOS: AMI EFI with CMOS backup in 8 MB SPI BIOS

2.2. Expansion Busses

¾ PCI Express x 16 Gen3 (can be configured to 2 x8 or 1 x8 and 1 x4)

Note: These lanes are intended for use with a graphics card.

¾ 6 PCI Express x1 (AB): Lanes 0/1/2/3/4/5 (Lanes 0-3 from APU, L anes 4-5 from FCH)
¾ 1 PCI Express x1 (CD): Lane 6 (from FCH)

2

¾ LPC bus, SMBus (system) , I

C (user)

2.3. SEMA Board Controller

¾ Type: ADLINK Smart Embedded Management Agent (SEMA)
¾ Supports:

• Voltage/Current monitoring

• Power sequence debug support

• AT/ATX mode control

• Logistics and Forensic information

• Flat Panel Control

• General Purpose I2C

• Failsafe BIOS (dual BIOS )

• Watchdog Timer and Fan Control

2.4. Debug Headers

¾ 40-pin multipurpose flat cable connector, used in combination with DB-40 debug module providing BIOS POST code LED, BMC

access, SPI BIOS flashing, power testpoints, debug LEDs

Express-BE Page 9

2.5. Video

¾ GPU Feature Support: Radeon HD 9000 Series supporting four independent displays and Heterogeneous System Architecture

• 3D graphics hardware acceleration

• Support for DirectX 11.1, OpenCL 1.2, OpenGL 4.2, OpenGLES 2.0 and OpenCV

• Video decode hardware acceleration (UVD 4.2) including support for H.264, MPEG2, VC-1, MPEG4, WMV9 and MVC formats

• Video encode hardware acceleration (VCE 2.0) including support for H.264, SVC formats and specific support for video conferencing and

wireless display applications

• AMD Eyefinity technology

• AMD Dual Graphics technology

Note: the availability of the features may vary between OS (Win 7/8, WES 7/8, Linux)

¾ Display Interface support

• DDI1: supports

• DDI2: supports

• DDI3: supports

DisplayPort, HDMI, DVI (eDP TBD)
DisplayPort, HDMI, DVI
DisplayPort, HDMI, DVI (eDP TBD)

• LVDS: supports up to dual-channel 18/24-bit LVDS (through eDP to LVDS bridge IC)

Note: Display priority follows APU settings, and cannot be defined by the user. The priority is DP0 > DP1 > DP2 > DP3.

à DP0 (from APU) mapped to DDI1
à DP1 (from APU) mapped to DDI3
à DP2 (from APU) mapped to LVDS
à DP3 (from APU) mapped to DDI2

2.6. Audio

¾ Audio Codec: located on carrier Express-BASE6 (ALC886 standard support)

2.7. LAN

¾ Intel MAC/PHY: Intel® i210 Ethernet controller
¾ Interface: 10/100/1000 Mbit/s connection

2.8. Multi I/O and Storage

¾ Integrated in APU and FCH
¾ USB:

• 4x USB 1.1/2.0/3.0 (USB 0,1,2,3)

• 4x USB 1.1/2.0 (USB 4,5,6,7)

¾ SATA: four ports SATA 6Gb/s (SATA 0,1,2,3)

Note: SATA repeater/redriver on carrier board is required for SATA 6Gb/s

¾ Serial: 2 UART ports COM 0/1 with console redirection
¾ GPIO: 4 GPO and 4 GPI with interrupt

2.9. TPM (Trusted Platform Module)

¾ Chipset: Atmel AT97SC3204
¾ Type: TPM 1.2

Page 10 Express-BE

2.10. Power Specifica tions

¾ Power Modes: AT and ATX mode (AT mode startup controlled by SEMA)
¾ Standard Voltage Input: ATX @ 12V±5%,/ 5Vsb ±5% or AT @ 12V ±5%
¾ Wide Voltage Input: ATX @ 8.5-20V, 5Vsb ±5% or AT @ 8.5-20V
¾ Power Management: ACPI 4.0 compliant, Smart Battery support
¾ Power States: supports C0, C1, C1E, C6, CC6, S0, S3, S5, S5 ECO mode (Wake-on-USB S3, WOL S3/S5)
¾ ECO mode: supports deep S5 for 5Vsb power saving

2.11. Power Consumption

TBD

2.12. Operating Temperatures

¾ Standard Operating Temperature: °C to 60°C (wide voltage input)

2.13. Environmental

¾ Humidity: 5-90% RH operating, non-condensing

5-95% RH storage (and operating with conformal coating).

¾ Shock and Vibration: IEC 60068-2-64 and IEC-60068-2-27

MIL-STD-202F, Method 213B, Table 213-I, Condition A and Method 214A, Table 214-I, Condition D

¾ Halt: Thermal Stress, Vibration Stress, Thermal Shock and Combined Test

2.14. Specification Compliance

¾ PICMG COM.0: Rev 2.1 Type 6, Basic size 125 x 95 mm

2.15. Operating Systems

¾ Standard Support: Windows 7/8.1 32/64-bit, Linux 32/64-bit
¾ Extended Support (BSP): WES 7/8, Linux

Express-BE Page 11

2.16. Functional Diagram

AB

UMI

CD

Page 12 Express-BE

2.17. Mechanical Dimensions

Top View

Side View

All Ø tolerances ± 0.05 mm
Other tolerances ± 0.2 mm

Dimensions in mm

Express-BE Page 13

3. Pinouts and Signal Descriptions

3.1. AB/CD Pin Definitions

The Express-BE is a Type 6 module supporting USB 3.0 and DDI channels on the CD connector. In the table below, all standard pins of the
COM Express specification are described, including those not supported on the Express-BE.

Note: Signals not supported on the Express-BE module are crossed out

Row A Row B Row C Row D

Pin Name Pin Name Pin Name Pin Name

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35

GND (fixed)
GBE0_MDI3­GBE0_MDI3+
GBE0_LINK100#
GBE0_LINK1000#
GBE0_MDI2­GBE0_MDI2+
GBE0_LINK#
GBE0_MDI1­GBE0_MDI1+
GND (fixed)
GBE0_MDI0­GBE0_MDI0+
GBE0_CTREF

SUS_S3#

SATA0_TX+
SATA0_TX-

SUS_S4#

SATA0_RX+
SATA0_RX­GND (fixed)
SATA2_TX+
SATA2_TX­SUS_S5#
SATA2_RX+
SATA2_RX-

BATLOW#

(S)ATA_ACT#
AC/HDA_SYNC
AC/HDA_RST#
GND (fixed)
AC/HDA_BITCLK
AC/HDA_SDOUT

BIOS_DIS0#
THRMTRIP#

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35

GND (fixed)
GBE0_ACT#
LPC_FRAME#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ0#
LPC_DRQ1#
LPC_CLK
GND (fixed)

PWRBTN#
SMB_CK
SMB_DAT
SMB_ALERT#

SATA1_TX+
SATA1_TX-

SUS_STAT#

SATA1_RX+
SATA1_RX­GND (fixed)
SATA3_TX+
SATA3_TX­PWR_OK
SATA3_RX+
SATA3_RX-

WDT

AC/HDA_SDIN2
AC/HDA_SDIN1
AC/HDA_SDIN0
GND (fixed)

SPKR
I2C_CK
I2C_DAT
THRM#

C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
C31
C32
C33
C34
C35

GND (fixed)
GND
USB_SSRX0­USB_SSRX0+
GND
USB_SSRX1- D6 USB_SSTX1­USB_SSRX1+ D7 USB_SSTX1+
GND D8 GND
USB_SSRX2- D9 USB_SSTX2­USB_SSRX2+ D10 USB_SSTX2+
GND (fixed) D11 GND (fixed)
USB_SSRX3- D12 USB_SSTX3­USB_SSRX3+ D13 USB_SSTX3+
GND
DDI1_PAIR6+
DDI1_PAIR6­RSVD
RSVD
PCIE_RX6+ D19 PCIE_TX6+
PCIE_RX6- D20 PCIE_TX6­GND (fixed)
PCIE_RX7+
PCIE_RX7-
DDI1_HPD
DDI1_PAIR4+
DDI1_PAIR4­RSVD
RSVD
DDI1_PAIR5+
DDI1_PAIR5­GND (fixed)

DDI2_CTRLCLK_AUX+
DDI2_CTRLDATA_AUX­DDI2_DDC_AUX_SEL

RSVD

D1
D2
D3
D4
D5

D14
D15
D16
D17
D18

D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35

GND (fixed)
GND
USB_SSTX0­USB_SSTX0+
GND

GND

DDI1_CTRLCLK_AUX+
DDI1_CTRLDATA_AUX

RSVD
RSVD

GND (fixed)
PCIE_TX7+
PCIE_TX7­RSVD
RSVD
DDI1_PAIR0+
DDI1_PAIR0­RSVD
DDI1_PAIR1+
DDI1_PAIR1­GND (fixed)
DDI1_PAIR2+
DDI1_PAIR2-

DDI1_DDC_AUX_SEL

RSVD

Page 14 Express-BE

Row A Row B Row C Row D

Pin Name Pin Name Pin Name Pin Name

A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79

USB6­USB6+
USB_6_7_OC#
USB4­USB4+
GND (fixed)
USB2­USB2+
USB_2_3_OC#
USB0­USB0+
VCC_RTC
EXCD0_PERST#
EXCD0_CPPE#
LPC_SERIRQ
GND (fixed)
PCIE_TX5+
PCIE_TX5-
GPI0
PCIE_TX4+
PCIE_TX4­GND
PCIE_TX3+
PCIE_TX3­GND (fixed)
PCIE_TX2+
PCIE_TX2­GPI1
PCIE_TX1+
PCIE_TX1­GND
GPI2
PCIE_TX0+
PCIE_TX0­GND (fixed)
LVDS_A0+
LVDS_A0-
LVDS_A1+
LVDS_A1-
LVDS_A2+
LVDS_A2-
LVDS_VDD_EN
LVDS_A3+
LVDS_A3-

B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79

USB7­USB7+
USB_4_5_OC#
USB5­USB5+
GND (fixed)
USB3­USB3+
USB_0_1_OC#
USB1­USB1+
EXCD1_PERST#
EXCD1_CPPE#

SYS_RESET#
CB_RESET#

GND (fixed)
PCIE_RX5+
PCIE_RX5-
GPO1
PCIE_RX4+
PCIE_RX4­GPO2
PCIE_RX3+
PCIE_RX3­GND (fixed)
PCIE_RX2+
PCIE_RX2­GPO3
PCIE_RX1+
PCIE_RX1-

WAKE0#
WAKE1#

PCIE_RX0+
PCIE_RX0­GND (fixed)
LVDS_B0+
LVDS_B0-
LVDS_B1+
LVDS_B1-
LVDS_B2+
LVDS_B2-
LVDS_B3+
LVDS_B3-
LVDS_BKLT_EN

C36
C37
C38
C39
C40
C41
C42
C43
C44
C45
C46
C47
C48
C49
C50
C51
C52
C53
C54
C55
C56
C57
C58
C59
C60
C61
C62
C63
C64
C65
C66
C67
C68
C69
C70
C71
C72
C73
C74
C75
C76
C77
C78
C79

DDI3_CTRLCLK_AUX+

DDI3_CTRLDATA_AUX-

DDI3_DDC_AUX_SEL
DDI3_PAIR0+
DDI3_PAIR0­GND (fixed)
DDI3_PAIR1+
DDI3_PAIR1­DDI3_HPD
RSVD
DDI3_PAIR2+
DDI3_PAIR2­RSVD
DDI3_PAIR3+
DDI3_PAIR3­GND (fixed)
PEG_RX0+ D52 PEG_TX0+
PEG_RX0- D53 PEG_TX0-

TYPE0#

PEG_RX1+ D55 PEG_TX1+
PEG_RX1- D56 PEG_TX1-

TYPE1#

PEG_RX2+ D58 PEG_TX2+
PEG_RX2- D59 PEG_TX2­GND (fixed) D60 GND (fixed)
PEG_RX3+ D61 PEG_TX3+
PEG_RX3- D62 PEG_TX3­RSVD D63 RSVD
RSVD D64 RSVD
PEG_RX4+ D65 PEG_TX4+
PEG_RX4- D66 PEG_TX4­RSVD D67 GND
PEG_RX5+ D68 PEG_TX5+
PEG_RX5- D69 PEG_TX5­GND (fixed) D70 GND (fixed)
PEG_RX6+ D71 PEG_TX6+
PEG_RX6- D72 PEG_TX6­GND D73 GND
PEG_RX7+ D74 PEG_TX7+
PEG_RX7- D75 PEG_TX7­GND D76 GND
RSVD D77 RSVD
PEG_RX8+ D78 PEG_TX8+
PEG_RX8- D79 PEG_TX8-

D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51

D54

D57

DDI1_PAIR3+
DDI1_PAIR3­RSVD
DDI2_PAIR0+
DDI2_PAIR0­GND (fixed)
DDI2_PAIR1+
DDI2_PAIR1­DDI2_HPD
RSVD
DDI2_PAIR2+
DDI2_PAIR2­RSVD
DDI2_PAIR3+
DDI2_PAIR3­GND (fixed)

PEG_LANE_RV#

TYPE2#

Express-BE Page 15

Row A Row B Row C Row D

Pin Name Pin Name Pin Name Pin Name

A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94
A95
A96
A97
A98
A99
A100
A101
A102
A103
A104
A105
A106
A107
A108
A109
A110

GND (fixed)
LVDS_A_CK+
LVDS_A_CK-
LVDS_I2C_CK
LVDS_I2C_DAT
GPI3
RSVD
RSVD

PCIE0_CK_REF+
PCIE0_CK_REF-

GND (fixed)

SPI_POWER
SPI_MISO

GPO0

SPI_CLK
SPI_MOSI
TPM_PP
TYPE10#

SER0_TX / CAN_TX
SER0_RX / CAN_RX

GND (fixed)

SER1_TX
SER1_RX
LID# ** B103 SLEEP# **

VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND (fixed)

B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
B95
B96
B97
B98
B99
B100
B101
B102

B104
B105
B106
B107
B108
B109
B110

GND (fixed)
LVDS_B_CK+
LVDS_B_CK-
LVDS_BKLT_CTRL

VCC_5V_SBY
VCC_5V_SBY
VCC_5V_SBY
VCC_5V_SBY
BIOS_DIS1#

VGA_RED C89

GND (fixed)

VGA_GRN C91
VGA_BLU C92
VGA_HSYNC C93
VGA_VSYNC C94
VGA_I2C_CK C95
VGA_I2C_DAT C96

SPI_CS#

RSVD
RSVD
GND (fixed)

FAN_PWMOUT
FAN_TACHIN

VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND (fixed)

C80
C81
C82
C83
C84
C85
C86
C87
C88

C90

C97
C98
C99
C100
C101
C102
C103
C104
C105
C106
C107
C108
C109
C110

GND (fixed)
PEG_RX9+ D81 PEG_TX9+
PEG_RX9- D82 PEG_TX9­TPM_PP D83 RSVD
GND D84 GND
PEG_RX10+ D85 PEG_TX10+
PEG_RX10- D86 PEG_TX10­GND D87 GND
PEG_RX11+ D88 PEG_TX11+
PEG_RX11- D89 PEG_TX11­GND (fixed) D90 GND (fixed)
PEG_RX12+ D91 PEG_TX12+
PEG_RX12- D92 PEG_TX12­GND D93 GND
PEG_RX13+ D94 PEG_TX13+
PEG_RX13- D95 PEG_TX13­GND D96 GND
RSVD D97 RSVD
PEG_RX14+ D98 PEG_TX14+
PEG_RX14- D99 PEG_TX14­GND (fixed) D100 GND (fixed)
PEG_RX15+ D101 PEG_TX15+
PEG_RX15- D102 PEG_TX15­GND D103 GND
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND (fixed)

D80

D104
D105
D106
D107
D108
D109
D110

GND (fixed)

VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
VCC_12V
GND (fixed)

Page 16 Express-BE

3.2. Signal Description Terminology

The following terms are used in the COM Express AB/CD Signal Descriptions below.

I Input to the Module
O Output from the Module
I/O Bi-directional input/output signal
OD Open drain output
I 3.3V Input 3.3V tolerant
I 5V Input 5V tolerant
O 3.3V Output 3.3V signal level
O 5V Output 5V signal level
I/O 3.3V Bi-directional signal 3.3V tolerant
I/O 5V Bi-directional signal 5V tolerant
I/O 3.3Vsb Input 3.3V tolerant active in standby state
P Power Input/Output
REF Reference voltage output that may be sourced from a module power plane.
PDS Pull-down strap. This is an output pin on the module that is either tied to GND or not connected.

The signal is used to indicate the PICMG module type to the Carrier Board.
PU ADLINK implemented pull-up resistor on module
PD ADLINK implemented pull-down resistor on module

Express-BE Page 17

3.3. AB Signal Descriptions

3.3.1. Audio Signals

Signal Pin # Description I/O PU/PD Comment

AC_RST# /
HDA_RST#

AC_SYNC /
HDA_SYNC

AC_BITCLK /
HDA_BITCLK

AC _SDOUT /
HDA_SDOUT

AC _SDIN[2:0]
HDA_SDIN[2:0]

A30 Reset output to CODEC, active low. O 3.3VSB

A29 Sample-synchronization signal to the CODEC(s). O 3.3V

A32 Serial data clock generated by the external

CODEC(s).

A33 Serial TDM data output to the CODEC. O 3.3V

B28
B30

Serial TDM data inputs from up to 3 CODECs. I/O 3.3VSB AC_SDIN0: supported

I/O 3.3V

AC_SDIN1: supported
AC_SDIN2: supported

3.3.2. Analog VGA (No VGA support)

Signal Pin # Description I/O PU/PD Comment

VGA_RED B89 Red for monitor.

Analog DAC output, designed to drive a

37.5-Ohm equivalent load.

VGA_GRN B91 Green for monitor

Analog DAC output, designed to drive a

37.5-Ohm equivalent load.

O Analog

O Analog

PD 150R

PD 150R

shall also be terminated on the
carrier with 150Ω resistor to
ground close to VGA connector

shall also be terminated on the
carrier with 150Ω resistor to
ground close to VGA connector

VGA_BLU B92 Blue for monitor.

Analog DAC output, designed to drive a

37.5-Ohm equivalent load.
VGA_HSYNC B93 Horizontal sync output to VGA monitor O 3.3V
VGA_VSYNC B94 Vertical sync output to VGA monitor O 3.3V
VGA_I2C_CK B95 DDC clock line (I²C port dedicated to identify

VGA monitor capabilities)

VGA_I2C_DAT B96 DDC data line. I/O OD 3.3V PU 2k2 3.3V

O Analog

I/O OD 3.3V PU 2k2 3.3V

PD 150R

shall also be terminated on the
carrier with 150Ω resistor to
ground close to VGA connector

3.3.3. LVDS

Signal Pin # Description I/O PU/PD Comment

LVDS_A0+ / eDP_TX2+
LVDS_A0- / eDP_TX2-
LVDS_A1+ / eDP_TX1+
LVDS_A1- / eDP_TX1­LVDS_A2+ / eDP_TX0+
LVDS_A2- / eDP_TX0-
LVDS_A3+
LVDS_A3-

LVDS_A_CK+ / eDP_TX3+
LVDS_A_CK- / eDP_TX3-

A71
A72
A73
A74
A75
A76
A78
A79

A81
A82

LVDS Channel A differential pairs O LVDS

LVDS Channel A differential clock O LVDS

Page 18 Express-BE

Signal Pin # Description I/O PU/PD Comment

LVDS_B0+
LVDS_B0-
LVDS_B1+
LVDS_B1-
LVDS_B2+
LVDS_B2-
LVDS_B3+
LVDS_B3-

LVDS_B_CK+
LVDS_B_CK-

LVDS_VDD_EN A77 LVDS panel power enable O 3.3V
LVDS_BKLT_EN B79 LVDS panel backlight enable O 3.3V
LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control O 3.3V
LVDS_I2C_CK A83 DDC lines used for flat panel detection and

LVDS_I2C_DAT A84 DDC lines used for flat panel detection and

B71
B72
B73
B74
B75
B76
B77
B78

B81
B82

LVDS Channel B differential pairs O LVDS

LVDS Channel B differential clock O LVDS

O 3.3V PU 2k2 3.3V

control.

I/O 3.3V PU 2k2 3.3V

control.

3.3.4. Gigabit Ethernet

Gigabit Ethernet Pin # Description I/O PU/PD Comment

GBE0_MDI0+
GBE0_MDI0-
GBE0_MDI1+
GBE0_MDI1-
GBE0_MDI2+
GBE0_MDI2-
GBE0_MDI3+
GBE0_MDI3-

GBE0_ACT# B2 Gigabit Ethernet Controller 0 activity indicator, active low. O 3.3VSB PU 10k

GBE0_LINK# A8 Gigabit Ethernet Controller 0 link indicator, active low. O 3.3VSB
GBE0_LINK100# A4 Gigabit Ethernet Controller 0 100Mbit/sec link indicator, active low. O 3.3VSB
GBE0_LINK1000# A5 Gigabit Ethernet Controller 0 1000Mbit/sec link indicator, active low. O 3.3VSB
GBE0_CTREF A14 Reference voltage for Carrier Board Ethernet channel 1 and 2 magnetics

A13

Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs

A11

0, 1, 2, 3. The MDI can operate in 1000, 100, and 10Mbit/sec modes.

A10

Some pairs are unused in some modes according to the following:

A9

1000 100 10

A7

MDI[0]+/- B1_DA+/- TX+/- TX+/-

A6

MDI[1]+/- B1_DB+/- RX+/- RX+/-

A3

MDI[2]+/- B1_DC+/-

A2

MDI[3]+/- B1_DD+/-

center tap. The reference voltage is determined by the requirements of the
Module PHY and may be as low as 0V and as high as 3.3V. The reference
voltage output shall be current limited on the Module. In the case in which
the reference is shorted to ground, the current shall be 250 mA or less.

I/O Analog Twisted pair

3.3VSB

GND min

3.3V max

Floating on

3.3.5. SATA

signals for
external
transformer.

module, N.C.
pin

Signal Pin # Description I/O PU/PD Comment

SATA0_TX+
SATA0_TX-

SATA0_RX+
SATA0_RX-

A16

Serial ATA channel 0, Transmit Output differential pair. O SATA AC coupled on Module

A17
A19

Serial ATA channel 0, Receive Input differential pair. I SATA AC coupled on Module

A20

Express-BE Page 19

Signal Pin # Description I/O PU/PD Comment

SATA1_TX+
SATA1_TX-

SATA1_RX+
SATA1_RX-

SATA2_TX+
SATA2_TX-

SATA2_RX+
SATA2_RX-

SATA3_TX+
SATA3_TX-

SATA3_RX+
SATA3_RX-

(S)ATA_ACT# A28 ATA (parallel and serial) or SAS activity indicator, active low. O 3.3V

B16

Serial ATA channel 1, Transmit Output differential pair. O SATA AC coupled on Module

B17
B19

Serial ATA channel 1, Receive Input differential pair. I SATA AC coupled on Module

B20
A22

Serial ATA channel 2, Transmit Output differential pair. O SATA AC coupled on Module

A23
A25

Serial ATA channel 2, Receive Input differential pair. I SATA AC coupled on Module

A26
B22

Serial ATA channel 3, Transmit Output differential pair. O SATA AC coupled on Module

B23
B25

Serial ATA channel 3, Receive Input differential pair. I SATA AC coupled on Module

B26

3.3.6. PCI Express

Signal Pin # Description I/O PU/PD Comment

PCIE_TX0+
PCIE_TX0-

PCIE_RX0+
PCIE_RX0-

A68

PCI Express channel 0, Transmit Output

A69

differential pair.

B68

PCI Express channel 0, Receive Input

B69

differential pair.

O PCIE AC coupled on Module

I PCIE AC coupled off Module

PCIE_TX1+
PCIE_TX1-

PCIE_RX1+
PCIE_RX1-

PCIE_TX2+
PCIE_TX2-

PCIE_RX2+
PCIE_RX2-

PCIE_TX3+
PCIE_TX3-

PCIE_RX3+
PCIE_RX3-

PCIE_TX4+
PCIE_TX4-

PCIE_RX4+
PCIE_RX4-

PCIE_TX5+
PCIE_TX5-

PCIE_RX5+
PCIE_RX5-

A64

PCI Express channel 1, Transmit Output

A65

differential pair.

B64

PCI Express channel 1, Receive Input

B65

differential pair.

A61

PCI Express channel 2, Transmit Output

A62

differential pair.

B61

PCI Express channel 2, Receive Input

B62

differential pair.

A58

PCI Express channel 3, Transmit Output

A59

differential pair.

B58

PCI Express channel 3, Receive Input

B59

differential pair.

A55

PCI Express channel 4, Transmit Output

A56

differential pair.

B55

PCI Express channel 4, Receive Input

B56

differential pair.

A52

PCI Express channel 5, Transmit Output

A53

differential pair.

B52

PCI Express channel 5, Receive Input

B53

differential pair.

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

O PCIE AC coupled on Module

I PCIE AC coupled off Module

PCIE_CLK_REF+
PCIE_CLK_REF-

A88

PCI Express Reference Clock output for all PCI

A89

Express and PCI Express Graphics Lanes.

O PCIE

Page 20 Express-BE

3.3.7. Express Card

Signal Pin # Description I/O PU/PD Comment

EXCD0_CPPE#
EXCD1_CPPE#

EXCD0_PERST#
EXCD1_PERST#

A49
B48

A48
B47

PCI ExpressCard: PCI Express capable card request I 3.3V PU 10k 3.3V

PCI ExpressCard: reset O 3.3V

3.3.8. LPC Bus

Signal Pin # Description I/O PU/PD Comment

LPC_AD[0:3] B4-B7 LPC multiplexed address, command and data bus I/O 3.3V
LPC_FRAME# B3 LPC frame indicates the start of an LPC cycle O 3.3V
LPC_DRQ0#

LPC_DRQ1#
LPC_SERIRQ A50 LPC serial interrupt I/O OD 3.3V PU 8k2 3.3V
LPC_CLK B10 LPC clock output –33MHz nominal O 3.3V

B8
B9

LPC serial DMA request I 3.3V

3.3.9. USB

Signal Pin # Description I/O PU/PD Comment

USB0+
USB0-

USB1+
USB1-

USB2+
USB2-

USB3+
USB3-

USB4+
USB4-

USB5+
USB5-

USB6+
USB6-

USB7+
USB7-

USB_0_1_OC# B44 USB over-current sense, USB ports 0 and 1. A pull-up

A46

USB differential data pairs for Port 0 I/O 3.3VSB USB 1.1/ 2.0 compliant

A45
B46

USB differential data pairs for Port 1 I/O 3.3VSB USB 1.1/ 2.0 compliant

B45
A43

USB differential data pairs for Port 1 I/O 3.3VSB USB 1.1/ 2.0 compliant

A42
B43

USB differential data pairs for Port 2 I/O 3.3VSB USB 1.1/ 2.0 compliant

B42
A40

USB differential data pairs for Port 3 I/O 3.3VSB USB 1.1/ 2.0 compliant

A39
B40

USB differential data pairs for Port 4 I/O 3.3VSB USB 1.1/ 2.0 compliant

B39
A37

USB differential data pairs for Port 5 I/O 3.3VSB USB 1.1/ 2.0 compliant

A36
B37

USB differential data pairs for Port 6 I/O 3.3VSB USB 1.1/ 2.0 compliant

B37

for this line shall be present on the module. An open
drain driver from a USB current monitor on the carrier
board may drive this line low.

I 3.3VSB PU 10k 3.3VSB Do not pull high on carrier

USB_2_3_OC# A44 USB over-current sense, USB ports 2 and 3. A pull-up

for this line shall be present on the module. An open
drain driver from a USB current monitor on the carrier
board may drive this line low. .

USB_4_5_OC# B38 USB over-current sense, USB ports 4 and 5. A pull-up

for this line shall be present on the module. An open

I 3.3VSB PU 10k 3.3VSB Do not pull high on carrier

I 3.3VSB PU 10k 3.3VSB Do not pull high on carrier

Express-BE Page 21

Signal Pin # Description I/O PU/PD Comment

drain driver from a USB current monitor on the carrier
board may drive this line low.

USB_6_7_OC# A38 USB over-current sense, USB ports 6 and 7. A pull-up

for this line shall be present on the module. An open
drain driver from a USB current monitor on the carrier
board may drive this line low.

3.3.10. USB Root Segmentation

I 3.3VSB PU 10k 3.3VSB Do not pull high on carrier

USB_SSRX2+ / C10

USB_SSRX0+ / C4

USB_SSTX0+ / D4

USB_SSRX0- / C3

USB0+ / A46

USB1+ / B46

USB2+ / A43

USB3+ / B43

USB4+ / A40

USB5+ / B40

USB6+ / A37

USB0- / A45

USB1- / B45

USB2- / A42

USB3- / B42

USB4- / A39

USB5- / B39

USB6- / A36

USB7+ / B37

USB7- / B36

USB_SSTX0- / D3

USB_SSRX1+ / C7

USB_SSTX1+ / D7

USB_SSRX1- / C6

USB_SSTX1- / D6

USB_SSTX2+ / D10

USB_SSTX2- / D9

3.3.11. SPI (BIOS only)

Signal Pin # Description I/O PU/PD Comment

SPI_CS# B97 Chip select for Carrier Board SPI BIOS Flash. O 3.3VSB
SPI_MISO A92 Data in to module from carrier board SPI BIOS flash. I 3.3VSB
SPI_MOSI A95 Data out from module to carrier board SPI BIOS flash. O 3.3VSB
SPI_CLK A94 Clock from module to carrier board SPI BIOS flash. O 3.3VSB
SPI_POWER A91 Power supply for Carrier Board SPI – sourced from Module

– nominally 3.3V.
The Module shall provide a minimum of 100mA on
SPI_POWER.
Carriers shall use less than 100mA of SPI_POWER.
SPI_POWER shall only be used to power SPI devices on
the Carrier

O P 3.3VSB

USB_SSRX3+ / C13

USB_SSTX3+ / D13

USB_SSRX3- / C12

USB_SSRX2- / C9

USB_SSTX3- / D12

BIOS_DIS0# A34 Selection strap to determine the BIOS boot device. I PU 10K 3.3VSB Carrier shall pull to GND

or leave not- connected.

BIOS_DIS1# B88 Selection strap to determine the BIOS boot device. I PU 10K 3.3VSB Carrier shall pull to GND

or leave not- connected

Page 22 Express-BE

3.3.12. Miscellaneous

Signal Pin # Description I/O PU/PD Comment

SPKR B32 Output for audio enunciator, the “speaker” in PC-AT

systems

WDT B27 Output indicating that a watchdog time-out event has

occurred.

THRM# B35 Input from off-module temp sensor indicating an over-temp

situation.

THRMTRIP# A35 Active low output indicating that the CPU has entered

thermal shutdown.

FAN_PWMOUT B101 Fan speed control. Uses the Pulse Width Modulation

(PWM) technique to control the fan’s RPM.
FAN_TACHIN B102 Fan tachometer input for a fan with a two pulse output. I OD 3.3V PU 10k 3.3V
TPM_PP C83 Trusted Platform Module (TPM) Physical Presence pin.

Active high. TPM chip has an internal pull down. This

signal is used to indicate Physical Presence to the TPM.

O 3.3V

O 3.3V

I 3.3V

O 3.3V PU 10k 3.3V

O OD 3.3V

I 3.3V

PD 10k 3.3V PD only when TPM on

module

3.3.13. SMBus

Signal Pin # Description I/O PU/PD Comment

SMB_CK B13 System Management Bus bidirectional clock line. Power

sourced through 5V standby rail and main power rails.

SMB_DAT# B14 System Management Bus bidirectional data line. Power

sourced through 5V standby rail and main power rails.

I/O OD 3.3VSB PU 2k2 3.3VSB

I/O OD 3.3VSB PU 2k2 3.3VSB

SMB_ALERT# B15 System Management Bus Alert – active low input can

be used to generate an SMI# (System Management
Interrupt) or to wake the system. Power sourced
through 5V standby rail and main power rails.

I 3.3VSB PU 10k 3.3VSB

3.3.14. I2C Bus

Signal Pin # Description I/O PU/PD Comment

I2C_CK B33 General purpose I²C port clock output/input I/O OD 3.3VSB PU 2k2 3.3VSB Source SEMA BMC
I2C_DAT B34 General purpose I²C port data I/O line I/O OD 3.3VSB PU 2k2 3.3VSB Source SEMA BMC

3.3.15. General Purpose I/O (GPIO)

Signal Pin # Description I/O PU/PD Comment

GPO[0] A93 General purpose output pins. O 3.3V PU 10K 3.3V After hardware RESET

output low

GPO[1] B54 General purpose output pins. O 3.3V PU 10K 3.3V After hardware RESET

output low

GPO[2] B57 General purpose output pins. O 3.3V PU 10K 3.3V After hardware RESET

output low

GPO[3] B63 General purpose output pins. O 3.3V PU 10K 3.3V After hardware RESET

output low

GPI[0] A54 General purpose input pins.

Pulled high internally on the module.

I 3.3V PU 10K 3.3V

Express-BE Page 23

Signal Pin # Description I/O PU/PD Comment

GPI[1] A63 General purpose input pins.

Pulled high internally on the module.

GPI[2] A67 General purpose input pins.

Pulled high internally on the module.

GPI[3] A85 General purpose input pins.

Pulled high internally on the module.

I 3.3V PU 10K 3.3V

I 3.3V PU 10K 3.3V

I 3.3V PU 10K 3.3V

3.3.16. Serial Interface Signals

Signal Pin # Description I/O PU/PD Comment

SER0_TX A98 General purpose serial port transmitter (TTL level output) O CMOS Power rail tolerance 5V, 12V
SER0_RX A99 General purpose serial port receiver (TTL level input) I CMOS Power rail tolerance 5V, 12V
SER1_TX A101 General purpose serial port transmitter (TTL level output) O CMOS Power rail tolerance 5V, 12V
SER1_RX A102 General purpose serial port receiver (TTL level input) I CMOS Power rail tolerance 5V, 12V

3.3.17. Power and System Management

Signal Pin # Description I/O PU/PD Comment

PWRBTN# B12 Power button to bring system out of S5 (soft off), active on falling edge. I 3.3VSB PU 10k

3.3VSB

SYS_RESET# B49 Reset button input. Active low request for module to reset and reboot. May

be falling edge sensitive. For situations when SYS_RESET# is not able to
reestablish control of the system, PWR_OK or a power cycle may be used.

CB_RESET# B50 Reset output from module to Carrier Board. Active low. Issued by module

chipset and may result from a low SYS_RESET# input, a low PWR_OK
input, a VCC_12V power input that falls below the minimum specification, a
watchdog timeout, or may be initiated by the module software.

PWR_OK B24 Power OK from main power supply. A high value indicates that the power is

good. This signal can be used to hold off Module startup to allow carrier

based FPGAs or other configurable devices time to be programmed.
SUS_STAT# B18 Indicates imminent suspend operation; used to notify LPC devices. O 3.3VSB
SUS_S3# A15 Indicates system is in Suspend to RAM state. Active-low output. An inverted

copy of SUS_S3# on the carrier board (also known as “PS_ON”) may be

used to enable the non-standby power on a typical ATX power supply.
SUS_S4# A18 Indicates system is in Suspend to Disk state. Active low output. O 3.3VSB

SUS_S5# A24 Indicates system is in Soft Off state. O 3.3VSB
WAKE0# B66 PCI Express wake up signal. I 3.3VSB PU 10k

I 3.3VSB PU 10k

3.3VSB

O 3.3VSB

I 3.3V PU 100k

3.3VSB

O 3.3VSB

3.3VSB

Not
supported
connected to

SUS_S5#

Not supported
connected to
WAKE1#

WAKE1# B67 General purpose wake up signal. May be used to implement wake-up on

PS/2 keyboard or mouse activity.
BATLOW# A27 Battery low input. This signal may be driven low by external circuitry to

signal that the system battery is low, or may be used to signal some other

external power-management event.

I 3.3VSB PU 10k

3.3VSB

I 3.3VSB PU 10k

3.3VSB

Page 24 Express-BE

Signal Pin # Description I/O PU/PD Comment

LID# A103 LID button. Low active signal used by the ACPI operating system for a LID

switch.
SLEEP# B103 Sleep button. Low active signal used by the ACPI operating system to bring

the system to sleep state or to wake it up again.

I OD

3.3VSB
I OD

3.3VSB

PU 10k

3.3VSB
PU 10K

3.3VSB

Emulated on
GPIO (BIOS)

Emulated on
GPIO (BIOS)

3.3.18. Power and Ground

Signal Pin # Description I/O PU/PD Comment

VCC_12V A104-A109

B104-B109

VCC_5V_SBY B84-B87 Standby power input: +5.0V nominal. See section 7 “Electrical

VCC_RTC A47 Real-time clock circuit-power input. Nominally +3.0V. P
GND A1, A11, A21, A31, A41, A51,

A57, A66, A80, A90, A96, A100,
A110, B1, B11, B21 ,B31, B41,
B51, B60, B70, B80, B90, B100,
B110

Primary power input: +12V nominal (wide range 5 ~ 20V).
All available VCC_12V pins on the connector(s) shall be used.

Specifications“ for allowable input range. If VCC5_SBY is used,
all available VCC_5V_SBY pins on the connector(s) shall be
used. Only used for standby and suspend functions. May be left
unconnected if these functions are not used in the system design.

Ground - DC power and signal and AC signal return path. P

P 8.5~20 V

P 5Vsb ±5%

Express-BE Page 25

3.4. CD Signal Descriptions

3.4.1. USB 3.0 Extension

Signal Pin Description I/O PU/PD Comment

USB_SSRX0-
USB_SSRX0+

USB_SSTX0-
USB_SSTX0+

USB_SSRX1-
USB_SSRX1+

USB_SSTX1-
USB_SSTX1+

USB_SSRX2-
USB_SSRX2+

USB_SSTX2-
USB_SSTX2+

USB_SSRX3-
USB_SSRX3+

USB_SSTX3-
USB_SSTX3+

C3
C4

D3
D4

C6
C7

D6
D7

C9
C10

D9
D10

C12
C13

D12
D13

Additional Receive signal differential pairs for the
SuperSpeed USB data path on USB0

Additional Transmit signal differential pairs for the
SuperSpeed USB data path on USB0

Additional Receive signal differential pairs for the
SuperSpeed USB data path on USB1

Additional Transmit signal differential pairs for the
SuperSpeed USB data path on USB1

Additional Receive signal differential pairs for the
SuperSpeed USB data path on USB2

Additional Transmit signal differential pairs for the
SuperSpeed USB data path on USB2

Additional Receive signal differential pairs for the
SuperSpeed USB data path on USB3

Additional Transmit signal differential pairs for the
SuperSpeed USB data path on USB3

I PCIE AC coupled off module

O PCIE AC coupled on module

I PCIE AC coupled off module

O PCIE AC coupled on module

I PCIE AC coupled off module

O PCIE AC coupled on module

I PCIE AC coupled off module

O PCIE AC coupled on module

3.4.2. PCI Express x1

Signal Pin # Description I/O PU/PD Comment

PCIE_TX6+
PCIE_TX6-

PCIE_RX6+
PCIE_RX6-

D19
D20

C19
C20

PCI Express channel 6, Transmit Output differential pair. O PCIE

PCI Express channel 6, Receive Input differential pair. I PCIE

AC coupled on module

AC coupled off module

PCIE_TX7+
PCIE_TX7-

PCIE_RX7+
PCIE_RX7-

D22
D23

C22
C23

PCI Express channel 7, Transmit Output differential pair. O PCIE Not supported

PCI Express channel 7, Receive Input differential pair. I PCIE Not supported

Page 26 Express-BE