ADLINK DAQ-2204, DAQ-2205, DAQ-2206, PXI-2204, PXI-2205 User Guide

NuDAQ

Recycle Paper

DAQ-2204/2205/2206

PXI-2204/2205/2206

64-CH, High Performance

Multi-function Data Acquisition Cards

User's Guide

Copyright 2002 ADLINK Technology Inc.

All Rights Reserved.

Manual Rev. 1. 13: Oct 15, 2002

Part No: 50-11213-101

The information in this document is subject to change without prior notice in
order to improve reliability, design and function and does not represent a
commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special, in­cidental, or consequential damages arising out of the use or inability to use
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Table of Contents

Tables.......................................................................................iv

Figures......................................................................................v

How to Use This Guide..........................................................vii

Chapter 1 Introduction...........................................................1

1.1 Features ...........................................................................1

1.2 Applications ......................................................................3

1.3 Specifications ....................................................................3

1.4 Software Support............................................................. 12

1.4.1 Programming Library ...................................................................12

1.4.2 D2K-LVIEW: LabVIEW® Driver..............................................12

1.4.3 PCIS-OCX: ActiveX Controls ....................................................13

Chapter 2 Installation............................................................14

2.1 What You Have............................................................... 14

2.2 Unpacking....................................................................... 15

2.3 DAQ/PXI-22XX Layout ................................................... 15

2.4 PCI Configuration............................................................ 16

Chapter 3 Signal Connections ..............................................17

3.1 Connectors Pin Assignment.............................................. 17

3.2 Analog Input Signal Connection ....................................... 21

3.2.1 Types of signal sources................................................................21

3.2.2 Input Configurations.....................................................................21

3.2.2.1 Single-ended Connections.........................................................21

3.2.2.2 Differential input mode .............................................................23

Table of Contents • i

Chapter 4 Operation Theory ................................................24

4.1 A/D Conversion ............................................................... 24

4.1.1 DAQ/PXI-2204 AI Data Format ................................................25

4.1.1.1 Synchronous Digital Inputs (for DAQ/PXI-2204 only).............25

4.1.2 DAQ/PXI-2205/2206 AI Data Format......................................27

4.1.3 Software conversion with polling data transfer acquisition

mode (Software Polling)............................................................................28

4.1.3.1 Specifying Channels, Gains, and input configurations in the

Channel Gain Queue.................................................................28

4.1.4 Programmable scan acquisition mode.......................................29

4.1.4.1 Scan Timing and Procedure......................................................29

4.1.4.2 Specifying Channels, Gains, and input configurations in the

4.1.4.3 Trigger Modes...........................................................................32

4.1.4.4 Bus-mastering DMA Data Transfer..........................................38

4.2 D/A Conversion ............................................................... 40

4.2.1 Software Update ............................................................................41

4.2.2 Timed Waveform Generation .....................................................41

4.2.2.1 Trigger Modes...........................................................................43

4.2.2.2 Iterative Waveform Generation.................................................45

4.2.2.3 Stop Modes of Scan Update.......................................................46

4.3 Digital I/O ....................................................................... 48

4.4 General Purpose Timer/Counter Operation ........................ 49

4.4.1 Timer/Counter functions basics..................................................49

4.4.2 General Purpose Timer/Counter modes....................................49

4.4.2.1 Mode1: Simple Gated-Event Counting......................................50

4.4.2.2 Mode2: Single Period Measurement.........................................50

4.4.2.3 Mode 3: Single Pulse-width Measurement................................51

4.4.2.4 Mode 4: Single Gated Pulse Generation...................................51

4.4.2.5 Mode5: Single Triggered Pulse Generation .............................52

4.4.2.6 Mode6: Re-triggered Single Pulse Generation.........................52

4.4.2.7 Mode7: Single Triggered Continuous Pulse Generation..........53

4.4.2.8 Mode8: Continuous Gated Pulse Generation ...........................53

Channel Gain Queue.................................................................31

ii • Table of Contents

4.5 Trigger Sources............................................................... 54

4.5.1 Software-Trigger ........................................................................... 54

4.5.2 External Analog Trigger..............................................................54

4.5.2.1 Below-Low analog trigger condition ........................................55

4.5.2.2 Above-High analog trigger condition .......................................56

4.5.2.3 Inside-Region analog trigger condition ....................................56

4.5.2.4 High-Hysteresis analog trigger condition.................................57

4.5.2.5 Low-Hysteresis analog trigger condition..................................57

4.5.3 External Digital Trigger...............................................................58

4.6 User-controllable Timing Signals...................................... 59

4.6.1 DAQ timing signals ......................................................................60

4.6.2 Auxiliary Function Inputs (AFI).................................................60

4.6.3 System Synchronization Interface .............................................. 63

Chapter 5 Calibration...........................................................66

5.1 Loading Calibration Constants .......................................... 66

5.2 Auto-calibration............................................................... 67

5.3 Saving Calibration Constants ............................................ 67

Warranty Policy.....................................................................68

Table of Contents • iii

Tables

Table 1: Programmable input range ...................................... 4

Table 2: -3dB small signal bandwidth ..................................5

Table 3: System Noise ........................................................6

Table 4: Input impedance .................................................... 6

Table 5: CMRR (DC to 60Hz).............................................6

Table 6: Settling time to full-scale step.................................7

Table 7: Legend of 68-pin VHDCI-type connectors............ 20

Table 8: Bipolar analog input range and the output digital

code on DAQ/PXI -2204....................................... 26

Table 9: Unipolar analog input range and the output digital

code on DAQ/PXI -2204....................................... 26

Table 10: Bipolar analog input range and the output digital

code on DAQ/PXI -2205/2206 .............................. 27

Table 11: Unipolar analog input range and the output digital

code on DAQ/PXI -2205/2206 .............................. 27

Table 12: Bipolar output code table ..................................... 40

Table 13: Unipolar output code table ................................... 40

Table 14: Analog trigger SRC1 ideal transfer characteristic... 55
Table 15: Auxiliary function input signals and the

corresponding functionalities ................................ 61

Table 16: Summary of SSI timing signals and the

corresponding functionalities as the master or slave63

iv • Tables

Figures

Figure 1: PCB Layout of DAQ -22XX................................. 15

Figure 2: PCB Layout of PXI -22XX................................... 16

Figure 3: Connector CN1 pin assignment ............................ 18

Figure 4: Connector CN2 pin assignment ............................ 19

Figure 5: Floating source and RSE input connections .......... 22

Figure 6: Ground-referenced sources and NRSE input

Figure 7: Ground -referenced source and differential input.... 23

Figure 8: Floating source and differential input ................... 23

Figure 9: Synchronous Digital Inputs Block Diagram.......... 25

Figure 10: Synchronous Digital Inputs timing ....................... 25

Figure 11: Scan Timing ....................................................... 30

Figure 12: Pre-trigger (trigger occurs after M scans).............. 32

Figure 13: Pre-trigger (trigger with scan is in progress) ......... 33

Figure 14: Pre-trigger with M_enable = 0............................. 34

Figure 15: Pre-trigger with M_enable = 1............................. 34

Figure 16: Middle trigger with M_enable = 1........................ 35

Figure 17: Middle trigger..................................................... 36

Figure 18: Post trigger ......................................................... 36

connections ........................................................ 22

Figure 19: Delay trigger ...................................................... 37

Figure 20: Post trigger with retrigger .................................... 38

Figure 21: Scatter/gather DMA for data transfer.................... 39

Figure 22: Typical D/A timing of waveform generation ......... 42

Figure 23: Post trigger waveform generation ......................... 43

Figure 24: Delay trigger waveform generation ...................... 44

Figures • v

Figure 25: Re-triggered waveform generation with

Post-trigger and DLY2_Counter = 0..................... 44

Figure 26: Finite iterative waveform generation with

Post-trigger and DLY2_Counter = 0..................... 45

Figure 27: Infinite iterative waveform generation with

Post-trigger and DLY2_Counter = 0..................... 46

Figure 28: Stop mode I ........................................................ 47

Figure 29: Stop mode II....................................................... 47

Figure 30: Stop mode III ..................................................... 48

Figure 31: Mode 1 Operation............................................... 50

Figure 32: Mode 2 Operation............................................... 50

Figure 33: Mode 3 Operation............................................... 51

Figure 34: Mode 4 Operation............................................... 51

Figure 35: Mode 5 Operation............................................... 52

Figure 36: Mode 6 Operation............................................... 52

Figure 37: Mode 7 Operation............................................... 53

Figure 38: Mode 8 Operation............................................... 53

Figure 39: Analog trigger block diagram .............................. 54

Figure 40: Below-Low analog trigger condition.................... 55

Figure 41: Above-High analog trigger condition ................... 56

Figure 42: Inside-Region analog trigger condition ................. 56

Figure 43: High-Hysteresis analog trigger condition.............. 57

Figure 44: Low-Hysteresis analog trigger condition .............. 57

Figure 45: External digital trigger ........................................ 58

Figure 46: DAQ signals routing ........................................... 59

Figure 47: Summary of user-controllable timing signals and

the corresponding functionalities.......................... 59

vi • Figures

How to Use This Guide

This manual is designed to help you use/understand the DAQ/PXI-22XX.
The manual describes the versatile functions and the operation theory of
the DAQ/PXI-22XX. It is divided into five chapters:

Chapter 1, “Introduction,” gives an overview of the product features,

applications, and specifications.

Chapter 2, “Installation,” describes how to install DAQ/PXI-22XX.

The layout and the positions of all the connectors on
DAQ/PXI-22XX are shown.

Chapter 3, “Signal Connections,” describes the connector’s pin as-

signment and how to connect the outside signals to
DAQ/PXI-22XX.

Chapter 4, “Operation Theory,” describes how DAQ/PXI -22XX op-

erates. The A/D, D/A, GPIO, timer/counter, trigger and
timing signal routing are introduced.

Chapter 5, “Calibration,” describes how to calibrate the

DAQ/PXI-22XX for accurate measurements.

How to Use This Guide • vii

1

Introduction

The DAQ/PXI -22XX is an advanced data acquisition card based on the
32-bit PCI architecture. High performance designs and the state-of-the-art
technology make this card ideal for data logging and signal analysis ap­plications in medical, process control, etc.

1.1 Features

DAQ/PXI-22XX Advanced Data Acquisition Card provides the following

advanced features:

• 32-bit PCI -Bus, plug and play

• Up to 64 single-ended inputs or 32 differential inputs, mixing of SE and

DI analog input signals are possible

• 512 words analog input Channel Gain Queue configuration size

• DAQ/PXI-2204: 12-bit Analog input resolution with sampling rate up to

3MHz

• DAQ/PXI-2205: 16-bit Analog input resolution with sampling rate up to
500KHz

• DAQ/PXI-2206: 16-bit Analog input resolution with sampling rate up to
250KHz

• Programmable Bipolar/Unipolar analog input

Introduction • 1

• Programmable gain

P DAQ/PXI-2204: x1, x2, x4, x5, x8, x10, x20, x40, x50, x200.
P DAQ/PXI-2205/2206: x1, x2, x4, x8.

• A/D FIFO size: 1024 samples

• Versatile trigger sources: software trigger, external digital trigger,

analog trigger and trigger from System Synchronization Interface (SSI)

• A/D Data transfer: software polling & bus-mastering DMA with Scat­ter/Gather functionality

• Four A/D trigger modes: post-trigger, delay-trigger, pre-trigger and
middle-trigger

• 2 channel D/A outputs with waveform generation capability

• 1024 word length output data FIFO for D/A channels

• D/A Data transfer: software update and bus-mastering DMA with

Scatter/Gather functionality

• System Synchronization Interface (SSI)

• A/D and D/A fully auto-calibration

• Completely jumper-less and software configurable

2 • Introduction

1.2 Applications

• Automotive Testing

• Cable Testing

• Transient signal measurement

• ATE

• Laboratory Automation

• Biotech measurement

1.3 Specifications

♦ Analog Input (AI)

• Number of channels: (programmable)

P 64 single-ended (SE)
P 32 differential input (DI)
P Mixing of SE and DI analog signal sources (Software selectable per

channel)

• A/D converter

P 2204: LT1412 or equivalent
P 2205: AD7665 or equivalent
P 2206: AD7663 or equivalent

• Maximum sampling rate:

P 2204: 3MS/s (for single channel)
P 2205: 500KS/s
P 2206: 250KS/s

• Resolution:

P 2204: 12 bits, No missing codes
P 2205/2206: 16 bits, No missing codes

• Input coupling: DC

Introduction • 3

• Programmable input range:

Device Bipolar input range Unipolar input range

--

0~10V

0~5V
0~4V

0~2.5V

0~2V
0~1V

0~0.5V
0~0.4V
0~0.1V

0~10V

0~5V

0~2.5V

0~1.25V

2204

2205
2206

±10V

±5V

±2.5V

±2V

±1.25V

±1V

±0.5V

±0.25V

±0.2V

±0.05V

±10V

±5V

±2.5V

±1.25V

Table 1: Programmable input range

• Operational common mode voltage range: ± 11V maximum

• Overvoltage protection:

P Power on: continuous ± 30V
P Power off: continuous ± 15V

• FIFO buffer size: 1024 samples

• Data transfers:

P Programmed I/O
P Bus-mastering DMA with scatter/gather

• Channel Gain Queue configuration size: 512 words

4 • Introduction

• -3dB small signal bandwidth: (Typical, 25°C)

Device

2204

2205

2206

Input range Bandwidth (-3dB)

±10V

±5V

±2.5V

±1.25V

±2V

±0.5V

±1V

±0.25V

±0.2V

±0.05V

±10V

±5V

±2.5V

±1.25V

±10V

±5V

±2.5V

±1.25V

--

0~10V

0~5V

0~2.5V

0~4V
0~1V

0~2V

0~0.5V
0~0.4V

0~0.1V

0~10V 1600kHz

0~5V 1400kHz

0~2.5V 1000kHz

0~1.25V 600kHz

0~10V 760kHz

0~5V 720kHz

0~2.5V 610kHz

0~1.25V 450kHz

2000kHz

1450kHz

990kHz

240kHz

Table 2: -3dB small signal bandwidth

Introduction • 5

• System Noise (LSBrms, including Quantization, Typical, 25°C)

Device

2205

2206

• Input impedance

• CMRR (DC to 60Hz, Typical)

Device Input Range CMRR Input Range CMRR

Input

Range

±10V

±5V

±2.5V

±1.25V

±10V

±5V

±2.5V

±1.25V

Normal Power On Power Off Overload

1GΩ / 100pF 820Ω 820Ω

System Noise Input Range System Noise

0.95 LSBrms 0~10V 1.5 LSBrms

1.0 LSBrms 0~5V 1.6 LSBrms

1.1 LSBrms 0~2.5V 1.7 LSBrms

1.3 LSBrms 0~1.25V 1.9 LSBrms

0.8 LSBrms 0~10V 0.9 LSBrms

0.85 LSBrms 0~5V 1.0 LSBrms

0.85 LSBrms 0~2.5V 1.0 LSBrms

0.9 LSBrms 0~1.25V 1.2 LSBrms

Table 3: System Noise

Table 4: Input impedance

2204 All ranges 90dB -- --

±10V

2205
2206

6 • Introduction

±5V

±2.5V

±1.25V

Table 5: CMRR (DC to 60Hz)

83dB 0~10V 87dB
87dB 0~5V 90dB
90dB 0~2.5V 92dB
92dB 0~1.25V 93dB

• Settling time to full-scale step: (Typical, 25°C)

Device Input Range Condition Settling time

±10V

0~10V

2204

2205
2206

±5V

±2.5V

±2V

±1.25V

±0.5V

±2.5V

±1.25V

±0.5V

±0.25V 0~0.5V

±0.2V

±0.05V 0~0.1V

0~2.5V

±10V

±5V

±2V

0~2.5V

±1V

0~0.4V

All Ranges

All Ranges

0~10V

0~5V
0~4V

0~1V

0~5V
0~4V

0~1V
0~2V

Multiple channels,
multiple ranges.

All samples in Unipolar
OR Bipolar mode

Multiple channels,
multiple ranges.

All samples in Unipolar
AND/OR Bipolar mode

Multiple channels,
multiple ranges.

All samples in Unipolar
AND/OR Bipolar mode

Multiple channels,
multiple ranges.

All samples in Unipolar
AND/OR Bipolar mode

Multiple channels,
multiple ranges.

All samples in Unipolar
OR Bipolar mode

Multiple channels,
multiple ranges.

All samples in Unipolar
AND/OR Bipolar mode

1us to 0.1% error

1.25us to 0.1% error

2us to 0.1% error

5us to 0.1% error

2us to 0.1% error,

4us to 0.01% error

2us to 0.2% error,

4us to 0.01% error

Table 6: Settling time to full-scale step

Introduction • 7

• Time-base source: Internal 40MHz or External clock Input (f
40MHz, f

: 1MHz, 50% duty cycle)

min

• Trigger modes: post-trigger, delay-trigger, pre-trigger and mid­dle-trigger

• Offset error:

P Before calibration: ±60mV max
P After calibration: ±1mV max

• Gain error:

P Before calibration: ±0.6% of output max
P After calibration: ±0.03% of output max for DAQ/PXI-2204

±0.01% of output max for DAQ/PXI-2205/2206

♦ Analog Output (AO)

• Number of channels: 2 analog voltage outputs

• D/A converter: LTC7545 or equivalent

• Maximum update rate: 1MS/s

• Resolution: 12 bits

• FIFO buffer size:

P 512 samples per channel when both channels are enabled for

timed output.

P 1024 samples when only one channel is used for timed output.

max

:

• Data transfers:

P Programmed I/O,
P Bus-mastering DMA with scatter/gather

8 • Introduction

• Output range: ±10V, 0~10V, ±AOEXTREF, 0~AOEXTREF

• Settling time: 3µS to 0.5LSB accuracy

• Slew rate: 20V/uS

• Output coupling: DC

• Protection: Short-circuit to ground

• Output impedance: 0.1Ω. max.

• Output driving: ±5mA max.

• Stability: Any passive load, up to 1500pF

• Power-on state: 0V steady-state

• Power-on glitch: ±1V/500uS

• Offset error:

P Before calibration: ±80mV max
P After calibration: ±1mV max

• Gain error:

P Before calibration: ±0.8% of output max
P After calibration: ±0.02% of output max

♦ General Purpose Digital I/O (G.P. DIO, 82C55A)

• Number of channels: 24 programmable Input/Output

• Compatibility: TTL

• Input voltage:

P Logic Low: VIL=0.8 V max.; IIL=0.2mA max.
P High: VIH=2.0V max.; IIH=0.02mA max

• Output voltage:

P Low: VOL=0.5 V max.; IOL=8mA max.
P High: VOH=2.7V min; IOH=400µA

Introduction • 9

• Synchronous Digital Inputs (SDI): For DAQ/PXI-2204 only

• Number of channels: 4 digital inputs sampled simu ltaneously with the

analog signal input.

• Compatibility: TTL/CMOS

• Input voltage:

P Logic Low: VIL=0.8 V max.; IIL=0.2mA max.
P High: VIH=2.0V max.; IIH=0.02mA max

♦ General Purpose Timer/Counter (GPTC)

• Number of channels: 2 independent Up/Down Timer/Counters

• Resolution: 16 bits

• Compatibility: TTL

• Clock source: Internal or external

• Max source frequency: 10MHz

♦ Analog Trigger (A.Trig)

• Source: All analog input channels; external analog trigger

(EXTATRIG)

• Level: ±Full-scale, internal; ±10V external

• Resolution: 8 bits

• Slope: Positive or negative (software selectable)

• Hysteresis: Programmable

• Bandwidth: 400khz

• External Analog Trigger Input (EXTATRIG):

P Input impedance: 40KO for DAQ/PXI-2204

20KO for DAQ/PXI-2205/2206

• Coupling: DC

• Protection: Continuous ± 35V maximum

10 • Introduction

♦ Digital Trigger (D.Trig)

• Compatibility: TTL/CMOS

• Response: Rising or falling edge

• Pulse Width: 10ns min

♦ System Synchronous Interface (SSI)

• Trigger lines: 7

♦ Stability

• Recommended warm-up time: 15 minutes

• On-board calibration reference:

P Level: 5. 000V
P Temperature coefficient: ±2ppm/°C
P Long-term stability: 6ppm/1000Hr

♦ Physical

• Dimension:

P 175mm by 107mm for DAQ-22XX
P Standard CompactPCI form factor for PXI-22XX

• I/O connector: 68-pin female VHDCI type (e.g. AMP-787254-1)

♦ Power Requirement (typical)

• +5VDC:

P 3A for DAQ/PXI-2204
P 2A for DAQ/PXI-2205/2206

♦ Operating Environment

• Ambient temperature: 0 to 55°C

• Relative humidity: 10% to 90% non-condensing

♦ Storage Environment

• Ambient temperature: -20 to 70°C

• Relative humidity: 5% to 95% non-condensing

Introduction • 11

1.4 Software Support

ADLINK provides versatile software drivers and packages for users’ dif­ferent approach to building up a system. ADLINK not only provides pro­gramming libraries such as DLL for most Windows based sy stems, but also
provide drivers for other software packages such as LabVIEW®.

All software options are included in the ADLINK CD. Non -free software
drivers are protected with licensing codes. Without the software code, you
can install and run the demo version for two hours for trial/demonstration
purposes. Please contact ADLINK dealers to purchase the formal license.

1.4.1 Programming Library

For customers who are writing their own programs, we provide function
libraries for many different operating systems, including:

• D2K-DASK: Include device drivers and DLL for Windows 98,

Windows NT and Windows 2000. DLL is binary compatible

across Windows 98, Windows NT and Windows 2000. This means
all applications developed with D2K-DASK are compatible across
Windows 98, Windows NT and Windows 2000. The developing
environment can be VB, VC++, Delphi, BC5, or any Windows pro­gramming language that allows calls to a DLL. The user’s guide
and function reference manual of D2K-DASK are in the CD.
(\\Manual_PDF\Software\D2K-DASK)

• D2K-DASK/X: Include device drivers and shared library for Linux.

The developing environment can be Gnu C/C++ or any program­ming language that allows linking to a shared library. The user's
guide and function reference manual of D2K-DASK/X are in the
CD. (\Manual_PDF\Software\D2K-DASK-X.)

1.4.2 D2K-LVIEW: LabVIEW® Driver

D2K-LVIEW contains the VIs, which are used to interface with NI’s Lab­VIEW® software package. The D2K-LVIEW supports Windows 98/NT/2000.
The LabVIEW® drivers is shipped free with the card. You can i nstall and
use them without a license. For detailed information about D2K-LVIEW,
please refer to the user’s guide in the CD.

(\\Manual_PDF\Software\D2K-LVIEW)

12 • Introduction

1.4.3 PCIS-OCX: ActiveX Controls

We suggest customers who are familiar with ActiveX controls and
VB/VC++ programming use PCIS-OCX ActiveX control component libra r­ies for developing applications. PCIS-OCX is designed for Windows
98/NT/2000. For more detailed information about PCIS-OCX, please refer
to the user's guide in the CD.

(\Manual_PDF\Software\PCIS-OCX\PCIS-OCX.PDF)
The above software drivers are shipped with the card. Please refer to the

“Software Installation Guide” in the package to install these drivers.
In addition, ADLINK supplies ActiveX control software DAQBench.

DAQBench is a collection of ActiveX controls for measurement or auto­mation applic ations. With DAQBench, you can easily develop custom user
interfaces to display your data, analyze data you acquired or received from
other sources, or integrate with popular applications or other data sources.
For more detailed information about DAQBench, please refer to the user's
guide in the CD.

(\Manual_PDF\Software\DAQBench\DAQBenchManual.PDF)
You can also get a free 4-hour evaluation version of DAQBench from the

CD.
DAQBench is not free. Please contact ADLINK dealer or ADLINK to pur-

chase the software license.

Introduction • 13