ADLINK cPCI-9116 User Manual

cPCI-9116®/cPCI-9116R®
64 Ch, 16 bit, 250KS/s
Analog input Card
For 3U CompactPCI
User’s Guide
Recycled Paper
©Copyright 2002 ADLINK Technology Inc.
All Rights Reserved.
Manual Rev. 1.10: April 28, 2003
Part No: 50-15002-101 The information in this document is subject to change without prior n otice in
order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the product or documentation, even if advised of the possibility of such damages.
This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer.
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NuDAQ®, NuIPC® are registered trademarks of ADLINK Technology Inc. Other products names mentioned herein are used for identification purposes
only and may be trademarks and/or registered trademarks of their respective companies.
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Customer Satisfaction is the most important priority for ADLINK Tech Inc. If you need any help or service, please contact us.
ADLINK Technology Inc.
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Please email or FAX us of your detailed information for a prompt, satisfactor y and constant service.
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Detailed Company Information
Questions
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Detail Description
Suggestions to ADLINK
Table of Contents
Tables..........................................................................................................iv
Figures.........................................................................................................v
Outline of Chapters.................................................................................... vi
Chapter 1 Introduction................................................................................1
1.1 Features..............................................................................................2
Applications ........................................................................................2
1.2
1.3 Specifications......................................................................................3
1.4 Software Support................................................................................6
1.4.1 Programming Library.............................................................6
1.4.2 PCIS-LVIEW: LabVIEW® Driver............................................6
1.4.3 DAQBenchTM: ActiveX Controls.............................................7
Chapter 2 Installation..................................................................................8
2.1 What You Have...................................................................................8
2.2 Unpacking...........................................................................................9
2.3 cPCI-9116 and cPCI-9116R Layout..................................................10
2.4 PCI Configuration..............................................................................12
Chapter 3 Signal Connections.................................................................13
3.1 Connectors and Pin Assignment.......................................................13
3.1.1 100-pin SCSI-type connector (J1) .......................................14
3.1.2 Legend of J1........................................................................15
3.2 Analog Input Signal Connection........................................................16
3.2.1 Types of signal sources.......................................................16
3.2.2 Input Configurations ............................................................16
3.3 Digital I/O Connection....................................................................... 18
Chapter 4 Registers..................................................................................19
4.1 I/O Port Address ...............................................................................19
4.2 Internal Timer/Counter Register........................................................21
4.3 General Purpose Timer/Counter Register.........................................22
4.4 General Purpose Timer/Counter Control Register............................22
4.5 A/D Data Registers...........................................................................24
4.6 Channel Gain Queue Register..........................................................24
4.7 A/D & FIFO Control Register ............................................................26
4.8 A/D & FIFO Status Register..............................................................27
4.9 Digital I/O register.............................................................................29
4.10 A/D Trigger Mode Register ...............................................................30
4.11 Interrupt Control Register..................................................................31
4.12 Interrupt Status Register...................................................................33
Table of Contents i
Chapter 5 Operation Theory.....................................................................34
5.1 A/D Conversion.................................................................................34
5.1.1 A/D Conversion Procedure..................................................34
5.1.2 Software conversion with polling data transfer acquisition
mode (Software Polling)......................................................35
5.1.3 Programmable scan acquisition mode.................................36
5.1.4 A/D Data Transfer Modes....................................................47
5.2 Digital Input and Output....................................................................48
5.3 General Purpose Timer/Counter Operation ......................................49
Chapter 6 C/C++ Library...........................................................................51
6.1 Libraries Installation..........................................................................51
6.2 Programming Guide..........................................................................52
6.2.1 Naming Convention.............................................................52
6.2.2 Data Types..........................................................................52
6.2.3 Sample Programs List (DOS)..............................................53
6.3 Initial functions..................................................................................54
6.3.1 _9116_Initial........................................................................ 54
6.3.2 _9116_AD_Clr_DFIFO........................................................55
6.4 DIO functions....................................................................................56
6.4.1 _9116_DI.............................................................................56
6.4.2 _9116_DO...........................................................................56
6.5 AD Channel Gain Queue configuration functions..............................57
6.5.1 _9116_AD_Clr_CFIFO........................................................57
6.5.2 _9116_AD_Set_CFIFO .......................................................58
6.5.3 _9116_AD_CFIFO_SetDone...............................................60
6.6 AD Software-Polling functions...........................................................61
6.6.1 _9116_AD_Acquire .............................................................61
6.7 AD Trigger control functions .............................................................62
6.7.1 _9116_AD_Trig_Ctrl............................................................62
_9116_AD_Set_TrigMode...................................................62
_9116_AD_Set_TrigPol.......................................................62
_9116_AD_Set_Timebase ..................................................62
_9116_AD_Set_Delay_SRC ...............................................62
_9116_AD_Set_M_enable ..................................................62
6.8 AD Counter setting functions ............................................................64
6.8.1 _9116_AD_Set_SC.............................................................64
6.8.2 _9116_AD_Set_SI...............................................................65
6.8.3 _9116_AD_Set_SI2.............................................................65
6.8.4 _9116_AD_Set_DIV............................................................66
6.8.5 _9116_AD_Set_DLY1.........................................................66
6.8.6 _9116_AD_Set_M...............................................................67
6.8.7 _9116_AD_Set_Retrig.........................................................68
ii Table of Contents
6.9 AD one-shot scan data acquisition with DMA transfer functions.......69
6.9.1 _9116_AD_DMA_Start........................................................69
6.9.2 _9116_AD_DMA_Status .....................................................70
6.9.3 _9116_AD_DMA_Stop........................................................71
6.10 AD one-shot scan data acquisition with interrupt- transfer functions.72
6.10.1 _9116_AD_INT_Start..........................................................72
6.10.2 _9116_AD_INT_Status........................................................73
6.10.3 _9116_AD_INT_Stop ..........................................................74
6.11 AD continuous scan data acquisition with double-buffered DMA
transfer functions ..............................................................................75
6.11.1 _9116_DblBufferMode........................................................75
6.11.2 _9116_DblBufferTransfer ....................................................76
6.11.3 _9116_GetOverrunStatus....................................................77
6.12 General Purpose Timer/Counter functions........................................77
6.12.1 _9116_GP0_Set_Mode.......................................................77
6.12.2 _9116_GP0_Set_Count ......................................................78
6.12.3 _9116_GP0_Set_CLK.........................................................78
6.12.4 _9116_GP0_Set_GATE_SRC.............................................79
6.12.5 _9116_GP0_Set_UPDOWN_SRC......................................79
6.12.6 _9116_GP0_Set_UPDOWN................................................80
6.12.7 _9116_GP0_EN ..................................................................80
6.12.8 _9116_GP0_Read_Count ...................................................81
Chapter 7 Software Utility & Calibration.................................................82
7.1 Running 9116util.exe program..........................................................82
7.2 Calibration.........................................................................................83
7.2.1 What do you need ...............................................................83
7.2.2 VR Assignment....................................................................84
7.2.3 A/D Adjustment ...................................................................84
7.3 Functional Testing.............................................................................85
Warranty Policy.........................................................................................87
Table of Contents iii
Tables
Table 1. Legend of J1 Connector......................................................15
Table 2. I/O Port Address..................................................................20
Table 3. Timer/Counter Register Address.........................................21
Table 4. General Purpose Timer/Counter Register...........................22
Table 5. General Purpose Timer/Counter Control Register...............22
Table 6. GPTC0’s Mode selection.....................................................23
Table 7. A/D Data Registers..............................................................24
Table 8. Channel Gain Queue Register ............................................24
Table 9. Gain Selection Bits..............................................................25
Table 10. A/D & FIFO Control Register...............................................26
Table 11. A/D & FIFO Status Register ................................................27
Table 12. Digital I/O register (Read)....................................................29
Table 13. Digital I/O register (Write)....................................................29
Table 14. A/D Trigger Mode Register..................................................30
Table 15. Trigger Mode Selection Bits ................................................31
Table 16. Interrupt Control Register....................................................31
Table 17. Interrupt Status Register......................................................33
Table 18. Functions of VRs.................................................................84
iv Tables
Figures
Figure 1: PCB Layout of the cPCI-9116 .............................................10
Figure 2: PCB Layout of cPCI-9116R and Rear I/O adaptor .............. 11
Figure 3: J1 Pin Assignments.............................................................14
Figure 4: Single-ended Mode and Floating sources...........................16
Figure 5: Ground-referenced source and differential input .................17
Figure 6: Floating source and differential input...................................17
Figure 7: Ground-referenced source and User Common Mode
connections.........................................................................18
Figure 8: Digital I/O Connection..........................................................18
Figure 9: Scan Timing ........................................................................37
Figure 10: Pre-trigger (trigger occurs after M scans)............................40
Figure 11: Pre-trigger (trigger with scan is in progress)........................40
Figure 12: Pre-trigger with M_enable = 0 (trigger occurs before M
scans)..................................................................................41
Figure 13: Pre-trigger with M_enable = 1 ............................................. 42
Figure 14: Middle trigger with M_enable = 1.........................................43
Figure 15: Middle trigger (trigger with scan is in progress)...................44
Figure 16: Post trigger..........................................................................44
Figure 17: Delay trigger........................................................................45
Figure 18: Post trigger with re-trigger...................................................46
Figure 19: General-purpose Timer/Counter model...............................49
Figure 20: Mode 0 Operation................................................................50
Figure 21: Mode 1 Operation................................................................50
Figure 22: CPCI-9116 Utility Main Screen............................................83
Figure 23: A/D Adjustment menu Screen.............................................84
Figure 24: cPCI-9116 Function Testing Screen....................................86
Figures v
Outline of Chapters
This manual is designed to help you use the 9116 series. The manual describes how to modify various settings on the card to meet your requirements. It is divided into seven chapters:
Chapter1, “Introduction”,
applications, and specifications.
Chapter 2, “Installation”,
layout of 9116 series is shown.
Chapter 3, “Signal Connection”,
assignment and how to connect external signal and devices to the 9116 series card.
Chapter 4, “Registers”,
structure. This information is important for programmers who want to control the hardware with low-level programming.
Chapter 5, “Operation theory”,
9116 series card. The A/D, DIO and timer/counter functions are introduced. Also, some programming concepts are specified.
Chapter 6, “Software Utility & Calibration”,
utility program included in the software CD and how to calibrate the 9116 series card for accurate measurements.
gives an overview of the product features,
describes how to install the 9116 series. The
describes the connectors' pin
describes the details of the registers and its
describes the working theory of the
describes how to run the
vi Outline of Chapters
1
Introduction
The cPCI-9116 series products are advanced data acquisition cards based on the 32-bit CompactPCI architecture. The 9116 series include:
cPCI-9116: 16-bit 250KHz DAS card for 3U CompactPCI
cPCI-9116R: 16-bit 250KHz DAS card for 3U CompactPCI
with Rear I/O connector
The 9116 series DAS cards use state-of-the-art technology making it an ideal for data logging and signal analysis applica tions in medical, process control, etc.
Introduction 1
1.1 Features
The 9116 series CompactPCI Advanced Data Acquisition Card provides the following advanced features:
32-bit PCI-Bus, plug and play
Up to 64 single-ended inputs or 32 differential inputs, mixing
of using SE and DI analog signal sources
16-bit analog input resolution
On-board A/D 1K FIFO memory
512 words analog input Channel Gain Queue spaces
Sampling rate up to 250KS/s
Bipolar or Unipolar input signals
Programmable gain of x1, x2, x4, x8
Jumper-less and software configurable
Five A/D trigger modes: software trigger, pre-trigger,
post-trigger, middle-trigger and delay-trigger
Software Polling, Interrupt and Bus-mastering DMA data
transfer available
8 digital input and 8 digital output channels
100-pin D-type SCSI-II connector for cPCI-9116
100-pin D-type SCSI-II connector on a rear I/O transition
board for cPCI-9116R
Compact size: standard compact PCI 3U size
1.2 Applications
Automotive Testing
Cable Testing
Transient signal measurement
ATE
Laboratory Automation
Biotech measurement
2 Introduction
1.3 Specifications
Analog Input (A/D)
Converter:
Number of channels: (programmable)
64 single-ended (SE)
3
32 differential input (DI)
3
Mixing of SE and DI analog signal between channel allowed
3
A/D Data FIFO Buffer Size:
Channel Gain Queue Length:
Resolution:
Input Range:
Bipolar:
3
Unipolar:
3
CMRR (DC to 60 Hz, typical)
Input Range CMRR
LT1606 (or equivalent) 250KHz
16-bit
(Controlled by Channel Gain Queue)
± 5V, ±2.5V, ±1.25V, ±0.625V
0~10V, 0~5V, 0~2.5V, 0~1.25
1024 locations
512 words configurations
±5, 0~10V
±2.5, 0~5V
±1.25, 0~2.5V
±0.625, 0~1.25V
Overvoltage Protection:
Accuracy:
Input Impedance:
Time-base source:
3
3
Programmable scan interval and sampling rate (divided from
0.01% of FSR
Internal 24MHz External clock Input (fmax: 24MHz, fmin: 1MHz)
87dB 90dB 92dB 93dB
Continuous ± 35V maximum
100 MΩ | 6pF
time-base source)
Introduction 3
Trigger Mode:
Software-trigger.
3
Pre-trigger.
3
Post-trigger.
3
Middle-Trigger.
3
Delay Trigger
3
Data Transfer:
Polling.
3
EOC interrupt transfer.
3
FIFO half-full Interrupt transfer.
3
Bus-mastering DMA.
3
Data Throughput:
Digital I/O (DIO)
Channel:
Input Voltage:
3
3
Output Voltage:
3
3
General Purpose Timer/ Counter
Number of channel:
Clock Input:
8 TTL compatible digital inputs and outputs
Low: VIL=0.8 V max. IIL=0.2mA max. High: VIH=2.0V max. IIH=0.02mA max
Low: VOL=0.5 V max. IOL=8mA max. High: VOH=2.7V min; IOH=400μA
Internal 24MHz or External CLK input up to 20MHz
250KHz (maximum)
One 16-bit Up/Down Timer/Counter
4 Introduction
General Specifications
Connector:
Operating Temperature:
Storage Temperature:
Humidity:
Power Consumption:
+5V @ 560mA typical
3
+3.3V@ 100mA typical
3
15V (pin35, pin85) Output Current (max):
±
+5V(pin49, pin99) Output Current (max):
Dimension:
100-pin D-type SCSI-II connector
0° C ~ 60° C
-20° C ~ 80° C
5 ~ 95%, non-condensing
Standard Compact PCI 3U size
5mA
500mA
Introduction 5
1.4 Software Support
ADLINK provides versatile software drivers and packages for users’ different approach to building a system. We not only provide programming libraries such as DLL for many Windows systems, but also provide drivers for other software packages such as LabVIEW®.
All software options are included in the ADLINK CD. Non-free software drivers are protected with licensing codes. Without the software code, you can install and run the demo version for two hours for trial/demonstration purposes. Please contact ADLINK dealers to purchase the formal license.
1.4.1 Programming Library
For customers who are writing their own programs, we provide function libraries for many different operating systems, including:
PCIS-DASK: Include device drivers and DLL for Windows
98, Windows NT and Windows 2000. DLL is binary compati bl e across Windows 98, Windows NT and Windows 2000. That means all applications developed with PCIS-DASK are compatible across Windows 98, Windows NT and Windows
2000. The developing environment can be VB, VC++, Delphi, BC5, or any Windows programming language that allows calls to a DLL. The user’s guide and function reference manual of PCIS-DASK are in the CD. Please refer the PDF manual files under \\Manual_PDF\Software\PCIS-DASK
PCIS-DASK/X: Includes device drivers and shared library for
Linux. The developing environment can be Gnu C/C++ or any programming language that allows linking to a shared librar y. The user's guide and function reference manual of PCIS-DASK/X are in the CD. (\Manual_PDF\Software\PCIS-DASK-X.)
The above software drivers are shipped with the board. Please refer to the “Software Installation Guide” for installation procedures.
1.4.2 PCIS-LVIEW: LabVIEW® Driver
PCIS-LVIEW contains the VIs, which are used to interface with NI’s LabVIEW® software package. The PCIS-LVIEW supports Windows 95/98/NT/2000. The LabVIEW® drivers is shipped free with the board. You can install and use them without a license. For more information about PCIS-LVIEW, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\PCIS-LVIEW)
6 Introduction
1.4.3 DAQBenchTM: ActiveX Controls
We suggest customers who are familiar with ActiveX controls and VB/VC++ programming use the DAQBenchTM ActiveX Control component library for developing applications. The DAQBenchTM is designed under Windows NT/98. For more information about DAQBench, please refer to the user’s guide in the CD. (\\Manual_PDF\Software\DAQBench\DAQBench Manual.PDF).
Introduction 7
2
Installation
This chapter describes how to install the 9116 series cards. The contents of the package and unpacking information that you should be aware of are described first.
The 9116 series cards perform an automatic configuration of the IRQ, port address, and BIOS address. You do not need to set these configurations, as you would do in ISA form factor DAS cards. Automatic configuration allows your system to operate more reliable and safe.
2.1 What You Have
In addition to this User's Guide, the package should also include the following items:
cPCI-9116 or cPCI-9116R with rear I/O adaptor Analog input
Data Acquisition Card
ADLINK All-in-one Compact Disc
Software Installation Guide
If any of these items are missing or damaged, contact the dealer from whom you purchased the product. Save the shipping materials and carton in case you want to ship or store the product in the future.
8 Installation
2.2 Unpacking
The card contains electro-static sensitive components tha t can be easily be damaged by static electricity.
Therefore, the card should be handled on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat.
Inspect the card module carton for obvious damages. Shipping and handling may cause damage to your module. Be sure there are no shipping and handling damages on the modules carton before continuing.
After opening the card module carton, extract the system module and place it only on a grounded anti-static surface with component side up.
Again, inspect the module for damages. Press down on all the socketed IC's to make sure that they are properly seated. Do this only with the module place on a firm flat surface.
Note:
DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED.
You are now ready to install your cPCI-9116/R.
Installation 9
2.3 cPCI-9116 and cPCI-9116R Layout
10 Installation
Figure 1: PCB Layout of the cPCI-9116
Figure 2: PCB Layout of cPCI-9116R and Rear I/O adaptor
Installation 11
2.4 PCI Configuration
1. Plug and Play:
As a plug and play component, the board requests an interrupt number via a system call. The system BIOS responds with an interrupt assignment based on the board information and on known system parameters. These system parameters are determined by the installed drivers and the hardware load seen by the system.
2. Configuration:
The board configuration is done on a board-by-boar d basis for all PCI form factor boards on your system. Because configuration is controlled by the system and software, so there is no jumpers for base-address, DMA, and interrupt IRQ need to be set by the user.
The configuration is subject to change with every boot of the s ystem as new boards are added or boards are removed. So, there is no idea what‘s going on to be installed.
3. Trouble shooting:
If your system doesn’t boot or if you experience erratic operation with your PCI board in place, it’s likely caused by an interrupt conflict (perhaps because you incorrectly configured the BIOS setup). In general, the solution, once you determine it is not a simple oversight, is to consult the BIOS documentation that came with your system.
12 Installation
3
Signal Connections
This chapter describes the connectors of the 9116 series. The signal connections between the 9116 series cards and external devices are also outlined.
3.1 Connectors and Pin Assignment
The cPCI-9116 is equipped with one 100-pin SCSI-type connector (J1). J1 is used for digital input/output, analog input, and timer/counter signals. The
pin assignment for the connector is illustrated in the Figure 3.1. With the REAR I/O adaptor specifically designed for the cPCI-9116R, the
cPCI-9116R connector pin assignments are identical to that of the cPCI-9116. The red LED positioned on the front panel is used as a power indicator.
Signal Connections 13
3.1.1 100-pin SCSI-type connector (J1)
U_CMMD 1 51 AGND AIH0 AI0 2 52 AI32 AIL0 AIH1 AI1 3 53 AI33 AIL1 AIH2 AI2 4 54 AI34 AIL2 AIH3 AI3 5 55 AI35 AIL3 AIH4 AI4 6 56 AI36 AIL4 AIH5 AI5 7 57 AI37 AIL5 AIH6 AI6 8 58 AI38 AIL6 AIH7 AI7 9 59 AI39 AIL7 AIH8 AI8 10 60 AI40 AIL8 AIH9 AI9 11 61 AI41 AIL9
AIH10 AI10 12 62 AI42 AIL10 AIH11 AI11 13 63 AI43 AIL11 AIH12 AI12 14 64 AI44 AIL12 AIH13 AI13 15 65 AI45 AIL13 AIH14 AI14 16 66 AI46 AIL14 AIH15 AI15 17 67 AI47 AIL15 AIH16 AI16 18 68 AI48 AIL16 AIH17 AI17 19 69 AI49 AIL17 AIH18 AI18 20 70 AI50 AIL18 AIH19 AI19 21 71 AI51 AIL19 AIH20 AI20 22 72 AI52 AIL20 AIH21 AI21 23 73 AI53 AIL21 AIH22 AI22 24 74 AI54 AIL22 AIH23 AI23 25 75 AI55 AIL23 AIH24 AI24 26 76 AI56 AIL24 AIH25 AI25 27 77 AI57 AIL25 AIH26 AI26 28 78 AI58 AIL26 AIH27 AI27 29 79 AI59 AIL27 AIH28 AI28 30 80 AI60 AIL28 AIH29 AI29 31 81 AI61 AIL29 AIH30 AI30 32 82 AI62 AIL30 AIH31 AI31 33 83 AI63 AIL31
AGND 34 84 AGND
+15V out 35 85 -15V out
N/C 36 86 N/C
DI0 37 87 DO0
DI1 38 88 DO1
DI2 39 89 DO2
DI3 40 90 DO3
DI4 41 91 DO4
DI5 42 92 DO5
DI6 43 93 DO6
DI7 44 94 DO7
ExtTimeBase 45 95 N/C
ExtTrg 46 96 GP_TC_CLK
SSH_OUT 47 97 GP_TC_GATE
GP_TC_OUT 48 98 GP_TC_UPDN
+5V Out 49 99 +5V out
DGND 50 100 DGND
Figure 3: J1 Pin Assignments
14 Signal Connections
3.1.2 Legend of J1
Signal Name Definition
U_CMMD User Common Mode AIn Analog Input Channel n (single-ended) AIHn Analog High Input Channel n (differential) AILn Analog Low Input Channel n (differential) DIn Digital Input Signal Channel n DOn Digital Output Signal Channel n ExtTimeBase External Timebase Clock Input ExtTrg External Digital Trigger Signal SSH_OUT SSH Output Signal GP_TC_CLK General Purpose Timer/Counter Clock Input GP_TC_GATE General Purpose Timer/Counter Gate Input
GP_TC_UPDN GP_TC_OUT General Purpose Timer/Counter Output
+5V OUT +5V Output +15V OUT +15V Output
-15V OUT -15V Output AGND Analog Ground DGND Digital Ground N/C No Connection
Purpose Timer/Counter Up/Down Control Input (0:down, 1:up)
Table 1. Legend of J1 Connector
Signal Connections 15
AInA
A
3.2 Analog Input Signal Connection
The 9116 series provides up to 64 single-ended or 32 differential analog input channels. You can set and fill the Channel Gain Queue to get the desired combination of the input signal types. The analog signals can be converted to digital value by the A/D converter. To avoid ground loops and to obtain accurate measurements from the A/D conversion, it is quite important to understand the signal source type and how to choose the analog input modes: Single-ended, Differential, or User Common Mode.
3.2.1 Types of signal sources
Floating Signal Sources
A floating signal source means it is not connected in any way to the buildings ground system. A device with an isolated output is a floating signal sour ce, such as optical isolator outputs, transformer outputs, and thermocouples
Ground-Referenced Signal Sources
A ground-referenced signal means it is connected in some way to the buildings system. That is, the signal source is already connected to a common ground point with respect to the 9116 card, assuming that the computer is plugged into the same power system. Non- isolated outputs of instruments and devices that plug into the buildings power system are ground-referenced signal sources.
3.2.2 Input Configurations
Single-ended Mode
In single-ended mode, all input signals are connected to g round provided by the 9116 card. It is suitable for connections with floating signal sources. Figure 4 illustrates single-ended connection. Note that when more than t wo floating sources are connected, these sources will be referenced to the same common ground.
Floating Signal Source
V1
n = 0, ...,63
V2
J1
Input Multipexer
GND
Instrumentation
mplifier
-
To A/D Converter
-
Figure 4: Single-ended Mode and Floating sources
16 Signal Connections
A
A
x
A
A
r
A
A
x
A
A
r
Differential input mode The differential input mode provides two inputs that respon d to signal voltage
differences between them. If the signal source is ground- referenced, the differential mode can be used for common-mode noise rejection. Figure 5 shows the connection of ground-referenced signal sources under different ial input mode.
Ground Referenced Signal Source
Common­mode noise & Ground potential
Vcm
= 0, ..., 31
Figure 5: Ground-referenced source a nd differential input
Fig 6 shows how to connect a floating signal source to the 9116 card in differential input mode. For floating signal sources, a resistor is required on each channel to provide a bias return path. The resistor value should be about 100 times the equivalent source impedance. If the source impedance is less than 100ohms, simply connect the negative side of the signal to AGND as well as the negative input of the Instrumentation Amplifier, without any resistors. In differential input mode, less noise is coupled into the signal connections than in single-ended mode.
Ground Reference d Signal Source
= 0, ..., 31
IxH
IxL
IxH
IxL
In put Multipexer
+
-
GND
Inpu t Multipexer
+
-
Instrumentation
mplifie
To A /D Converter
-
Instrumentation
mplifie
To A /D Converter
-
GND
Figure 6: Floating source and differential input
Signal Connections 17
A
A
User Common Mode (U_CMMD)
To measure ground-referenced signal sources, which are connected to the same ground point, you can connect the signals in a User-Common-Mode (U_CMMD) configuration. Fig 7 illustrates the connections. The signal local ground reference is connected to the negative input of the instrumentation Amplifier, and the common-mode ground potential to signal ground. The instrumentation amplifier will now reject the 9116 series ground.
In
U_CMMD
Input Multipexer
-
Instrumentation
mplifier
To A/D
-
Converter
Ground­Referenced Signal Source
Common­mode noise & Ground potential
V1
Vcm
V2
n = 0, ...,63
Figure 7: Ground-referenced source a nd User Common Mode connections
3.3 Digital I/O Connection
The 9116 series card provides 8 digital input and 8 digital output channels. The digital I/O signals are fully TTL/DTL compatible. The details of the digital I/O signal specification can be found in section 1.3.
74LS244
From TTL Signal
To TTL Devices
Digital Input(DI)
Digital Output(DO)
Digital GND(DGND)
74LS244
Figure 8: Digital I/O Connection
18 Signal Connections
4
Registers
The descriptions of the registers and structure of the cPCI-9116 are outlined in this chapter. The information in this chapter will assist programmers, who wish to handle the card with low-level programs.
In addition, the low level programming syntax is introduced. This information can help beginners to operate the cPCI-9116 in the shortest possible time.
4.1 I/O Port Address
The 9116 series card functions as a 32-bit PCI master device to any master on the PCI bus. It supports burst transfer to memory space by using 32-bit data. All data read and write are based on 32-bit transactions. Table 2 shows the I/O address of each register with respect to the base address. The function of each register is also shown.
Registers 19
I/O Address Read Write
Base + 0x00 Scan Interval Counter Scan Interval Counter Base + 0x04 Sample Interval Counter Sample Interval Counter Base + 0x08 Scan Counter Scan Counter Base + 0x0C DIV Counter DIV Counter Base + 0x10 Delay1 Counter Delay1 Counter Base + 0x14 M Counter M Counter Base + 0x18 GP Counter/Timer 0 GP Counter/Timer 0 Base + 0x1C X X Base + 0x20 X GP Counter/Timer Control Reg
Base + 0x24 A/D FIFO Data Reg
Base + 0x28 A/D and FIFO Status Reg. A/D and FIFO Control Reg. Base + 0x2C X X Base + 0x30 Digital IN Reg.(Dout) Digital OUT Reg. Base + 0x34 X A/D Trigger Mode Reg. Base + 0x38 Interrupt Reason Reg. Interrupt Control Reg.
Table 2. I/O Port Address
Config. Channel Gain Queue Reg..
20 Registers
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