ADLINK cPCI-7249R User Manual

®

NuDAQ

cPCI-7248/7249R

PCI-7224/7248/7296

24/48/96-CH Digital I/O Card

Users’ Guide

Recycled Paper

©Copyright 1997~2002 ADLINK Technology Inc.

All Rights Reserved.

Manual Rev. 2.60: April 25, 2003

Part No. 50-11104-201

The information in this document is subject to change without prior notice in
order to improve reliability, design and function and does not represent a
commitment on the part of the manufacturer.

In no event will the manufacturer be liable for direct, indirect, special,
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Technology Inc.

Other product names mentioned herein are used for identification purposes
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companies.

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Table of Contents

Introduction................................................................................1

1.1

1.2

1.3

1.4

Features .................................................................................2

1.1.1 Digital I/O Ports ................................................................................2

1.1.2 Timer/Counter and Interrupt System.................................................2

1.1.3 Miscellaneous ...................................................................................2

Applications ............................................................................2

Specifications .........................................................................3

Software Supporting...............................................................4

1.4.1 Programming Library ........................................................................4

1.4.2 PCIS-LVIEW: LabVIEW® Driver .......................................................5

1.4.3 PCIS-VEE: HP-VEE Driver ...............................................................5

1.4.4 DAQBenchTM: ActiveX Controls........................................................5

1.4.5 DASYLabTM PRO..............................................................................5

1.4.6 PCIS-DDE: DDE Server and InTouchTM..........................................5

1.4.7 PCIS-ISG: ISaGRAFTM driver ...........................................................6

1.4.8 PCIS-ICL: InControlTM Driver ............................................................6

1.4.9 PCIS-OPC: OPC Server ...................................................................6

Installation..................................................................................7

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

What You Have ......................................................................7

Unpacking...............................................................................8

PCB Layout ............................................................................9

2.3.1 PCI-7248/7224 PCB Layout .............................................................9

2.3.2 PCI-7296 PCB Layout ......................................................................9

2.3.3 cPCI-7248 PCB Layout...................................................................10

2.3.4 cPCI-7249R PCB Layout ................................................................10

Hardware Installation............................................................11

Device Installation for Windows Systems ............................12

Connector Pin Assignment................................................... 13

2.6.1 Pin Assignment of PCI-7224/7248/7296.........................................13

2.6.2 Pin Assignment of cPCI-7248.........................................................14

2.6.3 Pin Assignment of cPCI-7249R ......................................................15

2.6.4 R7249 OPTO-22 Connectors .........................................................16

Jumpers Description.............................................................17

2.7.1 Power on Status of Ports ................................................................17

2.7.2 12V Power Supply Configuration ....................................................18

Termination Boards Connection........................................... 18

Table of Contents • i

Registers Format ..................................................................... 20

3.1

3.2

PCI PnP Registers ...............................................................20

I/O Address Map ..................................................................21

Operation Theorem.................................................................. 22

4.1

4.2

4.3

4.4

Digital I/O Ports ....................................................................22

4.1.1 Introduction.....................................................................................22

4.1.2 8255 Mode 0...................................................................................22

4.1.3 Special Function of the DIO Signals ...............................................22

4.1.4 Digital I/O Port Programming..........................................................23

4.1.5 Control Word ..................................................................................23

4.1.6 Power on Configuration ..................................................................24

4.1.7 Note for Output Data.......................................................................24

4.1.8 Note for cPCI-7249R ......................................................................24

Timer/Counter Operation......................................................25

4.2.1 Introduction.....................................................................................25

4.2.2 General Purpose Timer/Counter.....................................................25

4.2.2 Cascaded 32 Bits Timer .................................................................26

4.2.3 Event Counter and Edge Control ....................................................26

Interrupt Multiplexing ............................................................26

4.3.1 Architecture ....................................................................................26

4.3.2 IRQ Level Setting............................................................................27

4.3.3 Note for Dual Interrupts ..................................................................27

4.3.4 Interrupt Source Control .................................................................28

12V and 5V Power Supply ...................................................29

C/C++ Libraries ........................................................................ 30

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.10 Timer Read........................................................................... 41

5.11 Timer Stop ............................................................................ 42

5.12 Cascaded Timer ...................................................................43

5.13 Get IRQ Status .....................................................................44

Libraries Installation ............................................................30

Programming Guide .............................................................31

5.2.1 Naming Convention ........................................................................31

5.2.2 Data Types .....................................................................................31

_7248/96_Initial ....................................................................32

Digital Input...........................................................................33

Digital Output........................................................................ 35

Configuration Port ................................................................36

Configuration Channel..........................................................37

Set Interrupt Control .............................................................39

Timer Start............................................................................40

ii • Table of Contents

5.14 Clear IRQ..............................................................................45

5.15 Software Reset..................................................................... 45

5.16 Interrupt Start under Windows .............................................46

5.17 Interrupt Stop under Windows.............................................. 47

Warranty Policy........................................................................ 48

Table of Contents • iii

How to Use This Guide

This manual is designed to help you use the 7248/96 series products. It
describes how to modify and control various functions on the cards to meet
your requirements. It is divided into five chapters:

Chapter 1, Introduction

z

applications, and specifications.

Chapter 2, Installation

z

products. The layout of are shown, the jumper settings, the connectors
specifications, and the notes for installation are described.

Chapter 3, Registers Format

z

and format of the PCI-7224/7248/7296.

Chapter 4, Operation Theorem

z

versatile functions, including DIO, timer / counter, and interrupt systems.

Chapter 5, C/C++ Library

z

under DOS environment that makes you can operate the functions on this
card easily.

, gives an overview of the product features.

, describes how to install the 7248/96 series

, describes the low-level register structure

, describes more details about the

specifies the software library of C language

1

Introduction

The 7248/7296 series products are general purpose digital I/O cards. This
series includes four cards:

z PCI-7224: 24-CH DIO card
z PCI-7248: 48-CH DIO card
z PCI-7296: 96-CH DIO card
z cPCI-7248: 3U CompactPCI 48-CH DIO card
z cPCI-7249R: 3U CompactPCI 48-CH DIO card with Rear I/O

The 7248 series products are multi-function digital I/O boards used for
industrial PC with PCI bus or CompactPCI bus. The cards are plug-and-play
therefore it is not necessary to set any jumper for configuration of I/O address
or interrupt resources.

PCI-7248 and PCI-7296 are 48-channel and 96-channel DIO cards
respectively. PCI-7224 is a reduced version of PCI-7248, all the functions are
exactly the same as PCI-7248 except there are 24 channels only. The cPCI­7248 is the 3U CompactPCI version of the PCI-7248. The software is fully
compatible with the PCI-7248. In this manual, the PCI-7224 and cPCI-7248’s
specifications are the same as the PCI-7248 if not specified.

The PCI-7248 emulates two industry standard 8255 Programmable
Peripheral Interface (PPI) chips operated under mode zero configuration.
The PCI-7296 emulates four PPI chips. These two cards are compatible not
only on hardware connectors but also on software programming.

The cPCI-7248 is the CompactPCI version of PCI-7248. All the functions are
exactly the same as PCI-7248. The cPCI-7249 is cPCI-7248’s extended
version, which include one more latch register and with rear I/O capability.

Every PPI connector offers has 3 ports: PA, PB, and PC. The PC can also be
subdivided into 2 nibble-wide ( 4-bit) ports - PC Upper and PC Low. Each
connector is corresponding to one PPI chip with 24 DIO points. PCI­7224/7248/7296 are equipped with 1,2, and 4 50-pin male ribbon connectors
respectively. The cPCI-7248 is equipped with one 100-pin SCSI-type
connector.

Introduction • 1

1.1 Features

The 7248/96 series products provide the following advanced features:

1.1.1 Digital I/O Ports

z 24/ 48/96 TTL/DTL compatible digital I/O lines
z Emulates industry standard mode 0 of 8255 PPI
z Buffered circuits for higher driving
z Direct interface with OPTO-22 compatible I/O module
z Output status read-back

1.1.2 Timer/Counter and Interrupt System

z A 32 bits timer to generate watchdog timer interrupt
z A 16 bits event counter to generate event interrupt
z Programmable interrupt source
z Dual interrupt system

1.1.3 Miscellaneous

z Provide 12V and 5V power supply on OPTO-22 connectors
z On board resettable fuses to protect power supply for external devices

1.2 Applications

z Programmable mixed digital input & output
z Industrial monitoring and control
z Digital I/O control
z Contact closure, switch/keyboard monitoring
z Connects with OPTO-22 compatible modules
z Useful with A/D and D/A to implement a data acquisition & control

system

2 • Introduction

1.3 Specifications

I/O channels

24-bit for PCI-7224
48-bit for PCI-7248
96-bit for PCI-7296
48-bit for cPCI-7248 and cPCI-7249R

Digital Input Signal

Logic High Voltage:2.0 V to 5.25V
Logic Low Voltage: 0.0 V to 0.80V
Logic High Current: 20.0 uA
Logic Low Current: -0.2 mA

Digital Output Signal

Logic High Voltage: Minimum 2.4 V
Logic Low Voltage: Maximum 0.5V
Logic High Current: -15.0 mA
Logic Low Current: 24.0 mA

Operating Temperature
Storage Temperature
Humidity
I/O Connectors

0 °C ~ 60°C

-20°C ~ 80°C
5% ~ 95% non-condensing
50-pin male ribbon cable connectors for PCI­7224/7248/7296 or
100-pin SCSI-type connectors for cPCI-7248

Bus

PCI bus for PCI-7224/7248/7296
3U 32-bit CompactPCI Bus for cPCI-7248

Power Consumption
(without external devices)

PCI-7224:

330mA @5VDC (Typical)
350mA @5V

PCI-7248:

500mA @5V
540mA @5V

PCI-7296:

860mA @5V
940mA @5V

cPCI-7248:

470mA @5V
560mA @5V

cPCI-7249R:

700mA @5VDC ( Typical)

Transfer Rate

500 K bytes/sec (Maximum)

PCB Dimension PCI-7224:

PCI-7248:
PCI-7296:
cPCI-7248:
cPCI-7249R:

with Rear I/O option

(Maximum)

DC

(Typical)

DC

(Maximum)

DC

(Typical)

DC

(Maximum)

DC

(Typical)

DC

(Maximum)

DC

148mm x 102mm
148mm x 102mm
166mm x 102mm

3U CompactPCI form factor

3U CompactPCI form factor, J2

Introduction • 3

1.4 Software Supporting

ADLINK provides versatile software drivers and packages for users’ different
approach to built-up a system. We not only provide programming library such
as DLL for many Windows systems, but also provide drivers for many

software package such as LabVIEW
InControl

TM

, ISaGRAFTM, and so on.

All the software options are included in the ADLINK CD. The non-free
software drivers are protected with serial licensed code. Without the software
serial number, you can still install them and run the demo version for two
hours for demonstration purpose. Please contact with your dealer to
purchase the formal license serial code.

1.4.1 Programming Library

For customers who are writing their own programs, we provide function
libraries for many different operating systems, including:

z DOS Library: Borland C/C++ and Microsoft C++, the functions

descriptions are included in this user’s guide.

z Windows 95 DLL: For VB, VC++, Delphi, BC5, the functions descriptions

are included in this user’s guide.

z PCIS-DASK: Include device drivers and DLL for

NT and Windows 2000

Windows NT and Windows 2000. That means all applications developed
with PCIS-DASK are compatible across Windows 98, Windows NT and
Windows 2000. The developing environment can be VB, VC++, Delphi,
BC5, or any Windows programming language that allows calls to a DLL.
The user’s guide and function reference manual of PCIS-DASK are in the
CD. Please refer the PDF manual files under the following directory:
\\Manual_PDF\Software\PCIS-DASK

z PCIS-DASK/X: Include device drivers and shared library for

developing environment can be Gnu C/C++ or any programming language
that allows linking to a shared library. The user's guide and function
reference manual of PCIS-DASK/X are in the CD.
(\Manual_PDF\Software\PCIS-DASK-X.)

z The above software drivers are shipped with the board. Please refer to

the “Software Installation Guide” to install these drivers.

. DLL is binary compatible across Windows 98,

®

, HP VEETM, DASYLabTM, InTouchTM,

Windows 98, Windows

Linux

. The

4 • Introduction

1.4.2 PCIS-LVIEW: LabVIEW® Driver

PCIS-LVIEW contains the VIs, which are used to interface with NI’s
LabVIEW
95/98/NT/2000. The LabVIEW® drivers are free shipped with the board. You
can install and use them without license. For detail information about PCIS-

LVIEW, please refer to the user’s guide in the CD.

(\\Manual_PDF\Software\PCIS-LVIEW)

®

software package. The PCIS-LVIEW supports Windows

1.4.3 PCIS-VEE: HP-VEE Driver

The PCIS-VEE includes the user objects, which are used to interface with HP
VEE software package. PCIS-VEE supports Windows 95/98/NT. The HP­VEE drivers are free shipped with the board. You can install and use them
without license. For detail information about PCIS-VEE, please refer to the
user’s guide in the CD.

(\\Manual_PDF\Software\PCIS-VEE)

1.4.4 DAQBenchTM: ActiveX Controls

We suggest the customers who are familiar with ActiveX controls and
VB/VC++ programming use the DAQBench
library for developing applications. The DAQBench
Windows NT/98. For more detailed information about DAQBench, please
refer to the user’s guide in the CD.

(\\Manual_PDF\Software\DAQBench\DAQBench Manual.PDF)

TM

ActiveX Control components

TM

is designed under

1.4.5 DASYLabTM PRO

DASYLab is an easy-to-use software package, which provides easy-setup
instrument functions such as FFT analysis. Please contact us to get
DASYLab PRO, which include DASYLab and ADLink hardware drivers.

1.4.6 PCIS-DDE: DDE Server and InTouchTM

DDE stands for Dynamic Data Exchange specifications. The PCIS-DDE
includes the PCI cards’ DDE server. The PCIS-DDE server is included in the
ADLINK CD. It needs license. The DDE server can be used conjunction with
any DDE client under Windows NT.

Introduction • 5

1.4.7 PCIS-ISG: ISaGRAFTM driver

The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program
development environment. The PCIS-ISG includes ADLink products’ target
drivers for ISaGRAF under Windows NT environment. The PCIS-ISG is
included in the ADLINK CD. It needs license.

1.4.8 PCIS-ICL: InControlTM Driver

PCIS-ICL is the InControl driver which support the Windows NT. The PCIS­ICL is included in the ADLINK CD. It needs license.

1.4.9 PCIS-OPC: OPC Server

PCIS-OPC is an OPC Server, which can link with the OPC clients. There are
many software packages on the market can provide the OPC clients now.
The PCIS-OPC supports the Windows NT. It needs license.

6 • Introduction

2

Installation

This chapter describes how to install the 7248/96 series products. At first, the
contents in the package and unpacking information that you should be careful
of are described.

z Check what you have (section 2.1)
z Unpacking (section 2.2)
z Check the PCB (section 2.3)
z Hardware installation (section 2.4)
z Device Installation for Windows System (section 2.5)
z Connector pin assignment (section 2.6)
z Jumpers setup (section 2.7)
z Termination boards connection (section 2.8)

2.1 What You Have

In addition to this User's Manual, the package includes the following items:

z The PCI or CompactPCI board
z ADLINK CD
z Software Installation Guide
z In cPCI-7249R box, a rear I/O transition board DB-100RU is included

If any of these items is missing or damaged, contact the dealer from whom
you purchased the product. Save the shipping materials and carton in case
you want to ship or store the product in the future.

Installation • 7

2.2 Unpacking

Your card contains sensitive electronic components that can be easily
damaged by static electricity.

The card should be put on a grounded anti-static mat. The operator should
wear an anti-static wristband, grounded at the same point as the anti-static
mat.

Inspect the card module carton for obvious damage. Shipping and handling
may cause damage to your module. Be sure there is no shipping and
handling damage on the module before processing.

After opening the card module carton, extract the system module and place it
only on a grounded anti-static surface with components side up.

Again inspect the module for damages. Press down on all the socketed IC's
to make sure that they are properly seated. Do this only with the module
place on a firm flat surface.

Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN

DAMAGED.

You are now ready to install your 7248/96 series product.

8 • Installation

2.3 PCB Layout

2.3.1 PCI-7248/7224 PCB Layout

Figure 2.3.1 PCI-7248/7224 PCB Layout

2.3.2 PCI-7296 PCB Layout

PCI
Controller

CN1 CN2 CN3 CN4

Figure 2.3.2 PCI-7296 PCB Layout

Installation • 9

2.3.3 cPCI-7248 PCB Layout

JC2 JB2 JA2

JA1 JB1 JC1

CN1

Figure 2.3.3 cPCI-7248 PCB Layout

2.3.4 cPCI-7249R PCB Layout

CPCI-7248

PCI Controller Chip

10 • Installation

Figure 2.3.4 cPCI-7249R Layout

2.4 Hardware Installation

PCI configuration

The PCI cards (or CompactPCI cards) are equipped with plug and play PCI
controller, it can request base addresses and interrupt according to PCI
standard. The system BIOS will install the system resource based on the PCI
cards’ configuration registers and system parameters (which are set by
system BIOS). Interrupt assignment and memory usage (I/O port locations)
of the PCI cards can be assigned by system BIOS only. These system
resource assignments are done on a board-by-board basis. It is not
suggested to assign the system resource by any other methods.

PCI slot selection

The PCI card can be inserted to any PCI slot without any configuration for
system resource. Please note that the PCI system board and slot must
provide bus-mastering capability to operate this board well.

PCI Installation Procedures

1.

Turn off your computer

2.

Turn off all accessories (printer, modem, monitor, etc.) connected to your
computer.

3.

Remove the cover from your computer.

4.

Setup jumpers on the PCI or CompactPCI card.

5.

Select a 32-bit PCI slot. PCI slot are short than ISA or EISA slots, and
are usually white or ivory.

6.

Before handling the PCI cards, discharge any static buildup on your body
by touching the metal case of the computer. Hold the edge and do not
touch the components.

7.

Position the board into the PCI slot you selected.

8.

Secure the card in place at the rear panel of the system.

Installation • 11

CompactPCI Installation Procedures

1.

Read through this manual, and setup the jumper according to your
application.

2.

Turn off your computer and turn off all accessories connected to
computer.

3.

Remove the slot cover from the CompactPCI.

4.

Select a 32-bit CompactPCI slot on the back plane for cPCI-7248 board.
Select a 32-bit CompactPCI slot with rear I/O extension for cPCI-7249R.

5.

Before handling the boards, discharge any static buildup on your body by
touching the metal case of the computer. Hold the edge and do not touch
the components.

6.

Position the board into the slot you selected.

7.

Secure the card on the back plane by using screw removed from the slot.

8.

Install the rear I/O transition board for cPCI-7249R.

2.5 Device Installation for Windows Systems

Once Windows 95/98/2000 has started, the Plug and Play function of
Windows system will find the new NuDAQ/NuIPC cards. If this is the first time
to install NuDAQ/NuIPC cards in your Windows system, you will be informed
to input the device information source. Please refer to the “Software
Installation Guide” for the steps of installing the device.

12 • Installation

2.6 Connector Pin Assignment

2.6.1 Pin Assignment of PCI-7224/7248/7296

The I/O ports of PCI-7224/7248/7296 emulate the mode 0 configuration of
the 8255 general purpose programmable peripheral interface. The cards
come equipped with 50-pin male IDC connectors that interface with OPTO-22.
Figure 2.4 shows the circuits and pinout of PCI-7224/7248/7296's connectors
(CN1~CN4) .

JPn

1

2

3

+12V

FUSE

PnC7

PnC6

PnC5

PnC4

PnC3

PnC2

PnC1

PnC0

PnB7

PnB6

PnB5

PnB4

PnB3

PnB2

PnB1

PnB0

PnA7

PnA6

PnA5

PnA4

PnA3

PnA2

PnA1

PnA0

+5V

F

E

CNn

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

41 42

43 44

45 46

47 48

49 50

HEADER 25X2

Figure 2.6.1 pin assignments and power signals of PCI-7224/7248/7296

The DIO pin names are specified as PnXb, where

n : means the connector reference number n=1~4.
X : means the port name, X= ‘A’ , ‘B’ or ‘C’
b : means the bit number of a port, b=0~7

For example, P1C4 means bit 4 of port C on connector CN1.

Note:

1. The pinout of the CN1 ~ CN4 connectors are identical.

2. The power supply pins are protected by resetable fuses. Refer to section

4.4 for details of the power supply.

Installation • 13

2.6.2 Pin Assignment of cPCI-7248

The cPCI-7248 is equipped a SCSI-type 100-pin connector. The pin
assignment is described in Figure 2.6.2

(1)
(2)
(3)

(48)
(49)
(50)

The DIO pin names are specified as PnXb, where

For example, P1C4 means bit 4 of port C on connector CN1.

(51)
(52)
(53)

(98)
(99)
(100)

(1) P1A0 (26) P2A0 (51) EVENT (76) GND
(2) P1A1 (27) P2A1 (52) GND (77) GND
(3) P1A2 (28) P2A2 (53) GND (78) GND
(4) P1A3 (29) P2A3 (54) GND (79) GND
(5) P1A4 (30) P2A4 (55) GND (80) GND
(6) P1A5 (31) P2A5 (56) GND (81) GND
(7) P1A6 (32) P2A6 (57) GND (82) GND
(8) P1A7 (33) P2A7 (58) GND (83) GND
(9) P1B0 (34) P2B0 (59) GND (84) GND
(10)P1B1 (35) P2B1 (60) GND (85) GND
(11)P1B2 (36) P2B2 (61) GND (86) GND
(12) P1B3 (37) P2B3 (62) GND (87) GND
(13) P1B4 (38) P2B4 (63) GND (88) GND
(14) P1B5 (39) P2B5 (64) GND (89) GND
(15) P1B6 (40) P2B6 (65) GND (90) GND
(16) P1B7 (41) P2B7 (66) GND (91) GND
(17) P1C0 (42) P2C0 (67) GND (92) GND
(18) P1C1 (43) P2C1 (68) GND (93) GND
(19) P1C2 (44) P2C2 (69) GND (94) GND
(20) P1C3 (45) P2C3 (70) GND (95) GND
(21) P1C4 (46) P2C4 (71) GND (96) GND
(22) P1C5 (47) P2C5 (72) GND (97) GND
(23) P1C6 (48) P2C6 (73) GND (98) GND
(24) P1C7 (49) P2C7 (74) GND (99) GND
(25) V5V (50) +12V (75) V5V (100) +12V

Figure 2.6.2 pinout and power signals of cPCI-7248

n : means the connector reference number n=1~2.
X : means the port name, X= ‘A’ , ‘B’ or ‘C’
b : means the bit number of a port, b=0~7

Note:

1. The pinout of the CN1 ~ CN4 connectors are identical.

2. The power supply pins are protected by resetable fuses. Refer to section

4.4 for details of the power supply.

14 • Installation

2.6.3 Pin Assignment of cPCI-7249R

The I/O ports of cPCI-7249R emulate the mode 0 configuration of the 8255
general purpose programmable peripheral interface. This card comes
equipped with SCSI -100 Pin connector. And the cPCI-7249R supports
R7249 daughter board for rear I/O, it includes two OPTO-22 connectors and
one SCSI -100 connector.

(1)
(2)
(3)

(48)
(49)
(50)

The DIO pin names are specified as PnXb, where

For example, P1C4 means bit 4 of port C on connector CN1.

(51)
(52)
(53)

(98)
(99)
(100)

(1) P1A0 (26) P2A0 (51) EVENT (76) GND
(2) P1A1 (27) P2A1 (52) GND (77) GND
(3) P1A2 (28) P2A2 (53) GND (78) GND
(4) P1A3 (29) P2A3 (54) GND (79) GND
(5) P1A4 (30) P2A4 (55) GND (80) GND
(6) P1A5 (31) P2A5 (56) GND (81) GND
(7) P1A6 (32) P2A6 (57) GND (82) GND
(8) P1A7 (33) P2A7 (58) GND (83) GND
(9) P1B0 (34) P2B0 (59) GND (84) GND
(10)P1B1 (35) P2B1 (60) GND (85) GND
(11)P1B2 (36) P2B2 (61) GND (86) GND
(12) P1B3 (37) P2B3 (62) GND (87) GND
(13) P1B4 (38) P2B4 (63) GND (88) GND
(14) P1B5 (39) P2B5 (64) GND (89) GND
(15) P1B6 (40) P2B6 (65) GND (90) GND
(16) P1B7 (41) P2B7 (66) GND (91) GND
(17) P1C0 (42) P2C0 (67) GND (92) GND
(18) P1C1 (43) P2C1 (68) GND (93) GND
(19) P1C2 (44) P2C2 (69) GND (94) GND
(20) P1C3 (45) P2C3 (70) GND (95) GND
(21) P1C4 (46) P2C4 (71) GND (96) GND
(22) P1C5 (47) P2C5 (72) GND (97) GND
(23) P1C6 (48) P2C6 (73) GND (98) GND
(24) P1C7 (49) P2C7 (74) GND (99) EXTCLK
(25) V5V (50) +12V (75) V5V (100) +12V

n : means the connector reference number n=1~2.
X : means the port name, X= ‘A’ , ‘B’ or ‘C’
b : means the bit number of a port, b=0~7

EXTCLK
EVENT
V5V
+12V

:

External edge trigger signal for latch digital input data

:

External clock source for counter 0

:

Onboard un-regulated 5V power supply output

:

Onboard un-regulated +12V power supply output

Installation • 15

2.6.4 R7249 OPTO-22 Connectors

The cPCI-7249R’s rear I/O transition board R7249 is equipped with two 50
pin male IDC connectors XCN2, XCN3, that interface with OPTO-22.

Figure 2.3 R7249 OPTO-22 Connectors Pin Assignment

Note : The power supply pins are protected by resetable fuses.

Refer to section 3.7 for details of the power supply.

16 • Installation

2.7 Jumpers Description

The 7248/96 DIO cards are ‘plug-and-play’, thus it is not necessary to setup
the card configurations to fit the computer system. However, to fit users’
versatile operation environment, there are still a few jumpers to set the
power-on status of ports and the usage of the +12V output pins.

2.7.1 Power on Status of Ports

For every port on the 7248/96 cards, the power-on status is set as input,
therefore, the voltage could be pulled high, pulled low, or floating. It is
dependent on the jumper setting. Table 2.1 lists the reference number of the
jumpers and the corresponding port names.

Jumper Port Name Remarks

JA1 P1A (Port A of CN1)

JB1 P1B (Port B of CN1)

JC1 P1C (Port C of CN1)

JA2 P2A (Port A of CN2) for PCI-7248/96, cPCI-7248
JB2 P2B (Port B of CN2) for PCI-7248/96, cPCI-7248
JC2 P2C (Port C of CN2) for PCI-7248/96, cPCI-7248
JA3 P3A (Port A of CN3) for PCI-7296
JB3 P3B (Port B of CN3) for PCI-7296
J C3 P3C (Port C of CN3) for PCI-7296
JA4 P4A (Port A of CN4) for PCI-7296
JB4 P4B (Port B of CN4) for PCI-7296
J C4 P4C (Port C of CN4) for PCI-7296

Table 2.1 Jumpers and Port names list

The physical meaning of all the jumpers are identical. The power on status of
each port can be set independently. The default is to pull all signals high.
The following diagram use JA1 as an example to show the possible
configurations.

1. Port A of CN1 are power-on pulled high. ‘H’
1 2 JA1

2. Port A of CN1 are power-on pulled low. ‘L’
1 2 JA1

3. Port A of CN1 are power-on floating. (The jumper is removed)
1 2 JA1

for PCI-7224/7248/7296,

cPCI-7248

for PCI-7224/7248/7296,

cPCI-7248

for PCI-7224/7248/7296,

cPCI-7248

Installation • 17

2.7.2 12V Power Supply Configuration

The pin 2 and pin 4 of the CN1 ~ CN4 50-pin OPTO-22 connectors can be
configured as 12V power supply or ground. Please refer to Figure 2.4 for the
12 volts power supply position. JP1~JP4 of the 12V power are for CN1~CN4
respectively. Connections with ground are set as default. The following
diagram shows the setting of JP2, connecting the pin 2 and pin 4 of CN2 to
ground.

(12V)1 2(Ground) JP2

2.8 Termination Boards Connection

There are many termination boards can connect with PCI-7248/7296 for
isolated I/O expansion.

1. TB-24R, DIN-24R

The TB-24R and DIN-24R provide 24 Form C relays for digital output control.

PCI-7296
PCI-7248

TB-24R

or DIN-24R

2. TB-24 P, DIN-24P

The TB-24P and DIN-24P provide 24 opto-isolated digital input channels.

PCI-7296
PCI-7248

TB-24P

or DIN-24P

18 • Installation

3. TB-16P8R

The TB-16P8R provides 16 opto-isolated digital input channels and 8 relay
outputs.

PCI-7296
PCI-7248

TB-16P8R

4. TB-24, DIN-50S

TB-24 and DIN-50S are termination boards with 50 pin ribbon connector.
They are used for general-purpose applications.

5. DIN-100S

DIN-100S is equipped with 100-pin SCSI-type connector. It can connected
with cPCI-7248 and cPCI-7249R.

Installation • 19

3

Registers Format

The detailed descriptions of the registers format are specified in this chapter.
This information is quite useful for the programmers who wish to handle the
card by low-level programming. However, we suggest user have to
understand more about the PCI interface then start any low-level
programming. In addition, the contents of this chapter can help users
understand how to use software driver to manipulate this card.

3.1 PCI PnP Registers

This PCI card functions as a 32-bit PCI target device to any master on the
PCI bus. There are three types of registers: PCI Configuration Registers
(PCR), Local Configuration Registers (LCR) and PCI-6308 registers.

The PCR, which is compliant to the PCI-bus specifications, is initialized and
controlled by the plug & play (PnP) PCI BIOS. User‘s can study the PCI
BIOS specification to understand the operation of the PCR. Please contact
with PCISIG to acquire the specifications of the PCI interface.

The PCI bus controller PCI-9050 is provided by PLX technology Inc.
(www.plxtech.com). For more detailed information of LCR, please visit PLX
technology’s web site to download relative information. It is not necessary for
users to understand the details of the LCR if you use the software library.
The PCI PnP BIOS assigns the base address of the LCR. The assigned
address is located at offset 14h of PCR.

The PCI-6308 registers are shown in the next section. The base address,
which is also assigned by the PCI PnP BIOS, is located at offset 18h of PCR.
Therefore, users can read the 18h of PCR to know the base address by using
the BIOS function call.

Please do not try to modify the base address and interrupt which assigned by
the PCI PnP BIOS, it may cause resource confliction in your system.

20 • Registers Format

3.2 I/O Address Map

All the 724X registers are 8 bits. The users can access these registers only
by 8 bits I/O instructions. The following table shows the registers map,
including descriptions and their offset addresses relative to the base address.
Please refer to the chapter 4 for more detailed operation of every registers.

Offset Write Read Boards

0x00 P1A P1A PCI-7224
0x01 P1B P1B PCI-7248
0x02 P1C P1C PCI-7296
0x03 P1Ctrl Not used cPCI-7248/49R
0x04 P2A P2A PCI-7248
0x05 P2B P2B PCI-7296
0x06 P2C P2C cPCI-7248/49R
0x07 P2Ctrl Not used
0x08 P3A P3A P1AE
0x09 P3B P3B P1BE
0x0A P3C P3C P1CE
0x0B P3Ctrl Not used Not used cPCI-7249R
0x0C P4A P4A P2AE
0x0D P4B P4B P2BE
0x0E P4C P4C P2CE
0x0F P4Ctrl Not used Not used
0x10 Timer/Counter #0 Timer/Counter #0 PCI-7224
0x11 Timer/Counter #1 Timer/Counter #1 PCI-7248
0x12 Timer/Counter #2 Timer/Counter #2 PCI-7296

0x13

0x20

Timer/Counter
Mode Control
ISC: Interrupt
Source Control

Timer/Counter
Mode Status

Not used

0x30 Clear Interrupt Not used

(1)

PCI-7296

(1)

(1) (1)

(1)

(1)

(1)

for

Only

cPCI-7248/49R

Registers Format • 21

4

Operation Theorem

4.1 Digital I/O Ports

4.1.1 Introduction

The 7248/96 products can emulate one/two/four mode 0 configuration of
8255 programmable peripheral interface (PPI) chips. There are 24 DIO
signals for every PPI.

4.1.2 8255 Mode 0

The basic functions of 8255 mode 0 are:

z Two 8-bit I/O ports−−port A (PA) and port B (PB)
z Two nibble-wide (4-bit) ports C−−PC upper and PC lower
z Each port can be used as either input or output
z Outputs are latched whereas inputs are buffered
z 16 different input/output configurations are available

4.1.3 Special Function of the DIO Signals

Two I/O signals (PC0 and PC3) of CN1 and CN2 can be used to generate
hardware interrupt. Refer to section 4.3 for details about the interrupt control.
In addition, the P1C4 signals can be used as input signal of event counter.

22 • Operation Theorem

4.1.4 Digital I/O Port Programming

Users can write the digital output value to or read back the digital signal level
from the PPI ports by using the software library. Here we define the port
name in Table 4.1. These port names are used both in software library and
all through this manual. The programming for PCI-7224/7248/7296 and
cPCI-7248 are fully compatible.

Connector

Numbers

P1A P2A P3A P4A

Port P1B P2B P3B P4B

Names P1C P2C P3C P4C

P1CTRL P2CTRL P3CTRL P4CTRL

There are four ports on every 8255 PPI, including port A,B,C and the control
port. PA, PB and PC could be written or read but the control port is write only.
Refer to chapter 5 for details about programming of DIO ports.

CN1 CN2 CN3 CN4

Table 4.1 I/O Port Names

4.1.5 Control Word

The control word written in the control port is used to setup PA, PB and PC
as input or output port. Figure 4.1 shows the format of the control word. Table

4.2 shows the 16 possible control words and the respective I/O
configurations .

D7 D6 D5 D4 D3 D2 D1 D0

X X

X

?

??X

?

1/0 : Input/Output of Port C low nibble

1/0 : Input/Output of Port B

1/0 : Input/Output of Port C high nibble

1/0 : Input/Output of Port A

X : don't care

Figure 4.1 Control Word Format

Operation Theorem • 23

Control

Word

00H
01H
02H
03H
08H
09H
0AH
0BH
10H
11H
12H
13H
18H
19H
1AH

1BH*

D4 D3 D1 D0 PORTA PORT C

UPPER

0 0 0 0 O/P O/P O/P O/P
0 0 0 1 O/P O/P O/P I/P
0 0 1 0 O/P O/P I/P O/P
0 0 1 1 O/P O/P I/P I/P
0 1 0 0 O/P I/P O/P O/P
0 1 0 1 O/P I/P O/P I/P
0 1 1 0 O/P I/P I/P O/P
0 1 1 1 O/P I/P I/P I/P
1 0 0 0 I/P O/P O/P O/P
1 0 0 1 I/P O/P O/P I/P
1 0 1 0 I/P O/P I/P O/P
1 0 1 1 I/P O/P I/P I/P
1 1 0 0 I/P I/P O/P O/P
1 1 0 1 I/P I/P O/P I/P
1 1 1 0 I/P I/P I/P O/P
1 1 1 1 I/P I/P I/P I/P

PORT B PORT C

LOWER

Table 4.2 Summary of control word (D0 - D4)

(* power on default configuration)

4.1.6 Power on Configuration

The default configuration after power on, hardware reset or software reset
sets all ports as input ports, therefore the users don’t have to worry about
damaging the external devices when system is power on. In addition, the
default signal level can be pulled high or pulled low by setting the jumpers.
Refer to section 2.7 for setting the power on status of the DIO ports.

4.1.7 Note for Output Data

Be careful of the initial condition of digital output signals. If users set the
control word as output port after power on, the previous uncertain output
value will be put on the output pins immediately. Therefore,

BE SURE TO
WRITE A SAFE VALUE TO THE PORTS BEFORE CONFIGURING THEM
AS OUTPUT PORTS.

4.1.8 Note for cPCI-7249R

The PIAE, P1BE, P1CE and P2AE, P2BE, P2CE registers are latched data
from P1A, P1B, P1C and P2A, P2B, P2C respectively. The latch signal is
from the Pin #99 of the 100-pin connector.

24 • Operation Theorem

4.2 Timer/Counter Operation

4.2.1 Introduction

One 8254 programmable timer/counter chip is installed in 7248/96 series.
There are three counters in one 8254 chip and 6 possible operation modes
for each counter. The block diagram of the timer /counter system is shown in
Figure 4.2.

P1C4

2 MHz Clock

Trigger

Edge

Control

Figure 4.2 Timer/counter system of 7248/96 series.

The timer #1 and timer #2 of the 8254 chip are cascaded as a 32-bit
programmable timer. In software library, the timer #1 and #2 are always set
as mode 2 (rate generator).

In software library, the counter #0 is used as an event counter, that is,
interrupt on terminal count of 8254 mode 0 . Please refer to chapter 5 for
programming the timer/counter functions.

'H'

'H'

'H'

8254 Chip

C

Counter #0

G

C

Timer #1

G

C

Timer #2

G

O

O

O

Event IRQ

Timer IRQ

4.2.2 General Purpose Timer/Counter

The counter 0 is a general purpose timer/counter for users applications. It
can be used as an event counter, or used for measuring frequency, or other
functions. The following Mode are provided by the 82C54 chip.

Mode 0

z
z
z
z
z
z

Mode 1
Mode 2
Mode 3
Mode 4
Mode 5

: Interrupt on Terminal Count
: Programmable One-Shot.
: Rate Generator.
: Square Wave Rate Generator.
: Software Triggered Strobe.
: Hardware Triggered Strobe.

Operation Theorem • 25

The 8254 timer/ counter IC occupies 4 I/O address. Users can refer to
Tundra's or Intel's data sheet for a full description of the 8254 features. You
can download the 8254 data sheet from the following web site:

http://support.intel.com/support/controllers/peripheral/231164.htm

or

http://www.tundra.com (for Tundra’s 82C54 datasheet.)

4.2.2 Cascaded 32 Bits Timer

The input clock frequency of the cascaded timers is 2MHz. The output of the
timer is send to the interrupt circuit (refer to section 4.3). Therefore, the
maximum and minimum watchdog timer interrupt frequency is
(2MHz)/(2*2)=500KHz and (2MHz)/(65535*65535)= 0.000466Hz respectively.

4.2.3 Event Counter and Edge Control

The counter #0 of the 8254 chip can be used as an event counter. The input
of counter #0 is PC4 of CN1 (P1C4). The counter clock trigger direction (H to
L or L to H) is programmable. The gate control is always enabled. The
output is send to interrupt system which named as event IRQ. If counter #0
is set as 8254 mode 0, the event counter IRQ will generate when the counter
value is counting down to zero.

4.3 Interrupt Multiplexing

4.3.1 Architecture

The 7248/96 series products have a powerful and flexible interrupt
multiplexing circuit which is suitable for many applications. The board could
accept Dual Interrupts. The dual interrupt means that the hardware can
generate two interrupt request signals at the same time and the software can
service these two request signals by ISR. Note that the dual interrupts do not
mean that the card occupies two IRQ levels.

The two interrupt request signals (INT1 and INT2) comes from digital input
signals or the timer/counter output. An interrupt source multiplexer (MUX) is
used to select the IRQ sources. Fig 4.3 shows the interrupt system.

26 • Operation Theorem

r

(*)

)

4.3.2 IRQ Level Setting

There is only one IRQ level requested by this card, although it is a dual
interrupt system. The mother board circuits will transfer INTA# to one of the
PC IRQ levels. The IRQ level is set by the PCI plug and play BIOS and
saved in the PCI controller. Users can get the IRQ level setting by software
library.

INTA#

(*) Note: This interrupt is not available in PCI-7224

PCI

Controller

Fig 4.3 Dual Interrupt System of PCI-7224/7248/96

INT1

INT2

Clear IRQ

IRQ

Flip-

Flops

INT1
MUX

INT2
MUX

P1C0

~P1C0 & P1C3

Event Counte

P2C0

~P2C0 & P2C3 (*

Timer IRQ

4.3.3 Note for Dual Interrupts

The PCI controller of PCI-7224/7248/96 can receive two hardware IRQ
sources. However, a PCI controller can generate only one IRQ to PCI bus,
the two IRQ sources must be distinguished by ISR of the application software
if the two IRQ are all used.

The application software can use the “_72xx_Get_Irq_Status” function to
distinguish which interrupt is inserted. After an ISR completed, users must
check if another IRQ is also asserted, then clear current IRQ to allow the next
IRQ coming in.

The two IRQs are named as INT1 and INT2. In PCI-7224/7248/7296, INT1
comes from P1C0, P1C3 or the event counter interrupt. INT2 comes from
P2C0, P2C3 or the timer interrupt. However in PCI-7224, INT2 only comes
from timer interrupt. The sources of INT1 and INT2 is selectable by the
Interrupt Source Control (ISC) Register.

Operation Theorem • 27

4.3.4 Interrupt Source Control

In ISC register (offset 0x20), there are four bits to control the IRQ sources of
INT1 and INT2.

If the application need only one IRQ, you can disable one of the IRQ sources
by software. If your application do not need any IRQ source, you can disable
both interrupts. However, the PCI BIOS still assign a IRQ level to the PCI
card and occupy the PC resource, if you only disable the IRQ sources without
change the initial condition of the PCI controller.

It is not recommended to change the initial condition of the PCI card by
users‘ own application software. If users want to disable the IRQ level, user
can use the ADLINK’s utility ‘INIT7248.EXE’ or ‘INIT7296.EXE’ to change
power on interrupt setting.

The table 4.3 shows the register format of the ISC (address offset 0x20).
This register is write only. The 4 LSBs are used to control the source of INT1
and INT2.

INT1 D3 D2 D1 D0 IRQ Sources IRQ Trigger Condition

Disable X X 0 0 INT1 disable -­Mode 1 X X 0 1 ~P1C0 falling edge of P1C0
Mode 2 X X 1 0 P1C0 OR ~P1C3 (see following)
Mode 3 X X 1 1 Event Counter Counter count down to 0

INT2 D3 D2 D1 D0 IRQ Sources IRQ Trigger Condition

Disable 0 0 X X INT2 disable -­Mode 1 0 1 X X ~P2C0 falling edge of P2C0(*)
Mode 2 1 0 X X P2C0 OR ~P2C3 (see following) (*)
Mode 3 1 1 X X Timer Output Timer count down to 0

Table 4.3 ISC register format

(*) Note: Not available on PCI-7224.

Then the IRQ sources is set as “P1C0 OR ~P1C3”, the IRQ trigger
conditions are summarized in table 4.4.

P1/2C0 P1/2C3 IRQ Trigger Condition

High X PC0=‘H’ disable all IRQ

X Low PC3=‘L’ disable all IRQ

Low 1->0 PC3 falling edge trigger when PC0=L

0->1 High PC0 rising edge trigger when PC3=H

Table 4.4 IRQ Trigger conditions

Because the P1/P2C0 and P1/P2C3 are external signals, the users can
utilize the combination of the four signals to generate a proper IRQ.

28 • Operation Theorem

4.4 12V and 5V Power Supply

The OPTO-22 compatible connectors provide external devices the +12 volts
and +5 volts power supply. To avoid short or overload of the power supply,
the resetable fuses are added on all the output power. Refer to Figure 2.6.1

The maximum current for 5 volts on every connector is 0.5 A. If the load
current is larger than 0.5 A, the resistance of resetable fuse will increase
because of the rising temperature. The rising resistance will cause the power
supply drop and reduce current. If the overload or short condition is removed,
the fuse will get to normal condition. It is not necessary to repair or re-install
the fuse.

The maximum current of 12 volts for all the four connectors is also 0.5 A.
The action of the fuse is the same as which used for +5V power. The
limitation is more restrictive than 5V power supply because the PCI bus can
not provide large current.

Operation Theorem • 29

5

C/C++ Libraries

This chapter describes the software library for operating these card. Only the
functions in DOS library and Windows 95 DLL are described. Please refer to
the PCIS-DASK function reference manual, which included in ADLINK CD,
for the descriptions of the Windows 98/NT/2000 DLL functions. The functions
of PCI-7248 can also be applied to PCI-7224 and cPCI-7248. Therefore, in
the following section, there is no special functions for PCI-7224 and cPCI-

7248. The software driver of PCI-7224 is fully compatible with that of PCI-

7248. In the following sections, each function call which has a name
associated with “7248” could be applied to PCI-7224 directly

The function prototypes and some useful constants are defined in the header
files LIB directory (DOS) and INCLUDE directory (Windows 95). For Windows
95 DLL, the developing environment can be Visual Basic 4.0 or above, Visual
C/C++ 4.0 or above, Borland C++ 5.0 or above, Borland Delphi 2.x (32-bit) or
above, or any Windows programming language that allows calls to a DLL. It
provides the C/C++, VB, and Delphi include files.

5.1 Libraries Installation

Please refer to the “Software Installation Guide” for the detail information
about how to install the software libraries for DOS, or Windows 95 DLL, or
PCIS-DASK for Windows 98/NT/2000.

The device drivers and DLL functions of Windows 98/NT/2000 are included in
the PCIS-DASK. Please refer the PCIS-DASK user’s guide and function
reference, which included in the ADLINK CD, for detailed programming
information.

30 • C/C++ Libraries

5.2 Programming Guide

5.2.1 Naming Convention

The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’
software driver are using full-names to represent the functions' real meaning.
The naming convention rules are:

In DOS Environment:

_7248_Initial()

_{hardware_model}_{action_name}.

All functions in PCI-7248 driver are with 7248 as {hardware_model}. But they
can be used by PCI-7248, PCI-7224 and cPCI-7248.

In order to recognize the difference between DOS library and Windows 95
library, a capital "
95 DLL driver. e.g.

W

" is put on the head of each function name of the Windows

W_7248_Initial()

e.g.

.

5.2.2 Data Types

We defined some data type in Pci_7248.h (DOS) and Acl_pci.h (Windows 95).
These data types are used by NuDAQ Cards’ library. We suggest you to use
these data types in your application programs. The following table shows the
data type names and their range.

Type Name Description Range

U8 8-bit ASCII character 0 to 255
I16 16-bit signed integer -32768 to 32767

U16 16-bit unsigned integer 0 to 65535

I32 32-bit signed integer -2147483648 to 2147483647

U32 32-bit single-precision

floating-point

F32 32-bit single-precision

floating-point

F64 64-bit double-precision

floating-point

Boolean Boolean logic value TRUE, FALSE

0 to 4294967295

-3.402823E38 to 3.402823E38

-1.797683134862315E308 to

1.797683134862315E309

.

C/C++ Libraries • 31

5.3 _7248/96_Initial

@ Description

The cards are initialized by this function. The software library could be used
to control multiple cards.

@ Syntax

C/C++ (DOS)

U16 _7248_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 _7249_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 _7296_Initial (U16 *existCards, PCI_INFO *pciInfo)

C/C++ (Windows 95)

U16 W_7248_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 W_7249_Initial (U16 *existCards, PCI_INFO *pciInfo)
U16 W_7296_Initial (U16 *existCards, PCI_INFO *pciInfo)

Visual Basic (Windows 95)

W_7248_Initial (existCards As Integer, pciInfo As

PCI_INFO) As Integer

W_7249_Initial (existCards As Integer, pciInfo As

PCI_INFO) As Integer

W_7296_Initial (existCards As Integer, pciInfo As

PCI_INFO) As Integer

@ Argument

@ Return Code

existCards: The numbers of installed PCI-7224/7248/7296

cards. The returned value shows how many
PCI-7224/7248/7296 cards are installed in
your system.

pciinfo: It is a structure to record the PCI bus

plug and play initiallization information
which is decided by p&p BIOS. The
PCI_INFO structure is defined in ACL_PCI.H
The base I/O address and the interrupt
channel number are stored in pciinfo.

ERR_NoError
ERR_PCIBiosNotExist

32 • C/C++ Libraries

5.4 Digital Input

@ Description

This function is used to read 8-bit digital input data from digital input ports.
You can get the 8-bit data from _7248_DI by using this function. The written
data and read in data is 8-bit data. Each data is mapped to a signal as the
table below.

D7 D6 D5 D4 D3 D2 D1 D0

PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0

@ Syntax

PCI-7224/7248, cPCI-7248, cPCI-7249R:

C/C++ (DOS)

U16 _7248_DI (U16 cardNo, U16 channelPort, U8 *diData)
U16 _7249_DI (U16 cardNo, U16 channelPort, U8 *diData)
U16 _7296_DI (U16 cardNo, U16 channelPort, U8 *diData)

C/C++ (Windows 95)

U16 W_7248_DI (U16 cardNo, U16 channelPort, U16

U16 W_7249_DI (U16 cardNo, U16 channelPort, U16

U16 W_7296_DI (U16 cardNo, U16 channelPort, U16

Visual Basic (Windows 95)

W_7248_DI (ByVal cardNo As Integer, ByVal channelPort

W_7249_DI (ByVal cardNo As Integer, ByVal channelPort

W_7296_DI (ByVal cardNo As Integer, ByVal channelPort

@ Argument

cardNo: card number to select board
diData: return 8-bit value from digital port.
channelPort: port of each channel

PCI_CH0_PA: CH1’s Port A
PCI_CH0_PB: CH1’s Port B
PCI_CH0_PC: CH1’s Port C
PCI_CH0_PCU: CH1’s Port C Upper Nibble
PCI_CH0_PCL: CH1’s Port C Low Nibble
PCI_CH1_PA: CH2’s Port A
PCI_CH1_PB: CH2’s Port B
PCI_CH1_PC: CH2’s Port C
PCI_CH1_PCU: CH2’s Port C Upper Nibble
PCI_CH1_PCL: CH2’s Port C Low Nibble
PCI_CH2_PA: CH2’s Port A
PCI_CH2_PB: CH2’s Port B
PCI_CH2_PC: CH2’s Port C

*diData)

*diData)

*diData)

As Integer, diData As Integer) As Integer

As Integer, diData As Integer) As Integer

As Integer, diData As Integer) As Integer

C/C++ Libraries • 33

PCI_CH2_PCU: CH2’s Port C Upper Nibble
PCI_CH2_PCL: CH2’s Port C Low Nibble
PCI_CH3_PA: CH3’s Port A
PCI_CH3_PB: CH3’s Port B
PCI_CH3_PC: CH3’s Port C
PCI_CH3_PCU: CH3’s Port C Upper Nibble
PCI_CH3_PCL: CH3’s Port C Low Nibble
PCI_CH0_PAE: CH1’s Port A uses External Latch

PCI_CH0_PBE: CH1’s Port B uses External Latch
PCI_CH0_PCE: CH1’s Port C uses External Latch
PCI_CH1_PAE: CH2’s Port A uses External Latch
PCI_CH1_PBE: CH2’s Port B uses External Latch

PCI_CH1_PCE: CH2’s Port C uses External Latch

Note: 1.CH2 and CH3 are only available for PCI-7296.

2.Only CH0 is available for PCI-7224.

@ Return Code

ERR_NoError

34 • C/C++ Libraries

5.5 Digital Output

@ Description

This function is used to write data to digital output ports.

@ Syntax

C/C++ (DOS)

U16 _7248_DO (U16 cardNo, U16 channelPort, U8 doData)
U16 _7249_DO (U16 cardNo, U16 channelPort, U8 doData)
U16 _7296_DO (U16 cardNo, U16 channelPort, U8 doData)

C/C++ (Windows 95)

U16 W_7248_DO (U16 cardNo, U16 channelPort, U16 doData)
U16 W_7249_DO (U16 cardNo, U16 channelPort, U16 doData)
U16 W_7296_DO (U16 cardNo, U16 channelPort, U16 doData)

Visual Basic (Windows 95)

W_7248_DO (ByVal cardNo As Integer, ByVal channelPort

As Integer, ByVal doData As Integer) As Integer

W_7249_DO (ByVal cardNo As Integer, ByVal channelPort

As Integer, ByVal doData As Integer) As Integer

W_7296_DO (ByVal cardNo As Integer, ByVal channelPort

As Integer, ByVal doData As Integer) As Integer

@ Argument

cardNo: card number to select board
channelPort: The same as channelPort in section 5.5.

doData: value will be written to digital output port

@ Return Code

ERR_NoError

C/C++ Libraries • 35

5.6 Configuration Port

@ Description

This function is used to configure the Input or Output of each Port. Each I/O
Port of PCI-7224/7248/7296 is either input or output, so it has to configure as
input or output before I/O operations are applied.

@ Syntax

C/C++ (DOS)

U16 _7248_Config_Port (U16 cardNo, U16 channelPort,

U16 _7249_Config_Port (U16 cardNo, U16 channelPort,

U16 _7296_Config_Port (U16 cardNo, U16 channelPort,

C/C++ (Windows 95)

U16 W_7248_Config_Port (U16 cardNo, U16 channelPort,

U16 W_7249_Config_Port (U16 cardNo, U16 channelPort,

U16 W_7296_Config_Port (U16 cardNo, U16 channelPort,

Visual Basic (Windows 95)

W_7248_Config_Port (ByVal cardNo As Integer, ByVal

W_7249_Config_Port (ByVal cardNo As Integer, ByVal

W_7296_Config_Port (ByVal cardNo As Integer, ByVal

@ Argument

cardNo: card number to select board
channelPort: The same as channelPort in section 5.5.
direction: port I/O direction
INPUT_PORT: the port is configure as INPUT
OUTPUT_PORT: the port is configure as OUTUT

@ Return Code

ERR_NoError

U16 direction);

U16 direction);

U16 direction)

U16 direction);

U16 direction);

U16 direction)

channelPort As Integer, ByVal direction As
Integer) As Integer

channelPort As Integer, ByVal direction As
Integer) As Integer

channelPort As Integer, ByVal direction As
Integer) As Integer

36 • C/C++ Libraries

5.7 Configuration Channel

@ Description

This function is used to configure the Input or Output of each Channel. Each
I/O Port of PCI-7224/7248/7296 is either input or output, so it has to configure
as input or output before I/O operations are applied.

@ Syntax

C/C++ (DOS)

U16 _7248_Config_Channel (U16 cardNo, U16 channelNo,

U16 _7249_Config_Channel (U16 cardNo, U16 channelNo,

U16 _7296_Config_ Channel (U16 cardNo, U16 channelNo,

C/C++ (Windows 95)

U16 W_7248_Config_Channel (U16 cardNo, U16 channelNo,

U16 W_7249_Config_Channel (U16 cardNo, U16 channelNo,

U16 W_7296_Config_ Channel (U16 cardNo, U16 channelNo,

Visual Basic (Windows 95)

W_7248_Config_Channel (ByVal cardNo As Integer, ByVal

W_7249_Config_Channel (ByVal cardNo As Integer, ByVal

W_7296_Config_ Channel (ByVal cardNo As Integer, ByVal

@ Argument

cardNo: card number to select board
channelNo: PCI_CH0, PCI_CH1, PCI_CH2, or PCI_CH3
ctrlValue: the control value to set up PA, PB, and PC as

U16 ctrlValue)

U16 ctrlValue)

U16 ctrlValue)

U16 ctrlValue)

U16 ctrlValue)

U16 ctrlValue)

channelNo As Integer, ByVal ctrlValue As Integer)
As Integer

channelNo As Integer, ByVal ctrlValue As Integer)
As Integer

channelNo As Integer, ByVal ctrlValue As Integer)
As Integer

input or output port.

C/C++ Libraries • 37

ctrlValue Port A Port CU Port B Port CL
PORT_OOOO OUT OUT OUT OUT

PORT_OOOI OUT OUT OUT IN
PORT_OOIO OUT OUT IN OUT
PORT_OOII OUT OUT IN IN
PORT_OIOO OUT IN OUT OUT
PORT_OIOI OUT IN OUT IN
PORT_OIIO OUT IN IN OUT
PORT_OIII OUT IN IN IN
PORT_IOOO IN OUT OUT OUT
PORT_IOOI IN OUT OUT IN
PORT_IOIO IN OUT IN OUT
PORT_IOII IN OUT IN IN
PORT_IIOO IN IN OUT OUT
PORT_IIOI IN IN OUT IN
PORT_IIIO IN IN IN OUT
PORT_IIII IN IN IN IN

The ctrlValue constants are defined in acl_pci.h and acl_pci.bas.

@ Return Code

ERR_NoError

38 • C/C++ Libraries

5.8 Set Interrupt Control

@ Description

This function is used to set the interrupt configuration. The interrupt
should be configured before the function starts.

@ Syntax

C/C++ (DOS)

void _7248_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void _7249_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void _7296_Set_INT_Control(U16 cardNo, U16 ctrlValue);

C/C++ (Windows 95)

void W_7248_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void W_7249_Set_INT_Control(U16 cardNo, U16 ctrlValue);
void W_7296_Set_INT_Control(U16 cardNo, U16 ctrlValue);

Visual Basic (Windows 95)

W_7248_Set_INT_Control (ByVal cardNo As Integer, ByVal

ctrlValue As Integer)

W_7249_Set_INT_Control (ByVal cardNo As Integer, ByVal

ctrlValue As Integer)

W_7296_Set_INT_Control (ByVal cardNo As Integer, ByVal

ctrlValue As Integer)

@ Argument

cardNo: card number to select board
ctrlValue: the valid values of configuring the interrupt
are
INT1:

0x00 Æ disable

0x01 Æ mode1
0x02 Æ mode2

INT2:
0x00 Æ disable

Please refer to the section 4.3.4 for detailed description.

0x03 Æ mode3

0x04 Æ mode1
0x08 Æ mode2
0x0c Æ mode3

C/C++ Libraries • 39

5.9 Timer Start

@ Description

This function is used to set and start the timer0 of the on-board timer
8254 .

@ Syntax

C/C++ (DOS)

void _7248_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void _7249_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)
void _7296_Timer_Start(U16 cardNo, U16 timer0Mode, U16 c0)

C/C++ (Windows 95)

void W_7248_Timer_Start(U16 cardNo, U16 timer0Mode,

U16 c0)

void W_7249_Timer_Start(U16 cardNo, U16 timer0Mode,

U16 c0)

void W_7296_Timer_Start(U16 cardNo, U16 timer0Mode,

U16 c0)

Visual Basic (Windows 95)

W_7248_Timer_Start(ByVal cardNo As Integer, ByVal

timer0Mode As Integer, ByVal c0 As Integer)

W_7249_Timer_Start(ByVal cardNo As Integer, ByVal

timer0Mode As Integer, ByVal c0 As Integer)

W_7296_Timer_Start(ByVal cardNo As Integer, ByVal

timer0Mode As Integer, ByVal c0 As Integer);

@ Argument

cardNo: card number to select board
timer0Mode: the six modes of 8254, please refer to section

c0: the counter/timer value of time0.

4.2.2 for detailed description

40 • C/C++ Libraries

5.10 Timer Read

@ Description

This function is used to read the current count of the timer0 of the on­board timer 8254 .

@ Syntax

PCI-7224/7248, CPCI-7248:

C/C++ (DOS)

void _7248_Timer_Read(U16 cardNo, U16 *counterValue);
void _7249_Timer_Read(U16 cardNo, U16 *counterValue);
void _7296_Timer_Read(U16 cardNo, U16 *counterValue);

C/C++ (Windows 95)

void W_7248_Timer_Read(U16 cardNo, U16 *counterValue);
void W_7249_Timer_Read(U16 cardNo, U16 *counterValue);
void W_7296_Timer_Read(U16 cardNo, U16 *counterValue);

Visual Basic (Windows 95)

W_7248_Timer_Read(ByVal cardNo As Integer, counterValue

As Integer);

W_7249_Timer_Read(ByVal cardNo As Integer, counterValue

As Integer);

W_7296_Timer_Read (ByVal cardNo As Integer,

counterValue As Integer);

@ Argument

cardNo: card number to select board
counterValue: the value of the current count

C/C++ Libraries • 41

5.11 Timer Stop

@ Description

This function is used to stop the timer0 of the on-board timer 8254 .

@ Syntax

C/C++ (DOS)

void _7248_Timer_Stop(U16 cardNo, U16 *counterValue);
void _7249_Timer_Stop(U16 cardNo, U16 *counterValue);
void _7296_Timer_Stop(U16 cardNo, U16 *counterValue);

C/C++ (Windows 95)

void W_7248_Timer_Stop(U16 cardNo, U16 *counterValue);
void W_7249_Timer_Stop(U16 cardNo, U16 *counterValue);
void W_7296_Timer_Stop(U16 cardNo, U16 *counterValue);

Visual Basic (Windows 95)

W_7248_Timer_Stop (ByVal cardNo As Integer,

counterValue As Integer);

W_7249_Timer_Stop (ByVal cardNo As Integer,

counterValue As Integer);

W_7296_Timer_Stop (ByVal cardNo As Integer,

counterValue As Integer);

@ Argument

cardNo: card number to select board
counterValue: the value of current count when the counter is

stopped

42 • C/C++ Libraries

5.12 Cascaded Timer

@ Description

This function is used to set and start the cascaded timer1 and timer 2 of
the on- board timer 8254 .

@ Syntax

C/C++ (DOS)

void _7248_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void _7249_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void _7296_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);

C/C++ (Windows 95)

void W_7248_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void W_7249_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);
void W_7296_Cascaded_Timer(U16 cardNo, U16 c1, U16 c2);

Visual Basic (Windows 95)

W_7248_Cascaded_Timer (ByVal cardNo As Integer, ByVal

c1 As Integer, ByVal c2 As Integer)

W_7249_Cascaded_Timer (ByVal cardNo As Integer, ByVal

c1 As Integer, ByVal c2 As Integer)

W_7296_Cascaded_Timer (ByVal cardNo As Integer, ByVal

c1 As Integer, ByVal c2 As Integer)

@ Argument

cardNo: card number to select board
c1: the value of divisor used in timer 1
c2: the value of divisor used in timer 2

C/C++ Libraries • 43

5.13 Get IRQ Status

@ Description

This function is used to read back the status of interrupt when interrupt is
inserted.

@ Syntax

C/C++ (DOS)

void _7248_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

void _7249_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

void _7296_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

C/C++ (Windows 95)

void W_7248_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

void W_7249_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

void W_7296_Get_IRQ_Status(U16 cardNo, U16 *int1Status,

U16 *int2Status);

Visual Basic (Windows 95)

W_7248_Get_IRQ_Status (ByVal cardNo As Integer,

int1Status As Integer, int2Status As Integer);

W_7249_Get_IRQ_Status (ByVal cardNo As Integer,

int1Status As Integer, int2Status As Integer);

W_7296_Get_IRQ_Status (ByVal cardNo As Integer,

int1Status As Integer, int2Status As Integer);

@ Argument

cardNo: card number to select board
int1Status: the status of INT1,
int1Status = 0 Æ no interrupt
int1Status = 1 Æ interrupt 1 inserted
int2Status: the status of INT2
int2Status = 0 Æ no interrupt

int2Status = 1 Æ interrupt 2 inserted
Please refer to section 4.3 for detailed description.

44 • C/C++ Libraries

5.14 Clear IRQ

@ Description

This function is used to clear the interrupt generated from the 7248/96
series.

@ Syntax

C/C++ (DOS)

void _7248_CLR_IRQ(U16 cardNo);
void _7249_CLR_IRQ(U16 cardNo);
void _7296_CLR_IRQ(U16 cardNo);

C/C++ (Windows 95)

void W_7248_CLR_IRQ(U16 cardNo);
void W_7249_CLR_IRQ(U16 cardNo);
void W_7296_CLR_IRQ(U16 cardNo);

Visual Basic (Windows 95)

W_7248_CLR_IRQ (ByVal cardNo As Integer);
W_7249_CLR_IRQ (ByVal cardNo As Integer);
W_7296_CLR_IRQ (ByVal cardNo As Integer);

@ Argument

cardNo: card number to select board

5.15 Software Reset

@ Description

This function is used to reset the I/O port configuration. After reset PCI­7224/7248/7296, all the ports will be set as input ports. Note that this
function can not re-start the PCI bus and all the hardware setting won‘t be
change either.

@ Syntax

PCI-7224/7248, CPCI-7248:

C/C++ (DOS)

U16 _7248_Software_Reset (U16 cardNo)
U16 _7249_Software_Reset (U16 cardNo)
U16 _7296_Software_Reset (U16 cardNo)

C/C++ (Windows 95)

U16 W_7248_Software_Reset (U16 cardNo)
U16 W_7249_Software_Reset (U16 cardNo)
U16 W_7296_Software_Reset (U16 cardNo)

C/C++ Libraries • 45

Visual Basic (Windows 95)

W_7248_Software_Reset (ByVal cardNo As Integer) As

Integer

W_7249_Software_Reset (ByVal cardNo As Integer) As

Integer

W_7296_Software_Reset (ByVal cardNo As Integer) As

Integer

@ Argument

cardNo: card number which the DIO will be reset.

@ Return Code

ERR_NoError

5.16 Interrupt Start under Windows

@ Description

This function is only available in Windows 95/98 driver. This function is used
to initialize and start up the interrupt control. Please refer to section 4.3 for
detailed description of interrupt system. After calling this function, every time
an interrupt request signal generated, a software event is signaled. So that in
your program, you can use wait operation to wait for the event. When the
event is signaled, it means an interrupt is generated. Please refer to the
sample program 7248int.c or 7296int.c.

@ Syntax

C/C++ (Windows 95)

void W_7248_INT_Start (U16 cardNo, U16 c1, U16 c2, U16

void W_7249_INT_Start (U16 cardNo, U16 c1, U16 c2, U16

void W_7248_INT_Start (U16 cardNo, U16 c1, U16 c2, U16

Visual Basic (Windows 95)

W_7248_INT_Start (ByVal cardNo As Integer, ByVal c1 As

W_7249_INT_Start (ByVal cardNo As Integer, ByVal c1 As

W_7296_INT_Start (ByVal cardNo As Integer, ByVal c1 As

ctrlValue, HANDLE *hIntEvent)

ctrlValue, HANDLE *hIntEvent)

ctrlValue, HANDLE *hIntEvent)

Integer, ByVal c2 As Integer, ByVal ctrlValue As
Integer, hIntEvent As Long)

Integer, ByVal c2 As Integer, ByVal ctrlValue As
Integer, hIntEvent As Long)

Integer, ByVal c2 As Integer, ByVal ctrlValue As
Integer, hIntEvent As Long)

46 • C/C++ Libraries

@ Argument

cardNo: card number which the DIO will be reset.
c1: If the interrupt source is set as internal timer

source, this value is the frequency divider of
Timer#1.

c2: If the interrupt source is set as internal timer

source, this value is the frequency divider of
Timer#2.

ctrlValue: the value for INT mode setting. The value can

be set for INT1 is INT1_OFF, INT1_P1C0,
INT1_P1C3C0, or INT1_EVENT_IRQ. The value can be
set for INT2 is INT2_OFF, INT2_P2C0, INT2_P2C3C0,
or INT2_TIMER_IRQ. Please refer to section 3.3.4
for detailed description.

hIntEvent:the handle of the event for interrupt signals.

@ Return Code

ERR_NoError

5.17 Interrupt Stop under Windows

@ Description

This function is only available in Windows 95/98 driver. This function is used
to disable the interrupt signal generation.

@ Syntax

C/C++ (Windows 95)

void W_7248_INT_Stop (U16 cardNo)
void W_7249_INT_Stop (U16 cardNo)
void W_7296_INT_Stop (U16 cardNo)

Visual Basic (Windows 95)

W_7248_INT_Stop (ByVal cardNo As Integer)
W_7249_INT_Stop (ByVal cardNo As Integer)
W_7296_INT_Stop (ByVal cardNo As Integer)

@ Argument

@ Return Code

cardNo: card number which the DIO will be reset.

ERR_NoError

C/C++ Libraries • 47

Warranty Policy

Thank you for choosing ADLINK. To understand your rights and enjoy all the
after-sales services we offer, please read the following carefully.

1. Before using ADLINK’s products please read the user manual and follow
the instructions exactly. When sending in damaged products for repair,
please attach an RMA application form which can be downloaded from:
http://rma.adlinktech.com/policy/.

2. All ADLINK products come with a limited two-year warranty, one year for
products bought in China.

• The warranty period starts on the day the product is shipped from
ADLINK’s factory.

• Peripherals and third-party products not manufactured by ADLINK
will be covered by the original manufacturers' warranty.

• For products containing storage devices (hard drives, flash cards,
etc.), please back up your data before sending them for repair.
ADLINK is not responsible for any loss of data.

• Please ensure the use of properly licensed software with our
systems. ADLINK does not condone the use of pirated software
and will not service systems using such software. ADLINK will not
be held legally responsible for products shipped with unlicensed
software installed by the user.

• For general repairs, please do not include peripheral accessories.
If peripherals need to be included, be certain to specify which
items you sent on the RMA Request & Confirmation Form.
ADLINK is not responsible for items not listed on the RMA
Request & Confirmation Form.

3. Our repair service is not covered by ADLINK's guarantee in the following
situations:

• Damage caused by not following instructions in the User's
Manual.

• Damage caused by carelessness on the user's part during
product transportation.

• Damage caused by fire, earthquakes, floods, lightening, pollution,
other acts of God, and/or incorrect usage of voltage transformers.

48 • Warranty Policy

• Damage caused by inappropriate storage environments such as
with high temperatures, high humidity, or volatile chemicals.

• Damage caused by leakage of battery fluid during or after change
of batteries by customer/user.

• Damage from improper repair by unauthorized ADLINK
technicians.

• Products with altered and/or damaged serial numbers are not
entitled to our service.

• This warranty is not transferable or extendible.

• Other categories not protected under our warranty.

4. Customers are responsible for all fees necessary to transport damaged
products to ADLINK.

For further questions, please e-mail our FAE staff: [e-mail]

Warranty Policy • 49