ADLINK aTCA-6200A User Manual
aTCA-6200
Dual Intel Xeon E5-2648L AdvancedTCA Processor Blade
User’s manual
Manual Revision: 2.00
Revision Date: December 20, 2012
Part Number: 50-1G021-1000
Advance Technologies; Automate the World.
Revision History
Revision Release Date Description of Change(s)
2.00 December 20, 2012 Initial release
Copyright 2012 ADLINK Technology, Inc.
All Rights Reserved.
The information in this document is subject to change without prior notice in order to improve
reliability, design, and function and does not represent a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential
damages arising out of the use or inability to use the product or documentation, even if advised of the
possibility of such damages.
This document contains proprietary information protected by copyright. All rights are reserved. No
part of this manual may be reproduced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Trademarks
Product names mentioned herein are used for identification purposes only and may be trademarks
and/or registered trademarks of their respective companies.
2
Table of Contents
REVISION HISTORY ............................................................................................................................. 2
1 OVERVIEW.................................................................................................................................... 5
1.1 INTRODUCTION ..............................................................................................................................5
1.2 BLOCK DIAGRAM............................................................................................................................ 6
1.3 PACKAGE CONTENTS........................................................................................................................ 7
2 SPECIFICATIONS............................................................................................................................8
2.1 ATCA-6200 SPECIFICATIONS............................................................................................................. 8
2.1.1 CPU/ CHIPSET/ MEMORY..................................................................................................................... 8
2.1.2 STANDARD AND INTERFACE .................................................................................................................... 8
2.1.3 SOFTWARE ......................................................................................................................................... 9
2.1.4 MECHANICAL & ENVIRONMENTAL .......................................................................................................... 9
2.2 POWER CONSUMPTION ................................................................................................................. 10
2.3 BOARD LAYO UT ............................................................................................................................ 11
2.3.1 ATCA-6200 BOARD LAYO UT ............................................................................................................... 11
2.3.2 LED DEFINITION................................................................................................................................ 12
2.4 COMPLIANCE............................................................................................................................... 14
3 FUNCTIONAL DESCRIPTION ........................................................................................................ 15
3.1 CPU, MEMORY AND CHIPSET.......................................................................................................... 15
3.1.1 CPU ............................................................................................................................................... 15
3.1.2 MEMORY ......................................................................................................................................... 16
3.1.3 INTEL® C604 PCH OVERVIEW............................................................................................................. 17
3.1.4 INTEL® COMMUNICATIONS CHIPSET 8920 ............................................................................................. 17
3.1.5 SILICON MOTION SM750 GRAPHICS CONTROLLER .................................................................................. 18
3.2 PERIPHERALS............................................................................................................................... 18
3.2.1 BAT TE RY .......................................................................................................................................... 18
3.2.2 RESET.............................................................................................................................................. 19
3.2.3 SMBUS DEVICES ............................................................................................................................... 20
3.2.4 GPIO LIST ....................................................................................................................................... 21
3.3 IO INTERFACES............................................................................................................................. 22
3.3.1 USB ............................................................................................................................................... 22
3.3.2 VGA ANALOG INTERFACE.................................................................................................................... 23
3.3.3 ETHERNET CONNECTION ..................................................................................................................... 23
3.3.4 SERIAL PORT..................................................................................................................................... 24
3.3.5 SWITCH SETTINGS.............................................................................................................................. 25
4 HARDWARE PLATFORM MANAGEMENT..................................................................................... 28
4.1 PLATFORM MANAGEMENT OVERVIEW............................................................................................... 28
4.2 IPMI SENSORS ............................................................................................................................ 28
4.2.1 GET SENSOR READING (FRU HOTSWAP SENSOR) .................................................................................... 32
4.2.2 GET SENSOR READING (PHYSICAL IPMB-0 SENSOR) ................................................................................ 33
4.2.3 WATC HD OG TIMER SENSOR ................................................................................................................. 34
4.2.4 VERSION CHANGE SENSOR .................................................................................................................. 35
4.2.5 GET SENSOR READING COMMAND........................................................................................................ 36
3
4.3 IPMI COMMANDS........................................................................................................................ 38
5 GETTING STARTED ...................................................................................................................... 40
5.1 SAFETY REQUIREMENTS ................................................................................................................. 40
5.2 INSTALLING AND REMOVING THE ATCA-6200 BLADE ............................................................................ 41
5.2.1 INSTALLING THE BLADE ....................................................................................................................... 41
5.2.2 REMOVING THE BLADE ....................................................................................................................... 45
6 BIOS ........................................................................................................................................... 48
6.1 ENTERING THE BIOS SETUP SCREEN.................................................................................................. 48
6.1.1 NAVIGATION ..................................................................................................................................... 48
6.2 MAIN BIOS SETUP SCREEN ............................................................................................................ 49
6.3 ADVANCED SETUP SCREEN .............................................................................................................. 51
6.3.1 TRUSTED COMPUTING ........................................................................................................................ 52
6.3.2 CPU CONFIGURATION ........................................................................................................................ 53
6.3.3 RUNTIME ERROR LOGGING.................................................................................................................. 56
6.3.4 SATA CONFIGURATION ....................................................................................................................... 57
6.3.5 SAS CONFIGURATION ......................................................................................................................... 58
6.3.6 USB CONFIGURATION ........................................................................................................................ 58
6.3.7 HW MONITOR FROM IPMC................................................................................................................ 59
6.3.8 W83627UHG SIO CONFIGURATION.................................................................................................... 60
6.3.9 SERIAL PORT CONSOLE REDIRECTION..................................................................................................... 61
6.3.10 NETWORK STAC K ............................................................................................................................. 64
6.3.11 ISCSI CONFIGURATION ..................................................................................................................... 65
6.3.12 INTEL ETHERNET PORT CONFIGURATION............................................................................................... 70
6.4 CHIPSET SETUP SCREEN.................................................................................................................. 71
6.4.1 NORTH BRIDGE ................................................................................................................................. 71
6.4.2 SOUTH BRIDGE.................................................................................................................................. 75
6.5 SERVER MGMT SETUP SCREEN ........................................................................................................ 79
6.6 BOOT SETUP SCREEN ..................................................................................................................... 80
6.7 SECURITY SETUP SCREEN ................................................................................................................ 82
6.8 SAVE & EXIT SETUP SCREEN ............................................................................................................ 83
7 SERIAL OVER LAN ....................................................................................................................... 85
7.1 PREPARATION FOR SOL CONNECTION................................................................................................ 85
7.2 CONFIGURING THE REMOTE CLIENT................................................................................................... 85
7.2.1 INSTALLING THE IPMITOOL FOR REMOTE CLIENT....................................................................................... 85
7.3 CONFIGURING THE TARGET ATCA-6200 ............................................................................................ 86
7.3.1 BIOS CONFIGURATION ....................................................................................................................... 86
7.3.2 LINUX GRUB SETTINGS ...................................................................................................................... 86
7.3.3 LINUX SYSTEM SETTINGS ..................................................................................................................... 86
7.4 ESTABLISH SOL CONNECTION .......................................................................................................... 87
8 DRIVERS ..................................................................................................................................... 88
SAFETY INSTRUCTIONS..................................................................................................................... 89
GETTING SERVICE ............................................................................................................................. 90
4
1 Overview
1.1 Introduction
The aTCA-6200 is a highly sophisticated AdvancedTCA processor blade supporting dual eight-core Intel®
Xeon® processor E5-2648L, eight DDR3-1600 VLP RDIMMs up to 128 GB memory capacity and one
single width, mid-size AMC bay. The aTCA-6200 delivers the computing power of 32 concurrent threads,
massive I/O and memory capacity, and flexible connectivity for high-end telecom and media server
applications requiring carrier-grade reliability and performance. More detailed features are outlined
below and a functional block diagram is shown in the next section.
Two eight-core Intel® Xeon® processor E5-2648L
Server-class Intel® C604 PCH
Intel® Communications Chipset 8920
DDR3-1600 JEDEC standard VLP RDIMM (REG/ECC), up to 128 GB
Onboard bootable SATA interface CFast card socket
One Intel® 82580EB PCI-Express Gigabit Ethernet controller
One Intel® 82576EB PCI-Express Gigabit Ethernet controller
Intel® 82599EB PCI-Express 10Gigabit Ethernet (XAUI) controller
Dual PICMG 3.1 option 9 Fabric Interface channels
One single width, mid-size AMC bay supports AMC.0/1/2/3
Failover system BIOS
Analog RGB up to 1920x1440 resolution
5
1.2 Block Diagram
6
1.3 Package Contents
Before opening the product box, please check the shipping carton for any damage. If the shipping
carton and contents are damaged, notify the dealer for a replacement. Retain the shipping carton
and packing material for inspection by the dealer. Obtain authorization before returning any product
to ADLINK.
Check that the following items are included in the package. If there are any missing items, contact
your dealer:
aTCA-6200 AdvancedTCA processor blade (CPU, RAM specifications may differ depending on
options selected)
RJ-45 to DB9 cable
7
2 Specifications
2.1 aTCA-6200 Specifications
2.1.1 CPU/ Chipset/ Memory
CPU Dual Eight-Core Intel® Xeon® Processor E5-2648L,
(2.1GHz QPI 8.0GT/s, 20MB L2 cache, LGA2011 Socket)
Chipset Intel® C604 PCH
Intel® Communications Chipset 8920
Memory Support Registered ECC DDR3-1600 VLP RDIMM
Eight RDIMM sockets
Up to 128GB
2.1.2 Standard and Interface
Standards PICMG 3.0 R2.0 AdvancedTCA
PICMG 3.1 AdvancedTCA Ethernet option 9
Networking One Quad-Port Intel® 82580EB Gigabit Ethernet Controller
One Dual-Port Intel® 82576EB Gigabit Ethernet Controller
Dual 10/100/1000BASE-T RJ45 ports on face plate
Dual GbE SerDes to RTM
Dual 10/100/1000BASE-T Base Interface Channels
Dual 10GBASE-BX4 Fabric Interface Channels via Intel® 82599EB 10G
Ethernet Controller on aDB-6100-A riser card (option 9)
Display Silicon Motion SM750 graphics controller
Analog RGB up to 1920x1440 resolution
USB Three USB 2.0 ports on front panel, three USB 2.0 ports to RTM
Serial One RS-232 port (RJ-45) on front panel,
One RS-232 port to RTM
Storage Support AMC.3 SAS/SATA
Onboard bootable CFast socket
Onboard 2.5 inch SATA HDD mounting space (optional: shares the same
space with AMC bay)
Three SAS channels to RTM
Front panel I/O 1x VGA port (DB-15)
3x USB 2.0 port (Type-A)
1x RS-232 port (RJ45)
2x GbE ports (RJ45)
1x Single width, mid-size AMC slot
LEDs: OOS, Media, User and Hotswap
Recessed reset button
Rear I/O PCI-E x8 from CPU1
1x COM port
3x USB 2.0 ports
2x SATA ports from C604 PCH
3x SAS ports from C604 PCH
2x GbE SerDes ports
8
2.1.3 Software
BIOS AMI® BIOS with 8Mbit flash memory
Supported OS Microsoft® Windows® Server 2008
Microsoft® Windows® Server 2008 R2
RedHat Enterprise Linux Release 6.2
MontaVista Linux Carrier Grade Edition 5.1
Contact ADLINK for other OS availability
2.1.4 Mechanical & Environmental
Dimensions 322.25mm x 280mm x 30.48mm (H x D x W) - 6HP slot
Operating
temperature
Storage temperature -40°C to 85°C
Humidity 5% to 90% non-condensing
Shock 15G peak-to-peak, 11ms duration, non-operation
Vibration Non-operating: 1.88G rms, 5 to 500 Hz, each axis
Compliance CE, FCC Class A, CUL, NEBS Level 3 (design)
Standard: 0°C to 50°C
NEBS short-term: 0°C to 55°C
Operating: 0.5G rms. 5 to 500Hz, each axis
9
2.2 Power Consumption
This section provides information on the power consumption of the aTCA-6200.
System configuration
(1) Memory: 8x ATP XL13N4E8GS-C-AD 8GB DDR3-1333 ECC REG
(2) Graphics: Silicon Motion SM750
(3) Power Supply: Sunpower SPS-600P-48
(4) Dual Eight-Core Xeon E5-2648L
The following table describes power consumption with a 48V power rail under different OS and
applications.
OS and Applications aTCA-6200
DOS
Linux, Idle
Windows® Server 2008 R2, idle
Windows® Server 2008 R2, BurnIn Test, CPU 100% usage
Windows® Server 2008 R2, Power Thermal Utility, CPU 100% Usage
123.36 W
111.36 W
70.08 W
167.04 W
180.48 W
10
2.3 Board Layout
2.3.1 aTCA-6200 Board Layout
CN5
CN4
CN8
CN1-3
U24
DIMM_A-D
D C B A
U41
U1
CPU1
J3
CPU2
J4
DIMM_E-H
E F G H
J2
U26
J1
Location Description Location Description
CN4 1GbE Ethernet ports DDR3_E-H DDR3-1600 DIMM E-H
CN5 1GbE Ethernet ports J1 Base Interface
CN8 COM port J2 Fabric Interface
CN10 DB-15 VGA connector J3-J4 Zone 3 to RTM
CN1-3 USB ports U1 Intel C604 PCH
CPU1 CPU1 Socket U24 Intel 82580EB
CPU2 CPU2 Socket U26 Intel 82576EB
DDR3_A-D DDR3-1600 DIMM A-D U41 Silicon Motion SM750
11
aTCA-6200 Front Panel
GbE
(RJ45)
Out of Service LED (Red) Media LED (Green)
User LED (Amber) Hot-swap LED (Blue)
Reset button
COM
(RJ45)
USB
VGA
2.3.2 LED Definition
The following shows the LED in the front panel includes the Hot-swap LED, User LED, Media LED, and
OOS LED.
2.3.2.1 Hot-swap LED
Hot-swap LED (Blue) FRU State number FRU State Name
Off M0 FRU not installed
On M1 FRU inactive
Long blink M2 FRU activation request
Off M3 FRU activation in process
Off M4 FRU active
Short blink M5 FRU deactivation request
Short blink M6 FRU deactivation in process
2.3.2.2 OOS LED
Out of Service LED (Red) State Remark
Blink During BIOS POST FRU State M4
Off BIOS POST OK FRU State M4
On After OS shutdown FRU State M1
12
2.3.2.3 Media LED
Media LED (Green) State Remark
Blink Accessing Disk I/O
Off Disk I/O idle
2.3.2.4 User LED
User LED (Amber) State Remark
On Default On This LED is reserved for customer
applications and can be controlled via
GPIO.
2.3.2.5 Base and Fabric Channel LED
BASE Channel and Fabric Channel LED
Fabric 2 Speed and Link
1Gbps – OFF
10Gbps – ON (Amber)
Fabric 2 ACT (Amber)
Blink when accessing
Ethernet I/O
Fabric 1 Speed and Link
1Gbps - OFF
10Gbps – ON (Amber)
Fabric 1 ACT (Amber)
Blink when accessing
Ethernet I/O
BCH2 Speed and Link
100 Mbps: Green
1Gbps: Amber
BCH2 ACT (Amber)
Blink when accessing
Ethernet I/O
BCH1 Speed and Link
100 Mbps: Green
1Gbps: Amber
BCH1 ACT (Amber)
Blink when accessing
Ethernet I/O
2.3.2.6 GbE LED
RJ-45
LED2: Speed and Link
1Gbps: Amber,
100Mbps: Green
LED1: ACT
Blinking when accessing I/O
Color: Amber
13
2.4 Compliance
The aTCA-6200 conforms to the following specifications:
PICMG 3.0 R2.0 ECN0002 AdvancedTCA
PICMG 3.1 Ethernet over AdvancedTCA option 9
AMC.0 Advanced Mezzanine Card R2.0 single width, midsize
AMC.1 PCI Express R1.0
AMC.2 E2 / Type 4 (shares concurrent LAN3/4 from Intel 82580EB with 2x Serdes to RTM)
AMC.3 Storage R1.0
14
3 Functional Description
3.1 CPU, Memory and Chipset
3.1.1 CPU
The Intel Xeon E5-2648L processor implements several key technologies:
Four channel Integrated Memory Controller supporting DDR3
Integrated I/O with up to 40 lanes for PCI Express* Generation 3.0
Two point-to-point link interface based on Intel® QuickPath Interconnect (Intel® QPI) up to
8.0GT/s
20 MB of shared cache
Streaming SIMD Extensions 2 (SSE2), Streaming SIMD Extensions 3 (SSE3) and Streaming SIMD
Extensions 4 (SSE4).
The Intel E5-2648L processor supports several advanced technologies:
Execute Disable Bit
Intel® 64 Technology
Enhanced Intel SpeedStep® Technology
Intel® Virtualization Technology (Intel® VT)
Intel® Hyper-Threading Technology (Intel® HT Technology)
The Intel Xeon E5-2648L processor has a max. TDP of 70W and has an elevated case temperature
specification. The elevated case temperatures are intended to meet the short-term thermal profile
requirements of NEBS Level 3. The Intel Xeon E5-2648L processor is ideal for thermally constrained
form factors in embedded servers, communications and storage markets.
Supported Processors, Maximum Power Dissipation
The following table describes the Intel E5-2648L processor supported by the aTCA-6200
Name Intel® Xeon® processor E5-2648L
L2 cache 20MB
Clock 1.8GHz
QPI 8.0 GT/s
TDP 70W
15
3.1.2 Memory
The aTCA-6200 supports DDR3-1600 RDIMM with eight DIMM sockets (A to D and E to H) up to
128GBytes. Socket A to D are controlled by integrated memory controller in CPU1 as well as socket
E/F/G/H are controlled by integrated memory controller in CPU2. There are 3 memory channels from
CPU1 for socket A/B/C/D while socket C/D share the same memory channel. The design logic also
applies to socket E/F/G/H and socket G/H share the same memory channel.
DIMM_E-H
CPU2
E F G H
DIMM_A-D
D C B A
CPU1
Memory configuration changes are only permitted to be performed at the factory. Failure to
comply with the above may result in damage to your board or improper operation.
16
3.1.3 Intel® C604 PCH Overview
The Intel® C604 Chipset PCH provides a connection point between various I/O components and DMI
based processors.
Functions and capabilities include:
PCI Express Base Specification, Revision 2.0 support for up to eight ports with transfers up to 5
GT/s.
PCI Local Bus Specification, Revision 2.3 support for 33 MHz PCI operations (supports up to four
Req/Gnt pairs).
ACPI Power Management Logic Support, Revision 4.0a Enhanced DMA controller, interrupt
controller, and timer functions
Integrated Serial Attached SCSI host controllers at transfer rate up to 3Gb/s on up to four ports.
Integrated Serial ATA host controller switch independent DMA operation on up to six ports.
USB host interface with two EHCI high-speed USB 2.0 Host controllers and 2 rate matching hubs
provide support for support for up to fourteen USB 2.0 ports
Integrated 10/100/1000 Gigabit Ethernet MAC with System Defense
System Management Bus (SMBus) Specification, version 2.0 with additional support for I2C*
devices
Intel® High Definition Audio Supports
Intel® Rapid Storage Technology enterprise (Intel® RSTe)
Intel® Active Management Technology (Intel® AMT)
Intel® Virtualization Technology for Directed I/O (Intel® VT-d)
Intel® Trusted Execution Technology (Intel® TXT)
Low Pin Count (LPC) interface Firmware Hub (FWH) interface
Serial Peripheral Interface (SPI)
Intel® Anti-Theft Technology (Intel® AT)
JTAG Boundary Scan support
3.1.4 Intel® Communications Chipset 8920
The Intel® Communications Chipset 8920, enables workload consolidation across the control and data
planes. Support for Intel® QuickAssist Acceleration Technology provides optimized packet and network
capabilities by offloading cryptographic and compression workloads to the Intel® Communications
Chipset 8920, freeing up CPU resources.
PCI Express Gen2 x16 Uplink
Support Intel
®
QuickAssist Technology
17
3.1.5 Silicon Motion SM750 Graphics Controller
The aTCA-6200 provides an analog VGA port on the front panel powered by Silicon Motion SM750 2D
graphics controller with the following features:
• PCI-Express x1 architecture
• 16MB integrated video DDR memory
• Low power consumption < 1.5W
• 300 MHz DAC supports up to 1920x1440 resolution
• 128-bit 2D graphic engine
• ROPs, BitBLT, transparent BLT, pattern BLT, Color expansion, and Line drawing
• YUV-16/32-bit RGB conversion
• Support 7 layers of display frames (2 hardware cursors, primary graphic, video, video alpha, alpha,
and secondary graphic)
• Two 8-bit portsorone16-bitvideocaptureportsupportsITU601
• and ITU 656 specifications UV-16/32-bit RGB conversion
• ReduceOnTM Power Management Technology
• Quick-Rotation features allow for 90°, 180°, and 270° rotation of on-screen images
3.2 Peripherals
The following standard peripherals are available on the aTCA-6200 blad
3.2.1 Battery
The aTCA-6200 is equipped with a 3.0 V “coin cell” lithium battery for the RTC. To replace the
battery, proceed as follows:
Turn off power
Remove the battery
Place the new battery in the socket
Make sure that you insert the battery with the correct orientation. The positive pole must be on the
top.
The lithium battery must be replaced with an identical battery or a battery type recommended by the
manufacturer. A suitable battery is the Panasonic CR2032.
Note: The user must be aware that the battery’s operational temperature range is less than that of the
aTCA-6200’s storage temperature range. For exact temperature range information, refer to the battery
manufacturer’s specifications.
Note: Care must be taken to ensure that the battery is correctly replaced. The battery should be
replaced only with an identical or equivalent type recommended by the manufacturer. Dispose of used
batteries according to the manufacturer’s instructions. The typical life expectancy of a 225mAh battery
18
(VARTA CR2032) is 4-5 years with an average on-time of 8 hours per working day at an operating
temperature of 30°C. However, this typical value varies considerably because the life expectancy is
dependent on the operating temperature and standby (shutdown) time of the system in which it
operates. To ensure that the lifetime of the battery has not been exceeded, it is recommended to change
the battery after 3-4 years.
3.2.2 Reset
The aTCA-6200 is automatically reset by a precision voltage monitoring circuit that detects a drop in
voltage below the acceptable operating limit of 4.85V for the 5V line and below 3.2V for the 3.3V line.
Other reset sources include the Watchdog Timer, the face plate push-button switch and also the RESET
signal from the IPMC. The aTCA-6200 responds to any of these sources by initializing local peripherals.
A reset will be generated by the following conditions:
Power failure, +5 V supply falls below 4.1 V (typ.) or +3.3 V supply falls below 2.93 V (typ.)
Pushbutton
Watchdog time-out
IPMI controller reset
´RESET"
pressed
19
3.2.3 SMBus Devices
The aTCA-6200 provides a System Management Bus (SMBus) hosted by the C604 PCH as shown in the
diagram below.
SMBus Diagram
SMBCLK
SMBDATA
P3V3_SB
HOST_3V3STBY_CLK/DATA
PCA9515
PCH
P3V3
HOST_SMBCLK/DATA
CK420BQ
SMBUS ADDRESS = 0XD2
0
IPM_S CL0
IPM_S DA0
P3V3_MG
P3V3
LAN (BCH)
82576EB
IPMC
IPMBA_ CLK/DAT
2
IPMBB_CLK/DAT
3
I2CCLK_IPM / I2CD AT_IPM
4
SMBUS ADDRESS = 0xA6
IPMB_L_CL K / IPMB_L_DAT
5
1
EEPROM
24C256
Isolat or
LTC4300
Isolat or
LTC4300
SMBUS ADDRESS = 0x40
SMBus I/O
PCA9555
Isolator
LTC4300
RTM
SMBUS ADDRESS = 0x90/92/94
SMBUS ADDRESS = 0x48
Super I/O
W83627UHG
DB1900Z
ICS9ZX21901ICS932SQ420
SMBUS ADDRESS = 0xD8
ZON E 1
TS
LM73 x3
Isolator
LTC4301
AMC
LAN
82580EB
SMBUS ADDRESS = 0xXX
SMBUS ADDRESS = 0x56h
MAX6618
HW Monitor
NCT7904D
SMBUS ADDRESS = 0x5C
Cave Creek
SMBUS ADDRESS = 0xXX
Daughter Card
SMBUS ADDRESS = 0xAE
CPU 0
CPU 1 PCA9517D
PCA9517D
PCA9517D
PCA9517D
DIMM A
0xA0
ISL90727
0x5C
DIMM C-1
0xA0
DIMM D
0xA8
ISL90727
0x5C
DIMM E
0xA0
ISL90728
0x5C
DIMM G-1
0xA0
DIMM H
0xA8
ISL90728
0x5C
PCA9555PW
for AMC Hot -plug support
DIMM C-2
DIMM G-2
0x40CPU 0 PCA9517D
0xA2
0xA2
20
3.2.4 GPIO List
The following table summarizes GPIO usage on the C604 PCH
Name Power Well Default Description Name Power Well Default Description
GPIO0 3.3V GPI IRQ_SSB_SCI_WHEA_N (PU) GPIO38 3.3V GPI Unused (PU)
GPIO1 3.3V GPI Unused (PU) GPIO39 3.3V GPI Unused (PU)
GPIO2 5V GPI TTL_ERR_N0 GPIO40 3.3V_SB Native Unused (PU)
GPIO3 5V GPI FM_ERR1_DLY_N GPIO41 3.3V_SB Native USB1_OC-L (PU)
GPIO4 5V GPI FM_IBMC_SSB_SMI_LPC_N (PU) GPIO42 3.3V_SB Native Unused (PU)
GPIO5 5V GPI IRQ_IBMC_SSB_NMI (PU) GPIO43 3.3V_SB Native USB2_OC-L (PU)
GPIO6 3.3V GPI Unused (PU) GPIO44 3.3V_SB GPI Unused (PU)
GPIO7 3.3V GPI Unused (PU) GPIO45 3.3V_SB GPI Unused (PU)
GPIO8 3.3V_SB GPO IRQ_CATERR_DLY_BUF_N GPIO46 3.3V_SB GPI Unused (PU)
GPIO9 3.3V_SB Native Unused (PU) GPIO47 3.3V_SB GPI Unused (PU)
GPIO10 3.3V_SB Native Unused (PU) GPIO48 3.3V GPI Unused (reserve PU)
GPIO11 3.3V_SB Native PU_SMB_ALERT_N (PU) GPIO49 3.3V GPI Unused (PU)
GPIO12 3.3V_SB Native LOM_DEV_OFF_N (PU) GPIO50 5V Native Unused (PU)
GPIO13 3.3V_SB GPI FM_IBMC_SSB_SCI_LPC_N (PU) GPIO51 3.3V Native PU_SGPIO_GSX_DOUT (PU)
GPIO14 3.3V_SB Native Unused (PU) GPIO52 5V Native Unused (PU)
GPIO15 3.3V_SB GPO SAS_SATA_RAID_KEY (PU) GPIO53 3.3V Native Unused (PU)
GPIO16 3.3V GPI PU_SSB_GP16 (PU) GPIO54 5V Native Unused (PU)
GPIO17 3.3V GPI Unused (PU) GPIO55 3.3V Native
GPIO18 3.3V GPO Unused (PU) GPIO56 3.3V_SB GPI Unused (PU)
GPIO19 3.3V GPI FM_BIOS_SPI_WP_N GPIO57 3.3V_SB GPI FM_ME_RCVR_N (PU)
GPIO20 3.3V GPO FM_SMI_ACTIVE_N (PU) GPIO58 3.3V_SB Native PMBUS_CLK (PU)
GPIO21 3.3V GPI Unused (PU) GPIO59 3.3V_SB Native USB0_OC-L (PU)
GPIO22 3.3V GPI Unused (PU) GPIO60 3.3V_SB Native IRQ_SML0_ALERT_N (PU)
GPIO23 3.3V Native Unused (PU) GPIO61 3.3V_SB GPO LPC_TPM_PD_N
GPIO24 3.3V_SB GPO FM_PBG_DYN_SKU_KEY (PU) GPIO62 3.3V_SB Native CLK_33K_SUSCLK_PLD
GPIO25 3.3V_SB GPO SSB_GP25 (TP) GPIO63 3.3V_SB Native FM_SLPS5_N
GPIO26 3.3V_SB GPO SSB_GP26 (TP) GPIO64 3.3V GPO Unused (TP)
GPIO27 3.3V_SB GPI FP_PWR_LED_N (PU) GPIO65 3.3V GPO Unused (TP)
GPIO28 3.3V_SB GPO PD_SSB_GP28 (PU) GPIO66 3.3V GPO USR_LED
GPIO29 3.3V_SB GPI FM_THROTTLE_N (PU) GPIO67 3.3V GPO Unused (TP)
GPIO30 3.3V_SB Native PU_SUS_WARN_N (PU) GPIO68 3.3V GPI Unused (PU)
GPIO31 3.3V_SB GPI
GPIO32 3.3V GPO
GPIO33 3.3V GPO Unused (TP) GPIO71 3.3V Native Unused (PU)
GPIO34 3.3V GPI FM_VIDEO_DISABLE_N (PU) GPIO72 3.3V_SB Native PU_BATLOW_N (PU)
GPIO35 3.3V GPO FM_NMI_EVENT_N (PU) GPIO73 3.3V_SB GPI Unused (PU)
GPIO36 3.3V GPI TP_SSB_GP36 (PD) GPIO74 3.3V_SB Native IBMC_THERMTRIP_N (PU)
GPIO37 3.3V GPI Unused (reserve PU) GPIO75 3.3V_SB Native PMBUS_DATA (PU)
IRQ_SML1_PMBUS_ALERT_N
(PU)
FM_MULTIPLE_PCI_MASTER_N
(PU)
GPIO69 3.3V GPI Unused (PU)
GPIO70 3.3V Native Unused (PU)
FM_BIOS_RCVR_BOOT_N
(PU)
21
3.3 IO Interfaces
3.3.1 USB
The aTCA-6200 supports six USB 2.0 ports:
Three Type-A ports on front panel
Three ports routed to RTM
On the USB 2.0 front panel port, a USB cable with up to 5 meters in length can be used.
On the USB 2.0 Rear I/O ports, it is strongly recommended to use a cable below 3 meters in length for
USB 2.0 devices.
The USB 2.0 ports are high-speed, full-speed, and low-speed capable. Hi-speed USB 2.0 allows data
transfers of up to 480 Mb/s, 40 times faster than a full-speed USB (USB 1.1). One USB peripheral may
be connected to each port.
Front Panel USB Connector (CN9-11)
Pin USB 2.0 Signal Names
1 VCC
2 Data3 Data+
4 GND
Note: The aTCA-6200 host interfaces can be used with maximum 500mA continuous load current as
specified in the Universal Serial Bus Specification, Revision 2.0. Short circuit protection is provided. All
the signal lines are EMI filtered.
22
3.3.2 VGA Analog Interface
The DB-15 female connector CN10 is for analog display output.
Pin Name Pin Name
1 RED 9 +5v
2 GREEN 10 GND
3 BLUE 11 NC
4 NC 12 DDC_DATA
5 GND 13 HSYNC
6 GND 14 VSYNC
7 GND 15 DDC_CLK
8 GND
3.3.3 Ethernet Connection
The aTCA-6200 is equipped with one quad-port Intel® 82580EB Gigabit Ethernet Controller and one
dual-port Intel® 82576EB Gigabit Ethernet Controller which provide six GbE ports in total. In default
configuration, two ports (LAN 1/2) from Intel® 82580EB Gigabit Ethernet Controller are connected to
the front panel RJ-45 ports. The other two ports (LAN3/4) are routed as GbE SerDes signals to Zone 3
RTM connectors or to the AMC port for AMC.2 E2 Support. Users can select the routing by changing
the setting of switch SW11. Two GbE ports from Intel® 82576EB Gigabit Ethernet Controller are
connected to Zone 2 Base Interface channel 1 and 2 (BCH1/BCH2).
The aDB-6100-A Fabric riser card provides the capability to support different configurations for
Fabric Channels 1 and 2. An aDB-6100-A will be installed on the aTCA-6200 by default. An Intel
82599EB Ethernet controller on the riser card connects provides 10GbE links to Fabric Channels 1
and 2 (FCH1/FCH2).
23
3.3.4 Serial Port
One PC-compatible serial RS-232 RJ-45 port is provided on the front panel with DIP switches SW9 and
SW10 on the board that are used to set the COM port function (refer to section 3.3.5 for detailed
switch settings). A complete set of handshaking and modem control signals are supported, with data
transfer rates up to 115.2 kB/sec.
The Front Panel RS-232 RJ-45 connector pin-assignment fore different modes are listed below.
The pin assignment of front panel RS-232 RJ-45 connector for COM mode:
Pin Signal Name Function
1 DCD# Data Carrier Detect
2 RTS# Request to Send
3 DSR# Data Set Ready
4 TXD Transmit Data
5 RXD Receive Data
6 GND Ground
7 CTS# Clear to Send
8 DTR# Data Terminal Ready
The pin assignment of front panel RS-232 RJ-45 connector for IPMC debug mode:
Pin Signal Name Function
1 NC No connected
2 NC No connected
3 NC No connected
4 DBG_TX IPMC Transmit Data
5 DBG_RX IPMC Receive Data
6 GND Ground
7 NC No connected
8 NC No connected
24
3.3.5 Switch Settings
3.3.5.1 Set Blade Operation Mode
Use Pin 2 of switch SW11 to set the Blade Operation Mode. Users can choose Normal Mode for
operation with chassis or Standalone Mode for operation without chassis. Detailed settings are listed
below.
Options Pin1 Pin 2 Pin 3 Pin 4
Normal Mode Off Off On Off
Standalone Mode Off On On Off
3.3.5.2 Select AMC.2 E2 Support
Use Pin 4 of switch SW11 to set the routing of LAN3/4 to Intel 82580EB to support AMC.2 E2 or to RTM.
Detailed settings are listed below.
Options Pin1 Pin 2 Pin 3 Pin 4
2x Serdes to RTM Off Off On Off
AMC.2 E2 Support Off Off On On
25
Switch SW11 is located at the edge of PCB near the handle.
SW11
26
3.3.5.3 Select Front Panel RJ-45 COM Port Mode
Use switches SW9 and SW10 located on the solder side of the aTCA-6200 to select the operating mode
for front panel RJ-45 COM port. Users can choose RS-232 Mode for standard RS-232 COM port or IPMC
Debug Mode which routes the front panel RJ-45 COM port to the IPMC.
Configuration Switch Pin 1 Pin 2 Pin 3 Pin 4
RS-232 Mode
(default)
IPMC Debug Mode
SW10
SW9 On On Off Off
SW10 On Off Off Off
SW9 Off Off On On
SW10 Off On On On
SW9
27
4 Hardware Platform Management
4.1 Platform Management Overview
The purpose of the hardware platform management system is to monitor, control, and assure proper
operation of AdvancedTCA® Boards and other Shelf components. The hardware platform management
system watches over the basic health of the system, reports anomalies, and takes corrective action
when needed. The hardware platform management system can retrieve inventory information and
sensor readings as well as receive event reports and failure notifications from Boards and other
Intelligent FRUs. The hardware platform management system can also perform basic recovery
operations such as power cycle or reset of managed entities.
The IPMI controller on aTCA-6200 supports an “intelligent” hardware management system, based on
the Intelligent Platform Management Interface Specification. The hardware management system
provides the ability to manage the power, cooling, and interconnect needs of intelligent devices; to
monitor events; and to log events to a central repository.
4.2 IPMI Sensors
Following table shows all the sensors which aTCA-6200 supported.
Item Sensor Name
(1) Hot Swap (0x0) FRU Hotswap Sensor. Please refer to section 4.2.1
(2) Hot Swap AMC 1 (0x1) AMC#1 Hotswap Sensor. Please refer to section 4.2.1
(3) RTM Hot Swap (0x2) RTM Hotswap Sensor. Please refer to section 4.2.1
(4) Version change (0x3) Version Change Sensor. Please refer to section 4.2.4
(5) IPMB Physical (0x4) Physical IPMB Sensor. Please refer to section 4.2.2
(6) BMC Watchdog
(7) +1.5V DDR-CPU (0x6) Voltage Sensor. Please refer to section 4.2.5
(8) +1.8V CPU0 (0x7) Voltage Sensor. Please refer to section 4.2.5
(9) +1.5V DDR-CPU1 (0x8) Voltage Sensor. Please refer to section 4.2.5
Sensor
Address
(0x5) Watchdog Timer Sensor. Please refer to section 4.2.3
Upper Non-Recoverable Threshold = 1.65 Volts
Upper Critical Threshold = 1.62 Volts
Upper Non-Critical Threshold = 1.59 Volts
Lower Non-Critical Threshold = 1.296 Volts
Lower Critical Threshold = 1.242 Volts
Lower Non-Recoverable Threshold = 1.215 Volts
Upper Non-Recoverable Threshold = 1.98 Volts
Upper Critical Threshold = 1.944 Volts
Upper Non-Critical Threshold = 1.908 Volts
Lower Non-Critical Threshold = 1.692 Volts
Lower Critical Threshold = 1.656 Volts
Lower Non-Recoverable Threshold = 1.62 Volts
Upper Non-Recoverable Threshold = 1.65 Volts
Description
28
Loading...