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This manual is designed to help you use the ACL-8454. The manual
describes how to modify various settings on the ACL-8454 card to meet
your requirements. It is divided into 5 chapters:
Chapter 1,
features, applications and specifications.
Chapter 2,
operation method and multi-functions of the ACL-8454. Users
should read through this chapter to understand the configurations of
the ACL-8454. The chapter will also teach user how to install the
ACL-8454.
Chapter 3,
format of the ACL-8454, this information is very useful for the
programmers who want to control the hardware by low-level
programming.
Chapter 4,
connectors' pin assignment and how to connect the outside signal
and devices to / from the ACL-8454. Some applications are also
introduced.
Chapter 5,
library for operating the ACL-8454. Some examples are shown too.
"Introduction" gives an overview of the product
"Installation & Configurations" describes the
"Register Format" describes the details of register
"Signal Connection & Applications” describes the
"High-level Programming" introduces the C-language
1
Introduction
The ACL-8454 is a general purpose counter/timer and digital I/O card. It is a
compact-size add-on card for IBM AT compatible PC in control, monitoring
and sensing applications. There are two version of ACL-8454: ACL-8454/6
and ACL-8454/12. ACL-8454/6 has two 8254 chips (6 counters) on board.
ACL-8454/12 has four 8254 chips (12 counters).
On ACL-8454/6, four counters are used for external signal, two counters are
cascaded as 32-bit timer. On ACL-8454/12, eight counters are used for
external signal, the rest of the four counters are designed as two 32-bit
cascaded counters.
This card has multi-configurations. The counters can be set as independent
counters or cascaded counters. The gate control of every counter comes
from either external source or internal cascaded counter. The clock source
comes from either internal or external can be selected by jumper setting. A
10 MHz oscillator is used as the base clock of internal clock sources.
It is possible to use this card on variety of powerful counter/timer functions
to match your industry and laboratory applications. Users can set the
configuration to fit the variety of applications, such as timer, event counter,
frequency generator, pulse width measurement, and frequency
measurement.
Introduction 1
The card also provides digital output and input port. There are 8 digital
output channels and these channels can be used to control the external
devices. There are digital input channels and these channels are shared the
same signal lines with the external clock and the external gate signals.
Whenever the external clock or gate signals are not used, they can be
dedicatedly used as D/I. There are at least 8 D/I bits under default setting of
the ACL-8454 because only two 8254 chips are used.
ACL-8454 provides one interrupt signal which comes from one of four
internal or external interrupt sources. Three internal interrupt sources come
from the counter output. One external interrupt source shares with one D/I
pin. The interrupt can be used for watchdog timer or other applications. One
of the 11 interrupt levels on the AT-bus can be selected by setting jumper.
Figure 1.1 shows the block diagram of the ACL-8454.
8 bits
Digital Input
data bus
buffer
8254
chip #1
8254
chip #2
address
PC bus
decoder
address
switch
Double
interrupt
level selector
Clock
System
Optional
8254
chip #3
8254
chip #4
8 bits
Digital Input
8 bits
Digital O utput
Figure 1.1. Block diagram of the ACL-8454
8
jumpers
8
(CLK,GATE) 6
(OUT) 3
(CLK,GATE) 2
(OUT) 2
(CLK,GATE) 6
(OUT) 3
(CLK,GATE) 2
(OUT) 2
8
37 pin D-type connector
2 Introduction
1.1 Features
The ACL-8454 Counter/Timer and digital I/O Card provides the following
advanced features:
Default 6 counters/timers are installed and it is expandable to 12
counters/timers at most
Multi-configurations of counters/timers:
Flexible setting for each independent counter, the clock source
could be external, internal or cascaded. The gate signal is external
controlled or internal cascaded signal.
8 digital output channels
16 digital input channels shared with the same signal lines with
external gate control and external clock input
Two interrupt sources
The first interrupt source comes from output of counter #6 and this
signal is jumper selectable to one of 4 IRQ channels
The second interrupt source comes from either internal periodic or
external source. This signal is jumper selectable to one of 5 IRQ
channels.
Synchronized 4 channels frequency measurement is possible
37-pin D-type female connector
AT-Bus and compact size (Half-size only)
1.2 Applications
Event counter
Frequency generator
Frequency synthesizer
Pulse width measurement
Low level pulse generator
Time delay
Industry automation
Watchdog timer
Laboratory and Industrial automation
Introduction 3
1.3 Specifications
Programmable Counter/Timer
Device :
Counters :
Clock source :
Gate control :
Digital I/O (DIO)
# of input channels : 16 channels
# of output channels :
Electronics characteristics : TTL compatible signal
General Specifications
I/O Base Address :
Interrupt IRQ :
Connector :
Operating Temperature : 0 C ~ 60 C
Storage Temperature : -20 C ~ 80 C
Humidity :
Power Consumption :
Dimension :
8254 x 2 (default), or 8254 x 4 (at most)
16-bit down counter
internal clock, external source or cascaded
default enable or external control
8 channels (dedicated output)
8 consecutive address space
IRQ 3, ..., IRQ 15 (9 levels jumper selectable)
37-pin D-type female connector
5 ~ 95, non-condensing
+5 V @ 210 mA maximum
163mm(L) X 108mm(W)
4 Introduction
2
Installation & Configurations
This chapter describes the configuration and function of the ACL-8454 and
the steps to install the ACL-8454. At first, the contents in the package and
unpacking information that you should care about are described. The
versatile configurations of ACL-8454 are introduced so that you can
configure it according to your applications. The default setting of ACL-8454
is shown at the end of this chapter.
2.1 What You Have
In addition to this User's Manual, the package includes the following items:
ACL-8454 Enhanced Multi-function Counter/Timer Card
Utility Library Diskette or Manual & Software Utility CD
If any of these items is missing or damaged, contact the dealer from whom
you purchased the product. Save the shipping materials and carton in case
you want to ship or store the product in the future.
Installation & Configurations 5
2.2 Unpacking
Your ACL-8454 card contains sensitive electronic components that can be
easily damaged by static electricity. The card should be unpacked on a
grounded anti-static mat. The operator should be wearing an anti-static
wristband, grounded at the same point as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping and handling
may cause damage to your module. Be sure there are no shipping and
handing damages on the module before processing.
After opening the card module carton, extract the system module and place
it only on a grounded anti-static surface component side up.
Again inspect the module for damage. Press down on all the socketed IC's
to make sure that they are properly seated. Do this only with the module
place on a firm flat surface.
Note :
You are now ready to install your ACL-8454.
DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN
DAMAGED.
2.3 PCB Layout of ACL-8454
Figure 2.1 PCB Layout of the ACL-8454
6 Installation & Configurations
2.4 Default Configurations
To operate the ACL-8454 correctly, users should understand the structure
of ACL-8454 and details of the possible configurations. The block diagram
of the ACL-8454 is shown in chapter 1. It contains the clock system, counter
system, interrupt system and address decoder etc. The following sections
describe the details and the default setting is list in Table 2.1.
Gate Sources of
Counter 1~4
Interrupt Level #1 IRQ 15 JP1
Interrupt Level #2 No Connection JP2
Source of Interrupt Level #2 External Interrupt Sources JP3
Table 2.1 Default Configuration of ACL-8454
U1, U2 installed
U3, U4 not installed
Internal Clock Source #1
(=2M Hz)
External Gate G1 ~ G4
--
CK n
You can change the ACL-8454's default configuration by setting jumpers
and DIP switches on the card for your own applications. The card's jumpers
and switches are preset at the factory. A jumper switch is closed
(sometimes referred to as "shorted") with the plastic cap inserted over two
pins of the jumper. A jumper is open with the plastic cap inserted over one
or no pin(s) of the jumper.
Before changing the default configuration, users must fully understand the
operation of the ACL-8454. The setting and the basic operation theorem are
discussed in this chapter. It is recommended to refer chapter 3 for details of
the registers and to refer chapter 4 for application notes.
Installation & Configurations 7
A
2.5 Base Address Setting
The ACL-8454 requires 8 consecutive address locations in the I/O address
space. The base address of the ACL-8454 is restricted by the following
conditions.
1.
The base address must be within the range Hex 200 to Hex 3FF.
2.
The base address should not conflict with any reserved I/O address.
3.
The base address must not conflict with any add-on card on your
own PC. Please check your PC before installing the ACL-8454.
The base address of ACL-8454 is selected by a 6 positions DIP switch S1.
The default setting of base address is set to be HEX 240. All possible base
address combinations are listed as Table 2.2. You may modify the base
address if the default address has been occupied by another add-on card.
ON
S1
1 2 3 4 5 6
( 8 7 6 5 4 3 )
A3 ~ A8 control the BASE I/O address.
Figure 2.2 Default Base Address Setting
8 Installation & Configurations
I/O port
Address (Hex) 1 A8
200-207
208-20F
210-217
218-21F
:
237-23F
240-247
(default)
248-24F
:
3F0-3F7
3F8-3FF
ON
(0)
ON
(0)
ON
(0)
ON
(0)
: : : : : :
ON
(0)
ON
(0)
ON
(0)
: : : : : :
OFF
(1)
OFF
(1)
2
A7
ON
(0)
ON
(0)
ON
(0)
ON
(0)
ON
(0)
ON
(0)
ON
(0)
OFF
(1)
OFF
(1)
3
A6
ON
(0)
ON
(0)
ON
(0)
ON
(0)
ON
(0)
OFF
(1)
OFF
(1)
OFF
(1)
OFF
(1)
* A3, ..., A8 is corresponding to PC Bus address lines
Table 2.2. Possible Base Address Combinations
4
A5
ON
(0)
ON
(0)
ON
(0)
ON
(0)
OFF
(1)
ON
(0)
ON
(0)
OFF
(1)
OFF
(1)
5
A4
ON
(0)
ON
(0)
OFF
(1)
OFF
(1)
OFF
(1)
ON
(0)
ON
(0)
OFF
(1)
OFF
(1)
6
A3
ON
(0)
OFF
(1)
ON
(0)
OFF
(1)
OFF
(1)
ON
(0)
OFF
(1)
ON
(0)
OFF
(1)
Installation & Configurations 9
2.6 Pin Assignment of Connector
CN1
(1)
GND
ECLK1(DI0)
COUT1
ECLK2(DI1)
ECLK3(DI2)
COUT3
ECLK4(DI3)
ECLK7(DI8)
COUT7
ECLK8(DI9)
ECLK9(DI10)
COUT9
ECLK10(DI11/EInt)
COUT6
DO0
DO2
DO4
DO6
+5V
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
Legend:
ECLK n : External clock source for counter #n
ExtG n : External gate signal for counter #n
COUT n : Counter/Timer output of counter #n
DO m : Digital output port channel #m
DI m : Digital input port channel #m
Eint : External interrupt signal input
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
GND
ExtG1(DI4)
ExtG2(DI5)
COUT2
ExtG3(DI6)
ExtG4(DI7)
COUT4
ExtG7(DI12)
ExtG8(DI13)
COUT8
ExtG9(DI14)
ExtG10(DI15)
COUT10
COUT12(EInt)
DO1
DO3
DO5
DO7
Figure 2.3 Pin Assignment of Connector CN1
The pin assignment of the 37 pins D-type connector (CN1) is shown in
Figure 2.3. The abbreviations of signal names are listed in Table 2.3. The
signal name conventions are used through this manual. Some signal pins
are multi-function signals. For example, the ECLK10 are not only used as
clock source of counter #10, but also be used as external interrupt source
and be connected to digital input channel.
10 Installation & Configurations
2.7 Clock System
The clock system of ACL-8454 provides the internal clock source for the
8254 chips. The block diagram of the clock system is shown in the Figure
2.4. Two clock sources, which named as CLOCK1 and CLOCK2, are
divided from the internal 10Mhz signal. The clock of every counter/timer can
be one of the 4 sources: CLOCK1, CLOCK2, external clock source or cascaded source from the ‘last’ channel. Refers to next section for details
of setting clock for each counter/timer.
The crystal on ACL-8454 is 10 MHz which is the highest frequency of the
card. The maximum speed of the 8254 chips can run under 10 MHz. As
users plug the lower speed 8254 chips into ACL-8454, the lower frequency
clock source should be used. A frequency divider is used to generate 2MHz
for such circumstance.
Note:
OSC
10 MHz
Certain versions of 8254 or 8253 chips, such as 8254-5, can
run under only 2 MHz.
÷5
2M Hz
10M Hz
100K Hz
÷10÷2
1M Hz
CLOCK2
CLOCK1
Figure 2.4 Clock system of ACL-8454
Installation & Configurations 11
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