Page 1
Manual
ADAM CPU 821x
Order No.: ADAM HB103E
Rev. 03/04
CPU 821x
Revision 1.1
Subject to change to cater for technical progress
Page 2
About this Manual CPU ADAM 821x
The information in this manual is supplied without warranties. Information is
subject to change without notice.
© Copyright 2002 Advantech Co., Ltd.
No. 1 Alley 20, Lane 2, Rueiguang Rd., Neihu District,
Taipei, Taiwan 114, R.O.C.
EMail: support@advantech.com
http://www.advantech.com
All rights reserved
Disclaimer of
liability
Trademarks
The contents of this manual was carefully examined to ensure that it
conforms with the described hardware and software.
However, discrepancies can not be avoided. The specifications in this
manual are examined regularly and corrections will be included in
subsequent editions.
We gratefully accept suggestions for improvement.
ADAM
STEP7
is a registered trademark of Siemens AG.
is a registered trademark of Advantech Co., Ltd.
Any other trademarks referred to in the text are the trademarks of the
respective owner and we acknowledge their registration.
Subject to change to cater for technical progress.
Page 3
CPU ADAM 821x
About this manual
This manual describes the operation of the CPU 821x in the System ADAM
82xx from Advantech. The text provides details on the hardware, the
programming and the functions integrated into the unit as well as Profibus
and Ethernet applications.
Outline
Chapter 1: Principles
This introduction includes recommendations on the handling of the module
as well as information about applications and implementation for CPU
modules.
You may also read details about the mode of operation of the CPU 821x.
Chapter 2: Hardware description
Different versions of the CPU are available (CPU 821x, CPU 821xDP,
CPU 821xNET). This chapter describes these versions in detail. In addition
to the hardware description the chapter also includes a summary of the
integrated circuits.
Chapter 3: Deployment of the CPU 821x
This chapter describes the deployment of the CPU section together with the
peripheral modules of the System 8xxx that are installed on the same bus
rail.
Chapter 4: Deployment of the CPU 821xNET
Applications, project design, functional description and programming of the
CPU 821xNET.
Chapter 5: Deployment of the CPU 821xDPM
Content of this chapter is the deployment and project engineering of the
CPU 821xDPM with integrated Profibus-DP master. Besides the description
of the DP master operating modes you will also find information about the
start-up behaviour and the commissioning.
Chapter 6: Deployment of the CPU 821xDP
Topic of this chapter is the CPU 821xDP (intelligent slave). You will find the
description of the deployment, configuration and parameter definition for
the CPU 821xDP under Profibus.
Chapter 7: Integrated SFCs
Here you find the description of the integrated ADAM-specific SFCs, like
e.g. the SFCs for the CP communication.
Chapter 8: Command list
This chapter lists all available commands of the CPU in alphabetical order.
Subject to change to cater for technical progress.
Page 4
CPU ADAM 821x Contents
Contents
User considerations ...................................................................................1
Safety information ......................................................................................2
Chapter 1
Principles.......................................................................... 1-1
Safety information for users................................................................... 1-2
Hints for the deployment of the MPI interface........................................ 1-3
Hints for the deployment of the Green Cable ........................................ 1-4
Overview System 82xx .......................................................................... 1-5
General description of the System 82xx ................................................ 1-6
Overview CPU 821x .............................................................................. 1-7
Hints for project engineering.................................................................. 1-8
Application fields.................................................................................. 1-11
Features .............................................................................................. 1-12
Operating modes of a CPU.................................................................. 1-13
CPU 821x programs ............................................................................ 1-14
CPU 821x operands ............................................................................ 1-14
Chapter 2 Hardware description ...................................................... 2-1
System overview.................................................................................... 2-2
Structure ................................................................................................ 2-7
Components .......................................................................................... 2-9
Block diagram...................................................................................... 2-14
Technical data ..................................................................................... 2-15
Chapter 3 Deployment of the CPU 821x .......................................... 3-1
Start-up behavior ................................................................................... 3-2
Address allocation ................................................................................. 3-3
Preparations required for configuration ................................................. 3-5
Configuration of directly installed System 82xx modules....................... 3-6
Configuration of the CPU parameters.................................................... 3-8
Project transfer .................................................................................... 3-10
Operating modes ................................................................................. 3-13
Overall Reset....................................................................................... 3-14
Assembly ............................................................................................. 3-16
Recalling version and performance information .................................. 3-17
Using test functions for the control and monitoring of variables .......... 3-18
Chapter 4 Deployment of the CPU 821xNET ................................... 4-1
Principles ............................................................................................... 4-2
Network planning................................................................................... 4-7
Standards and norms ............................................................................ 4-9
Ethernet and IP addresses .................................................................. 4-10
Configuration of the CPU 821xNET..................................................... 4-12
Configuration examples....................................................................... 4-17
Start-up behavior ................................................................................. 4-28
System properties of the CPU 821xNET ............................................. 4-29
Communication links to foreign systems ............................................. 4-31
Test program for TCP/IP connections ................................................. 4-34
ADAM 8000 Manual CPU 821x – Rev 1.1 i
Page 5
Contents CPU ADAM 821x
Chapter 5 Deployment of the CPU 821xDPM .................................. 5-1
Principles ............................................................................................... 5-2
Project engineering CPU with integrated Profibus-DP master .............. 5-5
Project transfer ...................................................................................... 5-8
DP master operating modes ................................................................ 5-12
Commissioning and Start-up behavior................................................. 5-13
Chapter 6 Deployment of the CPU 821xDP ..................................... 6-1
Principles ............................................................................................... 6-2
CPU 821xDP configuration.................................................................... 6-7
DP slave parameters ........................................................................... 6-12
Diagnostic functions ............................................................................ 6-15
Internal status messages to CPU ........................................................ 6-18
Profibus Installation guidelines ............................................................ 6-20
Commissioning .................................................................................... 6-25
Example............................................................................................... 6-27
Chapter 7 Integrated OBs, SFBs and SFCs..................................... 7-1
Integrated OBs and SFBs...................................................................... 7-3
Integrated standard SFCs...................................................................... 7-4
ADAM specific SFCs ............................................................................. 7-6
Include ADAM library............................................................................. 7-7
SFC 220 MMC_CR_F............................................................................ 7-8
SFC 221 MMC_RD_F.......................................................................... 7-10
SFC 222 MMC_WR_F......................................................................... 7-11
SFC 223 PWM..................................................................................... 7-12
SFC 224 HSC ...................................................................................... 7-14
SFC 225 HF_PWM .............................................................................. 7-16
SFC 227 - TD_PRM............................................................................. 7-18
SFC 228 - RW_KACHEL ..................................................................... 7-20
Page frame communication - Parameter ............................................. 7-22
Page frame communication - Parameter transfer................................ 7-25
Page frame communication - Source res. destination definition.......... 7-26
Page frame communication - Indicator word ANZW............................ 7-28
Page frame communication - Parameterization error PAFE................ 7-35
SFC 230 - SEND ................................................................................. 7-36
SFC 231 - RECEIVE............................................................................ 7-37
SFC 232 - FETCH ............................................................................... 7-38
SFC 233 - CONTROL.......................................................................... 7-39
SFC 234 - RESET ............................................................................... 7-40
SFC 235 - SYNCHRON....................................................................... 7-41
SFC 236 - SEND_ALL ......................................................................... 7-42
SFC 237 - RECEIVE_ALL ................................................................... 7-43
SFC 238 - CTRL1 ................................................................................ 7-44
Chapter 8 Instruction list .................................................................. 8-1
Alphabetical instruction list .................................................................... 8-2
Abbreviations......................................................................................... 8-5
Registers ............................................................................................... 8-7
Addressing examples ............................................................................ 8-8
ii ADAM 8000 Manual CPU 821x – Rev 1.1
Page 6
CPU ADAM 821x Contents
Math instructions ................................................................................. 8-11
Block instructions................................................................................. 8-13
Program display and null instruction instructions ................................ 8-14
Edge-triggered instructions.................................................................. 8-14
Load instructions ................................................................................. 8-15
Shift instructions .................................................................................. 8-18
Setting/resetting bit addresses ............................................................ 8-19
Jump instructions................................................................................. 8-21
Transfer instructions ............................................................................ 8-22
Data type conversion instructions........................................................ 8-25
Comparison instructions ...................................................................... 8-26
Bit logic instructions (Bit) ..................................................................... 8-27
Word logic instructions with the contents of ACCU1 ........................... 8-33
Timer instructions ................................................................................ 8-33
Counter instructions............................................................................. 8-35
ADAM specific diagnostic entries ........................................................ 8-36
Appendix.................................................................................................A-1
Index...................................................................................................... A-1
ADAM 8000 Manual CPU 821x – Rev 1.1 iii
Page 7
CPU ADAM 821x User Considerations
User considerations
Objective and
contents
Target audience
Structure of the
manual
Guide to the
document
Availability
Icons
Headings
This manual describes the CPU 821x as well as all the versions of the
product. It contains a description of the construction, project implementation
and the application of the product.
The CPU 821x is compatible with all System ADAM 82xx components of
Advantech.
The manual is targeted at users who have a background in automation
technology and PLC-programming.
This manual consists of 8 chapters. Every chapter provides the description
of one specific topic.
This manual provides the following guides:
• An overall table of contents at the beginning of the manual
• An overview of the topics for every chapter
• An index at the end of the manual.
The manual is available in:
• printed form on paper
• in electronic form as PDF-file (Adobe Acrobat Reader)
Important passages in the text are highlighted by following icons and
headings:
Danger!
Immediate or likely danger.
Personal injury is possible.
Attention!
Damages to property is likely if these warnings are not heeded.
Note!
Supplementary information and useful tips.
ADAM 8000 Manual CPU 821x – Rev 1.1 1
Page 8
Safety information CPU ADAM 821x
Safety information
Application
specifications
Documentation
The CPU 821x is constructed and manufactured for
• all System ADAM 82xx components
• communication and process control
• general control and automation tasks
• industrial applications
• operation within the environmental conditions specified in the technical
data
• installation into a cubicle
Danger!
This device is not certified for applications in
• explosive environments (EX-zone)
The manual must be available to all personnel in the
• project design department
• installation department
• commissioning
• operation
Disposal
The following conditions must be met before using or commissioning
the components described in this manual:
• Modification to the process control system should only be carried out
when the system has been disconnected from power!
• Installation and modifications only by properly trained personnel
• The national rules and regulations of the respective country must be
satisfied (installation, safety, EMC ...)
National rules and regulations apply to the disposal of the unit!
2 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 9
CPU ADAM 821x Index
Appendix
A Index
A
Akku 3-2
A-NR 7-23
ANZW 7-23
ANZW Indicator word 7-28
States 7-34
Application fields 1-11
Assembly 3-16
B
BLGR 7-24
Block size 4-16, 7-24, 7-41
C
Components 2-9
Core cross-section 1-6
CPU 821x
Operands 1-14
Project engineering 1-8
Project transfer 4-26
Properties 2-6
Technical data 2-15
CPU 821xDP
Technical data 2-18
CPU 821xDPM
Technical Data 2-17
CPU 821xNET
Applications 4-6
PLC programming 4-15
Technical data 2-16
CPU 821x
Assembly 3-16
Block diagram 2-14
Construction 2-9
LED's 2-9
Operating modes 3-13
Overall reset 3-14
Parameters 3-9
Power supply 2-9
Project engineering 3-5
Include GSD file 3-5
Requirements 3-5
Project transfer 3-7, 5-8
Test functions 3-18
CPU 821xDP 6-1
Cabling 6-21
Commissioning 6-25
Construction 2-4
Diagnostics 6-14, 6-15
Device related 6-17
Standard 6-16
start 6-17
Example 6-27
Initialization phase 6-26
Installation guidelines 6-20
LED's 2-12
MPI interface 2-10
Network examples 6-23
Parameter data 6-13
Profibus interface 2-12
Project engineering 6-7
Profibus section 6-10
Status messages 6-18
CPU 821xDPM 5-1
Commissioning 5-13
Construction 2-5
LED's 2-13
Operating modes 5-12
Profibus interface 2-13
Project Engineering 5-5
Start-up behavior 5-13
Usage of MMC 5-10
CPU 821xNET
Address
Broadcast- 4-10
Ethernet/IP- 4-10
Initial address 4-11
Communication 4-3
Construction 2-3
Ethernet interface 2-11
LED's 2-11
Links 4-31
Network planning 4-7
ADAM 8000 Manual CPU 821x – Rev 1.1 A-1
Page 10
Index CPU ADAM 821x
NETZEIN (Power on) 4-16
ORG format 4-31
PLC header 4-32
Project engineering 4-12
Example 4-17
Data transfer 4-22
Outline 4-17
WinNCS configuration 4-19
Start-up behavior 4-28
Synchronization 4-16
System properties 4-29
TRADA 4-33
Wildcard length 4-33
D
Data consistency
Profibus-DP 5-3, 6-5
De-insulation length 6-22
Diagnostic buffer 8-36
DP cycle 6-4
E
Environmental conditions 1-6
Error
CPU 821xDP
Diagnostics 6-14, 6-15
Indicator word 7-28
PAFE 7-35
Ethernet
Address 4-10
Standards 4-9
Event-ID 8-36
I
IND 7-23
Industrial Ethernet 4-4
Instruction list 8-1
Integrated blocks 7-1
OBs 7-3
SFBs 7-3
SFBs (Standard) 7-4
SFCs (ADAM specific) 7-6
IP address 4-10
L
Library include 7-7
M
min_slave_interval 6-5
MMC 5-10
Read data 5-14
MPI 3-10
configuration 3-11
Hints 1-3
Interface 2-10
Transfer via 3-10
N
Network 4-2
O
operating modes 2-9
Optical waveguide 5-4, 6-6
ORG Organization format 4-31
Overview System 82xx 1-5
F
Features 1-12
function selector RN/ST/MR 2-9
P
PAFE 7-24
Peripheral module
G
Green Cable
Hints 1-4
GSD file1-8, 3-5, 5-4, 5-6, 6-6, 6-
8
H
H1 4-4
Hardware configurator 1-8
Hardware description 2-1
Hub 4-2
Addressing 3-3
PLC header 4-32
Principles 1-1
Profibus-DP 5-2
Addressing 5-4, 6-6
Communication protocol 5-3
Connectors 6-22
Data consistency 5-3, 6-5
Data transfer 6-4
Master 5-2
Slave 5-2
A-2 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 11
CPU ADAM 821x Index
Data communication 5-3, 6-3
Token-passing-procedure 5-3
Q
QANF/ZANF 7-24
R
Registers 8-7
SEND (SFC 230) 7-36
SEND_ALL (SFC 236) 7-42
Source/Destination details 7-26
SYNCHRON (SFC 235) 7-41
PWM (SFC 223) 7-12
TD200 access (SFC 227) 7-18
SSNR 7-23
Star topology 2-11
S
SFCs
Assignment table CPU - SFC 7-6
HF PWM (SFC 225) 7-16
HSC (SFC 224) 7-14
Include library 7-7
MMC access (SFC 220, 221, 222
7-8
Page frame access (SFC 228) 7-
20
Page frame communication 7-22
CONTROL (SFC 233) 7-39
CTRL1 (SFC 238) 7-44
FETCH (SFC 232) 7-38
Indicator word ANZW 7-28
Length word 7-32
Parameter 7-22
Parameter transfer 7-25
Parameterization error PAFE 7-
35
RECEIVE (SFC 231) 7-37
RECEIVE_ALL (SFC 237) 7-43
RESET (SFC 234) 7-40
Start-up behavior 3-2
Status report 7-28
Status word 8-8
Synchronization
Interfaces 4-24
System overview 2-2
T
TCP/IP 4-5
Test program 4-34
Termination 6-22
TRADA 4-33
Twisted-pair 4-2
Restrictions 4-8
V
V-bus cycle 6-4
Versions 1-7
W
Wildcard length 4-33
ADAM 8000 Manual CPU 821x – Rev 1.1 A-3
Page 12
CPU ADAM 821x Chapter 1 Principles
Chapter 1 Principles
Outline
Contents
This introduction contains references on the handling and information about
application areas and usage of the CPU modules.
It also provides certain suggestions on the approach when programming
the module and the CPU specifications that are important in this respect.
Below follows a description of:
• Safety information for users
• Construction and operation of the CPU 821x
• Programming principles
Topic Page
Chapter 1 Principles ............................................................................... 1-1
Safety information for users................................................................... 1-2
Hints for the deployment of the MPI interface........................................ 1-3
Hints for the deployment of the Green Cable ........................................ 1-4
Overview System 82xx .......................................................................... 1-5
General description of the System 82xx................................................ 1-6
Overview CPU 821x .............................................................................. 1-7
Hints for project engineering.................................................................. 1-8
Application fields.................................................................................. 1-11
Features .............................................................................................. 1-12
Operating modes of a CPU.................................................................. 1-13
CPU 821x programs ............................................................................ 1-14
CPU 821x operands ............................................................................ 1-14
ADAM 8000 Manual CPU 821x – Rev 1.1 1-1
Page 13
Chapter 1 Principles CPU ADAM 821x
Safety information for users
Handling of
electrostatically
sensitive modules
Shipping of
modules
ADAM modules make use of highly integrated components in MOStechnology. These components are extremely sensitive to over-voltages
that may occur during electrostatic discharges.
The following symbol is attached to modules that can be destroyed by
electrostatic discharges:
The symbol is located on the module, the module rack or on packing
material and it indicates the presence of electrostatically sensitive
equipment.
It is possible that electrostatically sensitive equipment is destroyed by
energies and voltages that are far less than the human threshold of
perception. These voltages may occur where persons do not discharge
themselves before handling electrostatically sensitive modules and they
may damage components thereby causing the module to become
inoperable or unusable. Modules that have been damaged by electrostatic
discharge are usually not detected immediately. The respective failure may
become apparent after a period of operation.
Components damaged by electrostatic discharges can fail after a
temperature change, mechanical shock or changes in the electrical load.
Only the consistent implementation of protective devices and meticulous
attention to the applicable rules and regulations for handling the respective
equipment is able to prevent failures of electrostatically sensitive modules.
Please ship the modules exclusively in the original packing material.
Measurements
and alterations on
electrostatically
sensitive modules
1-2 ADAM 8000 Manual CPU 821x – Rev 1.1
When you are conducting measurements on electrostatically sensitive
modules you should take the following precautions:
• Floating instruments must be discharged before use.
• Instruments must be grounded.
You should only use soldering irons with grounded tips when you are
making modifications on electrostatically sensitive modules.
Attention!
Personnel and instruments should be grounded when working on
electrostatically sensitive modules.
Page 14
CPU ADAM 821x Chapter 1 Principles
Hints for the deployment of the MPI interface
2
What is MP
I?
Deployment as
MP interface
The MP
2
I jack combines 2 interfaces in 1:
• MP interface
• RS232 interface
Please regard that the RS232 functionality is only available by using the
Green Cable from Advantech.
The MP interface provides the data transfer between CPUs and PCs. In a
bus communication you may transfer programs and data between the
CPUs interconnected via MPI.
Connecting a common MPI cable, the MPI jack supports the full MPI
functionality.
Important notes for the deployment of MPI cables!
Deploying MPI cables at the ADAM CPUs from Advantech, you have to
make sure that Pin 1 is not connected. This may cause transfer problems
and in some cases damage the CPU!
Especially Profibus cables from Siemens, like e.g. the 6XV1 830-1CH30,
must not be deployed at MP
2
I jack.
For damages caused by nonobservance of these notes and at improper
deployment, ADAM does not take liability!
Deployment as
RS232 interface only
via "Green Cable"
For the serial data transfer from your PC, you normally need a MPI
transducer. Fortunately you may also use the "Green Cable" from
Advantech You can order this under the order no. ADAM-8950-0KB00.
The "Green Cable" supports a serial point-to-point connection for data
transfer via the MP
2
I jack exclusively for ADAM 8xxx CPUs.
Please regard the hints for the deployment of the "Green Cable" on the
following page.
ADAM 8000 Manual CPU 821x – Rev 1.1 1-3
Page 15
Chapter 1 Principles CPU ADAM 821x
Hints for the deployment of the Green Cable
What is the
Green Cable?
The Green Cable is a green connection cable, manufactured exclusively for
the deployment at ADAM System components.
The Green Cable is a programming and download cable for ADM CPUs
8xxx and ADAM fieldbus masters. The Green Cable from Advantech is
available under the order no. ADAM-8950-0KB00.
The Green Cable allows you to:
• transfer projects serial
Avoiding high hardware needs (MPI transducer, etc.) you may realize a
serial point-to-point connection via the Green Cable and the MP
This allows you to connect components to your ADAM CPU that are able
to communicate serial via an MPI adapter like e.g. a visualization
system.
• execute firmware updates of the CPUs and fieldbus masters
Via the Green Cable and an upload application you may update the
firmware of all recent CPUs 8xxx and certain fieldbus masters (see
Note).
Important notes for the deployment of the Green Cable
Nonobservance of the following notes may cause damages on system
components.
For damages caused by nonobservance of the following notes and at
improper deployment, Advantech does not take liability!
2
I jack.
Note to the application area
The Green Cable may exclusively deployed directly
1-4 ADAM 8000 Manual CPU 821x – Rev 1.1
of the ADAM components (in between plugs are not permitted).
At this time, the following components support the Green Cable:
CPUs 8xxx and the fieldbus masters ADAM 8208-1xx01 from Advantech.
Note to the lengthening
The lengthening of the Green Cable with another Green Cable res. The
combination with further MPI cables is not permitted and causes damages
of the connected components!
The Green Cable may only be lengthened with a 1:1 cable (all 9 Pins are
connected 1:1).
at the concerning jacks
Page 16
CPU ADAM 821x Chapter 1 Principles
Overview System 82xx
The System 82xx
The System 82xx is a modular automation system for low and middle range
of performance that you may use either centralized or decentralized. The
single modules are directly clipped to a 35mm DIN rail and are connected
together with the help of special bus clips.
The following picture shows the range of performance of the System82xx:
System 8000
decentral
DP 8xxx
Profibus DeviceNet CAN Interbus PC-CPU PLC-CPU
on demand
on demand
PC 8xxx
central
PLC 8xxx
for STEP®7 of Siemens
Overview
Manuals
peripheral
Dig. IN / Dig. OUT / Anal. IN / Anal. OUT / FM / CP
The current manual describes the PLC-CPU family CPU 821x compatible to
STEP
The peripheral modules, PCs and decentralized peripheral equipment are
to find in the manual HB97 "System82xx". This manual also contains hints
for installation and commissioning of the System82xx.
7 by Siemens.
ADAM 8000 Manual CPU 821x – Rev 1.1 1-5
Page 17
Chapter 1 Principles CPU ADAM 821x
General description of the System 82xx
Structure /
Dimensions
Installation
• Norm profile head rail 35mm
• Peripheral modules with labeling strip
• Measurements basic module:
Single width: (HxWxD) in mm: 76x25.4x76; in inches: 3x1x3
Double width: (HxWxD) in mm: 76x50.8x76; in inches: 3x2x3
Please note, that you have to plug in the CPU only at plug-in location 1
resp. 1 and 2 (if double width).
1
2
3
[1] CPU if double width
[2] CPU single width
[3] peripheral modules
[4] leading bars
D
V
I
M
E
M
O
ER
R
Y
RD
D
K
DE
P
B
D
NET
X2
X2
34
34
ADAM-8216-2BP01
VIPA 288-2BL10
4
IM 253 CAN
CPU 8216
PW
R
ER
S
RD
BA
PW
SF
FC
MC
ADR.
DC24V
+
DC
+
24V
-
X5
-
X2
67
34
VIPA 253-1CA00
ADAM-8216-2BA01
PC 288
CPU 8216 DP
R
PW
S
RN
BA
PW
SF
FC
M
O
MC
U
S
E
OFF
D
DC
+
C
+
24V
24
-
-
V
MMC
01
MMC
RN
ST
MR
M
2
P
I
X1
1
1
2
2
RN
C
ST
O
MR
M
1
M
2
P
I
ON
X1
1
2
SM 8221
DI 8xDC24V
.0
.1
.2
.3
.4
.5
.6
.7
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
.0
.1
.2
.3
.4
.5
.6
.7
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
SM 8221
DI 8xDC24V
1
.0
2
.1
3
.2
4
.3
5
.4
6
.5
7
.6
8
.7
9
I0
X2
34
ADAM-8221-1BF00
1
2
3
4
5
6
7
8
9
I0
1
2
3
4
5
6
7
8
9
I0
Operating security
• Plug in via CageClamps at the front-facing connector, core cross-section
0.08...2.5mm
2
resp. 1.5 mm2 (18pin plug)
• Total isolation of the cables during module changes
• Potential separation of all modules to the backplane bus
• EMC-proof ESD/Burst acc. EN61000-4-2/EN61000-4-4
to Level 3: 8kV/2.5kV
• Shock resistance acc. IEC 60068-2-6 / IEC 60068-2-27 (1G/12G)
Environmental
conditions
• Operating temperature: 0... +55°C
• Storage temperature: -40... +85°C
• Relative humidity: 95% without condensation
• fan-less operation
1-6 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 18
CPU ADAM 821x Chapter 1 Principles
Overview CPU 821x
Products
Performance
specification
Data CPU 8214 CPU 8215 CPU 8216
RAM 40kByte 80kByte 192kByte
Load memory 32kByte 64kByte 128kByte
Cycle time, bit/word operations 0.18µs / 0.78µs
Bit memory/marker 2048Bit (M0.0...M255.7)
Timer 128 (T0...T127)
Counter 256 (Z0...Z255)
Number of blocks FB / FC / DB 1024 / 1024 / 2047
Total addressing space
inputs / outputs
PA Inputs 1024Bit (E0.0...E127.7)
PA Outputs 1024Bit (A0.0...A127.7)
Order data
CPU 21x ADAM-8214-1BA01 ADAM-8215-1BA01 ADAM-8216-1BA01
CPU 21xNET ADAM-8214-2BT01 ADAM-8215-2BT01 ADAM-8216-2BT01
CPU 21xDPM ADAM-8214-2BM01 ADAM-8215-2BM01 ADAM-8216-2BM01
CPU 21xDP ADAM-8214-2BP01 ADAM-8215-2BP01 ADAM-8216-2BP01
General
information
The ADAM CPU 821x is available in four different versions also differing in
view:
• CPU 821x PLC-CPU
• CPU 821xNET PLC-CPU with Ethernet interface
• CPU 821xDPM PLC-CPU with Profibus-DP master
• CPU 821xDP PLC-CPU with Profibus-DP slave
Every CPU 821x is available in 3 CPU performance specifications: 214,
215 and 216. There is no visual difference between these units. The
performance of the CPU 821x increases along with an increase of the
number.
1024 / 1024 with 128Byte process image (PA) each
Note!
If not especially specified, the information in this manual refers to all the
CPUs of the ADAM CPU 821x family!
The instruction set of the CPU 821x is compatible with STEP
and is being configured by means of the Siemens STEP
7 of Siemens
7 manager. A
large function library is included with the CPU.
The CPU employs a Multi Media Card (MMC) as external storage medium.
The MMC is available from Advantech.
The project engineering of the Ethernet components takes place by means
of the ADAM project configuration tool WinNCS. The data may be
transferred into the CPU via MPI.
The CPU 821x has an integrated power supply that requires DC 24V via
the front panel. It is protected against reverse polarity and short circuits.
ADAM 8000 Manual CPU 821x – Rev 1.1 1-7
Page 19
Chapter 1 Principles CPU ADAM 821x
Hints for project engineering
Outline
Preconditions
For the project engineering of the CPU 821x and the other System 82xx
modules connected to the same bus, you use the hardware configurator
from Siemens.
To address the directly plugged peripheral modules, you have to assign a
special address in the CPU to every one.
The address allocation and the parameterization of the modules takes
place in the STEP
7 manager from Siemens in form of a virtual Profibus
system. For the Profibus interface is standardized software sided, the
functionality is guaranteed by including a GSD-file into the STEP
7
manager from Siemens.
Transfer your project into the CPU via the MPI interface.
For the project engineering of your CPU 821x the following requirements
have to be fulfilled:
• STEP
7 manager from Siemens is installed at your PC resp. PU.
• The GSD-file for the System 82xx is included to the hardware
configurator
• serial connection to the CPU (e.g. via "Green Cable")
Note!
The configuration of the CPU requires a thorough knowledge of the
Siemens STEP
7 manager and the hardware configurator!
Compatibility to
STEP
7 manager
from Siemens via
GSD-file
®
The CPU 821x is configurable via the STEP7
manager from Siemens.
This means the programming and parameterization of a System ADAM
82xx and the parameterization and project engineering under Profibus-DP.
The project engineering of a CPU 821x takes place via the STEP
®
7 manager from Siemens in form of a virtual Profibus system with the CPU 3152DP as basic.
Due to the standardized Profibus interface ADAM is able to support the
complete functionality of the System 82xx family in the STEP
®
7 manager
from Siemens by including a GSD-file.
To be compatible with the STEP7 configuration tool from
Siemens, the following steps have to take place:
• Project the Profibus-DP master system with CPU 315-2DP
(6ES7 315-2AF01).
• Add Profibus slave with address 1.
• Include the CPU 821x at slot 0 of the slave system.
1-8 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 20
CPU ADAM 821x Chapter 1 Principles
Project
engineering
CPU 821x with
central periphery
The following steps are necessary to project a CPU 821x in the hardware
configurator from Siemens:
• Start the hardware configurator from Siemens
• Load the delivered ADAM GSD-file from Advantech
• Create a Profibus-DP master system with the CPU 315-2DP
• Include the slave system "ADAM_DP8000" from the hardware catalog in
your master system. You find this slave system in the hardware catalog
under Profibus-DP > Additional field devices > I/O > ADAM
• Assign the address 1 to your slave system, so that the CPU is able to
recognize the system as central periphery system
• Add your modules to the slave system in the same order you have
assembled them. Start with the CPU at plug-in location 0
• Include your System 82xx modules starting at plug-in location 1
CPU 821x
DP200V
Slot Module
PBAdr.:2
PBAdr.:1
Master projecting
of the CPU
821xDPM
0 821x-xxxx
1
. Expansion
. modules
.
3
When projecting a CPU 821xDPM you include the central modules like
described above. Slave systems that shall be connected to the master are
added to the already existing master system:
CPU 821xDPM central
DP slaves decentral ...
ADAM 821x ADAM821xDP
PBAdd.:2
PBAdd.:1
DP200V
Slot M odule
0 821x-2BM0 1
1
. ce ntral
. pe riphery
.
32
DP200V
PBAdr.:3 ... 12 5
ADAM 8000 Manual CPU 821x – Rev 1.1 1-9
Page 21
Chapter 1 Principles CPU ADAM 821x
Project
engineering of the
CPU 821xDP in a
master system
Master system
When configuring a CPU 821xDP, the central plugged-in modules are
parameterized like shown above.
Slave parameterization
As intelligent slave, the Profibus section maps its data areas into the
memory area of the CPU 821xDP. The assignment of the areas is fixed via
the propierties of the CPU 821xDP. These areas have to be provided with
an according PLC program.
Attention!
The length values of input and output area have to be identical to the byte
values of the master project engineering. Otherwise no Profibus communication is possible (slave failure).
Steps of project engineering in the DP master
• Configure the CPU with DP master system (address 2)
• Add Profibus slave 821xDP (GSD-file required)
• Assign Profibus input and output area starting with plug-in location 0
The following picture illustrates the project engineering:
Slave System
PBAddr.:2
Slot Module
0 Output (Bytes)
1 Input (Bytes)
Master projecting
of the CPU
821xNET
CPU21x
PBAddr.:3
PBAddr.:1
Slot Module
0 CPU 821xDP
1
. Expansion
. modules
.
3
The project engineering of network connections via TCP/IP takes place via
the configuration tool WinNCS from Advantech.
DP200V
1-10 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 22
CPU ADAM 821x Chapter 1 Principles
Application fields
This series of CPU modules provides access to the peripheral modules of
the ADAM System 8xxx. You can use a set of standard commands and
programs to interrogate sensors and actuators. One single CPU may
address a maximum of central 32 modules.
Application
example
Compact centralized configuration
CPU
AI 4 AO 4 DIO 8 DO 16
CPU 21x
DO 8 Count
Decentralized configuration using Profibus
CPU IM 208
1,3
IM 253
Input/output periphery
1
CPU IM 208
2,4
IM 253
Input/output periphery
4
IM 253
Input/output periphery
2
CPU IM 208
Input/output periphery
5
CPU 21x DP
Input/output periphery
3
CPU 21x DP
Input/output periphery
5
ADAM 8000 Manual CPU 821x – Rev 1.1 1-11
Page 23
Chapter 1 Principles CPU ADAM 821x
Application based on TCP/IP or H1
Visualization and
shop floor data collection
via DDE-server
H1 / TCP/IP
TCP/IP/H1
Hub
Features
System 82xx
CPU 821x NET
System 82xx
H1 / TCP/IP
CPU 821x NET
The PLC-CPUs are employed as program executor.
They support the input/output modules and process the data from the
function modules.
• Quick programming due to the compatibility with Siemens STEP
7.
• The compact construction requires less space.
• Enhanced flexibility provided by up to 32 function modules (DIG I/O,
ANA I/O, SSI, pulse counter, communication modules, etc.).
• Additional function modules can be added quickly and easily by means
of plug-in bus extension options.
• User-friendly maintenance using a PC via MPI.
• Optional Ethernet or Profibus interface.
1-12 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 24
CPU ADAM 821x Chapter 1 Principles
Operating modes of a CPU
General
Cyclic processing
Timer processing
These CPUs are intended for small and medium sized applications and are
supplied with an integrated 24V power supply. The CPU contains a
standard processor with internal program memory. In combination with the
System 82xx peripherals the unit provides a powerful solution for process
automation applications within the System 82xx family.
A CPU supports the following modes of operation:
• cyclic processing
• timer processing
• alarm controlled processing
• priority based processing
Cyclic processing represents the major portion of all the processes that are
executed in the CPU. Identical sequences of operations are repeated in a
never ending cycle.
Where a process requires control signals at constant intervals you can initiate
certain operations based upon a timer, e.g. not critical monitoring functions
at one-second intervals.
Alarm controlled
operation
Priority based
processing
If a process signal requires a quick response you would allocate this signal
to an alarm controlled procedure. An alarm may activate a procedure in
your program.
The above processes are handled by the CPU in accordance with their
priority. Since a timer or an alarm event requires a quick reaction the CPU
will interrupt the cyclic processing when these high-priority events occur to
react to the event. Cyclic processing will resume once the reaction has
been processed. This means that cyclic processing has the lowest priority.
ADAM 8000 Manual CPU 821x – Rev 1.1 1-13
Page 25
Chapter 1 Principles CPU ADAM 821x
CPU 821x programs
Overview
System routine
User program
The program that is present in every CPU is divided as follows:
• System routine
• User program
The system routine organizes all those functions and procedures of the
CPU that are not related to a specific control application.
This consists of all the functions that are required for the processing of a
specific control application. The operating modules provide the interfaces to
the system routines.
CPU 821x operands
Overview
The following operands are available for programming the CPU 821x:
• Process image and periphery
• Bit memory/marker
• Timers and counters
• Data blocks
Process image
and periphery
1-14 ADAM 8000 Manual CPU 821x – Rev 1.1
The user program can quickly access the process image of the inputs and
outputs PAA/PAE. You may manipulate the following types of data:
- individual bits
- bytes
- words
- double words
You may also gain direct access to peripheral modules via the bus from
your user program. The following types of data are available:
- bytes
- words
- blocks
Page 26
CPU ADAM 821x Chapter 1 Principles
Bit memory
Timer and counter
Data blocks
Bit memory is an area of memory that is accessible to the user program by
means of certain operations. Bit memory is intended to store frequently
used working data.
You may access the following types of data:
- individual bits
- bytes
- words
- double words
With your program you may load a time cell with a value between 10ms and
9990s. As soon as the user program executes a start operation the value of
this timer is decremented by the interval that you have specified until it
reaches zero.
You may load counter cells with an initial value (max. 999) and increment
or decrement this when required.
A data block contains constants or variables in form of bytes, words or
double words. You may always access the current data block by means of
operands.
You may access the following types of data:
- individual bits
- bytes
- words
- double words
ADAM 8000 Manual CPU 821x – Rev 1.1 1-15
Page 27
CPU ADAM 821x Chapter 2 Hardware description
Chapter 2 Hardware description
Outline
Contents
The CPUs 821x are available in different versions that are described in this
chapter. In addition to the hardware description the chapter also contains
installation and commissioning instructions and applications for the memory
modules.
A summary of the integrated FBs and OBs and the technical data conclude
the chapter.
The following section contains descriptions of:
• the components of the CPUs along with controls and displays
• the modules integrated into the CPU
• technical data
Topic Page
Chapter 2 Hardware description............................................................ 2-1
System overview.................................................................................... 2-2
Structure ................................................................................................ 2-7
Components .......................................................................................... 2-9
Block diagram...................................................................................... 2-14
Technical data ..................................................................................... 2-15
ADAM 8000 Manual CPU 821x – Rev 1.1 2-1
Page 28
Chapter 2 Hardware description CPU ADAM 821x
System overview
The ADAM CPU-821x family of products available from Advantech consists
of 3 different models each with 4 versions:
• CPU 821x PLC-CPU
• CPU 821xNET PLC-CPU with Ethernet interface
• CPU 821xDP PLC-CPU with Profibus slave
• CPU 821xDPM PLC-CPU with Profibus master
All CPUs 821x are available in the versions 8214, 8215 and 8216.
CPU 821x
• Instruction set compatible with Siemens STEP7
• MP-Interface for data transfer between PC and CPU
• Status LEDs for operating mode and diagnostics
• External memory card (MMC)
• "On board" memory
Order data
CPU 821x
2-2 ADAM 8000 Manual CPU 821x – Rev 1.1
Type Order number Description
CPU 8214 ADAM-8214-1BA01 PLC CPU 8214 with 32KB of memory
CPU 8215 ADAM-8215-1BA01 PLC CPU 8215 with 64KB of memory
CPU 8216 ADAM-8216-1BA01 PLC CPU 8215 with 128KB of memory
MMC ADAM-8953-0KX00 MMC storage module
Green Cable ADAM-8950-0KB00 PG/AG download cable RS232/MPI,
serial (only for usage at ADAMCPUs
8xxx)
Page 29
CPU ADAM 821x Chapter 2 Hardware description
CPU 821xNET
Identical to CPU 821x, additionally with:
• direct connection of twisted pair cable via RJ45 socket
• data throughput of up to 100 messages/sec
• bus load reduced by up to 20% due to simplified handshaking procedure
• drivers for different SCADA systems like zenOn, InTouch, etc.
Order data
CPU 821xNET
Type Order number Description
CPU 8214NET ADAM-8214-
2BT01
CPU 8215NET ADAM-8215-
2BT01
CPU 8216NET ADAM-8216-
2BT01
MMC ADAM-8953-
0KX00
Green Cable ADAM-8950-
0KB00
PLC CPU 214 with Ethernet and 32KB of
memory
PLC CPU 215 with Ethernet and 64KB of
memory
PLC CPU 216 with Ethernet and 128KB of
memory
MMC storage module
PG/AG download cable RS232/MPI, serial
(only for usage at ADAM CPUs 8xxx)
ADAM 8000 Manual CPU 821x – Rev 1.1 2-3
Page 30
Chapter 2 Hardware description CPU ADAM 821x
CPU 821xDP
Identical to CPU 821x, additionally with
• integrated Profibus slave
• status LEDs for Profibus status and diagnostics
Order data
CPU 821xDP
Type Order number Description
CPU 88214DP ADAM-8214-2BP01 SPS CPU 214 with Profibus slave and
32KB of memory
CPU 8215DP ADAM-8215-2BP01 SPS CPU 215 with Profibus slave and
64KB of memory
CPU 8216DP ADAM-8216-2BP01 SPS CPU 216 with Profibus slave and
128KB of memory
MMC ADAM-8953-0KX00 MMC storage module
Green Cable ADAM-8950-0KB00 PG/AG download cable RS232/MPI,
serial (only for usage at ADAM CPUs
8xxx)
2-4 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 31
CPU ADAM 821x Chapter 2 Hardware description
CPU 821xDPM
Like CPU 821x, additionally with
• integrated Profibus-DP master
• Status-LEDs for Profibus status and diagnostics
Order data
CPU 821xDPM
Type Order number Description
CPU 8214DPM ADAM-8214-2BM01 PLC CPU 214 with Profibus-DP master
and 32kByte memory
CPU 8215DPM ADAM-8215-2BM01 PLC CPU 215 with Profibus-DP master
and 64kByte memory
CPU 8216DPM ADAM-8216-2BM01 PLC CPU 216 with Profibus-DP master
and 128kByte memory
MMC ADAM-8953-0KX00 MMC storage module
Green Cable ADAM-8950-0KB00 PG/AG download cable RS232/MPI,
serial (only for usage at ADAM CPUs
8xxx))
ADAM 8000 Manual CPU 821x – Rev 1.1 2-5
Page 32
Chapter 2 Hardware description CPU ADAM 821x
General
A CPU is an intelligent module. Your controlling programs are executed
here. You are able to select one of three CPUs, depending on the
performance required from your system. The higher the performance of the
CPU, the more user memory is available.
The CPUs 821x are intended for small to medium applications and have an
integrated 24V power supply. The CPUs contain a standard processor with
internal program memory for the storage of user-programs. In addition,
every CPU 821x is equipped with a socket for a memory module, which is
located on the front.
Every CPU has an MPI-interface and is instruction set compatible with the
Siemens STEP
the Siemens STEP
®
7. The CPU series 214...216 have similar performance as
®
7 CPU series.
This series of CPUs provides access to the peripheral modules of the
System 82xx. You may query sensors and control actuators by means of
standardized commands and programs. The unit can address a maximum
of 32 modules. You may parameterize the CPU via the integrated MPIinterface.
The remainder of this description refers to all CPUs of the CPU 821x
family, since the CPUs 8214, 8215 and 8216 are functionally identical
and their only difference is the memory size.
Properties
• Instruction set compatible to Siemens STEP7
• Configuration by means of the Siemens STEP7
®
®
manager
• Integrated 24V power supply
• Total address range: 1024Byte inputs, 1024Byte outputs (128Byte
process image each)
• 32...128kByte of work memory
• 40…192kByte of load memory
• Battery backed clock
• Memory-card socket
• MPI-interface
• Integrated V-Bus controller for controlling System 82xx peripherals
• User programs can be saved to the external memory card (MMC)
• 128 timer
• 64 counter
• 256Byte of bit memory
2-6 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 33
CPU ADAM 821x Chapter 2 Hardware description
Structure
Front view
CPU 821x
Front view
CPU 821xNET
1
2
6
7
1
R
2
S
PW
SF
FC
MC
DC
+
24V
-
X2
34
ADAM 8216-2BA01
CPU 8216 NET
Tx
Rx
IX-Data
CPU 8216
TP
2
X
4
3
ADAM 8216-2BT01
Tx
Rx
DC
24V
MMC
R
S
PW
SF
FC
MC
RN
ST
MR
3
[1] RUN/STOP/OVERALL RESET
operating mode selector switch
[2] Status indicator LEDs
[3] Socket for MMC memory card
[4] MP
2
I-interface
[5] Connector for 24V DC power
supply
M
2
P
I
4
X1
1
2
5
[1] RUN/STOP/OVERALL RESET
operating mode selector switch
[2] Status indicator LEDs
[3] Socket for MMC memory card
[4] MP
2
I-interface
[5] Connector for 24V DC power
supply
[6] Status indicator LEDs Ethernet
[7] Twisted Pair interface for
Ethernet
MMC
RN
ST
MR
3
M
2
P
I
4
X1
+
-
1
2
5
ADAM 8000 Manual CPU 821x – Rev 1.1 2-7
Page 34
Chapter 2 Hardware description CPU ADAM 821x
Front view
CPU 821xDP
1
2
6
7
CPU 8216 DP
ER
RD
DE
X2
34
ADAM 8216-2BP01
D
P
DC
24V
R
S
PW
SF
FC
MC
[1] RUN/STOP/OVERALL RESET
operating mode selector switch
[2] Status indicator LEDs
[3] Socket for MMC memory card
[4] MP
2
I-interface
[5] Connector for 24V DC power
supply
[6] Profibus-DP slave status
indicator LEDs
[7] Profibus interface
MMC
RN
ST
MR
3
M
2
P
I
4
X1
+
-
1
2
5
Front view
CPU 821xDPM
1
2
6
7
8
X2
34
ADAM 8216-2BM01
RN
IF
DE
ER
CPU 8216 DPM
R
S
MMC
PW
SF
FC
D
MC
P
DC
+
24V
-
RN
ST
MR
X1
3
[1] RUN/STOP/OVERALL RESET
operating mode selector switch
[2] LEDs status indicator CPU
[3] Socket for MMC memory card
[4] MP
2
I-interface
[5] Connector for 24V DC power
supply
1
[6]
M
2
P
I
1
2
4
5
[7] LEDs status indicator Profibus-
[8] Profibus interface
1
in development
LC-Display with keys
DP master
2-8 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 35
CPU ADAM 821x Chapter 2 Hardware description
Components
CPU 821x
LEDs
Name Color Description
PW Yellow Indicates CPU power on.
RN Green CPU status is RUN.
ST Red CPU status is STOP.
SF Red Is turned on if a system error is detected (hardware defect)
FC Red Is turned on when variables are forced (fixed).
MC Yellow This LED blinks when the MMC is accessed.
Function selector
RN/ST/MR
The components of the CPU 821x that are described here are components
of all the CPUs presented in this manual.
The CPUs 821x have a number of LEDs that are used to diagnose bus
conditions and to display the status of a program. The table below
describes the diagnostic LEDs and the according colors.
These LEDs are part of every CPU in this manual.
You can select the operating mode STOP (ST) and RUN (RN) by means of
the function selector. The CPU automatically executes the operating mode
START-UP when the mode changes from STOP to RUN.
You may issue an overall reset by placing the switch in the Memory Reset
(MR) position.
MMC socket
memory card
Power supply
You may install a ADAM MMC memory module in this slot as external
storage device (Order No.: ADAM-8953-0KX00).
The access to the MMC takes always place after an overall reset.
The CPU has an internal power supply. This is connected to an external
supply voltage via two terminals located on the front of the unit.
The power supply requires DC 24V (20 ... 30V). In addition to the electronic
circuitry of the CPU this supply voltage is used for the modules connected
to the backplane bus.
The electronic circuitry of the CPU is not dc-insulated from the supply
voltage. The power supply is protected against reverse polarity and short
circuits.
Note!
Please ensure that the polarity of the supply voltage is correct.
ADAM 8000 Manual CPU 821x – Rev 1.1 2-9
Page 36
Chapter 2 Hardware description CPU ADAM 821x
Battery backup for
clock and RAM
2
MP
I port
5
9
4
8
3
7
2
6
1
A rechargeable battery is installed on every CPU 821x to safeguard the
contents of the RAM when power is removed. This battery is also used to
buffer the internal clock.
The rechargeable battery is maintained by a charging circuit that receives
its power from the internal power supply and that maintain the clock and
RAM for a max. period of 30 days.
Attention!
The CPU will operate only if the battery is healthy.
The CPU will STOP when the battery is faulty. In this case the CPU should
be checked. Please contact Advantech!
The MPI unit provides the link for the data transfer between the CPU and
the PC. Via bus communication you are able to exchange programs and
data between different CPUs that are linked over MPI.
For a serial exchange between the partners you normally need a special
MPI-converter. But now you are also able to use the ADAM "Green Cable"
(Order-No. ADAM-8950-0KB00), which allows you to establish a serial
peer-to-peer connection over the MPI port.
Please regard the notes about the "Green Cable" in chapter 1!
The pin assignment of the MPI socket is as follows:
9pin socket
Pin Assignment
1 reserved
2 GND
3 RS485_A
4 RS485_CTS
5 GND
6 Vcc
7 +DC 24V
8 RS485_B
9 RS485_RTS
2-10 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 37
CPU ADAM 821x Chapter 2 Hardware description
CPU 821xNET
LEDs
Ethernet interface
In addition to the components described in the section on the CPU 821x the
CPU 821xNET module is provided with 2 further LEDs and an Ethernet
interface located at the left-hand side of the module.
The LEDs are located on the left-hand side of the front panel and indicate
communication activities.
The table below shows the color and the meaning of these LEDs.
Name Color Description
TxD green Transmit data
RxD green Receive data
An RJ45 socket provides the interface to the twisted pair cable, required for
Ethernet. The pin assignment of this socket is as follows:
8pin RJ45 socket:
Pin Signal
1 Transmit +
2 Transmit 3 Receive +
4 5 6 Receive -
Star topology
A twisted pair network can only have a star topology. For this purpose a
hub is required as the central node:
7 8 -
Note!
For more detailed information on twisted pair networks refer to chapter
ADAM 8000 Manual CPU 821x – Rev 1.1 2-11
"Deployment of the CPU 821xNET".
Page 38
Chapter 2 Hardware description CPU ADAM 821x
CPU 821xDP
LEDs
In addition to the components described in the section on the CPU 821x the
CPU 821xDP module is provided with 3 more LEDs and a Profibus
interface.
The LEDs are located in the left half of the front panel and they are used for
diagnostic purposes. The following table shows the color and the
significance of these LEDs.
Name Color Description
ER red On when an error is detected (Error).
On when the CPU has been stopped.
Flashes slowly (2Hz) at initialization error
Flashes quickly (10Hz) when supply voltage falls
below 18V.
Flashes alternately with RD when the master
configuration is bad (project configuration error).
Flashes simultaneously with RD when
parameterization is bad
RD green On when a data transfer is active via the V-bus.
Flashes when the self-test result is positive
(READY) and the initialization was successful.
DE yellow DE (Data exchange) indicates an active Profibus
communication.
Profibus interface
5
9
4
8
3
7
2
6
1
The CPU 821xDP is connected to the Profibus system by means of a 9pin
socket. The pin assignment of this interface is as shown:
9pin Profibus D-type socket:
Pin Assignment
1 Screen
2 not used
3 RxD/TxD-P
4 CNTR-P
5 GND
6 5V (max. 70mA)
7 not used
8 RxD/TxD-N
9 not used
Note!
Refer to the chapter "Deployment of the CPU 821xDP" for details on the
Profibus.
2-12 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 39
CPU ADAM 821x Chapter 2 Hardware description
CPU 821xDPM
LEDs
In addition to the components described in the section on the CPU 821x the
CPU 821xDPM module is provided with 4 more LEDs and a Profibus
interface.
The LEDs are located in the left half of the front panel and they are used for
diagnostic purposes. The following table shows the color and the
significance of these LEDs.
Name Color Description
RN green If RN is the only LED that is on, then the master
status is RUN. The slaves are being accessed and
the outputs are 0 ("clear" state).
If both RN+DE are on the status of the Master is
"operate". It is communicating with the slaves.
IF red Initialization error for bad Profibus configurations
DE yellow DE (Data exchange) indicates Profibus
communication activity.
ER red On when a slave has failed (ERROR).
Profibus interface
5
9
4
8
3
7
2
6
1
The CPU 821xDPM is connected to the Profibus system by means of a
9pin socket. The pin assignment of this interface is as shown:
9pin Profibus D-type socket:
Pin Assignment
1 Screen
2 not used
3 RxD/TxD-P
4 CNTR-P
5 GND
6 5V (max. 70mA)
7 not used
8 RxD/TxD-N
9 not used
Note!
Refer to the chapter "Deployment of the CPU 821xDPM" for details on the
Profibus master.
ADAM 8000 Manual CPU 821x – Rev 1.1 2-13
Page 40
Chapter 2 Hardware description CPU ADAM 821x
Block diagram
The following block diagram shows the basic hardware construction of the
CPU 821x modules:
DC 24V
PW
Voltage monitor
Power
supply
Clock
MPI
RESET
Processor
System 81xx
interface circuitry
RUN/STOP/MRST
Time
Memory-Card
System 82xx
backplane bus
2-14 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 41
CPU ADAM 821x Chapter 2 Hardware description
Technical data
CPU 821x
General
Electrical data ADAM-8214-1BA01 ... ADAM-8216-1BA01
Power supply DC 24V
Current consumption max. 1.5A
Dissipation power max. 3.5W
Status indicators (LEDs) by means of LEDs located on the front
Connections / interfaces MP2I-Slot for data communication
Clock, memory/clock backup yes / Lithium accumulator, 30 days backup
Output current to backplane bus max. 3A
Bit memory 2048Bit (M0.0…M255.7)
Timer 128 (T0...T127)
Counters 256 (Z0 ... Z255)
Number of Blocks FB
FC
DB
Total addressing space input / output 1024/1024Byte, each 128 Byte for process image (PA)
PA Inputs 1024Bit (E0.0...E127.7)
PA Outputs 1024Bit (A0.0...A127.7)
Combination with peripheral modules
max. no. of modules 32
max. digital I/O 32
max. analog I/O 16
Addressable inputs, outputs 1024 (digital), 128/128 (analog)
Dimensions and weight
Dimensions (WxHxD) in mm 25.4x76x76
Weight 80g
Module specific
CPU 8214 CPU 8215 CPU 8216
Work memory 32kByte 64kByte 128kByte
Load memory 40kByte 80kByte 192kByte
Cycle time bit operations 0.18µs 0.18µs 0.18µs
Cycle time word operations 0.78µs 0.78µs 0.78µs
Order-No.: ADAM-8214-1BA01 ADAM-8215-1BA01 ADAM-8216-1BA01
1024 (FB0...FB1023)
1024 (FC0...FC1023)
2047 (DB1...DB2047)
ADAM 8000 Manual CPU 821x – Rev 1.1 2-15
Page 42
Chapter 2 Hardware description CPU ADAM 821x
CPU 821xNET
Electrical data ADAM-8214-2BT01 ... ADAM-8216-2BT01
Power supply via backplane bus
Current consumption max. 380mA
Potential separation
Status indicator (LEDs) like CPU 821x additionally with LEDs for the Ethernet section
Connections/interfaces like CPU 821x additionally with RJ45 socket for Twisted-Pair-
Ethernet interface
Connector RJ45
Network topology Star topology
Medium Twisted pair
Transfer rate 10Mbit
Overall length max. 100m per segment
Dimensions and weight
Dimensions (WxHxD) in mm 50.8x76x76
Weight 150g
≥ 500V AC
Ethernet
2-16 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 43
CPU ADAM 821x Chapter 2 Hardware description
CPU 821xDPM
Electrical Data ADAM-8214-2BM01 ... ADAM-8216-2BM01
Power supply via backplane bus
Current consumption max. 380mA
Potential separation
Status monitoring (LEDs) like CPU 821x additionally with LEDs for the Profibus section
Adapters/interfaces like CPU 821x additionally with 9pin D-type socket (Profibus)
Profibus interface
Connector 9pin D-type socket
Network topology Linear bus, active bus termination at both ends
Medium Screened and drilled twisted pair cable. Depending on
Transfer rate 9.6kBaud up to 12MBaud
Overall length 100m at 12 MBaud without repeater, up to 1000m with repeater
max. no. of stations 32 stations on every segment without repeater. Expandable to
Combination with
peripheral modules
max. number of slaves 125
max. number of input bytes 1024
max. number of output bytes 1024
Dimensions and Weight
Dimensions (WxHxD) in mm 50.8x76x76
Weight 150g
≥ 500V AC
environment screening may be omitted.
126 stations with repeater.
ADAM 8000 Manual CPU 821x – Rev 1.1 2-17
Page 44
Chapter 2 Hardware description CPU ADAM 821x
CPU 821xDP
Electrical data ADAM-8214-2BP01 ... ADAM-8216-2BP01
Power supply via backplane bus
Current consumption max. 380mA
Potential separation
≥ 500V AC
Status indicator (LEDs) like CPU 21x additionally with LEDs for the Profibus section
Adapters/interfaces like CPU 21x additionally with 9pin D-type socket (Profibus)
Profibus interface
Connector 9pin D-type socket
Network topology Linear bus, active bus termination at both ends
Medium Screened and drilled twisted pair cable. Depending on
environment screening may be omitted.
Transfer rate 9.6kBaud up to 12MBaud
Overall length 100m at 12 MBaud without repeater, up to 1000m with repeater
max. no. of stations 32 stations on every segment without repeater.
Expandable to 126 stations with repeater.
Dimensions and weight
Dimensions (WxHxD) in mm 50.8x76x76
Weight 150g
2-18 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 45
ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Chapter 3 Deployment of the CPU 821x
Outline
This chapter describes the deployment of the CPU 821x together with the
peripheral modules of the System 82xx.
Besides commissioning and start-up behavior you will find here also a
description of the project engineering, parameterization, operating modes
and test functions.
This information also basically applies to the deployment of a bus resp.
NET-CPU (CPU 821xDP, CPU 821xNET…).
More detailed information about the deployment of the bus resp. NETCPUs is to find in the concerning chapters of this manual.
The following section contains a description of:
• Assembly and commissioning
• Principle of address allocation
• Project engineering and parameterization
• Deployment of MPI and MMC
• Operating modes and overall reset
• Usage of test functions
Contents
Topic Page
Chapter 3 Deployment of the CPU 821x ............................................... 3-1
Start-up behavior ................................................................................... 3-2
Address allocation ................................................................................. 3-3
Preparations required for configuration ................................................. 3-5
Configuration of directly installed System 82xx modules....................... 3-6
Configuration of the CPU parameters.................................................... 3-8
Project transfer .................................................................................... 3-10
Operating modes ................................................................................. 3-13
Overall Reset....................................................................................... 3-14
Assembly ............................................................................................. 3-16
Recalling version and performance information .................................. 3-17
Using test functions for the control and monitoring of variables .......... 3-18
Note!
This information is valid for all the CPUs described in this manual since the
backplane bus communication between the CPU and the peripheral
modules is the same for all models of this CPU!
ADAM 8000 Manual CPU 821x – Rev 1.1 3-1
Page 46
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Start-up behavior
Turn on
power supply
OVERALL_RESET
After turning on the power supply, the CPU switches to the operating mode
that is fixed by the operating mode lever at the CPU.
Now you may transfer your project from your projecting tool into the CPU
via MPI resp. plug-in a MMC containing your project and request an
OVERALL_RESET.
The following picture shows the approach:
RN
ST
MR
3Sec.
R
S
PW
SF
FC
MC
RN
ST
MR
R
S
PW
SF
FC
MC
3 Sec.
RN
ST
MR
R
S
PW
SF
FC
MC
RN
ST
MR
R
S
PW
SF
FC
MC
Note!
The transfer of the user application from the MMC into the CPU takes
always place after an OVERALL RESET!
Start-up after
delivery
Start-up with valid
data on the CPU
Start-up with
empty battery
After delivery the CPU is totally clear.
After a STOP→RUN transition, the CPU switches to RUN without
application.
The CPU switches to RUN with the application located in the battery
buffered RAM.
The battery is loaded directly via the integrated power supply and provides
a buffer for up to 30 days. If this time is exceeded, the battery may be
totally discharged and the battery buffered RAM is erased.
In this state the CPU starts an overall_reset. If a MMC is plugged in, the
program of the MMC is transferred into the RAM.
Depending on the selected operating mode the CPU switches to RUN resp.
stays in STOP.
This procedure is fixed in the diagnostic buffer with this entry: "Automatic
start OVERALL_RESET (unbuffered POWER-ON)".
3-2 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 47
ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Address allocation
Automatic
addressing
Signaling states in
the process image
To provide specific addressing of the installed peripheral modules, certain
addresses must be allocated in the CPU.
The CPU contains a peripheral area (addresses 0...1023) and a process
image of the inputs and the outputs (for both each address 0...127).
When the CPU is initialized it automatically assigns peripheral addresses to
the digital input/output modules starting from 0.
If there is no hardware projecting, analog modules are allocated to even
addresses starting from address 256.
The signaling states of the lower addresses (0...127) are additionally saved
in a special memory area called the process image.
The process image is divided into two parts:
• process image of the inputs (PAE)
• process image of the outputs (PAA)
Peripheral area
0
.
.
Digital modules
.
127
128
.
Analog modules
.
.
1023
Process image
0
.
.
.
127
0
.
.
.
127
Inputs
Outputs
PAE
PAA
The process image is updated automatically when a cycle has been
completed.
Read/write access
You may access the modules by means of read or write operations on the
peripheral bytes or on the process image.
Note!
modules by means of read
Please remember that you may access different
and write operations on the same address.
The addressing ranges of digital and analog modules are different when
they are addressed automatically.
Digital modules: 0...127
Analog modules: 128...1023
ADAM 8000 Manual CPU 821x – Rev 1.1 3-3
Page 48
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Example for the
automatic
allocation of
addresses
PAE
rel. Addr.
0
1
2
3
.
.
.
127
digital
analog
128
.
.
.
135
136
137
.
.
.
1023
The following figure illustrates the automatic allocation of addresses:
Peripheral area
Input byte 0
Input byte 1
Input byte 2
Input byte 3
.
.
.
Input byte 127
Input byte 0
.
.
.
Input byte 7
Input byte 8
Input byte 9
.
.
.
Input byte 1023
Plug-in location: 1 2 3 4 5 6
DO 8xDC24V
CPU 821x
DI 8xDC24V
.
.
.
DI 16xDC24V
AI 4x12Bit
DIO 8xDC24V
AO 4x12Bit
Peripheral area
Output byte 0
Output byte 1
Output byte 2
Output byte 3
.
.
.
Output byte 127
Output byte 0
.
.
.
Output byte 7
Output byte 8
Output byte 9
.
.
.
Output byte 1023
rel. Addr
0
1
2
3
127
128
135
136
137
1023
PAA
.
.
.
digital
analog
.
.
.
.
.
.
Modifying allocated
addresses by
configuration
You may change the allocated addresses at any time by means of the
Siemens STEP
7 manager. In this way you may also change the addresses of analog modules to the range covered by the process image (0...127)
and address digital modules above 127.
The following pages describe the required preparations and the procedure
for this type of configuration.
3-4 ADAM 8000 Manual CPU 821x – Rev 1.1
Page 49
ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Preparations required for configuration
General
Requirements
The following information always refers to modules that have been installed
on the same bus adjacent to the CPU.
In order to address the installed peripheral modules individually, specific
addresses in the CPU have to be assigned to them.
The allocation of addresses and the configuration of the installed modules
is a function of the Siemens STEP
7 manager where the modules appear
as a virtual Profibus system. For the Profibus interface is software
standardized, we are able to guarantee the complete functionality of the
System 82xx together with the Siemens STEP
7 manager by including a
GSD-file (german: GeräteStammDatei = GSD-file).
The project is transferred serial to the CPU via the MPI-interface.
The following requirements must be satisfied before starting the
configuration of the modules:
®
• The Siemens STEP
7 manager must have been installed
• The GSD-file must have been included in the Siemens hardware
configurator
• A serial connection to the CPU must have been established (e.g. with
the "Green Cable" from Advantech)
Note!
The configuration of the CPU requires a thorough knowledge of the
Siemens STEP
7 manager and the hardware configurator!
Installation of the
Siemens hardware
configurator
The hardware configurator is a component of the Siemens STEP
configuration tool. A list of modules that may be configured by this tool can
be obtained from the hardware catalog.
7 project
Before they are ready for usage, the System 82xx modules have to be
included in the hardware catalog by means of the ADAM GSD-file.
Including the
GSD- file
• Copy all ADAM GSD-files into your GSD-directory ...
\siemens\step7\s7data\gsd
• Start the Siemens hardware configurator
• Close all projects
• Go to Options > Install new GSD-file
• Enter all gsd files
Now the modules of the ADAM System 82xx have been integrated into the
hardware catalog and are available for configuration.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-5
Page 50
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Configuration of directly installed System 82xx modules
Configuration as a
virtual Profibus
master system
The System 82xx modules located adjacent to the CPU on the V bus have
to be configured as a virtual Profibus master system by means of the
Siemens hardware configurator as described below:
• Create a new project.
• Insert the CPU 315-2DP (6ES7 315-2AF01-0AB0). You have to create a
new Profibus subnet.
• Attach the System "ADAM_DP8000" to the subnet. The respective
entries are located in the hardware catalog under PROFIBUS DP >
Additional Field Devices > IO > ADAM821x. Assign Profibus address 1
to this slave.
• Place the ADAM CPU 821x that you want to deploy at plug-in location 0
of the configurator. Plug-in location 0 is mandatory!
• Include your System 82xx modules in the location sequence starting
from plug-in location 1.
• Save your project.
3-6 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Configuration of
modules
System 82xx modules may be supplied with up to 16Byte of configuration
data from the CPU. The use of the Siemens STEP
7 manager provide the
option to supply parameters to the configurable System 82xx modules at
any time.
For this purpose you have to double-click the respective module in the
plug-in diagram.
The following figure shows the configuration of the positioning module
IM 8254:
Transferring the
project
Data is transferred between the CPU and the PC via MPI. If your PU has no
MPI functionality you may use the ADAM "Green Cable" to send the data
serial by a peer-to-peer connection. The ADAM "Green Cable" has the
OrderNo. ADAM-8950-0KB00 and may only be used with ADAM
components System 8xxx.)
Please regard the notes about the "Green Cable" in chapter 1!
• Connect your PU to the CPU
• Transfer the project into the CPU by means of PLC > Load into module
in your project configuration tool.
• Install an MMC and transfer the application program to the MMC by
clicking on PLC > Copy RAM to ROM.
• During the write operation the MC-LED of the CPU blinks. For internal
reasons the message signalizing completion of the write operation
arrives too soon. The write operation is only complete when the LED has
been extinguished.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-7
Page 52
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Configuration of the CPU parameters
Outline
The general parameters, concerning the CPU section of your CPU 821x,
are to adjust in the hardware configurator from Siemens under the
properties of the CPU 315-2DP.
Except of the Profibus parameters of the CPU 821xDP the CPU
parameterization takes place in the parameter dialog of the CPU 3152DP.
The parameterization of the Profibus section of the CPU 821xDP takes
place via the parameterization dialog of the CPU 821x.
Parameterization
CPU 821x under
CPU 315-2DP
3-8 ADAM 8000 Manual CPU 821x – Rev 1.1
Per double-click on the CPU 315-2DP you reach the parameterization window of your CPU 821x. Via the different registers you may access all
parameters of the CPU 315-2DP. The parameters are those of the CPU
821x from Advantech.
Please regard, that at this time not all the parameters are supported.
Page 53
ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Parameterization
of the Profibus
section of CPU
821xDP
Supported
parameters
You may reach the parameterization window for the Profibus section of the
CPU 821x by double-clicking on the added System 821x-CPU under
ADAM_DP8000.
Via the different registers you may access all Profibus parameters of the
CPU 821x.
More information is to find in the chapter "Deployment of the CPU 821xDP".
The CPU 821x doesn't use all the parameters that may be defined in the
Siemens STEP
®
7 manager.
The following parameters are currently employed by the CPU:
General:
MPI address of the CPU
maximum MPI address
Initialization:
Start-up, if the planned hardware
does not match the actual
hardware configuration
Remanence:
Number of bytes of bit memory
starting at MB0
Number of S7-timer from T0
No. of S7-counters from Z0
Time alarm :
OB10: active
execution
start date
time-of-day
Prompter :
OB35: execution
Cycle / timing flags:
Cycle watching time
Load placed on cycle time due to
communications
Timing flags with flag byte no.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-9
Page 54
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Project transfer
Outline
Transfer via MPI
Terminating
resistor
There are two possibilities to transfer your project into the CPU:
• Transfer via MPI
• Transfer via MMC when using a MMC programmer
The structure of a MPI network is principally the same than the one of a
1.5MBaud Profibus net. This means that the same rules are valid and for
both networks you use the same components for building.
Per default the MPI net runs with 187kBaud.
Every bus participant identifies itself at the bus with an unique MPI address.
You link up the single participants via bus connectors and the Profibus bus
cable.
A line has to be terminated with its ripple resistor. For this you switch on the
terminating resistor at the first and the last participant of a network or a
segment.
Please take care that those participants with the terminating resistor are
supplied with power during start-up and operation.
Approach
• Connect your PU resp. PC with your CPU via MPI.
If your PU doesn't support MPI, you may use the ADAM "Green Cable" to
establish a point-to-point connection.
The "Green Cable" has the order number ADAM-8950-0KB00 and may only
be used with ADAM CPUs 8xxx.
• Configure the MPI-interface of your PC.
• Via PLC > Load to module you transfer your project into the CPU.
• If you want to save your project on MMC additionally, plug-in a MMC and
transfer your user application via PLC > Copy RAM to ROM.
During the write process the MC-LED at the CPU is blinking. Due to the
system, the completion of the write operation arrives too soon. It is only
completed when the LED has been extinguished.
3-10 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Configure MPI
Approach
Hints for configuring a MPI-interface are to find in the documentation of
your programming software. At this place only the usage of the "Green
Cable" from Advantech shall be shown, together with the programming tool
from Siemens.
The "Green Cable" establishes a connection between the COM interface of
the PC and the MP
2
I-interface of the CPU.
Attention!
Please regard, that you may use the "Green Cable" exclusively at the MP
2
I
jacks of the Systems 8xxx from Advantech!
Please regard the hints for deploying the Green Cable and the MP
2
I jack in
chapter 1.
®
• Start the STEP
7 manager from Siemens
• Choose Options > Configure PU/PC interface
→ The following dialog window appears, where you may configure the
used MPI-interface:
• Choose " PC Adapter (MPI) ", possibly you have to add this first.
• Click on < Properties >
→ In the following two dialog windows you may configure your PC
adapter like shown in the picture.
Note!
Please make sure to adjust the transfer rate to 38400Baud when using the
"Green Cable".
ADAM 8000 Manual CPU 821x – Rev 1.1 3-11
Page 56
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Usage of the
MMC
Needed files
Transfer
CPU → MMC
As external storage medium the Multi Media Card (MMC) is used (OrderNo.: ADAM-8953-0KX00).
The reading of the MMC takes always place after an OVERALL RESET.
You may write on the MMC via a write command from the hardware
configurator from Siemens or with a MMC reading device from Advantech
(OrderNo.: ADAM-8950-0AD00). Thus it is possible to create your
applications at the PC, copy them on MMC and transfer them into the CPU
by plugging-in the MMC.
The MMC modules are delivered preformatted with the file system FAT16.
There may exist several projects and subfolders on one MMC module. You
just have to take care, that the recent project is stored in the root directory
and has the name: S7PROG.WLD.
When the MMC has been installed, the write command stores the
application program of the battery buffered RAM at the MMC.
The write command is controlled by means of the Siemens hardware
configurator via PLC > Copy RAM to ROM.
During the write operation the yellow "MC"-LED of the CPU is blinking.
Transfer
MMC → CPU
The transfer of the user application from the MMC to the CPU always takes
place after an OVERALL_RESET. The blinking of the yellow "MC"-LED
indicates the active transfer process.
If there is no valid user application on the MMC or if the transfer fails, an
OVERALL_RESET of the CPU takes place and the "STOP"-LED blinks
three times.
Note!
If the user application exceeds the user memory of the CPU, the content of
the MMC is not transferred into the CPU.
If you initiate a write command and there is no MMC plugged in, an error
message about insufficient memory occurs.
It is advisable to compress the application program before transferring it
into the CPU, because this is not initialized automatically.
3-12 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Operating modes
Outline
Operating mode
STOP
The CPU can be in one of 3 operating modes:
• STOP
• START-UP
• RUN
Certain conditions in the operating modes START-UP and RUN require a
specific reaction from the system program. In this case the application
interface is often provided by a call to an organization block that was
included specifically for this event.
• Processing of the application program has stopped.
• If the program was being processed, the values of counters, timers, flags
and the contents of the process image are retained during the transition
to the STOP mode.
• Outputs are inhibited, i.e. all digital outputs are disabled.
• RUN-LED off
• STOP-LED on
Operating mode
START-UP
Operating mode
RUN
• During the transition from STOP to RUN a call is issued to the start-up
organization block OB100. The length of this OB is not limited. The
processing time for this OB is not monitored. The start-up OB may issue
calls to other blocks.
• All digital outputs are disabled during the start-up, i.e. outputs are
inhibited.
• RUN-LED blinks
• STOP-LED off
When the CPU has completed the start-up OB, it assumes the operating
mode RUN.
• The application program in OB1 is processed in a cycle. Under the
control of alarms other program sections can be included in the cycle.
• All timer and counters being started by the program are active and the
process image is updated with every cycle.
• The BASP-signal (outputs inhibited) is deactivated, i.e. all digital outputs
are enabled.
• RUN-LED on
• STOP-LED off
ADAM 8000 Manual CPU 821x – Rev 1.1 3-13
Page 58
Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Overall Reset
Outline
Overall reset by
means of the
function selector
During the OVERALL_RESET the entire user memory (RAM) is erased.
Data located in the memory card is not affected.
You have 2 options to initiate an OVERALL RESET:
• initiate the overall reset by means of the function selector switch
• initiate the overall reset by means of the Siemens STEP
7 manager
Note!
You should always issue an overall reset to your CPU before loading an
application program into your CPU to ensure that all blocks have been
cleared from the CPU.
Condition
The operating mode of the CPU is STOP. Place the function selector on the
CPU in position "ST" → the S-LED is on.
Overall reset
• Place the function selector in the position MR and hold it in this position
for app. 3 seconds. → The S-LED changes from blinking to permanently
on.
• Place the function selector in the position ST and switch it to MR and
quickly back to ST within a period of less than 3 seconds.
→ The S-LED blinks (overall reset procedure).
• The overall reset has been completed when the S-LED is on
permanently. → The S-LED is on.
The following figure illustrates the above procedure:
RN
ST
MR
3Sec.
RN
ST
MR
RN
ST
MR
RN
ST
MR
R
S
PW
SF
FC
MC
R
S
PW
SF
FC
MC
R
S
PW
SF
FC
MC
R
S
PW
SF
FC
MC
3 Sec.
3-14 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Automatic reload
Overall reset by
means of the
Siemens STEP
7
Manager
At this point the CPU attempts to reload the parameters and the program
from the memory card. → The lower LED (MC) blinks.
When the reload has been completed the LED is extinguished. The
operating mode of the CPU will be STOP or RUN, depending on the
position of the function selector.
Condition
The operating mode of the CPU must be STOP.
You may place the CPU in STOP mode by the menu command
PLC > Operating mode.
Overall reset
You may request the OVERALL_RESET by means of the menu command
PLC > Clear/Reset.
In the dialog window you may place your CPU in STOP mode if this has not
been done as yet and start the overall reset.
The S-LED blinks during the overall reset procedure.
When the S-LED is on permanently the overall reset procedure has been
completed.
Automatic reload
At this point the CPU attempts to reload the parameters and the program
from the memory card. → The lower LED (without label) blinks.
When the reload has been completed, the LED is extinguished. The
operating mode of the CPU will be STOP or RUN, depending on the
position of the function selector.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-15
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Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Assembly
Attention!
It is mandatory to turn off the power supply before you insert or remove any
CPU
1
2
modules!
Please note that the CPU may only be installed into plug-in location 1 or 2
(see figure below).
3
[1] CPU, double width
[2] CPU, single width
[3] Peripheral
modules
[4] Guiding bars
ER
RD
D
DE
P
X2
4
3
ADAM 8216-2BP01
4
CPU 8216
R
S
MMC
PW
SF
FC
MC
DC
+
24V
-
2
X
4
3
ADAM 8216-2BA01
CPU 8216 DP
R
S
MMC
PW
SF
FC
MC
DC
+
24V
-
RN
ST
MR
M
2
P
I
X1
1
2
RN
ST
MR
M
2
P
I
X1
1
2
For details on the assembly of System 82xx modules please refer to the
System 82xx manual (Order-No.: ADAM-HB97).
3-16 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
Recalling version and performance information
Outline
Approach
As soon as you are online with your CPU 821x you have the possibility to
recall the module state.
You may find the module state in the STEP
®
7 manager from Siemens
under the PLC functions.
Open your project. Click on the system you want to examine.
Now open the dialog window about the module state via PLC > Module
information.
Besides the possibility to recall numerous module states and performance
information, you may find in the register "General" facts about the hardware
version (also part releases) and the version of the firmware:
Hardware
release
Firmware
release
Note!
More detailed information to the deployment of the PLC functions are to
find in the manual to the STEP
7 manager from Siemens.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-17
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Chapter 3 Deployment of the CPU 821x CPU ADAM 821x
Using test functions for the control and monitoring of variables
Outline
Test > Status
For troubleshooting purposes and to display the status of certain variables
you may access certain test functions via the menu item Test of the
Siemens STEP
The status of the operands and the VKE are displayed by means of the test
function Test > Status.
You are able to modify and/or display the status of variables by means of
the test function PLC > Monitor/control variables.
This test function displays the current signal state and the VKE of the
different operands while the program is being executed.
It is also possible to enter corrections to the program.
Note!
When using the test function Monitoring the PLC has to be in RUN mode!
The processing of states may be interrupted by means of jump commands
or by timer and process-related alarms. At the breakpoint the CPU stops
collecting data for the status display and instead of the required data it only
provides the PU with data containing the value 0.
For this reason jumps or time and process alarms may result in the value
displayed during program execution remaining at 0 for the items below:
• the result of the logical operation VKE
• Status / AKKU 1
• AKKU 2
• Condition byte
• absolute memory address SAZ. In this case SAZ is followed by a "?".
The interruption of the processing of statuses does not change the
execution of the program but it only shows that the data displayed is no
longer valid after from the point where the interrupt occurred.
7 manager.
3-18 ADAM 8000 Manual CPU 821x – Rev 1.1
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ADAM CPU 821x Chapter 3 Deployment of the CPU 821x
PLC >
Monitor/control
variables
This test function returns the condition of a selected operand (inputs,
outputs, flags, data word, counters or timer) at the end of program
execution.
This information is obtained from the process image of the selected
operands. During the "processing check" or in operating mode STOP the
periphery is read directly from the inputs. Otherwise only the process image
of the selected operands is displayed.
Control of outputs
It is possible to check the wiring and proper operation of output modules.
You may set outputs to any desired status with or without a control
program. The process image is not modified but outputs are no longer
inhibited.
Control of variables
The following variables may be modified:
E, A, M, T, Z, and D.
The process image of binary and digital operands is modified independently
of the operating mode of the CPU 821x.
When the operating mode is RUN the program is executed with the
modified process variable. When the program continues they may,
however, be modified again without notification.
Process variables are controlled asynchronously with respect to the execution sequence of the program.
ADAM 8000 Manual CPU 821x – Rev 1.1 3-19
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Chapter 4 Deployment of the CPU 821xNET
Outline
Contents
The following chapter describes applications of the CPU 821xNET and the
H1 resp. TCP/IP communication procedure. It also contains an introduction
to the configuration of the module by means of WinNCS along with a realworld example.
The chapter contains a description of:
• the principles of the twisted-pair network
• configuration by means of WinNCS along with an example
• a test program for TCP/IP connections
Topic Page
Chapter 4 Deployment of the CPU 821xNET ........................................ 4-1
Principles ............................................................................................... 4-2
Network planning................................................................................... 4-7
Standards and norms ............................................................................ 4-9
Ethernet and IP addresses .................................................................. 4-10
Configuration of the CPU 821xNET..................................................... 4-12
Configuration examples....................................................................... 4-17
Start-up behavior ................................................................................. 4-28
System properties of the CPU 821xNET ............................................. 4-29
Communication links to foreign systems ............................................. 4-31
Test program for TCP/IP connections ................................................. 4-34
ADAM 8000 Manual CPU 821x – Rev 1.1 4-1
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Principles
Network
Twisted Pair
A network provides a link between different stations that enables them to
communicate with each other.
Network stations consist of PCs, IPCs, H1/TCP/IP adapters, etc.
Network stations are separated by a minimum distance and connected by
means of a network cable. The combination of network stations and the
network cable represent a complete segment.
All the segments of a network form the Ethernet (physics of a network).
In the early days of networking the Triaxial- (yellow cable) or thin Ethernet
cable (Cheapernet) was used as communication medium. This has been
superseded by the twisted-pair network cable due to its immunity to
interference. The CPU 821xNET module has a twisted-pair connector.
The twisted-pair cable consists of 4 cores that are twisted together in pairs.
Due to these twists this system is provides an increased level of immunity
to electrical interference.
Where the coaxial Ethernet networks are based on a bus topology the
twisted-pair network is based on a point-to-point scheme.
The network that may be established by means of this cable has a star
topology. Every station is connected to the star coupler (hub/switch) by
means of a separate cable. The hub/switch provides the interface to the
Ethernet.
Star coupler
(Hub)
Access control
The hub is the central element that is required to implement a twisted-pair
Ethernet network.
It is the job of the hub to regenerate and to amplify the signals in both
directions. At the same time it must have the facility to detect and process
segment wide collisions and to relay this information. The hub is not
accessible by means of a separate network address since it is not visible to
the stations on the network.
A hub has provisions to interface to Ethernet or to another hub.
Ethernet supports the principle of random bus accesses: every station on
the network accesses the bus independently as and when required. These
accesses are coordinated by a CSMA/CD (Carrier Sense Multiple Access/Collision Detection) scheme: every station “listens” on the bus cable
and receives communication messages that are addressed to it.
Stations will only initiate a transmission when the line is unoccupied. In the
event that two participants should start transmitting simultaneously, they
will detect this and stop transmitting to restart after a random delay time
has expired.
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Communication
The internal CP of the CPU 821xNET is directly connected to the CPU
821x by means of a Dual-Port-RAM. The Dual-Port-RAM is divided into 4
equal segments called page frames.
These 4 page frames are available at the CPU as standard CP interface.
Data is exchanged by means of standard handler blocks (SEND and
RECEIVE).
H1 and TCP/IP communication is controlled by means of connections that
are defined with the ADAM configuration tool WinNCS and are directly
transferred into the CPU via the twisted-pair connection.
H1 / TCP/IP
Frames
Ethernet
additional interfaces
CPU 821x NET
Application
program
(SEND, RECEIVE)
data
HTBs
Frames
CPCPU
Connections
configured
with WinNCS
Frames
Hub
Frames
System ADAM 8000
CPU 821x NET
ADAM 8000 Manual CPU 821x – Rev 1.1 4-3
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
H1 - Industrial
Ethernet
H1, which is also referred to as "Industrial Ethernet", is a protocol that is
based upon the Ethernet standard.
H1 information is exchanged between stations by means of H1-frames that
are transferred via transport connections.
A transport connection is a logical link between two access points to the
transport services on different stations. A transport connection is based
upon addressing information that provides an exact description of the path
between the two access points.
The following parameters describe a transport connection individually:
• MAC address, also referred to as Ethernet address, gives an unique
definition of the access facility of a station.
• TSAP Transport Service Access Points identify access channels for the
services of the transport protocol.
The CP prepares a data buffer and transfers the data into the data buffer by
means of the background communication function SEND_ALL. Then the
CP creates an H1-frame and transfers this to the partner station as soon as
this has enabled reception. When the partner station has received the H1frames, the CP receives an acknowledgment receipt. Next it uses the
background communication function RECEIVE_ALL to transfer the status
of the SEND-job into the respective indicator word.
This ensures error-free communications.
The following illustration shows the principle once again:
CPU CP
Send HTB
Send_All
Daten
Recv_All
Statuswort
Note!
Due to the large quantity of acknowledgment receipts that are transferred
via an H1 transport connection, the load on the network is appreciably
higher under H1 than under TCP/IP, however, under TCP/IP the security of
the data is reduced!
SEND-Auftrag
Daten
H1-Frame
Empfang beendet
H1-Bus
Empfangsfreigabe
H1-Frame
Empfangsquittung
jedes Frames
Empfangs-Auftrag
Daten
H1-Frame
Empfang beendet
CPUCP
Receive HTB
Recv-All
Daten
Recv_All
Statuswort
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
TCP/IP
TCP/IP protocols are available on all major systems. At the bottom end this
applies to simple PCs, through to the typical mini computer up to mainframes (TCP/IP implementations also exist for IBM systems) and special
processors like vector processors and parallel computers. For this reason
TCP/IP is often used to assemble heterogeneous system pools.
TCP/IP can be employed to establish extensive open network solutions
between the different business units of an enterprise.
For example, TCP/IP may be used for the following applications:
• centralized control and supervision of production plants,
• transfer of the state of production machines,
• management information,
• production statistics,
• the transfer of large quantities of data.
TCP and IP only provide support for two of the protocols required for a
complete architecture. Programs like "FTP" and "Telnet" are available for
the application layer of the PC.
The application layer of the CPU 821xNET-CP is defined by the application
program using the standard handler blocks.
These application programs exchange data by means of the TCP or UDP
protocols of the transportation layer. These themselves communicate with
the IP protocol of the Internet layer.
IP
The main purpose of IP is to provide the addressing of data packets. This
means that IP has the same function as an envelope has for a letter. The
address is used by the network to determine the destination and to route
the data packets accordingly.
The protocol divides the data into small portions since different networks
use differently sized data packets.
A number is assigned to each packet. This is used to acknowledge
reception and to reassemble the original data. To transfer these sequence
numbers via the network TCP and IP is provided with a unique envelope
where these numbers are recorded.
TCP
A packet of data is inserted into a TCP envelope. This is then inserted into
an IP-envelope and transferred to the network. TCP provides for the secure
transfer of data via network. TCP detects and corrects communication
errors.
In this way TCP connections are relatively safe.
UDP provides a much faster communication link. However, it does not cater
for missing data packets, nor does it check the sequence of the packets.
UDP is an unsecured protocol.
TCP/IP services
ADAM 8000 Manual CPU 821x – Rev 1.1 4-5
OPEN / CONNECT
Page 69
Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Opens a virtual connection to communication partner when the station is in
active mode and waits for a connection from a communication partner in
passive mode.
SEND
Transfers a data buffer to TCP for transmission to a communication
partner.
RECEIVE
Receives data from a communication partner.
CLOSE
Terminates a virtual connection.
Example for H1 or
TCP/IP application
Deployment under TCP/IP or H1
TCP/IP/H1
H1 / TCP/IP
Hub
Visualization and
shop floor data collection
via DDE-server
System 82xx
CPU 821x NET
System 82xx
H1 / TCP/IP
CPU 821x NET
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Network planning
Twisted-pair
network
hardware
A twisted-pair network can only be constructed as star topology. This
requires a hub to connect the different stations.
A twisted-pair cable has four cores, twisted together in pairs. The different
cores have a diameter of 0.4 to 0.6 mm.
CPU 8216NET
Twisted Pair-
Buchse (jack)
Twisted Pair-Stecker (plug)
Twisted Pair-Kabel (cable)
Sternkoppler (Hub)
Spannungsversorgung
(power supply)
123
Rx Tx Rx Tx
Tx
456
Rx
Tx
Rx Tx
Rx
Rx
Tx
ADAM 8000 Manual CPU 821x – Rev 1.1 4-7
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Restrictions
There are a few restrictions and rules that have to be taken into account
using twisted-pair:
• Maximum number of hub elements per segment 2
• Maximum length of one segment 100m
Analyzing the
network
requirements
Drawing a
network diagram
• What is the size of the area that has to be served by the network?
• How many network segments provide the best solution for the physical
(space, interference related) conditions encountered on site?
• How many network stations (PLCs, IPCs, PCs, transceivers, bridges, if
required) shall be connected to the cable?
• What is the distance between the different stations on the network?
• What is the expected “growth rate” and the expected number of
connections that shall be catered for by the system?
Draw a diagram of the network. Identify every hardware item (i.e. station
cable, hub). Observe the applicable rules and restrictions.
Measure the distance between all components to ensure that the maximum
length is not exceeded.
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Standards and norms
The main property of the bus structure is that there is only one single
physical connection. The physical communication medium may be:
• one or more electrical cables (drilled cores),
• coaxial cables (triaxial cables),
• fiber optic cables.
The applicable rules and regulations have to be satisfied in order to
establish reliable communications between the different stations.
These agreements define the form of the data protocol, the method of bus
access and other principles that are important for reliable communications.
The ADAM CPU 821xNET was developed in accordance with the standards
defined by ISO.
Standards and
guidelines
ANSI American National Standards Institute
CCITT Committee Consultative Internationale de Telephone et Telegraph.
ECMA European Computer Manufacturers Association.
EIA Electrical Industries Association (USA)
IEC International Electrotechnical Commission.
ISO International Organization for Standardization.
International and national committees have defined the following standards
and guidelines for networking technologies:
The ANSI X3T9.5 standard currently defines the provisions for high-speed
LANs (100 MB/s) based on fiber optic technology.
(FDDI) Fiber Distributed Data Interface.
Amongst others, this advisory committee has produced the provisions for
the connection of industrial networks (MAP) to office networks (TOP) on
Wide Area Networks (WAN).
Has produced various MAP and TOP standards.
This committee has issued standard definitions like RS-232 (V.24) and
RS-511.
Defines certain special standards, e.g. for the Field Bus.
This association of national standards organizations developed the OSImodel (ISO/TC97/SC16). It provides the framework for the standardization
of data communications. ISO standards are included in different national
standards like for example UL and DIN.
IEEE Institute of Electrical and Electronic Engineers (USA).
The project-group 802 determines LAN-standards for transfer rates of 1 to
20 MB/s. IEEE standards often form the basis for ISO-standards, e.g. IEEE
802.3 = ISO 8802.3.
ADAM 8000 Manual CPU 821x – Rev 1.1 4-9
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Ethernet and IP addresses
Structure of an
Ethernet address
A station is addressed by means of the Ethernet address, which is also
known as the MAC address. The Ethernet addresses of stations in a network must be unique.
Ethernet addresses consist of the following elements:
0020D5 xxx xxx
Multicastkreis-Nr.
Teiladresse (frei wählbar)
Teiladresse (firmenspezifisch)
(ADAM: 0020D5)
The Ethernet address has a length of 6Byte. The first 3Byte are defined by
the manufacturer. These 3Byte are assigned by the IEEE-Committee. The
last 3Byte may be defined as required.
The network administrator determines the Ethernet address.
The broadcast address (to transmit messages to all stations on the
network) always is:
FFFFFFFFFFFFh
IP address
structure
The IP address is a 32Bit address that must be unique within the network.
The IP address consists of 4 numbers that are separated by a dot.
The structure of an IP address is as follows:
Range: 000.000.000.000 to 255.255.255.255
The network administrator also defines IP addresses.
The broadcast address (transmit a message to all stations) is always:
255.255.255.255
Attention!
Certain IP addresses are restricted! These addresses are reserved for
special services!
xxx.xxx.xxx.xxx
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
.
Initial address
When the CPU 824xNET is first turned on the module has a predefined
initial Ethernet address.
This address is available from the label that has been attached to the side
of the module.
This Ethernet address is only used when the module is first turned on, to
calculate a unique IP address according to the following formula:
ADAM-spez.
Ethernetadresse
IP-Adresse
00 20 D5 80 2D 7D
213.128.45.125
hex
dez
Note!
A relationship between the Ethernet address and the IP address only exists
when the module is turned on for the first time.
You may always use the function CP-Init in WinNCS to assign a different
address.
Attention!
The original Ethernet address may not be restored since it is not possible to
perform an overall reset of the CP section.
ADAM 8000 Manual CPU 821x – Rev 1.1 4-11
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Configuration of the CPU 821xNET
Outline
CP-configuration
with WinNCS
Initial CP
configuration
The configuration procedure for the CP section is identical to that of the CP
143 H1/TCP/IP ADAM module.
The configuration procedure for H1 and TCP/IP consists of two parts:
• CP configuration by means of WinNCS of Advantech (Ethernet
connection).
• PLC programming by means of an application program (PLC connect).
The CP section of the CPU 821xNET may only be configured with WinNCS
from Advantech and consists of the following 3 parts:
• The initial CP configuration,
• configuration of connection modules,
• transfer configuration data into the CP.
This is where the address and other identification parameters of a station
are defined.
Under "Ethernet" you insert a new station into the network window and
enter the configuration data for your station into the parameter window.
The basic CP configuration determines the behavior of your station on the
network.
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Configuration of a
connection block
A connection block contains the remote parameters, i.e. parameters that
are oriented towards the partner on the network, and local parameters, i.e.
parameters that apply to the PLC program of a connection.
Depending on the selected protocol you may configure H1 or TCP/IP connections by selecting the symbol of the station and inserting/configuring the
respective connection.
H1-Connection TCP/IP- Connection
Transferring the
configuration to
the CP
When all the required connections have been configured, you have to
transfer the parameters to the CP. This operation is available from the
"Module transfer functions" of WinNCS.
For transferring the configuration data, please activate the „online
functions“ and click on the button INIT:
ADAM 8000 Manual CPU 821x – Rev 1.1 4-13
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
.
Like described before the CPU 821xNET is delivered with a predefined
Ethernet address.
You will find this predefined address on the label at the side of the module.
When using the module for the first time this default address is changed
into an individual IP address following this rules:
ADAM-spez.
Ethernetadresse
00 20 D5 80 2D 7D
hex
IP-Adresse
213.128.45.125
dez
Choose „IP protocol“ in the Protocol-window and type the determined IP
address. Confirm your entry with [OK].
Now switch to the window network and click the according station. Use the
right mouse button and choose „Download“.
Your project will now be directly transferred into the Flash-ROM of your CP.
4-14 ADAM 8000 Manual CPU 821x – Rev 1.1
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
PLC application
programming
Handler blocks
Handler block Description
SEND SFC230 Transmit a job from the CPU to the CP.
SEND_ALL SFC236 Initiate a file transfer between the CPU and the CP.
RECEIVE SFC231 Reception of an order from the CP.
RECEIVE_ALL SFC237 Initiate a file transfer between the CPU and the CP.
FETCH SFC232 The FETCH block requests data. FETCH initiates a
CONTROL SFC233 The CONTROL block is used for a job-related status
CONTROL_ALL SFC233 + ANR=0 Request for the present job
RESET SFC234 The RESET block initiates a reset of the job for the
RESET_ALL SFC234 + ANR=0 RESET_ALL forces a full system reset of the CP.
SYNCHRON SFC235 During start-up, SYNCHRON provides the synchroniza-
To enable the PLC to process connect requests, it requires an active PLC
application program on the CPU. This uses the handler blocks (SEND,
RECEIVE, ...) that are included in the CPU 821xNET amongst others.
The PLC-program also requires that a communication channel be specified
first between the CPU and the CP ("synchronization"). This function is
performed by the SYNCHRON block.
Transmission and reception is initiated by means of SEND and RECEIVE.
A data transfer is initiated by means of SEND_ALL resp. RECEIVE_ALL.
Error messages will appear in the indicator word.
A description of the handler blocks is available in this manual in the chapter
on "Integrated handler blocks".
The following table lists the respective handler blocks:
RECEIVE_ALL.
request, i.e. the ANZW of a specific job is updated.
specified connection.
tion between CPU and CP. At the same time the page
frame is erased and the block size between PLC and
CP is negotiated. Active data communications may only
occur via synchronized page frames.
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Synchronization
When a PLC starts-up, each of the configured interfaces of the CP has to
be synchronized by means of SYNCHRON.
After power is turned on, the CPU 821xNET requires app. 15s for the bootprocedure. If the PLC should issue a request for synchronization during this
time, an error is returned in the configuration error byte PAFE. This
message is removed when the CP module has completed the boot
process.
The timer in this block is initially set to 20s. Processing will be stopped if the
synchronization is not completed properly within this period.
The following table shows the available block sizes.
Block size CP block size in byte
0 Use the preset block size
1 16
2 32
3 64
4 128
5 256
6 512
255 512
Cycle
The sending and receiving blocks SEND and RECEIVE, which initiate the
sending and receiving operations, must be configured in the cycle program
OB1. The blocks SEND_ALL and RECEIVE_ALL perform the actual datatransfer.
Purely passive connections only require the components SEND_ALL or
RECEIVE_ALL.
To protect the data transfer you should integrate various checkpoints that
evaluate the indicator word.
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Configuration examples
Outline and
requirements
This chapter provides an introduction to use the bus systems H1 and
TCP/IP for the System 82xx. This introduction is centered on the Advantech
configuration software WinNCS.
The object of this chapter is to create a small communication system
between two ADAM CPU 821xNET that provides a simple approach to the
control of the communication processes.
Knowledge of the CP handler blocks is required. CP handler blocks are
standard function blocks. These provide the options required to use the
communication functions in the applications of the programmable logic
controllers.
The minimum technical equipment required for the examples is as follows:
Hardware
- 2 CPU 821xNET,
- 1 PC or PU with twisted-pair Ethernet connection
Communication line
- 3 bus cables
- 1 hub
Software package
- Configuration software WinNCS from Advantech
- Siemens STEP
The implementation of the example is to program the two programmable
logic controllers as well as configuring the communication processors by
means of WinNCS.
7 Manager programming package for CPU 821xNET
ADAM 8000 Manual CPU 821x – Rev 1.1 4-17
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Chapter 4 Deployment of the CPU 821xNET CPU ADAM 821x
Task
Structure
Purpose of the
PLCs
The introductory example is the application of a communication task,
described below:
Station 1
System 82xx
CPU 821x NET
Hub
Twisted Pair
Station 2
System 82xx
CPU 821x NET
Both of the CPUs run with the same PLC program, only the configuration of
the CPs have to be adjusted.
Both stations are sending and receiving 16 data words per second.
• Data block DB11 transfers the data words DW0 to DW15 at an interval
of 1s. Data word DW0 in DB11 is used as message counter. It is only
incremented, if the preceding send command was processed correctly
(completed without error). The remaining data words (DW1 to DW15)
may be used for the transfer of user data.
• The receiving station stores the data in DB12 (DW 1 to DW 15).
• SEND is configured with job number A-No. = 11 and with a page frame
offset SSNR = 0.
• RECEIVE is configured with job number A-No. = 1 and a page frame off-
set SSNR = 0.
• The source and destination parameters have to be configured directly.
At this point the purpose and the required settings have been outlined. The
programs provide additional details of the configuration of the handler
blocks. A detailed description of a suitable configuration of the CPs under
control of H1 or TCP/IP is also included.
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CPU ADAM 821x Chapter 4 Deployment of the CPU 821xNET
Configuration
under WinNCS
Basic CP
configuration
The two CPs are configured exclusively by means of WinNCS. Start
WinNCS and create a project containing the function group "Ethernet_H1".
The procedure is the same for both stations. It differs only in the
parameters that have to be defined and is divided into the following 3 parts:
• Basic CP configuration,
• Configuration of connection blocks,
• Transfer of configuration data into the CP.
Insert two stations and select the following settings:
Station 1 Station 2
Request the required station addresses from your system administrator.
If necessary, you may enter additional settings into the configuration
windows. Details are obtainable from your system administrator.
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Connection
block
configuration
H1 connections
You configure your H1 connection by inserting an H1 transport connection
below the stations by means of
for the stations:
Station 1 Station 2
and entering the following parameters
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TCP/IP
connections
You configure your TCP/IP connection by inserting a TCP connection
below the stations by means of
for the stations:
TCP/IP connections
Station 1 Station 2
and entering the following parameters
Please save your project!
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Network window
Your network window should have the following contents:
Transferring the
configuration data
into the CPUs
You can transfer your configuration online via the network into the
respective CPUs. Create the system structure as shown above and start
both CPUs.
For the data transfer please activate the online functions and click on the
button INIT:
Now choose „IP-protocol“ in the Protocol window and type the according IP
address. Confirm with [OK].
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Select the station to which you wish to transfer the configuration data in the
network window of WinNCS and activate [Download].
Your project will now be transferred to the RAM of the CPU.
Attention!
After transferring the project into the CPU-RAM you should save the project
additionally in the Flash-ROM. Otherwise the data will get lost at power off.
Therefore you are searching the according station in the network window.
Click on the right mouse button and choose „Flash“.
The RAM data are now transferred to the Flash-ROM.
Repeat this procedure above for station 2 and don’t forget to save the
project to Flash-ROM.
This concludes the configuration of the CP side. The following pages
contain information on the programming for the PLC section.
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PLC programs
for the CPUs
OB100
Interface
Synchronization
The PLC programming in this example does not depend on the protocol
and can therefore be used for H1 and TCP/IP.
This PLC program is used in both CPUs.
Synchronization of the interfaces
In the start-up OB OB100 of the CPU the interface used on the CP has to
be synchronized by means of the handler block SYNCHRON.
OB100 verifies that the synchronization procedure was completed without
errors. If an error is detected, the error number is entered into MW100.
Operation block OB100:
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OB1 - Cycle
FC 1 - SEND
FC 2 - RECEIVE
The OB1 cycle controls the sending and receiving of the data. The initiation
of transmission in station 1 is issued by a SEND handler block called in
FC1. The partner station answers with RECEIVE (FC2). By means of
SEND_ALL the data will be send and received by the partner with the
command RECEIVE_ALL.
Cycle operation block OB1:
FC1 - SEND FC2 - RECEIVE
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Data blocks
DB11, DB12
The frequency with which a SEND job is issued, depends on the time that
was configured for the FC1 call. This timer is programmed for 1000ms in
this example. For this the sample program initiates the SEND job at a rate
of once every 1000ms.
Data word DW0 in data block DB11 is incremented ahead of every SEND
call that actually transmits a message. This occurs in function block FC1.
Altogether 16Byte of data are transferred. The partner receives the information and stores it in DB12.
Together with DB0 there is still 15Byte space for user data.
DB11 and DB12 are identical in design:
Transfer project
The data transfer is realized via MPI. If your programming device has no
MP-interface, you may also use the "Green Cable" (ADAM-8950-0KB00)
from Advantech.
The "Green Cable" may only be used at the ADAM CPUs of the Systems
8xxx!
Please regard the notes about the "Green Cable" in chapter 1!
• Connect your PU with the CPU
• With PLC > Load to module in your configuration tool you transfer your
project into the CPU.
• Insert a Multi Media Card (MMC) into the according CPU-slot and
transfer your application via PLC > Copy RAM to ROM.
• During the writing process the MC-LED on the CPU is blinking. Due to
the system the dialog message of the successful writing process
appears a little bit too soon. This process is not ready before the LED on
the CPU is extinguished.
• Switch both CPUs to RUN.
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Monitoring the
data transfer in
Siemens STEP7
manager
It is assumed that the CPs were programmed and that an overall reset was
issued to the CPUs where the RUN/STOP switch has to be in STOP
position.
You now load the above PLC programs into your CPUs. Start the programs
by placing the respective RUN/STOP switch into the position RUN.
At this point, communication between the modules is established. This is
indicated by the COMM-LEDs.
Start the Siemens STEP
monitor the transmitting job:
• PLC > Monitor/Modify Value
• In the "Operand" column you enter the respective data block number
and the data word (DB11.DW0-15).
• Establish a connection and click "Monitor"
7 manager and execute the following steps to
.
Entering user data
You may enter user data starting with DW1. Place the cursor on Modify
value and enter the value you wish to transfer, e.g. W#16#1111.
The
initiates a single transfer.
button transfers the new value in every cycle and the button
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Start-up behavior
Overview
Status after
CP boot-up
When the power supply is turned on, the CPU and the CP execute the
respective BIOS routine (hardware and driver initialization and memory
test).
While the CPU detects the installed modules on the backplane bus and
loads the application program, the CP starts the page frame administration
routine.
After app. 15s the CP waits for the synchronization request from the CPU.
In this condition data communication with the PLC is inhibited and it is only
enabled after synchronization has taken place.
The boot time of the CPU 821xNET including the CP amounts to app. 18s.
With every status change from STOP to RUN as well as from RUN to
STOP back to RUN, the CPU821xNET performs a cold-/warm reset. All
connections are cleared and reestablished after the CP has rebooted.
Three different reasons can cause these status change requests:
• Resynchronization of a CP by the SYNCHRON-HTBs of the CPU (warm
start) after it has already been synchronized,
• STOP/START-function of the configuration tool WinNCS (warm start),
• RESET_ALL (warm start).
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System properties of the CPU 821xNET
Note
General
Note only for H1
Note only for
TCP/IP
System properties of a CP should not be regarded as restrictions or
equated with malfunctions. Certain functions can not be provided or are not
desired when the overall system is taken into account.
The boot time of the CP section of the CPU 821xNET is app. 18 seconds.
The integrated SYNCHRON block (delay time 30s) caters for this boot time.
• Jobs with a priority 0/1 may transmit and/or receive a maximum quantity
of data as defined by the SYNCHRON-HTB. Jobs of this priority are not
blocked. This results in a maximum data transfer rate of 512Byte per job
for a block size of 255 (refer also to block size).
• RECEIVE jobs that are mapped to the communication type "broadcast"
cannot receive all data messages from a fast cyclic transmitter. Messages that have not been received are discarded.
• The default length (-1, 0xFFFF) is not permitted for the ORG format
length, i.e. the user has to define the exact length of the data that will be
received.
• Jobs with a priority of 1 may send and/or receive a maximum quantity of
data as defined by the SYNCHRON-HTB. Jobs of this priority are not
blocked. This results in a maximum data transfer rate of 512Byte per job
for a block size of 255 (see also block size).
• RECEIVE-jobs that mapped to communication type UDP cannot receive
all data messages from a fast cyclic station. Messages that have not
been received are discarded.
The TCP/IP protocol stack has a global buffer pool where the receive and
transmit buffers are located. This is where system collisions can occur if:
• Data for a receive job is not collected. After a period of time a lack of
resources will occur and the other connections will terminate
themselves.
It is only possible to re-establish proper communications when the
receive buffers of this connection have been released (connection
terminated) or when the data has been retrieved by means of RECEIVE.
• one or more cyclic stations place a load on a CP. When resource
bottlenecks are encountered, the CP can also initiate the termination of
connections.
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• A station transmits two or more messages and the receiver did not have a
chance to accept them. Then the reception of the unknown data type
would cause collisions in the receiver. However, the CP prevents this. The
PLC application requires a defined size for the reception of data and the
wildcard length is not permitted. The size of the receive block of Prio1 RECEIVE jobs is defined implicitly by the pre-defined block size (16, 32,
64, 128, 256, 512Byte).
• Advantech recommends the use of acknowledgment messages on the
user level to ensure that data transfers are one hundred percent safe.
• Please regard, that the Port 7777 is used by WinNCS for
communication. This may not be occupied by other applications!
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Communication links to foreign systems
ORG format
The organization format is the abbreviated description of a data source or a
data destination in a PLC environment. The following table lists the
available ORG formats.
In the case of READ and WRITE the ORG block is optional.
The ERW identifier is used for the addressing of data blocks. In this case
the data block number is entered into this identifier. The start address and
quantity provide the address for the memory area and they are stored in
HIGH/LOW format (Motorola-formatted addresses)
Description Type Range
ORG identifier BYTE 1..x
ERW identifier BYTE 1..255
Start address HILOWORD 0..y
Quantity HILOWORD 1..z
The following table contains a list of available ORG formats:
ORG identifier 01h-04h
CPU area DB MB EB AB
ORG identifier 01h 02h 03h 04h
Description Source/destination data
from/into data block in
main memory.
DBNR
valid range:
Start address
Significance
valid range:
Quantity
Significance
valid range:
DB from where the
source data is retrieved
or to where the
destination data is transferred.
1...255
DB-No. from where the
data is retrieved or
where data is saved.
0...2047
Length of the
source/destination data block in words.
1...2048
source/destination data
from/into flag area.
irrelevant irrelevant irrelevant
MB- No. from where
the data is retrieved or
where data is saved.
0...255
Length of the
source/destination data
block in words.
1...256
Source/destination
data from/into process
image of the inputs
(PAE).
EB-No. from where the
data is retrieved or
where data is saved.
0...127
Length of the
source/destination data
block in words.
1...128
source/destination data
from/into process
image of the outputs
(PAA).
AB-No. from where the
data is retrieved or
where data is saved.
0...127
Length of the
source/destination data
block in words.
1...128
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Structure of PLC
header
for WRITE
For every READ and WRITE the CP generates PLC headers for request
messages and for acknowledgment messages. Normally the length of
these headers is 16Byte and they have the following structure:
Request message
System identifier ="S"
="5"
Header length =16d
Ident.OP code =01
OP code length =03
OP Code =03
ORG block =03
ORG block length =08
ORG identifier
DBNR
Start address H
L
Length H
L
Dummy block =FFh
Dummy block length =02
64K data only if error no.=0
Acknowledgment message
System identifier ="S"
="5"
Header length =16d
Ident.OP code =01
OP Code length =03
OP Code =04
Ack. Block =0Fh
Ack. Block length =03
Error No. =No.
Dummy block =FFh
Dummy block length =07
not used
for READ Request message
System identifier ="S"
="5"
Header length =16d
Ident.OP code =01
OP Code length =03
OP Code =05
ORG block =03
ORG block length =08
ORG identifier
DBNR
Start address H
L
Length H
L
Dummy block =FFh
Dummy block length =02
Acknowledgment message
System identifier ="S"
="5"
Header length =16d
Ident.OP code =01
OP Code length =03
OP Code =06
Ack. block =0Fh
Ack. Block length =03
Error No. =No.
Dummy block =FFh
Dummy block length =07
not used
64K data only if error no.=0
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SEND / RECEIVE
of the type TRADA
TRADA stands for Transparent Data exchange. A transparent data
exchange may transfer application data with varying block lengths. A
16Byte header that defines the length of the application data precedes the
application data.
With TRADA you may enter a wildcard length into the PLC application.
If you enter "-1" as length into the RECEIVE-FB (parameter: ZLAE) you are
defining a variable length (wildcard length) for the application data. With
wildcard lengths the actual length of the data is retrieved from the
respective TRADA header.
With the TRADA functionality the following header will precede a SEND job
and it is analyzed by the RECEIVE function.
SEND of type TRADA
OP-code = 07
System identifier ="S"
="5"
Header length =16d
Ident.OP code =01
OP code length =03
OP code =07
ORG block =03
ORG block length =08
ORG identifier
DBNR (irrelevant)
Start address H
L
Length H
L
Dummy block =FFh
Dummy block length =02
64K data if error no.=0
→ Length of the user data
Length
ADAM 8000 Manual CPU 821x – Rev 1.1 4-33
The length file contains the number of bytes in a data block.
If you are synchronizing with a block size of 6 (512Byte) the length is
entered in words.
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Test program for TCP/IP connections
The test program TCPTest is included with WinNCS. You may use this test
program to create simple TCP/IP connections and analyze them.
After the installation of WinNCS TCPTest is to find in the directory NCS.
The following section provides a short introduction to the test program.
For this purpose please start TCPTEST.EXE. The test program is executed
and displays the following window:
Initial display
Tab sheets
The menu has the appearance of tab sheets. The respective dialog window
may be displayed by left clicking with the mouse.
Tab sheets
Connect window containing the status of the connections and the
local IP address.
ReadA configuration window for READ ACTIVE connections
(FETCH).
WriteA configuration window for WRITE AKTIVE connections.
Receive configuration window for RECEIVE orders.
Send configuration window for SEND orders.
System control windows for status requests and toggling between
RUN/STOP of the CP.
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Context menu
(right mouse key)
Connect tab
(Status)
You may activate a context menu in each tab sheet. This is activated by
means of the right mouse key.
You may always access the context menu by clicking the right mouse key.
This menu offers the following selection:
Save All save all parameters.
Save Conn1
to saves the respective connection.
Save Conn5
Save Win Pos saves the current window position.
Show Hints When you place the cursor on an input field or on a
button, a hint is displayed if you selected "Show Hints".
This window displays the status of all the connections that can be
configured in this program. Here you may recognize in one screen, which
connections are stable and which are unstable. When a status changes in a
register, the change is displayed in this window.
For reference, your own IP address is also displayed in the window.
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ReadA tab
1
2
3
4
[1] port data
[2] establish a connection
[3] hexadecimal number
5
[4] information window for the
status of the connection
[5] source data
[6] ASCII formatted display of
the data received
6
Here you may configure an active read connection.
In addition to the data required to establish the connection, you also have
to specify the source from where the data should be read.
Input fields
Remote Host IP address of the station from which you wish to read
data.
Remote Port Port address of the remote station.
Local Port Port address of your own (local) station. To simplify
matters you can specify the same port address for remote
and local.
Time (10mSec) Definable interval for cyclic read operations.
OrgKennung Type of the source block.
DBNr Number of the source block.
AnfAdr Start address of the source block.
Len Word length of the source block.
Tick-box
UDP This tick mark selects unsecured communications. No
virtual connections are used by unsecured communication
links. In this manner you may only display UDP
messages.
Buttons
Connect The connection is established and prepared for the read
operation.
Read this The data requested is read via this connection.
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WriteA tab
1
2
3
4
5
[1] port data
[2] establish a connection
[3] transfer the data via the
6
connection
[4] result-code of the write job
[5] information window for the
status of the connection
[6] source data
7
[7] ASCII-text that has to be
transferred to the CP
This is where you activate an active write connection.
In the same way as for the READ active command, you declare the desti-
nation block from where the data has to be transferred in addition to the
data required for establishing the connection.
Input fields
Remote Host IP address of the station to which you wish to write the
data.
Remote Port Port address of the remote station.
Local Port Port address of your own (local) station. To simplify
matters you can specify the same port address for remote
and local.
Time (10mSec) Definable interval for cyclic write operations. The
minimum timer value for cyclic writes is 5.
OrgKennung Type of destination block.
DBNr Number of destination block.
AnfAdr Start address of destination block.
Len Word length of destination block.
Tick-box
UDP This tick mark selects unsecured communications. No
virtual connections are used by unsecured communication
links. In this manner you may only display UDP
messages.
Buttons
Connect The connection is established and prepared for the write
operation.
Write this Data entered into the ASCII field is transferred to the CP
via the connection that was established by means of
Connect.
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