ACT ACT-F1M32B-120F14Q, ACT-F1M32B-120F14M, ACT-F1M32B-120F14I, ACT-F1M32B-120F14C, ACT-F1M32B-100F14Q Datasheet

eroflex Circuit Technology - Advanced Multichip Modules © SCD1661B REV A 1/16/97

ACT–F1M32 High Speed 32 Megabit

Boot Block

FLASH Multichip Module

CIRCUIT TECHNOLOGY

www.aeroflex.com/act1.htm

Features

■ 4 Low Voltage/Power Intel 1M x 8 FLASH Die in One

MCM Package

■ Overall Configuration is 1M x 32

■ +5V Operation (Standard) or +3.3V (Consult Factory)

■ Access Times of 80, 100 and 120 nS ( 5V VCC)

■ +5V or +12V Programing

■ Erase/Program Cycles

● 100,000 Commercial

● 10,000 Military and Industrial

■ Sector Architecture (Each Die)

● One 16K Protected Boot Block (Bottom Boot Block

Standard, Top Boot Block Special Order)

● Two 8K Parameter Blocks

● One 96K Main Block

● Seven 128K Main Blocks

■ Single Block Erase (All bits set to 1)

■ Hardware Data Protection Feature

■ Independent Boot Block Locking

■ MIL-PRF-38534 Compliant MCMs Available

■ Packaging – Hermetic Ceramic

● 68 Lead, .94" x .94" x .180" Dual-Cavity Small

Outline Gull Wing, Aeroflex code# "F14" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)

■ Internal Decoupling Capacitors for Low Noise

Operation

■ Commercial, Industrial and Military Temperature

Ranges

Block Diagram – CQFP(F14)

Standard Configuration

CE1 CE2

WP
WE

OE

A0 – A19

RP

1Mx8 1Mx8 1Mx8 1Mx8

8 8 8 8

I/O0-7 I/O8-15 I/O16-23 I/O24-31

Block Diagram – CQFP(F14)

Optional Configuration

RP
OE

A0 – A19

1Mx8 1Mx8 1Mx8 1Mx8

8 8 8 8

I/O0-7 I/O8-15 I/O16-23 I/O24-31

CE

CE3 WE4WE3WE2WE1 CE1 CE2

Pin Description

0-31 Data I/O

I/O

3

CE4

0–19 Address Inputs

A

WE

1-4 Chip Enables

CE

OE

WP

Reset/Powerdown

RP

CC Power Supply

V

GND Ground

NC Not Connected

Write Enables

Output Enable

Write Protect

General Description

Utilizing Intel’s SmartVoltage
Boot Block Flash Memory
SmartDie™, the ACT–F1M32 is
a high speed, 32 megabit CMOS
flash multichip module (MCM)
designed for full temperature
range military, space, or high
reliability applications.

The ACT-F1M32 consists of
four high-performance Intel
X28F800BV 8 Mbit (8,388,608
bit) memory die. Each die
contains separately erasable
blocks, including a hardware

Pin Description

0-31 Data I/O

I/O

CE4

0–19 Address Inputs

A

1-4 Write Enable

WE

1-4 Chip Enables

CE

OE

Reset/Powerdown

RP

CC Power Supply

V

GND Ground

NC Not Connected

Output Enable

lockable boot block (16,384
bytes), two parameter blocks
(8,192 bytes each), and 8 main
blocks (one block of 98,304
bytes and seven blocks of
131,072 bytes) This defines the
boot block flash family
architecture.

The command register is
written by bringing WE
low level (V
and OE

IL), while CE is low

is high (VIH). Reading is

to a logic

General Description, Cont’d,

accomplished by chip Enable (CE) and
Output Enable (OE

) being logically active.
Access time grades of 80nS, 100nS and
120nS maximum are standard.

The ACT–F1M32 is packaged in a
hermetically sealed co-fired ceramic 68
lead, .94" SQ Ceramic Gull Wing CQFP
package. This allows operation in a military
environment temperature range of -55°C to
+125°C.

The ACT–F1M32 provides program and
erase capability at 5V or 12V and allows
reads with Vcc at 5V or 3.3V(Not tested).
Since many designs read from flash
memory a large percentage of the time,
read operation using 3.3V can provide
great power savings. Consult the factory for

3.3V tested parts. In applications where
read performance is critical, faster access
times are obtainable with the 5V V

CC part

detailed herein.

For program and erase operations, 5V
Vpp operation eliminates the need for in
system voltage converters. The 12V Vpp
operation provides reduced (approx 60%)
program and erase times where 12V is
available in the system. For design
simplicity, however, connect Vcc and Vpp
to the same 5V ±10% source.

erased and programmed 100,000 times at
commercial temperature or 10,000 times at
extended temperature.

The boot block is located at either the
bottom (Standard) or the top (Special
Order) of the address map in order to
accommodate different microprocessor
protocols for boot code location. Locking
and unlocking of the boot block is controlled
by WP

and/or RP.

Intel's boot block architecture provides a
flexible solution for the different design
needs of various applications. The
asymmetrically-blocked memory map
allows the integration of several memory
components into a single flash device. The
boot block provides a secure boot PROM;
the parameter blocks can emulate
EEPROM functionality for parameter store
with proper software techniques; and the
main blocks provide code and data storage
with access times fast enough to execute
code in place, decreasing RAM
requirements.

For Detail Information regarding the
operation of the 28F800BV Memory die,
see the Intel datasheet (order number
290539-002).

Each block can be independently

SmartDie™ is a Trademark of Intel Corporation

Aeroflex Circuit Technology SCD1661B REV A 1/16/97 Plainview NY [phone]2

Absolute Maximum Ratings

Parameter Range Units

Case Operating Temperature Range
Storage Temperature Range
Voltage on Any Pin with Respect to GND (except V
Voltage on Pins A

PP Program Voltage with Respect to GND during Block Erase/ and Word/Byte Write

V

9 or RP with Respect to GND (except VCC, VPP, A9 and RP)

Vcc Supply Voltage with Respect to Ground
Output Short Circuit Current

Notes:

1. Minimum DC voltage is -0.5V on input/output pins. During Transitions, inputs may undershoot to -2.0V for periods < 20nS. Maximum DC voltage on input/output
pins is Vcc + 0.5V, which may overshoot to Vcc + 2.0V for periods < 20nS.

2. Maximum DC voltage on Vpp may overshoot to +14.0V for periods < 20nS. Maximum DC voltage on RP

3. Output shorted for no more than 1 second. No more than one output shorted at one time.
NOTICE: Stresses above those listed under "Absolute Maximums Rating" may cause permanent damage. These are stress rating only. Operation beyond the "Oper-

ation Conditions" is not recommended and extended exposure beyond the "Operation Conditions" may effect device reliability.

(3)

CC, VPP, A9 and RP)

(1)

(1)

(1,2)

(1,2)

or A9 may overshoot to VCC + 0.5V for periods <20nS

-55 to +125 °C

-65 to +150 °C

-2.0 to +7.0 V

-2.0 to +13.5 V

-2.0 to +14.0 V

-2.0 to +7.0 V
100 mA

Recommended Operating Conditions

Symbol Parameter Minimum Maximum Units

CC

V

5V Power Supply Voltage (10%)

3.3V Power Supply Voltage (±0.3V) (Consult Factory)

IH

V
V

T

Input High Voltage (3.3V & 5V VCC)

IL

Input Low Voltage (3.3V & 5V VCC)

A

Operating Temperature (Military)

+4.5 +5.5 V

+3.0 +3.6 V

+2.0 V

+ 0.5 V

cc

-0.5 +0.8 V

-55 +125 °C

Capacitance

(f = 1MHz, TA = 25°C)

Symbol Parameter Maximum Units

AD

C
C

C
C

C
C

C

A0 – A19 Capacitance

OE

OE Capacitance

CE

CE Capacitance

RP

RP Capacitance

WE

WE Capacitance

WP

WP Capacitance

I/O

I/O0 – I/O31 Capacitance

50 pF
50 pF
20 pF
50 pF
60 pF
50 pF
20 pF

Capacitance Guaranteed by design, but not tested.

DC Characteristics – CMOS Compatible

(TA = -55°C to +125°C, VCC = +4.5V to + 5.5V(5V Operation), or +3.0V to +3.6V(3.3V Operation), Unless otherwise specified)

(1)

CC

+5.0V V

Standard Units

440 600 µA

32 32 µA
120 260 mA
120 200 mA

100 180 mA
120 180 mA
100 160 mA

32 48 mA

60 60 µA

Parameter Sym Conditions

IL

Input Load Current
Output Leakage Current
Vcc Standby Current
Vcc Deep Power-Down Current

Vcc Read Current
Vcc Write Current

Vcc Erase Current

Vcc Erase Suspend Current

PP Standby Current

V

I

LO

I

CCS

I

CCD

I

CCR

I

CCW1

I

CCW2

I

CCE1

I

CCE2

I

CCES

I

I

PPS

CC = VCCMax., VIN = VCC or GND

V
VCC = VCCMax., VIN = VCC or GND
VCC = VCCMax., CE = RP = WP = VCC ± 0.2V
VCC = VCCMax., VIN = VCC or GND, RP = GND ± 0.2V
VCC = VCCMax., CE = GND, f = 10MHz (5V), 5MHz (3.3V),

OUT = 0 mA, Inputs = GND ± 0.2V or VCC ± 0.2V

I
VPP = VPPH1 (at 5V), Word Write in Progress (x32)
VPP = VPPH2 (at 12V), Word Write in Progress (x32)
VPP = VPPH1 (at 5V),Block Erase in Progress
VPP = VPPH2 (at 12V),Block Erase in Progress
CE = VIH, Block Erase Suspend
VPP < VPPH2

+3.3V V

Typical

Min Max Min Max

-1 +1 -1 +1 µA

-10 +10 -10 +10 µA

CC

Aeroflex Circuit Technology SCD1661B REV A 1/16/97 Plainview NY [phone]3