0.1 COPYRIGHT NOTICE AND DISCLAIMER.........................................................................................................................0-3
0.2 WELCOME TO THE ACE-9140 ......................................................................................................................................... 0-3
0.3 BEFORE YOU USE THIS GUIDE......................................................................................................................................0-3
0.4 RETURNING YOUR BOARD FOR SERVICE .................................................................................................................... 0-3
0.5 TECHNICAL SUPPORT AND USER COMMENTS............................................................................................................0-3
1.2 PACKING LIST .................................................................................................................................................................. 1-1
2. SYSTEM CONTROLLER....................................................................................................................................2-1
2.6 SERIAL PORT...................................................................................................................................................................2-6
3. SETTING UP THE SYSTEM...............................................................................................................................3-1
3.2 SYSTEM SETTING............................................................................................................................................................ 3-2
3.2.2 FDD Port Connector (DB1)......................................................................................................................................... 3-3
3.2.3 Parallel Port Connector (CN5).................................................................................................................................... 3-3
3.2.4 Serial Port.................................................................................................................................................................. 3-4
3.2.5 PS/2 Mouse IRQ12 Se tting (JP5)............................................................................................................................... 3-5
3.2.8 Power Connector (J3).................................................................................................................................................3-6
3.2.10 External Power LED and Keyboard Lock Header (J4)................................................................................................ 3-7
3.2.11 CPU Setting............................................................................................................................................................... 3-7
4.2.1 Inverter Board De s cr i ption..........................................................................................................................................4-2
5.2.1 Serial Port’s Signals Connector (CN1)........................................................................................................................ 5-2
5.2.2 Serial Port (DB1 & DB2) ............................................................................................................................................. 5-2
5.4 SYSTEM INSTALL A TIO N..................................................................................................................................................5-5
5.5.2 FDD Port Connector (DB1)......................................................................................................................................... 5-8
5.5.3 FDD Port Connector (CN2).........................................................................................................................................5-8
5.5.4 3.5” Hard Disk (IDE) Connector (CN3)........................................................................................................................ 5-9
5.5.5 2.5” Hard Disk (IDE) Connector (CN4)...................................................................................................................... 5-10
5.5.6 Power Supply Connector (CN5)................................................................................................................................ 5-10
7.1 BIOS SETUP OVER VI EW.................................................................................................................................................. 7-1
7.2 STANDARD CMOS SETUP............................................................................................................................................... 7-2
7.6 AUTO-DETECT HARD DISKS........................................................................................................................................... 7-7
7.8.1 Auto Configura tio n with Optimal Setting......................................................................................................................7-8
7.8.2 Auto Configura tio n with Fail Safe Setting....................................................................................................................7-8
7.9.1 Save Settings and Exit ............................................................................................................................................... 7-8
7.9.2 Exit Without Saving.................................................................................................................................................... 7-9
10. INDEX ...............................................................................................................................................................10-1
Acrosser Technology makes no representations or warranties with respect to the contents hereof and specifically
disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Acrosser
Technology reserves the right to revise this publication and to make changes from time to time in the contents
hereof without obligation of Acrosser Technology to notify any person of such revisions or changes.
Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid
written license from Acrosser or an authorized sublicensor.
(C) Copyright Acrosser Technology Co., Ltd., 1999. All rights Reserved.
Acr oss er , A LI, AMI , C &T , IB M P C/ AT, W ind ows 3. 1, W ind ows 95, W indows NT, AMD, Cyrix, Intel…are reg is te red
trademarks.
All other trademarks and registered trademarks are the property of their respective holders.
This document was produced with Adobe Acrobat 3.01.
0.2 WELCOME TO THE ACE-9140
This guide introduces the Acrosser ACE-9140.
Use the information describes this system’s functions, features, and how to start, set up and operate your ACE-
9140. You also could find general system information here.
0.3 BEFORE YOU USE THIS GUIDE
If you have not already installed this ACE-9140, refer to the Chapter 5, “Installation” in this guide. Check the
packing list, make sure the accessories in the package.
The ACE-9140’s diskette provides the newest information about the card. Please refer to the README.DOC file of the enclosed utility diskette. It contains the modification and hardware & software information, and
adding the description or modification of product function after manual published.
0.4 RETURNING YOUR BOARD FOR SERVICE
If your board requires servicing, contact the dealer from whom you purchased the product for service information.
If you need to ship your board to us for service, be sure it is packed in a protective carton. We recommend that
you keep the original shipping container for this purpose.
You can help assure efficient servicing of your product by following these guidelines:
1. Include your name, address, telephone and facsimile number where you may be reached during the day.
2. A description of the system configuration and/or software at the time is malfunction.
3. A brief description is in the symptoms.
0.5 TECHNICAL SUPPORT AND USER COMMENTS
comments are always welcome as they assist us in improving the usefulness of our products and the
understanding of our publications. They form a very important part of the input used for product enhancement
and revision.
We may use and distribute any of the information you supply in any way we believe appropriate without incurring
any obligation. You may, of course, continue to use the information you supply.
If you have suggestions for improving particular sections or if you find any errors, please indicate the manual title
and book number.
Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative.
Internet electronic mail to: webmaster@acrosser.com
0-3
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ACE-9140 User’s Guide
0.6 ORGANIZATION
This information for users covers the following topics (see the Table of Contents for a detailed listing):
! Chapter 1, “Overview”, provides an overview of the system features and packing list.
! Chapter 2, “System Controller” describes the major structure.
! Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.
! Chapter 4, “CRT/LCD Flat Panel Display”, describes the configuration and installation procedure using
the LCD and CRT display.
! Chapter 5, “Installation”, describes how to combine the system.
! Chapter 6, “Utility Disks”, describes setup procedures including information on the utility diskette.
! Chapter 7, “BIOS Console”, providing the BIOS options setting.
! Chapter 8, Specifications
! Chapter 9, Placement & Dimensions
! Chapter 10, Index
0.7 STATIC ELECTRICITY PRECAUTIONS
Before removing the board from its anti-static bag, read this section about static electricity precautions.
Static electricity is a constant danger to computer systems. The charge that can build up in your body may be
more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic
precautions whenever you use or handle computer components. Although areas with humid climates are much
less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The
following measures should generally be sufficient to protect your equipment from static discharge:
• Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded
wrist strap).
• When unpacking and handling the board or other system component, place all materials on an antic static
surface.
• Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom
of every board.
0-4
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ACE-9140 User’s Guide
1. OVERVIEW
This chapter provides an overview of your system features and capabilities. The following topics are covered:
!
Introduction
!
Packing List
!
Features
1.1 INTRODUCTION
The ACE-9140 is including the AR-B9140, AR-B9438, AR-B9437 and AR-B9432, and the AR-B9140, AR-B9432
and AR-B9437 are mounted on one bracket. The main part of the ACE-9140 is AR-B9140, so the major of the
manual describes the AR-B9140’s functions. The ACE-9140’s combination describes in the Chapter “Installation”.
The AR-B9140 is a half size industrial grade CPU card that has been designed to withstand continuous operation
in harsh environments. The AR-B9140 supports on-board memory 8MB, and extends to 40MB DRAM for using
one 72-pin SIMM.
The 6 layers PCB CPU card is equipped with a IDE HDD interface, a floppy disk drive adapter, 1 parallel port, 2
serial ports and a watchdog timer. Its dimensions are as compact as 121.9mmX184.9mm. It highly condensed
features make it an ideal cost/performance solution for high-end commercial and industrial applications where CPU
speeding and mean time between failure is critical.
A watchdog timer has a software programmable time-out interval, is also provided on this CPU card. It ensures
that the system does not hang-up if a program can not execute normally.
The AR-B9140 is implemented with M1487 and M1489 chipset incorporate a memory controller, parity generation
and checking, two 8237 DMA controllers, two 8259 interrupt controllers, one 8254 timer/counter, an address buffer
and a data buffer.
A super I/O chip (SMC37C669) is embedded in the AR-B9140 card. It combines functions of a floppy disk drive
adapter, a hard disk drive (IDE) adapter, two serial (with 16C550 UART) adapters and 1 parallel adapter. The I/O
port configurations can be done by set the BIOS setup program.
As an UART, the chip supports serial to parallel conversion on data characters received from a peripheral device
or a MODEM, and parallel to serial conversion on data character received from the CPU. The UART includes a
programmable baud rate generator, complete MODEM control capability and a processor interrupt system. As a
parallel port, the SMC37C669 provides the user with a fully bi-directional parallel centronics-type printer interface.
1.2 PACKING LIST
The accessories are included with the system. Before you begin installing your ACE-9140 system, take a moment
to make sure that the following items have been included inside the ACE-9140 package.
!
The easily setting manual
!
1 AR-B9140 CPU card
!
1 AR-B9438 IDE/FDD transfer board
!
1 AR-B9437 serial port/PS/2 transfer board
!
1 AR-B9432 LVDS transfer board
!
1 40-pin hard disk drive interface cable for 25cm length
!
1 34-pin floppy disk drive interface cable for 25cm length
!
1 one bracket for mounting AR-B9140, AR-B9437 and AR-B9432
!
1 5-pin keyboard adapter
!
3 Software utility diskettes.
1-1
Page 8
ACE-9140 User’s Guide
1.3 FEATURES
The system provides a number of special features that enhance its reliability, ensure its availability, and improve its
expansion capabilities, as well as its hardware structure.
! All-In-One designed 486DX/DX2/DX4 CPU card.
! Supports 3.45V/5V CPU with voltage regulator.
! Supports ISA bus and PC/104 bus.
! Supports 512KB cache on board.
! Supports on-board 8MB and extends one 72-pin DRAM SIMM up to 40MB DRAM on board.
! Supports shadow memory and EMS.
! Supports D.O.C. up to 72MB.
! Legal AMI BIOS.
! IDE hard disk drive interface.
! Floppy disk drive interface.
! Bi-direction parallel interface.
! 2 serial ports with 16C550 UART.
! Programmable watchdog timer.
! On-board built-in buzzer.
! 6 layers PCB.
1-2
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ACE-9140 User’s Guide
2. SYSTEM CONTROLLER
This chapter describes the major structure of the AR-B9140 CPU board. The following topics are covered:
! DMA Controller
! Keyboard Controller
! Interrupt Controller
! Real-Time Clock and Non-Volatile RAM
! Timer
! Serial Port
! Parallel Port
2.1 DMA CONTROLLER
The equivalent of two 8237A DMA controllers are implemented in the AR-B9140 board. Each controller is a fourchannel DMA device that will generate the memory addresses and control signals necessary to transfer
information directly between a peripheral device and memory. This allows high speeding information t ransfer with less
CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for transfers to
8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides
the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.
Following is the system information of DMA channels:
The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives
serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data
in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the
system to poll its status register to determine when data is available.
Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.
Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The
keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be
sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full”
interruption may be used for both send and receive routines.
2-1
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ACE-9140 User’s Guide
2.3 INTERRUPT CONTROLLER
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B9140 board. They
accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the
CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service
routine to execute.
Following is the system information of interrupt levels:
InInterrupt Level
Description
NMI
CTRL1
IRQ 0
IRQ 1
Parity check
CTRL2
System timer interrupt from timer 8254
Keyboard output buffer full
IRQ 2
IRQ8 : Real time clock
IRQ9 : Rerouting to INT 0Ah from hardware IRQ2
IRQ10 : spare
IRQ11 : spare
IRQ12 : spare (PS/2 mouse)
IRQ13 : Math. coprocessor
IRQ14 : Hard disk adapter
IRQ15 : spare (Watchdog Timer)
IRQ 3
IRQ 4
IRQ 5
IRQ 6
IRQ 7
Serial port 2
Serial port 1
Parallel port 2
Floppy disk adapter
Parallel port 1
Figure 2-1 Interrupt Controller
2-2
Page 11
2.3.1 I/O Port Address Map
Hex Range Device
000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 ALI M1489/M1487 and C & T F65545
040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-maskable interrupt (NMI)
076 Watchdog
080-09F DMA page registers
0A0-0A1 Interrupt controller 2
0C0-0DF DMA controller 2
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Fixed disk 1
1F0-1F8 Fixed disk 0
201 Game port
208-20A EMS register 0
218-21A EMS register 1
278-27F Parallel printer port 2 (LPT 2)
2E8-2EF Serial port 4 (COM 4)
2F8-2FF Serial port 2 (COM 2)
300-31F Prototype card/streaming type adapter
320-33F LAN adapter
378-37F Parallel printer port 1 (LPT 1)
380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 3 (LPT 3)
3C0-3CF EGA/VGA adapter
3D0-3DF Color/graphics monitor adapter
3E8-3EF Serial port 3 (COM 3)
3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM 1)
Table 2-2 I/O Port Address Map
ACE-9140 User’s Guide
2.3.2 I/O Channel Pin Assignment (Bus1)
I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output
The AR-B9140 contains a real-time clock compartment that maintains the date and time in addition to storing
configuration information about the computer system. It contains 14 bytes of clock and control registers and 114
bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be
maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM
are listed as follows:
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS
Table 2-5 Real-Time Clock & Non-Volatile RAM
2.5 TIMER
The AR-B9140 provides three programmable timers, each with a timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.
Application programs can load different counts into this timer to generate various sound frequencies.
2-5
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ACE-9140 User’s Guide
2.6 SERIAL PORT
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial
format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of
transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one,
one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and
produce a 16x clock for driving the internal transmitter logic.
Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed
MODEM control capability, and a processor interrupt system that may be software tailored to the computing time
required handle the communications link.
The following table is summary of each ACE accessible register
0 base + 1 Interrupt enable
X base + 2 Interrupt identification (read only)
X base + 3 Line control
X base + 4 MODEM control
X base + 5 Line status
X base + 6 MODEM status
X base + 7 Scratched register
1 base + 0 Divisor latch (least significant byte)
1 base + 1 Divisor latch (most significant byte)
Table 2-6 ACE Accessible Registers
(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
(3) Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(4) Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
2-6
Page 15
(5) Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
WLS1 WLS0 Word Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
(6) MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(7) Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
ACE-9140 User’s Guide
2-7
Page 16
ACE-9140 User’s Guide
(9) Divisor Latch (LS, MS)
LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
Table 2-7 Serial Port Divisor Latch
Desired Baud Rate Divisor Used to Generate 16x Clock
base + 0 Write Output data
base + 0 Read Input data
base + 1 Read Printer status buffer
base + 2 Write Printer control latch
Table 2-8 Registers’ Address
(2) Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel
data at standard TTL level.
(3) Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading
the Data Swapper address.
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ACE-9140 User’s Guide
(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit
definitions are described as follows:
12345670
XXX
-ERROR
SLCT
PE
-ACK
-BUSY
Figure 2-2 Printer Status Buffer
NOTE: X presents not used.
Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the
print head is changing position or in an error state. When Bit 7 is active, the printer is busy and can not
accept data.
Bit 6: This bit represents the current state of the printer’s ACK signal. A 0 means the printer has received the
character and is ready to accept another. Normally, this signal will be active for approximately 5
microseconds before receiving a BUSY message stops.
Bit 5: A 1 means the printer has detected the end of the paper.
Bit 4: A 1 means the printer is selected.
Bit 3: A 0 means the printer has encountered an error condition.
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ACE-9140 User’s Guide
(5) Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the address of printer
control swapper. Bit definitions are as follows:
XX
Figure 2-3 Bit’s Definition
NOTE: X presents not used.
Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven
from external sources to be read; when logic 0, they work as a printer port. This bit is write only.
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low state to high state.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50 microseconds pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present
for a minimum of 0.5 microseconds before and after the strobe pulse.
12345670
STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
2-10
Page 19
ACE-9140 User’s Guide
3. SETTING UP THE SYSTEM
This section describes pin assignments for system’s external connectors and the jumpers setting.
! Overview
! System Setting
3.1 OVERVIEW
The AR-B9140 is a half size industrial grade CPU card that has been designed to withstand continuous operation
in harsh environments. This section provides hardware’s jumpers setting, the connectors’ locations, and the pin
assignment.
JP5
JP6
3
1
U28
U25
[DOC]
U27
H7
H9
H5
81
120
BUS1
31
50
80
121
51
CN1
U32
U17
+5V
+3V
1
100
41
160
P2P1
81
40
1
JP1
CN5
JP2
17
CN7
16
15
H8
14
13
105
12
11
BUS2
DB1
104
U2
80486
10
9
JP9
U6
8
7
4
1
6
3
5
2
DB2
CN6
JP7JP8
1
S
U36
JP4
R
Q
P
N
M
12
L
K
J
H
G
F
E
U13U14U15U16
D
C
B
A
U37
CN4
SW1
J5
J7
SIM1
J2
J4
JP3
J1
H11
H4
1
H10
J6
J3
5
3
1
Figure 3-1 AR-B9140 External System Location
3-1
Page 20
ACE-9140 User’s Guide
3.2 SYSTEM SETTING
Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.
(A j u mp er bl oc k i s a sm al l pl as ti c- en ca se d c on du c to r [ sh or ti ng pl ug ] t h at s li p s o ve r t he pi ns . ) To change a jumper
setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the
jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not
to bend the pins.
We will show the locations of the AR-B9140 jumper pins, and the factory-default setting.
CAUTION: Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap
or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can
permanently damage electronic components.
3.2.1 50-Pin SCIS Connector (CN1)
A 50-pin SCIS connector (CN1) is provided the interface to connect with AR-B9438’s CN1. Let user easily
connected the hard disk device.
292827
26
30
876543218
1
393837363534333231
40
1716151413121110921
47464544434241
49
48 50
20
22
19
252423
Figure 3-2 CN1: 50-Pin SCIS Connector
Pin Signal Pin Signal Pin Signal Pin Signal
1 -RESET 2 DATA 7 26 GROUND 27 DATA 8
3 DATA 6 4 DATA 5 28 DATA 9 29 DATA 10
5 DATA 4 6 DATA 3 30 DATA 11 31 DATA 12
7 DATA 2 8 DATA 1 32 DATA 13 33 DATA 14
9 DATA 0 10 GROUND 34 DATA 15 35 NOT USED
11 NOT USED 12 -IOW 36 GROUND 37 GROUND
13 -IOR 14 -IORDY 38 GROUND 39 NOT USED
15 NOT USED 16 IRQ 14 40 GROUND 41 -IO16
17 SA 1 18 SA 0 42 NOT USED 43 SA 2
19 -CS 0 20 -HD LED 44 -CS 1 45 GROUND
21 VCC 22 GROUND 46 VCC 47 NOT USED
23 VCC 24 +12V 48 +12V 49 +12V
25 +12V 50 GROUND
Table 3-1 HDD Pin Assignment
3-2
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ACE-9140 User’s Guide
3.2.2 FDD Port Connector (DB1)
The AR-B9140 provides a 15-pin header type connector for connecting with AR-B9438’s DB1. Let user easily
connected the floppy disk device.
15 14 13 12 11
109876
5432
Figure 3-3 DB1: FDD Port connector
Pin Signal Pin Signal Pin Signal
1 DRVEN 0 6 -MOTOR
2 -DRIVE SELECT 0 7 -STEP OUTPUT
3 -WRITE DATA 8 -TRACK 0 13 -WRITE GATE
4 -WRITE PROTECT 9 -DRIVE SELECT 1 14 -READ DATA
5 GROUND 10 GROUND 15 DISK CHANGE
Table 3-2 FDD Pin Assignment
1
ENABLE 0
PULSE
11 -INDEX
12 DIRECTION
3.2.3 Parallel Port Connector (CN5)
To use the parallel port, an adapter cable has to be connected to the CN5 (26-pin header type) connector. The
connector for the parallel port is a 25-pin D-type female connector.
2
1
Parallel Port Connector
14
1
D-Type Connector
Figure 3-4 CN5: Parallel Port Connector
CN5 DB-25 Signal CN5 DB-25 Signal
1 1 -Strobe 2 14 -Aut o F o r m F eed
3 2 Data 0 4 15 -Error
5 3 Data 1 6 16 -Initialize
7 4 Data 2 8 17 -Printer Select In
9 5 Data 3 10 18 Ground
11 6 Data 4 12 19 Ground
13 7 Data 5 14 20 Ground
15 8 Data 6 16 21 Ground
17 9 Data 7 18 22 Ground
19 10 -Acknowledge 20 23 Ground
21 11 Busy 22 24 Ground
23 12 Paper 24 25 Ground
25 13 Printer Select 26 -- Ground
Table 3-3 Parallel Port Pin Assignment
25
13
3-3
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ACE-9140 User’s Guide
3.2.4 Serial Port
(1) External RS-485 Adapter Select (JP7 & JP8)
JP7 and JP8 can be set independently. JP7 selects COM-A port, and JP8 selects COM-B port. All the signals of
JP7 & JP8 connect to CN6, and CN6 connects CN1 of AR-B9437. JP7 selects COM A port to use DB1 of ARB9437 for connecting external RS-485. JP8 selects COM B port to use DB2 of AR-B9437 for connecting external
RS-485.
(A) COM-A RS-485 Adapter Select (JP7)
1
2
3
Reserved for Acrosser's
RS-485 Adapter Used Only
1
2
RS-232C
Factory-Default Setting
3
Figure 3-5 JP7: COM-A RS-485 Adapter Select
(B) COM-B RS-485 Adapter Select (JP8)
1
2
Reserved for Acrosser's
RS-485 Adapter Used Only
3
1
2
RS-232C
Factory-Default Setting
3
Figure 3-6 JP8: COM-B RS-485 Adapter Select
(2) RS-232 3-pin Connector (J6)
J6 is onboard RS-232 header, J6’s pin assignments are as follows:
1 RXD
2 TXD
3 GND
3-4
J6 (COM B)
Figure 3-7 J6: RS-232 3-Pin Connector
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ACE-9140 User’s Guide
(3) Serial Port’s Signals Connec tor (CN6)
The AR-B9140 provides a 44-pin connector fo r connecting with AR-B9437’s CN1. Let user easily connected the
Serial port and PS/2 mouse.
9 Not Used 10 Not Used
11 Not Used 12 MSDATA
13 KBCG 14 KBCG
15 VSS 16 VSS
17 VKB2 18 VKB2
19 Not Used 20 MSCLK
21 -DCD1F 22 -DSR1F
23 RXD1F 24 -RTS1F
25 TXD1F 26 -CTS1F
27 -DTR1V 28 -RI1F
29 GND1 30 COM1G
31 -DCD2F 32 -DSR2F
33 RXD2F 34 -RTS2F
35 TXD2F 36 -CTS2F
37 -DTR2V 38 -RI2F
39 GND2 40 COM2G
41 Not Used 42 Not Used
43 GND 44 GND
Table 3-1 LCD Display Assignment
1
2
3.2.5 PS/2 Mouse IRQ12 Setting (JP5)
The default of <Enabled> allows the system detecting a PS/2 mouse on boot. If detected, IRQ12 will be used for
the PS/2 mouse. IRQ12 will be reserved for expansion cards and therefore the PS/2 mouse will not function.
JP5
12
Enable
Factory Preset
Figure 3-9 JP5: PS/2 Mouse IRQ12 Setting
CAUTION: After adjusting the JP5 correctly, the user must set the <PS/2 Mouse Support> option to Enabled in the
BIOS <Advanced CMOS Setup> Menu. Then the PS/2 mouse can be used.
JP5
12
Disable
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ACE-9140 User’s Guide
3.2.6 Keyboard Connector (CN4 & J5)
(1) Keyboard Connector (CN4)
CN4 is a Mini-DIN 6-pin connector. This keyboard connector is a PS/2 type keyboard connector. This connector is
also for a standard IBM-compatible keyboard with the keyboard adapter cable.
1 DATA
1
2 Not Used
3 GND
4 VCC
5 CLOCK
3
5
6 Not Used
Figure 3-10 CN4: Keyboard Connector
(2) AUX. Keyboard Connector (J5)
J5 provides another way of connecting a keyboard to J2 of the AR-B9432. Active the AR-B9432’s keyboard
function.
J5
12345
Figure 3-11 J5: AUX. Keyboard Connector
2
4
6
CN4 (Front View)
1 CLOCK
2 DATA
3 Not Used
4 GND
5 VCC
3.2.7 External Speaker Header (J2)
Besides the onboard buzzer, you can use an external speaker by connecting to the J2 header.
4 Speaker3 Speaker2 Speaker1 Speaker+
Figure 3-12 J2: External Speaker Header
3.2.8 Power Connector (J3)
J3 is an 8-pin power connector. You can directly connect the power supply to the on-board power connector for
stand-alone applications.
J1 is used to connect to an external reset switch. Shorting these two pins will reset the system.
1 Reset+
2 GND
12
Figure 3-14 J1: Reset Header
3.2.10 External Power LED and Keyboard Lock Header (J4)
5 Ground
4 Keyboard Lock3 Ground
2 Not Used
1 Power LED-
Figure 3-15 J4: External Power LED and Keyboard Lock Header
3.2.11 CPU Setting
The AR-B9140 accepts many types of microprocessors such as Intel/AMD/Cyrix 486DX/DX2/DX4. All of these
CPUs include an integer processing unit, floating-point processing unit, memory-management unit, and cache.
They can give a two to ten-fold performance improvement in speed over the 386 processor, depending on the
clock speeds used and specific application. Like the 386 processor, the 486 processor includes both segmentbased and page-based memory protection schemes. The instruction of processing time is reduced by on-chip
instruction pipelining. By performing fast, on-chip memory management and caching, the 486 processor relaxes
requirements for memory response for a given level of system performance.
(1) CPU Logic Core Voltage Select (P1 & P2)
P2
3
2
1
3.45V -- Factory Default Setting
Figure 3-16 P1 & P2: CPU Logic Core Voltage
(2) AMD 3X/4X CPU Select (J P2)
P1
6
5
34
12
P2
3
2
1
6
5V
P1
5
34
12
2
JP2
AMD 4X
1
JP2
AMD 3X
Factory Default Setting
Figure 3-17 JP2: AMD 3X/4X CPU Select
2
1
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ACE-9140 User’s Guide
(3) PCI Clock Select (JP4)
JP4
6
PCICLK=CPUCLK
Factory Default Setting
Figure 3-18 JP4: PCI Clock Select
(4) CPU Clock Multiplier Select (JP3)
PIN 1-2 PIN 3-4 PIN 5-6 Base Clock Note
Close Close Close 50MHz
Close Close Open 40MHz
Close Open Close 33.3MHz factory setting
Close Open Open 25MHz
Open Close Close 20MHz
Open Close Open 16MHz
Open Open Close 12MHz
Open Open Open 8MHz
Table 3-2 JP3: CPU Clock Multiplier Select
(5) CPU Cooling Fan Power Connector (J7)
JP4
5
34
12
PCICLK=1/2CPUCLK
56
34
12
JP3
56
34
12
2 GND
1 +12V
Figure 3-19 J7: CPU Cooling Fan Power Connector
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ACE-9140 User’s Guide
3.2.12 Memory Setting
(1) DRAM Configuration
There are two 32-bit memory banks on the AR-B9140 board. It can be one-side or double-side SIMM (Single-Line
Memory Modules) which is designed to accommodate 256KX36 bit to 16MX36-bit SIMMs. This provides the user
with up to 64MB of main memory. The 32-bit SIMM (without parity bit) also can be used on AR-B9140 board.
There are listing on-board memory configurations available. Please refer to the following table for details:
The AR-B9140 can be configured to provide a write-back or write-through cache scheme and support 512KB
cache systems. A write-back cache system may provide better performance than a write-through cache system.
The BIOS Setup program allows you to set the cache scheme either write-back or write-through, either the internal
cache selection.
The DiskOnChip is a new generation of high performance single-chip Flash Disk. It provides a Flash Disk in a
standard 32-pin DIP package.
This unique data storage solution offers a better, faster, and more cost-effective Flash Disk for Single Board
embedded systems. The DiskOnChip provides a Flash Disk that does not require any bus, slot or connector.
Simply insert the DiskOnChip into 32-pin socket U25 position on the CPU board. It is the optimal solution for single
board computers, it is a small, fully functional, easy to integrate, plug-and-play Flash Disk with a very low power
consumption.
The DiskOnChip is fully tested and formatted before the product is shipped.
(1) DiskOnChip Hardware Installation
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Step 8:
(2) DiskOnChip Memory Address Setting (JP6)
Make sure the target platform is powered OFF
Plug the DiskOnChip device into the U25 socket. Verify the direction is correct (pin 1 of the DiskOnChip
is aligned with pin 1 of the U25 socket)
Power up the system
During power up you may observe the messages displayed by the DiskOnChip when its drivers are
automatically loaded into system’s memory
At this stage the DiskOnChip can be accessed as any disk in the system
If the DiskOnChip is the only disk in the system, it will appear as the first disk (drive C: in DOS)
If there are more disks besides the DiskOnChip, it will appear by default as the last drive, unless it was
programmed as first drive.
If you want the DiskOnChip to be bootable, copy the operating system files into the DiskOnChip by
The DiskOnChip fully supports the BOOT capability. In order for the DiskOnChip to be bootable, it should be DOS
formatted as bootable, like any floppy or hard disk that required to be booted.
SYS D:
Change the disk into bootable (assuming the DiskOnChip is disk D)
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ACE-9140 User’s Guide
4. CRT/LCD FLAT PANEL DISPLAY
This section describes the configuration and installation procedure using LCD and CRT display.
The AR-B9140 support CRT color monitors. AR-B9140 used onboard VGA chipset and supported 1MB on-board
VRAM. For different VGA display modes, your monitor must possess certain characteristics to display the mode
you want.
To connect to a CRT monitor, an adapter cable has to be connected to the DB2 connector. DB2 is used to
connect with a VGA monitor when you are using the on-board VGA controller as a display adapter. Pin assignments
for the DB2 connector are as follows:
DB2 (CRT Connector)
1 Red
2 Green
12 13 14
789
610
12345
1511
3 Blue
13 Horizontial Sync
14 Vertical Sync
4, 9, 11, 12, & 15 Not used
5 & 10 Ground
6, 7 & 8 AGND
Figure 4-1 DB2: CRT Connector
4.2 LCD FLAT PANEL DISPLAY
This section describes the configuration and installation procedure for a LCD display. Skip this section if you are
using a CRT monitor only.
Use the Flash memory Writer utility to download the new BIOS file into the ROM chip to configure the BIOS default
settings for different types of LCD panels. Next, set your system properly and configure the AR-B9140 VGA
module for the right type of LCD panel you are using.
The following shows the block diagram of the system when using the ACE-9140 with a LCD display.
LCD
ACE-9140
VBL Control
+12V, +5V
VEE
Panel
Inverter
Board
Figure 4-2 LCD Panel Block Diagram
FL HIGH
Voltage
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ACE-9140 User’s Guide
The block diagram shows that the AR-B9140 still needs components to use with a LCD panel. The inverter board
provides the control for the brightness and the contrast of the LCD panel. The inverter is also the components that
supply the high voltage to drive the LCD panel. Each item will be explained further in the section.
NOTE: Be careful with the pin orientation when installing connectors and the cables. A wrong connection can easily
destroy your LCD panel. Pin 1 of the cable connector is indicated with a sticker and pin1 of the ribbon
cable is usually has a different color.
4.2.1 Inverter Board Description
The inverter board supplies high voltage signals to drive the LCD panel by converting the 12 volt signal from the
AR-B9140 into a high voltage AC signal for LCD panel. It can be installed freely on the space provided over the
VR board. If the VR board is installed on the bracket, you have to provide a place to install the inverter board into
your system.
4.2.2 LCD Connector
(1) DE/E Signal from M or LP Select (JP9)
3
2
1
3
2
1
E/LPDE/M
Factory Preset
Figure 4-3 JP9: DE/E Signal from M or LP
(2) LCD Panel Display Connector (CN7)
The AR-B9140 provides a 44-pin connector for connec ting with AR-B9432’s CN1. Let user easily connected the LCD.
At present, this VGA card can provide a solution with an inverter board for the following list of standard LCD
panels. Consult your Acrosser representative for new developments. When using other models of standard LCD
panels in the market.
CAUTION: 1. If you want to connect the LCD panel, you must update the AR-B9140’s BIOS, then you can setup
the corrected BIOS. Please contact Acrosser for the latest BIOS update.
2. If user needs to update the BIOS version or connect other LCD, please contact the sales department.
The detail supported LCDs are listed in the Acrosser Web site, user can download the suitable BIOS.
The address is as follows:
http:\\www.acrosser.com
4-3
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ACE-9140 User’s Guide
5. INSTALLATION
This chapter describes how to composite the ACE-9140 system. The following topics are covered:
This chapter provides information for you to set up a working system based on the ACE-9140 system. Please read
the details of the AR-B9140 CPU board’s hardware descriptions before installation carefully, especially jumpers’
setting, switch settings and cable connections. Also the AR-B9437’s and AR-B9432’s jumpers’ setting and
connectors’ signals. In the last section will describe the AR-B9438’s hardware.
5.2 AR-B9437
The AR-B9437 is one serial port’s card that provides two serial ports, one PS/2 mouse connector, and three LEDs.
CN1 connects the CN6 of the AR-B9140 that transfers the signals to the AR-B9437.
LED3
LED2
LED1
H4
DB2
H1
DB1
CN1
Figure 5-1 AR-B9437 External System Location
CN2
BZ1
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ACE-9140 User’s Guide
5.2.1 Serial Port’s Signals Connector (CN1)
The AR-B9437 provides a 44-pin connector fo r connecting with AR-B9140’s CN6. Let user easily connected the
Serial port and PS/2 mouse.
9 Not Used 10 Not Used
11 Not Used 12 MSDATA
13 KBCG 14 KBCG
15 VSS 16 VSS
17 VKB2 18 VKB2
19 Not Used 20 MSCLK
21 -DCD1F 22 -DSR1F
23 RXD1F 24 -RTS1F
25 TXD1F 26 -CTS1F
27 -DTR1V 28 -RI1F
29 GND1 30 COM1G
31 -DCD2F 32 -DSR2F
33 RXD2F 34 -RTS2F
35 TXD2F 36 -CTS2F
37 -DTR2V 38 -RI2F
39 GND2 40 COM2G
41 Not Used 42 Not Used
43 GND 44 GND
Table 5-1 LCD Display Assignment
1
2
5.2.2 Serial Port (DB1 & DB2)
54321
54321
DB2 (COM B)
DB1 (COM A)
6987
1-DCD
2 RXD
6987
3 TXD
4-DTR
5 GND
Figure 5-3 DB1 & DB2: Serial Port
6-DSR
7-RTS
8-CTS
9-RI
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ACE-9140 User’s Guide
5.2.3 PS/2 Mouse Connector (CN2)
To use the PS/2 interface, an adapter cable has to be connected to the CN2 connector. The connector for the PS/2
mouse is a Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows:
N.C.
GND
VCC
N.C.
1
2
3
4
5
6
DATA
CLOCK
Figure 5-4 CN2: PS/2 Mouse Connector
1
2
3
5
4
6
CN2
6 Pin Mini-DIN
5.3 AR-B9432
The AR-B9432 is one transfer board that provides one touch screen header, one keyboard header and one power
supply connector. CN1 connects the CN7 of the AR-B9140 that transfers the signals to the AR-B9432.
H2
F1J1L2
U1
CN1
CN2
F2
F3
J2
L4
J3
Figure 5-5 AR-B9432 External System Location
5.3.1 Transfer board’s Signals Connector (CN1)
The AR-B9432 provides a 44-pin connector fo r connecting with AR-B9140’s CN7. Let user easily connected the
LVDS board.
CN1
Ground 1
Ground 3
FLM 5
P0 7
P2 9
P4 11
Ground 13
P7 15
P12 2122 P13
P14 23
P16 25
Ground 27
P19 29
P21 31
P23 33
VCC 35
+12V 37
Ground 39
DE 41
Ground 43
Figure 5-6 CN1: Transfer Board’s Signals Connector
1 GROUND
2 VCC
3 VCC
4 GROUND
5 GROUND
6 VSS
7 Not Used
8 Not Used
Figure 5-8 J1: Power Supply Connector
5.3.4 Keyboard Header (J2)
The AR-B9432 provides a 25-pin connector fo r connecting with AR-B9433’s CN3. Let user easily connected the
LVDS board.
J2 is the keyboard signal transfer to CPU card or backplane keyboard 5-pin header
1 TXKBC
2 TXKBD
3 Not Used
4 GROUND
5 VCC
Figure 5-9 J2: Keyboard Header
5.3.5 Touch Screen Connector (J3)
J3 is the header that connects to the 9-PIN serial port of the CPU card for the touch screen.
1 TXRXD
2 TXTXD
3 GROUND
Figure 5-10 J3: Touch Screen Connector
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ACE-9140 User’s Guide
5.4 SYSTEM INSTALLATION
There is a figure display how to use the cables connect the ACE9140, please notice the pin1 position. Be careful
not to bend the pins.
50-Pin SCIS Connector
D-sub 15-Pin Cable
44-Pin 2.0 IDE cable
AR-B9438
AR-B9437
CN1
CN1
DB1
DB1
CN1
5-Pin JST header
J5
CN6
CN7
AR-B9140
44-Pin IDE 2.0 Cable
D-sub 25-Pin
J2
CN1 CN2
Male-to-
Female Cable
AR-B9433
CN3
AR-B9432
Figure 5-11 ACE-9140 Connecting
5-5
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ACE-9140 User’s Guide
The AR-B9140, AR-B9432, and AR-B9437 are mounted one bracket as the following figure:
Figure 5-12 ACE-9140 Composition
User can connect the peripheral devices with the ACE-9140 according the bracket marks.
5-6
Figure 5-13 ACE-9140 Composition
Page 39
ACE-9140 User’s Guide
5.5 AR-B9438
The AR-B9438 is one IDE card that provides one 3.5” HDD connector, one 2.5” HDD connector, one FDD
connector and one power supply connector. CN1 connects the CN1 of the AR-B9140 that transfers the signals to
the AR-B9438 that provides IDE’s signals. DB1 connects the DB1 of the AR-B9140 that transfers the FDD’s
signals to the AR-B9438.
H1
H2
CN1
DB1
CN4
CN3
CN5
H3
Figure 5-14 AR-B9438 External System Location
CN2
H4
5.5.1 50-Pin SCIS Connector (CN1)
A 50-pin SCIS connector (CN1) is provided the interface to connect with AR-B9140’s CN1. Let user easily
connected the hard disk device.
292827
26
30
876543218
1
393837363534333231
40
1716151413121110921
47464544434241
49
48 50
20
22
19
252423
Figure 5-15 CN1: 50-Pin SCIS Connector
Pin Signal Pin Signal Pin Signal Pin Signal
1 -RESET 2 DATA 7 26 GROUND 27 DATA 8
3 DATA 6 4 DATA 5 28 DATA 9 29 DATA 10
5 DATA 4 6 DATA 3 30 DATA 11 31 DATA 12
7 DATA 2 8 DATA 1 32 DATA 13 33 DATA 14
9 DATA 0 10 GROUND 34 DATA 15 35 NOT USED
11 NOT USED 12 -IOW A 36 GROUND 37 GROUND
13 -IOR A 14 -CHRDY A 38 GROUND 39 NOT USED
15 NOT USED 16 -IRQ A 40 GROUND 41 -IO16
17 SA 1 18 SA 0 42 NOT USED 43 SA 2
19 CS 0 20 HD LED A 44 CS 1 45 GROUND
21 VCC 22 GROUND 46 VCC 47 NOT USED
23 VCC 24 +12V 48 +12V 49 +12V
25 +12V 50 GROUND
Table 5-1 50-Pin SCIS Connector Pin Assignment
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ACE-9140 User’s Guide
5.5.2 FDD Port Connector (DB1)
The AR-B9438 provides a 15-pin header type connector for connecting with AR-B9140’s DB1. Let user easily
connected the floppy disk device.
1514131211
109876
1
Figure 5-16 DB1: FDD Port connector
Pin Signal Pin Signal Pin Signal
1 DRVEN 0 6 -MOTOR
2 -DRIVE SELECT 0 7 -STEP OUTPUT
3 -WRITE DATA 8 -TRACK 0 13 -WRITE GATE
4 -WRITE PROTECT 9 -DRIVE SELECT 1 14 -READ DATA
5 GROUND 10 GROUND 15 DISK CHANGE
Table 5-2 FDD Pin Assignment
5432
ENABLE 0
PULSE
11 -INDEX
12 DIRECTION
5.5.3 FDD Port Connector (CN2)
The AR-B9438 provides a 34-pin header type connector for supporting up to two floppy disk drives.
To enable or disable the floppy disk controller, please use the BIOS Setup program.
2
1
Figure 5-17 CN2: FDD Port connector
Pin Signal Pin Signal
1-33(odd) GROUND 18 -DIRECTION
2 DRVEN 0 20 -STEP OUTPUT PULSE
4 NOT USED 2 2 -WRITE DATA
6 DRVEN 1 24 -WRITE GATE
A 40-pin header type connector (CN1) is provided to interface with up to two embedded hard disk drives (IDE AT
bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion.
To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates
the pin assignments of the hard disk drive’s 40-pin connector.
39
40
Figure 5-18 CN3: 3.5” Hard Disk (IDE) Connector
Pin Signal Pin Signal
1 -RESET 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 NOT USED
21 NC 22 GROUND
23 -IOW A 24 GROUND
25 -IOR A 26 GROUND
27 -CHRDY A 28 NOT USED
29 NC 30 GROUND
31 -IRQ A 32 -IO16
33 SA 1 34 NOT USED
35 SA 0 36 SA 2
37 CS 0 38 CS 1
39 HD LED A 40 GROUND
Table 5-1 3.5” HDD Pin Assignment
1
2
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ACE-9140 User’s Guide
5.5.5 2.5” Hard Disk (IDE) Connector (CN4)
A 44-pin header type connector (CN5) is provided to interface with up to two embedded hard disk drives (IDE AT
bus). This interface, through a 44-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion.
To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates
the pin assignments of the hard disk drive’s 44-pin connector.
43
44
Figure 5-19 CN4: 2.5” Hard Disk (IDE) Connector
Pin Signal Pin Signal
1 -RESET 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 NOT USED
21 NC 22 GROUND
23 -IOW A 24 GROUND
25 -IOR A 26 GROUND
27 -CHRDY A 28 NOT USED
29 NC 30 GROUND
31 -IRQ A 32 -IO16
33 SA 1 34 NOT USED
35 SA 0 36 SA 2
37 CS 0 38 CS 1
39 HD LED A 40 GROUND
41 VCC 42 VCC
43 GROUND 44 GROUND
Table 5-1 2.5” HDD Pin Assignment
1
2
5.5.6 Power Supply Connector (CN5)
CN5
Figure 5-20 CN5: Power Supply connector
5-10
1 +12V
2 GROUND
3 GROUND
1234
4 VCC
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ACE-9140 User’s Guide
6. UTILITY DISKS
This chapter describes the procedure of the utility diskette installation. The following topics are covered:
! Overview
! Utility Diskette
! Watchdog Timer
6.1 OVERVIEW
This chapter provides information for you to set up a working system based on the AR-B9140 CPU board. Please
read the details of the CPU board’s hardware descriptions before installation carefully, especially jumpers’ setting,
switch settings and cable connections.
Follow steps listed below for proper installation:
Step 1 :
Step 2 :
Step 3 :
Step 4 :
Step 5 :
Step 6 :
Step 7 :
Step 8 :
Step 9 :
Step 10:
Step 11:
Step 12:
Read the CPU card’s hardware description in this manual.
Install any DRAM SIMM onto the CPU card. (or user can skip this step because that the AR-B9140
embedded on-board DRAM)
Set jumpers.
Make sure that the power supply connected to your passive CPU board backplane is turned off.
Plug the CPU card into a free AT-bus slot or PICMG slot on the backplane and secure it in place with
a screw to the system chassis.
Connect all necessary cables. Make sure that the FDC, HDC, serial and parallel cables are
connected to pin 1 of the related connector.
Connect the hard disk/floppy disk flat cables from the CPU card to the drives. Connect a power
source to each drive.
Plug the keyboard into the keyboard connector.
Turn on the power.
Configure your system with the BIOS Setup program then re-boot your sy stem.
If the CPU card does not work, turn off the power and read the hardware description carefully again.
If the CPU card still does not perform properly, return the card to your dealer for immediate service.
6.2 UTILITY DISKETTE
AR-B9140 provides two VGA driver diskettes, support WIN31, WIN95, WINNT 4.0 & OS/2. If your operating
system is the other operating system, please attach Acrosser that will provide the technical supporting for the VGA
resolution.
There are two diskettes: disk 1 is for WIN31, WIN95 & WINNT4.0 VGA resolution, disk 2 is for OS/2 VGA
resolution. While user extracted the compressed files there is the README.* file in each sub-directories. Please
refer to the file of README for any troubleshooting before install the driver.
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ACE-9140 User’s Guide
6.2.1 VGA Driver
(1) WIN 3.1 Driver
For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Step 8:
Step 9:
Step 10:
Step 11:
Step 12:
Make the new created directory to put the VGA drivers.
C:\>MD VGAW31
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D54XW31P.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
Change directory to the new created directory, and extract the compress file.
C:\>CD VGAW31
C:\VGAW31>PKUNZIP -d D54XW31P.ZIP
And then re-name the SET545P.SCP file as SETUP5XX.SCP. Acrosser recommends the method
as:
C:\VGAW31>COPY SET545P.SCP SETUP5XX.SCP
In the DOS mode execute the SETUP.EXE file.
C:\VGAW31>SETUP
The screen shows the chip type, and presses any key enter the main menu.
CHIPS 655XX - PCI Display Drivers
Preliminary Version 3.3.0
There are some items for choice to setup. Please choose the <W indows Version 3.1> item, notice
the function key defined. Press [ENTER] selected the <All Resolutions>, when this line appears [*]
symbol, that means this item is selected. Press [End] starts to install.
The screen will show the dialog box to demand user typing the WIN31’s path. The default is
C:\WINDOWS.
Follow the setup steps’ messages execute. As completed the setup procedure will generate the
message as follow.
Installation is done!
Change to your Windows directory and type SETUP to run the Windows Setup program. Choose
one of the new drivers marked by an *. Please refer to the User’s Guide to complete the installation.
Presses [Esc] return the main menu, and re-press [Esc] return to the DOS mode.
In the WIN31, you can find the <Chips CPL> icon located in the {CONTROL PANEL} group.
Adjust the <Refresh Rate>, <Cursor Animation>, <Font size>, <Resolution>, and <Big Cursor>.
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(2) WIN 95 Driver
For the WIN95 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Make the new created directory to put the VGA drivers.
C:\>MD VGAW95
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D55XW 95.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
C:\>COPY A:\D55XW95.ZIP C:\VGAW95
C:\>COPY A:\PKUNZIP.EXE C:\VGAW95
Change directory to the new created directory, and extract the compress file.
C:\>CD VGAW95
C:\VGAW95>PKUNZIP -d D55XW95.ZIP
Enter the WIN95 operation system, please choose the <SETTING> item of the <DISPLAY> icon in
the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source
files’ path.
C:\VGAW95
And then you can find the <Chips and Tech 65545 PCI (new)> item, select it and click the <OK>
button.
Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other functions. Please refer to
the messages during installation.
(3) WINNT 4.0 Driver
For the WINNT4.0 operating system, user must in the DOS mode decompress the compress file. And then as to
the steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Make the new created directory to put the VGA drivers.
C:\>MD VGANT40
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D5XXNT4.ZIP,
and the PK U N Z IP.E X E p r o gram— , in th e n ew cr e a t e d d i r e c t ory.
C:\>COPY A:\D5XXNT4.ZIP C:\VGANT40
C:\>COPY A:\PKUNZIP.EXE C:\VGANT40
Change directory to the new created directory, and extract the compress file.
C:\>CD VGANT40
C:\VGANT40>PKUNZIP -d D5XXNT4.ZIP
Enter the WINNT4.0 operation system, please choose the <SETTING> item of the <DISPLAY> icon
in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source
files’ path.
C:\VGANT40
And then you can find the <Chips and Tech 65545 PCI (new)> item, select it and click the <OK>
button.
Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other function. Please refer to
the messages during installation.
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(4) OS/2 Warp Driver
The following steps must be performed before you install the 65545/65548 display’s driver:
CAUTION:
1. OS/2 DOS Support must be installed.
2. If you previously installed SVGA support, you must do the following:
a) Close all DOS Full Screen and WIN-OS2 sessions.
b) Reset the system to VGA mode. VGA is the default video mode enabled when OS/2 is installed. To
restore VGA mode, use Selective Install and select VGA for Primary Display. For more information on
this procedure, see the section on Changing Display Adapter Support in the OS/2 Users Guide.
To install this driver, do the following steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Open an OS/2 full screen or windowed session.
Place the 65545/65548 PCI Display Driver Diskette in drive A. (DISK #2)
Because the diskette enclosed the compress file, to extract file had to as the steps.
In the OS/2-DOS mode, make the VGA directory for decompress the driver.
C:\>MD VGAOS2
C:\>CD VGAOS2
C:\VGAOS2>COPY A:\*.*
C:\VGAOS2>PKUNZIP -d D54XOS2P.ZIP
At the OS/2 command prompt, type the following commands to copy the files to the OS/2 drive:
C:\VGAOS2> SETUP C:\VGAOS2 C: <ENTER>
When the Setup Program is completed, you will need to perform a shutdown and then restart the
system in order for changes to take effect.
Please refer to the README.TXT file, there is detail description, user had to according to the
installation step by step. When install completed, user can adjust the VGA resolution in the
SYSTEM icon <SCREEN> item of the <SYSTEM SETUP>.
6.2.2 BIOS FLASH Utility
The main function of AMIFLASH.COM supports BIOS update. The AR-B9140 can provide FLASH BIOS update
function for you to easily upgrade newer BIOS version. Please contact Acrosser engineer to support the
modification of the BIOS.
1. Use the AMIFLASH.COM program to update the BIOS setting function.
2. And then refer to the section “BIOS Console”, as the steps to modify BIOS.
3. Now the CPU board’s BIOS is the newest, user can use this program to modify BIOS function in the future,
when the BIOS adding some function.
4. The file of AMIFLASH.EXE doesn’t attach in the utility diskette. If user needs to update the BIOS version for
some reasons please contact the technical supporting engineers, and notices the file of AMIFLASH.EXE has
to use the Version 6.31.
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6.3 WATCHDOG TIMER
This section describes how to use the Watchdog Timer, disabled, enabled, and trigger.
The AR-B9140 is equipped with a programmable time-out period watchdog timer. User can use the program to
enable the watchdog timer. Once you have enabled the watchdog timer, the program should trigger it every time
before it times out. If your program fails to trigger or disable this timer before it times out because of system hangup, it will generate a reset signal to reset the system. The time-out period can be programmed to be 3 to 42
seconds.
Enable (D7)
Time Factor (D0-D2)
Watchdog
Register
Write and Trigger
Time Base
Counter
and
Compartor
Watchdog
LED
Figure 6-1 Watchdog Block Diagram
RESET
6.3.1 Watchdog Timer Setting
The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups.
Whenever the watchdog timer is enabled, the LED will blink to indicate that the timer is counting. The watchdog
timer is automatically disabled after reset.
Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it
times-out. After you trigger the wa tchdog timer, it will be set to zero and start to count again. If your program fails
to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the system or trigger the IRQ15
signal to tell your program that the watchdog is times out.
The factor of the watchdog timer time-out constant is approximately 6 seconds. The period for the watchdog timer
time-out period is between 1 to 7 timer factors.
If you want to reset your system when watchdog times out, the following table listed the relation of timer factors
between time-out period.
If you want to generate IRQ15 signal to warn your program when watchdog times out, the following table listed the
relation of timer factors between time-out period. And if you use the IRQ15 signal to warn your program when
watchdog timer out, please enter the BIOS Setup the <Peripheral Setup> menu, the <OnBoard PCI IDE> and <IDE
Prefetch> these two items must set to Primary.
NOTE: 1. If you program the watchdog to generate IRQ15 signal when it times out, you should initial IRQ15
interrupt vector and enable the second interrupt controller (8259 PIC) in order to enable CPU to process
this interrupt. An interrupt service routine is required too.
2. Before you initial the interrupt vector of IRQ15 and enable the PIC, please enable the watchdog timer
previously, otherwise the watchdog timer will generate an interrupt at the time watchdog timer is enabled.
6.3.2 Watchdog Timer Enabled
To enable the watchdog timer, you have to output a byte of timer factor to the watchdog register whose address is
76H. The following is a BASICA program which demonstrates how to enable the watchdog timer and set the timeout period at 24 seconds.
1000 REM Points to command register
1010 WD_REG% = 76H
1020 REM Timer factor = 84H (or 0C4H)
1030 TIMER_FACTOR% = %H84
1040 REM Output factor to watchdog register
1050 OUT WD_REG%, TIMER_FACTOR%
.,etc.
6.3.3 Watchdog Timer Trigger
After you enable the watchdog timer, your program must write the same factor as enabling to the watchdog register
at least once every time-out period to its previous setting. You can change the time-out period by writing another
timer factor to the watchdog register at any time, and you must trigger the watchdog before the new time-out period
in next trigger. Below is a BASICA program which demonstrates how to trigger the watchdog timer:
2000 REM Points to command register
2010 WD_REG% = 76H
2020 REM Timer factor = 84H (or 0C4H)
2030 TIMER_FACTOR% = &H84
2040 REM Output factor to watchdog register
2050 OUT WD_REG%, TIMER_FACTOR%
.,etc.
6.3.4 Watchdog Timer Disabled
To disable the watchdog timer, simply write a 00H to the watchdog register.
3000 REM Points to command register
3010 WD_REG% = 76H
3020 REM Timer factor = 0
3030 TIMER_FACTOR% = 0
3040 REM Output factor to watchdog register
3050 OUT WD_REG%, TIMER_FACTOR%
., etc.
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7.BIOS CONSOLE
This chapter describes the AR-B9140 BIOS menu displays and explains how to perform common tasks needed to
get up and running, and presents detailed explanations of the elements found in each of the BIOS menus. The
following topics are covered:
BIOS is a program used to initialize and set up the I/O system of the computer, which includes the ISA bus and
connected devices such as the video display, diskette drive, and the keyboard.
The BIOS provides a menu-based interface to the console subsystem. The console subsystem contains special
software, called firmware that interacts directly with the hardware components and facilitates interaction between
the system hardware and the operating system.
The BIOS Default Values ensure that the system will function at its normal capability. In the worst situation the
user may have corrupted the original settings set by the manufacturer.
After the computer turned on, the BIOS will perform a diagnostics of the system and display the size of the
memory that is being tested. Press the [Del] key to enter the BIOS Setup program, and then the main menu will
show on the screen.
The BIOS Setup main menu includes some options. Use the [Up/Down] arrow key to highlight the option that you
wish to modify, and then press the [Enter] key to assure the option and configure the functions.
AMIBIOS HIFLEX SETUP UTILITY - VERSION 1.16
(C) 1996 American Megatrends, Inc. All Rights Reserved
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Peripheral Setup
Auto-Detect Hard Disks
Change User Password
Change Supervisor Password
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Exit Without Saving
Standard CMOS setup for changing time, date, hard disk type, etc.
ESC:Exit ↑↓:Sel F2/F3 Color F10:SAVE &Exit
Figure 7-1 BIOS: Setup Main Menu
CAUTION: 1. AR-B9140 BIOS the factory-default setting is used to the <Auto Configuration with Optimal
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Settings>Acrosser recommends using the BIOS default setting, unless you are very familiar with the
setting function, or you can contact the technical support engineer.
2. If the BIOS loss setting, the CMOS will detect the <Auto Configuration with Fail Safe Settings> tboot
the operation system, this option will reduce the performance of the system. Acrosser recommends
choosing the <Auto Configuration with Optimal Setting> in the main menu. The option is best-case
values that should optimize system performance.
3. The BIOS settings are described in detail in this section..AR-B9140
-
7.2 STANDARD CMOS SETUP
The <Standard CMOS Setup> option allows you to record some basic system hardware configuration and set the
system clock and error handling. If the CPU board is already installed in a working system, you will not need to
select this option anymore.
AMIBIOS SETUP - STANDARD CMOS SETUP
(C) 1996 American Megatrends, In c. All Rights Reserved
Date (mm/dd/yyyy): Sat Jun 05,1998 640KB
Time (hh/mm/ss): 13:13:00 63MB
Floppy Drive A: Not Installed
Floppy Drive B: Not Installed
Pri Master : Auto Off Off Auto Off
Pri Slave : Auto Off Off Auto Off
Boot Sector Virus P rot ection Disabled
LBA Blk PIO 32Bit
Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode
Month: Jan - Dec ESC:Exit ↑↓:Sel
Day: 01 - 31 PgUp/PgDn:Modify
Year: 1901 - 2099 F2/F3:Color
Figure 7-2 BIOS: Standard CMOS Setup
Date & Time Setup
Highlight the <Date> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the month, day and year format.
Highlight the <Time> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the hour, minute and second format.
The user can bypass the date and time prompts by creating an AUTOEXEC.BAT file. For information on how to
create this file, please refer to the MS-DOS manual.
Floppy Setup
The <Standard CMOS Setup> option records the types of floppy disk drives installed in the system.
To enter the configuration value for a particular drive, highlight its corresponding field and then select the drive type
using the left-or right-arrow key.
Hard Disk Setup
The BIOS supports various types for user settings, The BIOS supports <Pri Master> and <Pri Slave> so the user
can install up to two hard disks. For the master and slave jumpers, please refer to the hard disk’ s installation
descriptions and the hard disk jumper settings.
You can select <AUTO> under the <TYPE> and <MODE> fields. This will enable auto detection of your IDE drives
during bootup. This will allow you to change your hard drives (with the power off) and then power on without having
to reconfigure your hard drive type. If you use older hard disk drives which do not support this feature, then you
must configure the hard disk drive in the standard method as described above by the <USER> option
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.
Boot Sector Virus Protection
This option protects the boot sector and partition table of your hard disk against accidental modifications. Any
attempt to write to them will cause the system to halt and display a warning message. If this occurs, you can either
allow the operation to continue or use a bootable virus-free floppy disk to reboot and investigate your system. The
default setting is <Disabled>. This setting is recommended because it conflicts with new operating systems.
Installation of new operating system requires that you disable this to prevent write errors.
7.3ADVANCED CMOS SETUP
The <Advanced CMOS SETUP> option consists of configuration entries that allow you to improve your system
performance, or let you set up some system features according to your preference. Some entries here are
required by the CPU board’s design to remained in their default settings.
Quick Boot Enabled
1 st Boot Device Floppy
2nd Boot Device IDE-0
3rd Boot Device CDROM
4th Boot Device Disabled
Boot From Card BIOS Yes
Try Other Boot Devices Yes
Floppy Access Control Read-write
Hard Disk Access Control Read-write
S.M.A.R.T. for Hard Disks Enabled
BootUp Num-Lock On
Floppy Drive Swap Disabled
Floppy Drive Seek Disabled
PS/2 Mouse Support Enabled
Typematic Rate Fast
System Keyboard Absent
Primary Display VGA/EGA
Password Check Setup
Boot To OS/2>64MB No
Wait For ‘F1’ If Error Disabled
Hit ‘DEL’ Message Displ ay Enabled
L1 Cache Write Back
L2 Cache Write Back
System BIOS Cac heabl e Enabled
C000, 16k Shadow Enabled
C400, 16k Shadow Enabled
C800, 16k Shadow Disabled
CC00, 16k Shadow Disabled
D000, 16k Shadow Disabled
D400, 16k Shadow Disabled
D800, 16k Shadow Disabled
DC00, 16k Shadow Disabled
AMIBIOS SETUP - ADVANCED CMOS SETUP
(C) 1998 American Megatrends, In c. All Rights Reserved
These options determine where the system looks first for an operating system.
Quick Boot
This category speeds up Power On Self Test (POST) after you power on the computer. If it is set to Enabled,
BIOS will shorten or skip some check items during POST.
BootUp Num-Lock
This item is used to activate the Num-Lock function upon system boot. If the setting is on, after a boot, the NumLock light is lit, and user can use the number key.
Floppy Drive Swap
The option reverses the drive letter assignments of your floppy disk drives in the Swap A, B setting, otherwise
leave on the setting of Disabled (No Swap). This works separately from the BIOS Features floppy disk swap
feature. It is functionally the same as physically interchanging the connectors of the floppy disk drives. When
<Enabled>, the BIOS swapped floppy drive assignments so that Drive A becomes Drive B, and Drive B becomes
Drive A under DOS.
Floppy Drive Seek
If the <Floppy Drive Seek> item is setting Enabled, the BIOS will seek the floppy <A> drive one time upon bootup.
PS/2 Mouse Support
The setting of Enabled allows the system to detect a PS/2 mouse on bootup. If detected, IRQ12 will be used for
the PS/2 mouse. IRQ 12 will be reserved for expansion cards if a PS/2 mouse is not detected. Disabled will
reserve IRQ12 for expansion cards and therefore the PS/2 mouse will not function.
Typematic Rate
This item specifies the speed at which a keyboard keystroke is repeated.
System Keyboard
This function specifies that a keyboard is attached to the computer.
Primary Display
The option is used to set the type of video display card installed in the system.
Password Check
This option enables password checking every time the computer is powered on or every time the BIOS Setup is
executed. If Always is chosen, a user password prompt appears every time the computer is turned on. If Setup is
chosen, the password prompt appears if the BIOS executed.
Boot to OS/2, > 64MB
When using the OS/2 operating system with installed DRAM of greater than 64MB, you need to Enabled this
option otherwise leave this on the setup default of Disabled
Wait for ‘F1’ If Error
AMIBIOS POST error messages are followed by:
Press <F1> to continue
If this option is set to Disabled, the AMIBIOS does not wait for you to press the <F1> key after an error message.
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Hit ‘DEL’ Message Display
Set this option to Disabled to prevent the message as follows:
Hit ‘DEL’ if you want to run setup
It will prevent the message from appearing on the first BIOS screen when the computer boots.
Internal Cache
This option specifies the caching algorithm used for L1 internal cache memory. The settings are:
SettingDescription
Disabled
WriteBack Use the write-back caching algorithm.
WriteThru Use the write-through caching algorithm.
External Cache
This option specifies the caching algorithm used for L2 secondary (external) cache memory. The settings are:
SettingDescription
Disabled
WriteBack Use the write-back caching algorithm.
WriteThru Use the write-through caching algorithm.
System BIOS Cacheable
When this option is set to Enabled, the contents of the F0000h system memory segment can be read from or
written to L2 secondary cache memory. The contents of the F0000h memory segment are always copied from the
BIOS ROM to system RAM for faster execution.
The settings are Enabled or Disabled. The Optimal default setting is Enabled. The Fail-Safe default setting is
Disabled.
Shadow
These options control the location of the contents of the 32KB of ROM beginning at the specified memory location.
If no adapter ROM is using the named ROM area, this area is made available to the local bus. The settings are:
SETTINGDESCRIPTION
Disabled
Enabled
Cached
The video ROM is not copied to RAM. The contents ofthe video ROM
cannot be read from or written to cachememory.
The contents of C000h - C7FFFh are written to the same address in system
memory (RAM) for faster execution.
The contents of the named ROM area are written to the same address in
system memory (RAM) for fasterexecution, if an adapter ROM will be using
the named ROM area. Also, the contents of the RAM area can be
read from and written to cache memory.
Neither L1 internal cache memory on the CPU or
secondary cache memory is enabled.
Table7-1 Internal Cache Setting
Neither L1 internal cache memory on the CPU or
secondary cache memory is enabled.
Table7-2 External Cache Setting
Table7-3 Shadow Setting.
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7.4 ADVANCED CHIPSET SETUP
This option controls the configuration of the board’ s chipset. Control keys for this screen are the same as for the
previous screen.
AMIBIOS SETUP - ADVANCED CHIPSET SETUP
(C) 1996 American Megatrends, In c. All Rights Reserved
Auto Config Function Enable
AT Bus Clock CLK/4
DRAM Read Timing Normal
DRAM Write Timing Normal
DRAM Parity Check Disable
DRAM Refresh Period Setting 60us
Memory Hole At 15-16M Disable
ISA I/O Recovery Disable
ISA I/O Revovery time 1.5us
Available Options :
Disabled
Enabled
ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F2/F3:Color
Figure 7-4 BIOS: Advanced Chipset Setup
Automatic Configuration
If selecting a certain setting for one BIOS Setup option determines the settings for one or more other BIOS Setup
options, the BIOS automatically assigns the dependent settings and does not permit the end user to modify these
settings unless the setting for the parent option is changed. Invalid options are grayed and cannot be selected.
AT Bus Clock
This option sets the polling clock speed of ISA Bus (PC/104).
NOTE: 1. PCLK means the CPU inputs clock.
2. Acrosser recommends user setting at the range of 8MHz to 10MHz.
Memory Parity Check
This option Enables or Disables parity is error checking for all system RAM. This option must be Disabled if the
used DRAM SIMMs are 32-bit but not 36-bit devices.
Memory Hole at 15-16 M
This option specifies the range 15MB to 16MB in memory that cannot be addressed on the ISA bus.
ISA I/O Recovery
ISA I/O Recovery Time
These options specify the length of the delay (in BUSCLK) inserted between consecutive 8-bit/16-bit I/O
operations.
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7.5 PERIPHERAL SETUP
This section is used to configure peripheral features.
AMIBIOS SETUP - PERIPHERAL SETUP
(C) 1996 American Megatrends, In c. All Rights Reserved
ACE-9140 User’s Guide
OnBoard FDC Enabl e
OnBoard Serial Port1 3F8
OnBoard Serial Port1 IRQ 4
OnBoard Serial Port2 2F8
OnBoard Serial Port2 IRQ 3
OnBoard Parallel Port 378
Parallel Port Mode Normal
EPP Version N/A
Parallel Port IRQ 7
Parallel Port DMA Channel N/A
Onboard PCI IDE Both
Available Options :
Auto
Disabled
Enabled
ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F2/F3:Color
Figure7-5 BIOS: Peripheral Setup
OnBoard FDC
This option enables the floppy drive controller on the AR-B9140.
OnBoard Serial Port
This option enables the serial port on the AR-B9140.
OnBoard Parallel Port
This option enables the parallel port on the AR-B9140.
Parallel Port Mode
This option specifies the parallel port mode. ECP and EPP are both bidirectional data transfer schemes that
adhere to the IEEE P1284 specifications.
Parallel Port DMA Channel
This option is only available if the setting for the parallel Port Mode option is ECP.
OnBoard PCI IDE/IDE Prefetch
This option specifies the onboard IDE controller channels that will be used.
7.6 AUTO-DETECT HARD DISKS
This option detects the parameters of an IDE hard disk drive, and automatically enters them into the Standard
CMOS Setup screen..
7.7 PASSWORD SETTING
This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a
password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor
password or a User password.
7.7.1 Setting Password
Select the appropriate password icon (Supervisor or User) from the Security section of the BIOS Setup main menu.
Enter the password and press [Enter]. The screen does not display the characters entered. After the new
password is entered, retype the new password as prompted and press [Enter].
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If the password confirmation is incorrect, an error message appears. If the new password is entered without error,
press [Esc] to return to the BIOS Main Menu. The password is stored in CMOS RAM after BIOS completes. The
next time the system boots, you are prompted for the password function is present and is enabled.
Enter new supervisor password:
7.7.2 Password Checking
The password check option is enabled in Advanced Setup by choosing either Always (the password prompt
appears every time the system is powered on) or Setup (the password prompt appears only when BIOS is run).
The password is stored in CMOS RAM. User can enter a password by typing on the keyboard. As user select
Supervisor or User. The BIOS prompts for a password, user must set the Supervisor password before user can
set the User password. Enter 1-6 character as password. The password does not appear on the screen when
typed. Make sure you write it down.
7.8 LOAD DEFAULT SETTING
In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items
to quickly set system configuration parameters, you can choose a group of settings that have a better chance of
working when the system is having configuration related problems.
7.8.1 Auto Configuration with Optimal Setting
User can load the optimal default settings for the BIOS. The Optimal default settings are best-case values that
should optimize system performance. If CMOS RAM is corrupted, the optimal settings are loaded automatically.
Load high performance settings (Y/N) ?
7.8.2 Auto Configuration with Fail Safe Setting
User can load the Fail-Safe BIOS Setup option settings by selecting the Fail-Safe item from the Default section of
the BIOS Setup main menu.
The Fail-Safe settings provide far from optimal system performance, but are the most stable settings. Use this
option as a diagnostic aid if the system is behaving erratically.
Load failsafe settings (Y/N) ?
7.9 BIOS EXIT
This section is used to exit the BIOS main menu in two types situation. After making your changes, you can either
save them or exit the BIOS menu and without saving the new values.
7.9.1 Save Settings and Exit
This item set in the <Standard CMOS Setup>, <Advanced CMOS Setup>, <Advanced Chipset Setup> and the new
password (if it has been changed) will be stored in the CMOS. The CMOS checksum is calculated and written into
the CMOS.
As you select this function, the following message will appear at the center of the screen to assist you to save data
to CMOS and Exit the Setup.
Save current settings and exit (Y/N) ?
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7.9.2 Exit Without Saving
When you select this option, the following message will appear at the center of the screen to help to Abandon all
Data and Exit Setup.
Quit without saving (Y/N) ?
7.10 BIOS UPDATE
The BIOS program instructions are contained within computer chips called FLASH ROMs that are located on your
system board. The chips can be electronically reprogrammed, allowing you to upgrade your BIOS firmware
without removing and installing chips.
The AR-B9140 provides FLASH BIOS update function for you to easily upgrade newer BIOS version. Please
follow the operating steps for updating new BIOS:
Step 1: Turn on your system and don’ t detect the CONFIG.SYS and AUTOEXEC.BAT files. Keep your
system in the real mode.
Step 2: Insert the FLASH BIOS diskette into the floppy disk drive.
Step 3: In the MS-DOS mode, you can type the AMIFLASH program.
A:\>AMIFLASH
Step 4: The screen will show the message as follow:
Enter the BIOS File name from which Flash EPROM will be programmed. The File name must and
with a <ENTER> or press <ESC> to exit.
Step 5: And then please enter the file name to the box of <Enter File Name>. And the box of <Message>
will show the notice as follow. In the bottom of this window always show the gray statement.
Flash EPROM Programming is going to start. System will not be usable until Programming of Flash
EPROM is successfully complete. In case of any error, existing Flash EPROM must be replaced by
new program Flash EPROM.
Step 6: As the gray statement, press the <Y> key to updating the new BIOS.
And then the <Message> box will show the <Programming Flash EPROM>, and the gray statement
shows <Please Wait>.
Step 7: The BIOS update is successful, the message will show <Flash Update Completed - Pass>.
NOTE: 1. After turn on the computer and the system didn’ t detect the boot procedure, please press the [F5] key
immediately. The system will pass the CONFIG.SYS and AUTOEXEC.BAT files.
2. The BIOS Flash disk is not the standard accessory. Now the onboard BIOS is the newest BIOS, if user
needs adding some functions in the future please contact technical supporting engineers, they will provide
the newest BIOS for updating.
3. The file of AMIFLASH.EXE doesn’ t attach in the utility diskette. If user needs to update the BIOS version
for some reasons please contact the technical supporting engineers, and notices the file of
Serial Port:
Keyboard:
Watchdog:
Speaker:
Real Time Clock:
BIOS:
Flash Disk:
BUS Drive Cap.:
CE Design-In:
Power Req.:
PC Board:
Dimensions:
Supports25 to 133 Mhz Intel / AMD / Cyrix / ST / IBM /TI 486 CP U.
ALI M1489/M1487 and C & T 65545
ISA (PC/AT) bus
Supports FPM/EDO RAM, 40MB maximum (8MB on-board and one 72-pin SIMMs w/o DRAM)
512KB for standard
1 MB VRAM (PCI bus, 1024X768/256 colors)
One PCI IDE Supports LBA/Block mode access
Supports two 5.25” or 3.5” floppy disk drives
1 bi-directional centronics type parallel port
PC/AT compatible keyboard and PS/2 mouse compatible
Programmable watchdog timer 3 to 42 seconds time interval
Supports adapter board buzzer and external speaker
BQ3287MT or compatible chips with 128 bytes data RAM
AMI Flash BIOS (128KB, including VGA BIOS)
Supports 1 DiskOnChip socket
15 TTL level loads maximum
Add EMI components to COM ports, parallel port, CRT, keyboard, and PS/2 mouse
+5V only, 2.0A maximum (base on Intel DX4-100)
6 layers, EMI considered
Half size, 184.9 mmX121.9mm (7.28”X4.80”)
CN1 Hard disk (IDE) signals connector 5-7
CN2 FDD port connector 5-8
CN3 3.5” hard disk (IDE) connector 5-9
CN4 2.5” hard disk (IDE) connector 5-10
CN5 Power supply connector 5-10
DB1 FDD port’s signals connector 5-8
10-2
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