For the purpose of improving reliability, design and function, the information in this document is
subject to change without prior notice and does not represent a commitment on the part of the
manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental, or
consequential damages arising out of the use or inability to use the product or documentation, even
if advised of the possibility of such damages.
This document contains proprietary information protected by copyright. All rights are reserved.
No part of this Manual may be reproduced by any mechanical, electronic, or other means in any
form without prior written permission of the manufacturer.
Trademarks
AR-B8172 is a registered trademarks of Acrosser; IBM PC is a registered trademark of the
International Business Machines Corporation; Pentium is a registered trademark of Intel
Technologies Inc; Award is a registered trademark of Award Software International Inc; other
product names mentioned herein are used for identification purposes only and may be trademarks
and/or registered trademarks of their respective companies.
GPIO: 16 bits. Use GPIO_P0 & GPIO_P1 with interrupt support (input / output). Group to 2x
pin header connectors (GPIO1, GPIO2).
RTC / Watchdog: Software programmable from 1~256 seconds.
6
1.2 Package Contents
Check if the following items are included in the package.
Quick Manual
AR-B8172
1 x Software Utility CD
AR-B8172 User Manual
7
1.3 Block Diagram
AR-B8172 User Manual
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AR-B8172 User Manual
2
H/W INFORMATION
This chapter describes the installation of AR-B8172. At first, it shows the function diagram and
the layout of AR-B8172. It then describes the unpacking information which you should understand,
as well as the jumper/switch settings for the AR-B8172 configuration
2.1 Locations (Top side)
FDD1
FLOPPY CONNECTOR
IDE1
44PIN IDE CONNECTOR
BA T1
BATTERY for RTC/SRAM
U2, U3
System DDR2 RAM 128MBX2
U1
CPU Vortex DX 800MHz
U14
SRAM 512KB
U13
CPLD(SRAM Controller)
LPT1
PRINTER PORT
BZ1
BUZZER
VGA1
VGA DB15 CONNECTOR
U19
VGA SPI FLASH 512KB
U17
GPU XGI z9s
LAN1
Ethernet 10/100
U18
GPU DDR2 64MB
9
COM1
RS232 DB9 CONNECTOR
CN5/CN6
PC104 CONNECTOR
KM1 (KB_MS1)
Keyboard/Mouse CONNECTOR
ISA1
ISA BUS
2.2 Connectors and Jumper Setting
A
2.2.1 Locations (Top side)
AR-B8172 User Manual
LED1/LED2
System/HDD Status LED (On board)
LED3/LED4
System/HDD Status LED Connector
JP1
RS-232/422/485 Selection
with RS-485 termination resistor
COM2
RS-232 Connector
CN7
RS-422/485 Connector
(Signal shared from COM2)
CN3
Reserved
RST_BTN1
System Reset Button
PWR1
AT Power Input
SW4
SRAM Address Selection Switch
CN1
USB 0/1 Connector
CN2
USB 2/3 Connector
CN4
Buzzer Connector (from BZ1)
JP2
Clear CMOS data
ATX1
TX Power Supply Connector
ATX_BTN1
ATX Power-ON Button
GPIO1
GPIO 0/1
Connector
10
2.2.2 Locations (Bottom Side)
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2.3 Connector and Jumper Setting Table
AR-B8172 User Manual
2.1 LED1/LED2 (On-board)
On-board Power/IDE (CF) status LED.
FUNCTION
LED1
( Green)
LED2
(Yellow)
POWER LED
IDE/CF LED
2.3 JP1
COM2 RS-232/42/485 selection and RS-485
termination resistor.
JUMPEUNCTR FION
2.2 LED3/LED4
Power/IDE (CF) status LED external 2.54mm
1×2PIN connector.
2F4h L L H H
2C0h L H L L
2C4h L H L H
2D0h L H H L
2D4h L H H H
2E0h H L L L
2E4h H L H L
3. RAM is 512KB with 32 banks, each bank is 16KB size.
※ Others mode not descript on the above tables are reserved.
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AR-B8172 User Manual
NOTE1:
COM2 RS-232 signals is shared with RS-422/485 (connector is CN7). RS-485 supports
10 nodes with two 120ohm termination resisters:
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AR-B8172 User Manual
3
This chapter describes the BIOS menu displays and explains how to perform common tasks
needed to get the system up. It also gives detailed explanation of the elements found in each of the
BIOS menus. The following topics are covered:
This part shows the auto-detected CPU specification. DM&P Semiconductor is the
Vortex86SX 32-Bit Microprocessor, DDR2 128MB onboard, which is based on x86 structure. It is
the x86 SoC (System on Chip) with 0.13 micron process and ultra low power consumption design
(less than 1 watt)The CPU on the Vortex86SX is a high performance and fully static 32-bit X86
processor with the compatibility of Windows based, Linux and most popular 32-bit RTOS.
3.1.3 System Memory
This part shows the auto-detected system memory. The Vortex86DX is a high performance
with 256MB RAM and speed 133MHz onboard and fully static 32-bit x86 processor, which is
compatible with DOS and Linux. It integrates 32KB write through direct map L1 cache, PCI Rev.
2.1 32-bit bus interface at 33 MHz, SDRAM, DDR2, ROM controller, IPC (Internal Peripheral
Controllers with DMA and interrupt timer/counter included), Fast Ethernet MAC, FIFO UART,
USB2.0 Host and IDE controller into a System-on-Chip (SoC) design. The Vortex86DX are all
256MB onboard and the speed is 133MHz.
3.1.4 System Time:
The time format is based on the 24-hour military time clock. Press the “+” or “–“ key to
increment the setting or type the desired value into the field.
3.1.5 System Date:
Press the “+” or ” –“ to set the date you wanted. The BIOS determines the day of the week
from the other date information; this field is for information only.
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3.2 Advanced Setup
AR-B8172 User Manual
3.2.1 IDE Configuration
OnBoard PCI IDE Controller
This can select the specification you wanted for the IDE device. This option specifies the channel
used by IDE controller on the motherboard,
Option Description
Disabled
Primary
Secondary
Both
Primary IDE Master/Slave
When you entered the IDE devices, the bios will auto-detected and show the detail information of
IDE devices. If you want to change IDE configuration, select the item and press the “Enter” to
configure the item you wanted.
Set this value to prevent the computer system from using the onboard IDE controller.
Set this value to allow the computer system to detect only the Primary IDE channel.
This includes both the Primary Master and the Primary Slave.
Set this value to allow the computer system to detect only the Secondary IDE channel.
This includes both the Secondary Master and the Secondary Slave.
Set this value to allow the computer system to detect the Primary and Secondary IDE
channels.
This includes the Primary Master, Primary Slave, Secondary Master, and Secondary
Slave. This is the default setting.
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AR-B8172 User Manual
3.2.3 SuperIO Configuration
You can use this screen to select options for the Super I/O settings. Use the up and down
<Arrow> keys to select an item. Use the <Plus> and <Minus> keys to change the value of the
selected option. The settings are described on the following pages. The screen is shown below.
Onboard Floppy Controller
This item specifies the Floppy used by the onboard Floppy controller. The settings are Disabled or
Enabled.
Floppy Drive Swap
This option allows you to Enabled or Disabled the Floppy Drive Swap.
3.2.4 USB Configuration
USB Functions
Set this value to allow the system to enable or disable the onboard USB ports. The Optimal and
Fail-Safe default setting is Enabled.
Option Description
Disabled
Enabled
Legacy USB Support
Legacy USB Support refers to the USB mouse and USB keyboard support. Normally if this option
is not enabled, any attached USB mouse or USB keyboard will not become available until a USB
compatible operating system is fully booted with all USB drivers loaded. When this option is
enabled, any attached USB mouse or USB keyboard can control the system even when there is no
USB drivers loaded on the system. Set this value to enable or disable the Legacy USB Support.
The Optimal and Fail-Safe default setting is Disabled.
Option Description
Disabled
Enabled
This setting makes the onboard USB ports unavailable.
This setting allows the use of the USB PORTS. This is the default setting.
Set this value to prevent the use of any USB device in DOS or during system
boot. This is the default setting.
Set this value to allow the use of USB devices during boot and while using DOS.
Auto
This option auto detects USB Keyboards or Mice and if found, allows them to be
utilized during boot and while using DOS.
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3.3 PCIPnP
3.3.1 Clear NVRAM
Clear NVRAM during system boot.
AR-B8172 User Manual
3.3.2 PCI Latency Timer
Allow you to select the value in units of PCI clocks for all of the PCI device latency timer
register. Configuration option: 32, 64, 96, 128, 160, 192, 224, 248.
Option Description
32
64
96
128
160
192
224
248
Set this value to allow the PCI Latency Timer to be adjusted. This option sets the latency of all
PCI devices on the PCI bus This decides how long a PCI device can hog the PCI bus for , higher
setting , hogs the bus a little longer , lower setting lets go quicker but stuff like some sound card
(PCI of course) will start to crackle , default on this board was default at 64.
This option sets the PCI latency to 32 PCI clock cycles.
This option sets the PCI latency to 64 PCI clock cycles. This is the default setting.
This option sets the PCI latency to 96 PCI clock cycles.
This option sets the PCI latency to 128 PCI clock cycles.
This option sets the PCI latency to 160 PCI clock cycles.
This option sets the PCI latency to 192 PCI clock cycles.
This option sets the PCI latency to 224 PCI clock cycles.
This option sets the PCI latency to 248 PCI clock cycles.
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IRQ
This item can select the IRQ with Available or Reserved. And the default of IRQ3, 4 are Reserved
and others are Available. When you set available, the specified IRQ is to be used by a PCI/PnP
device; as you set reserved, the IRQ will reserved for legacy ISA devices.
Interrupt Option Description
IRQ3
IRQ4
IRQ5
Available
IRQ6
This setting allows the specified IRQ to be used by a PCI/PnP
device. This is the default setting.
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
Reserved
This setting allows the specified IRQ to be used by a legacy ISA
device.
IRQ13
IRQ14
IRQ15
DMA Channel
This item can select the DMA Channel for Available or Reserved. When set to Available the
specified DMA is available for used by PCI/PnP devices; when set to reserved, the specified DMA
to be used by a legacy ISA device.
This setting allows the specified DMA to be used by PCI/PnP
device. It
is
default setting.
DMA Channel 5
DMA Channel 6
Reserved
This setting allows the specified DMA to be used by a legacy ISA
device.
DMA Channel 7
Reserved Memory Size
Set this value to allow the system to reserve memory that is used by ISA devices. The optimal and
Fail-Safe default setting is Disabled.
Option Description
Disabled
16K
32K
64K
Set this value to prevent BIOS from reserving memory to ISA devices.
Set this value to allow the system to reserve 16K of the system memory to the ISA devices.
Set this value to allow the system to reserve 32K of the system memory to the ISA devices.
Set this value to allow the system to reserve 64K of the system memory to the ISA devices.
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3.4 Boot
The Boot menu items allow you to change the system boot options. Select an item then press
Enter to display the sub-menu.
3.4.1 Boot Settings Configuration
Allow you to configure the system boot setting with bellow submenus.
Quick Boot
Set the
to decrease the time needed to boot the system. When you set the value to Disable the BIOS will
performs all the POST items.
Option Description
Disabled
Enabled
PS/2 Mouse Support
Set this value to allow the PS/2 mouse support to be adjusted. The Optimal and Fail-Safe default
setting is Enabled.
Option Description
value to Enable to allow the BIOS to skip some Power On Self Tests (POST) while booting
Set this value to allow BIOS to perform all POST tests.
Set this value to allow BIOS to skip certain POST tests to boot faster.
Disabled
Enabled
This option will prevent the PS/2 mouse port from using system resources and will
prevent the port from being active. Use this setting if installing a serial mouse.
Set this value to allow the system to use a PS/2 mouse. This is the default setting.
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Hit “DEL” Massage Display
Set this value to allow the Hit “DEL” to enter Setup Message Display to be modified. The Optimal
and Fail-Safe default setting is Enabled.
Option Description
Disabled
Enabled
This prevents the export to display Hit Del to enter Setup during memory initialization. If
Quiet Boot is enabled, the Hit 'DEL' message will not display.
This allows the export to display Hit Del to enter Setup during memory initialization.
This is the default setting.
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3.5 Security
The Security menu items allow you to change the system security settings. Select an item then
press Enter to display the configuration options.
Supervisor Password
Indicate whether a supervisor password has been set. If the password has been installed,
Installed displays. If not, Not Installed displays.
Change Supervisor Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to
change the supervisor password. Select Change Supervisor Password from the Security Setup
menu and press <Enter>. Enter New Password: appears. Type the password and press <Enter>.
The screen does not display the characters entered. Retype the password as prompted and press
<Enter>. If the password confirmation is incorrect, an error message appears. The password is
stored in NVRAM.
Change User Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to
change the user password.
Clear User Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to clear
the user password. Select Change User Password from the Security Setup menu and press
<Enter>. Enter New Password: appears. Type the password and press <Enter>. The screen does
not display the characters entered. Retype the password as prompted and press <Enter>. If the
password confirmation is incorrect, an error message appears. The password is stored in NVRAM
Clear User Password
Select Clear User Password from the Security Setup menu and press <Enter>. Clear New
Password [Ok] [Cancel] appears. Type the password and press <Enter>. The screen does not
display the characters entered. Retype the password as prompted and press <Enter>. If the
password confirmation is incorrect, an error message appears. The password is stored in NVRAM.
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AR-B8172 User Manual
3.6 Chipset Setup
3.6.1 SouthBridge Configuration
You can use this screen to select options for the South Bridge Configuration. South Bridge is a
chipset on the motherboard that controls the basic I/O functions. Use the up and down. <Arrow>
keys to select an item. Use the <Plus> and <Minus> keys to change the value of the selected
option.
ISA Configuration
This allows
Serial/Parallel Port Configuration
These options specify the serial port address and the parallel port mode and select the IRQ of
Serial/Parallel Port.
you to set the ISA bus frequency and to select the clock value of I/O and Memory.
Option Description
Disabled
3F8/IRQ4
Set this value to prevent the serial port from accessing any system resources. When
this option is set to disabled, the serial port physically becomes unavailable.
Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for
the interrupt address. This is the default setting. The majority of serial port 1 or COM1
ports on computer systems use IRQ4 and I/O Port 3F8 as the standard setting. The
most common serial device connected to this port is a mouse. If the system will not use
a serial device, it is best to set this port to disabled.
2F8/IRQ3
Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for
the interrupt address. If the system will not use a serial device, it is best to set this port
26
to disabled.
Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 4 for
3E8/IRQ4
2E8/IRQ3
the interrupt address. If the system will not use a serial device, it is best to set this port
to disabled.
Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 3 for
the interrupt address. If the system will not use a serial device, it is best to set this port
to disabled.
Option Description
AR-B8172 User Manual
Normal
Bi-Directional
EPP
EPP
Option Description
5
Set this value to allow the standard parallel port mode to be used. This is the
default setting.
lSet this value to allow data to be sent to and received from the parallel port.
The parallel port can be used with devices that adhere to the Enhanced Parallel
Port (EPP) specification. EPP uses the existing parallel port signals to provide
asymmetric bi-directional data transfer driven by the host device.
The parallel port can be used with devices that adhere to the Extended
Capabilities Port (ECP) specification. ECP uses the DMA protocol to achieve data
transfer rates up to 2.5 Megabits per second. ECP provides symmetric
bi-directional communication.
Set this value to allow the serial port to use Interrupt 3.
Set this value to allow the serial port to use Interrupt 7. This is the default setting.
7
The majority of parallel ports on computer systems use IRQ7 and I/O Port 378H
as the standard setting.
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3.7 Exit
AR-B8172 User Manual
3.7.1 Save Changes and Exit
Once you finished the selections, this option will allow you to determine whether to accept the
modifications or not. Select the “OK” to save the change and exit, if you select “NO”, you will return
to Setup utility.
3.7.2 Discard Change and Exit
Select this option to exit the Setup without saving any change you have made in this session. Press
“OK” will quit the Setup utility without saving any modifications. Press “NO” will return to Setup
utility.
3.7.3 Discard Change
This option allows you to load the default values to your system configuration. These default
settings will save the setup without making any permanent changes to the system configuration.
Discard Changes This option allows you to discard the selections you made and restore the
previously saved value.
3.7.4 Load Optimal Defaults
This option allows you to load the default values to your system configuration. These default
settings are optimal and enable all high performance features.
3.7.5 Load Failsafe Defaults
This option allows you to load the failsafe default values for each of the parameters on the Setup
menus, this will provide the most stable performance setting.
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BIOS REFRESHING, WATCHDOG AND
4
GPIO PROGRAMMING
4.1 BIOS Refreshing
The BIOS program instructions are contained within computer chips called FLASH ROMs that
are located on your system board. The chips can be electronically reprogrammed, allowing you to
update your BIOS firmware without removing and installing chips.
The AR-B8172 provides the FLASH BIOS update function for you to easily to update BIOS. Please
follow these operating steps to update BIOS:
STEP1 You must boot up system into MS-DOS first and please don’t detect files CONFIG.SYS
and AUTOEXEC.BAT.
STEP2 In the MS-DOS mode, you should execute the AMIFLASH program to update BIOS.
STEP3 Follow all messages then you could update BIOS smoothly.
4.2 WATCHDOG Programming
This section describes the usage of WatchDog. AR-B8172 integrated the WatchDog that
enable user to reset the system after a time-out event. User can use a program to enable the
WatchDog and program the timer in range of 1~255 second(s)/minute(s). Once user enables the
WatchDog, the timer will start to count down to zero except trigger the timer by user’s program
continuously. After zeroize the timer (stop triggering), the WatchDog will generate a signal to reset
the system. It can be used to prevent system crash or hang up. The WatchDog is disabled after
reset and should be enabled by user’s program.
Please refer to the following table to program WatchDog properly, and user could test
WatchDog under ‘Debug’ program
WatchDog demo program in Turbo C++ as following:
//===========================================================================
// Turbo C++ Version 3.0 Copyright(c) 1990, 1992 by Borland International,Inc.
//===========================================================================
// Describe : Vortex86DX WatchDog timer test
// Date : 09/16/2009
// Author : Willy
//===========================================================================
//===========================================================================
// Language include files
//===========================================================================
#include <conio.h>
#include <stdlib.h>
#include <stdio.h>
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AR-B8172 User Manual
#include <dos.h>
//===========================================================================
// Normal procedure
//===========================================================================
void Show_Help();
//===========================================================================
// Main procedure
//===========================================================================
int main(int argc, char *argv[])
{
unsigned char IO_Port_Address=0x22; // Index Port 22h, Date Port 23h
unsigned char Signal;
unsigned char Time;
unsigned long Timer;
unsigned char Counter0;
unsigned char Counter1;
unsigned char Counter2;
int Temp;
if ( argc != 3 )
{ Show_Help(); return 1; }
clrscr();
Signal=atoi(argv[1]); // Signal Set Bits
Signal=Signal<<4;
if(Signal==0xD0)
cprintf(">>> After %3d Second will reset the system. <<<",Temp);
else
cprintf(">>> After %3d Second Watchdog Signal will occur. <<<",Temp);
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AR-B8172 User Manual
delay(1000);
}
textcolor(LIGHTRED);
gotoxy(18,10);
if(Signal==0xD0)
cprintf("If you can see this message, Reset system is Fail");
else
cprintf("If you can see this message, Watchdog Signal is occur.");
(GPIO0 Base Address 0 Refers to the Register of index 61h-60h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO1 Base Address 1 Refers to the Register of index 63h-62h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO2 Base Address 2 Refers to the Register of index 65h-64h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO3 Base Address 3 Refers to the Register of index 67h-66h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO4 Base Address 4 Refers to the Register of index 69h-68h, IDSEL = AD18/SB of PCI
Configuration Register)
(Base Address Refers to the Register of index 6Bh-6Ah, IDSEL = AD18/SB of PCI Configuration
Register)
IO Address Register Name
BA + 00h
BA + 01h
BA + 02h
BA + 03h
BA + 04h
BA + 06h
BA + 07h
GPIO PORT0 Data Register
GPIO PORT1 Data Register
GPIO PORT2 Data Register
GPIO PORT3 Data Register
GPIO PORT4 Data Register
GPIO PORT0 Data Register
GPIO PORT1 Data Register
GPIO PORT2 Data Register
GPIO PORT3 Data Register
GPIO PORT4 Data Register
GPIO PORT1 Interrupt Status Register
GPIO PORT0 Interrupt Status Register
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GPIO demo program in Turbo C++ as following:
//===========================================================================
// Turbo C++ Version 3.0 Copyright(c) 1990, 1992 by Borland International,Inc.
//===========================================================================
// Describe : GPIO00~GPIO07 GPIO10~GPIO17 Test utility for Vortex86DX.
// Date : 09/17/2009
// Author : Willy
//===========================================================================
//===========================================================================
// Language include files
//===========================================================================
#include <conio.h>
#include <stdio.h>