0.1 COPYRIGHT NOTICE AND DISCLAIMER............................................................................................................................0-3
0.2 WELCOME TO THE AR-B1476 CPU BOARD....................................................................................................................... 0-3
0.3 BEFORE YOU USE THIS GUIDE.......................................................................................................................................... 0-3
0.4 RETURNING YOUR BOARD FOR SERVICE ....................................................................................................................... 0-3
0.5 TECHNICAL SUPPORT AND USER COMMENTS............................................................................................................... 0-3
1.3 FEATURES ............................................................................................................................................................................ 1-2
2. SYSTEM CONTROLLER....................................................................................................................................2-1
2.6 SERIAL PORT........................................................................................................................................................................ 2-6
3. SETTING UP THE SYSTEM...............................................................................................................................3-1
3.2 SYSTEM SETTING................................................................................................................................................................ 3-2
3.2.1 Hard Disk (IDE) Connector (CN1)..................................................................................................................................3-2
3.2.2 FDD Port Connector (CN2)............................................................................................................................................ 3-3
3.2.3 Parallel Port Connector (CN4) ....................................................................................................................................... 3-3
3.2.5 LED Header.................................................................................................................................................................... 3-6
3.2.6 Serial Port....................................................................................................................................................................... 3-7
3.2.12 CPU Setting ............................................................................................................................................................. 3-11
6.2 STANDARD CMOS SETUP...................................................................................................................................................6-2
6.6 AUTO-DETECT HARD DISKS...............................................................................................................................................6-7
6.8.1 Auto Configuration with Optimal Setting ........................................................................................................................ 6-8
6.8.2 Auto Configuration with Fail Safe Setting....................................................................................................................... 6-8
6.9.1 Save Settings and Exit................................................................................................................................................... 6-9
6.9.2 Exit Without Saving........................................................................................................................................................ 6-9
9.2 INDEX ....................................................................................................................................................................................9-3
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AR-B1476 User’s Guide
0.PREFACE
0.1 COPYRIGHT NOTICE AND DISCLAIMER
June 1998
This document is copyrighted, 1998, by Acrosser Technology Co., Ltd. All rights are reserved. No part of this
manual may be reproduced, copied, transcribed, stored in a retrieval system, or translated into any langua ge or
computer language in any form or by any means, such as electronic, mechanical, magnetic, optical, chemical,
manual or other means without the prior written permission of original manufacturer.
Acrosser Technology assumes no responsibility or warranty with respect to the contents in this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. Furthermore,
Acrosser Technology reserves the right to make improvements to the products described i n this manual at any
times without notice. Such revision will be posted on the Internet (WWW.ACROSSER.COM
Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid
written license from Acrosser or an authorized sub licensor.
ACKNOWLEDGEMENTS
Acrosser, ALI, AMI, HMC, IBM PC/AT, Windows 3.1, Windows 95, Windows NT, AMD, Cyrix, Intel…are registe r e d
trademarks.
All other trademarks and registered trademarks are the property of their respective holders.
This document was produced with Adobe Acrobat 3.01.
) as soon as possible.
0.2 WELCOME TO THE AR-B1476 CPU BOARD
This guide introduces the Acrosser AR-B1476 CPU board.
The information provided in this manual describes this card’s functions and features. It also helps you start, set up
and operate your AR-B1476. General system information can also be found in this publication.
0.3 BEFORE YOU USE THIS GUIDE
Please refer to the Chapter 3, “Setting Up the System” in this guide, if you have not already installed this ARB1476. Check the packing list before you install and make sure the accessories are completely included.
The AR-B1476 diskette provides the newest information regarding the CPU card. Please refer to the README.DOC file of the enclosed utility diskette. It contains the modification and hardware & software
information, and it has updated to products functions that may not be mentioned here.
0.4 RETURNING YOUR BOARD FOR SERVICE
If your board requires any services, contact the distributor or sales repres entative from whom you purchased the
product for service information. If you need to ship your board to us for service, be sure it is packed in a protective
carton. We recommend that you keep the original shipping container for this purpose.
You can help assure efficient servicing for your product by following these guidelines:
1. Include your name, address, telephone, facsimile number and E-mail.
2. A description of the system configuration and/or software at the time is malfunction.
3. A brief description of the problem occurred.
0.5 TECHNICAL SUPPORT AND USER COMMENTS
User’s comments are always welcome as they assist us in improving the quality of our products and the
readability of our publications. They create a very important part of input used for pr oduct enhancement and
revision.
We may use and distribute any of the information you provide in any way appropriate without incurring any
obligation. You may, of course, continue to use the information you provide.
If you have any suggestions for improving particular sections or if you find any errors on it, please send your
comments to Acrosser Technology Co., Ltd. or your local sales representative and indicate the manual title and
book number.
Internet electronic mail to: webmaster@acrosser.com
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AR-B1476 User’s Guide
0.6 ORGANIZATION
This information for users covers the following topics (see the Table of Contents for a detailed listing):
z Chapter 1, “Overview”, provides an overview of the system features and packing list.
z Chapter 2, “System Controller” describes the major structure.
z Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.
z Chapter 4, “CRT/LCD Flat Panel Display”, describes the configuration and installation procedure using
the LCD and CRT display.
z Chapter 5, “Installatio n”, describes setup procedures including information on the utility diskette.
z Chapter 6, “BIOS Consol e”, providing the BIOS options setting.
z Chapter 7, Spe cifications
z Chapter 8, Pla c ement & Dimensions
z Chapter 9, Programmin g RS-485 & Index
0.7 STATIC ELECTRICITY PRECAUTIONS
Before removing the board from its anti-static bag, read this section about static electricity precautions.
Static electricity is a constant danger to computer systems. The charge that can build up in your body may be
more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic
precautions whenever you use or handle co mputer components. Although areas with humid climates are much
less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The
following measures should generally be sufficient to protect your equipment from static discharge:
•Touch a grounded metal object to discharge the static electricit y in your body (or ideally, wear a grounded
wrist strap).
•When unpacking and handling the board or other system component, place all materials on an antic static
surface.
•Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom
of every board.
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AR-B1476 User’s Guide
1. OVERVIEW
This chapter provides an overview of your system features and capabilities. The following topics are covered:
z Introduction
z Packing List
z Features
1.1 INTRODUCTION
The AR-B1476 is a half size industrial grade CPU card that has been designe d to withstand continuous operation
in harsh environments. The AR-B1476 supports on-bo ard memory 8MB, and extends to 72MB DRAM for using
one 72-pin SIMM.
The 8 layers PCB CPU card is equipped with an IDE HDD interface, a floppy disk drive adapter, 1 parallel port, 2
serial ports and a watchdog timer. Its dimensions are as compact as 122mmX185mm. It highly condensed
features make it an ideal cost/performance solution for high-end commercial and ind ustrial app lications where CPU
speeding and mean time between failure is critical.
The AR-B1476 provides 2 bus interfaces, ISA bus and PC/104 compatible expansion bus. Based on the PC/104
expansion bus, you could easy install thousands of PC/104 module from hundr eds venders around the world. You
could also directly connect the power supply to the AR-B1476 on-board power connector in standalone
applications.
A watchdog timer has a software programmable time-out interval, is also provided on this CPU car d. It ensures
that the system does not hang-up if a program cannot execute normally.
The AR-B1476 is implemented with M1487 and M1489 chipset incorporate a memor y controller, parity generatio n
and checking, two 8237 DMA controllers, two 8259 interrupt controllers, one 8254 timer/counter, an addr ess buffer
and a data buffer.
A super I/O chip (SMC37C669) is embedded in the AR-B1476 card. It combines functions of a floppy disk drive
adapter, a hard disk drive (IDE) adapter, two serial (with 16C550 UART) adapters and 1 parallel adapter. The I/O
port configurations can be done by set the BIOS setup program.
As an UART, the chip supports serial to parallel conversion on data char acters received from a peripheral device
or a MODEM, and parallel to serial conversion on data character received from the CP U. The UART includes a
programmable baud rate generator, complete MODEM control capability and a processor interrupt s ystem. As a
parallel port, the SMC37C669 provides the user with a fully bi-directional parallel centronics-type printer interface.
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AR-B1476 User’s Guide
1.2 PACKING LIST
The accessories are included with the system. Before you begin installi ng your AR-B1476 board, take a moment
to make sure that the following items have been included inside the AR-B1476 package.
z This user’s guide
z 1 AR-B1476 CPU card
z 1 Hard disk drive interface cable
z 1 Floppy disk d r ive interface cable
z 1 Parallel port interface cable & 1 RS-232C interface cable mounted on one bracket
z 1 Software utility CD.
1.3 FEATURES
The system provides a number of special features that enhance its reliabi l it y, ensure its availabilit y, and improve its
expansion capabilities, as well as its hardware structure.
z All In One designed 486 DX/DX2/DX4 CPU card.
z Supports 3.45V/5V CPU with voltage regulator.
z Supports ISA bus and PC/104 bus.
z Supports 512KB cache on board.
z Supports on-board 8MB a nd extends one 72-pin DRAM SIMM up to 72MB DRAM on board.
z Supports shadow memory and EMS.
z Supports D.O.C. up to 72MB.
z Legal AMI BIOS.
z IDE hard disk drive interface.
z Floppy d isk drive interface.
z Bi-direction parallel interface.
z 2 serial ports with 16C550 UART.
z Programmable watchdog timer.
z On-board bui lt-in buzzer.
z 8 layers PCB.
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AR-B1476 User’s Guide
2. SYSTEM CONTROLLER
This chapter describes the major structure of the AR-B1476 CPU board. The following topics are covered:
z DMA Controller
z Keyboard Controller
z Interrupt Controller
z Real-Time Clock and Non-Volatile RAM
z Timer
z Serial Port
z Parallel Port
2.1 DMA CONTROLLER
The equivalent of two 8237A DMA controllers are implemented in th e AR-B1476 board. Each controller is a fourchannel DMA device that will generate the memory addresses and control signals necessary to transfer
info r mati o n direct l y bet ween a peripheral device and memory. This allows high speeding information trans fer w i t h les s
CPU intervention. The two DMA controllers are internally cascaded to pr ovide four DMA channels for transfers to
8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides
the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.
Following is the system information of DMA channels:
The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives
serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data
in its output buffer. The controller can interrupt the system when data is place d in its output buffer, or wait for the
system to poll its status register to determine when data is available.
Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.
Each byte of data is sent to the keyboard controller in seri es with an odd parity bit automatically inserted. The
keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be
sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full”
interruption may be used for both send and receive routines.
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AR-B1476 User’s Guide
2.3 INTERRUPT CONTROLLER
The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1476 board. They
accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt req uests to the
CPU, and provide vectors which are used as acceptance indices by the CP U to determine which interrupt service
routine to execute.
Following is the system information of interrupt levels:
InInterrupt Level
Description
NMI
CTRL1
IRQ 0
IRQ 1
Parity check
CTRL2
System timer interrupt from timer 8254
Keyboard output buffer full
IRQ 2
IRQ8 : Real time clock
IRQ9 : Rerouting to INT 0Ah from hardware IRQ2
IRQ10 : spare
IRQ11 : spare
IRQ12 : spare (PS/2 mouse)
IRQ13 : Math. coprocessor
IRQ14 : Hard disk adapter
IRQ15 : spare (Watchdog Timer)
IRQ 3
IRQ 4
IRQ 5
IRQ 6
IRQ 7
Serial port 2
Serial port 1
Parallel port 2
Floppy disk adapter
Parallel port 1
The AR-B1476 contains a real-time clock compartment that maintains the date and time in addition to storing
configuration information about the computer system. It contains 14 bytes of clock and control registers and 114
bytes of general purpose RAM. Because of the use of CMOS technology, it consumes v er y little po wer and can be
maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM
are listed as follows:
Address Description
00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memor y byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS
Table 2-5 Real-Time Clock & Non-Volatile RAM
2.5 TIMER
The AR-B1476 provides three programmable timers, each with a timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the sp eaker tone.
Application programs can load different counts into this timer to generate various sound frequencies.
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AR-B1476 User’s Guide
2.6 SERIAL PORT
The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial
format on the transmit side and convert serial data to parallel on the rec eiver side. The serial format, in order of
transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one,
one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and
produce a 16x clock for driving the internal transmitter logic.
Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed
MODEM control capability, and a processor interrupt system that may be software tailored to the computing time
required handle the communications link.
The following table is summary of each ACE accessible register
0 base + 1 Interrupt enable
X base + 2 Interrupt identification (read only)
X base + 3 Line control
X base + 4 MODEM control
X base + 5 Line status
X base + 6 MODEM status
X base + 7 Scratched register
1 base + 0 Divisor latch (least significant byte)
1 base + 1 Divisor latch (most significant byte)
Table 2-6 ACE Accessible Registers
(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
(3) Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(4) Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
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(5) Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
WLS1 WLS0 Word Length
0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
(6) MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(7) Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
AR-B1476 User’s Guide
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(9) Divisor Latch (LS, MS)
LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
Table 2-7 Serial Port Divisor Latch
Desired Baud Rate Divisor Used to Gen erate 16x Clock
base + 0 Write Output data
base + 0 Read Input data
base + 1 Read Printer status buffer
base + 2 Write Printer control latch
Table 2-8 Registers’ Address
(2) Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel
data at standard TTL level.
(3) Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading
the Data Swapper address.
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AR-B1476 User’s Guide
(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit
definitions are described as follows:
12345670
XXX
-ERROR
SLCT
PE
-ACK
-BUSY
Figure 2-2 Printer Status Buffer
NOTE: X presents not used.
Bit 7: T his signal may become active during data entry, when the printer is off-line dur ing printing, or when the
print head is changing position or in an error state. When Bit 7 is activ e, the printer is busy and cannot
accept data.
Bit 6: This bit represents the current state of the printer’s ACK signal. A0 means the printer has received the
character and is ready to accept another. Normally, this signal will be active for approximately 5
microseconds before receiving a BUSY message sto ps.
Bit 5: A1 means the printer has detected the end of the paper.
Bit 4: A1 means the printer is selected.
Bit 3: A0 means the printer has encountered an error condition.
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AR-B1476 User’s Guide
(5) Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the address of printer
control swapper. Bit definitions are as follows:
XX
Figure 2-3 Bit’s Definition
NOTE: X presents not used.
Bit 5: Direction control bit. When lo gic 1, the output buffers in the parallel port are disa bl ed all owing data driven
from external sources to be read; when logic 0, they work as a printer port. This bit is writing only.
Bit 4: A1 in this position allows an interrupt to occur when ACK changes from low state to high state.
Bit 3: A1 in this bit position selects the printer.
Bit 2: A0 starts the printer (50 microseconds pulse, minimum).
Bit 1: A1 causes the printer to line-feed after a line is printed.
Bit 0: A0.5 microsecond minim um highl y active pulse clocks data into the printer. Va lid data must be present for
a minimum of 0.5 microseconds before and after the strobe pulse.
12345670
STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
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AR-B1476 User’s Guide
3. SETTING UP THE SYSTEM
This section describes pin assignments for system’s external connectors and the jumpers setting.
z Overview
z System Setting
3.1 OVERVIEW
The AR-B1476 is a half size industrial grade CPU card that has been designe d to withstand continuous operation
in harsh environments. This section provides hardware’s jumpers setting, the con nectors’ locations, and the pin
assignment.
Figure 3-1 External System Location
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AR-B1476 User’s Guide
3.2 SYSTEM SETTING
Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.
(A jumper block is a small plastic-encased conductor [shorting plug] that slips over the pins.) To change a jumper
setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the
jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not
to bend the pins.
We will show the locations of the AR-B1476 jumper pins, and the factory-default setting.
CAUTION: Do not touch any electronic component unless you are safely grounde d. Wear a grounded wrist strap
or touch an exposed metal part of the system unit chassis. The static discharges from your fin gers can
permanently damage electronic components.
3.2.1 Hard Disk (IDE) Connector (CN1)
A 40-pin header type connector (CN1) is provided to interface with up to t wo embedded hard disk drives (IDE AT
bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “dais y chain” fashion.
To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates
the pin assignments of the hard disk drive’s 40-pin connector.
2
1
Figure 3-2 CN1: Hard Disk (IDE) Connector
Pin Signal Pin Signal
1 -RESET 2 GROUND
3 DATA 7 4 DATA 8
5 DATA 6 6 DATA 9
7 DATA 5 8 DATA 10
9 DATA 4 10 DATA 11
11 DATA 3 12 DATA 12
13 DATA 2 14 DATA 13
15 DATA 1 16 DATA 14
17 DATA 0 18 DATA 15
19 GROUND 20 NOT USED
21 NC 22 GROUND
23 -IOW A 24 GROUND
25 -IOR A 26 GROUND
27 -CHRDY A 28 NOT USED
29 NC 30 GROUND
31 -IRQ A 32 -IO16
33 SA 1 34 NOT USED
35 SA 0 36 SA 2
37 CS 0 38 CS 1
39 HD LED A 40 GROUND
Table 3-1 HDD Pin Assignment
3-2
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3.2.2 FDD Port Connector (CN2)
The AR-B1476 provides a 34-pin header type connector for supporting up to two floppy disk drives.
To enable or disable the floppy disk controller, please use the BIOS Setup program.
2
1
Figure 3-3 CN2: FDD Port connector
Pin Signal Pin Signal
1-33(odd) GROUND 18 -DIRECTION
2 DRVEN 0 20 -STEP OUTPUT PULSE
4 NOT USED 22 -WRITE DATA
6 DRVEN 1 24 -WRITE GATE
To use the parallel port, an adapter cable has to be connected to the CN4 (26-pin header type) connector. This
adapter cable is mounted on a bracket and is included in your AR-B1 476 package. The connector for the parall el
port is a 25 pin D-type female connector.
2
1
Parallel Port Connector
14
1
D-Type Connector
Figure 3-4 CN4: Parallel Port Connector
CN4DB-25 Signal CN4DB-25Signal
1 1 -Strobe 2 14 -A u t o F o r m F e e d
3 2 Data 0 4 15 -Error
5 3 Data 1 6 16 -Initialize
7 4 Data 2 8 17 -Printer Select In
9 5 Data 3 10 18 Ground
116 Data 4 12 19 Ground
137 Data 5 14 20 Ground
158 Data 6 16 21 Ground
179 Data 7 18 22 Ground
1910 -Acknowledge 20 23 Ground
2111 Busy 22 24 Ground
2312 Paper 24 25 Ground
2513 Printer Select 26 -- No Used
BUSCLK [Output] The BUSCLK signal of the I/O c hannel is asynchronous to
RSTDRV [Output] This signal goes high during power-up, low line-voltage or
SA0 - SA19
[Input / Output]
LA17 - LA23
[Input/Output]
SD0 - SD15
[Input/Output]
BALE [Output] The Buffered Address Latch Enable is used to latch SA0 -
-IOCHCK [Input] The I
IOCHRDY
[Input, Open collector]
IRQ 3-7, 9-12, 14, 15
[Input]
-IOR
[Input/Output]
-IOW [Input/Output] The I/O write signal is an active low signal which instructs
-SMEMR [Output] The System Memory Read is low while any of t he low 1
-MEMR
[Input/Output]
-SMEMW [Output] The System Memory Write is low while any of the low 1
-MEMW
[Input/Output]
DRQ 0-3, 5-7 [Input] DMA Request channels 0 to 3 are for 8-bit data transfers.
-DACK 0-3, 5-7
[Output]
AEN [output] The DMA Address Enable is high when the DMA controller
-REFRESH
[Input/Output]
TC [Output] Terminal Count provides a pulse when the terminal count
SBHE [Input/Output] The System Bus High Enable indicates the high b yte SD8 -
AR-B1476 User’s Guide
the CPU clock.
hardware reset
The System Address lines run from bit 0 to 19. They are
latched onto the falling edge of "BALE"
The Unlatched Address line run from bit 17 to 23
System Data bit 0 to 15
SA19 onto the falling edge. This signal is forced high
during DMA cycles
O Channel Check is an active low signal which
indicates that a parity error exist on the I/O board
This signal lengthens the I/O, or memory read/write cycle,
and should be held low with a valid address
The Interrupt Request signal indicates I/O service request
attention. They are prioritized in the following sequence :
(Highest) IRQ 9, 10, 11, 12, 13, 15, 3, 4, 5, 6, 7 (Lowest)
The I/O Read signal is an active low signal which instructs
the I/O device to drive its data onto the data bus
the I/O device to read data from the data bus
mega bytes of memory are being used
The Memory Read signal is low while any memory location
is being read
mega bytes of memory is being written
The Memory Write signal is low while any memory location
is being written
DMA Request channels 5 to 7 are for 16-bit data transfers.
DMA request should be held high until the corresponding
DMA has been completed. DMA request priority is in the
following sequence:(Highest) DRQ 0, 1, 2, 3, 5, 6, 7
(Lowest)
The DMA Acknowledges 0 to 3, 5 to 7 are the
corresponding acknowledge signals for DRQ 0 to 3 and 5
to 7
is driving the address bus. It is low when the CPU is driving
the address bus
This signal is used to indicate a memory refresh cycle and
can be driven by the microprocessor on the I/O channel
for any DMA channel is reached
SD15 on the data bus
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AR-B1476 User’s Guide
+
Name Description
-MASTER [Input] The MASTER is the signal from the I/O processor which
gains control as the master and should be held low for a
maximum of 15 microseconds or system memory may be
lost due to the lack of refresh
-MEMCS16
[Input, Open collector]
-IOCS16
[Input, Open collector]
OSC [Output] The Oscillator is a 14.31818 MHz signal used for the color
-ZWS
[Input, Open collector]
Table 3-4 I/O Channel Signal’s Description
The Memory Chip Select 16 indicates that the present data
transfer is a 1-wait state, 16-bit data memory operation
The I/O Chip Select 16 indicates that the present data
transfer is a 1-wait state, 16-bit data I/O operation
graphic card
The Zero Wait State indicates to the microprocessor that
the present bus cycle can be completed without inserting
additional wait cycle
3.2.5 LED Header
(1) External Power LED & Keyboard Lock Header (J6)
1 Power LED
2 No Used
3 Power LED4 Key-Lock+
5 Key-Lock-
Figure 3-9 J6: Power LED & Keyboard Lock Header
(2) HDD LED Header (J3)
1 LED+
2 LED-
12
Figure 3-10 J3: HDD LED Header
(3) Watchdog LED Header (J1)
3-6
12LED+
LED-
Figure 3-11 J1: Watchdog LED Header
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AR-B1476 User’s Guide
3.2.6 Serial Port
(1) RS-232/RS-485 Select (SW1, JP4 & JP9)
JP4 selects COM B port, and adjusts the CN5 connector is RS-485 or RS-232C. JP9 selects COM A port for using
DB2 for RS-232C or connects External RS-485. SW1 adjusts the onboard RS-485.
(A) COM-A RS-485 Adapter Select (JP9)
3
Reserved for Acrosser's
2
RS-485 Adapter Used Only
1
3
RS-232C
2
Factory-Default Setting
1
Figure 3-12 JP9: COM-A RS-485 Adapter Select
(B) COM-B RS-485 Adapter Select (JP4)
1
2
3
Reserved for Acrosser's
RS-485 Adapter Used Only
1
2
3
Figure 3-13 JP4: COM-B RS-485 Adapter Select
(C) COM-B RS-232/RS-485 Select (SW1)
On
Off
1432
On
Off
1432
Figure 3-14 SW1: COM-B RS-232/RS-485 Select
(2) RS-485 Terminator Select (JP2)
RS-232C
Factory-Default Setting
SW1
RS-232C
Factory-Default Setting
SW1
Reserved for Acrosser's
RS-485 Adapter Used Only
1212
OFF
Factory Preset
Figure 3-15 JP2: RS-485 Terminator Select
ON
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AR-B1476 User’s Guide
(3) RS-485 Connector (J4)
J4 is onboard RS-485 header, J4 pin assignments are as follows:
123
1 N485+
2 N4853 GND
J4 (COM B)
Figure 3-16 J4: RS-485 Connector
(4) RS-232 Connector (CN5 & DB2)
There are two serial ports with EIA RS-232C interface on the AR-B1476. COM A uses one onb oard D-type 9 pin
male connector (DB2) and COM B uses one 10 pin header (CN5) which are located at the right side of the card.
To configure these two serial ports, use the BIOS Setup program, and adjust the jumpers on JP4 and JP9.
The pin assignments of the DB2 and CN5 for serial port A & B are as follows:
CN9 is a Mini-DIN 6-pin connector. This keyboard connector is a PS/2 type keyboard connector. This connector is
also for a standard IBM-compatible keyboard with the keyboard adapter cable. J9 provides another way of
connecting a keyboard to the AR-B1476.
1 DATA
2 Not Used
3 GND
4 VCC
5 CLOCK
6 Not Used
Figure 3-18 CN9: Keyboard Connector
J9
Figure 3-19 J9: AUX. Keyboard Connector
1
2
3
5
CN9 (Front View
1 CLOCK
2 DATA
3 Not Used
4 GND
5 VCC
6
4
3.2.8 External Speaker Header (J2)
Besides the onboard buzzer, you can use an external speaker by connecting to the J2 header.
1 Speaker+
2 Speaker-
1234
Figure 3-20 J2: Speaker Header
3 Speaker4 Speaker-
3.2.9 Power Connector (J10)
J10 is an 8-pin power connector. You can directly connect the power supply to the onboard power connector for
stand-alone applications.
1
2
3
4
5
6
7
8
Figure 3-21 J10: Power Connector
GND
+5 VDC
+5 VDC
GND
GND
+12 VDC
-12 VDC
-5 VDC
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N
3.2.10 Reset Header (J8)
J8 is used to connect to an external reset switch. Shorting these two pins will reset the system.
1 Reset+
2 GND
Figure 3-22 J8: Reset Header
3.2.11 PS/2 Mouse Connector
(1) PS/2 Mouse IRQ12 Setting (JP8)
The default of <Enabled> allows the system detecting a PS/2 mouse on boot. If detected, IRQ12 will be used fo r
the PS/2 mouse. IRQ12 will be reserved for expansion cards and therefore the PS/2 mouse will not function.
1
JP8
Enable
Factory Preset
Figure 3-23 JP8: PS/2 Mouse IRQ12 Setting
CAUTION: After adjusting the JP8 correctly, the user must set the <PS/2 Mouse Support> option to Ena bled in the
BIOS <Advanced CMOS Setup> Menu. Then the PS/2 mouse can be used.
JP8
2
(2) PS/2 Mouse Connector (CN6 & J7)
To use the PS/2 interface, an adapter cable has to be connected to the CN6 a nd J7 (6-pin h eader t ype) connecto r.
This adapter cable is mounted on a bracket and is inclu ded in your AR-B1476 package. The connector for the
PS/2 mouse is a Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows:
N.C.
GND
VCC
N.C.
1
2
3
4
5
6
DATA
CLOCK
J7
Figure 3-24 CN6 & J7: PS/2 Mouse Connector
1
2
Disable
1
2
3
5
CN6
6 Pin Mini-DI
4
6
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AR-B1476 User’s Guide
g
K
3.2.12 CPU Setting
The AR-B1476 accepts many types of microprocessors such as Intel/AMD/Cyrix 486DX/DX2/DX4. All of these
CPUs include an integer processing unit, floating-point processing unit, memory-management unit, and cache.
They can give a two to ten-fold performance improvement in speed over the 386 processor, which is depending o n
the clock speeds used and specific application. Like the 386 processor, t he 486 pr ocessor incl udes both segme ntbased and page-based memory protection schemes. The instruction of processing time is reduced by on-chip
instruction pipelining. By performing fast, on-chip memory management and caching, the 486 processor relaxes
requirements for memory response for a given level of system performance.
(1) CPU Logic Core Voltage Select (P1 & P2)
6
6
3.45V -- Factory Default Setting
Figure 3-25 P1 & P2: CPU Logic Core Voltage
(2) AMD 3X/4X CPU Select (JP5)
(3) PCI Clock Select (JP7)
P1
12345
P2
123123
P1
12345
P2
JP5
AMD 4X
1
2
JP5
AMD 3X
1
2
Factory Default Settin
Figure 3-26 JP5: AMD 3X/4X CPU Select
JP7
6
JP7
6
5V
PCICLK=CPUCLKPCICLK=1/2 CPUCL
Factory Default Setting
(4) CPU Clock Multiplier Select (JP6)
A B Base ClockNote
Close Close 50MHz
Open Close 40MHz
Close Open 33.3MHz Factory Preset
Open Open 25MHz
Table 3-6 JP6: CPU Clock Multiplier Select
12345
Figure 3-27 JP7: PCI Clock Select
12345
JP6
ABC
12345
6
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AR-B1476 User’s Guide
3.2.13 Memory Setting
(1) DRAM Configuration
There are two 32-bit memory banks on the AR-B1476 board. It can be one-side or double-side SIMM (Single-Lin e
Memory Modules) which is designed to accommodate 256KX36 bit to 16MX36-bit SIMMs. This provides the user
with up to 64MB of main memory. The 32-bit SIMM (without parity bit) also can be used on AR-B1476 board .
There are listing on-board memory configurations available. Please refer to the following table for details:
The AR-B1476 can be configured to provide a write-back or write-through cache scheme and support 512KB
cache systems. A write-back cache system may provide better performance than a write-through cache system.
The BIOS Setup program allows you to set the cache scheme either write-back or write-through, either t he interna l
cache selection.
JP1
1
2
JP1
1
2
Write-ThroughWrite-Back
Factory Default Setting
Figure 3-28 JP1: Write-Through/Write-Back CPU Select
(3) Cache Size Select (CP1)
The CP1 is located on the back of CPU card. The factory setting is fixed is 512K Byte, this function can’t be
supplied for user adjusting. The type of setting’s table is in following.
CP1 Data RAM TAG RAM SIZE
OPEN four 64K x 8 32K x 8 256KB
CLOSE four 128K x 8 32K x 8 512KB
Table 3-8 Cache Size Selected
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3.2.14 DiskOnChip Installation (SW1)
The DiskOnChip is a new generation of high performance singl e-chip Flash Disk. It provides a Flash Disk in a
standard 32-pin DIP package.
This unique data storage solution offers a better, faster, and more cost-effective Flash Disk for Single Board
embedded systems. The DiskOnChip provides a Flash Disk that does not require any bus, slot or connector.
Simply insert the DiskOnChip into 32-pin socket U16 position on the CPU board. It is the optimal solution for single
board computers, it is a small, fully functional, easy to integrate, plug-and-play Flash Disk with a very lo w power
consumption.
The DiskOnChip is fully tested and formatted before the product is shipped.
(1) DiskOnChip Hardware Installation
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Step 8:
(2) DiskOnChip Memory Address Setting (SW1)
Make sure the target platform is powered OFF
Plug the DiskOnChip device into the U16 socket. Verify the direction is cor r ect (pin 1 of the DiskOnChip
is aligned with pin 1 of the U16 socket)
Power up the system
During power up you may observe the messages displayed by the DiskOnChip when its drivers are
automatically loaded into system’s memory
At this stage the DiskOnChip can be accessed as any disk in the system
If the DiskOnChip is the only disk in the system, it will appear as the first disk (drive C: in DOS)
If there are more disks besides the DiskOnChip, it will appear by default as the last drive, unless it was
programmed as first drive.
If you want the DiskOnChip to be bootable, copy the operating system files into the DiskOnChip by
The DiskOnChip fully supports the BOOT capability. In orde r for the DiskOnChip to b e bootable, it shoul d be DOS
formatted as bootable, like any floppy or hard disk that required to be booted.
SYS D:
Change the disk into bootable (assuming the DiskOnChip is disk D)
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4. CRT/LCD FLAT PANEL DISPLAY
This section describes the configuration and installation procedure using LCD and CRT display.
z CRT Connector
z LCD Flat Panel Displa y
z Supported LCD Panel
4.1 CRT CONNECTOR (DB1)
The AR-B1476 supports CRT color monitors. AR-B1476 used onboard VG A chipset and supported 1MB on-boar d
VRAM. For different VGA display modes, your monitor must possess certain characteristics to display the mode
you want.
To connect to a CRT monitor, an adapter cable has to be connected to the DB1 connector. DB1 is used to
connect with a VGA monitor when you are using the on-board VGA controller as a display adapter. Pin assignments
for the DB1 connector are as follows:
DB1 (CRT Connector)
6
1
2
3
4
5
11
1 Red
2 Green
3 Blue
13 Horizontial Sync
14 Vertical Sync
4, 9, 11, 12, & 15 Not used
5 & 10 Ground
6, 7 & 8 AGND
15
10
Figure 4-1 DB1: CRT Connector
4.2 LCD FLAT PANEL DISPLAY
This section describes the configuration and installation procedure for a LCD displ ay. Skip this section if you are
using a CRT monitor only.
Use the Flash memory Writer utility to download the new BIOS file into the ROM chip to configure the BIOS default
settings for different types of LCD panels. Next, set your system properly and configure the AR-B1476 VGA
module for the right type of LCD panel you are using.
The following shows the block diagram of the system when using the AR-B1476 with a LCD display.
AR-B1476
CPU Boad
LCD
Panel
VBL Control
VEE
+12V, +5V
Inverter
Board
Figure 4-2 LCD Panel Block Diagram
FL HIGH
Voltage
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AR-B1476 User’s Guide
The block diagram shows that the AR-B1476 still needs components to use with a LCD panel. The inverter board
provides the control for the brightness and the contrast of the LCD panel. The inverter is also the comp onents that
supply the high voltage to drive the LCD panel. Each item will be explained further in the section.
CN3
AR-B1476
CPU Board
J5
Pin 1
Inverter & Contrast
Pin 1
LCD
Panel
Figure 4-3 LCD Panel Cable Installation Diagram
NOTE: Be careful with the pin orientation when installing connectors and the cables. A wrong connection can easily
destroy your LCD panel. Pin 1 of the cable connector is indicated with a sticker and pin1 of the ribbon
cable is usually has a different color.
4.2.1 Inverter Board Description
The inverter board supplies high voltage signals to drive the LC D panel by converting the 12 volt signal from the
AR-B1476 into a high voltage AC signal for LCD panel. It can be installed freely on the space provided over t he
VR board. If the VR board is installed on the bracket, you have to provi de a place to install the inverter board into
your system.
4.2.2 LCD Connector
(1) DE/E Signal from M or LP Select (JP3)
123123
E/LPDE/M
Factory Preset
Figure 4-4 JP3: DE/E Signal from M or LP
(2) LCD Control Connector (J5)
J5 is a 5-pin connector that attaches to the Contrast and Backlight board. Its pin assignment is shown below:
1 ENABLK
2 ENVEE
3 +12V
12345
4 GND
5 VEE
Figure 4-5 J5: LCD Control Connector
(3) Touch Screen Connector (J11)
1 RXD
2 TXD
123
Figure 4-6 J11: Touch Screen Connector
3 GND
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(4) LCD Panel Display Connector (CN3)
Attach a display panel connector to this 44-pin connector with pin assignments as shown below:
This chapter describes the procedure of the utility diskette installation. The following topics are covered:
z Overview
z Utility Diskette
z Watchdog Timer
5.1 OVERVIEW
This chapter provides information for you to set up a working system based on the AR-B1476 CPU board. Please
read the details of the CPU board’s hardware descriptions before installation carefully, es pecially jumpers’ setting,
switch settings and cable connections.
Follow steps listed below for proper installation:
Step 1 :
Step 2 :
Step 3 :
Step 4 :
Step 5 :
Step 6 :
Step 7 :
Step 8 :
Step 9 :
Step 10:
Step 11:
Step 12:
Read the CPU card’s hardware description in this manual.
Install any DRAM SIMM onto the CPU card. (or user can skip this step because that the AR-B14 76
embedded on-board DRAM)
Set jumpers.
Make sure that the power supply connected to your passive CPU board backplane is turned off.
Plug the CPU card into a free AT-bus slot or PICMG slot on the backplane and secure it in place with
a screw to the system chassis.
Connect all necessary cables. Make sure that the FDC, HDC, serial and parallel cables are
connected to pin 1 of the related connector.
Connect the hard disk/floppy disk flat cables from the CPU card to the drives. Connect a power
source to each drive.
Plug the keyboard into the keyboard connector.
Turn on the power.
Configure your system with the BIOS Setup program then re-bo ot your sy stem.
If the CPU card does not work, turn off the power and read the hardware description carefully again.
If the CPU card still does not perform properly, return the card to your dealer for immediate service.
5.2 UTILITY DISKETTE
AR-B1476 provides two VGA driver diskettes. It supports WIN31, WIN95, WINNT 4.0 and OS/2. If your operating
system is the other operating system, please attach Acrosser that will provide the technic al supporting for the VGA
resolution.
There are two diskettes: disk 1 is for WIN31, WIN95 & WINNT4.0 VGA resolution; disk 2 is for OS/2 VGA
resolution. While user extracted the compressed files there is the README.* file in each sub-director ies. Please
refer to the file of README for any troubleshooting before install the driver.
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5.2.1 VGA Driver
(1) WIN 3.1 Driver
For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Step 8:
Step 9:
Step 10:
Step 11:
Step 12:
Make the new created directory to put the VGA drivers.
C:\>MD VGAW31
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D54XW31P.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
Change directory to the new created directory, and extract the compress file.
C:\>CD VGAW31
C:\VGAW31>PKUNZIP -d D54XW31P.ZIP
And then re-name the SET545P.SCP file as SETUP5XX.SCP. Acrosser recommends the method
as:
C:\VGAW31>COPY SET545P.SCP SETUP5XX.SCP
In the DOS mode execute the SETUP.EXE file.
C:\VGAW31>SETUP
The screen shows the chip type, and presses any key enter the main menu.
CHIPS 655XX - PCI Display Drivers
Preliminary Version 3.3.0
There are some items for choice to setup. Please choose the <Windows Version 3.1> i tem, notice
the function key defined. Press [ENTER] selected the <All Resolutions>, when this line appears [*]
symbol, that means this item is selected. Press [End] starts to install.
The screen will show the dialog box to demand user typing the WIN31’s path. The default is
C:\WINDOWS.
Follow the setup steps’ messages execute. As completed the setup procedure will generate the
message as follow.
Installation is done!
Change to your Windows directory and t ype SETUP to run the Windows Setup program. Choose
one of the new drivers marked by an *. Please refer to the User’s Guide to complete the installation.
Presses [Esc] return the main menu, and re-press [Esc] return to the DOS mode.
In the WIN31, you can find the <Chips CPL> icon located in the {CONTROL PANEL} group.
Adjust the <Refresh Rate>, <Cursor Animation>, <Font size>, <Resolution>, and <Big Cursor>.
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(2) WIN 95 Driver
For the WIN95 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Make the new created directory to put the VGA drivers.
C:\>MD VGAW95
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D55XW95.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
C:\>COPY A:\D55XW95.ZIP C:\VGAW95
C:\>COPY A:\PKUNZIP.EXE C:\VGAW95
Change directory to the new created directory, and extract the compress file.
C:\>CD VGAW95
C:\VGAW95>PKUNZIP -d D55XW95.ZIP
Enter the WIN95 operation system and please choose the <SETTING> item of the <DISPLAY> icon
in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source
files’ path.
C:\VGAW95
And then you can find the <Chips and Tech 65545 PCI (new)> item, select it and click the <OK>
button.
Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other functions. Please refer to
the messages during installation.
(3) WINNT 4.0 Driver
For the WINNT4.0 operating system, user must in the DOS mode decompress the compress file. And then as to
the steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Make the new created directory to put the VGA drivers.
C:\>MD VGANT40
Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—D5 XXNT4.ZIP,
and the PKUNZ I P .EXE p r o g r a m — , i n t h e n e w c r e a t e d d i r e c t o r y .
C:\>COPY A:\D5XXNT4.ZIP C:\VGANT40
C:\>COPY A:\PKUNZIP.EXE C:\VGANT40
Change directory to the new created directory, and extract the compress file.
C:\>CD VGANT40
C:\ VGANT40>PKUNZIP -d D5XXNT4.ZIP
Enter the WINNT4.0 operation system and please choose the <SETTING> item of the <DISPLAY>
icon in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory
source files’ path.
C:\VGANT40
And then you can find the <Chips and Tech 65545 PCI (new)> item, select it and click the <OK>
button.
Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other function. Please refer t o
the messages during installation.
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AR-B1476 User’s Guide
(4) OS/2 Warp Driver
The following steps must be performed before you install the 65545/65548 display’s driver:
CAUTION:
1. OS/2 DOS Support must be installed.
2. If you previously installed SVGA support, you must do the following:
a) Close all DOS Full Screen and WIN-OS2 sessions.
b) Reset the system to VGA mode. VGA is the default video mode enabled when OS/2 is installed. To
restore VGA mode, use Selective Install and select VGA for Primary Display. For more information on
this procedure, see the section on Changing Display Adapter Support in the OS/2 Users Guide.
To install this driver, do the following steps:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Open an OS/2 full screen or windowed session.
Place the 65545/65548 PCI Display Driver Diskette in drive A. (DISK #2)
Because the diskette enclosed the compress file, to extract file had to as the steps.
In the OS/2-DOS mode, make the VGA directory for decompress the driver.
C:\>MD VGAOS2
C:\>CD VGAOS2
C:\VGAOS2>COPY A:\*.*
C:\VGAOS2>PKUNZIP -d D54XOS2P.ZIP
At the OS/2 command prompt, type the following commands to copy the files to the OS/2 drive:
C:\VGAOS2> SETUP C:\VGAOS2 C: <ENTER>
When the Setup Program is completed, you will need to perform a shutdown and then restart the
system in order for changes to take effect.
Please refer to the README.TXT file, there is detail description, user had to according to the
installation step by step. When install completed, user can adjust the VGA resolution in the
SYSTEM icon <SCREEN> item of the <SYSTEM SETUP>.
5.2.2 BIOS FLASH Utility
The main function of AMIFLASH.COM supports BIOS update. The AR-B1476 can prov ide FLASH BIOS update
function for you to easily upgrade newer BIOS version. Please contact Acrosser engineer to support the
modification of the BIOS.
1. Use the AMIFLASH.COM program to update the BIOS setting function.
2. And then refer to the section “BIOS Console”, as the steps to modify BIOS.
3. Now the CPU board’s BIOS is the ne west, user can use this program to modify BIOS function in the f uture,
when the BIOS adding some function.
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5.3 WATCHDOG TIMER
This section describes how to use the Watchdog Timer, disabled, enabled, and trigger.
The AR-B1476 is equipped with a programmable time-out period watchdog timer. User can use the program to
enable the watchdog timer. Once you have enabled the watchd og timer, the program should trigger it every time
before it times out. If your program fails to trigger or disable this timer before it times out because of system hangup, it will generate a reset signal to reset the system. The time-out period can be programmed to be 3 to 42
seconds.
Enable (D7)
Time Factor (D0-D2)
Watchdog
Register
Write and Trigger
Time Base
Counter
and
Compartor
Watchdog
LED
Figure 5-1 Watchdog Block Diagram
RESET
5.3.1 Watchdog Timer Setting
The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups.
Whenever the watchdog timer is enabled, the LED will blink to indicate that the timer is counting. The watchdog
timer is automatically disabled after reset.
Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it
times-out. After you trigger the watchdog timer, it will be set to zero and start to count again. If your program fails
to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the s ystem or trigger the IRQ15
signal to tell your program that the watchdog is times out.
The factor of the watchdog timer time-out constant is approximately 6 seconds. The period for the watchdog time r
time-out period is between 1 to 7 timer factors.
If you want to reset your system when watchdog times out, the following table listed the relation of timer factors
between time-out periods.
If you want to generate IRQ15 signal to warn your program when watchdog times out, the following table listed the
relation of timer factors between time-out period. And if you use the IRQ15 signal to warn your program when
watchdog timer out, please enter the BIOS Setup the <Peripheral Setup> menu, the <OnBoard PCI IDE> and <IDE
Prefetch> these two items must set to Primary.
NOTE: 1. If you program the watchdog to generate IRQ15 signal when it times out, you should initial IRQ15
interrupt vector and enable the second interrupt controller (825 9 PIC) in order to enable CPU to pr ocess
this interrupt. An interrupt service routine is required too.
2. Before you initial the interrupt vector of IRQ15 and enable the PIC, please enable the watchdog ti mer
previously, otherwise the watchdog timer will generate an interrupt at the time watchdog timer is enabled .
SW1
On
Off
Factory-Default Setting
1432
SW1
On
I/O Port 214h
Off
I/O Port 294h
1432
Figure 5-1 SW1: Watchdog I/O Port Address Select
5.3.2 Watchdog Timer Enabled
To enable the watchdog timer, you have to output a byte of timer factor to the watchdog register whose addr ess is
214H or Base Port. The following is a BASICA program, which demonstrates how to enable the watchdog timer
and set the time-out period at 24 seconds.
1000 REM Points to command register
1010 WD_REG% = 214H
1020 REM Timer factor = 84H (or 0C4H)
1030 TIMER_FACTOR% = %H84
1040 REM Output factor to watchdog register
1050 OUT WD_REG%, TIMER_FACTOR%
.,etc.
5.3.3 Watchdog Timer Trigger
After you enable the watchdog timer, your program must write the same factor as en abling to the watchdog register
at least once every time-out period to its previous setting. You can change the time-out period by writing anot her
timer factor to the watchdog register at any time, and you must trigger the watchdog before the n ew time-out period
in next trigger. Below is a BASICA program, which demonstrates how to trigger the watchdog timer:
2000 REM Points to command register
2010 WD_REG% = 214H
2020 REM Timer factor = 84H (or 0C4H)
2030 TIMER_FACTOR% = &H84
2040 REM Output factor to watchdog register
2050 OUT WD_REG%, TIMER_FACTOR%
.,etc.
5.3.4 Watchdog Timer Disabled
To disable the watchdog timer, simply write a 00H to the w atchdog register.
3000 REM Points to command register
3010 WD_REG% = BASE_PORT%
3020 REM Timer factor = 0
3030 TIMER_FACTOR% = 0
3040 REM Output factor to watchdog register
3050 OUT WD_REG%, TIMER_FACTOR%
., etc.
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6. BIOS CONSOLE
This chapter describes the AR-B1476 BIOS menu displays and explains how to perform common tasks nee ded to
get up and running, and presents detailed explanations of the elements found in eac h of the BIOS menus. The
following topics are covered:
z BIOS Setup Overview
z Standard CMOS Setup
z Advanced CMOS Setup
z Advanced Ch ipset Setup
z Peripheral Setup
z Auto-Detect Hard Disks
z Password Setting
z Load Default Setting
z BIOS Exit
z BIOS Update
6.1 BIOS SETUP OVERVIEW
BIOS is a program used to initialize and set up the I/O system of the computer, which includes the ISA bus and
connected devices such as the video display, diskette drive, and the keyboard.
The BIOS provides a menu-based interface to the console subsystem. The co nsole subsystem contains special
software, called firmware that interacts directly with the hardware components and facilitates interaction between
the system hardware and the operating system.
The BIOS Default Values ensure that the system will function at its normal capability. In the worst situation the
user may have corrupted the original settings set by the manufacturer.
After the computer turned on, the BIOS will perform a diagnostics of the system and will display the size of the
memory that is being tested. Press the [Del] key to enter the BIOS Setup program, and then the mai n menu will
show on the screen.
The BIOS Setup main menu includes some options. Use the [Up/Down] arrow key to highlight the option that you
wish to modify, and then press the [Enter] key to assure the option and configure the functions.
AMIBIOS HIFLEX SETUP UTILITY - VERSION 1.16
(C) 1996 American Megatrends, Inc. All Rights Reserved
Standard CMOS Setup
Advanced CMOS Setup
Advanced Chipset Setup
Peripheral Setup
Auto-Detect Hard Disks
Change User Password
Change Supervisor Password
Auto Configuration with Optimal Settings
Auto Configuration with Fail Safe Settings
Save Settings and Exit
Exit Without Saving
Standard CMOS setup for changing time, date, hard disk type, etc.
ESC:Exit ↑↓:Sel F2/F3:Color F10:Save & Exit
Figure 6-1 BIOS: Setup Main Menu
CAUTION: 1. AR-B1476 BIOS the factory-default setting is used to the <Auto Configuration with Optimal Settings>
Acrosser recommends using the BIOS default setting, unless you are very familiar with the setting
function, or you can contact the technical support engineer.
2. If the BIOS loss setting, the CMOS will detect the <Auto Configuration with Fail Safe Settings> to
boot the operation system, this option will reduce the performance of the system. Acrosser
recommends choosing the <Auto Configuration with Optimal Setting> in the main menu. The option
is best-case values that should optimize system performance.
3. The BIOS settings are described in detail in this section.
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AR-B1476 User’s Guide
6.2 STANDARD CMOS SETUP
The <Standard CMOS Setup> option allows you to record some basic s ystem hardware configuration and set the
system clock and error handling. If the CPU board is already installed in a working system, you will not need to
select this option anymore.
AMIBIOS SETUP - STANDARD CMOS SETUP
(C) 1996 American Megatrends, Inc. All Rights Reserved
Date (mm/dd/yyyy): Sat Dec 05,1998 640K
Time (hh/mm/ss): 13:13:00 39MB
Floppy Drive A: Not Installed
Floppy Drive B: Not Installed
LBA Blk PIO 32Bit
Pri Master : Auto Off Off Auto Off
Pri Slave : Auto Off Off Auto Off
Boot Sector Virus Protection Disabled
Month: Jan - Dec ESC:Exit ↑↓:Sel
Day: 01 - 31 PgUp/PgDn:Modify
Year: 1901 - 2099 F2/F3:Color
Date & Time Setup
Highlight the <Date> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the month, day and year format.
Highlight the <Time> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the hour, minute and second format.
The user can bypass the date and time prompts by creating an AUT OEXEC.BAT file. For information on how to
create this file, please refer to the MS-DOS manual.
Floppy Setup
The <Standard CMOS Setup> option records the types of floppy disk drives installed in the system.
To enter the configuration value for a particular drive, highlight its corresponding field and then select the drive t ype
using the left-or right-arrow key.
Hard Disk Setup
The BIOS supports various types for user settings, The BIOS supports <Pri Master> and <Pri Slave> so the user
can install up to two hard disks. For the master and slave jumpers, please refer to the hard disk’s installation
descriptions and the hard disk jumper settings.
You can select <AUTO> under the <TYPE> and <MODE> fields. This will enable auto detection of your IDE drives
during bootup. This will allow you to change your hard drives (with the power off) and then power on without
having to reconfigure your hard drive type. If you use older hard disk drives, which do not support this feature,
then you must configure the hard disk drive in the standard method as described abov e by the <USER> option.
Boot Sector Virus Protection
This option protects the boot sector and partition table of your hard dis k against accidental modifications. Any
attempt to write to them will cause the system to halt and display a warning message. If this occurs, you can either
allow the operation to continue or use a bootable virus-free floppy disk to reboot and inv estigate your system. The
default setting is <Disabled>. This setting is recommended because it conflicts with new operating systems.
Installation of new operating system requires that you disable this to prevent write errors.
Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode
Figure 6-2 BIOS: Standard CMOS Setup
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6.3 ADVANCED CMOS SETUP
The <Advanced CMOS SETUP> option consists of configuration entries that allo w you to improve your system
performance, or let you set up some system features according to your preference. Some entries here are
required by the CPU board’s design to remain in their default settings.
AMIBIOS SETUP - ADVANCED CMOS SETUP
(C) 1996 American Megatrends, Inc. All Rights Reserved
BootUp Sequence C:,A:,CDROM
BootUp Num-Lock On
Floppy Drive Swap Disabled
Floppy Drive Seek Disabled
Mouse Support Enabled
Typematic Rate Fast
System Keyboard Present
Primary Display VGA/EGA
Password Check Setup
Wait For
Hit
Internal Cache WriteBack
External Cache WriteThru
System BIOS Cacheable Enabled
Hard disk Delay 3 Sec
C000, 16k Shadow Enabled
C400, 16k Shadow Enabled
C800, 16k Shadow Disabled
CC00, 16k Shadow Disabled
D000, 16k Shadow Disabled
D400, 16k Shadow Disabled
D800, 16k Shadow Disabled
DC00, 16k Shadow Disabled
‘F1’ If Error Enabled
‘DEL’ Message Display Enabled
Available Options:
C:, A:. CDROM
A:, C:, CDROM
CDROM, A:, C:
ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F2/F3:Color
Figure 6-3 BIOS: Advanced CMOS Setup
BootUp Sequence
The option determines where the system looks first for an operating system.
BootUp Num-Lock
This item is used to activate the Num-Lock function upon system boot. If the setting is on, after a boot, the NumLock light is lit, and user can use the number key.
Floppy Drive Swap
The option reverses the drive letter assignments of your floppy d isk drives in the Swap A, B setting, otherwise
leave on the default setting of Disabled (No Swap). This works separately from the BIOS Features floppy disk
swap feature. It is functionally the same as physically interchanging the conn ectors of th e flopp y disk drives. Whe n
the setting is <Enabled>, the BIOS will be swapped floppy drive assignments so that Drive A becomes Drive B,
and Drive B becomes Drive A under DOS.
Floppy Drive Seek
If the <Floppy Drive Seek> item is setting Enabled, the BIOS will seek the floppy <A> drive one time upon boot up.
Mouse Support
The setting of Enabled allows the system to detect a PS/2 mouse on boot up. If detected, IRQ12 will be used for
the PS/2 mouse. IRQ 12 will be reserved for expansion cards if a PS/2 mouse is not detected. Disabled will
reserve IRQ12 for expansion cards and therefore the PS/2 mouse will not function.
Typematic Rate
This item specifies the speed at which a keyboard keystroke is repeated.
System Keyboard
This function specifies that a keyboard would be attached to the computer.
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Primary Display
The option is used to set the type of video display card installed in the syst em.
Password Check
This option enables password checking every time the computer is powered on or every time the BIOS Setup is
executed. If Always is chosen, a user password prompt appears every time the computer is turned on. If Setup is
chosen, the password prompt appears if the BIOS executed.
Wait for ‘F1’ If Error
AMIBIOS POST error messages are followed by:
Press <F1> to continue
If this option is set to Disabled, the AMIBIOS does not wait for you to press the <F1> key after an error message.
Hit ‘DEL’ Message Display
Set this option to Disabled to prevent the message as follows:
Hit ‘DEL’ if you want to run setup
It will prevent the message from appearing on the first BIOS screen when the computer boots.
Internal Cache
This option specifies the caching algorithm used for L1 internal cache memory. The settings are:
Setting Description
Disabled
WriteBack
WriteThru
Table 6-1 Internal Cache Setting
Neither L1 internal cache memory on the CPU or L2
secondary cache memory is enabled.
Use the write-back caching algorithm.
Use the write-through caching algorithm.
External Cache
This option specifies the caching algorithm used for L2 secondary (external) cache memory. The settings are:
Setting Description
Disabled Neither L1 internal cache memory on the CPU or L2
secondary cache memory is enabled.
WriteBack Use the write-back caching algorithm.
WriteThru Use the write-through caching algorithm.
Table 6-2 External Cache Setting
System BIOS Cacheable
When this option is set to Enabled, the contents of the F0000h system memory segment can be read from or
written to L2 secondary cache memory. The contents of the F0000h memory segment are always copied from the
BIOS ROM to system RAM for faster execution.
The settings are Enabled or Disabled. The Optimal default setting is Enabled. The Fail-Safe default setting is
Disabled.
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Shadow
These options control the location of the contents of the 32KB of ROM beginning at the specified memor y location.
If no adapter ROM is using the named ROM area, this area is made available to the local bus. The settings are:
SETTING DESCRIPTION
Disabled
Enabled
Cached
Table 6-3 Shadow Setting
The video ROM is not copied to RAM. The contents of
the video ROM cannot be read from or written to cache
memory.
The contents of C000h - C7FF Fh are written to the same
address in system memory (RAM) for faster execution.
The contents of the named ROM area are written to the
same address in system memory (RAM) for faster
execution, if an adapter ROM will be using the named
ROM area. Also, the contents of the RAM area can be
read from and written to cache memory.
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6.4 ADVANCED CHIPSET SETUP
This option controls the configuration of the board’s c hipset. Control keys for this screen are the same as for the
previous screen.
AMIBIOS SETUP - ADVANCED CHIPSET SETUP
(C) 1996 American Megatrends, Inc. All Rights Reserved
Auto Config Function Enabled
AT Bus Clock CLK/4
DRAM Read Timing Normal
DRAM Write Timing Normal
Memory Parity Check Disabled
DRAM Hidden Refresh Enabled
DRAM Refresh Period Setting 60us
Memory Hole At 15-16M Disabled
ISA I/O Recovery Disabled
ISA I/O Recovery time 1.5us
Available Options :
Disabled
Enabled
ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F2/F3:Color
Figure 6-4 BIOS: Advanced Chipset Setup
Automatic Configuration
If se lect ing a c erta in se tting for o ne BI OS Set up op tion d eter mines the settings for one or more other BIOS Setup
options, the BIOS automatically assigns the dependent settings and does not permit the end user to modify these
settings unless the setting for the parent option is changed. Invalid options are grayed and cannot be selected.
AT Bus Clock
This option sets the polling clock speed of ISA Bus (PC/104).
NOTE:
1. PCLK means the CPU inputs clock.
2. Acrosser recommends user setting at the range of 8MHz to 10MHz.
Memory Parity Check
This option Enables or Disables parity is error checking for all system RAM. This option must be Disabled if the
used DRAM SIMMs are 32-bit but not 36-bit devices.
Memory Hole at 15-16 M
This option specifies the range 15MB to 16MB in memory that cannot be addressed on the ISA bus.
ISA I/O Recovery
ISA I/O Recovery Time
These options specify the length of the delay (in BUSCLK) inserted between consecutive 8-bit/16-bit I/O operations.
6-6
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6.5 PERIPHERAL SETUP
This section is used to configure peripheral features.
AMIBIOS SETUP - PERIPHERAL SETUP
(C) 1996 American Megatrends, Inc. All Rights Reserved
AR-B1476 User’s Guide
OnBoard FDC Enabled
OnBoard Serial Port1 3F8
OnBoard Serial Port1 IRQ 4
OnBoard Serial Port2 2F8
OnBoard Serial Port2 IRQ 3
OnBoard Parallel Port 378
Parallel Port Mode Normal
EPP Version N/A
Parallel Port IRQ 7
Parallel Port DMA Channel N/A
OnBoard PCI IDE Both
Available Options :
Auto
Disabled
Enabled
ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify
F2/F3:Color
Figure 6-5 BIOS: Peripheral Setup
OnBoard FDC
This option enables the floppy drive controller on the AR-B1476.
OnBoard Serial Port
This option enables the serial port on the AR-B1476.
OnBoard Parallel Port
This option enables the parallel port on the AR-B1476.
Parallel Port Mode
This option specifies the parallel port mode. ECP and EPP are both bi-directional data transfer schemes that
adhere to the IEEE P1284 specifications.
Parallel Port DMA Channel
This option is only available if the setting for the parallel Port Mode option is ECP.
OnBoard PCI IDE/IDE Prefetch
This option specifies the onboard IDE controller channels that will be used.
6.6 AUTO-DETECT HARD DISKS
This option detects the parameters of an IDE hard disk drive, and automatically enters them into the Standar d
CMOS Setup screen.
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6.7 PASSWORD SETTING
This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a
password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor
password or a User password.
6.7.1 Setting Password
Select the appropriate password icon (Supervisor or User) from the Securit y section of the BIOS Setup main menu.
Enter the password and press [Enter]. The screen does not display the characters entered. After the new
password is entered, retype the new password as prompted and press [Enter].
If the password confirmation is incorrect, an error message appears. If the new password is entered without error,
press [Esc] to return to the BIOS Main Menu. The password is stored in CMOS RAM after BIOS completes. The
next time the system boots, you are prompted for the password function is present and is enabled.
Enter new supervisor password:
6.7.2 Password Checking
The password check option is enabled in Advanced Setup by choosing either Always (the password prompt
appears every time the system is powered on) or Setup (the password prompt appear s only when BIOS is run).
The password is stored in CMOS RAM. User can enter a password by typing on the keyboard. As user selec t
Supervisor or User. The BIOS prompts for a password, user must set the Supervisor password before user can
set the User password. Enter 1-6 character as password. The password does not appear on the s creen when
typed. Make sure you write it down.
6.8 LOAD DEFAULT SETTING
In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items
to quickly set system configuration parameters, you can choos e a group of settings that have a better chance of
working when the system is having configuration related problems.
6.8.1 Auto Configuration with Optimal Setting
User can load the optimal default settings for the BIOS. The Optimal default settings are best-case values that
should optimize system performance. If CMOS RAM is corrupted, the optimal settings are loaded automatically.
Load high performance settings (Y/N) ?
6.8.2 Auto Configuration with Fail Safe Setting
User can load the Fail-Safe BIOS Setup option settings by selecting the Fail-Safe item from the Default section of
the BIOS Setup main menu.
The Fail-Safe settings provide far from optimal system performance, but are the most stable settings. Use this
option as a diagnostic aid if the system is behaving erratically.
Load failsafe settings (Y/N) ?
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6.9 BIOS EXIT
This section is used to exit the BIOS main menu in two types situation. After making your changes, you can either
save them or exit the BIOS menu and without saving the new values.
6.9.1 Save Settings and Exit
This item set in the <Standard CMOS Setup>, <Advanced CMOS Setup>, <Advanced Chipset Setup> and the new
password (if it has been changed) will be stored in the CM OS. The CMOS checksum is calculated and written into
the CMOS.
As you select this function, the following message will appear at the center of the screen to assist you to save data
to CMOS and Exit the Setup.
Save current settings and exit (Y/N) ?
6.9.2 Exit Without Saving
When you select this option, the following message will appear at the center of the screen to help to Abandon a ll
Data and Exit Setup.
Quit without saving (Y/N) ?
6.10 BIOS UPDATE
The BIOS program instructions are contained within computer chips called F LASH ROMs that are located on your
system board. The chips can be electronically reprogrammed, allowing you to upgrade your BIOS firmware
without removing and installing chips.
The AR-B1476 provides FLASH BIOS update function for you to easily upgrade newer BIOS version. Please
follow the operating steps for updating new BIOS:
Step 1:
Step 2:
Step 3:
Step 4:
Step 5:
Step 6:
Step 7:
Turn on your system and don’t detect the CONFIG.SYS and AUTOEXEC.BAT files. Keep your
system in the real mode.
Insert the FLASH BIOS diskette into the floppy disk drive.
In the MS-DOS mode, you can type the AMIFLASH program.
A:\>AMIFLASH
The screen will show the message as follow:
Enter the BIOS File name from which Flash EPROM will be programmed. The File name must and
with a <ENTER> or press <ESC> to exit.
And then please enter the file name to the box of <Enter File Name>. And the bo x of <Message>
will show the notice as follow. In the bottom of this window always show the gray statement.
Flash EPROM Programming is going to start. System will not be usable until Programming of Flash
EPROM is successfully complete. In case of any error, existing Flash EPROM must be replaced by
new program Flash EPROM.
As the gray statement, press the <Y> key to updating the new BIOS.
And then the <Message> box will show the <Programming Flash EPROM>, and the gray statement
shows <Please Wait>.
The BIOS update is successful, the message will show <Flash Update Completed - Pass>.
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NOTE: 1. After turn on the computer and the system didn’t detect the boot procedure, please press t he [F5] key
immediately. The system will pass the CONFIG.SYS and AUTOEXEC.BAT files.
2. The BIOS Flash disk is not the standard accessory. Now the onboard BIOS is the newest BIOS, if user
needs adding some functions in the future please contact technical supporting engineers, they will
provide the newest BIOS for updating.
3. The file of AMIFLASH.EXE doesn’t attach in the utility diskette. If user needs to update the BIOS version
for some reasons please contact the technical supporting engineers, and notices the file of
AMIFLASH.EXE has to use the Version 6.31.
Serial Port:
Keyboard:
Watchdog:
Speaker:
Real Time Clock:
BIOS:
Flash Disk:
BUS Drive Cap.:
CE Design-In:
Indicator:
Power Req.:
PC Board:
Dimensions:
Supports25 to 133 Mhz Intel / AMD / Cyrix / ST / IBM 486 CPU .
ALI M1489/M1487 and C & T 65545
ISA (PC/AT) and non-stack through PC/104 bus
Supports FPM/EDO RAM, 72 MB maximum (8MB on-board and one 72-pin SIMMs w/o DRAM)
512KB for standard
1 MB VRAM (PCI bus, 1024X768/256 colors)
One PCI IDE Supports LBA/Block mode access
Supports two 5.25” or 3.5” floppy disk drives
1 bi-directional centronics type parallel port
Supports SPP/EPP/ECP mode
1 RS-232C and 1 RS-232C/RS-485
PC/AT compatible keyboard
Programmable watchdog timer 3 to 42 seconds time interval
On-board Buzzer and external speaker
BQ3287MT or compatible chips with 128 bytes data RAM
AMI Flash BIOS (128KB, including VGA BIOS)
Supports 1 DiskOnChip socket
15 TTL level loads maximum
Add EMI components to COM ports, parallel port, CRT, keyboard, and PS/2 mouse
Power LED, and watchdog LED
+5V only, 2.0A maximum (base on Intel DX4-100)
8 layers, EMI considered
185 mmX122mm (7.29”X4.80”)
AR-B1476 User’s Guide
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8. PLACEMENT & DIMENSIONS
8.1 PLACEMENT
AR-B1476 User’s Guide
LED1
1
SIMM1
J2
JP1
U2
CN1
P1
P2
J1
BUS1
JP5
J3
JP2
J4
U12U11U10U9
1
J8
SW1
U3
CN7
LED2
U16
CN2
1
0
5
104
CN8
105
JP6
JP7
[DOC]
CN4
CN5
J6
JP4
CN3
4
0
1
JP3
J5
J7
CN6
J11
U4
U7
J10
JP8
M12
M13
M10
JP9
M11
M7M6M5M4M3M2M1
DB1
DB2
1
U8
U18
J9
BUS2
CN9
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AR-B1476 User’s Guide
7
8.2 DIMENSIONS
4800
800
29001100
455
150
445
185
125
825
130
825
−∅138
460
984
3950
3180
3130
930
600
450
25
300
95
210
1700
95
210
400
3150
3000
210
185
369
95
905
940
345
600
984
2145
805
7280
Unit: mil (1 inch = 25.4 mm = 1000 mil)
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/
9. PROGRAMMING RS-485 & INDEX
9.1 PROGRAMMING RS-485
The majority communicative operation of the RS-485 is in the same of the RS-232. When the RS-485 proceeds
the transmission which needs control the TXC signal, and the installing steps are as follows:
Step 1:
Step 2:
Step 3:
Step 4:
NOTE: Please refer to the section of the “Serial Port” in the chapter “System Control” for the detail description of
(1) Initialize COM port
Step 1:
Step 2:
NOTE:
(2) Send out one character (Transmit)
Step 1:
Step 2:
Step 3:
Step 4:
(3) Send out one block data (Transmit – the data more than two characters)
Step 1:
Step 2:
Step 3:
Step 4:
(4) Receive data
The RS-485’s operation of receiving data is in the same of the RS-232’s.
Enable TXC
Send out data
Waiting for data empty
Disable TXC
the COM port’s register.
Initialize COM port in the receiver interrupt mode, and
communication protocol buses of the RS-485 are in the same.)
Disable TXC (transmitter control), the bit 0 of the address of offset+4 just sets “0”.
Control the AR-B1476 CPU card’s DTR signal to the RS-485’s TXC communication.
Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.
Send out the data. (Write this character to the offset+0 of the current COM port address)
Wait for the buffer’s data empty. Check transmitter holding register (THRE, bit 5 of the address of
offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be
“0”.
Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”
Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.
Send out the data. (Write all data to the offset+0 of the current COM port address)
Wait for the buffer’s data empty. Check transmitter holding register (THRE, bit 5 of the address of
offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be
“0”.
Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”
or transmitter interrupt mode. (All of the
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(5) Basic Language Example
a.) Initial 86C450 UART
10 OPEN “COM1:9600,m,8,1”AS #1 LEN=1
20 REM Reset DTR
30 OUT &H3FC, (INP(%H3FC) AND &HFA)
40 RETURN
b.) Send out one character to COM1
10 REM Enable transmitter by setting DTR ON
20 OUT &H3FC, (INP(&H3FC) OR &H01)
30 REM Send out one character
40 PRINT #1, OUTCHR$
50 REM Check transmitter holding register and shift register
60 IF ((INP(&H3FD) AND &H60) >0) THEN 60
70 REM Disable transmitter by resetting DTR
80 OUT &H3FC, (INP(&H3FC) AND &HEF)
90 RETURN
c.) Receive one character from COM1
10 REM Check COM1: receiver buffer
20 IF LOF(1)<256 THEN 70
30 REM Receiver buffer is empty
40 INPSTR$”
50 RETURN
60 REM Read one character from COM1: buffer
70 INPSTR$=INPUT$(1,#1)
80 RETURN
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9.2 INDEX
Name Function Page
CN1 Hard disk (IDE) connector 3-2
CN2 FDD port connector 3-3
CN3 LCD panel display connector 4-3
CN4 Parallel port connector 3-3
CN5 RS-232 connector COM-B 3-8
CN6 PS/2 mouse connector 3-10
CN7 64 pin PC/104 connector bus A & B 3-4
CN8 40 pin PC/104 connector bus C & D 3-4
CN9 Keyboard connector 3-9