Acrosser AR-B1462A User Manual

AR-B1462

INDUSTRIAL GRADE

486DX/DX2/DX4 CPU CARD

User’ s Guide

Edition: 2.2

Book Number: AR-B1462-02.0626

AR-B1462 User’s Guide

Table of Contents

0.

PREFACE..............................................................................................................................................................3

0.1 COPYRIGHT NOTICE AND DISCLAIMER............................................................................................................................ 3

0.2 WELCOME TO THE AR-B1462 CPU BOARD....................................................................................................................... 3

0.3 BEFORE YOU USE THIS GUIDE.........................................................................................................................................3

0.4 RETURNING YOUR BOARD FOR SERVICE ....................................................................................................................... 3

0.5 TECHNICAL SUPPORT AND USER COMMENTS...............................................................................................................3

0.6 ORGANIZATION................................................................................................................................................................... 4

0.7 STATIC ELECTRIC ITY PRECAUTIONS............................................................................................................................... 4

1. OVERVIEW............................................................................................................................................................5

1.1 INTRODUCTION...................................................................................................................................................................5

1.2 PACKING LIST ..................................................................................................................................................................... 6

1.3 FEATURES........................................................................................................................................................................... 6

2. SYSTEM CONTROLLER.......................................................................................................................................7

2.1 DMA CONTROLLER............................................................................................................................................................. 7

2.2 KEYBOARD CONTROLLER.................................................................................................................................................7

2.3 INTERRUPT CONTROLLER.................................................................................................................................................8

2.3.1 I/O Port Address Map.................................................................................................................................................... 9

2.3.2 I/O Channel Pin Assignment (Bus1).............................................................................................................................. 9

2.4 REAL-TIME CLOCK AND NON-VOLATILE RAM................................................................................................................11

2.5 TIMER................................................................................................................................................................................. 11

2.6 SERIAL PORT.................................................................................................................................................................... 12

2.7 PARALLEL PORT............................................................................................................................................................... 14

3. SETTING UP THE SYSTEM................................................................................................................................17

3.1 OVERVIEW......................................................................................................................................................................... 17

3.2 SYSTEM SETTING............................................................................................................................................................. 18

3.2.1 FDD Port Connector (CN8).......................................................................................................................................... 18

3.2.2 Hard Disk (IDE) Connector.......................................................................................................................................... 19

3.2.3 Parallel Port Connector (CN9)..................................................................................................................................... 20

3.2.4 PC/104 Connector....................................................................................................................................................... 21

3.2.5 LED Header (LM1)...................................................................................................................................................... 23

3.2.6 Serial Port................................................................................................................................................................... 23

3.2.7 Keyboard Connector (J7).............................................................................................................................................27

3.2.8 External Speaker Header (J9) ..................................................................................................................................... 27

3.2.9 Power Connector.........................................................................................................................................................27

3.2.10 Reset Header (J6)....................................................................................................................................................... 28

3.2.11 PS/2 Mouse Connector............................................................................................................................................... 28

3.2.12 Battery Setting.............................................................................................................................................................29

3.2.13 26-Pin Audio Connector (CN10).................................................................................................................................. 29

3.2.14 CPU Setting................................................................................................................................................................ 30

3.2.15 PCI Connector............................................................................................................................................................. 31

3.2.16 Memory Setting........................................................................................................................................................... 32

3.2.17 D.O.C and SSD Installation......................................................................................................................................... 32

3.3 ETHERNET CONTROLLER................................................................................................................................................ 35

3.3.1 Network 4-Pin Connector (J3)...................................................................................................................................... 35

3.3.2 AUI Connector (CN2) .................................................................................................................................................. 35

4. CRT/LCD FLAT PANEL DISPLAY......................................................................................................................36

4.1 CONNECTING THE CR T MONITOR.................................................................................................................................. 36

4.1.1 CRT Connector (CN13)............................................................................................................................................... 36

4.2 LCD FLAT PANEL DISPLAY............................................................................................................................................... 37

4.2.1 Inverter Board De s cr i ption........................................................................................................................................... 38

4.2.2 LCD Connector............................................................................................................................................................ 38

4.3 SUPPORTED LCD PANEL................................................................................................................................................. 39

5. INSTALLATION...................................................................................................................................................40

5.1 OVERVIEW......................................................................................................................................................................... 40

5.2 UTILITY DISKETTE ............................................................................................................................................................ 40

5.2.1 VGA Driver.................................................................................................................................................................. 41

5.2.2 Audio Driver................................................................................................................................................................ 43

5.2.3 Network & SSD Utility.................................................................................................................................................. 45

5.3 WATCHDOG TIMER........................................................................................................................................................... 48

5.3.1 Watchdog Timer Setting.............................................................................................................................................. 48

5.3.2 Watchdog Timer Enabled............................................................................................................................................ 49

5.3.3 Watchdog Timer Trigger.............................................................................................................................................. 49

5.3.4 Watchdog Timer Disabled........................................................................................................................................... 49

6. SOLID STATE DISK............................................................................................................................................50

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AR-B1462 User’s Guide

6.1 OVERVIEW......................................................................................................................................................................... 50

6.2 SWITCH SETTING.............................................................................................................................................................. 50

6.2.1 Overview..................................................................................................................................................................... 51

6.2.2 I/O Port Address Select (SW1-1)................................................................................................................................. 51

6.2.3 SSD Firmware Add r e ss Select (SW1-2)...................................................................................................................... 51

6.2.4 SSD Drive Number (SW1-4 & SW1-5)......................................................................................................................... 52

6.2.5 ROM Type Select (SW1-6 & SW1-7)........................................................................................................................... 53

6.2.6 Serial Port 1 Mode Select (SW1-8).............................................................................................................................. 53

6.2.7 Serial Port 2 Mode Select (SW1-9 & S W1-10)............................................................................................................. 54

6.3 JUMPER SETTING............................................................................................................................................................. 54

6.4 ROM DISK INSTALLATION................................................................................................................................................ 55

6.4.1 UV EPROM (27Cxxx).................................................................................................................................................. 55

6.4.2 Large Page 5V FLASH Disk........................................................................................................................................ 56

6.4.3 Small Page 5V FLASH ROM Disk............................................................................................................................... 58

6.4.4 RAM Disk.................................................................................................................................................................... 60

6.4.5 Combination of ROM and RAM Disk............................................................................................................................ 61

6.5 DISKONCHIP INSTALLATION............................................................................................................................................ 61

7. BIOS CONSOLE..................................................................................................................................................63

7.1 BIOS SETUP OVER VI EW................................................................................................................................................... 63

7.2 STANDARD CMOS SETUP................................................................................................................................................ 64

7.3 ADVANCED CMOS SETUP................................................................................................................................................ 65

7.4 ADVANCED CHIPSET SETUP........................................................................................................................................... 68

7.5 PERIPHERAL SETUP......................................................................................................................................................... 69

7.6 AUTO-DETECT HARD DISKS............................................................................................................................................ 69

7.7 PASSWORD SETTING....................................................................................................................................................... 69

7.7.1 Setting Password ........................................................................................................................................................ 70

7.7.2 Password Checking..................................................................................................................................................... 70

7.8 LOAD DEFAULT SETTING................................................................................................................................................. 70

7.8.1 Auto Configura tio n with Optimal Setting....................................................................................................................... 70

7.8.2 Auto Configura tio n with Fail Safe Setting..................................................................................................................... 70

7.9 BIOS EXIT.......................................................................................................................................................................... 70

7.9.1 Save Settings and Exit ................................................................................................................................................ 70

7.9.2 Exit Without Saving..................................................................................................................................................... 71

7.10

8. SPECIFICATIONS & SSD TYPES SUPPORTED ...............................................................................................72

8.1 SPECIFICATIONS .............................................................................................................................................................. 72

8.2 SSD TYPES SUPPOR TED................................................................................................................................................. 72

9. PLACEMENT & DIMENSIONS............................................................................................................................74

9.1 PLACEMENT...................................................................................................................................................................... 74

9.2 DIMENSIONS..................................................................................................................................................................... 75

10. PROGRAMMING RS-485 & INDEX.....................................................................................................................76

10.1

10.2

BIOS UPDATE................................................................................................................................................................ 71

PROGRAMMING RS-485................................................................................................................................................76

INDEX............................................................................................................................................................................. 78

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AR-B1462 User’s Guide

0.PREFACE

0.1 COPYRIGHT NOTICE AND DISCLAIMER

April 1999

This document is copyrighted, 2002, by Acrosser Technology Co., Ltd. All rights are reserved. No part of this
manual may be reproduced, copied, transcribed, stored in a retrieval system, or translated into any language or
computer language in any form or by any means, such as electronic, mechanical, magnetic, optical, chemical,
manual or other means without the prior written permission of original manufacturer.
Acrosser Technology assumes no responsibility or warranty with respect to the content in this manual and
specifically disclaims any implied warranty of merchantability or fitness for any particular purpose. Furthermore,
Acrosser Technology reserves the right to make improvements to the products described in this manual at any
times without notice. Such revisions will be posted on the Internet (WWW.ACROSSER.COM
Possession, use, or copy of the software described in this publication is authorized only pursuant to a valid written
license from Acrosser or an authorized sub licensor.

0.2WELCOME TO THE AR-B1462 CPU BOARD

This guide introduces the Acrosser AR-B1462 CPU board.
The information provided in this manual describes this card’s functions, and features. It also helps you start, set
up and operate your AR-B1462. General system information can also be found in this publication.

) as soon as possible.

0.3 BEFORE YOU USE THIS GUIDE

Please refer to the Chapter 3; “Setting Up the System” in this guide, if you have not already installed AR-B1462
Check the packing list before you install and make sure the accessories is completely included.
The AR-B1462 CD provides the newest information regarding the CPU card. Please refer to the README.DOC
file of the enclosed utility diskette. It contains the modification and hardware & software information, and
adding the description or modification of product function after manual published.

0.4 RETURNING YOUR BOARD FOR SERVICE

If your board requires any services, contact the distributor or sales representative from whom you purchased the
product for service information. If you need to ship your board to us for service, be sure it is packed in a protective
carton. We recommend that you keep the original shipping container for this purpose.

You can help assure efficient servicing for your product by following these guidelines:

1. Include your name, address, telephone and facsimile number where you may be reached during the day.

2. A description of the system configuration and/or software at the time is malfunction.

3. A brief description is in the problem occurred.

0.5 TECHNICAL SUPPORT AND USER COMMENTS

User’s comments are always welcome as they assist us in improving the quality of our products and the
readability of our publications. They create a very important part of input used for product enhancement and
revision.
We may use and distribute any of the information you provide in any way appropriate without incurring any
obligation. You may, of course, continue to use the information you provide.
If you have any suggestions for improving particular sections or if you find any errors on it, please send your
comments to Acrosser Technology Co., Ltd. or your local sales representative and indicate the manual title and
book number.
Internet electronic mail to: [e-mail]

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AR-B1462 User’s Guide

0.6 ORGANIZATION

This information for users covers the following topics (see the Table of Contents for a detailed listing):

! Chapter 1, “Overview”, provides an overview of the system features and packing list.
! Chapter 2, “System Controller” describes the major structure.
! Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.
! Chapter 4, “CRT/LCD Flat Panel Display”, describes the configuration and installation procedure using

the LCD and CRT display.

! Chapter 5, “Installation”, describes setup procedures including information on the utility diskette.
! Chapter 6, “Solid State Disk”, describes the various type SSDs’ installation steps.
! Chapter 7, “BIOS Console”, providing the BIOS options setting.
! Chapter 8, Specifications & SSD Types Supported
! Chapter 9, Placement & Dimensions
! Chapter 10, Programming RS-485 & Index

0.7 STATIC ELECTRICITY PRECAUTIONS

Before removing the board from its anti-static bag, read this section about static electricity precautions.
Static electricity is a constant danger to computer systems. The charge that can build up in your body may be
more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic
precautions whenever you use or handle computer components. Although areas with humid climates are much
less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The
following measures should generally be sufficient to protect your equipment from static discharge:

• Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded
wrist strap).

• When unpacking and handling the board or other system component, place all materials on an antic static
surface.

• Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom
of every board.

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AR-B1462 User’s Guide

1. OVERVIEW

This chapter provides an overview of your system features and capabilities. The following topics are covered:

!

Introduction

!

Packing List

!

Features

1.1 INTRODUCTION

The AR-B1462 is a disk size industrial grade CPU card that has been designed to withstand continuous operation
in harsh environments. The total on-board memory for the AR-B1462 can be configured from 1MB to 128MB by
using all 72-pin type DRAM SIMM devices.

The 8 layers PCB CPU card is equipped with a IDE HDD interface, a floppy disk drive adapter, 1 parallel port, 4
serial ports and a watchdog timer. Its dimensions are as compact as 146mmX203mm. It highly condensed
features make it an ideal cost/performance solution for high-end commercial and industrial applications where CPU
speeding and mean time between failure is critical.

The AR-B1462 provides 2 bus interfaces, ISA bus and PC/104 compatible expansion bus. Based on the PC/104
expansion bus, you could easy install thousands of PC/104 module from hundreds venders around the world. You
could also directly connect the power supply to the AR-B1462 on-board power connector in standalone
applications.

A watchdog timer has a software programmable time-out interval, is also provided on this CPU card. It ensures
that the system does not hang-up if a program cannot execute normally.

A super I/O chip (SMC37C669) is embedded in the AR-B1462 card. It combines functions of a floppy disk drive
adapter, a hard disk drive (IDE) adapter, four serial (with 16C550 UART) adapters and 1 parallel adapter. The I/O
port configurations can be done by set the BIOS setup program.

As an UART, the chip supports serial to parallel conversion on data characters received from a peripheral device
or a MODEM, and parallel to serial conversion on data character received from the CPU. The UART includes a
programmable baud rate generator; complete MODEM control capability and a processor interrupt system. As a
parallel port, the SMC37C669 provides the user with a fully bi-directional parallel centronics-type printer interface.

The special device is the AR-B1462 provides one audio connector; the sound system is built-in 16bit PnP sound
blaster with DOS and Windows drivers. In the same time the AR-B1462 provides network connectors that are 10M
bps NE2000 compatible. We designed the connectors for easily setup.

The super VGA controller supports CRT color monitor, STN, Dual-Scan, TFT, monochrome and colored panels. It
can be connected to create a compact video solution for the industrial environment. And provides the touch screen
header on the serial port 4 for multiple function.

Note: Just the AR-B1462A supported the audio function and supported 2MB on-board VRAM. The AR-B1462 only

supported 1MB on-board VRAM.

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AR-B1462 User’s Guide

1.2 PACKING LIST

The accessories are included with the system. Before you begin installing your AR-B1462 board, take a moment
to make sure that the following items have been included inside the AR-B1462 package.

!

The quick setup manual

!

1 AR-B1462 CPU card

!

1 Hard disk drive interface cable

!

1 Floppy disk drive interface cable

!

1 Parallel port interface cable

!

1 AUI cable

!

1 PS/2 mouse cable

!

1 RJ-45 network cable

!

1 20-pin RS-485/RS-422 adapter cable

!

1 10-pin to DB-15 VGA

!

4 phone-jack to DB-9 adapter

!

4 Software utility CD

If use the AR-B1462A CPU card, the card added the audio function the accessories also added as follows.

!

1 AR-B9425 card

!

1 audio adapter cable

1.3 FEATURES

The system provides a number of special features that enhance its reliability, ensure its availability, and improve its
expansion capabilities, as well as its hardware structure.

! All In One designed 486DX/DX2/DX4 CPU card.
! Supports 25 to 133 MHz 3.3V/3.45V/5V CPU with voltage regulator.
! Supports ISA bus and PC/104 bus.
! Supports 512KB cache on board.
! Supports two 72-pin DRAM SIMMs up to 128MB DRAM on board.
! Supports D.O.C. up to 72MB.
! Legal AMI BIOS.
! IDE hard disk drive interface.
! Floppy disk drive interface.
! Bi-direction parallel interface.
! 4 serial ports with 16C550 UART.
! Programmable watchdog timer.
! Build-in 16bit PnP sound blaster with DOS and Windows drivers
! Supports 10M bps NE2000 compatible chips.
! On-board built-in buzzer.
! 8 layers PCB.

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AR-B1462 User’s Guide

2. SYSTEM CONTROLLER

This chapter describes the major structure of the AR-B1462 CPU board. The following topics are covered:

! DMA Controller
! Keyboard Controller
! Interrupt Controller
! Real-Time Clock and Non-Volatile RAM
! Timer
! Serial Port
! Parallel Port

2.1 DMA CONTROLLER

The equivalent of two 8237A DMA controllers are implemented in the AR-B1462 board. Each controller is a four­channel DMA device that will generate the memory addresses and control signals necessary to transfer
information directly between a peripheral device and memory. This allows high speeding information t ransfer with less
CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for transfers to
8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides
the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.

Following is the system information of DMA channels:

DMA Controller 1 DMA Controller 2

Channel 0: Spare Channel 4: Cascade for controller 1
Channel 1: IBM SDLC Channel 5: Spare
Channel 2: Diskette adapter Channel 6: Spare
Channel 3: Spare Channel 7: Spare

Table 2-1 DMA Channel Controller

2.2 KEYBOARD CONTROLLER

The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives
serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data
in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the
system to poll its status register to determine when data is available.

Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.

Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The
keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be
sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full”
interruption may be used for both send and receive routines.

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AR-B1462 User’s Guide

2.3 INTERRUPT CONTROLLER

The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1462 board. They
accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the
CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service
routine to execute.

Following is the system information of interrupt levels:

InInterrupt Level

Description

NMI
CTRL1

IRQ 0
IRQ 1

Parity check
CTRL2

System timer interrupt from timer 8254
Keyboard output buffer full

IRQ 2

IRQ8 : Real time clock
IRQ9 : Rerouting to INT 0Ah from hardware IRQ2
IRQ10 : Reserved for LAN
IRQ11 : Serial port 4
IRQ12 : spare (PS/2 mouse)
IRQ13 : Math. coprocessor

IRQ14 : Hard disk adapter
IRQ15 : spare (Watchdog Timer)

IRQ 3
IRQ 4
IRQ 5
IRQ 6
IRQ 7

Serial port 2
Serial port 1
Serial port 3
Floppy disk adapter
Parallel port 1

Figure 2-1 Interrupt Controller

8

2.3.1 I/O Port Address Map

Hex Range Device

000-01F DMA controller 1
020-021 Interrupt controller 1
022-023 System -- ALI M1489/M1487

040-04F Timer 1
050-05F Timer 2
060-06F 8042 keyboard/controller
070-071 Real-time clock (RTC), non-maskable interrupt (NMI)
080-09F DMA page registers

0A0-0A1 Interrupt controller 2

0C0-0DF DMA controller 2

0F0 Clear Math Co-processor
0F1 Reset Math Co-processor

0F8-0FF Math Co-processor

170-178 Fixed disk 1

1F0-1F8 Fixed disk 0

201 Game port
208-20A EMS register 0
218-21A EMS register 1

278-27F Parallel printer port 2 (LPT 2)

2E8-2EF Serial port 4 (COM 4)

2F8-2FF Serial port 2 (COM 2)

300-31F Prototype card/streaming type adapter
320-33F LAN adapter
378-37F Parallel printer port 1 (LPT 1)

380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 3 (LPT 3)
3C0-3CF EGA/VGA adapter
3D0-3DF Color/graphics monitor adapter
3E8-3EF Serial port 3 (COM 3)

3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM 1)

Table 2-2 I/O Port Address Map

AR-B1462 User’s Guide

Video – C & T F65550 (PCI bus)
I/O – Two SMC FDC37C669 (ISA bus)
Audio – ESS ES1869S

2.3.2 I/O Channel Pin Assignment (Bus1)

I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output

A1 -IOCHCK Input B1 GND Ground
A2 SD7 Input/Output B2 RSTDRV Output
A3 SD6 Input/Output B3 +5V Power
A4 SD5 Input/Output B4 IRQ9 Input
A5 SD4 Input/Output B5 -5V Power
A6 SD3 Input/Output B6 DRQ2 Input
A7 SD2 Input/Output B7 -12V Power
A8 SD1 Input/Output B8 -ZWS Input

A9 SD0 Input/Output B9 +12V Power
A10 -IOCHRDY Input B10 GND Ground
A11 AEN Output B11 -SMEMW Output
A12 SA19 Input/Output B12 -SMEMR Output
A13 SA18 Input/Output B13 -IOW Input/Output

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AR-B1462 User’s Guide

I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output

A14 SA17 Input/Output B14 -IOR Input/Output
A15 SA16 Input/Output B15 -DACK3 Output
A16 SA15 Input/Output B16 DRQ3 Input
A17 SA14 Input/Output B17 -DACK1 Output
A18 SA13 Input/Output B18 DRQ1 Input
A19 SA12 Input/Output B19 -REFRESH Input/Output
A20 SA11 Input/Output B20 BUSCLK Output
A21 SA10 Input/Output B21 IRQ7 Input
A22 SA9 Input/Output B22 IRQ6 Input
A23 SA8 Input/Output B23 IRQ5 Input
A24 SA7 Input/Output B24 IRQ4 Input
A25 SA6 Input/Output B25 IRQ3 Input
A26 SA5 Input/Output B26 -DACK2 Output
A27 SA4 Input/Output B27 TC Output
A28 SA3 Input/Output B28 BALE Output
A29 SA2 Input/Output B29 +5V Power
A30 SA1 Input/Output B30 OSC Output
A31 SA0 Input/Output B31 GND Ground

Table 2-3 I/O Channel Pin Assignments

I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output

C1 -SBHE Input/Output D1 -MEMCS16 Input

C2 LA23 Input/Output D2 -IOCS16 Input

C3 LA22 Input/Output D3 IRQ10 Input

C4 LA21 Input/Output D4 IRQ11 Input

C5 LA20 Input/Output D5 IRQ12 Input

C6 LA19 Input/Output D6 IRQ15 Input

C7 LA18 Input/Output D7 IRQ14 Input

C8 LA17 Input/Output D8 -DACK0 Output

C9 -MRD16 Input/Output D9 DRQ0 Input
C10 -MWR16 Input/Output D10 -DACK5 Output
C11 SD8 Input/Output D11 DRQ5 Input
C12 SD9 Input/Output D12 -DACK6 Output
C13 SD10 Input/Output D13 DRQ6 Input
C14 SD11 Input/Output D14 -DACK7 Output
C15 SD12 Input/Output D15 DRQ7 Input
C16 SD13 Input/Output D16 +5V Power
C17 SD14 Input/Output D17 -MASTER Input
C18 SD15 Input/Output D18 GND Ground

Table 2-4 I/O Channel Pin Assignments

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AR-B1462 User’s Guide

2.4 REAL-TIME CLOCK AND NON-VOLATILE RAM

The AR-B1462 contains a real-time clock compartment that maintains the date and time in addition to storing
configuration information about the computer system. It contains 14 bytes of clock and control registers and 114
bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be
maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM
are listed as follows:

Address Description

00 Seconds
01 Second alarm
02 Minutes
03 Minute alarm
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A

0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte

10 Diskette drive type byte, drive A and B

11 Fixed disk type byte, drive C

12 Fixed disk type byte, drive D

13 Reserved

14 Equipment byte

15 Low base memory byte

16 High base memory byte

17 Low expansion memory byte

18 High expansion memory byte

19-2D Reserved
2E-2F 2-byte CMOS checksum

30 Low actual expansion memory byte

31 High actual expansion memory byte

32 Date century byte

33 Information flags (set during power on)

34-7F Reserved for system BIOS

Table 2-5 Real-Time Clock & Non-Volatile RAM

2.5 TIMER

The AR-B1462 provides three programmable timers, each with a timing frequency of 1.19 MHz.

Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)

Timer 1 This timer is used to trigger memory refresh cycles.

Timer 2 This timer provides the speaker tone.

Application programs can load different counts into this timer to generate various sound frequencies.

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AR-B1462 User’s Guide

2.6 SERIAL PORT

The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial
format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of
transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one,
one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and
produce a 16x clock for driving the internal transmitter logic.

Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed
MODEM control capability, and a processor interrupt system that may be software tailored to the computing time
required handle the communications link.

The following table is summary of each ACE accessible register

DLAB Port Address Register

Receiver buffer (read) 0 base + 0
Transmitter holding register (write)

0 base + 1 Interrupt enable
X base + 2 Interrupt identification (read only)
X base + 3 Line control
X base + 4 MODEM control
X base + 5 Line status
X base + 6 MODEM status
X base + 7 Scratched register

1 base + 0 Divisor latch (least significant byte)

1 base + 1 Divisor latch (most significant byte)

Table 2-6 ACE Accessible Registers

(1) Receiver Buffer Register (RBR)

Bit 0-7: Received data byte (Read Only)

(2) Transmitter Holding Register (THR)

Bit 0-7: Transmitter holding data byte (Write Only)

(3) Interrupt Enable Register (IER)

Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0

(4) Interrupt Identification Register (IIR)

Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0

12

(5) Line Control Register (LCR)

Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)

WLS1 WLS0 Word Length

0 0 5 Bits
0 1 6 Bits
1 0 7 Bits

1 1 8 Bits
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)

(6) MODEM Control Register (MCR)

Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0

(7) Line Status Register (LSR)

Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0

(8) MODEM Status Register (MSR)

Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)

AR-B1462 User’s Guide

13

AR-B1462 User’s Guide

(9) Divisor Latch (LS, MS)

LS MS

Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15

Table 2-7 Serial Port Divisor Latch

Desired Baud Rate Divisor Used to Generate 16x Clock

300 384

600 192
1200 96
1800 64
2400 48
3600 32
4800 24
9600 12

14400 8
19200 6
28800 4
38400 3
57600 2

115200 1

2.7 PARALLEL PORT

(1) Register Address

Port Address Read/Write Register

base + 0 Write Output data
base + 0 Read Input data
base + 1 Read Printer status buffer
base + 2 Write Printer control latch

Table 2-8 Registers’ Address

(2) Printer Interface Logic

The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel
data at standard TTL level.

(3) Data Swapper

The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading
the Data Swapper address.

14

AR-B1462 User’s Guide

(4) Printer Status Buffer

The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit
definitions are described as follows:

12345670

XXX

-ERROR
SLCT
PE

-ACK

-BUSY

Figure 2-2 Printer Status Buffer

NOTE: X presents not used.

Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the

print head is changing position or in an error state. When Bit 7 is active, the printer is busy and cannot
accept data.

Bit 6: This bit represents the current state of the printer’s ACK signal. A0 means the printer has received the

character and is ready to accept another. Normally, this signal will be active for approximately 5
microseconds before receiving a BUSY message stops.

Bit 5: A1 means the printer has detected the end of the paper.

Bit 4: A1 means the printer is selected.

Bit 3: A0 means the printer has encountered an error condition.

15

AR-B1462 User’s Guide

(5) Printer Control Latch & Printer Control Swapper

The system microprocessor can read the contents of the printer control latch by reading the address of printer
control swapper. Bit definitions are as follows:

XX

Figure 2-3 Bit’s Definition

NOTE: X presents not used.

Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven

from external sources to be read; when logic 0, they work as a printer port. This bit is writing only.

Bit 4: A1 in this position allows an interrupt to occur when ACK changes from low state to high state.

Bit 3: A1 in this bit position selects the printer.

Bit 2: A0 starts the printer (50 microseconds pulse, minimum).

Bit 1: A1 causes the printer to line-feed after a line is printed.

Bit 0: A0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for

a minimum of 0.5 microseconds before and after the strobe pulse.

12345670

STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE

DIR(write only)

16

AR-B1462 User’s Guide

3. SETTING UP THE SYSTEM

This section describes pin assignments for system’s external connectors and the jumpers setting.

! Overview
! System Setting
! Ethernet Controller

3.1 OVERVIEW

The AR-B1462 is a half size industrial grade CPU card that has been designed to withstand continuous operation
in harsh environments. This section provides hardware’s jumpers setting, the connectors’ locations, and the pin
assignment.

Note: Just the AR-B1462A supported the audio function and supported 2MB on-board VRAM. The AR-B1462 only

supported 1MB on-board VRAM.

Figure 3-1 AR-B1462 Jumpers & Connectors Placement

17

AR-B1462 User’s Guide

3.2 SYSTEM SETTING

Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.
(A j u mp er bl oc k i s a sm al l pl as ti c- en ca se d c on du c to r [ sh or ti ng pl ug ] t h at s li p s o ve r t he pi ns . ) To change a jumper
setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the
jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not
to bend the pins.

We will show the locations of the AR-B1462 jumper pins, and the factory-default setting.

CAUTION: Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap

or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can
permanently damage electronic components.

3.2.1 FDD Port Connector (CN8)

The AR-B1462 provides a 34-pin header type connector for supporting up to two floppy disk drives.

To enable or disable the floppy disk controller, please use the BIOS Setup program.

Ground 1 2 DRVEN 0
Ground 3
Ground 5
Ground 7

Ground 9
Ground 11
Ground 13
Ground 15
Ground 17
Ground 19
Ground 21
Ground 23
Ground 25
Ground 27
Ground 29
Ground 31
Ground 33

Figure 3-2 CN8: FDD Port connector

4 Not Used
6 DRVEN 1
8 -INDEX
10 -MTR 0
12 -DRV 1
14 -DRV0
16 -MTR1
18 DIR
20 -STEP
22 -WDATA
24 -WGATE
26 -TRK 0
28 -WRPT
30 -RDATA
32 -HDSEL
34 DSKCHG

18

AR-B1462 User’s Guide

3.2.2 Hard Disk (IDE) Connector

(1) 40-Pin Hard Disk (IDE) Connector (CN5)

A 40-pin header type connector (CN5) is provided to interface with up to two embedded hard disk drives (IDE AT
bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion.
To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates
the pin assignments of the hard disk drive’s 40-pin connector.

CN5

-IDERST 1 2 GROUND

CN7

4 D8
6 D9
8 D10
10 D11
12 D12
14 D13
16 D14
18 D15
20 Not Used
22 GROUND
24 GROUND
26 GROUND
28 Not Used
30 GROUND
32 -IO16
34 Not Used
36 HDA2
38 -HDCS1
40 GROUND

4 D8
6 D9
8 D10
10 D11
12 D12
14 D13
16 D14
18 D15
20 Not Used
22 GROUND
24 GROUND
26 GROUND
28 Not Used
30 GROUND
32 -IO16
34 Not Used
36 HDA2
38 -HDCS1
40 GROUND
42 VCC
44 Not Used

D7 3
D6 5
D5 7

D4 9
D3 11
D2 13
D1 15
D0 17

GROUND 19

Not Used 21

-IOW 23

-IOR 25

-IORDY 27

Not Used 29

IRQ 14 31

HDA1 33
HDA0 35

-HDCS0 37

-HDLED 39

Figure 3-3 CN5: Hard Disk (IDE) Connector

Caution: When the CN5 is used to connect the hard disk drive, if you find it cannot make partition, please
change the hard disk cable to below 35cm in length.

(2) 44-Pin Hard Disk (IDE) Connector (CN7)

AR-B1462 also provides IDE interface 44-pin connector to connect with the hard disk device.

-IDERST 1 2 GROUND
D7 3
D6 5
D5 7
D4 9

D3 11
D2 13
D1 15
D0 17

GROUND 19

Not Used 21

-IOW 23

-IOR 25

-IORDY 27

Not Used 29

IRQ 14 31

HDA1 33
HDA0 35

-HDCS0 37

-HDLED 39
VCC 41

GROUND 43

Figure 3-4 CN7: Hard Disk (IDE) Connector

19

AR-B1462 User’s Guide

3.2.3 Parallel Port Connector (CN9)

To use the parallel port, an adapter cable has to be connected to the CN9 (26-pin header type) connector. This
adapter cable is mounted on a bracket and is included in your AR-B1462 package. The connector for the parallel
port is a 25 pin D-type female connector.

CN9

D-Type Connector Parallel Port Connector

1
2
3
4
5
6
7
8

9
10
11
12
13

14
15
16
17
18
19
20
21
22
23
24
25

Figure 3-5 CN9: Parallel Port Connector

CN9 DB-25 Signal CN9 DB-25 Signal

1 1 -Strobe 2 14 -Aut o F o r m F eed
3 2 Data 0 4 15 -Error
5 3 Data 1 6 16 -Initialize
7 4 Data 2 8 17 -Printer Select In

9 5 Data 3 10 18 Ground
11 6 Data 4 12 19 Ground
13 7 Data 5 14 20 Ground
15 8 Data 6 16 21 Ground
17 9 Data 7 18 22 Ground
19 10 -Acknowledge 20 23 Ground
21 11 Busy 22 24 Ground
23 12 Paper 24 25 Ground
25 13 Printer Select 26 -- No Used

Table 3-1 Parallel Port Pin Assignment

-STB 1 1 2 -AFD 1
PD10 3
PD11 5
PD12 7
PD13 9

PD14 11
PD15 13
PD16 15
PD17 17

-ACK1 19

BUSY 1 21

PE1 23

SLCT1 25

4 -ERR 1
6 -INIT 1
8 -SLIN 1
10 GROUND
12 GROUND
14 GROUND
16 GROUND
18 GROUND
20 GROUND
22 GROUND
24 GROUND
26 GROUND

20

3.2.4 PC/104 Connector

(1) 64 Pin PC/104 Connector Bus A & B (CN11)

2

AR-B1462 User’s Guide

64

1

64-Pin PC/104 Connector

Figure 3-6 CN11: 64 Pin PC/104 Connector Bus A & B

-IOCHCK --­SD7 --­SD6 --­SD5 --­SD4 --­SD3 --­SD2 --­SD1 --­SD0 ---

-IOCHRDY--­AEN ---

SA19 --­SA18 --­SA17 --­SA16 --­SA15 --­SA14 --­SA13 --­SA12 --­SA11 --­SA10 ---

SA9 --­SA8 --­SA7 --­SA6 --­SA5 --­SA4 --­SA3 --­SA2 --­SA1 --­SA0 ---

GND ---

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32

Figure 3-7 CN11: 64-Pin PC/104 Connector Bus A & B

(2) 40 Pin PC/104 Connector Bus C & D (CN12)

1
2

40 Pin PC/104 Connector

Figure 3-8 CN12: 40 Pin PC/104 Connector Bus C & D

GND ---

SD8 --­SD9 ---

C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20

-SBHE --­LA23 --­LA22 --­LA21 --­LA20 --­LA19 --­LA18 --­LA17 ---

-MRD16 ---

-MWR16 ---

SD10 --­SD11 --­SD12 --­SD13 --­SD14 --­SD15 ---

Not Used ---

Figure 3-9 CN12: 40-Pin PC/104 Connector Bus C & D

CN11

12

CN12

2

1

B1
B2
B3
B4
B5
B6
B7
B8

B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32

D1

--- GND

D2

--- -MEM16

D3

--- -IOCS16

D4

--- IRQ10

D5

--- IRQ11

D6

--- IRQ12

D7

--- IRQ15

D8

--- IRQ14

D9

--- -DACK0

D10

--- DRQ0

D11

--- -DACK5

D12

--- DRQ5

D13

--- -DACK6

D14

--- DRQ6

D15

--- -DACK7

D16

--- DRQ7

D17

--- +5 VDC

D18

--- -MASTER

D19

--- GND

D20

--- GND

--- GND

--- RSTDRV

--- +5 VDC

--- IRQ9

--- -5 VDC

--- DRQ2

--- -12 VDC

--- -ZWS

--- +12 VDC

--- GND

--- -SMEMW

--- -SMEMR

--- -IOW

--- -IOR

--- -DACK3

--- DRQ3

--- -DACK1

--- DRQ1

--- -REFRESH

--- BUSCLK

--- IRQ7

--- IRQ6

--- IRQ5

--- IRQ4

--- IRQ3

--- -DACK2

--- TC

--- BALE

--- +5 VDC

--- OSC

--- GND

--- GND

39
40

63

21

AR-B1462 User’s Guide

(3) I/O Channel Signal Description

Name Description

BUSCLK [Output]

RSTDRV [Output]

SA0 - SA19

[Input / Output]

LA17 - LA23

[Input/Output]

SD0 - SD15

[Input/Output]

BALE [Output]

-IOCHCK [Input]

IOCHRDY

[Input, Open collector]

IRQ 3-7, 9-12, 14, 15

[Input]

-IOR
[Input/Output]

-IOW [Input/Out put]

-SMEMR [Output]

-MEMR

[Input/Output]

-SMEMW [Output]

-MEMW

[Input/Output]

DRQ 0-3, 5-7 [Input]

-DACK 0-3, 5-7

[Output]

AEN [output]

-REFRESH

[Input/Output]

TC [Output]

SBHE [Input/Output]

The BUSCLK signal of the I/O channel is asynchronous to
the CPU clock.
This signal goes high during power-up, low line-voltage or
hardware reset
The System Address lines run from bit 0 to 19. They are
latched onto the falling edge of "BALE"
The Unlatched Address line run from bit 17 to 23

System Data bit 0 to 15

The Buffered Address Latch Enable is used to latch SA0 ­SA19 onto the falling edge. This signal is forced high
during DMA cycles
The I/O Channel Check is an active low signal which
indicates that a parity error exist on the I/O board
This signal lengthens the I/O, or memory read/write cycle,
and should be held low with a valid address
The Interrupt Request signal indicates I/O service request
attention. They are prioritized in the following sequence:
(Highest) IRQ 9, 10, 11, 12, 13, 15, 3, 4, 5, 6, 7 (Lowest)
The I/O Read signal is an active low signal which instructs
the I/O device to drive its data onto the data bus
The I/O write signal is an active low signal which instructs
the I/O device to read data from the data bus
The System Memory Read is low while any of the low 1
mega bytes of memory are being used
The Memory Read signal is low while any memory location
is being read
The System Memory Write is low while any of the low 1
mega bytes of memory is being written
The Memory Write signal is low while any memory location
is being written
DMA Request channels 0 to 3 are for 8-bit data transfers.
DMA Request channels 5 to 7 are for 16-bit data transfers.
DMA request should be held high until the corresponding
DMA has been completed. DMA request priority is in the
following sequence:(Highest) DRQ 0, 1, 2, 3, 5, 6, 7
(Lowest)
The DMA Acknowledges 0 to 3, 5 to 7 are the
corresponding acknowledge signals for DRQ 0 to 3 and 5
to 7
The DMA Address Enable is high when the DMA controller
is driving the address bus. It is low when the CPU is driving
the address bus
This signal is used to indicate a memory refresh cycl e and
can be driven by the microproces sor on the I/O channel
Terminal Count provides a pulse when the terminal count
for any DMA channel is reached
The System Bus High Enable indicates the high byte SD8 ­SD15 on the data bus

22

Name Description

-MASTER [Input]

-MEMCS16

[Input, Open collector]

-IOCS16

[Input, Open collector]

OSC [Output]

-ZWS

[Input, Open collector]

Table 3-2 I/O Channel Signal’s Description

The MASTER is the signal from the I/O processor which
gains control as the master and should be held low for a
maximum of 15 micros econds or system memory m ay be
lost due to the lack of refresh
The Memory Chip Select 16 indicates that the present data
transfer is a 1-wait state, 16-bit data memory operat i on
The I/O Chip Select 16 indicates that the present data
transfer is a 1-wait state, 16-bi t data I/O operation
The Oscillator is a 14.31818 MHz signal used for the color
graphic card
The Zero Wait State indicates to the microprocessor that
the present bus cycle can be completed without inserting
additional wait cycle

3.2.5 LED Header (LM1)

The AR-B1462 provides one module for various LEDs’ headers.

LM1

1
3
5
7

2

+5V Power LED Header

4

Watchdog LED Header

6

LAN LED Header

8

HDD LED Header

Figure 3-10 LM1: LED Header

AR-B1462 User’s Guide

3.2.6 Serial Port

(1) RS-422/RS-485 Select (M5&SW1)

SW1-9 & SW1-10 selects COM B port, and adjusts the CN15 connector is RS-485 or RS-232C. M5 selects COM A
port for using DB2 for RS-232C or connects External RS-485.

(A) COM-A RS-485/RS-422 Adapter Select (M5)

(B) Terminal Select (M5)

ABC

1
2
3

RS-422

Factory Preset

Figure 3-11 M5: COM-A RS-485/RS-422 Adapter Select

C B A C B A

1
2

3

OFF

Factory Preset

Figure 3-12 M5: Terminal Select

ABC

1
2
3

RS-485

1
2

3

ON

23

AR-B1462 User’s Guide

(C) COM-A RS-232C/TTL Select (SW1-8)

ON

OFF

SW1-8 -- RS-232 (Factory Default Setting)

ON

OFF

123456

123456

7 8

7 8

910

910

Figure 3-13 SW1-8: COM-A RS-232/TTL Select

(D) COM-B RS-232C/RS-422 Select (SW1-9 & SW1-10)

ON

OFF

123456

SW1-9 & SW1-10 -- RS-232 (Factory Presetting)

ON

OFF

123456

SW1-9 & SW1-10 -- RS-485

Figure 3-14 SW1-9 & SW1-10: COM-B RS-232/RS-422 Select

SW1-8 -- TTL

7 8

7 8

109

109

24

AR-B1462 User’s Guide

(E) RS-485 Mode Select (SW1-9 & SW1-10)

ON

OFF

123456

7 8

109

SW1-9 & SW1-10 -- RS-485 MODE1

ON

OFF

123456

SW1-9 & SW1-10 -- RS-485 MODE2

Figure 3-15 SW1-9 & SW1-10: RS-485 Mode Select

7 8 109

When RS-42 2 or RS-485 mode is selec ted, you also need to ch ange M5 to select between RS-422 or RS-485
mode.

NOTE: 1. The recommended configuration for RS-485 interface is to set the transmitter to the controlled by DTR

and set the transmitter. Receiver is disabled.

2. The receiver is always enabled, so you will receive data that you transmitted previously. It is not
recommended to use this setting as RS-485 interface.

(2) RS-485/RS-422 Connector (CN15)

8106422018161412

1 9 11 13 15 17 19357

Figure 3-16 CN15: RS-485/RS-422 Connector

CN15 Signal CN15 Signal

1 -DCDAT 2 -DSRAT
3 RXDAT 4 -RTSAT
5 TXDAT 6 -CTSAT
7 -DTRAT 8 -RIAT

9 GND 10 VCC
11 GND 12 CTS+
13 RTS+ 14 CTS­15 RTS- 16 RXD+
17 TXD+ 18 RXD­19 TXD- 20 GND

Table 3-3 RS-485/RS-422 Pin Assignment

25

AR-B1462 User’s Guide

(3) TTL Connector (CN16)

810642

19357

Figure 3-17 CN16: TTL Connector

CN16 Signal CN16 Signal

1 TTLOP0 2 TTLIP0

3 TTLOP1 4 TTLIP1

5 TTLOP2 6 TTLIP2

7 TTLOP3 8 TTLIP3

9 GROUND 10 VCC

Table 3-4 TTL Pin Assignments

(4) RS-232 Connector (CN4)

There are four serial ports with EIA RS-232C interface on the AR-B1462. To configure these serial ports, use the
BIOS Setup program, and adjust the jumpers on M5 and SW1.

14121086423028262422201816 4038363432

13

5

6789

COM-A

6789

54321

COM-B

Figure 3-18 CN4: RS-232 Connector

CN4 DB-9 Signal CN4 DB-9 Signal

1 A-1 -DCDA 2 A-6 -DSRA
3 A-2 RXDA 4 A-7 -RTSA
5 A-3 TXDA 6 A-8 -CTSA
7 A-4 -DTRA 8 A-9 -RIA

9 A-5 GNDA 10 -- GNDA
11 B-1 -DCDB 12 B-6 -DSRB
13 B-2 RXDB 14 B-7 -RTSB
15 B-3 TXDB 16 B-8 -CTSB
17 B-4 -DTRB 18 B-9 -RIB
19 B-5 GNDB 20 -- GNDB
21 C-1 -DCDC 22 C-6 -DSRC
23 C-2 RXDC 24 C-7 -RTSC
25 C-3 TXDC 26 C-8 -CTSC
27 C-4 -DTRC 28 C-9 -RIC
29 C-5 GNDC 30 -- GNDC
31 D-1 -DCDD 32 D-6 -DSRD
33 D-2 RXDD 34 D-7 -RTSD
35 D-3 TXDD 36 D-8 -CTSD
37 D-4 -DTRD 38 D-9 -RID
39 D-5 GNDD 40 -- GNDD

Table 3-5 RS-232 Connector Pin Assignment

211917151311973735333129272523 39

6789

54321

COM-C

6789

54321

COM-D

54321

26

3.2.7 Keyboard Connector (J7)

(1) Keyboard Lock Header (J7)

AR-B1462 User’s Guide

2 GND
1 KBLK

J7

Figure 3-19 J7: Keyboard Lock Header

(2) Keyboard Connector (J4)

This keyboard connector is a PS/2 type keyboard connector. This connector is also for a standard IBM-compatible
keyboard with the keyboard adapter cable. J4 provides the way of connecting a keyboard to the AR-B1462.

12345

J4

1 DATA

1

2 GND
3 GND
4 VCC
5 CLOCK
6 Not Used

3

5

Figure 3-20 J4: Keyboard Connector

2

6

6-Pin Midi Din
(Front View)

1 CLOCK

2 DATA
3 GND
4 GND
5 VCC

4

3.2.8 External Speaker Header (J9)

Besides the onboard buzzer, you can use an external speaker by connecting to the J9 header.

1 Speaker+
2 Speaker-

1234

Figure 3-21 J9: Speaker Header

3 Speaker­4 Speaker-

3.2.9 Power Connector

(1) 8-Pin Power Connector (J1)

J1 is an 8-pin power connector. You can directly connect the power supply to the onboard power connector for
stand-alone applications.

1 GND
2 +5 VDC
3 +5 VDC

1234

5678

4 GND
5 GND
6 +12 VDC
7 -12 VDC
8 -5 VDC

Figure 3-22 J1: 8-Pin Power Connector

27

AR-B1462 User’s Guide

(2) 4-Pin Power Connector (CN6)

1 +12 VDC
2 GND
3 GND
4 +5 VDC

CN6

Figure 3-23 CN6: 4-Pin Power Connector

3.2.10 Reset Header (J6)

J6 is used to connect to an external reset switch. Shorting these two pins will reset the system.

2 GND
1 Reset+

Figure 3-24 J6: Reset Header

3.2.11 PS/2 Mouse Connector

(1) PS/2 Mouse IRQ12 Setting (JP2)

The default of <Enabled> allows the system detecting a PS/2 mouse on boot. If detected, IRQ12 will be used for
the PS/2 mouse. IRQ12 will be reserved for expansion cards and therefore the PS/2 mouse will not function.

JP2

12 12

Disable

Figure 3-25 JP2: PS/2 Mouse IRQ12 Setting

CAUTION:

(2) PS/2 Mouse Connector (J5)

To use the PS/2 interface, an adapter cable has to be connected to the J5 (6-pin header type) connector. This
adapter cable is mounted on a bracket and is included in your AR-B1462 package. The connector for the PS/2
mouse is a Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows:

After adjusting the JP2 correctly, the user must set the <PS/2 Mouse Support> option to Enabled in the
BIOS <Advanced CMOS Setup> Menu. Then the PS/2 mouse can be used.

GND
VCC

GND

1
2
3
4
5
6

DATA

Not Used

CLOCK

Enable

Factory Preset

123456

J5

1

2

28

3

5

4

6

6 Pin Mini-DIN

Figure 3-26 J5: PS/2 Mouse Connector

3.2.12 Battery Setting

e

(1) Battery Charger S elect (JP9)

JP9

AR-B1462 User’s Guide

JP9

3
2
1

Rechargeable

Non-Rechargeabl

Factory Preset

Figure 3-27 JP9: Battery Charger Select

3
2
1

(2) External Battery Connector (J8)

J8 allows users to connector an external 4.5 to 6 VDC battery to the AR-B1462, if the on-board battery is fully
discharged. Only the SRAM disk will draw the battery current. If no SRAM chips will be used, no battery is needed.
The battery charger on AR-B1462 does not source charge current to the external battery, which connects to J8.

2 Battery­1 Battery+

Figure 3-28 J8: External Battery Connector

3.2.13 26-Pin Audio Connector (CN10)

The AR-B1462 didn’t support the audio function. Only by using the AR-B1462A, we just can find this connector.

4681012141617181920212223242526

CN10

123579111315

Figure 3-29 CN10: 26-Pin Audio Connector

CN10 Signal CN10 Signal

1 AUXAL 2 LINEL
3 AUXAR 4 LINER
5 +12V 6 VJOYS
7 AUDIOL 8 MICPH

9 AUDIOR 10 PCSPKO
11 GND 12 GND
13 MIDIIN 14 MIDIOP
15 GND 16 GND
17 -JSWA 18 JTMA
19 -JSWB 20 JTMB
21 -JSWC 22 JTMC
23 -JSWD 24 JTMD
25 GND 26 GND

Table 3-6 Audio Connector Pin Assignments

29

AR-B1462 User’s Guide

3.2.14 CPU Setting

The AR-B1462 accepts many types of microprocessors such as Intel/AMD/Cyrix 486DX/DX2/DX4. All of these
CPUs include an integer processing unit, floating-point processing unit, memory-management unit, and cache.
They can give a two to ten-fold performance improvement in speed through the 386 processor that depending on
the clock speeds used and specific application. Like the 386 processor, the 486 processor also includes both
segment-based and page-based memory protection schemes. The instruction of processing time is reduced by
on-chip instruction pipelining. By performing fast, on-chip memory management and caching, the 486 processor
relaxes requirements for memory response for a given level of system performance.

(1) CPU Logic Core Voltage Select (M6)

M6

P3 P4

35
2
1

3
1

M6

P3 P4

35
2
1

3
1

(2) AMD 3X/4X CPU Select (JP11)

Figure 3-31 JP11: AMD 3X/4X CPU Select

(3) PCI Clock Select (JP4)

(4) CPU Base Clock Select (JP3)

PIN1-2 PIN3-4 PIN5-6 Base Clock

Close Close Close 50MHz
Open Close Close 40MHz
Close Open Close 33.3MHz
Open Open Close 25MHz
Close Close Open 20MHz
Open Close Open 16MHz
Close Open Open 12MHz
Open Open Open 8MHz

Table 3-7 JP3: CPU Base Clock Select

5V

Figure 3-30 M6: CPU Logic Core Voltage

3.45V

Factory Preset

2
1

AMD 4X

1
2

AMD 3X

Factory Preset

1

3

5

JP4

2

4

6

PCICLK=CPUCLK

Fixed on the

Factory Setting

Figure 3-32 JP4: PCI Clock Select

JP3

5

3

4 6

1

2

30

(5) CPU Cooling Fan Power Connector (CN3)

CN3

1432

Figure 3-33 CN3: CPU Cooling Fan Power Connector

3.2.15 PCI Connector

(1) PCI Connector Power Select (JP1)

2
1

Enabled

3.3V

Factory Preset

Figure 3-34 JP1: PCI Connector Power Select

(2) 120-Pin PCI Connector (CN1)

CN1

1

53 7 91113151719212325272931333537394143454749 5153555759

2

4681012141618202224262830323436384042444648 505254565860

AR-B1462 User’s Guide

1 +12V
2 GND
3 GND
4 VCC

4
3

2
1

4
3

Disabled

61 6563 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 101 103 105 107 109

62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120

Figure 3-35 CN1: 120-Pin PCI Connector

CN1 Signal CN1 Signal CN1 Signal CN1 Signal

1 -TRST 2 +12V 61 -12V 62 TCK
3 TMS 4 TDI 63 GND 64 TD0
5 +5V 6 -INTA 65 +5V 66 +5V
7 -INTC 8 +5V 67 -INTB 68 -INTD

9 NC 10 +5V 69 -PRST1 70 NC
11 NC 12 GND 71 -PRST2 72 GND
13 GND 14 NC 73 GND 74 NC
15 -RST 16 +5V 75 GND 76 CLK
17 -GNT 18 GND 77 GND 78 -REQ
19 NC 20 AD30 79 +5V 80 AD31
21 +3.3V 22 AD28 81 AD29 82 GND
23 AD26 24 GND 83 AD27 84 AD25
25 AD24 26 IDSEL 85 +3.3V 86 C/BE3
27 +3.3V 28 AD22 87 AD23 88 GND
29 AD20 30 GND 89 AD21 90 AD19
31 AD18 32 AD16 91 +3.3V 92 AD17
33 +3.3V 34 -FRAME 93 C/BE2 94 GND
35 GND 36 -TRDY 95 -IRDY 96 +3.3V
37 GND 38 -STOP 97 -DEVSL 98 GND
39 +3.3V 40 SDONE 99 -LOCK 100 -PERR
41 -SB0 42 GND 101 +3.3V 102 -SERR
43 PAR 44 AD15 103 +3.3V 104 C/BE1
45 +3.3V 46 AD13 105 AD14 106 GND
47 AD11 48 GND 107 AD12 108 AD10
49 AD9 50 C/BE0 109 GND 110 AD8
51 +3.3V 52 AD6 111 AD7 112 +3.3V
53 AD4 54 GND 113 AD5 114 AD3
55 AD2 56 AD0 115 GND 116 AD1
57 +5V 58 -REQ64 117 +5V 118 -ACK64
59 +5V 60 +5V 119 +5V 120 +5V

Table 3-8 Audio Connector Pin Assignments

31

AR-B1462 User’s Guide

3.2.16 Memory Setting

(1) DRAM Configuration

There are two 32-bit memory banks on the AR-B1462 board. It can be one-side or double-side SIMM (Single-Line
Memory Modules) which is designed to accommodate 256KX36 bit to 16MX36-bit SIMMs. This provides the user
with up to 128MB of main memory. The 32-bit SIMM (without parity bit) also can be used on AR-B1462 board.
There are listing on-board memory configurations available. Please refer to the following table for details:

SIMM1 SIMM2 Total Memory

256KX32(X36) None 1MB
256KX32(X36) 256KX32(X36) 2MB
512KX32(X36) None 2MB
512KX32(X36) 512KX32(X36) 4MB

1MX32(X36) None 4MB
1MX32(X36) 1MX32(X36) 8MB
2MX32(X36) None 8MB
2MX32(X36) 2MX32(X36) 16MB
4MX32(X36) None 16MB
4MX32(X36) 4MX32(X36) 32MB
8MX32(X36) None 32MB

8MX32(X36) 8MX32(X36) 64MB
16MX32(X36) None 64MB
16MX32(X36) 16MX32(X36) 128MB

Table 3-9 DRAMs’ Configuration

(2) Cache RAM Select (JP10)

The AR-B1462 can be configured to provide a write-back or write-through cache scheme and support 512KB
cache systems. A write-back cache system may provide better performance than a write-through cache system.
The BIOS Setup program allows you to set the cache scheme either write-back or write-through, either the internal
cache selection.

2
1

Write-Back

Figure 3-36 JP10: Write-Through/Write-Back CPU Select

3.2.17 D.O.C and SSD Installation

(1) D.O.C. Installation

(A) D.O.C./SSD for MEM4 Select (JP7)

JP7

6
4

MEM4=SSD

2
1

Write-Through

(Factory Preset)

5
3
12

JP7

6
4

MEM4=DOC

5
3
12

32

(B) D.O.C Installation (MEM4)

Step 1:

Use JP7 to select the correct D.O.C. socket.

Step 2:

Insert programmed Disk On Chip into sockets MEM4 setting as DOC.

Step 3:

Line up and insert the AR-B1462 card into any free slot of your computer.

(2) SSD Installation

(A) SSD Type Select (M1, M2, M3, M4 & JP8)

ABC
1
2
3
M1, M2, M3, & M4

JP8

1
2
3

AR-B1462 User’s Guide

1MX8 EPROM (Only)

ABC
1
2
3
M1, M2, M3, & M4

ABC
1
2
3
M1, M2, M3, & M4

ABC
1
2
3
M1, M2, M3, & M4

JP8

1
2
3

EPROM (128KX8, 256KX8 and 512KX8)
5V/12V FLASH (64KX8, 128KX8 and 256KX8)
(Factory Preset)

JP8

1

5V FLASH (512KX8 Only)

2
3

JP8

1
2

SRAM

3

(B) Switch1 Select (SW1)

SW1-1 Set the base I/O port address
SW1-2 Set the starting memory address
SW1-3 Reserved
SW1-4 & SW1-5 Set the drive number of solid state disk
SW1-6 & SW1-7 Set the used ROM memory chips
SW1-8, SW1-9 & SW1-10 Mode select of serial port 1/2

(C) I/O Port Address Select (SW1-1)

SW1-1

Base

Port

Solid State

Disk

Watchdog

OFF (*) 210h 210h-213h 214h-215h
ON 290h 290h-293h 294h-295h

33

AR-B1462 User’s Guide

(D) SSD Firmware Address Select (SW 1-2)

SW1-2 SSD BIOS Address Bank Memory Address

OFF (*) D000:0 (16KB) CC00:0 (16KB)

ON D000:0 (16KB) D400:0 (16KB)

(E) SSD Drive Number (SW1-4 & SW1-5)

SW1-4 SW1-5 Occupies floppy disk number (SSD)

OFF (*) OFF 0 or 1

ON OFF 0 or 2

OFF ON 0

ON ON 0

(F) Simulate 2 Disk Drive (SW1-4 & SW1-5)

SW1-4 SW1-5

OFF OFF 0 or 1 2

ON OFF 0 or 2 3

OFF ON 0 1

ON ON 0 2

(G) ROM Type Select (SW1-6 & SW1-7)

SW1-6 SW1-7 EPROM Type

OFF OFF UV EPROM (27Cxxx)

ON OFF 5V FLASH 29Fxxx

OFF ON 5V FLASH (29Cxxx & 28EExxx)

ON ON 12V FLASH (28Fxxx)

Occupies floppy disk number

FLASH (EPROM) SRAM

34

AR-B1462 User’s Guide

3.3 ETHERNET CONTROLLER

The Ethernet controller of the AR-B1462 is a highly integrated design that provides all Media Access Control (MAC)
and Encode-Decode (ENDEC) functions in accordance with the IEEE 802.3 standard. Network interfaces include
10BASE5 or 10BASE2 Ethernet via 10BASE-T via the Twisted-pair. The Ethernet controller can interface directly
to the PC-AT ISA bus without any external device. The interface to PC-AT ISA bus is fully compatible with NE2000
Ethernet adapter cards; so all software programs designed for NE2000 can run on the Ethernet controller card
without any modification.

Microsoft’s Plug and Play and the jumperless software configuration function are both supported. The capability of
the PnP and Non-PnP mode auto switch function allows users to configure network card. No jumpers or switches
are needed to set when using either the PC or PnP function. The integrated 8KX16 SRAM and 10BASE-T
transceiver make Ethernet controller more cost-effective.

3.3.1 Network 4-Pin Connector (J3)

J3

1 TPTX+
2 TPTX­3 TPRX+
4 TPRX-

Figure 3-37 J3: Network Connector

3.3.2 AUI Connector (CN2)

CN2 DB-15 Signal CN2 DB-15 Signal

1 1 GND 2 9 T5CD­3 2 T5CD+ 4 10 T5TX­5 3 T5TX+ 6 11 GND
7 4 GND 8 12 T5RX-

9 5 T5RS+ 10 13 +12V
11 6 GND 12 14 GND
13 7 Not Used 14 15 Not Used
15 8 GND 16 -- Not Used

Table 3-10 AUI Connector Pin Assignments

4 6 8 10121416

CN2

123579111315

9 111315

10 12 14

DB-15

123 5 7

Figure 3-38 CN2: AUI Connector

468

35

AR-B1462 User’s Guide

4. CRT/LCD FLAT PANEL DISPLAY

This section describes the configuration and installation procedure using LCD and CRT display.

! Connecting the CRT Monitor
! LCD Flat Panel Display
! Supported LCD Panel

4.1 CONNECTING THE CRT MONITOR

To connect a CRT monitor, an adapter cable has to be connected to the CN13 (10-pin header type) connector.
This adapter cable is included in your AR-B1462 package.

4.1.1 CRT Connector (CN13)

The AR-B1462 supports CRT color monitors. AR-B1462 used onboard VGA chipset and supported 1MB on-board
VRAM, and the AR-B1462A supported 2MB on-board VRAM. For different VGA display modes, your monitor must
possess certain characteristics to display the mode you want.

To connect to a CRT monitor, an adapter cable has to be connected to the CN13 connector. CN13 is used to
connect with a VGA monitor when you are using the on-board VGA controller as a display adapter.

CN13 is a 10-pin connector that attaches to the CRT monitor via a HD-sub 15-pin adapter cable. Pin assignments
for the CN13 & HDB15 connector is as follows:

246810

13579

1 RED 2 GND
3 GREEN
5 BLUE
7 VSYNC
9 HSYNC

4 AGND
6 AGND
8 AGND
10 GND

1 Red
2 Green

1514131211

79

6810

135

24

3 Blue
13 Horizontial Sync
14 Vertical Sync
4, 9, 11, 12, & 15 Not used
5 & 10 Ground
6, 7 & 8 AGND

Figure 4-1 CN13: CRT Connector

CN13 DB-15 FUNCTION CN13 DB-15 FUNCTION

1 1 Red 2 5 GND
3 2 Green 4 6 AGND
5 3 Blue 6 7 AGND
7 14 V-sync 8 8 AGND
9 13 H-sync 10 10 GND

Table 4-1 CRT Connector Assignment

36

AR-B1462 User’s Guide

4.2 LCD FLAT PANEL DISPLAY

This section describes the configuration and installation procedure for a LCD display. Skip this section if you are
using a CRT monitor only.

Use the Flash memory Writer utility to download the new BIOS file into the ROM chip to configure the BIOS default
settings for different types of LCD panels. Next, set your system properly and configure the AR-B1462 VGA
module for the right type of LCD panel you are using.

The following shows the block diagram of the system when using the AR-B1462 with a LCD display.

AR-B1462
CPU Boad

VBL Control

VEE

LCD

Panel

+12V, +5V

Inverter

Board

Figure 4-2 LCD Panel Block Diagram

The block diagram shows that the AR-B1462 still needs components to use with a LCD panel. The inverter board
provides the control for the brightness and the contrast of the LCD panel. The inverter is also the components that
supply the high voltage to drive the LCD panel. Each item will be explained further in the section.

Inverter & Contrast

CN14

Pin 1

J10

FL HIGH

Voltage

AR-B1462

Pin 1

CPU Board

Figure 4-3 LCD Panel Cable Installation Diagram

NOTE: Be careful with the pin orientation when installing connectors and the cables. A wrong connection can easily

destroy your LCD panel. Pin 1 of the cable connector is indicated with a sticker and pin1 of the ribbon
cable is usually has a different color.

LCD

Panel

37

AR-B1462 User’s Guide

4.2.1 Inverter Board Description

The inverter board supplies high voltage signals to drive the LCD panel by converting the 12 volt signal from the
AR-B1462 into a high voltage AC signal for LCD panel. It can be installed freely on the space provided over the
VR board. If the VR board is installed on the bracket, you have to provide a place to install the inverter board into
your system.

4.2.2 LCD Connector

(1) DE/E Signal from M or LP Select (JP6)

1
2
3

1
2
3

DE/M E/LP

Factory Preset

Figure 4-4 JP6: DE/E Signal from M or LP

(2) DENAVEE & DVEE Signal Select (JP5)

123 123

DENAVEE DVEE

Factory Preset

Figure 4-5 JP5: DENAVEE & DVEE Signal Select

(3) LCD Control Connector (J10)

J10 is a 5-pin connector that attaches to the Contrast and Backlight board. Its pin assignment is shown below:

1 ENABLK
2 ENVEE
3 +12V

12345

Figure 4-6 J10: LCD Control Connector

4 GND
5 VEE

(4) Touch Screen Connector (J2)

Figure 4-7 J2: Touch Screen Connector

(5) LCD Voltage Selector (JP12)

JP12 is used to select the LCD voltages to be 3.3V or 5V.

1
3

5

5V

38

1 RXDD
2 TXDD
3 GNDD

2

1

4

3

6

5

Factory Preset

2

4

6

3.3V

(6) LCD Panel Display Connector (CN14)

Attach a display panel connector to this 44-pin connector with pin assignments as shown below:

2
1

Figure 4-8 CN14: LCD Display Connector

Pin Signal Pin Signal

1 GND 2 SHFCLK
3 GND 4 LP
5 FLM 6 GND
7 P0 8 P1

9 P2 10 P3
11 P4 12 P5
13 GND 14 P6
15 P7 16 P8
17 P9 18 P10
19 P11 20 GND
21 P12 22 P13
23 P14 24 P15
25 P16 26 P17
27 GND 28 P18
29 P19 30 P20
31 P21 32 P22
33 P23 34 GND
35 VCC 36 VCC
37 +12V 38 +12V
39 GND 40 GND
41 DE 42 ENABLK
43 GND 44 VEE

Table 4-2 LCD Display Assignment

44
43

AR-B1462 User’s Guide

4.3 SUPPORTED LCD PANEL

At present, this VGA card can provide a solution with an inverter board for the following list of standard LCD
panels. Consult your Acrosser representative for new developments. When using other models of standard LCD
panels in the market.

NO. Manufacture Model No. Description

1 NEC NL-6448AC30-10 TFT 9.4”
2 NEC NL-6448AC32-10 TFT 10.2”
3 NEC NL-6448AC33-10 TFT 10.4”
4 HITACHI LMG5371 MONO 9.4” Dual Scan
5 HITACHI LMG9200 DSTN 9.4”
6 HITACHI LMG9400 DSTN 10.4”
7 ORION OGM-640CN03C-S DSTN 10.4”
8 SHARP LQ10D321 TFT 10.4”

Table 4-3 LCD Panel Type List

CAUTION: 1. If you want to connect the LCD panel, you must update the AR-B1462’s BIOS, then you can setup

the corrected BIOS. Please contact Acrosser for the latest BIOS update.

2. If user needs to update the BIOS version or connect other LCD, please contact the sales department.
The detail supported LCDs are listed in the Acrosser Web site, user can download the suitable BIOS.
The address is as follows:

http:\\www.acrosser.com

39

AR-B1462 User’s Guide

5. INSTALLATION

This chapter describes the procedure of the utility diskette installation. The following topics are covered:

! Overview
! Utility Diskette
! Watchdog Timer

5.1 OVERVIEW

This chapter provides information for you to set up a working system based on the AR-B1462 CPU board. Please
read the details of the CPU board’s hardware descriptions before installation carefully, especially jumpers’ setting,
switch settings and cable connections.

Follow steps listed below for proper installation:

Step 1 :

Step 2 :

Step 3 :

Step 4 :

Step 5 :

Step 6 :

Step 7 :

Step 8 :

Step 9 :

Step 10:

Step 11:

Step 12:

Read the CPU card’s hardware description in this manual.

Install any DRAM SIMM onto the CPU card. (or user can skip this step because that the AR-B1462
embedded on-board DRAM)

Set jumpers.

Make sure that the power supply connected to your passive CPU board backplane is turned off.

Plug the CPU card into a free AT-bus slot or PICMG slot on the backplane and secure it in place with
a screw to the system chassis.

Connect all necessary cables. Make sure that the FDC, HDC, serial and parallel cables are
connected to pin 1 of the related connector.

Connect the hard disk/floppy disk flat cables from the CPU card to the drives. Connect a power
source to each drive.

Plug the keyboard into the keyboard connector.

Turn on the power.

Configure your system with the BIOS Setup program then re-boot your sy stem.

If the CPU card does not work, turn off the power and read the hardware description carefully again.

If the CPU card still does not perform properly, return the card to your dealer for immediate service.

5.2 UTILITY DISKETTE

AR-B1462 provides two VGA driver diskettes, support WIN31, WIN95, WINNT 4.0 & OS/2; and one audio driver
diskette. If your operating system is the other operating system, please attach Acrosser that will provide the
technical supporting for the VGA resolution.

There are two diskettes: disk#2 is for WIN31, W IN95 & WINNT4.0 VGA resolution, disk#3 is for WINNT3.5 and
OS/2 VGA resolution. While user extracted the compressed files there is the README.* file in each sub-directories.
Please refer to the file of README for any troubleshooting before install the driver. The disk#1 is for SSD and
network utility driver. The AR-B1462A supports audio function, so the disk provides audio driver.

40

AR-B1462 User’s Guide

5.2.1 VGA Driver

(1) WIN 3.1 Driver

For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Step 7:

Step 8:

Step 9:
Step 10:

Step 11:
Step 12:

Make the new created directory to put the VGA drivers.
C:\>MD VGAW31

Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file—VGAW IN31.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\ VGAWIN31.ZIP C:\VGAW31
C:\>COPY A:\PKUNZIP.EXE C:\VGAW31

Change directory to the new created directory, and extract the compress file.

C:\>CD VGAW31
C:\VGAW31>PKUNZIP -d VGAWIN31.ZIP

In the DOS mode execute the SETUP.EXE file.
C:\VGAW31>SETUP

The screen shows the chip type, and presses any key enter the main menu.
CHIPS 655XX - PCI Display Drivers
Preliminary Version 3.3.0

There are some items for choice to setup. Please choose the <W indows Version 3.1> item, notice
the function key defined. Press [ENTER] selected the <All Resolutions>, when this line appears [*]
symbol, that means this item is selected. Press [End] starts to install.

The screen will show the dialog box to demand user typing the WIN31’s path. The default is
C:\WINDOWS.

Follow the setup steps’ messages execute. As completed the setup procedure will generate the
message as follow.

Installation is done!
Change to your Windows directory and type SETUP to run the Windows Setup program. Choose

one of the new drivers marked by an *. Please refer to the User’s Guide to complete the installation.
Presses [Esc] return the main menu, and re-press [Esc] return to the DOS mode.
And then re-name the OEM655XX.INF file as OEM65DGM.INF in the system directory of cwin31

directory. Acrosser recommends the method as:
C:\WINDOWS\SYSTEM>COPY OEM655XX.INF OEM65DGM.INF
In the WIN31, you can find the <Chips CPL> icon located in the {CONTROL PANEL} group.
Adjust the <Refresh Rate>, <Cursor Animation>, <Font size>, <Resolution>, and <Big Cursor>.

41

AR-B1462 User’s Guide

(2) WIN 95 Driver

For the WIN95 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Make the new created directory to put the VGA drivers.
C:\>MD VGAW95

Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file—VGAW IN95.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
C:\>COPY A:\VGAWIN95.ZIP C:\VGAW95
C:\>COPY A:\PKUNZIP.EXE C:\VGAW95

Change directory to the new created directory, and extract the compress file.
C:\>CD VGAW95
C:\VGAW95>PKUNZIP -d VGAWIN95.ZIP

Enter the WIN95 operation system, please choose the <SETTING> item of the <DISPLAY> icon in
the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source
files’ path.
C:\VGAW95

And then you can find the <Chips and Tech 65550 PCI (new)> item, select it and click the <OK>
button.

Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other functions. Please refer to
the messages during installation.

(3) WINNT Driver

For the WINNT4.0 and WINNT3.5 operating system, user must in the DOS mode decompress the compress file.
And then the following steps are for WINNT4.0, if you use WINNT3.5 for the disk#3 as to the steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Make the new created directory to put the VGA drivers.
C:\>MD VGANT40

Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file—WINNT40.ZIP,
and the PK U N Z I P.EX E p r o g r am—, i n the ne w cre a t e d d i r e c t o r y.
C:\>COPY A:\WINNT40.ZIP C:\VGANT40
C:\>COPY A:\PKUNZIP.EXE C:\VGANT40

Change directory to the new created directory, and extract the compress file.
C:\>CD VGANT40
C:\VGANT40>PKUNZIP -d WINNT40.ZIP

Enter the WINNT4.0 operation system, please choose the <SETTING> item of the <DISPLAY> icon
in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source
files’ path.
C:\VGANT40

And then you can find the <Chips and Tech 65550 PCI (new)> item, select it and click the <OK>
button.

Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and
adjust the <Screen Resolution>, <Refresh Rate>, <Font Size>…and other function. Please refer to
the messages during installation.

42

(4) OS/2 Warp Driver

The following steps must be performed before you install the 65550 display’s driver:

CAUTION:

1. OS/2 DOS Support must be installed.

2. If you previously installed SVGA support, you must do the following:
a) Close all DOS Full Screen and WIN-OS2 sessions.

b) Reset the system to VGA mode. VGA is the default video mode enabled when OS/2 is installed. To

restore VGA mode, use Selective Install and select VGA for Primary Display. For more information on
this procedure, see the section on Changing Display Adapter Support in the OS/2 Users Guide.

To install this driver, do the following steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Step 7:

Open an OS/2 full screen or windowed session.

Place the 65550 PCI Display Driver Diskette in drive A. (DISK #3)

Because the diskette enclosed the compress file, to extract file had to as the steps.

In the OS/2-DOS mode, make the VGA directory for decompress the driver.
C:\>MD VGAOS2
C:\>CD VGAOS2
C:\VGAOS2>COPY A:\VGAOS2.ZIP
C:\VGAOS2>PKUNZIP -d VGAOS2.ZIP

At the OS/2 command prompt, type the following commands to copy the files to the OS/2 drive:
C:\VGAOS2> SETUP C:\VGAOS2 C: <ENTER>

When the Setup Program is completed, you will need to perform a shutdown and then restart the
system in order for changes to take effect.

Please refer to the README.TXT file, there is detail description, user had to according to the
installation step by step. When install completed, user can adjust the VGA resolution in the
SYSTEM icon <SCREEN> item of the <SYSTEM SETUP>.

AR-B1462 User’s Guide

5.2.2 Audio Driver

(1) WIN 3.1 Driver

For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:

Step 1:

Step 2:

Step 3:

Step 4:
Step 5:

Make the new created directory to put the audio drivers.
C:\>MD AUW31

Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—W IN31DRV.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\ AUDIO\WIN31DRV.ZIP C:\AUW31
C:\>COPY A:\PKUNZIP.EXE C:\AUW31

Change directory to the new created directory, and extract the compress file.

C:\>CD AUW31
C:\AUW31>PKUNZIP -d WIN31DRV.ZIP

In the FILE MANAGER ICON execute the SETUP.EXE file.
The screen shows the chip type, and presses any key enter the main menu.

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AR-B1462 User’s Guide

Step 6:

Step 7:

There are some items for choice to setup. Please choose the <Driver Installation> item, notice the
function key defined. And then the screen shows the hardware setting, press [OK] starts to install.

Completed the installation, user will find two drivers: <ESS AudioDrive ES1869 4.17.08> and <ESS
AudioDrive MPU-401 4.17.08>.

(2) WIN 95 Driver

For the WIN95 operating system, user must in the DOS mode decompress the compress file. And then as to the
steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Make the new created directory to put the audio drivers.
C:\>MD AUW95

Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—W IN95DRV.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.
C:\>COPY A:\AUDIO\WIN95DRV.ZIP C:\AUW95
C:\>COPY A:\PKUNZIP.EXE C:\AUW95

Change directory to the new created directory, and extract the compress file.
C:\>CD AUW95
C:\AUW95>PKUNZIP -d WIN95DRV.ZIP

In the WIN95 operation system, please choose the <ADDING NEW HARDWARE> icon in the
{CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’
path.
C:\AUW95

And then you can find the <ES1869 Plug and Play AudioDrive> item, select it and click the <OK>
button.

Finally, the installation is completed and user must reboot the system.

(3) WINNT Driver

For the WINNT4.0 and WINNT3.5 operating system, user must in the DOS mode decompress the compress file.
And then the following steps are for WINNT4.0:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Make the new created directory to put the audio drivers.
C:\>MD AUNT40

Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—NT40DRV.ZIP,
and the PK U N Z I P.EX E p r o g r am—, i n the ne w cre a t e d d i r e c t o r y.
C:\>COPY A:\AUNT40\NT40DRV.ZIP C:\AUNT40
C:\>COPY A:\PKUNZIP.EXE C:\AUNT40

Change directory to the new created directory, and extract the compress file.
C:\>CD AUNT40
C:\AUNT40>PKUNZIP -d NT40DRV.ZIP

In the WINNT4.0 operation system, please choose the <ADDING NEW HARDWARE> icon in the
{CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’
path.
C:\AUNT40

And then you can find the <ES1869 Plug and Play AudioDrive> item, select it and click the <OK>
button.

Finally, the installation is completed and user must reboot the system.

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AR-B1462 User’s Guide

(4) DOS Driver

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Make the new created directory to put the audio drivers.
C:\>MD AUDOS

Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file—DOSDRV.ZIP,
and the extract program—PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\AUDIO\DOSDRV.ZIP C:\AUDOS
C:\>COPY A:\PKUNZIP.EXE C:\AUDOS

Change directory to the new created directory, and extract the compress file.

C:\>CD AUDOS
C:\AUDOS>PKUNZIP -d DOSDRV.ZIP

In the DOS mode execute the SETUP.EXE file.
C:\AUDOS>ESS

The screen shows the hardware configuration items for setup the base address, IRQ, DMA…etc. If
these items setting all are correct. The setup will ask the directory to install the files. The default
directory is C:\AUDIODRV, and then press the [ENTER] key the installation is completed.

5.2.3 Network & SSD Utility

The first diskette provides two functions for user application. The file list is as follow:

UM9008 ZIP
PKUNZIP EXE
README DOC

The third diskette also provides SSD functions drivers. The file list is as follow:

SSD <DIR>
WD1462 EXE
WP1462 EXE
RFG EXE
RFGDEMO PGF

(1) Network Utility

1. Use PKUNZIP.EXE program to decompress the file in the DOS mode, and use the command to decompress.
The decompressing active is as follow:
For Example
C:\>MD NET
C:\>CD NET

C:\NET>COPY A:\PKUNZIP.EXE C:\NET
C:\NET>COPY A:\UM9008.ZIP C:\NET

C:\NET>PKUNZIP -D UM9008.ZIP

2. And then enter the operation system, as the installation steps process. Please refer to the decompressed file.
There is the README file in every sub-directory , and has detail description for using the drivers.

45

AR-B1462 User’s Guide

(2) SSD Utility

To support the AR-B1462 solid state disk’s operations, the following files have been provided on the enclosed
diskette #3’s directory <SSD>.

(A) WD1462.EXE

WD1462.EXE This program demonstrates how to enable and trigger the watchdog timer. It allows you to

test the <TIMES-OUT & RESET> function when the watchdog timer is enabled.

(B) WP1462.EXE

WP1462.EXE This program demonstrates how to enable and disable software write protected function. It

also shows the current protect mode of write or read only memory.

(C) RFG.EXE

RFG.EXE This program is used to generate ROM pattern files in a binary format. Each ROM pattern file

has the same size as the FLASH or EPROM and can be easily programmed on to the FLASH
with on-board programmer or on to EPROM with any EPROM programmer. If you have
specified a DOS drive in the *.PGF file, RFG will generate bootable ROM pattern files for the
EPROM or FLASH disk. The RFG supports the following DOS, MS-DOS, PC-DOS, DR-DOS,
and X-DOS.

NOTE: If you want to use AR-B1462 with any DOS which is not supported by RFG, please send your requirement

to Acrosser Technology Co., Ltd. or contract with your local sales representative.

The RFG.EXE provided in the utility diskette is a program that converts the files you list in the PGF and convert
them into ROM pattern file. The RFG will determine how many EPROMs are needed and generate the same
number of ROM pattern files. These ROM pattern files are named with the name assigned by the ROM_NAME in
the PGF and the extension names are *.R01, *.R02….etc. To generate ROM pattern files.
The ROM File Generator main menu will be displayed on the screen. There are 7 options on the main menu. They
serve the following functions:

Quit to DOS
Quits and exits to the DOS

OS Shell
Exits from the RFG temporarily to the DOS prompt. Type <EXIT> to return to the RFG main menu.

Load PFG File
If this option is used, the RFG will prompt you for the PGF file name. This option is useful if you have not
previously entered a PGF name or you wish to use a different PGF file. The RFG will check and display the
PGF filename, ROM pattern file name, EPROM capacity, DOS version and the number of ROM pattern files
that will be generated.

Type Current PGF File
This option instructs the RFG to use the DOS type command to display the contents of the current PGF file.

Generate ROM File(s)
If there is no mistake in your *.PGF file, then this menu option will generate ROM pattern files. The number
of ROM pattern file generated by the RFG will depend on the total capacity needed by your files. For
instance, if 3 files are generated, then you will need to use 3 EPROMs (The size depends upon the number
stated in your PGF). The ROM pattern files will have the same file names, but will have different extension
names. For example:
TEST.R01, TEST.R02, TEST.R03…etc.
Display Error in PGF File
This option displays errors that were detected in your PGF.

46

AR-B1462 User’s Guide

Help to PGF File
This option gives information on how to write a PGF file and how to generate ROM pattern files. An
example PGF is also included.
Move the reverse video bar to <Generate ROM File(s)> then press [ENTER]. The ROM pattern file is a
binary file. The file size will be the same size as the EPROM that you assigned in the PGF. For example, if
you are using 128KX8 EPROM memory chips, then the size of ROM patterns file will be 131072 bytes. For
other chips the file size will be:
64KX8 EPROM----65536 bytes
256KX8 EPROM—262144 bytes
512KX8 EPROM---524288 bytes
1MX8 EPROM -----1048576 bytes

(D) RFGDEMO.PGF

RFGDEMO.PGF This file provides a sample PROGRAM GROUP FILE which illustrates how to create ROM

pattern files correctly.

The PGF is an ASCII text file that can be created by using any text editor, word processor or DOS <COPY CON>
command. The PGF lists what files will be copied and if DOS is going to be copied. This file can have any DOS
filename, but the extension name must be *.PGF. For example, followings are valid filenames.

RFGDEMO.PGF
MYRFG.PGF
MSDOS.PGF
….

An examples of the *.PGF file is as follow.

ROM_NAME=TEST1 ; ROM pattern file name is TEST1

;The output file names will be TEST1.R01,
;TEST1.R02..etc.

DOS_DRIVE=C: ; DOS system drive unit is drive C:

;If user does not want to copy DOS
;system files onto the ROM disk
;write as DOS_DRIVE=NONE

ROM_SIZE=128 ;64 means 64KX8 (28F512) EPROM

;size used
;128 means 128KX8 (27C/28F/29F010)
;EPROM size used
;256 means 512KX8 (27C/28F/29F020)
;EPROM size used
;512 means 512KX8 (27C/29F040)
;EPROM size used
;1024 means 1MX8 (27C080) EPROM
;size used

The following two files are options, which depend on whether the ROM disk is to be bootable, or not.
CONFIG.SYS
AUTOEXEC.BAT

;Below are user’s files
A:\USER1.COM ; File USER1.COM on root of drive A:
USER2.EXE ; File USER2.EXE on current directory & drive
C:\TTT\USER3.TXT ; File USER3.TXT on sub-directory TTT of drive C:

47

AR-B1462 User’s Guide

5.3 WATCHDOG TIMER

This section describes how to use the Watchdog Timer, disabled, enabled, and trigger.
The AR-B1462 is equipped with a programmable time-out period watchdog timer. User can use the program to
enable the watchdog timer. Once you have enabled the watchdog timer, the program should trigger it every time
before it times out. If your program fails to trigger or disable this timer before it times out because of system hang­up, it will generate a reset signal to reset the system. The time-out period can be programmed to be 3 to 42
seconds.

Enable (D7)

Time Factor (D0-D2)

Watchdog

Register

Write and Trigger

Time Base

Counter

and

Compartor

Watchdog
LED

Figure 5-1 Watchdog Block Diagram

RESET

5.3.1 Watchdog Timer Setting

The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups.
Whenever the watchdog timer is enabled, the LED will blink to indicate that the timer is counting. The watchdog
timer is automatically disabled after reset.
Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it
times-out. After you trigger the wa tchdog timer, it will be set to zero and start to count again. If your program fails
to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the system or trigger the IRQ15
signal to tell your program that the watchdog is times out.
The factor of the watchdog timer time-out constant is approximately 6 seconds. The period for the watchdog timer
time-out period is between 1 to 7 timer factors.
If you want to reset your system when watchdog times out, the following table listed the relation of timer factors
between time-out period.

Time Factor Time-Out Period (Seconds)

80H 3
81H 6
82H 12
83H 18
84H 24
85H 30
86H 36
87H 42

Table 5-1 Time-Out Setting

If you want to generate IRQ15 signal to warn your program when watchdog times out, the following table listed the
relation of timer factors between time-out period. And if you use the IRQ15 signal to warn your program when
watchdog timer out, please enter the BIOS Setup the <Peripheral Setup> menu, the <OnBoard PCI IDE> and <IDE
Prefetch> these two items must set to Primary.

Time Factor Time-Out Period (Seconds)

0C0H 3
0C1H 6
0C2H 12
0C3H 18
0C4H 24
0C5H 30
0C6H 36
0C7H 42

Table 5-2 Time-Out Setting

48

AR-B1462 User’s Guide

NOTE: 1. If you program the watchdog to generate IRQ15 signal when it times out, you should initial IRQ15

interrupt vector and enable the second interrupt controller (8259 PIC) in order to enable CPU to process
this interrupt. An interrupt service routine is required too.

2. Before you initial the interrupt vector of IRQ15 and enable the PIC, please enable the watchdog timer
previously, otherwise the watchdog timer will generate an interrupt at the time watchdog timer is enabled.

SW1-1

On

Off

1432

5 6 7 8 9 10

I/O Port 214h
Factory-Default Setting

SW1-1

On

Off

1432

Figure 5-1 SW1-1: Watchdog I/O Port Address Select

5 6 7 8 9 10

I/O Port 294h

5.3.2 Watchdog Timer Enabled

To enable the watchdog timer, you have to output a byte of timer factor to the watchdog register whose address is
214H or Base Port. The following is a BASICA program which demonstrates how to enable the watchdog timer and
set the time-out period at 24 seconds.
1000 REM Points to command register
1010 WD_REG% = 214H
1020 REM Timer factor = 84H (or 0C4H)
1030 TIMER_FACTOR% = %H84
1040 REM Output factor to watchdog register
1050 OUT WD_REG%, TIMER_FACTOR%
.,etc.

5.3.3 Watchdog Timer Trigger

After you enable the watchdog timer, your program must write the same factor as enabling to the watchdog register
at least once every time-out period to its previous setting. You can change the time-out period by writing another
timer factor to the watchdog register at any time, and you must trigger the watchdog before the new time-out period
in next trigger. Below is a BASICA program which demonstrates how to trigger the watchdog timer:
2000 REM Points to command register
2010 WD_REG% = 214H
2020 REM Timer factor = 84H (or 0C4H)
2030 TIMER_FACTOR% = &H84
2040 REM Output factor to watchdog register
2050 OUT WD_REG%, TIMER_FACTOR%
.,etc.

5.3.4 Watchdog Timer Disabled

To disable the watchdog timer, simply write a 00H to the w atchdog register.
3000 REM Points to command register
3010 WD_REG% = BASE_PORT%
3020 REM Timer factor = 0
3030 TIMER_FACTOR% = 0
3040 REM Output factor to watchdog register
3050 OUT WD_REG%, TIMER_FACTOR%
., etc.

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AR-B1462 User’s Guide

6.SOLID STATE DISK

The section describes the various type SSDs’ installation steps as follows. This chapter describes the procedure of
the installation. The following topics are covered:

! Overview
! Switch Setting
! Jumper Setting
! ROM Disk Installation
! DiskOnChip Installation

6.1 OVERVIEW

The AR-B1462 provides three 32-pin JEDEC DIP sockets, which may be populated with up to 4MB of EPROM or
2MB of FLASH or 2MB of SRAM disk. It is ideal for diskless systems, high reliability and/or high-speed access
applications, controller for industrial or line test instruments, and etc.

If small page (less or equal 512 bytes per page) 5V FLASHs were used, you could format FLASH disk and copy
files onto FLASH disk just like using a normal floppy disk. You can use all of the related DOS command (such as
COPY, DEL…etc.) to update files on the 5V FLASH disk.

The write protect function allows you to prevent your data on small page 5V FLASH or SRAM disk from accidental
deletion or overwrite.

An on-board Lithium battery or an external battery pack that could be connected ensures data retention of SRAM
to the AR-B1462.

6.2 SWITCH SETTING

We will show the locations of the AR-B1462 switch, and the factory-default setting.

CAUTION: The switch setting needs to adjust with the jumpers setting, make sure the jumper settings and the

switch setting are correct.

SIM1

H3

1

H7

JP10 JP11

105

JP4

U34

CN1

104

12 5GND

81

100

1

1
2

CN14

CN3J1

LED2

CN11
J9

LM1

2
4
6
8

51

50

1

2

H35

1

JP2

A
1
2
3

ABC
1

2
3

51

50

SW1

31

51

ABC

50

1

2
3

ABC
1

31

2
3

U7

31

P3

P4

JP3

81

U18

100

1

81

U26

100

1

CN12
H10

JP6

JP7

JP8

JP9

JP1

H4 H5

LED1

1

CN2

2
1

U6

50

51

1

U11

50

51

SIM2

U28

80486

7

8

9

10

11

15

12

16

13

17

14

1

H9

6

1

4

5

CN10

1

3

1
2
3

2

JP5

ABC

S
R
Q
P
N
M
L
K
J
H
G
F
E
D
C
B
A

1

U8

J8

J10

Figure 6-1 Switch & SSD Type Jumper Location

J3

BC

CN4

J2

H6

LED3

J4

J6

J5

J7

12

CN6

GND

5

CN5

P1

P6

P5

P2

U17

CN7

U20

U27

CN8

U30

CN9

P8

P9

P7

P10

M5

ABC

1

2

P12

H11

P11

3

CN16CN13 CN15

50

6.2.1 Overview

There is 1 DIP Switch located on the AR-B1462. It performs the following functions:

ON

OFF

12345678910

Figure 6-2 SW1: Switch Select

SW1-1 Set the base I/O port address
SW1-2 Set the starting memory address
SW1-3 Reserved
SW1-4 & SW1-5 Set the drive number of solid state

disk
SW1-6 & SW1-7 Set the used ROM memory chips
SW1-8, SW1-9 &
SW1-10

Mode select of serial port 1/2

AR-B1462 User’s Guide

6.2.2 I/O Port Address Select (SW1-1)

SW1-1 is provided to select one of the four base port addresses for the watchdog timer and the solid state disk.
The AR-B1462 occupies 6 I/O port addresses. Followings state selections of base port address.

SW1-1 Base Port Solid State Disk Watchdog

OFF (*) 210h 210h-213h 214h-215h

ON 290h 290h-293h 294h-295h

Table 6-1 I/O Port Address Select

6.2.3 SSD Firmware Address Select (SW1-2)

The AR-B1462‘s SSD firmware occupies 32KB of memory. SW1-2 is used to select the memory base address.
You must select an appropriate address so that the AR-B1462 will not conflict with memory installed on other add­on memory cards. Additionally, be sure not to use shadow RAM area or EMM driver’s page frame in this area.

SW1-2 SSD BIOS Address Bank Memory Address

OFF (*) D000:0 (16KB) CC00:0 (16KB)

ON D000:0 (16KB) D400:0 (16KB)

Table 6-2 SSD Firmware Address Select

If you are not going to use the solid-state disk (SSD), you can use BIOS setup program to disable the SSD BIOS.
The AR-B1462 will not occupy any memory address if the SSD BIOS is disabled.
If you are going to install the EMM386.EXE driver, please use the [X] option to prevent EMM386.EXE from using
the particular range of segment address as an EMS page, which is used by AR-B1462. For example, write a
statement in the CONFIG.SYS file as follow: (If the memory configuration of AR-B1462 is CC00:0)

DEVICE=C:\DOS\EMM386.EXE X=CC00-CFFF

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AR-B1462 User’s Guide

6.2.4 SSD Drive Number (SW1-4 & SW1-5)

The AR-B1462 SSD can simulate one or two disk drives. You can assign the drive letter of the AR-B1462 by
configuring SW1-4 & SW1-5.

You can make the computer to boot from SSD by copying DOS into the SSD. If your SSD does not have DOS, the
computer will boot from your hard disk or floppy disk. In this condition, the SSD BIOS of AR-B1462 will set the
drive letter of the SSD to the desired drive letter automatically.

The AR-B1462 would simulate a single disk drive when only (FLASH) EPROM or SRAM (starting from MEM1
socket) is installed. The drive numbers with respect to the switch setting when the AR-B1462 simulates single disk
drives.

SW1-4 SW1-5 Occupies floppy disk number (SSD)

OFF (*) OFF 0 or 1 (Note 1)

ON OFF 0 or 2 (Note 2)

OFF ON 0

ON ON 0

Table 6-3 SSD Drive Number

NOTE: 1. If there is no DOS on this SSD, the disk number will be 1 (B:). If any DOS is found by the AR-B1462

SSD BIOS, the disk number will be 0 (A:) But, you can change the disk number from 0 to 1 by pressing
the <ESC> key during system boot up.

2. If there is no DOS on this SSD, the disk number will be 2 (C: or D: or…). If any DOS is found by the AR­B1462 SSD BIOS, the disk number will be 0 (A:). But, you can change the disk number from 0 to 2 by
pressing the <ESC> key during system boot up.

(2) Simulate 2 Disk Drive

When (FLASH) EPROM and SRAM are both used on the AR-B1462, or you only have installed SRAM that does
not start from MEM1 socket, the AR-B1462 will simulate two disk drives. The drive numbers respect to those
switch settings when AR-B1462 simulates two disk drives.

SW1-4 SW1-5

OFF OFF 0 or 1 (Note 1) 2

ON OFF 0 or 2 (Note 2) 3

OFF ON 0 1

ON ON 0 2

Table 6-4 SSD Drive Number for Simulate 2 Disk Drive

NOTE: 1. If there is no DOS on this SSD, the disk number will be 1 (B:). If any DOS is found by the AR-B1462

SSD BIOS, the disk letter will be 0 (A:). But, you can change the disk number from 0 to 1 by pressing
the <ESC> key during system boot up.

2. If there is no DOS on this SSD, the disk number will be 2 (C: or D: or….). If any DOS is found by the
AR-B1462 SSD BIOS, the disk number will be 0 (A:). But, you can change the disk number from 0 to 2
by pressing the <ESC> key during system boot up.

Occupies floppy disk number

FLASH (EPROM) SRAM

52

AR-B1462 User’s Guide

(2) Disk Drive Name Arrangement

If any logical hard disk drives exist in your system, there will also be a different disk number depending on which
version DOS you are using.

The solid-state disk drive number with their respective DOS drive designation is listed in table as follows. The
solid-state disk drive number is changeable as the DOS version. The following table expresses the variety.

Condition

No Logical hard disk A: B: C: D: -- -- -- --

1 Logical hard disk A: B: C: D: E: -- -- -­2 Logical hard disk A: B: C: D: E: F: -- -­3 Logical hard disk A: B: C: D: E: F: G: -­4 Logical hard disk A: B: C: D: E: F: G: H:

Table 6-5 SSD Drive Number for DOS Version before 5.0

Condition

No Logical hard disk A: B: C: D: -- -- -- --

1 Logical hard disk A: B: D: E: C: -- -- -­2 Logical hard disk A: B: E: F: C: D: -- -­3 Logical hard disk A: B: F: G: C: D: E: -­4 Logical hard disk A: B: G: H: C: D: E: F:

Table 6-6 SSD Drive Number for DOS Version 5.0 and Newer

Floppy disk No. Logical hard disk
0 1 2 3 1 2 3 4

Floppy disk No. Logical hard disk
0 1 2 3 1 2 3 4

6.2.5 ROM Type Select (SW1-6 & SW1-7)

SW1-6 & SW1-7 are used to select the memory type of ROM disk section.

SW1-6 SW1-7 EPROM Type

OFF OFF UV EP ROM (2 7Cxxx)

ON OFF 5V FLAS H 29Fxxx (*Note)

OFF ON 5V FLASH (29Cxxx & 28Eexxx)

ON ON 12V FLASH (28 Fxxx)

Table 6-7 ROM Type Select

NOTE: It is also used to perform the hardware write protection of small page 5V FLASH (29Cxxx or 28Eexxx) di sk.

6.2.6 Serial Port 1 Mode Select (SW1-8)

SW1-8 is used to select the interface mode of serial port 1.

SW1-8 Serial Port 1

OFF RS-232C (*)

ON TTL

Table 6-8 Serial Port 1 Mode Select

53

AR-B1462 User’s Guide

6.2.7 Serial Port 2 Mode Select (SW1-9 & SW1-10)

SW1-9 & SW1-10 are used to select the interface mode of serial port2.

SW1-9 SW1-10 Serial port 2

OFF OFF RS-232C (*)

ON OFF RS-422

OFF ON RS-485 mode1 (Note 1)

ON ON RS-485 mode2 (Note 2)

Table 6-9 Serial Port 2 Mode Select

When RS-42 2 or RS-485 mode is selecte d, you also need to change M5 to select between RS-422 or RS-485
mode.

NOTE: 1. The recommended configuration for RS-485 interface is to set the transmitter to be controlled by DTR

and set the receiver to the inverse state of the transmitter. Receiver is disabled.

2. The receiver is always enabled, so you will receive data that you transmitted previously. It is not
recommended to use this setting as RS-485 interface.

6.3 JUMPER SETTING

Before installing the memory into memory sockets MEM1 through MEM4, you have to configure the memory type,
which will be used (ROM/RAM) on the AR-B1462. Each socket is equipped with a jumper to select the memory
type.

You can configure the AR-B1462 as a (FLASH) EPROM disk (ROM only), a SRAM disk (SRAM only) or a
combination of (FLASH) EPROM and SRAM disk.

It is not necessary to insert memory chips into all of the sockets. The number of SRAM chips required depends on
your RAM disk capacity. The number of EPROM chips required depends on the total size of files that you plan to
copy onto the ROM disk and whether or not it will be bootable.

Insert the first memory chip into MEM1 if you are going to configure it as a ROM or SRAM disk. If you use a
combination of ROM and RAM, then insert the (FLASH) EPROM chip starting with the MEM1, and insert the
SRAM chips starting from the first socket, which is configured as SRAM.

! M1: is used to configure the memory type of MEM1
! M2: is used to configure the memory type of MEM2
! M3: is used to configure the memory type of MEM3
! M4: is used to configure the memory type of MEM4

CAUTION: When the power is turned off, please note the following precautions.

1. If your data has been stored in the SRAM disk, do not change the jumper position or data will be
lost.

2. Make sure jumpers are set properly. If you mistakenly set the jumpers for SRAM and you have
EPROM or FLASH installed, the EPROM or FLASH will drain the battery’s power.

54

AR-B1462 User’s Guide

)

8

ABC
1
2
3
M1, M2, M3, & M4

ABC
1
2
3
M1, M2, M3, & M4

ABC
1
2
3
M1, M2, M3, & M4

JP8

1

1MX8 EPROM (Only)

2
3

JP8

1
2
3

EPROM (128KX8, 256KX8 and 512KX8
5V FLASH (64KX8, 128KX8 and 256KX
(Factory Preset)

JP8

1

5V FLASH (512KX8 Only)

2
3

ABC
1
2
3
M1, M2, M3, & M4

Figure 6-3 M1~M4 & JP8: Memory Type Setting

JP8

1
2
3

SRAM

6.4 ROM DISK INSTALLATION

The section describes the various type SSDs’ installation steps as follows. The jumper and switch adjust as SSD’s
different type to set.

6.4.1 UV EPROM (27Cxxx)

(2) Switch and Jumper Setting

Step 1:

Step 2:

Step 3:

Use jumper block to set the memory type as ROM (FLASH).

Select the proper I/O base port, firmware address, disk drive number and EPROM type on SW1.

Insert programmed EPROM(s) or FLASH(s) chips into sockets starting at MEM1.

ON

OFF

12345678910

Figure 6-4 UV EPROM (27CXXX) Switch Setting

55

AR-B1462 User’s Guide

ABC
1
2
3
M1, M2, M3, & M4

ABC
1
2
3
M1, M2, M3, & M4

EPROM (128KX8, 256KX8 and 512KX8)

Figure 6-5 UV EPROM Jumpers Setting

(2) Software Programming

Use the UV EPROM, please refer to the follow steps:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Step 7:

Step 8:

Turn on the power and boot DOS from hard disk drive or floppy disk drive.

Making a Program Group File (*.PGF file)

Using the RFG.EXE to generate ROM pattern files, and counting the ROM numbers as the pattern
files.

In the DOS prompt type the command as follows.
C:\>RFG [file name of PGF]

In the RFG.EXE main menu, choose the <Load PGF File> item, that is user editing *.PGF file.

Choose the <Generate ROM File(s)>, the tools program will generate the ROM files, for programming
the EPROMs.

Program the EPROMs
Using the instruments of the EPROM writer to load and write the ROM pattern files into the EPROM
chips. Make sure that the program without any error verifies the EPROMs.

Install EPROM chips
Be sure to place the programmed EPROMs (R01, R02….) into socket starting from MEM1 and ensure
that the chips are installed in the sockets in the proper orientation.

JP8

1

1MX8 EPROM (Only)

2
3

JP8

1
2
3

6.4.2 Large Page 5V FLASH Disk

If you are using large page 5V FLASH as ROM disk, it is the same procedure as step 1 to step 4 of using the UV
EPROM.

(2) Switch and Jumper Setting

Step 1:

Step 2:

Step 3:

56

Use jumper block to set the memory type as ROM (FLASH).

Select the proper I/O base port, firmware address, disk drive number and large page 5V FLASH type
on SW1.

Insert programmed EPROM(s) or FLASH(s) chips into sockets starting at MEM1.

AR-B1462 User’s Guide

ON

OFF

12345678910

Figure 6-6 5V Large FLASH (29FXXX) Switch Setting

ABC
1
2
3

JP8

1
2
3

M1, M2, M3, & M4

5V FLASH (64KX8, 128KX8 and 256KX8)
(Factory Preset)

ABC
1
2
3

JP8

1

5V FLASH (512KX8 Only)

2
3

M1, M2, M3, & M4

Figure 6-7 Large Page 5V FLASH Jumper Setting

(2) Software Programming

And then, you should create a PGF and generate ROM pattern files by using the RFG.EXE.

Step 1:

Step 2:

Step 3:

Step 4:

Making a Program Group File (*.PGF file)

Generate ROM pattern files

Turn off your system, and then install FLASH EPROMs into the sockets.

NOTE: Place the appropriate number of FLASH EPROM chips (the numbers depends on the ROM

pattern files generated by RFG.EXE) into the socket starting from MEM1 and ensure that the
chips are installed in the sockets in the proper orientation. Line up and insert the AR-B1462
board into any free slot of your computer.

Turn on your system, and Program FLASH EPROMs.

Step 5:

Step 6:

NOTE: The FLASH EPROM program is built-in the AR-B1462 board. The FLASH EPROMs can be

programmed on the AR-B1462. Before programming the FLASH EPROMs, please insert at
least the same number of FLASH EPROMs, please insert at least the same number of FLASH
EPROMs, please insert at least the same number of FLASH chips as the ROM pattern files
generated.

The PGM1462.EXE file is a program that loads and writes the ROM pattern files onto the (FLASH)
memory chips. To program the FLASH EPROM.

In the DOS prompt type the command as follows.

C:\>PGM1462 [ROM pattern file name]

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AR-B1462 User’s Guide

Step 7:

Step 8:

Step 9:

In the main menu, choose the <Load ROM File> item, that is the ROM_NAME=[file name] in the *.PGF
file.

Choose the <Program Memory> item, this item program will program the EPROMs.

NOTE: Move the reverse video bar to the <Program memory> option then press <ENTER>.

Reboot the system
NOTE: Reboot your computer by making a software or hardware reset.

6.4.3 Small Page 5V FLASH ROM Disk

(1) Switch and Jumper Setting

Step 1:

Step 2:

Step 3:

Use jumper block to set the memory type as ROM (FLASH).

Select the proper I/O base port, firmware address, disk drive number and EPROM type on SW1.

Insert programmed EPROM(s) or FLASH(s) chips into sockets starting at MEM1.

ON

OFF

12345678910

Figure 6-8 5V FLASH (29CXXX & 28EEXXX) Switch Setting

ABC
1
2
3
M1, M2, M3, & M4

JP8

1
2
3

(Factory Preset)

5V FLASH (64KX8, 128KX8 and 256KX8)

ABC
1
2
3
M1, M2, M3, & M4

Figure 6-9 5V FLASH (29CXXX & 28EEXXX) Jumper Setting

JP8

1

5V FLASH (512KX8 Only)

2
3

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AR-B1462 User’s Guide

(2) Using Tool Program

If small page 5V FLASH EPROMs are used, it is the same procedure as step 1 to step 4 of using the UV EPROM:

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Making a Program Group File (*.PGF file)

Generating ROM pattern files

Installing FLASH EPROMs

Programming FLASH EPROMs

Reboot system

(3) Typing DOS Command

You can use another way to format and copy files to the 5V FLASH EPROM. This method provides the
convenience of using a RAM disk. You can use the DOS <FORMAT> and <COPY> command to format and copy
files. Follow the following steps to format and copy files to the FLASH disk. it is the same procedure as step 1 to
step 4 of using the UV EPROM.

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

CAUTION: It is not recommended that the user formatted the disk and copy files to the FLASH disk very often.

Turn on your computer, when the screen shows the SSD BIOS menu, please hit the [F1] key during the
system boot-up, this enables you to enter the FLASH setup program. If the program does not show up,
check the switch setting of SW1.

Use <Page-Up>, <Page-Down>, <Right>, and <Left> arrow keys to select the correct FLASH memory
type and how many memory chips are going to be used.

Press the [F4] key to save the current settings.

After the DOS is loaded, use the DOS [FORMAT] command to format the FLASH disk.

To format the disk and copy DOS system files to the disk.

C:\>FORMAT [ROM disk letter] /S /U

To format the disk without copying DOS system files.

C:\>FORMAT [ROM disk letter] /U

Copy your program or files to the FLASH disk by using DOS [COPY] command.

Since the FLASH EPROM’s write cycle lifetime is about 10,000 or 100,000 times, writing data to the
FLASH too often will reduce the lifetime of the FLASH EPROM chips, especially the FLASH EPROM
chip in the MEM1 socket.

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AR-B1462 User’s Guide

6.4.4 RAM Disk

(1) Switch and Jumper Setting

Step 1:

Step 2:

Step 3:

NOTE: If you use the SRAM, please skip the SW1-6 & SW1-7 setting.

(2) Software Programming

It is very easy to use the RAM disk. The RAM disk operates just like a normal floppy disk. A newly installed RAM
disk needs to be formatted before files can be copied to it. Use the DOS command [FORMAT] to format the RAM
disk.

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

NOTE: In addition, you can use any other DOS command to operate the RAM disk.

Use jumper block to set the memory type as ROM (FLASH).

Select the proper I/O base port, firmware address, disk drive number on SW1.

Insert programmed SRAM chips into sockets starting at MEM1.

ABC
1
2
3
M1, M2, M3, & M4

Figure 6-10 SRAM Jumpers Setting

Use jumper block to select the memory type as SRAM refer.
Select the proper I/O base port, firmware address and disk drive number on SW1.
Insert SRAM chips into sockets starting from MEM1
Turn on power and boot DOS from hard disk drive or floppy disk drive.
Use the DOS command [FORMAT] to format the RAM disk. If you are installing SRAM for the first

time.
To format the RAM disk and copy DOS system files onto the RAM disk.
C:\>FORMAT [RAM disk letter] /S /U

To format the RAM disk without copying DOS system files into the RAM disk.
C:\>FORMAT [RAM disk letter] /U

Use the DOS command [COPY] to copy files onto the RAM disk. For example, if you want to copy file
<EDIT.EXE> to the RAM disk from drive C: and the RAM disk is assigned as drive A:.
COPY C:EDIT.EXE A:

JP8

1
2
3

SRAM

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AR-B1462 User’s Guide

6.4.5 Combination of ROM and RAM Disk

The AR-B1462 can be configured as a combination of one ROM disk and one RAM disk. Each disk occupies a
drive unit.

Step 1:

Step 2:

Step 3:

Step 4:

Step 5:

Step 6:

Step 7:

Step 8:

NOTE: Users can only boot DOS from the ROM disk drive if the AR-B1462 is configured as a ROM and a RAM

Use jumper block to select the proper ROM/RAM configuration you are going to use.
Insert the first programmed EPROM into the socket mem1, the second into the socket MEM2, etc.
Insert the SRAM chips starting from the first socket assigned as SRAM.
Select the proper I/O base port, firmware address and disk drive number on SW1.
Turn on power and boot DOS from hard disk drive or floppy disk drive.
Use the DOS command [FORMAT] to format the RAM disk.

C:\>FORMAT [RAM disk letter] /U
If 5V FLASH (small page) is being used for the first time.

And then use the DOS command [FORMAT] to format the FLASH disk.
If large page 5V FLASH is being installed for the first time, please use the FLASH programming utility

RFG.EXE to program ROM pattern files.

disk. You don’t need to copy DOS onto the RAM disk.

6.5 DISK ON CHIP INSTALLATION

The Disk On Chip is a new generation of high performance single-chip Flash Disk. It provides a Flash Disk in a
standard 32-pin DIP package.
This unique data storage solution offers a better, faster, and more cost-effective Flash Disk for Single Board
embedded systems. The Disk On Chip provides a Flash Disk that does not require any bus, slot or connector.
Simply insert the Disk On Chip into 32-pin socket MEM4 position on the CPU board. It is the optimal solution for
single board computers, it is a small, fully functional, easy to integrate, plug-and-play Flash Disk with very low
power consumption.
The Disk On Chip is fully tested and formatted before the product is shipped.

(1) Disk On Chip Hardware Installation

Step 1:
Step 2:
Step 3:

Step 4:
Step 5:
Step 6:

Step 7:
Step 8:
Step 9:

Step 10:

Make sure the target platform is powered OFF
Use JP7 to select the correct D.O.C. socket.
Plug the Disk On Chip device into the MEM4 socket. Verify the direction is correct (pin 1 of the Disk

On Chip is aligned with pin 1 of the MEM4 socket)
Line up and insert the AR-B1462 card into any free slot of your computer.
Power up the system
During power up you may observe the messages displayed by the Disk On Chip when its drivers are

automatically loaded into system’s memory
At this stage the Disk On Chip can be accessed as any disk in the system
If the Disk On Chip is the only disk in the system, it will appear as the first disk (drive C: in DOS)
If there are more disks besides the Disk On Chip, it will appear by default as the last drive, unless it

was programmed as first drive.
If you want the Disk On Chip to be bootable, copy the operating system files into the Disk On Chip

by using the standard DOS command.

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AR-B1462 User’s Guide

(2) Disk On Chip Memory Address Setting (JP7)

JP7

6
4
2

5
3
1

MEM4=SSD

Figure 6-11 JP7: Disk On Chip Memory Address Setting

JP7

6
4
2

MEM4=DOC

5
3
1

(3) Configuring the Disk On Chip as a Bootable Disk

The Disk On Chip fully supports the BOOT capability. In order for the Disk On Chip to be bootable, it should be
DOS formatted as bootable, like any floppy or hard disk that required to be booted.

SYS D:

Change the disk into bootable (assuming the Disk On Chip is disk D)

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AR-B1462 User’s Guide

7. BIOS CONSOLE

This chapter describes the AR-B1462 BIOS menu displays and explains how to perform common tasks needed to
get up and running, and presents detailed explanations of the elements found in each of the BIOS menus. The
following topics are covered:

! BIOS Setup Overview
! Standard CMOS Setup
! Advanced CMOS Setup
! Advanced Chipset Setup
! Peripheral Setup
! Auto-Detect Hard Disks
! Password Setting
! Load Default Setting
! BIOS Exit
! BIOS Update

7.1 BIOS SETUP OVERVIEW

BIOS is a program used to initialize and set up the I/O system of the computer, which includes the ISA bus and
connected devices such as the video display, diskette drive, and the keyboard.
The BIOS provides a menu-based interface to the console subsystem. The console subsystem contains special
software, called firmware that interacts directly with the hardware components and facilitates interaction between
the system hardware and the operating system.
The BIOS Default Values ensure that the system will function at its normal capability. In the worst situation the
user may have corrupted the original settings set by the manufacturer.
After turned on the computer, the BIOS will not only perform a diagnostics of the system but also will display the
size of the memory that is being tested. Press the [Del] key to enter the BIOS Setup program, and then the main
menu will show on the screen.
The BIOS Setup main menu includes some options. Use the [Up/Down] arrow key to highlight the option that you
wish to modify, and then press the [Enter] key to assure the option and configure the functions.

AMIBIOS HIFLEX SETUP UTILITY - VERSION 1.16

(C) 1996 American Megatrends, In c. All Rights Reserved

Standard CMOS Setup

Advanced CMOS Setup

Advanced Chipset Setup

Peripheral Setup
Auto-Detect Hard Disks
Change User Password

Change Supervisor Password

Auto Configuration with Optimal Settings

Auto Configuration with Fail Safe Settings

Save Settings and Exit

Exit Without Saving

Standard CMOS setup for changing time, date, hard disk type, etc.

ESC:Exit ↑↓:Sel F2/F3:Color F10:Save & Exit

Figure 7-1 BIOS: Setup Main Menu

CAUTION: 1. AR-B1462 BIOS the factory-default setting is used to the <Auto Configuration with Optimal Settings>

Acrosser recommends using the BIOS default setting, unless you are very familiar with the setting
function, or you can contact the technical support engineer.

2. If the BIOS loss setting, the CMOS will detect the <Auto Configuration with Fail Safe Settings> to
boot the operation system, this option will reduce the performance of the system. Acrosser
recommends choosing the <Auto Configuration with Optimal Setting> in the main menu. The option
is best-case values that should optimize system performance.

3. The BIOS settings are described in detail in this section.

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AR-B1462 User’s Guide

7.2 STANDARD CMOS SETUP

The <Standard CMOS Setup> option allows you to record some basic system hardware configuration and set the
system clock and error handling. If the CPU board is already installed in a working system, you will not need to
select this option anymore.

AMIBIOS SETUP - STANDARD CMOS SETUP

(C) 1996 American Megatrends, In c. All Rights Reserved

Date (mm/dd/yyyy): Sat Dec 05,1998 640K
Time (hh/mm/ss): 13:13:00 39MB

Floppy Drive A: Not Installed
Floppy Drive B: Not Installed
LBA Blk PIO 32Bit

Pri Master : Auto Off Off Auto Off
Pri Slave : Auto Off Off Auto Off

Boot Sector Virus P rot ection Disabled

Month: Jan - Dec ESC:Exit ↑↓:Sel
Day: 01 - 31 PgUp/PgDn:Modify

Year: 1901 - 2099 F2/F3:Color

Date & Time Setup

Highlight the <Date> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the month, day and year format.
Highlight the <Time> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow
the hour, minute and second format.
The user can bypass the date and time prompts by creating an AUTOEXEC.BAT file. For information on how to
create this file, please refer to the MS-DOS manual.

Floppy Setup

The <Standard CMOS Setup> option records the types of floppy disk drives installed in the system.
To enter the configuration value for a particular drive, highlight its corresponding field and then select the drive type
using the left-or right-arrow key.

Hard Disk Setup

The BIOS supports various types for user settings, The BIOS supports <Pri Master> and <Pri Slave> so the user
can install up to two hard disks. For the master and slave jumpers, please refer to the hard disk’s installation
descriptions and the hard disk jumper settings.
You can select <AUTO> under the <TYPE> and <MODE> fields. This will enable auto detection of your IDE drives
during boot up. This will allow you to change your hard drives (with the power off) and then power on without
having to reconfigure your hard drive type. If you use older hard disk drives, which do not support this feature,
then you must configure the hard disk drive in the standard method as described above by the <USER> option.

Boot Sector Virus Protection

This option protects the boot sector and partition table of your hard disk against accidental modifications. Any
attempt to write to them will cause the system to halt and display a warning message. If this occurs, you can either
allow the operation to continue or use a bootable virus-free floppy disk to reboot and investigate your system. The
default setting is <Disabled>. This setting is recommended because it conflicts with new operating systems.
Installation of new operating system requires that you disable this to prevent write errors.

Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode

Figure 7-2 BIOS: Standard CMOS Setup

64

AR-B1462 User’s Guide

7.3 ADVANCED CMOS SETUP

The <Advanced CMOS SETUP> option consists of configuration entries that allow you to improve your system
performance, or let you set up some system features according to your preference. Some entries here are

required by the CPU board’s design to remain in their default settings.

AMIBIOS SETUP - ADVANCED CMOS SETUP

(C) 1996 American Megatrends, In c. All Rights Reserved

BootUp Sequence C:,A:,CDROM
BootUp Num-Lock On
Floppy Drive Swap Disabled
Floppy Drive Seek Disabled
Mouse Support Enabled
Typematic Rate Fast
System Keyboard Present
Primary Display VGA/EGA
Password Check Setup
Wait For ‘F1’ If Error Enabled
Hit ‘DEL’ Message Displ ay Enabled
Internal Cache WriteBack
External Cache WriteThru
System BIOS Cac heabl e Enabled
Hard disk Delay 3 Sec
C000, 16k Shadow Enabled
C400, 16k Shadow Enabled
C800, 16k Shadow Disabled
CC00, 16k Shadow Disabled
D000, 16k Shadow Disabled
D400, 16k Shadow Disabled
D800, 16k Shadow Disabled
DC00, 16k Shadow Disabled

Available Options:

C:, A:. CDROM
A:, C:, CDROM
CDROM, A:, C:

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify

F2/F3:Color

Figure 7-3 BIOS: Advanced CMOS Setup

Boot Up Sequence

The option determines where the system looks first for an operating system.

Boot Up Num-Lock

This item is used to activate the Num-Lock function upon system boot. If the setting is on, after a boot, the Num­Lock light is lit, and user can use the number key.

Floppy Drive Swap

The option reverses the drive letter assignments of your floppy disk drives in the Swap A, B setting, otherwise
leave on the default setting of Disabled (No Swap). This works separately from the BIOS Features floppy disk
swap feature. It is functionally the same as physically interchanging the connectors of the floppy disk drives. When
the setting is <Enabled>, the BIOS will be swapped floppy drive assignments so that Drive A becomes Drive B,
and Drive B becomes Drive A under DOS.

Floppy Drive Seek

If the <Floppy Drive Seek> item is setting Enabled, the BIOS will seek the floppy <A> drive one time upon boot up.

Mouse Support

The setting of Enabled allows the system to detect a PS/2 mouse on boot up. If detected, IRQ12 will be used for
the PS/2 mouse. IRQ 12 will be reserved for expansion cards if a PS/2 mouse is not detected. Disabled will
reserve IRQ12 for expansion cards and therefore the PS/2 mouse will not function.

Typematic Rate

This item specifies the speed at which a keyboard keystroke is repeated.

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AR-B1462 User’s Guide

System Keyboard

This function specifies that a keyboard is attached to the computer.

Primary Display

The option is used to set the type of video display card installed in the system.

Password Check

This option enables password checking every time the computer is powered on or every time the BIOS Setup is
executed. If Always is chosen, a user password prompt appears every time the computer is turned on. If Setup is
chosen, the password prompt appears if the BIOS executed.

Wait for ‘F1’ If Error

AMIBIOS POST error messages are followed by:

Press <F1> to continue

If this option is set to Disabled, the AMIBIOS does not wait for you to press the <F1> key after an error message.

Hit ‘DEL’ Message Display

Set this option to Disabled to prevent the message as follows:

Hit ‘DEL’ if you want to run setup

It will prevent the message from appearing on the first BIOS screen when the computer boots.

Internal Cache

This option specifies the caching algorithm used for L1 internal cache memory. The settings are:

Setting Description

Disabled

WriteBack

WriteThru

Table 7-1 Internal Cache Setting

Neither L1 internal cache memory on the CPU or L2
secondary cache memory is enabled.
Use the write-back caching algorithm.

Use the write-through caching algorithm.

External Cache

This option specifies the caching algorithm used for L2 secondary (external) cache memory. The settings are:

Setting Description

Disabled Neither L1 internal cache memory on the CPU or L2

secondary cache memory is enabled.

WriteBack Use the write-back caching algorithm.

WriteThru Use the write-through caching algorithm.

Table 7-2 External Cache Setting

System BIOS Cacheable

When this option is set to Enabled, the contents of the F0000h system memory segment can be read from or
written to L2 secondary cache memory. The contents of the F0000h memory segment are always copied from the
BIOS ROM to system RAM for faster execution.
The settings are Enabled or Disabled. The Optimal default setting is Enabled. The Fail-Safe default setting is
Disabled.

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AR-B1462 User’s Guide

Shadow

These options control the location of the contents of the 32KB of ROM beginning at the specified memory location.
If no adapter ROM is using the named ROM area, this area is made available to the local bus. The settings are:

SETTING DESCRIPTION

Disabled

Enabled

Cached

Table 7-3 Shadow Setting

The video ROM is not copied to RAM. The contents of
the video ROM cannot be read from or written to cache
memory.
The contents of C000h - C7FFFh are written to the same
address in system memory (RAM) for faster execution.
The contents of the named ROM area are written to the
same address in system memory (RAM) for faster
execution, if an adapter ROM will be using the named
ROM area. Also, the contents of the RAM area can be
read from and written to cache memory.

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AR-B1462 User’s Guide

7.4 ADVANCED CHIPSET SETUP

This option controls the configuration of the board’s chipset. Control keys for this screen are the same as for the
previous screen.

AMIBIOS SETUP - ADVANCED CHIPSET SETUP

(C) 1996 American Megatrends, In c. All Rights Reserved

Auto Config Function Enabled
AT Bus Clock CLK/4
DRAM Read Timing Normal
DRAM Write Timing Normal
Memory Parity Check Disabled
DRAM Hidden Refresh Enabled
DRAM Refresh Period Setting 60us
Memory Hole At 15-16M Disabled
ISA I/O Recovery Disabled
ISA I/O Recovery time 1.5us

Available Options :

Disabled
Enabled

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify

F2/F3:Color

Figure 7-4 BIOS: Advanced Chipset Setup

Automatic Configuration

If selecting a certain setting for one BIOS Setup option determines the settings for one or more other BIOS Setup
options, the BIOS automatically assigns the dependent settings and does not permit the end user to modify these
settings unless the setting for the parent option is changed. Invalid options are grayed and cannot be selected.

AT Bus Clock

This option sets the polling clock speed of ISA Bus (PC/104).

NOTE:

1. PCLK means the CPU inputs clock.

2. Acrosser recommends user setting at the range of 8MHz to 10MHz.

Memory Parity Check

This option Enables or Disables parity is error checking for all system RAM. This option must be Disabled if the
used DRAM SIMMs are 32-bit but not 36-bit devices.

Memory Hole at 15-16 M

This option specifies the range 15MB to 16MB in memory that cannot be addressed on the ISA bus.

ISA I/O Recovery
ISA I/O Recovery Time

These options specify the length of the delay (in BUSCLK) inserted between consecutive 8-bit/16-bit I/O operations.

68

7.5 PERIPHERAL SETUP

This section is used to configure peripheral features.

AMIBIOS SETUP - PERIPHERAL SETUP

(C) 1996 American Megatrends, In c. All Rights Reserved

AR-B1462 User’s Guide

OnBoard FDC Enabled
OnBoard Serial Port1 3F8
OnBoard Serial Port1 IRQ 4
OnBoard Serial Port2 2F8
OnBoard Serial Port2 IRQ 3
OnBoard Parallel Port 378
Parallel Port Mode Normal
EPP Version N/A
Parallel Port IRQ 7
Parallel Port DMA Channel N/A
OnBoard PCI IDE Both

Available Options :

Auto
Disabled
Enabled

ESC:Exit ↑↓:Sel
PgUp/PgDn:Modify

F2/F3:Color

Figure 7-5 BIOS: Peripheral Setup

On Board FDC

This option enables the floppy drive controller on the AR-B1462.

On Board Serial Port

This option enables the serial port on the AR-B1462.

On Board Parallel Port

This option enables the parallel port on the AR-B1462.

Parallel Port Mode

This option specifies the parallel port mode. ECP and EPP are both bi-directional data transfer schemes that
adhere to the IEEE P1284 specifications.

Parallel Port DMA Channel

This option is only available if the setting for the parallel Port Mode option is ECP.

On Board PCI IDE/IDE Prefetch

This option specifies the onboard IDE controller channels that will be used.

7.6 AUTO-DETECT HARD DISKS

This option detects the parameters of an IDE hard disk drive, and automatically enters them into the Standard
CMOS Setup screen.

7.7 PASSWORD SETTING

This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a
password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor
password or a User password.

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AR-B1462 User’s Guide

7.7.1 Setting Password

Select the appropriate password icon (Supervisor or User) from the Security section of the BIOS Setup main menu.
Enter the password and press [Enter]. The screen does not display the characters entered. After the new
password is entered, retype the new password as prompted and press [Enter].

If the password confirmation is incorrect, an error message appears. If the new password is entered without error,
press [Esc] to return to the BIOS Main Menu. The password is stored in CMOS RAM after BIOS completes. The
next time the system boots, you are prompted for the password function is present and is enabled.

Enter new supervisor password:

7.7.2 Password Checking

The password check option is enabled in Advanced Setup by choosing either Always (the password prompt
appears every time the system is powered on) or Setup (the password prompt appears only when BIOS is run).
The password is stored in CMOS RAM. User can enter a password by typing on the keyboard. As user select
Supervisor or User. The BIOS prompts for a password, user must set the Supervisor password before user can
set the User password. Enter 1-6 character as password. The password does not appear on the screen when
typed. Make sure you write it down.

7.8 LOAD DEFAULT SETTING

In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items
to quickly set system configuration parameters, you can choose a group of settings that have a better chance of
working when the system is having configuration related problems.

7.8.1 Auto Configuration with Optimal Setting

User can load the optimal default settings for the BIOS. The Optimal default settings are best-case values that
should optimize system performance. If CMOS RAM is corrupted, the optimal settings are loaded automatically.

Load high performance settings (Y/N) ?

7.8.2 Auto Configuration with Fail Safe Setting

User can load the Fail-Safe BIOS Setup option settings by selecting the Fail-Safe item from the Default section of
the BIOS Setup main menu.
The Fail-Safe settings provide far from optimal system performance, but are the most stable settings. Use this
option as a diagnostic aid if the system is behaving erratically.

Load failsafe settings (Y/N) ?

7.9 BIOS EXIT

This section is used to exit the BIOS main menu in two types situation. After making your changes, you can either
save them or exit the BIOS menu and without saving the new values.

7.9.1 Save Settings and Exit

This item set in the <Standard CMOS Setup>, <Advanced CMOS Setup>, <Advanced Chipset Setup> and the new
password (if it has been changed) will be stored in the CMOS. The CMOS checksum is calculated and written into
the CMOS.

As you select this function, the following message will appear at the center of the screen to assist you to save data
to CMOS and Exit the Setup.

Save current settings and exit (Y/N) ?

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AR-B1462 User’s Guide

7.9.2 Exit Without Saving

When you select this option, the following message will appear at the center of the screen to help to abandon all
Data and Exit Setup.

Quit without saving (Y/N) ?

7.10 BIOS UPDATE

The BIOS program instructions are contained within computer chips called FLASH ROMs that are located on your
system board. The chips can be electronically reprogrammed, allowing you to upgrade your BIOS firmware
without removing and installing chips.

The AR-B1462 BIOS provides a menu-based interface to the console subsystem. The console subsystem
contains special software, called firmware that interacts directly with the hardware components and facilitates
interaction between the system hardware and the operating system.

The AR-B1462 provides FLASH BIOS update function for you to easily upgrade newer BIOS version. Please
follow the operating steps for updating new BIOS:

Step 1:

Step 2:

Step 3:

NOTE: 1. After turn on the computer and the system didn’t detect the boot procedure, please press the

Insert the FLASH BIOS diskette into the floppy disk drive.

Turn on your system and press [Ctrl]+[Home[ (Hit the [Ctrl] key and [Home] key simultaneously just
powered on. Then the onboard BIOS will read new BIOS file named and AMIBOOT.ROM from
floppy drive and write to FLASH.

If all steps is correctly, the system will reboot. But the system did not boot up, please check
everything and try again. If still not work, please contact your Acrosser distributor for technology
supports at once.

[Ctrl]+[Home] key immediately. The system will detect the BIOS file from floppy drive.

2. The BIOS Flash disk is not the standard accessory. It supports to add some functions, if it is
necessary to update in the future. User can download the suitable BIOS. The address is as follows:

http:\\www.acrosser.com

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AR-B1462 User’s Guide

8. SPECIFICATIONS & SSD TYPES SUPPORTED

8.1 SPECIFICATIONS

CPU:
Chipset:
Bus Interface:
RAM Memory:
Cache Size:
VGA/LCD Display:

HDC:
FDC:
Parallel Port:

Serial Port:
Keyboard:
Watchdog:
Speaker:
Real Time Clock:
BIOS:
Flash Disk:
BUS Drive Cap.:
CE Design-In:
Indicator:
Power Req.:
PC Board:
Dimensions:

Supports25 to 133 Mhz Intel / AMD / Cyrix / ST / IBM 486 CPU .
ALI M1489/M1487 and C & T 65545
ISA (PC/AT) and non-stack through PC/104 bus
Supports FPM/EDO RAM, 72 MB maximum (8MB on-board and one 72-pin SIMMs w/o DRAM)
512KB for standard
AR-B1462: 1 MB VRAM (PCI bus, 1024X768/256 colors)

ARB1462A: 2 MB VRAM (PCI bus, 1024X768/256 colors)
One PCI IDE Supports LBA/Block mode access

Supports two 5.25” or 3.5” floppy disk drives
1 bi-directional centronics type parallel port

Supports SPP/EPP/ECP mode
1 RS-232C and 1 RS-232C/RS-485

PC/AT compatible keyboard
Programmable watchdog timer 3 to 42 seconds time interval
On-board Buzzer and external speaker
BQ3287MT or compatible chips with 128 bytes data RAM
AMI Flash BIOS (128KB, including VGA BIOS)
Supports 1 DiskOnChip socket
15 TTL level loads maximum
Add EMI components to COM ports, parallel port, CRT, keyboard, and PS/2 mouse
Power LED, and watchdog LED
+5V only, 2.0A maximum (base on Intel DX4-100)
8 layers, EMI considered
185 mmX122mm (7.29”X4.80”)

8.2 SSD TYPES SUPPORTED

The following list contains SRAMs supported by the AR-B1462:

AKM AKM628128 (128Kx8, 1M bits)
HITACHI HM628128 (128Kx8, 1M bits)
NEC UPD431000A (128Kx8, 1M bits)
SONY CXK581000P/M (128Kx8, 1M bits)

HITACHI HM628512 (512Kx8, 4M bits)
NEC UPD434000 (512Kx8, 4M bits)
SONY CXK584000P/M (512Kx8, 4M bits)

The following list contains large page 5V FLASHs supported by the AR-B1462:

AMD Am29F512 (64Kx8, 512K bits)
AMD Am29F010 (128Kx8, 1M bits)
AMD Am29F020 (256Kx8, 2M bits)
AMD Am29F040 (512Kx8, 4M bits)

The following list contains small page 5V FLASHs supported by the AR-B1462:

ATMEL AT29C512 (64Kx8, 512K bits)
SST PH29EE512 (64Kx8, 512K bits)
ATMEL AT29C010 (128Kx8, 1M bits)

72

SST 28EE010 (128Kx8, 1M bits)
SST 28EE011 (128Kx8, 1M bits)
SST PH29EE010 (128Kx8, 1M bits)
WINBOND W29EE011 (128Kx8, 1M bits)
ATMEL AT29C020 (256Kx8, 2M bits)
ATMEL AT29C040 (512Kx8, 4M bits)
ATMEL AT29C040A (512Kx8, 4M bits)
SST PH28SF040 (512Kx8, 4M bits)

The following list contains EPROMs supported by the AR-B1462:

AMD Am27C010 (128Kx8, 1M bits)
ATMEL AT27C010 (128Kx8, 1M bits)
FUJITSHU MBM27C1001 (128Kx8, 1M bits)
HITACHI HN27C101 (128Kx8, 1M bits)
INTEL D27C010 (128Kx8, 1M bits)
MITSHUBISHI M5M27C101 (128Kx8, 1M bits)
NEC D27C1001 (128Kx8, 1M bits)
NS NM27C010 (128Kx8, 1M bits)
SGS-THOMSON M27C1001 (128Kx8, 1M bits)
TI TMS27C010 (128Kx8, 1M bits)
TOSHIBA TCS711000 (128Kx8, 1M bits)

AMD Am27C020 (256Kx8, 2M bits)
ATMEL AT27C020 (256Kx8, 2M bits)
FUJITSU MBM27C2001 (256Kx8, 2M bits)
HITACHI HN27C201 (256Kx8, 2M bits)
INTEL D27C020 (256Kx8, 2M bits)
MITSHUBISHI M5M27C201 (256Kx8, 2M bits)
NEC D27C2001 (256Kx8, 2M bits)
NS NM27C020 (256Kx8, 2M bits)
SGS-THOMSON M27C2001 (256Kx8, 2M bits)
TI TMS27C020 (256Kx8, 2M bits)
TOSHIBA TCS712000 (256Kx8, 2M bits)

AMD Am27C040 (512Kx8, 4M bits)
ATMEL AT27C040 (512Kx8, 4M bits)
FUJITSU MBM27C4001 (512Kx8, 4M bits)
HITACHI HN27C401 (512Kx8, 4M bits)
INTEL D27C040 (512Kx8, 4M bits)
MITSUBISHI M5M27C401 (512Kx8, 4M bits)
NEC D27C4001 (512Kx8, 4M bits)
NS NM27C040 (512Kx8, 4M bits)
SGS-THOMSON M27C4001 (512Kx8, 4M bits)
TI TMS27C040 (512Kx8, 4M bits)
TOSHIBA TCS714000 (512Kx8, 4M bits)

ATMEL AT27C080 (1Mx8, 8M bits)

AR-B1462 User’s Guide

73

AR-B1462 User’s Guide

9. PLACEMENT & DIMENSIONS

9.1 PLACEMENT

SIM1

H3

1

1

H7

JP10 JP11

50

50

SIM2

17

CN1

105

104

U34

12 5GND

81

100

1

1
2

J9

CN14

CN3J1

LED2

81

81

CN11

LM1

2

4

6

8

51

50

U7

31

1

P3

P4

2

JP3

H35

U18

100

1

U26

100

1

J3

1

JP2

BC

A
1
2
3

ABC
1
2
3

51

50

SW1

31

51

ABC

50

1
2
3

ABC
1

31

2
3

CN12
H10

JP6

JP7

JP8

JP9

JP1

H4 H5

LED1

2

1

1

CN2

U6

1

4

5

CN10

1

3

JP5

ABC

1
2
3

1

2

U8

JP4

J8

S
R
Q
P
N
M
L
K
J
H
G
F
E
D
C
B
A

51

1

U11

51

U28

80486

6

7

9

8

10

11

12

13

14

15

16

H9

J10

J4

CN4

J5

U17

U20

U27

U30

J2

H6

LED3

J6

J7

12

CN6

GND

5

CN5

P1

P6

P5

P2

CN7

CN8

CN9

P8

P9

P7

P10

M5

ABC
1
2

P12

P11

H11

3

CN16CN13 CN15

74

9.2 DIMENSIONS

1600

200

8−∅138

8−∅138

8−∅1388−∅138

4700

AR-B1462 User’s Guide

29003975

5750

5350

3375

3875

375

675

200

145

250

31503825

200

7600
8000

Unit: mil (1 inch = 25.4 mm = 1000 mil)

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AR-B1462 User’s Guide

10. PROGRAMMING RS-485 & INDEX

10.1 PROGRAMMING RS-485

The majority communicative operation of the RS-485 is in the same of the RS-232. When the RS-485 proceeds
the transmission which needs control the TXC signal, and the installing steps are as follows:

Step 1:

Step 2:

Step 3:

Step 4:

NOTE: Please refer to the section of the “Serial Port” in the chapter “System Control” for the detail description of

(1) Initialize COM port

Step 1:

Step 2:

NOTE:

(2) Send out one character (Transmit)

Step 1:

Step 2:

Step 3:

Step 4:

(3) Send out one block data (Transmit – the data more than two characters)

Step 1:

Step 2:

Step 3:

Step 4:

(4) Receive data

The RS-485’s operation of receiving data is in the same of the RS-232’s.

Enable TXC

Send out data

Waiting for data empty

Disable TXC

the COM port’s register.

Initialize COM port in the receiver interrupt mode, and /or transmitter interrupt mode. (All of the
communication protocol buses of the RS-485 are in the same.)

Disable TXC (transmitter control), the bit 0 of the address of offset+4 just sets “0”.

Control the AR-B1462 CPU card’s DTR signal to the RS-485’s TXC communication.

Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.

Send out the data. (Write this character to the offset+0 of the current COM port address)

Wait for th e buffer’s dat a empty. Check tr ansmitter hol ding regist er (THRE, bit 5 of t he address of
offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be
“0”.

Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”

Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.

Send out the data. (Write all data to the offset+0 of the current COM port address)

Wait for th e buffer’s dat a empty. Check tr ansmitter hol ding regist er (THRE, bit 5 of t he address of
offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be
“0”.

Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”

76

(5) Basic Language Example

a.) Initial 86C450 UART

10 OPEN “COM1:9600,m,8,1”AS #1 LEN=1
20 REM Reset DTR
30 OUT &H3FC, (INP(%H3FC) AND &HFA)
40 RETURN

b.) Send out one character to COM1

10 REM Enable transmitter by setting DTR ON
20 OUT &H3FC, (INP(&H3FC) OR &H01)
30 REM Send out one character
40 PRINT #1, OUTCHR$
50 REM Check transmitter holding register and shift register
60 IF ((INP(&H3FD) AND &H60) >0) THEN 60
70 REM Disable transmitter by resetting DTR
80 OUT &H3FC, (INP(&H3FC) AND &HEF)
90 RETURN

c.) Receive one character from COM1

10 REM Check COM1: receiver buffer
20 IF LOF(1)<256 THEN 70
30 REM Receiver buffer is empty
40 INPSTR$”
50 RETURN
60 REM Read one character from COM1: buffer
70 INPSTR$=INPUT$(1,#1)
80 RETURN

AR-B1462 User’s Guide

77

AR-B1462 User’s Guide

10.2 INDEX

Name Function Page

CN1 120-pin PCI connector 31
CN2 AUI connector 35
CN3 CPU cooling fan power connector 31
CN4 RS-232 connector 26
CN5 40-pin hard disk (IDE) connector 19
CN6 4-pin power connector 28
CN7 44-pin hard disk (IDE) connector 19
CN8 FDD port connector 18

CN9 Parallel port connector 20
CN10 26-pin audio connector 29
CN11 64-pin PC/104 connector bus A & B 21
CN12 40-pin PC/104 connector bus C & D 21
CN13 CRT connector 36
CN14 LCD panel display connector 39
CN15 RS-485/RS-422 connector 25
CN16 TTL connector 26

SIMM1~ SIMM2 Socket for DRAM SIMMs 32

J1 8-pin power connector 27
J2 Touch screen connector 38
J3 Network 4-pin connector 35
J4 Keyboard connector 27
J5 PS/2 mouse connector 28
J6 Reset header 28
J7 Keyboard lock header 27
J8 External battery connector 29
J9 External speaker header 27

J10 LCD control connector 38
LED1 +3.3V power LED
LED2 Watchdog LED
LED3 +5V LED

LM1 LED header 23

JP1 PCI connector power select 31

JP2 PS/2 mouse IRQ12 set ting 28

JP3 CPU base clock select 30

JP4 PCI clock select 30

JP5 DENAVEE & DVEE signal select 38

JP6 DE/E signal from M or LP select 38

JP7 DiskOnChip mem ory address setting 62

JP8 Memory type setting 55

JP9 Battery charger select 29

JP10 Cache RAM select 32
JP11 AMD 3X/4X CPU select 30
JP12 LCD voltage select 38

M1~ M4 Mem ory type setting 55

M5 COM-A RS-485/RS-422 adapter select 23

Terminal select 23

M6 CPU logic c ore vol tage select 30

SW1 COM-B RS232/RS-485 Select 24

Switch Select 51
Watchdog I/O Port Address S el e ct 49

Note: If the content in setting is inconsistent with the CD-ROM. Please refer to the setting as priority.

78