Acrosser AR-B1320 User Manual
AR-B1320
PC/104 386SX CPU BOARD
User’ s Guide
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Edition: 1.2
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Copyright Notice and Disclaimer
August 1999
Acrosser Technology makes no representations or warranties with respect to the contents hereof and
specifically disclaims any implied warranties of merchantability or fitness for any particular purpose.
Furthermore, Acrosser Technology reserves the right to revise this publication and to make changes from
time to time in the contents hereof without obligation of Acrosser Technology to notify any person of such
revisions or changes. Check for updates at www.acrosser.com
Possession, use, or copying of the software described in this publication is authorized only pursuant to a
valid written license from Acrosser or an authorized sublicensor.
(C) Copyright Acrosser Technology Co., Ltd., 1999. All rights Reserved.
Acrosser, Intel, ALI, AMI…are registered trademarks.
All other trademarks and registered trademarks are the property of their respective holders.
This document was produced with Adobe Acrobat 3.01.
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Table of Contents
0. PREFACE....................................................................................................................................... V
0.1 WELCOME TO THE AR-B1320 CPU BOARD................................................................................. V
0.2 BEFORE YOU USE THIS GUIDE ....................................................................................................V
0.3 RETURNING YOUR BOARD FOR SERVICE .................................................................................V
0.4 TECHNICAL SUPPORT AND USER COMMENTS .........................................................................V
0.5 ORGANIZATION ........................................................................................................................... VI
0.6 STATIC ELECTRICITY PRECAUTIONS ...................................................................................... VI
1. OVERVIEW.................................................................................................................................1-1
1.1 INTRODUCTION........................................................................................................................... 1-1
1.2 PACKING LIST ............................................................................................................................. 1-1
1.3 FEATURES.................................................................................................................................... 1-2
2. SYSTEM CONTROLLER...........................................................................................................2-1
2.1 MICROPROCESSOR..................................................................................................................... 2-1
2.2 DMA CONTROLLER .................................................................................................................... 2-1
2.3 DRAM CONFIGURATION............................................................................................................ 2-2
2.4 I/O CONTROLLER........................................................................................................................ 2-2
2.5 I/O PORT ADDRESS MAP............................................................................................................ 2-3
2.6 INTERRUPT CONTROLLER ........................................................................................................ 2-4
2.7 SERIAL PORTS............................................................................................................................. 2-5
2.8 PARALLEL PORT......................................................................................................................... 2-7
2.9 TIMER ........................................................................................................................................... 2-9
2.10 REAL-TIME CLOCK AND NON-VOLATILE RAM................................................................... 2-10
2.11 WATCHDOG TIMER .................................................................................................................. 2-11
2.12 FLASH DISK ............................................................................................................................... 2-11
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3. SETTING THE SYSTEM............................................................................................................3-1
3.1 BOARD LAYOUT ......................................................................................................................... 3-2
3.2 CPU BASE CLOCK SELECT (JP1) ............................................................................................... 3-4
3.3 SWITCH SETTINGS (SW1)........................................................................................................... 3-4
3.4 EXTERNAL LED HEADER (J1).................................................................................................... 3-4
3.5 KEYBOARD CONNECTOR (J2)................................................................................................... 3-5
3.6 RESET HEADER (J3) .................................................................................................................... 3-5
3.7 SPEAKER HEADER (J4)............................................................................................................... 3-5
3.8 POWER CONNECTOR (J5)........................................................................................................... 3-6
3.9 PRINTER CONNECTOR (CN1)..................................................................................................... 3-6
3.10 FLOPPY CONNECTOR (CN2)...................................................................................................... 3-7
3.11 SERIAL PORT CONNECTORS (CN3, CN4 & CN5) ..................................................................... 3-7
3.11.1 RS-232C CONNECTORS (CN3 & CN4) ..............................................................................................3-8
3.11.2 RS-485 CONNECTOR (CN5) ..............................................................................................................3-8
3.11.3 RS-485 TERMINATOR (JP2 & JP3)....................................................................................................3-9
3.12 HARD DISK CONTROLLER (CN6).............................................................................................. 3-9
3.13 PC/104 CONNECTOR (CN7 & CN8)........................................................................................... 3-10
3.13.1 64 PIN PC/104 CONNECTOR – CN8 (BUS A & B) ........................................................................... 3-10
3.13.2 40 PIN PC/104 CONNECTOR - CN7 (BUS C & D) ........................................................................... 3-10
3.13.3 PC/104 CHANNEL SIGNAL DESCRIPTION..................................................................................... 3-11
3.14 LED INDICATOR (LED1 & LED2)............................................................................................. 3-12
3.14.1 POWER LED (LED1)........................................................................................................................3-12
3.14.2 STATUS LED (LED2) ....................................................................................................................... 3-12
3.15 USING THE WATCHDOG TIMER ............................................................................................. 3-13
3.15.1 WD ENABLE REGISTER - INDEX 37H.............................................................................................3-13
3.15.2 WD REPORT REGISTER - INDEX 38H ............................................................................................ 3-14
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3.15.3 WD TIMER COUNTER(24 BITS) - INDEX 39H, 3AH, AND 3BH.......................................................3-14
3.15.4 TIMEOUT STATUS & RESET WATCHDOG - INDEX 3CH...............................................................3-15
3.15.5 PROGRAMMING WATCHDOG - BASIC OPERATION.....................................................................3-15
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3.16 USING THE FLASH DISK........................................................................................................... 3-16
3.16.1 SSD CONFIGURATION ...................................................................................................................3-17
3.16.2 SOFTWARE PROGRAMMING .........................................................................................................3-17
3.16.3 DISKONMODULE ...........................................................................................................................3-18
4. BIOS CONSOLE..........................................................................................................................4-1
4.1 BIOS SETUP OVERVIEW............................................................................................................. 4-1
4.2 STANDARD CMOS SETUP .......................................................................................................... 4-2
4.3 ADVANCED CMOS SETUP.......................................................................................................... 4-4
4.4 ADVANCED CHIPSET SETUP..................................................................................................... 4-7
4.5 PERIPHERAL SETUP.................................................................................................................... 4-9
4.6 AUTO-DETECT HARD DISKS ................................................................................................... 4-10
4.7 PASSWORD SETTING................................................................................................................ 4-10
4.8 SETTING THE PASSWORD........................................................................................................ 4-10
4.8.1 CHECKING THE PASSWORD ............................................................................................................4-10
4.9 LOAD THE DEFAULT SETTING ............................................................................................... 4-11
4.9.1 AUTO CONFIGURATION WITH OPTIMAL SETTING........................................................................ 4-11
4.9.2 AUTO CONFIGURATION WITH FAIL SAFE SETTING ......................................................................4-11
4.10 BIOS EXIT ................................................................................................................................... 4-11
4.10.1 SAVE SETTINGS AND EXIT............................................................................................................. 4-11
4.10.2 EXIT WITHOUT SAVING .................................................................................................................4-11
4.11 BIOS UPDATE............................................................................................................................. 4-12
5. APPENDIX...................................................................................................................................5-1
5.1 SPECIFICATIONS......................................................................................................................... 5-1
5.2 SUPPORTED FLASH MEMORY................................................................................................... 5-2
5.3 BOARD DIMENSIONS.................................................................................................................. 5-3
5.4 PROGRAMMING THE RS-485 ..................................................................................................... 5-4
IV
0. PREFACE
0.1 WELCOME TO THE AR-B1320 CPU BOARD
This guide introduces the Acrosser AR-B1320 CPU board.
This guide describes this card’ s functions, features, and how to start, set up and operate your ARB1320. You could also find the general system information here.
0.2 BEFORE YOU USE THIS GUIDE
If you have not already installed this AR-B1320, refer to Chapter 3, “Setting System,” in this guide.
0.3 RETURNING YOUR BOARD FOR SERVICE
If your board requires servicing, contact the dealer from whom you purchased the product for
service information. If you need to ship your board to us for service, be sure it is packed in a
protective carton. We recommend that you keep the original shipping container for this purpose.
You can help assure efficient servicing of your product by following these guidelines:
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1). Include your name, address, daytime telephone, facsimile number and e-mail where you may
be reached
2). A description of the system configurations and/or the software at the time of malfunction.
3). A brief description of the symptoms.
0.4 TECHNICAL SUPPORT AND USER COMMENTS
User's comments are always welcome as they assist us in improving the usefulness of our products
and the understanding of our publications. They form a very important part of the input used for
product enhancement and revision.
We may use and distribute any of the information you supply in any way we believe appropriate
without incurring any obligation. You may, of course, continue to use the information you supply.
If you have suggestions for improving particular sections or if you find any errors, please indicate
the manual title and book number.
Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative.
Send Internet electronic mail to: Sales@acrosser.com
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0.5 ORGANIZATION
This information covers the following topics (see the Table of Contents for a detailed listing):
l Chapter 1, “Overview,” provides an overview of the system features and packing list.
l Chapter 2, “System Controller,” describes the major structure.
l Chapter 3, “Setting the System,” describes how to adjust the jumpers, and the connector
settings.
l Chapter 4, “BIOS Console,” providing the BIOS settings.
l Appendix
§ Specifications
§ Supported flash memory
§ Board dimensions
§ Programming the RS-485
0.6 STATIC ELECTRICITY PRECAUTIONS
Before removing the board from its anti-static bag, read this section about the static electricity
precautions.
Static electricity is a constant danger to computer systems. The charge that can build up in your
body may be more than sufficient to damage integrated circuits on any PC board. It is, therefore,
important to observe basic precautions whenever you use or handle computer components.
Although areas with humid climates are much less prone to the static built up, it is always best to
safeguard against accidents, which may result in expensive repairs. The following measures
should generally be sufficient to protect your equipment from static discharge:
1) Touch a grounded metal object to discharge the static electricity in your body (or ideally,
wear a grounded wrist strap).
2) When unpacking and handling the board or other system components, place all materials
on an antic-static surface.
3) Be careful not to touch the components on the board, especially the “gold finger”
connectors on the bottom of every board.
VI
1. OVERVIEW
This chapter provides an overview of your system features and capabilities. The following topics
are covered:
l Introduction
l Packing List
l Features
1.1 INTRODUCTION
The AR-B1320, PC/104 CPU module is a lower power consuming, high performance 386 based
computer. By using the space-saving features of the ALI M6117C CPU, this module is able to
support up to 4MB of DRAM and 1.5 MB of Flash memory on board. The unit also comes with
two RS-232C/RS-485 ports, 1 parallel port, 1 floppy interface, 1 IDE interface, and 1 DiskOnChip
socket for adding a high degree of versatility to any project. The AR-B1320 is an excellent choice
for mobile systems, or as a controller for machines that are too small to accommodate traditional
industrial PCs.
The AR-B1320 offers higher speed and it makes a very stable 386SX-based system with a true
PC/104 module for embedded applications.
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This manual has been written to assist you in installing, configuring and running the AR-B1320
CPU card. Each section is intended to guide you through its procedures clearly and concisely,
allowing you to continue to the next chapters without any difficulty.
1.2 PACKING LIST
These accessories are included with the system. Before you begin installing your AR-B1320
board, take a moment to make sure that the following items have been included inside the ARB1320 package.
l A quick setup guide
l 1 AR-B1320 PC/104 386SX CPU board
l 1 Keyboard adapter cable
l 1 Floppy adapter cable
l 2 RS-232C interface cables
l 1 Printer adapter cable
l 1 Power adapter cable
l 1 Utility diskette
Accessory Description
Keyboard adapter cable 6-pin JST to 6-pin mini-din IBM PS/2 standard
Floppy adapter cable 16-pin mini-IDC to 34-pin IDC
RS-232C interface cable 10-pin IDC to DB-9 male
Printer adapter cable 26-pin mini-IDC to DB-25 female
Power adapter cable 4-pin JST power cable
type
Table 1-1 Accessories
1-1
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1.3 FEATURES
This system provides a number of special features that enhance its reliability, ensure its
availability, and improve its expansion capabilities, as well as its hardware structure.
l 80386SX-40 MHz CPU
l PC/104 extension bus
l System of up to 4MB DRAM (2 MB already on-board)
l Supports 2 RS-232C/RS-485 serial ports
l PC/AT compatible keyboard interface
l Supports up to 1.5MB flash disk
l Programmable watchdog timer
l Flash BIOS
l Supports two IDE drives
l Supports one floppy drive
l Supports one SPP/EPP/ECP printer port
l Supports DiskOnChip and DiskOnModule
l Powered-on LED indicator
l Signal 5V power requirement
l Multi-layer PCB for noise reduction
l Dimensions: 90.2mmX95.9mm (3.55”x3.775”)
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1-2
2. SYSTEM CONTROLLER
This chapter describes the major structure. The following topics are covered:
l Microprocessor
l DMA Controller
l DRAM Configuration
l I/O Port Address Map
l Interrupt Controller
l Serial Port
l Parallel Port
l Timer
l Real-Time Clock and Non-Volatile RAM
l Watch-Dog Timer
l FLASH Disk
2.1 MICROPROCESSOR
The AR-B1320 uses the ALI M6117C CPU; it is designed to perform like Intel’ s 386SX-based
system with deep green features.
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The 386SX core is the same as M1386SX of Acer Labs. Inc. and 100% object code compatible
with the Intel 386SX microprocessor. System manufacturers can provide 386 CPU based
systems optimized for both cost and size. Instruction pipelining and high bus bandwidth ensure
short average instruction-execution times and high system throughput. Furthermore, it can keep
the state internally from charge leakage while external clock to the core is stopped without storing
the data in registers. The power consumption here is almost zero when the clock stops. The
internal structure of this core is 32-bit and it’ s address bus has a very low supply current. The real
mode as well as the protected mode are available and can run MS-DOS, MS-Windows, OS/2 and
UNIX.
2.2 DMA CONTROLLER
The equivalent of two 8237A DMA controllers are implemented in the AR-B1320 card. Each
controller is a four-channel DMA device, which will generate the memory addresses and control
signals necessary to transfer information directly between a peripheral device and memory. This
allows high-speed information transfer with less CPU intervention. The two DMA controllers are
internally cascaded to provide four DMA channels for transfers to 8-bit peripherals (DMA1) and
three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides the cascade
interconnection between the two DMA devices, thereby maintaining the IBM PC/AT compatibility.
The following is the DMA channels:
DMA Controller 1 DMA Controller 2
Channel 0: Spare Channel 4: Cascade for controller 1
Channel 1: IBM SDLC Channel 5: Spare
Channel 2: Diskette adapter Channel 6: Spare
Channel 3: Spare Channel 7: Spare
Table 2-1 DMA Channel Controller
2-1
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U15 (On-Board)
U1 (Socket)
Total Memory
Remark
EDO 1Mx16
None
2MB
Factory Preset
EDO 1Mx16
EDO 1Mx16
4MB
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2.3 DRAM CONFIGURATION
There are two 16-bit memory banks on the AR-B1320 board. The first bank is embedded with a 1MBx16-bit
(2MB, 60ns) EDO RAM and the other is 42-pin SOJ socket for extra 2MB DRAM with 1MBx16-bit (2MB,
60ns) EDO RAM. Please refer to the following table for details:
2.4 I/O CONTROLLER
A super I/O chip (SMC37C669) is embedded at the back panel of the AR-B1320 board. It combines the
functions of a floppy disk drive adapter, a hard disk drive (IDE) adapter, two serial (with 16C550 UART)
adapters and 1 parallel adapter. Setting the BIOS setup program can do the I/O port configurations.
As a UART, the chip supports the serial to parallel conversion on data characters received from a peripheral
device or a MODEM, and the parallel to serial conversion on data character received from the CPU. The
UART includes a programmable baud rate generator, complete MODEM control capability and a processor
interrupt system. For the parallel port, the SMC37C669 provides the user with a fully bi-directional
centronics-type printer interface.
2-2
2.5 I/O PORT ADDRESS MAP
Hex Range Device Factory Preset
000-01F DMA controller 1 3
020-021 Interrupt controller 1 3
022-023 ALI M6117C chipset address 3
040-04F Timer 1 3
050-05F Timer 2 3
060-06F 8042 keyboard/controller 3
070-071 Real-time clock (RTC), non-maskable interrupt
080-09F DMA page registers 3
0A0-0A1 Interrupt controller 2 3
0C0-0DF DMA controller 2 3
0F0 Clear Math Co-processor
0F1 Reset Math Co-processor
0F8-0FF Math Co-processor
170-178 Fixed disk 1
1F0-1F8 Fixed disk 0 3
201 Game port
208-20A EMS register 0
218-21A EMS register 1
278-27F Parallel printer port 3 (LPT 3)
2E8-2EF Serial port 4 (COM 4)
2F8-2FF Serial port 2 (COM 2) 3
300-31F Prototype card/Streaming Type Adapter
378-37F Parallel printer port 2 (LPT 2) 3
380-38F SDLC, bisynchronous
3A0-3AF Bisynchronous
3B0-3BF Monochrome display and printer port 1 (LPT
3C0-3CF EGA/VGA adapter
3D0-3DF Color/Graphics monitor adapter
3E8-3EF Serial port 3 (COM 3)
3F0-3F7 Diskette controller
3F8-3FF Serial port 1 (COM 1)
Table 2-2 I/O Port Address Map
(NMI)
1)
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Note: The I/O port address with the mark “
own settings according to this address map.
3
” means that they are the BIOS CMOS default values. You can configure your
2-3
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IRQ8 : Real time clock
IRQ9 : Rerouting to INT 0Ah from hardware IRQ2
IRQ10 : Spare
In
Interrupt Level
CTRL1
IRQ 0
IRQ 1
IRQ 3
IRQ 4
IRQ 7
Description
Serial port 1
Keyboard output buffer full
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2.6 INTERRUPT CONTROLLER
The ALI M6117C also provides two cascaded 8259 Programmable Interrupt Controllers (PIC). They
accept requests from the peripherals, resolve priorities on pending interrupts in service, issue
interrupt requests to the CPU, and provide vectors which are used as acceptance indexed by the
CPU to determine which interrupt service routine should be executed.
The following is the system information of interrupt levels:
NMI
IRQ 2
IRQ 5
IRQ 6
Parity check
CTRL2
System timer interrupt from timer 8254
IRQ11 : Spare
IRQ12 : Spare
IRQ13 : Reserved for Math. coprocessor
IRQ14 : Hard disk adapter
IRQ15 : Spare
Serial port 2
Spare
Floppy disk
Parallel port
Figure 2-1 Interrupt Controller
2-4
2.7 SERIAL PORTS
The ACEs (Asynchronous Communication Elements ACE1 and ACE2) are used to convert the
parallel data to a serial format on the transmit side and convert the serial data to parallel on the
receiver side. The serial format, in order of transmission and reception, is a start bit, followed by
five to eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or
two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and produce a 16x clock
for driving the internal transmitter logic.
Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the
ACE are a complete MODEM control capability, and a processor interrupt system that may be
software tailored to the computing time required to handle the communications link. The following
is a summary of each ACE accessible registers.
DLAB Port Address Register
0 base + 1 Interrupt enable (IER)
X base + 2 Interrupt identification (IIR, read only)
X base + 3 Line control (LCR)
X base + 4 MODEM control (MCR)
X base + 5 Line status (LSR)
X base + 6 MODEM status (MSR)
X base + 7 Scratched register
1 base + 0 Divisor latch (least significant byte) (LS)
1 base + 1 Divisor latch (most significant byte) (MS)
Receiver buffer (RBR, read)0 base + 0
Transmitter holding register (THR, write)
Table 2-3 ACE Accessible Register
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(1) Receiver Buffer Register (RBR)
Bit 0-7: Received data byte (Read Only)
(2) Transmitter Holding Register (THR)
Bit 0-7: Transmitter holding data byte (Write Only)
(3) Interrupt Enable Register (IER)
Bit 0: Enable Received Data Available Interrupt (ERBFI)
Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)
Bit 2: Enable Receiver Line Status Interrupt (ELSI)
Bit 3: Enable MODEM Status Interrupt (EDSSI)
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
(4) Interrupt Identification Register (IIR)
Bit 0: “0” if Interrupt Pending
Bit 1: Interrupt ID Bit 0
Bit 2: Interrupt ID Bit 1
Bit 3: Must be 0
Bit 4: Must be 0
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
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(5) Line Control Register (LCR)
Bit 0: Word Length Select Bit 0 (WLS0)
Bit 1: Word Length Select Bit 1 (WLS1)
WLS1 WLS0 Word Length
Bit 2: Number of Stop Bit (STB)
Bit 3: Parity Enable (PEN)
Bit 4: Even Parity Select (EPS)
Bit 5: Stick Parity
Bit 6: Set Break
Bit 7: Divisor Latch Access Bit (DLAB)
(6) MODEM Control Register (MCR)
Bit 0: Data Terminal Ready (DTR)
Bit 1: Request to Send (RTS)
Bit 2: Out 1 (OUT 1)
Bit 3: Out 2 (OUT 2)
Bit 4: Loop
Bit 5: Must be 0
Bit 6: Must be 0
Bit 7: Must be 0
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0 0 5 Bits
0 1 6 Bits
1 0 7 Bits
1 1 8 Bits
(7) Line Status Register (LSR)
Bit 0: Data Ready (DR)
Bit 1: Overrun Error (OR)
Bit 2: Parity Error (PE)
Bit 3: Framing Error (FE)
Bit 4: Break Interrupt (BI)
Bit 5: Transmitter Holding Register Empty (THRE)
Bit 6: Transmitter Shift Register Empty (TSRE)
Bit 7: Must be 0
(8) MODEM Status Register (MSR)
Bit 0: Delta Clear to Send (DCTS)
Bit 1: Delta Data Set Ready (DDSR)
Bit 2: Training Edge Ring Indicator (TERI)
Bit 3: Delta Receive Line Signal Detect (DSLSD)
Bit 4: Clear to Send (CTS)
Bit 5: Data Set Ready (DSR)
Bit 6: Ring Indicator (RI)
Bit 7: Received Line Signal Detect (RSLD)
2-6
(9) Divisor Latch (LS, MS)
Byte Data LS MS
Bit 0: Bit 0 Bit 8
Bit 1: Bit 1 Bit 9
Bit 2: Bit 2 Bit 10
Bit 3: Bit 3 Bit 11
Bit 4: Bit 4 Bit 12
Bit 5: Bit 5 Bit 13
Bit 6: Bit 6 Bit 14
Bit 7: Bit 7 Bit 15
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Desired
Baud Rate
Divisor Used to
Generate 16x Clock
Present Error Difference
Between Desired and Actual
50 2304 --75 1536 ---
110 1047 0.026
134.5 857 0.058
150 768 --300 384 --600 192 ---
1200 96 --1800 64 --2000 58 0.69
2400 48 --3600 32 --4800 24 --7200 16 ---
9600 12 --14400 8 --19200 6 --28800 4 --38400 3 --57600 2 ---
115200 1 ---
Table 2-4 Serial Port Divisor Latch
2.8 PARALLEL PORT
(1) Register Address
Port Address Read/Write Register
base+0 Write Output data
base+0 Read Input data
base+1 Read Printer status buffer
base+2 Write Printer control latch
(2) Printer Interface Logic
The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits
of parallel data at standard TTL level.
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(3) Data Swapper
The system microprocessor can read the contents of the printer's Data Latch through the Data Swapper
by reading the Data Swapper address.
(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status
Buffer. The bit definitions are described as follows:
Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or
Bit 6: This bit represents the current state of the printer's ACK signal. A 0 means the printer has
Bit 5: A 1 means the printer has detected the end of paper.
Bit 4: A 1 means the printer is selected.
Bit 3: A 0 means the printer has encountered an error condition.
Bit 0-2: No meaning.
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1234567 0
X X X
-ERROR
SLCT
PE
-ACK
-BUSY
when the print head is changing position or in an error state. When Bit 7 is active, the printer is
busy and can not accept data.
received the character and is ready to accept another. Normally, this signal will be active for
approximately 5 microseconds before BUSY stops.
(5) Printer Control Latch & Printer Control Swapper
The system microprocessor can read the contents of the printer control latch by reading the address of
printer control swapper. Bit definitions are as follows:
1234567 0
X X
STROBE
AUTO FD XT
INIT
SLDC IN
IRQ ENABLE
DIR(write only)
Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled
allowing data driven from external sources to be read; when logic 0, they work as a
printer port. This bit is write only.
Bit 4: A 1 in this position allows an interrupt to occur when ACK changes from low state to
high state.
Bit 3: A 1 in this bit position selects the printer.
Bit 2: A 0 starts the printer (50£gsecond pulse, minimum).
Bit 1: A 1 causes the printer to line-feed after a line is printed.
Bit 0: A 0.5£gsecond minimum high active pulse clocks data into the printer. Valid data must
be present for a minimum of 0.5£gseconds before and after the strobe pulse.
2-8
2.9 TIMER
The AR-B1320 provides three programmable timers, each with a timing frequency of 1.19 MHz.
Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)
Timer 1 This timer is used to trigger memory refresh cycles.
Timer 2 This timer provides the speaker tone.
Application programs can load different counts into this timer to
generate various sound frequencies.
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2-9
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03
Minute alarm
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2.10 REAL-TIME CLOCK AND NON-VOLATILE RAM
The AR-B1320 contains a real-time clock compartment that maintains the date and time in
addition to storing configuration information about the computer system. It contains 14 bytes of
clock and registers and 114 bytes of general purpose RAM. Because of the use of CMOS
technology, it consumes very little power and can be maintained for long periods of time using an
internal lithium battery.
Address Description
00 Seconds
01 Second alarm
02 Minutes
04 Hours
05 Hour alarm
06 Day of week
07 Date of month
08 Month
09 Year
0A Status register A
0B Status register B
0C Status register C
0D Status register D
0E Diagnostic status byte
0F Shutdown status byte
10 Diskette drive type byte, drive A and B
11 Fixed disk type byte, drive C
12 Fixed disk type byte, drive D
13 Reserved
14 Equipment byte
15 Low base memory byte
16 High base memory byte
17 Low expansion memory byte
18 High expansion memory byte
19-2D Reserved
2E-2F 2-byte CMOS checksum
30 Low actual expansion memory byte
31 High actual expansion memory byte
32 Date century byte
33 Information flags (set during power on)
34-7F Reserved for system BIOS
Table 2-5 Real-Time Clock & Non-Volatile RAM
2-10
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