Acer TravelMate C310 Laptop Schematics

A

B

C

D

E

Canary2 Block Diagram

CLK GEN.

4 4

DDR II

IDT CV125

3 4, 5

400/533MHz

400/533 MHz

11,12

DDR II

400/533MHz

400/533 MHz

11,12

3 3

Line In

Int.
MIC In

Line Out

2 2

INT.SPKR

28

Codec

ALC655

28

OP AMP

28

28

G1421B

MODEM

MDC Card

ACLINK

27

28

21

HDD

20

1 1

AC
IN

RJ45-11

A

SEARIAL
PORT

CRT

Mobile CPU

Dothan

HOST BUS

533MHz

Alviso-GM

6,7,8,9,10

DMI I/F

100MHz

ICH6-M

15,16,17,18

PATA

USB

CD ROM

20

Port Replicator 4 (124 PIN)
PRINTER

PS2

B

3 PORT

MINI USB
Blue-tooth

MIC

SDVO

PEG

PCI BUS

LPC BUS

21

DIGITIZER

21

LINE IN

G792

CH7307C

NVIDIA
NV44M

45,46,47,48,49,
50,51,52

LINE
OUT

19

53

PCI7411
CARDBUS

1394

SMATR CARD

SD/MS/MMC

(TI)

24,25

LAN

10/100/1G
RTL8110SBL

22, 23

Super
IO

31

87392

FIR

31

TV
OUT

C

TMDS

DVI
CONN

RGB

CRT
CONN

LCD

LVDS

TVOUT

XGA

TVOUT

PWR SW

TSP2220A

25 26

1394

26

CONN

SD/MMC/MS
Card Slot

Mini-PCI

802.11A/B/G

TXFM

KBC

H8-HD64F2111BVC

Pad

32 32

DVI PCIeX2 SMBUS

29

RJ45

23

BIOS ROM

4M BITS

PM49F004T-33VC

33 3330

INT_KBTouch

34

14

13

14

PCMCIA

ONE SLOT

3 in 1

23

LPC

DEBUG
CONN.

04222-SA

26

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet

D

SYSTEM DC/DC

TPS5130

INPUTS

DCBATOUT

2D5V_S0(LDO)

SYSTEM DC/DC

ISL6227

INPUTS OUTPUTS

DCBATOUT

APL5331KAC-TR

MAXIM CHARGER

MAX8725+Max 1773

OUTPUTSINPUTS
CHG_PWR

DCBATOUT

16.8V 3.2A

UP+5V

5V 100mA

CPU DC/DC

ISL6218CV-T

INPUTS

DCBATOUT

OUTPUTS
VCC_CORE

0.844~1.3V
27A

SYSTEM DC/DC

FAN5234

INPUTS

DCBATOUT

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2

CANARY2

CANARY2

OUTPUTS

NVVDD(1D2V_S0)

155Thursday, January 13, 2005

155Thursday, January 13, 2005

155Thursday, January 13, 2005

E

40,41

OUTPUTS

5V_S5
3V_S5
1D5V_S0

1D05V_S0
1D8V_S3

0D9V_S01D5V_S0

39

45

of

of

of

42

42

43

SA

SA

SA

A

B

C

D

E

Alviso Strapping Signals
and Configuration

Pin Name

CFG[2:0]

4 4

CFG[3:4]
CFG5

CFG6
CFG7

CFG[8:11]
CFG[12:13]

CFG[14:15]
CFG16

CFG17
CFG18

3 3

CFG19

CFG20
SDVOCRTL

_DATA

All strap signals are sampled with respect to the leading

NOTE:

edge of the Alviso GMCH PWORK In signal.

Strap Description

FSB Frequency Select

Reversed
DMI x2 Select

DDR I / DDR II
CPU Strap

Reversed
XOR/ALL Z test

straps

Reversed
FSB Dynamic ODT 0 = Dynamic ODT Disabled

Reversed
CPU core VCC

Select
CPU VTT Select

Reversed
SDVO Present

Configuration

000 = Reserved
001 = FSB533
010 = FSB800
011-111 = Reversed

0 = DMI x2

1 = DMI x4

0 = DDR II
1 = DDR I

0 = Prescott

1 = Dothan

00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled

11 = Normal Operation

(Default)

1 = Dynamic ODT Enabled

(Default)

0 = 1.05V

1 = 1.5V

0 = 1.05V

1 = 1.2V

0 = No SDVO device present

(Default)
1= SDVO device present

(Default)

(Default)

(Default)

(Default)

page 7

CY28411ZC Spread Spectrum
Select

SS3 SS2 SS1 Spread Mode Spread Amount%

000
00
00
0
1
11
11
111

1
1
11
00
0

0

Down
Down
Down
Down
Center
Center
Center
Center

page 3

0.8

1.25

1.75

2.5
+-0.3
+-0.5
+-0.8
+-1.25

PCI Routing

7411
MiniPCI
LAN

25
21
23

IRQ

B.F.G

E
E

REQ/GNTIDSEL

0
1
2

ICH6-M Integrated Pull-up
and Pull-down Resistors

ACZ_BIT_CLK,
EE_DOUT,
GNT[6]#/GPO[16],
LAD[3:0]#/FB[3:0]#, LDRQ[0],
PME#, PWRBTN#,

LAN_RXD[2:0]

ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC,
ACZ_SDOUT,ACZ_BITCLK,
SPKR,

USB[7:0][P,N]

DD[7],

LAN_CLK

DPRSLP#, EE_DIN,

GNT[5]#/GPO[17],

TP[3]

EE_CS,

SDDREQ

LDRQ[1]/GPI[41],

DPRSLPVR,

ICH6 internal 20K pull-ups

ICH6 internal 10K pull-ups

ICH6 internal 20K pull-downs

ICH6 internal 15K pull-downs

ICH6 internal 11.5K pull-downs

ICH6 internal 100K pull-downs

ICH6-M EDS 14308 0.8V1

ICH6-M IDE Integrated Series
Termination Resistors

DD[15:0],
DDACK#,
DCS3#,

IORDY,

IDEIRQ

DIOR#, DREQ,DIOW#,

DA[2:0],

DCS1#,

approximately 33 ohm

2 2

BOM2(NV44+G)

BOM2(NV44+G)

1 1

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

ITP

ITP

ITP

CANARY2 SA

CANARY2 SA

CANARY2 SA

255Thursday, January 13, 2005

255Thursday, January 13, 2005

255Thursday, January 13, 2005

of

of

of

3D3V_S0 3D3V_S03D3V_S0

12

C721

C721

SCD1U16V

SCD1U16V

R698

R698

1 2

0R3-U

0R3-U

3D3V_APWR_S0 3D3V_CLKGEN_S03D3V_48MPWR_S0

12

C711

C711

SC4D7U10V5ZY

SC4D7U10V5ZY

12

C709

C709

SCD1U16V

SCD1U16V

12

R192

R192

1 2

0R3-U

0R3-U

C294

C294

SCD1U16V

SCD1U16V

12

C696

C696

SC4D7U10V5ZY

SC4D7U10V5ZY

12

C284

C284

SCD1U16V

SCD1U16V

12

C674

C674

SCD1U16V

SCD1U16V

R633

R633

1 2

0R3-U

0R3-U

12

C673

C673
SC10U6D3V5MX

SC10U6D3V5MX

12

C280

C280

SCD1U16V

SCD1U16V

12

C687

C687

SCD1U16V

SCD1U16V

12

C297

C297

SCD1U16V

SCD1U16V

12

C710

C710

SCD1U16V

SCD1U16V

12

C303

C303

SCD1U16V

SCD1U16V

12

C291

C291

SCD1U16V

SCD1U16V

12

C697

C697

SCD1U16V

SCD1U16V

6218_PGOOD38,39

IN
(3D3V_S0)

H
X

3D3V_CLKGEN_S0

R168

R168

R171

R171
1KR2

1KR2

DUMMY-R2

DUMMY-R2

EN
(6218_PGOOD)

12

12

R193

R193

DUMMY-R2

DUMMY-R2

12

12

R196

R196

1KR2

1KR2

12/27

2

L

R165

R165

R160

R160

2222K

2222K

12

DUMMY-R2

DUMMY-R2

12

DUMMY-R2

DUMMY-R2

3D3V_S0

12

R634

R634
10KR2

10KR2

VTT_PWRGD#

31

Q57

Q57
DTC124EUA-U1

DTC124EUA-U1

K

K

OUT
(VTT_PWRGD#)

H

Hi - ZH

FS_A
FS_B
CFG2

FS_B

FS_C

0
0

0
1
1 100M
1
1

0
0
1
1
0
0
1
1

3D3V_S0

DY

DY

CFG2 7

CPU

FS_A

0

266M
133M

01200M

166M

1
00333M
1
0

400M

1 Reserved

PCLK_SIO31
PCLK_MINI29

PCLK_LAN22
PCLK_PCM24
PCLK_KBC30

PCLK_FWH33
CLK_ICHPCI16

12

12

R645

R645
10KR2

10KR2

R646

R646
Do Not Stuff

Do Not Stuff

PCLK_PCM & PCLK_SIO
need equal length

R644 22R2R644 22R2
R641 33R2R641 33R2

R636 33R2R636 33R2
R639 22R2R639 22R2
R650 33R2R650 33R2

R653 33R2R653 33R2
R651 33R2R651 33R2

C685

C685

1 2

X5

ITP_EN
SS_SEL

DY

DY

X5

X-14D31818M-1

X-14D31818M-1

1 2

CLK_PCIE_PEG
CLK_PCIE_PEG#
CLK_PCIE_ICH
CLK_PCIE_ICH#
DREFSSCLK#
DREFSSCLK
DREFCLK
DREFCLK#

SC33P

SC33P

C684

C684

1 2

SC33P

SC33P

12

R657

R657
10KR2

10KR2

12

R658

R658
Do Not Stuff

Do Not Stuff

1 2
1 2

1 2
1 2
1 2

1 2
1 2

PM_STPPCI#16

SMBC_ICH11,18

SMBD_ICH11,18

DREFCLK7
DREFCLK#7

H/L: 100/96MHz

SS_SEL
ITP_EN

H/L : CPU_ITP/SRC7

4

RN11 SRN33-2-U2RN11 SRN33-2-U2

R649 33R2R649 33R2

CLK_ICH1416
CLK14_SIO31

CLK_ICH14 & CLK14_SIO
need equal length

R694 49D9R2FR694 49D9R2F

1 2

R697 49D9R2FR697 49D9R2F

1 2

R695 49D9R2FR695 49D9R2F

1 2

R696 49D9R2FR696 49D9R2F

1 2

R666 49D9R2FR666 49D9R2F

1 2

R663 49D9R2FR663 49D9R2F

1 2

R656 49D9R2FR656 49D9R2F

1 2

R661 49D9R2FR661 49D9R2F

1 2

1 2

R652 33R2R652 33R2

1 2

R197 475R2FR197 475R2F

1 2

VTT_PWRGD#

DREFSSCLK1
DREFSSCLK#1

CLK_PCIE_DOCK_1
CLK_PCIE_DOCK_1#

CLK_PCIE_DOCK_2

CFG2
FS_B
FS_A

3D3V_CLKGEN_S0

3D3V_APWR_S0
3D3V_48MPWR_S0

CLK_PCIE_DOCK_2#

R164 22R2R164 22R2
R182 22R2R182 22R2

U70

U70

56

PCI0

3

PCI1

4

PCI2

5

PCI3

9

PCIF1/SEL100/96#

8

PCIF0/ITP_EN

55

PCI_STOP#

46

SCL

47

SDA

23
1

14

DOT96

15

DOT96#

50

XTAL_IN

49

XTAL_OUT

52

REF

39

IREF

10

VTT_PWRGD#/PD

2

VSS_PCI

6

VSS_PCI

51

VSS_REF

45

VSS_CPU

38

VSSA

13

VSS48

29

VSS_SRC

IDTCV125PA

IDTCV125PA

CPU2_ITP/SRC7

CPU2_ITP#/SRC7#

CPU_STOP#

FSC/TEST_SEL

FSB/TEST_MODE

USB48/FSA

LVDS

LVDS#

SRC1

SRC1#

SRC2

SRC2#

SRC3

SRC3#

SRC4

SRC4#

SRC5

SRC5#

SRC6

SRC6#

CPU0

CPU0#

CPU1

CPU1#

VDD_SRC
VDD_SRC

VDD_PCI
VDD_PCI

VDD_REF
VDD_CPU

VDDA

VDD48

VDD_SRC

17
18

19
20
22
23

CLK_PCIE_PEG1

24

CLK_PCIE_PEG#1

25
26
27

CLK_PCIE_ICH1

31

CLK_PCIE_ICH#1

30

CLK_MCH_3GPLL1

33

CLK_MCH_3GPLL#1

32

CLK_XDP_CPU1

36

CLK_XDP_CPU#1

35

CLK_CPU_BCLK1

44

CLK_CPU_BCLK#1

43

CLK_MCH_BCLK1

41

CLK_MCH_BCLK#1

40
54

53
16
12

34
21

7
1

48
42
37
11
28

RN13 SRN33-2-U2RN13 SRN33-2-U2

2 3
1

4

RN15 SRN33-2-U2RN15 SRN33-2-U2

2 3
1

4

RN17 SRN33-2-U2RN17 SRN33-2-U2

2 3
1

4

RN19 SRN33-2-U2RN19 SRN33-2-U2

2 3
1

4

RN20 SRN33-2-U2RN20 SRN33-2-U2

1

4

2 3

RN18 SRN33-2-U2RN18 SRN33-2-U2

1

4

2 3

RN16 SRN33-2-U2RN16 SRN33-2-U2

1

4

2 3

RN12 SRN33-2-U2RN12 SRN33-2-U2

1

4

2 3

RN14 SRN33-2-U2RN14 SRN33-2-U2

1

4

2 3

12
12

CLK48_ICH 16
CLK48_CARDBUS 24

DREFSSCLK 7
DREFSSCLK# 7

CLK_PCIE_DOCK1 34
CLK_PCIE_DOCK1# 34

CLK_PCIE_DOCK2 34
CLK_PCIE_DOCK2# 34

CLK_PCIE_PEG 46
CLK_PCIE_PEG# 46

CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

CLK_XDP_CPU 4
CLK_XDP_CPU# 4

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
PM_STPCPU# 16,39

EMI capacitor

CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#

CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_XDP_CPU
CLK_XDP_CPU#
CLK_PCIE_DOCK1
CLK_PCIE_DOCK1#
CLK_PCIE_DOCK2
CLK_PCIE_DOCK2#

CLK_ICH14
CLK14_SIO

R655 49D9R2FR655 49D9R2F

1 2

R659 49D9R2FR659 49D9R2F

1 2

R662 49D9R2FR662 49D9R2F

1 2

R664 49D9R2FR664 49D9R2F C692 Do Not Stuff

1 2

R671 49D9R2FR671 49D9R2F

1 2

R693 49D9R2FR693 49D9R2F

1 2

R667 49D9R2FR667 49D9R2F

1 2

R669 49D9R2FR669 49D9R2F

1 2

R668 49D9R2FR668 49D9R2F

1 2

R670 49D9R2FR670 49D9R2F

1 2

R672 49D9R2FR672 49D9R2F

1 2

R692 49D9R2FR692 49D9R2F

1 2

PCLK_FWH
PCLK_PCM
PCLK_MINI
PCLK_KBC
CLK_ICHPCI
CLK48_ICH

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

Date: Sheet of

C691 Do Not Stuff

C691 Do Not Stuff
C694 Do Not Stuff

C694 Do Not Stuff
C699 Do Not Stuff

C699 Do Not Stuff
C679 Do Not Stuff

C679 Do Not Stuff
C688 Do Not Stuff

C688 Do Not Stuff
C692 Do Not Stuff
C690 Do Not Stuff

C690 Do Not Stuff
C689 Do Not Stuff

C689 Do Not Stuff

Clock Generator - IDT125

Clock Generator - IDT125

Clock Generator - IDT125

DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2

CANARY2

CANARY2

SA

SA

of

355Thursday, January 13, 2005

355Thursday, January 13, 2005

355Thursday, January 13, 2005

SA

A

U66A

U66A
BGA479-SKT-2-U

BGA479-SKT-2-U

H_A#3

4 4

3 3

H_STPCLK#

2 2

1 1

H_A#[31..3]6

H_ADSTB#06
H_REQ#[4..0]6

H_ADSTB#16

H_A20M#15
H_FERR#15
H_IGNNE#15

1 2

H_INTR15
H_NMI15
H_SMI#15

A

H_STPCLK_R

R6290R2-0 R6290R2-0

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

AA3
AA2

AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5

P4

A3#

U4

A4#

V3
R3
V2

W1

T4

W2

Y4
Y1
U1

Y3
U3
R2

P3
T2
P1
T1

C2
D3
A3

C6
D1
D4
B4

ADDR GROUP 0

A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB#0

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#

ADDR GROUP 1

A31#
ADSTB#1

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

HCLK THERM XTP/ITP SIGNALS CONTROL

THERMTRIP#

B

N2

ADS#

L1

BNR#

J3

BPRI#

L4

DEFER#

H2

DRDY#

M2

DBSY#

N4

BR0#

A4

IERR#

B5

INIT#

J2

LOCK#

B11

RESET#

RS0#
RS1#
RS2#

TRDY#

HIT#

HITM#

BPM#0
BPM#1
BPM#2
BPM#3
PRDY#

PREQ#

TCK

TDI
TDO
TMS

TRST#

DBR#

PROCHOT#

THERMDA
THERMDC

ITP_CLK1
ITP_CLK0

BCLK1
BCLK0

CPU_PROCHOT#
XDP_TDI
XDP_TMS
XDP_TDO
H_CPURST#

XDP_DBRESET#

XDP_TCK
XDP_TRST#

H_RS#0

H1

H_RS#1

K1

H_RS#2

L2
M3

K3
K4

XDP_BPM#0

C8

XDP_BPM#1

B8

XDP_BPM#2

A9

XDP_BPM#3

C9

XDP_BPM#4

A10

XDP_BPM#5

B10

XDP_TCK

A13

XDP_TDI

C12

XDP_TDO

A12

XDP_TMS

C11

XDP_TRST#

B13

XDP_DBRESET#

A7

CPU_PROCHOT#

B17
B18
A18

C17
A15

A16
B14
B15

R581 56R2FR581 56R2F

1 2

R605 150R2FR605 150R2F

1 2

R607 39D2R3FR607 39D2R3F

1 2

R604 54D9R2FR604 54D9R2F

1 2

R610 54D9R2FR610 54D9R2F

1 2

R614 150R2FR614 150R2F

1 2

R603 27D4R2FR603 27D4R2F

1 2

R589 680R3FR589 680R3F

1 2

All place within 2" to CPU

B

TP14

TP14
TPAD28

TPAD28

R572

R572

1 2

H_ADS# 6
H_BNR# 6

H_BPRI# 6

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 15
H_LOCK# 6

H_CPURST# 6

H_TRDY# 6
H_HIT# 6

H_HITM# 6

H_THERMDA 19

H_THERMDC 19

PM_THRMTRIP-A# 7

CLK_XDP_CPU# 3

CLK_XDP_CPU 3

CLK_CPU_BCLK# 3

CLK_CPU_BCLK 3

0R2-0

0R2-0

1D05V_S0

3D3V_S0

H_RS#[2..0] 6

TP9TPAD28 TP9TPAD28
TP10TPAD28 TP10TPAD28
TP8TPAD28 TP8TPAD28
TP7TPAD28 TP7TPAD28
TP6TPAD28 TP6TPAD28
TP5TPAD28 TP5TPAD28
TP62TPAD28 TP62TPAD28
TP64TPAD28 TP64TPAD28
TP63TPAD28 TP63TPAD28
TP65TPAD28 TP65TPAD28
TP61TPAD28 TP61TPAD28
TP66TPAD28 TP66TPAD28

TP58TPAD28 TP58TPAD28

1D05V_S0

12

R141

R141
56R2J

56R2J

Place testpoint on
H_IERR# with a GND

0.1" away

PM_THRMTRIP#
should connect to
ICH6 and Alviso
without T-ing

CPU_SEL07

C

PM_THRMTRIP-I# 15,38

( No stub)

To V-CORE SWITCH

TP4 TPAD28TP4 TPAD28

R487

R487
1KR2F

1KR2F

C

1D05V_S0

R586 0R3-UR586 0R3-U

1 2

12

TP13 TPAD28TP13 TPAD28
TP11 TPAD28TP11 TPAD28
TP15 TPAD28TP15 TPAD28
TP2 TPAD28TP2 TPAD28

12

R486

R486
2KR2F

2KR2F

BSEL[1:0] Freq.(MHz)
(A Stepping)
L L 100
L H 133

BSEL[1:0] Freq.(MHz)
(B Stepping)
L H 100
L L 133

1 2

GTLREF0

Layout Note:

0.5" max length.

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

R146

R146

DUMMY-R2

DUMMY-R2

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
C23
C22
D25

H23
G25

M26

H24
G24

M23

N24

M25

H26
N25
K25
K24

C16
C14

AF7

AC1

E26

AD26

L23

F25
J23
J25

L26

L24
J26

E1

C3

D

U66B

U66B
BGA479-SKT-2-U

BGA479-SKT-2-U

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#

DATA GRP 0DATA GRP 1

D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

PSI#
BSEL0

BSEL1

MISC

RSVD2
RSVD3
RSVD4

PWRGOOD

RSVD5
GTLREF0

D

Y26

D32#

AA24

D33#

T25

D34#

U23

D35#

V23

D36#

R24

D37#

R26

D38#

R23

D39#

AA23

D40#

U26

D41#

V24

D42#

U25

D43#

V26

D44#

DATA GRP 2

Y23

D45#

AA26

D46#

Y25

D47#

W25

DSTBN2#

W24

DSTBP2#

T24

DINV2#

AB25

D48#

AC23

D49#

AB24

D50#

AC20

D51#

AC22

D52#

AC25

D53#

AD23

D54#

AE22

D55#

AF23

D56#

AD24

D57#

AF20

D58#

AE21

D59#

AD21

D60#

DATA GRP 3

AF25

D61#

AF22

D62#

AF26

D63#

AE24

DSTBN3#

AE25

DSTBP3#

AD20

DINV3#
COMP0

COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

TEST1
TEST2

SLP#

P25
P26
AB2
AB1

G1
B7
C19
E4
A6

C5
F23

COMP0
COMP1
COMP2
COMP3

TEST1
TEST2

R33

R33
Do Not Stuff

Do Not Stuff

DY

DY

E

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

R489 27D4R2FR489 27D4R2F
R488 54D9R2FR488 54D9R2F
R145 27D4R2FR145 27D4R2F
R144 54D9R2FR144 54D9R2F

12

12

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

Date: Sheet of

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

1 2
1 2
1 2
1 2

H_DPRSLP# 15
H_DPSLP# 15
H_DPWR# 6

H_CPUSLP# 6,15

R628

R628
Do Not Stuff

Do Not Stuff

NO STUFFNO STUFF

DY

DY

H_D#[63..0] 6

H_DINV#[3..0] 6

H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6

1D05V_S0

12

R147

R147
200R2F

200R2F

H_PWRGD 15,38

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

CPU (1 of 2)

CPU (1 of 2)

CANARY2 SA

CANARY2 SA

CANARY2 SA

455Thursday, January 13, 2005

455Thursday, January 13, 2005

455Thursday, January 13, 2005

E

of

A

VCC_CORE_S0

U66C

U66C
BGA479-SKT-2-U

BGA479-SKT-2-U

AA11

VCC0

AA13

VCC1

AA15

VCC2

AA17

VCC3

AA19

VCC4

AA21

VCC5

AA5

VCC6

4 4

3 3

2 2

1 1

AA7

AA9
AB10
AB12
AB14
AB16
AB18
AB20
AB22

AB6

AB8
AC11
AC13
AC15
AC17
AC19

AC9
AD10
AD12
AD14
AD16
AD18

AD8
AE11
AE13
AE15
AE17
AE19

AE9
AF10
AF12
AF14
AF16
AF18

AF8

D18

D20

D22

D6

D8
E17
E19
E21

E5

E7

E9

F18
F20
F22

F6

F8
G21

Layout Note:

VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58

VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71

VCCA0
VCCA1
VCCA2
VCCA3

VCCP0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8

VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19
VCCP20
VCCP21
VCCP22
VCCP23
VCCP24

VCCQ0

VCCQ1

VID0
VID1
VID2
VID3
VID4
VID5

VCCSENSE
VSSSENSE

VCCSENSE and VSSSENSE lines
should be of equal length.

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

A

G5
H22
H6
J21
J5
K22
U5
V22
V6
W21
W5
Y22
Y6

F26
B1
N1
AC26

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L21
L5
M22
M6
N21
N5
P22
P6
R21
R5
T22
T6
U21

P23
W4

E2
F2
F3
G3
G4
H4

AE7
AF6

VCC_CORE_S0

CPU_D10

R116 0R2-0R116 0R2-0

TP_VCCSENSE
TP_VSSSENSE

1D5V_VCCA_S0

1 2

H_VID0 39
H_VID1 39
H_VID2 39
H_VID3 39
H_VID4 39
H_VID5 39

12

R136

R136

R139

R139

Do Not Stuff

Do Not Stuff

DY

DY

Do Not Stuff

Do Not Stuff

DY

DY

C31

C31

12

12

12

C30

C30

1D05V_S0

SCD01U16V2KX

SCD01U16V2KX

1D05V_S0

12

VCC_CORE_S0

12

VCC_CORE_S0

12

VCC_CORE_S0

12

DY

DY

B

SC10U10V5ZY

SC10U10V5ZY

C106

C106

SCD1U10V2MX-1

SCD1U10V2MX-1

C616

C616

SC10U10V5ZY

SC10U10V5ZY

C92

C92

SCD1U10V2MX-1

SCD1U10V2MX-1

C152

C152

Do Not Stuff

Do Not Stuff

DY

DY

B

C

12

12

SC10U10V5ZY

SC10U10V5ZY

12

SC10U10V5ZY

SC10U10V5ZY

Place these
and dummy
12K7R3F for
1D8V_VCCA_S0

R471

R471

DY

DY

Do Not Stuff

Do Not Stuff

12

C103

C103

SC10U10V5ZY

SC10U10V5ZY

12

C144

C144

SC10U10V5ZY

SC10U10V5ZY

PM_SLP_S3#_ICH 16,34,42

12

R491

R491

1
2
3

R492

R492

1 2

0R3-U

0R3-U

12

C114

C114

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C617

C617

SC10U10V5ZY

SC10U10V5ZY

12

C76

C76

SCD1U10V2MX-1

SCD1U10V2MX-1

I max = 120 mA

U55

U55

SHDN#
GND
IN

Do Not Stuff

Do Not Stuff

DY

DY

12

C169

C169

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C599

C599

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

12

C174

C174

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

DUMMY-R2

DUMMY-R2

3D3V_S0

12

BC9

BC9
SC1U10V3ZY

SC1U10V3ZY

1D5V_S0 1D5V_VCCA_S0 1D8V_S0 1D5V_VCCA_S0

12

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

SC10U10V5ZY

SC10U10V5ZY

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

Do Not Stuff

Do Not Stuff

DY

DY

C75

C75

C593

C593

C165

C165

C108

C108

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

SC10U10V5ZY

SC10U10V5ZY

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

Do Not Stuff

Do Not Stuff

DY

DY

C74

C74

C584

C584

C145

C145

C118

C118

SCD1U10V2MX-1

SCD1U10V2MX-1

12

SC10U10V5ZY

SC10U10V5ZY

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

Do Not Stuff

Do Not Stuff

DY

DY

C73

C73

C570

C570

C558

C558

C113

C113

12

SCD1U10V2MX-1

SCD1U10V2MX-1

12

SC10U10V5ZY

SC10U10V5ZY

12

SCD1U10V2MX-1

SCD1U10V2MX-1

Do Not Stuff

Do Not Stuff

C121

C121

C571

C571

C79

C79

12

C98

C98

12

C598

C598

12

C77

C77

12

C67

C67

1D5V_VCCA_S0

12

12

DY

DY

5

SET

4

OUT

12

C168

C168

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C594

C594

SC10U10V5ZY

SC10U10V5ZY

12

C153

C153

SCD1U10V2MX-1

SCD1U10V2MX-1

C

12

BC7

BC7
SC1U10V3ZY

SC1U10V3ZY

12

12

Do Not Stuff

SCD1U10V2MX-1

SCD1U10V2MX-1

DY

DY

12

SC10U10V5ZY

SC10U10V5ZY

12

SCD1U10V2MX-1

SCD1U10V2MX-1

C171

C171

C173

C173

Do Not Stuff

TC18

TC18

12

SC10U10V5ZY

SC10U10V5ZY

12

SC10U10V5ZY

SC10U10V5ZY

C167

C167

12

C585

C585

12

C557

C557

BC8

BC8

DY

DY

Do Not Stuff

Do Not Stuff

DY

DY

12

C85

C85

SC10U10V5ZY

SC10U10V5ZY

12

C157

C157

SC10U10V5ZY

SC10U10V5ZY

R472

R472
Do Not Stuff

Do Not Stuff

12

R454

R454
Do Not Stuff

Do Not Stuff

R470

R470

1 2

Do Not Stuff

Do Not Stuff

DY

DY

12

C84

C84

SC10U10V5ZY

SC10U10V5ZY

12

C70

C70

SC10U10V5ZY

SC10U10V5ZY

C96

C96

C112

C112

C111

C111

C100

C100

12

SC10U10V5ZY

SC10U10V5ZY

12

SC10U10V5ZY

SC10U10V5ZY

C117

C117

C91

C91

D

12

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

D

C147

C147

SC10U10V5ZY

SC10U10V5ZY

E

U66D BGA479-SKT-2-UU66D BGA479-SKT-2-U

A2

VSS0

A5

VSS1

A8

VSS2

A11

VSS3

A14

VSS4

A17

VSS5

A20

VSS6

A23

VSS7

A26

VSS8

AA1

VSS9

AA4

VSS10

AA6

VSS11

AA8

VSS12

AA10

VSS13

AA12

VSS14

AA14

VSS15

AA16

VSS16

AA18

VSS17

AA20

VSS18

AA22

VSS19

AA25

VSS20

AB3

VSS21

AB5

VSS22

AB7

VSS23

AB9

VSS24

AB11

VSS25

AB13

VSS26

AB15

VSS27

AB17

VSS28

AB19

VSS29

AB21

VSS30

AB23

VSS31

AB26

VSS32

AC2

VSS33

AC5

VSS34

AC8

VSS35

AC10

VSS36

AC12

VSS37

AC14

VSS38

AC16

VSS39

AC18

VSS40

AC21

VSS41

AC24

VSS42

AD1

VSS43

AD4

VSS44

AD7

VSS45

AD9

VSS46

AD11

VSS47

AD13

VSS48

AD15

VSS49

AD17

VSS50

AD19

VSS51

AD22

VSS52

AD25

VSS53

AE3

VSS54

AE6

VSS55

AE8

VSS56

AE10

VSS57

AE12

VSS58

AE14

VSS59

AE16

VSS60

AE18

VSS61

AE20

VSS62

AE23

VSS63

AE26

VSS64

AF2

VSS65

AF5

VSS66

AF9

VSS67

AF11

VSS68

AF13

VSS69

AF15

VSS70

AF17

VSS71

AF19

VSS72

AF21

VSS73

AF24

VSS74

B3

VSS75

B6

VSS76

B9

VSS77

B12

VSS78

B16

VSS79

B19

VSS80

B22

VSS81

B25

VSS82

C1

VSS83

C4

VSS84

C7

VSS85

C10

VSS86

C13

VSS87

C15

VSS88

C18

VSS89

C21

VSS90

C24

VSS91

D2

VSS92

D5

VSS93

D7

VSS94

D9

VSS95

D11

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet

VSS96

CPU (2 of 2)

CPU (2 of 2)

CPU (2 of 2)

CANARY2 SA

CANARY2 SA

CANARY2 SA

D13

VSS97

D15

VSS98

D17

VSS99

D19

VSS100

D21

VSS101

D23

VSS102

D26

VSS103

E3

VSS104

E6

VSS105

E8

VSS106

E10

VSS107

E12

VSS108

E14

VSS109

E16

VSS110

E18

VSS111

E20

VSS112

E22

VSS113

E25

VSS114

F1

VSS115

F4

VSS116

F5

VSS117

F7

VSS118

F9

VSS119

F11

VSS120

F13

VSS121

F15

VSS122

F17

VSS123

F19

VSS124

F21

VSS125

F24

VSS126

G2

VSS127

G6

VSS128

G22

VSS129

G23

VSS130

G26

VSS131

H3

VSS132

H5

VSS133

H21

VSS134

H25

VSS135

J1

VSS136

J4

VSS137

J6

VSS138

J22

VSS139

J24

VSS140

K2

VSS141

K5

VSS142

K21

VSS143

K23

VSS144

K26

VSS145

L3

VSS146

L6

VSS147

L22

VSS148

L25

VSS149

M1

VSS150

M4

VSS151

M5

VSS152

M21

VSS153

M24

VSS154

N3

VSS155

N6

VSS156

N22

VSS157

N23

VSS158

N26

VSS159

P2

VSS160

P5

VSS161

P21

VSS162

P24

VSS163

R1

VSS164

R4

VSS165

R6

VSS166

R22

VSS167

R25

VSS168

T3

VSS169

T5

VSS170

T21

VSS171

T23

VSS172

T26

VSS173

U2

VSS174

U6

VSS175

U22

VSS176

U24

VSS177

V1

VSS178

V4

VSS179

V5

VSS180

V21

VSS181

V25

VSS182

W3

VSS183

W6

VSS184

W22

VSS185

W23

VSS186

W26

VSS187

Y2

VSS188

Y5

VSS189

Y21

VSS190

Y24

VSS191

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

555Thursday, January 13, 2005

555Thursday, January 13, 2005

555Thursday, January 13, 2005

E

of

A

H_XRCOMP

12

R103

R103
24D9R2F

24D9R2F

4 4

1D05V_S0

R99

R99
54D9R2F

54D9R2F

1 2

H_XSCOMP

1D05V_S0

12

R111

R111
221R3F

221R3F

H_XSWING

3 3

2 2

12

12

1D05V_S0

1 2

1D05V_S0

12

12

R107

R107
100R2F

100R2F

H_YRCOMP

R129

R129
24D9R2F

24D9R2F

R113

R113
54D9R2F

54D9R2F

H_YSCOMP

R114

R114
221R3F

221R3F

H_YSWING

R126

R126
100R2F

100R2F

1 2

1 2

C94

C94
SCD1U16V

SCD1U16V

C119

C119
SCD1U16V

SCD1U16V

B

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING

C

U16A

U16A

E4
E1
F4
H7
E2
F1
E3
D3
K7
F2

J7

J8
H6
F3
K8
H5
H1
H2
K5
K6

J4

G3

H3

J1

L5
K4

J5
P7

L7

J3
P5

L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6

W6

U3
V5

W8
W7

U2
U1
Y5
Y2
V4
Y7

W1
W3

Y3
Y6

W2

C1
C2
D1
T1

L1
P1

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING

71.0GMCH.0XU

71.0GMCH.0XU

HCPURST#

HOST

HOST

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3

HCPUSLP#

HA3#
HA4#
HA5#
HA6#
HA7#
HA8#

HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#

HADS#

HADSTB#0
HADSTB#1

HVREF
HBNR#

HBPRI#

HBREQ0#

HCLKINN
HCLKINP

HDBSY#

HDEFER#

HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#

HDRDY#

HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3

HEDRDY#

HHIT#

HHITM#

HLOCK#

HPCREQ#

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS0#
HRS1#
HRS2#

HTRDY#

G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13

F8
B9
E13
J11
A5
D5
E7
H10

AB1
AB2

C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_VREF

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
TP_H_EDRDY#

TP_H_PCREQ#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_CPUSLP#_1

D

H_A#[31..3] 4H_D#[63..0]4

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4

H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_CPURST# 4

CLK_MCH_BCLK# 3
CLK_MCH_BCLK 3

H_DBSY# 4

H_DEFER# 4

H_DPWR# 4

H_DRDY# 4

TP55TPAD28 TP55TPAD28

H_HIT# 4
H_HITM# 4

H_LOCK# 4

TP3TPAD28 TP3TPAD28

H_TRDY# 4

C586

C586

1 2

SCD1U16V

SCD1U16V

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

R612 0R2-0R612 0R2-0

1 2

DUMMY FOR DOTHAN A STEPPING

1D05V_S0

12

12

R591

R591
100R2F

100R2F

R590

R590
200R2F

200R2F

E

H_CPUSLP# 4,15

1 1

A

Place them near to the chip

B

C

D

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

Date: Sheet of

GMCH (1 of 5)

GMCH (1 of 5)

GMCH (1 of 5)

CANARY2 SA

CANARY2 SA

CANARY2 SA

655Thursday, January 13, 2005

655Thursday, January 13, 2005

655Thursday, January 13, 2005

E

of

A

B

C

D

E

When GM replace to PM

12

0R2-0

0R2-0

R635Do Not StuffUMA R635Do Not StuffUMA
R632Do Not Stuff

R632Do Not Stuff

R637Do Not StuffUMA R637Do Not StuffUMA
R631Do Not Stuff

R631Do Not Stuff

R56

R56

DUMMY

SDVOC_CTRLCLK
SDVOC_CTRLDATA

SDVOC_CTRLDATA
SDVOC_CTRLCLK

1 2

12

R600

R600
0R2-0

0R2-0

0ohms

R562

R562

Do Not StuffUMA

Do Not StuffUMA

LBKLT_CRTL
LCTLA_CLK

LCTLB_DATA
LDDC_NB_CLK
LDDC_NB_DATA

LIBG

R526 Do Not Stuff

R526 Do Not Stuff

1 2

R544 Do Not Stuff

R544 Do Not Stuff

1 2

R543 2K2R2R543 2K2R2

1 2

R542 2K2R2R542 2K2R2

1 2

R553 100KR2R553 100KR2

1 2

R550 100KR2R550 100KR2

1 2

R564 1K5R2FR564 1K5R2F

1 2

SDVOB_INTP1
SDVOB_STALLP1

SDVOB_INTN1
SDVOB_STALLN1

Place near U104

U16G

U16G

H24

SDVOCTRL_DATA

H25

SDVOCTRL_CLK

AB29

GCLKN

AC29

GCLKP

A15

TVDAC_A

C16

TVDAC_B

A17

TVDAC_C

J18

TV_REFSET

B15

TV_IRTNA

B16

TV_IRTNB

B17

TV_IRTNC

E24

DDCCLK

E23

DDCDATA

E21

BLUE

D21

BLUE#

C20

GREEN

B20

GREEN#

A19

RED

B19

G21

DUMMY

2D5V_S0

UMA

UMA
1 2
1 2

UMA

UMA

UMA

UMA
1 2
1 2

UMA

UMA

H21

J20

E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27

B30
B29
C25
C24

B34
B33
B32

A34
A33
B31

C29
D28
C27

C28
D27
C26

RED#
VSYNC
HSYNC
REFSET

LBKLT_CRTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL

LACLKN
LACLKP
LBCLKN
LBCLKP

LADATAN0
LADATAN1
LADATAN2

LADATAP0
LADATAP1
LADATAP2

LBDATAN0
LBDATAN1
LBDATAN2

LBDATAP0
LBDATAP1
LBDATAP2

71.0GMCH.0XU

71.0GMCH.0XU

VSYNC
HSYNC
CRTIREF

12

L_LVBG
L_VREFH
L_VREFL

DY

DY
DY

DY

C318 Do Not Stuff

C318 Do Not Stuff
C315 Do Not Stuff

C315 Do Not Stuff

C317 Do Not Stuff

C317 Do Not Stuff
C314 Do Not Stuff

C314 Do Not Stuff

EXP_COMPI

EXP_ICOMPO

EXP_RXN0

MISCTVVGALVDS

MISCTVVGALVDS

EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8

EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9

EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

EXP_TXN7

EXP_TXN8

EXP_TXN9

EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15

SDVOB_INTP 53
SDVOB_STALLP 53

SDVOB_INTN 53
SDVOB_STALLN 53

D

D36
D34

E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34

D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34

E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36

D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36

SDVOB_RN_1
SDVOB_GN_1
SDVOB_BN_1
SDVOB_CLKN_1

SDVOB_RP_1
SDVOB_GP_1
SDVOB_BP_1
SDVOB_CLKP_1

SDVOC_CTRLCLK53
SDVOC_CTRLDATA53

U16B

U16B

DMI_TXN0

DMI_TXN016

12

R620

R620
40D2R2F

40D2R2F

SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

PM_EXTTS#0

PM_EXTTS#1

12

C207

C207

M_CLK_DDR011
M_CLK_DDR111

M_CLK_DDR311
M_CLK_DDR411

M_CLK_DDR#011
M_CLK_DDR#111

M_CLK_DDR#311
M_CLK_DDR#411

SCD1U16V

SCD1U16V

DMI_TXN116
DMI_TXN216
DMI_TXN316

DMI_TXP016
DMI_TXP116
DMI_TXP216
DMI_TXP316

DMI_RXN016
DMI_RXN116
DMI_RXN216
DMI_RXN316

DMI_RXP016
DMI_RXP116
DMI_RXP216
DMI_RXP316

M_CKE011,12
M_CKE111,12
M_CKE211,12
M_CKE311,12

M_CS#011,12
M_CS#111,12
M_CS#211,12
M_CS#311,12

M_OCDCOMP0
M_OCDCOMP1

M_ODT011,12
M_ODT111,12
M_ODT211,12
M_ODT311,12

12

12

SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

BC4

BC4

C214

C214

R52

R52

R53

R53

A

12

SCD1U16V

SCD1U16V

BC3

BC3

2D5V_S0

R51

R51

12

1KR2

1KR2

DUMMY-R2

DUMMY-R2

R50

R50

12

DUMMY-R2

DUMMY-R2

12

CFG23

12

4K7R2

4K7R2

M_RCOMPN
M_RCOMPP

SMXSLEW
SMYSLEW

4 4

3 3

Layout Note:
Route as short
as possible

12

R621

R621
40D2R2F

40D2R2F

DDR_VREF

2 2

2D5V_S0

R540

R540

1 2

10KR2

10KR2

R541

R541

1 2

10KR2

10KR2

1D8V_S3

12

R630

R630
80D6R2F

80D6R2F

M_RCOMPN

M_RCOMPP

12

R627

R627
80D6R2F

80D6R2F

CFG[2:0] Freq.(MHz)

1 1

101 400
001 533

DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

CFG1
CFG0

AA31
AB35
AC31
AD35

AA35
AB31
AC35

AA33
AB37
AC33
AD37

AA37
AB33
AC37

AM33
AE11

AC10
AN33
AE10

AD10
AP21

AM21
AH21
AK21

AN16
AM14
AH15
AG16

AF22
AF16

AP14
AM11

AN10
AK10

AK11
AF37

AE27
AE28

AF10

Y31

Y33

AL1

AJ34

AF6

AK1

AJ33

AF5

AL15

AD1

AF9

Do Not Stuff

Do Not Stuff

DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3

DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3

DMITXN0
DMITXN1
DMITXN2
DMITXN3

DMITXP0
DMITXP1
DMITXP2
DMITXP3

SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5

SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#

SM_OCDCOMP0
SM_OCDCOMP1

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT

71.0GMCH.0XU

71.0GMCH.0XU

CHT2222A

CHT2222A

3

Q4

Q4

2

For A stepping

DY

DY

DMI

DMI

PM

PM

DDR MUXING

DDR MUXING

DREF_SSCLKN

CLK

CLK

DREF_SSCLKP

NC

NC

12

CFG2

3

Q3

Q3

2

DY

DY

R25

R25

1

1 2

Do Not Stuff

Do Not Stuff

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15

CFG/RSVD

CFG/RSVD

CFG16
CFG17
CFG18
CFG19
CFG20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27

BM_BUSY#

EXT_TS0#
EXT_TS1#

THRMTRIP#

PWROK

RSTIN#

DREF_CLKN

DREF_CLKP

NC10

NC11

R37

R37
1KR2

1KR2

FWH_INIT_Q

1

For B stepping

B

CFG0

G16

CFG1

H13

CFG2

G14

CFG3 PEG_COMP

F16

CFG4

F15

CFG5

G15

CFG6

E16

CFG7

D17

CFG8

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9

J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25

VGATE_PWRGD

J23
J21
H22
F5
AD30
AE29

A24
A23
C37
D37

AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37

1D05V_S03D3V_S0

12

CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

1D05V_NB_S0

PM_EXTTS#0
PM_EXTTS#1

PLT_RST1#_GMCH

R29

R29
330R2

330R2

CPU_SEL0 4

0ohms

R622

R622

12

10KR2

10KR2

PM_BMBUSY# 16

PM_THRMTRIP-A# 4
VGATE_PWRGD 16,38

1 2

R626 100R2R626 100R2

DREFCLK# 3
DREFCLK 3
DREFSSCLK# 3
DREFSSCLK 3

2D5V_S0

R524 DUMMY-R2R524 DUMMY-R2
R523 DUMMY-R2R523 DUMMY-R2
R525 DUMMY-R2R525 DUMMY-R2
R518 DUMMY-R2R518 DUMMY-R2
R512 DUMMY-R2R512 DUMMY-R2
R510 DUMMY-R2R510 DUMMY-R2
R513 2K2R2R513 2K2R2
R520 DUMMY-R2R520 DUMMY-R2
R519 DUMMY-R2R519 DUMMY-R2
R517 DUMMY-R2R517 DUMMY-R2
R516 DUMMY-R2R516 DUMMY-R2
R514 DUMMY-R2R514 DUMMY-R2
R511 DUMMY-R2R511 DUMMY-R2
R506 DUMMY-R2R506 DUMMY-R2
R515 DUMMY-R2R515 DUMMY-R2
R509 DUMMY-R2R509 DUMMY-R2
R508 DUMMY-R2R508 DUMMY-R2
R507 DUMMY-R2R507 DUMMY-R2

GMCH_TV_COMP34
GMCH_TV_LUMA34
GMCH_TV_CRMA34

R585

R585

1 2

0R2-0 NV44

0R2-0 NV44

R573

R573

1 2

0R2-0 NV44

0R2-0 NV44

0ohms

0ohms

NV44

NV44

R35

R35

1 2

0R2-0

0R2-0

12

GMCH_VSYNC14
GMCH_HSYNC14

R34

R34
Do Not Stuff

Do Not Stuff

UMA

UMA

DUMMY

When High 1K Ohm

1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

When Low choice
lower than 3.5K
Ohm

Alviso will provide SDVO_CTRLCLK
and CTRLDATA pulldowns on-die

VSYNC

HSYNC

R59

R59

0R2-0

0R2-0

1 2

R57

R57

0R2-0

0R2-0

1 2

R58

R58

0R2-0

0R2-0

1 2

1D05V_NB_S0

PLT_RST1# 16,18,30,31,33,34,46

PEG_RXP1
PEG_RXP2

PEG_RXN1
PEG_RXN2

R54

R54

0R2-0

0R2-0

GMCH_DDCCLK14
GMCH_DDCDATA14

GMCH_BLUE34
GMCH_GREEN34
GMCH_RED34

R602 0R2-0NV44R602 0R2-0NV44
R561 0R2-0

R561 0R2-0

CFG18

CFG19
CFG20
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

Place near
C916,C917,C896,C897

C

TP59 TPAD28TP59 TPAD28
TP60 TPAD28TP60 TPAD28

CLK_MCH_3GPLL#3
CLK_MCH_3GPLL3

12

R55

R55

0R2-0

0R2-0

R539 Do Not StuffUMAR539 Do Not StuffUMA

1 2

R538 Do Not StuffUMAR538 Do Not StuffUMA

1 2

R601 Do Not StuffUMAR601 Do Not StuffUMA

1 2

1 2
1 2

NV44

NV44

0ohms

GMCH_BL_ON30

GMCH_LCDVDD_ON13

TP54 TPAD28TP54 TPAD28
TP57 TPAD28TP57 TPAD28
TP56 TPAD28TP56 TPAD28

GMCH_TXACLK-13
GMCH_TXACLK+13

GMCH_TXAOUT0-13
GMCH_TXAOUT1-13
GMCH_TXAOUT2-13

GMCH_TXAOUT0+13
GMCH_TXAOUT1+13
GMCH_TXAOUT2+13

LCTLA_CLK
LCTLB_DATA
LDDC_NB_CLK
LDDC_NB_DATA

GMCH_BL_ON
LBKLT_CRTL
LIBG

1 2
1 2

UMA

UMA

1 2
1 2

UMA

UMA

PEG_RXN[15..0] 46
PEG_RXP[15..0] 46
PEG_TXN[15..0] 46
PEG_TXP[15..0] 46

PEG_COMP

PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0

SDVOB_RN_1
SDVOB_GN_1
SDVOB_BN_1
SDVOB_CLKN_1
TXN4
TXN5
TXN6
TXN7
TXN8
TXN9
TXN10
TXN11
TXN12
TXN13
TXN14
TXN15

SDVOB_RP_1
SDVOB_GP_1
SDVOB_BP_1
SDVOB_CLKP_1
TXP4
TXP5
TXP6
TXP7
TXP8
TXP9
TXP10
TXP11
TXP12
TXP13
TXP14
TXP15

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet

Lane Reversal enable

C574 SCD1U16V NV44C574 SCD1U16V NV44
C93 SCD1U16V NV44C93 SCD1U16V NV44
C573 SCD1U16V NV44C573 SCD1U16V NV44
C99 SCD1U16V NV44C99 SCD1U16V NV44
C587 SCD1U16V NV44C587 SCD1U16V NV44
C107 SCD1U16V NV44C107 SCD1U16V NV44
C597 SCD1U16V NV44C597 SCD1U16V NV44
C115 SCD1U16V NV44C115 SCD1U16V NV44
C610 SCD1U16V NV44C610 SCD1U16V NV44
C120 SCD1U16V NV44C120 SCD1U16V NV44
C618 SCD1U16V NV44C618 SCD1U16V NV44
C146 SCD1U16V NV44C146 SCD1U16V NV44
C623 SCD1U16V NV44C623 SCD1U16V NV44
C154 SCD1U16V NV44C154 SCD1U16V NV44
C631 SCD1U16V NV44C631 SCD1U16V NV44
C172 SCD1U16V NV44C172 SCD1U16V NV44

C565 SCD1U16V NV44C565 SCD1U16V NV44
C87 SCD1U16V NV44C87 SCD1U16V NV44
C564 SCD1U16V NV44C564 SCD1U16V NV44
C97 SCD1U16V NV44C97 SCD1U16V NV44
C581 SCD1U16V NV44C581 SCD1U16V NV44
C101 SCD1U16V NV44C101 SCD1U16V NV44
C592 SCD1U16V NV44C592 SCD1U16V NV44
C109 SCD1U16V NV44C109 SCD1U16V NV44
C600 SCD1U16V NV44C600 SCD1U16V NV44
C116 SCD1U16V NV44C116 SCD1U16V NV44
C609 SCD1U16V NV44C609 SCD1U16V NV44
C136 SCD1U16V NV44C136 SCD1U16V NV44
C625 SCD1U16V NV44C625 SCD1U16V NV44
C148 SCD1U16V NV44C148 SCD1U16V NV44
C632 SCD1U16V NV44C632 SCD1U16V NV44
C166 SCD1U16V NV44C166 SCD1U16V NV44

C142 Do Not Stuff UMAC142 Do Not Stuff UMA

1 2

C561 Do Not Stuff UMAC561 Do Not Stuff UMA

1 2

C104 Do Not Stuff UMAC104 Do Not Stuff UMA

1 2

C572 Do Not Stuff UMAC572 Do Not Stuff UMA

1 2

C143 Do Not Stuff UMAC143 Do Not Stuff UMA

1 2

C559 Do Not Stuff UMAC559 Do Not Stuff UMA

1 2

C105 Do Not Stuff UMAC105 Do Not Stuff UMA

1 2

C563 Do Not Stuff UMAC563 Do Not Stuff UMA

1 2

1D5V_PCIE_S0

R57124D9R2F R57124D9R2F

12

E

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

SDVOB_RN 53
SDVOB_GN 53
SDVOB_BN 53
SDVOB_CLKN 53

SDVOB_RP 53
SDVOB_GP 53
SDVOB_BP 53
SDVOB_CLKP 53

of

of

of

755Thursday, January 13, 2005

755Thursday, January 13, 2005

755Thursday, January 13, 2005

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (2 of 5)

GMCH (2 of 5)

GMCH (2 of 5)

CANARY2 SA

CANARY2 SA

CANARY2 SA

A

4 4

U16C

M_A_DQ[63..0]11 M_B_DQ[63..0]11

3 3

2 2

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AG35
AH35

AL35
AL37

AH36

AJ35

AK37

AL34
AM36
AN35
AP32
AM31
AM34
AM35

AL32
AM32
AN31
AP31
AN28
AP28

AL30
AM30
AM28

AL28
AP27
AM27
AM23
AM22

AL23
AM24
AN22
AP22

AM9

AL9
AL6

AP7
AP11
AP10

AL7

AM7
AN5
AN6
AN3

AP3

AP6

AM6

AL4

AM3

AK2

AK3

AG2
AG1

AL3

AM2
AH3
AG3

AF3

AE3

AD6
AC4

AF2

AF1

AD4
AD5

U16C

SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63

SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_RCVENIN#

SA_RCVENOUT#

SA_BS0#
SA_BS1#
SA_BS2#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

SA_CAS#
SA_RAS#

SA_WE#

B

AK15
AK16
AL21

M_A_DM0

AJ37

M_A_DM1

AP35

M_A_DM2

AL29

M_A_DM3

AP24

M_A_DM4

AP9

M_A_DM5

AP4

M_A_DM6

AJ2

M_A_DM7

AD3

M_A_DQS0

AK36

M_A_DQS1

AP33

M_A_DQS2

AN29

M_A_DQS3

AP23

M_A_DQS4

AM8

M_A_DQS5

AM4

M_A_DQS6

AJ1

M_A_DQS7

AE5

M_A_DQS#0

AK35

M_A_DQS#1

AP34

M_A_DQS#2

AN30

M_A_DQS#3

AN23

M_A_DQS#4

AN8

M_A_DQS#5

AM5

M_A_DQS#6

AH1

M_A_DQS#7

AE4

M_A_A0

AL17

M_A_A1

AP17

M_A_A2

AP18

M_A_A3

AM17

M_A_A4

AN18

M_A_A5

AM18

M_A_A6

AL19

M_A_A7

AP20

M_A_A8

AM19

M_A_A9

AL20

M_A_A10

AM16

M_A_A11

AN20

M_A_A12

AM20

M_A_A13

AM15
AN15

AP16

SA_RCVENIN#

AF29

SA_RCVENOUT#

AF28
AP15

Place Test PAD Near to Chip
as could as possible

C

U16D

U16D

M_A_BS#0 11,12
M_A_BS#1 11,12
M_A_BS#2 11,12
M_A_DM[7..0] 11

M_A_DQS[7..0] 11

M_A_DQS#[7..0] 11

M_A_A[13..0] 11,12

M_A_CAS# 11,12
M_A_RAS# 11,12

TP67 TPAD28TP67 TPAD28
TP69 TPAD28TP69 TPAD28 TP70 TPAD28TP70 TPAD28

M_A_WE# 11,12

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AE31
AE32
AG32
AG36
AE34
AE33

AF31

AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31

AJ31
AK30

AJ30
AH29
AH28
AK29
AH30
AH27
AG28

AF24
AG23

AJ22
AK22
AH24
AH23
AG22

AJ21
AG10

AG9
AG8

AH8
AH11
AH10

AK9

AK6

AH5

AK8

AK4

AG5

AG4

AD8

AD9

AH4

AG6

AE8

AD7

AC5

AB8

AB6

AA8

AC8

AC7

AA4

AA5

SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37

AJ9

SBDQ38
SBDQ39

AJ7

SBDQ40
SBDQ41

AJ4

SBDQ42
SBDQ43
SBDQ44

AJ8

SBDQ45

AJ5

SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63

D

AJ15

SB_BS0#

AG17

SB_BS1#

AG21

SB_BS2#

AF32

SB_DM0

AK34

SB_DM1

AK27

SB_DM2

AK24

SB_DM3

AJ10

SB_DM4

AK5

SB_DM5

AE7

SB_DM6

AB7

SB_DM7

AF34

SB_DQS0

AK32

SB_DQS1

AJ28

SB_DQS2

AK23

SB_DQS3

AM10

SB_DQS4

AH6

SB_DQS5

AF8

SB_DQS6

AB4

SB_DQS7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

SB_CAS#
SB_RAS#

SB_WE#

AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5

AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15

AH14
AK14
AF15
AF14
AH16

Place Test PAD Near to Chip
ascould as possible

SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_RCVENIN#

SB_RCVENOUT#

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

SB_RCVENIN#
SB_RCVENOUT#

M_B_BS#0 11,12
M_B_BS#1 11,12
M_B_BS#2 11,12
M_B_DM[7..0] 11

M_B_DQS[7..0] 11

M_B_DQS#[7..0] 11

M_B_A[13..0] 11,12

M_B_CAS# 11,12
M_B_RAS# 11,12

TP68 TPAD28TP68 TPAD28

M_B_WE# 11,12

E

71.0GMCH.0XU

71.0GMCH.0XU

1 1

A

B

C

71.0GMCH.0XU

71.0GMCH.0XU

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

D

Date: Sheet of

GMCH (3 of 5)

GMCH (3 of 5)

GMCH (3 of 5)

CANARY2 SA

CANARY2 SA

CANARY2 SA

855Thursday, January 13, 2005

855Thursday, January 13, 2005

855Thursday, January 13, 2005

E

of

A

R537

R537

1 2

Do Not Stuff

Do Not Stuff

UMA

UMA

R546

R546

1 2

3D3V_S0

4 4

1 2

1 2

1 2

Do Not Stuff

Do Not Stuff

UMA

UMA

R548

R548

Do Not Stuff

Do Not Stuff

UMA

UMA

R547

R547

Do Not Stuff

Do Not Stuff

UMA

UMA

R545

R545

Do Not Stuff

Do Not Stuff

UMA

UMA

12

12

12

12

C543

C543
0R2-0

0R2-0

C545

C545
0R2-0

0R2-0

C544

C544
0R2-0

0R2-0

C541

C541
0R2-0

0R2-0

D30

D30

Do Not Stuff

Do Not Stuff

3D3V_TVDACA_S0

3D3V_TVDACB_S0

3D3V_TVDACC_S0

3D3V_ATVBG_S0

DUMMY

0 ohms

3 3

When GM replace to PM

3D3V_S0

12

C548

C548
SC10U10V5ZY

SC10U10V5ZY

Route ASSATVBG gnd from GMCH to
decoupling cap groung lead and
then connect to the gnd plane

DUMMY

UMA

UMA

21

12

DY

DY

1D5V_S0

C542

C542
Do Not Stuff

Do Not Stuff

F17

E17

VCCA_TVDACA0

1D5V_DLVDS_S0 1D8V_S3

H17

B26

D18

C18

F18

E18

H18

VCCA_TVDACA1

VCCA_TVBG

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACC0

VCCA_TVDACC1

G18

VSSA_TVBG

D19

B25

VCCD_LVDS0

VCCD_TVDAC

VCCDQ_TVDAC

1D5V_TVDAC_S0

1D5V_QTVDAC_S0

2D5V_ALVDS_S0

A25

A35

VCCA_LVDS

VCCD_LVDS1

VCCD_LVDS2

B

B22

B21

VCCHV0

0 ohms

V1.8_DDR_CAP1

A21

VCCHV1

VCCHV2

12

C547

C547
0R2-0

0R2-0

12

C546

C546
0R2-0

0R2-0

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C239

C239
SCD1U10V2MX-1

SCD1U10V2MX-1

12

C232

C232
SCD1U10V2MX-1

SCD1U10V2MX-1

V1.8_DDR_CAP2

V1.8_DDR_CAP5

AM37

AH37

AP29

AD28

VCCSM0

VCCSM1

VCCSM2

VCCSM3

DUMMY

2D5V_TVDAC_S0

C52

C52

Note: All VCCSM
pins shorted
internally

C255

C255

1 2

SCD1U10V2MX-1

SCD1U10V2MX-1

AD27

AC27

AP26

AN26

AM26

VCCSM4

VCCSM5

VCCSM6

VCCSM7

VCCSM8

C

2D5V_S0

12

AE23

AE22

VCCSM26

VCCSM27

VCCSM28

1D5V_S0

R46

R46

1 2

0R3-U

0R3-U

C54

C54

SCD1U10V2MX-1

SCD1U10V2MX-1

2D5V_S0 2D5V_ALVDS_S0

R93

R93

1 2

0R3-U

0R3-U

SCD1U10V2MX-1

SCD1U10V2MX-1

2D5V_S0 2D5V_TXLVDS_S0

R23

R23

1 2

0R3-U

0R3-U

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C680

C680

SC10U10V5ZY

SC10U10V5ZY

AE21

AE20

AE19

AE18

AE17

AE16

VCCSM29

VCCSM30

VCCSM31

VCCSM32

VCCSM33

12

C681

C681

SC10U10V5ZY

SC10U10V5ZY

AE15

AE14

AP13

AN13

AM13

AL13

AK13

VCCSM34

VCCSM35

VCCSM36

VCCSM37

VCCSM38

VCCSM39

VCCSM40

1D5V_S0

1 2

R535 Do Not Stuff

R535 Do Not Stuff

UMA

UMA

R534

R534
Do Not StuffUMA

Do Not StuffUMA

1 2

R533

R533

1 2

12

AK26

AJ26

AH26

AL26

VCCSM9

VCCSM10

VCCSM11

12

0R3-U

0R3-U

C44

C44
SC10U10V5ZY

SC10U10V5ZY

AG26

AF26

AE26

AP25

AN25

AM25

AL25

AK25

AJ25

AH25

AG25

AF25

AE25

AE24

VCCSM12

VCCSM13

VCCSM14

VCCSM15

VCCSM16

VCCSM17

VCCSM18

VCCSM19

VCCSM20

VCCSM21

VCCSM22

VCCSM23

VCCSM24

VCCSM25

POWER

POWER

VCCSM41

C553

C553

C24

C24

C682

C682

AJ13

VCCSM42

12

12

12

SC10U10V5ZY

SC10U10V5ZY

AH13

AG13

VCCSM43

VCCSM44

1D5V_DLVDS_S0

12

12

SCD01U16V2KX

SCD01U16V2KX

12

AF13

AE13

AP12

AN12

VCCSM45

VCCSM46

VCCSM47

C46

C46
SC10U10V5ZY

SC10U10V5ZY

C549

C549

C28

C28
SC4D7U10V5ZY

SC4D7U10V5ZY

AM12

AL12

AK12

AJ12

VCCSM48

VCCSM49

VCCSM50

VCCSM51

VCCSM52

Note: All VCCSM
pins shorted
internally

C254

C254

1 2

SCD1U10V2MX-1

SCD1U10V2MX-1

AH12

AG12

AF12

AE12

VCCSM53

VCCSM54

VCCSM55

D

12

C676

C676
SC100U6D3V0MX-1

SC100U6D3V0MX-1

12

C187

C187

SC10U10V5ZY

SC10U10V5ZY

1D5V_3GPLL_S0

12

C650

C650

SCD1U10V2MX-1

SCD1U10V2MX-1

Y27

Y29

Y28

F37

VCCA_3GPLL2

VCCA_3GPLL0

VCCA_3GPLL1

1 2

C644

C644

G37

VSSA_3GBG

VCCA_3GBG

12

C649

C649

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C180

C180

SC10U10V5ZY

SC10U10V5ZY

12

C229

C229

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C216

C216
SCD1U10V2MX-1

SCD1U10V2MX-1

2D5V_TXLVDS_S0

V1.8_DDR_CAP4

V1.8_DDR_CAP3

V1.8_DDR_CAP6

AD11

AC11

AB11

AB10

AB9

AP8

AM1

AE1

B28

A28

A27

VCCSM56

VCCSM57

VCCSM58

VCCSM59

VCCSM60

VCCSM61

VCCSM62

VCCSM63

VCCSM64

VCCTX_LVDS0

VCCTX_LVDS1

VCCTX_LVDS2

AE37

AF20

AP19

AF19

AF18

VCCA_SM0

VCCA_SM1

VCCA_SM2

VCCA_SM3

W37

VCC3G0

VCC3G1

U37

R37

VCC3G2

N37

VCC3G3

VCC3G4

12

L37

J37

VCC3G5

VCC3G6

E

R638

R638

2D5V_3GBG_S0 2D5V_S0

1D5V_S01D5V_DDRDLL_S0

0R3-U

0R3-U

R138

R138

1 2

12

SC10U10V5ZY

SC10U10V5ZY

0R3-U

0R3-U

C195

C195

SC10U10V5ZY

SC10U10V5ZY

R625

R625

1 2

0R3-U

0R3-U

R565

R565

1 2

12

0R3-U

0R3-U

C551

C551

SCD1U10V2MX-1

SCD1U10V2MX-1

U16E

U16E

71.0GMCH.0XU

71.0GMCH.0XU

Route ASSA3GBG gnd from GMCH to
decoupling cap groung lead and
then connect to the gnd plane

1D5V_S01D5V_PCIE_S0

1D5V_S0

VCC 1D05_S0 for low speed
graphic clock.1D5V_S0 for
high speed clock.default

2 2

1 1

use 1D05V_S0

1D05V_NB_S0

12

C608

C608

SC10U10V5ZY

SC10U10V5ZY

Graphic Freq.
/Memory Freq.

200MHZ/DDR333

200MHZ/DDR2

-400/533

320MHZ/DDR2

-400/533

12

12

C630

C630

C582

C582

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

SC10U10V5ZY

1D05V 1D5V

YES YES

NO YES

A

VCC0

VCC1

VCC2

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

VCC10

VCC11

VCC12

VCC13

VCC14

VCC15

VCC16

VCC17

VCC18

VCC19

VCC20

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

VCC27

VCC28

VCC29

VCC30

VCC31

VCC32

VCC33

VCC34

VCC35

VCC36

VCC37

VCC38

VCC39

VCC40

VCC41

VCC42

VCC43

VCC44

VCC45

VCC46

VCC47

VCC48

VCCH_MPLL1

VCCH_MPLL0

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCC_SYNC

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT14

VTT15

VTT16

VTT17

VTT18

VTT19

VTT20

VTT21

VTT22

VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51

J29

T29

R29

N29

12

12

C627

C627

SCD1U10V2MX-1

SCD1U10V2MX-1

C596

C596

M29

T28

K29

V28

U28

R28

12

C629

C629

SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_S0

YESYES

J28

L28

P28

K28

N28

M28

12

SCD1U10V2MX-1

SCD1U10V2MX-1

R143

R143

0R5J-1

0R5J-1

T27

V27

H28

U27

R27

G28

C626

C626

SCD1U10V2MX-1

SCD1U10V2MX-1

1 2

1 2

12

1 2

1 2

B

P27

N27

M27

L7

L7

IND-D1UH

IND-D1UH

L8

L8

IND-D1UH

IND-D1UH

L9

L9

IND-D1UH

IND-D1UH

L10

L10

IND-D1UH

IND-D1UH

J27

K26

H27

H26

12

C45

C45
SC10U10V5ZY

SC10U10V5ZY

12

C47

C47
SC10U10V5ZY

SC10U10V5ZY

12

C176

C176
SC10U10V5ZY

SC10U10V5ZY

12

C200

C200
SC10U10V5ZY

SC10U10V5ZY

J25

K25

T20

K24

K23

K22

K21

U20

W20

12

12

12

12

K20

V19

K19

V18

U19

W18

1D5V_HMPLL_S0

1D5V_DPLLA_S0

C53

C53
SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_DPLLB_S0

C55

C55
SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_HPLL_S0

C170

C170
SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_MPLL_S0

C208

C208
SCD1U10V2MX-1

SCD1U10V2MX-1

T18

K18

K17

AC2

AC1

F19

B23

E19

C35

AA1

AA2

G19

C

L27

K27

J13

K12

V11

U11

W11

R588

R588

1 2

0R2-0 NV44

0R2-0 NV44

R521

R521

1 2

Do Not StuffUMA

Do Not StuffUMA

T11

K13

H20

2D5V_CRTDAC_S0

GMCH_VCC_SYNC

DUMMY

Layout Notes: VSSA_CRTDAC
Route caps within 250mil
of Alviso. Route FB
within 3" of Alviso.

P11

R11

N11

M11

0 ohms

L11

T10

K11

V10

U10

W10

DY

DY

R30

R30

1 2

Do Not Stuff

Do Not Stuff

R31

R31

1 2

12

0R3-U

0R3-U

C562

C562
SCD1U10V2MX-1

SCD1U10V2MX-1

12

C533

C533
SCD1U10V2MX-1

SCD1U10V2MX-1

Route VSSA_CRTDAC gnd from GMCH to
decoupling cap ground lead and then
connect to the gnd plane.

R10

P10

J10

K10

N10

M10

1D05V_NB_S0

2D5V_S0

1 2

D

R493

R493

1KR2

1KR2

VCCP_GMCH_CAP1

12

C49

C49

SCD47U10V3ZY

SCD47U10V3ZY

1D5V_S0

D29

D29

21

SSM5818SL

SSM5818SL

SC4D7U10V5ZY

SC4D7U10V5ZY

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

C71

C71

1D05V_S0

12

SCD47U10V3ZY

SCD47U10V3ZY

C621

C621

12

G1

VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

VCCP_GMCH_CAP2

12

12

C102

C102

SCD22U16V3ZY

SCD22U16V3ZY

SCD22U16V3ZY

C595

C595

GMCH (4 of 5)

GMCH (4 of 5)

GMCH (4 of 5)

SCD22U16V3ZY

12

SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2 SA

CANARY2 SA

CANARY2 SA

C604

C604

12

C622

C622

SCD1U10V2MX-1

SCD1U10V2MX-1

955Thursday, January 13, 2005

955Thursday, January 13, 2005

955Thursday, January 13, 2005

E

A

H29

G29

F29

E29

D29

A29

AC28

AB28

AA28

W28

E28

AN27

AL27

AJ27

AG27

AF27

AB27

AA27

W27

G27

E27

B27

J26

G26

E26

A26

AN24

U16F

U16F

4 4

71.0GMCH.0XU

71.0GMCH.0XU

AL24

VSS110

VSS111

VSS112

VSS113

VSS114

VSS115

VSS116

VSS117

VSS118

VSS119

VSS120

VSS121

VSS122

VSS123

VSS124

VSS125

VSS126

VSS127

VSS128

VSS129

VSS261

VSS262

VSS263

VSS264

VSS265

VSS266

VSS267

VSS259P2VSS258T2VSS257V2VSS256

VSS255

VSS254

VSS253

VSS252

VSS251A3VSS250C3VSS249

VSS248

VSS247

VSS246

AA3

AB3

AC3

VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239

AJ3

AF4

VSSALVDS

B36

VSS260L2VSS268J2VSS269G2VSS270D2VSS271

Y1

AL2

AE2

AD2

AH2

AN2

B

V31

U31

T31

R31

P31

N31

M31

L31

K31

J31

H31

G31

F31

E31

D31

AP30

AE30

AC30

AB30

AA30

Y30

C30

AM29

AJ29

AG29

AD29

AA29

W29

V29

U29

P29

L29

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

VSS102

VSS103

VSS104

VSS105

VSS106

VSS107

VSS108

VSS109

VSS238

VSS237E5VSS236W5VSS235

VSS234

VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228

AL5

AP5

AN4

AA6

VSS227

VSS226

VSS225

VSS224G7VSS223V7VSS222

VSS221

VSS220

VSS219

VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213

AJ6

AE6

AA7

AC6

AK7

AN7

AG7

VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207

AL8

AA9

W31

AC9

C

C34

AL33

AF33

AD33

W33

V33

U33

T33

R33

P33

N33

M33

L33

K33

J33

H33

G33

F33

E33

D33

AN32

AJ32

AD32

AC32

AB32

AA32

Y32

C32

A32

AL31

AG31

AD31

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS74

VSS75

VSS76

VSS

VSS

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS206

VSS205

VSS204

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

J12

AE9

L10

F11

Y11

Y10

D10

AH9

AN9

H11

AA10

B12

AJ11

AL11

AF11

AA11

AN11

AG11

D12

J14

F14

A14

B14

K14

AG14

VSS175

K15

A16

C15

AJ14

D16

AL14

AN14

D

AF36

AE36

AD36

AC36

AB36

AA36

C36

AE35

Y35

W35

V35

U35

T35

R35

P35

N35

M35

L35

K35

J35

H35

G35

F35

E35

D35

B35

AN34

AH34

AD34

AC34

AB34

AA34

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS44

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS163

VSS162

VSS161

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

J19

H16

K16

AL16

C17

G17

A18

AJ17

AF17

AN17

T19

B18

U18

C19

H19

W19

AL18

F20

A20

D20

AN19

AG19

F21

E20

G20

V20

A22

C21

D22

AF21

AK20

AN21

E

AL36

AJ36

K37

H37

E37

AN36

VSS7

VSS8

VSS9

VSS10

VSS11

VSS141

VSS140

VSS139

VSS138

VSS137

J22

E22

H23

AL22

AF23

AH22

M37

VSS6

VSS136

B24

P37

VSS5

VSS135

D24

T37

VSS4

VSS134

F24

V37

VSS3

VSS133

J24

Y37

VSS2

VSS132

AG24

AG37

VSS1

VSS131

AJ24

VSS0

VSS130

1D8V_S3

12

C683

C683

3 3

U16H

U16H

71.0GMCH.0XU

2 2

71.0GMCH.0XU

SC10U10V5ZY

SC10U10V5ZY

AD13

AC13

AB13

AD12

AC12

AB12

VCCSM_NCTF27

VCCSM_NCTF28

VCCSM_NCTF29

VCCSM_NCTF30

VCCSM_NCTF31

12

C640

C640

SCD1U10V2MX-1

SCD1U10V2MX-1

AD17

AC17

AD16

AC16

AD15

AC15

AD14

AC14

VCCSM_NCTF19

VCCSM_NCTF20

VCCSM_NCTF21

VCCSM_NCTF22

VCCSM_NCTF23

VCCSM_NCTF24

VCCSM_NCTF25

VCCSM_NCTF26

1D05V_S0

Place these Hi-Freq decoupling caps near GMCH

12

12

C665

C665

C658

AD22

P12

VCCSM_NCTF8

VTT_NCTF14

AC23

R12

VCCSM_NCTF7

VTT_NCTF13

AD23

T12

VCCSM_NCTF6

VTT_NCTF12

AC24

U12

VCCSM_NCTF5

VTT_NCTF11

AD24

V12

VCCSM_NCTF4

VTT_NCTF10

SCD1U10V2MX-1

SCD1U10V2MX-1

AC25

W12

C658

AD25

VCCSM_NCTF3

VTT_NCTF9

L13

12

C639

C639

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

AD21

AC21

AD20

AC20

AD19

AC19

AD18

AC18

VCCSM_NCTF16

VCCSM_NCTF17

VCCSM_NCTF18

AC22

VCCSM_NCTF9

VCCSM_NCTF10

VCCSM_NCTF11

VCCSM_NCTF12

VCCSM_NCTF13

VCCSM_NCTF14

VCCSM_NCTF15

VTT_NCTF17

VTT_NCTF16

VTT_NCTF15

L12

N12

M12

VCCSM_NCTF2

VTT_NCTF8

AC26

M13

VCCSM_NCTF1

VTT_NCTF7

AD26

N13

VCCSM_NCTF0

VTT_NCTF6

12

C641

C641

SCD1U16V

SCD1U16V

SCD1U10V2MX-1

SCD1U10V2MX-1

W17

V17

U17

T17

P17

N17

M17

L17

VCC_NCTF71

VCC_NCTF72

VCC_NCTF73

VCC_NCTF74

VCC_NCTF75

VCC_NCTF76

VCC_NCTF77

VCC_NCTF78

VTT_NCTF5

VTT_NCTF4

VTT_NCTF3

VTT_NCTF2

VTT_NCTF1

VTT_NCTF0

T13

P13

V13

R13

U13

W13

12

C635

C635

L18

VCC_NCTF70

M18

VCC_NTTF69

N18

Y12

12

12

C655

C655

C645

C645

SCD1U16V

SCD1U16V

R18

P18

VCC_NCTF66

VCC_NCTF67

VCC_NCTF68

VSS_NCTF68

VSS_NCTF67

VSS_NCTF66

Y13

AA12

SCD1U16V

SCD1U16V

L20

Y19

R19

P19

N19

M19

L19

Y18

VCC_NCTF59

VCC_NCTF60

VCC_NCTF61

VCC_NCTF62

VCC_NCTF63

VCC_NCTF64

VCC_NCTF65

VSS_NCTF65

VSS_NCTF64

VSS_NCTF63

VSS_NCTF62

VSS_NCTF61

VSS_NCTF60

VSS_NCTF59

L14

T14

P14

N14

R14

U14

M14

AA13

VCC_NCTF58

VSS_NCTF58

M20

V14

N20

VCC_NCTF57

NCTF

NCTF

VSS_NCTF57

W14

12

C636

C636

SCD1U16V

SCD1U16V

1D05V_NB_S0

P21

N21

M21

L21

Y20

R20

P20

VCC_NCTF53

VCC_NCTF54

VCC_NCTF55

VCC_NCTF56

VSS_NCTF56

VSS_NCTF55

VSS_NCTF54

VSS_NCTF53

L15

Y14

AA14

AB14

V21

U21

T21

VCC_NCTF49

VCC_NCTF50

VCC_NCTF51

VCC_NCTF52

VCC_NCTF47

VCC_NCTF48

VSS_NCTF52

VSS_NCTF51

VSS_NCTF50

VSS_NCTF49

VSS_NCTF48

VSS_NCTF47

T15

P15

N15

R15

U15

M15

R22

P22

N22

M22

L22

W21

VCC_NCTF41

VCC_NCTF42

VCC_NCTF43

VCC_NCTF44

VCC_NCTF45

VCC_NCTF46

VSS_NCTF46

VSS_NCTF45

VSS_NCTF44

VSS_NCTF43

VSS_NCTF42

VSS_NCTF41

L16

V15

Y15

W15

AA15

AB15

M23

L23

W22

V22

U22

T22

VCC_NCTF35

VCC_NCTF36

VCC_NCTF37

VCC_NCTF38

VCC_NCTF39

VCC_NCTF40

VSS_NCTF40

VSS_NCTF39

VSS_NCTF38

VSS_NCTF37

VSS_NCTF36

VSS_NCTF35

T16

P16

N16

R16

U16

M16

V23

U23

T23

R23

P23

N23

VCC_NCTF29

VCC_NCTF30

VCC_NCTF31

VCC_NCTF32

VCC_NCTF33

VCC_NCTF34

VSS_NCTF34

VSS_NCTF33

VSS_NCTF32

VSS_NCTF31

VSS_NCTF30

VSS_NCTF29

V16

Y16

R17

W16

AA16

AB16

R24

P24

N24

M24

L24

W23

VCC_NCTF23

VCC_NCTF24

VCC_NCTF25

VCC_NCTF26

VCC_NCTF27

VCC_NCTF28

VSS_NCTF28

VSS_NCTF27

VSS_NCTF26

VSS_NCTF25

VSS_NCTF24

VSS_NCTF23

Y17

AA17

AB17

AA18

AB18

AA19

M25

L25

W24

V24

U24

T24

VCC_NCTF17

VCC_NCTF18

VCC_NCTF19

VCC_NCTF20

VCC_NCTF21

VCC_NCTF22

VSS_NCTF22

VSS_NCTF21

VSS_NCTF20

VSS_NCTF19

VSS_NCTF18

VSS_NCTF17

Y21

R21

AB19

AA20

AB20

AA21

V25

U25

T25

R25

P25

N25

VCC_NCTF13

VCC_NCTF14

VCC_NCTF15

VCC_NCTF16

VSS_NCTF16

VSS_NCTF15

VSS_NCTF14

VSS_NCTF13

Y22

AB21

AA22

AB22

N26

M26

L26

W25

VCC_NCTF7

VCC_NCTF8

VCC_NCTF9

VCC_NCTF10

VCC_NCTF11

VCC_NCTF12

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

Y23

Y24

AA23

AB23

AA24

AB24

VCC_NCTF6

VSS_NCTF6

W26

V26

U26

T26

R26

P26

VCC_NCTF0

VCC_NCTF1

VCC_NCTF2

VCC_NCTF3

VCC_NCTF4

VCC_NCTF5

VSS_NCTF5

VSS_NCTF4

VSS_NCTF3

VSS_NCTF2

VSS_NCTF1

VSS_NCTF0

Y25

Y26

AA25

AB25

AA26

AB26

1 1

A

B

C

D

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet of

GMCH (5 of 5)

GMCH (5 of 5)

GMCH (5 of 5)

CANARY2

CANARY2

CANARY2

E

10 55Thursday, January 13, 2005

10 55Thursday, January 13, 2005

10 55Thursday, January 13, 2005

SA

SA

SA

A

DM2

DM2

MH1

M_B_A[13..0]8,12

4 4

M_B_BS#28,12

M_B_BS#08,12
M_B_BS#18,12

M_B_DQ[63..0]8

3 3

2 2

M_CS#27,12
M_CS#37,12
M_CKE27,12

M_CKE37,12
M_B_RAS#8,12
M_B_CAS#8,12

M_B_WE#8,12

SMBC_ICH3,18

1 1

SMBD_ICH3,18

DDR_VREF

C725

C725
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

M_ODT37,12

12

12

BC10

BC10
SCD1U16V

SCD1U16V

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

MH1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16_BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

79

CKE0

80

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

1

VREF

201

GND

SKT-SODIMM20020U

SKT-SODIMM20020U

MH2

MH2

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

30

CK0

32

CK0#

164

CK1

166

CK1#

198

SA0

200

SA1

199

VDD_SPD

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

2

VSS

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

REVERSE TYPE

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

202

GND

BTN SIDE

A

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

BC6

BC6
SCD1U16V

SCD1U16V

B

M_B_DQS[7..0] 8

M_B_DQS#[7..0] 8

M_B_DM[7..0] 8

M_CLK_DDR3 7
M_CLK_DDR#3 7

12

1D8V_S3

M_CLK_DDR4 7
M_CLK_DDR#4 7

3D3V_S0

12

C359

C359
Do Not Stuff

Do Not Stuff

DY

DY

12

R267

R267
10KR2

10KR2

3D3V_S0

R264

R264

1 2

10KR2

10KR2

Place near DM2

M_CLK_DDR4

12

C728 Do Not Stuff

C728 Do Not Stuff

DY

DY

M_CLK_DDR#4
M_CLK_DDR3

12

C729 Do Not Stuff

C729 Do Not Stuff

DY

DY

M_CLK_DDR#3

B

C

M_A_A[13..0]8,12

M_A_BS#28,12
M_A_BS#08,12

M_A_BS#18,12

M_A_DQ[63..0]8

M_A_DQS[7..0]8

M_A_DQS#[7..0]8

DDR_VREF

C738

C738
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

C

D

DM1

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_ODT07,12
M_ODT17,12M_ODT27,12

DDR_VREF

12

12

BC11

BC11
SCD1U16V

SCD1U16V

102
101
100

99
98
97
94
92
93
91

105

90
89

116

86
84
85

107
106

5

7
17
19

4

6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76

123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

11
29
49
68

129
146
167
186

13
31
51
70

131
148
169
188

114
119

1

2

202

DM1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

ODT0
ODT1

VREF
VSS

GND

DDR2-200P-1

DDR2-200P-1

TOP SIDE

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1
DM0

DM1
DM2
DM3
DM4
DM5
DM6
DM7

SDA

VDDSPD

NC#50
NC#69
NC#83

NC#120

NC#163/TEST

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NORMAL TYPE

GND

D

SCL

SA0
SA1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

M_A_DM0

10

M_A_DM1

26

M_A_DM2

52

M_A_DM3

67

M_A_DM4

130

M_A_DM5

147

M_A_DM6

170

M_A_DM7

185

SMBD_ICH

195

SMBC_ICH

197
199
198

200

12

50
69
83
120
163

81
82
87
88
95
96
103
104
111
112
117
118

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

201

R277

R277
10KR2

10KR2

1D8V_S3

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

M_A_RAS# 8,12
M_A_WE# 8,12
M_A_CAS# 8,12

M_CS#0 7,12
M_CS#1 7,12

M_CKE0 7,12
M_CKE1 7,12

M_CLK_DDR0 7
M_CLK_DDR#0 7

M_CLK_DDR1 7
M_CLK_DDR#1 7

M_A_DM[7..0] 8

BC5

BC5
SCD1U16V

SCD1U16V

12

R278

R278
10KR2

10KR2

Place near DM1

C361 Do Not Stuff

C361 Do Not Stuff

DY

DY

C360 Do Not Stuff

C360 Do Not Stuff

DY

DY

DDR Socket

DDR Socket

DDR Socket

12

12

E

3D3V_S0

12

12

C338

C338
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

M_CLK_DDR0

M_CLK_DDR#0
M_CLK_DDR1

M_CLK_DDR#1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2 SA

CANARY2 SA

CANARY2 SA

11 55Thursday, January 13, 2005

11 55Thursday, January 13, 2005

11 55Thursday, January 13, 2005

of

of

E

of

A

B

C

D

PARALLEL TERMINATION Decoupling Capacitor

E

Put decap near power(0.9V) and pull-up resistor

DDR_VREF

4 4

3 3

2 2

1 1

DDR_VREF

R738 56R2JR738 56R2J
R725 56R2JR725 56R2J
R728 56R2JR728 56R2J
R737 56R2JR737 56R2J
R235 56R2JR235 56R2J
R726 56R2JR726 56R2J

R236 56R2JR236 56R2J
R732 56R2JR732 56R2J
R734 56R2JR734 56R2J
R735 56R2JR735 56R2J
R736 56R2JR736 56R2J
R730 56R2JR730 56R2J

8
7
6

8
7
6

8
7
6

R733 56R2JR733 56R2J

1 2

R731 56R2JR731 56R2J

1 2

R729 56R2JR729 56R2J

1 2

R727 56R2JR727 56R2J

1 2

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

A

1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2

RN22

RN22

SRN56-1

SRN56-1

RN23

RN23

SRN56-1

SRN56-1

RN21

RN21

SRN56-1

SRN56-1

RN8

RN8

SRN56-1

SRN56-1

RN9

RN9

SRN56-1

SRN56-1

RN5

RN5

SRN56-1

SRN56-1

RN7

RN7

SRN56-1

SRN56-1

RN10

RN10

SRN56-1

SRN56-1

RN6

RN6

SRN56-1

SRN56-1

1
2
3
45

1
2
3
45

1
2
3
45

M_B_A5
M_B_A1

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

M_B_A3
M_B_A8
M_B_A9
M_B_A12
M_B_A10

M_B_A13

M_B_A4
M_B_A2
M_B_A0

M_B_A11
M_B_A7
M_B_A6

M_A_A13

M_A_A4
M_A_A2
M_A_A0

M_A_A8
M_A_A9
M_A_A12

M_A_A11
M_A_A7
M_A_A6

M_A_A10
M_A_A1
M_A_A3
M_A_A5

M_CKE2 7,11
M_ODT3 7,11

M_B_WE# 8,11

M_B_BS#2 8,11

M_ODT1 7,11
M_CS#3 7,11

M_CKE0 7,11

M_B_RAS# 8,11

M_CS#2 7,11
M_ODT2 7,11

M_B_BS#1 8,11

M_CKE3 7,11

M_B_BS#0 8,11

M_B_CAS# 8,11

M_A_RAS# 8,11

M_CS#0 7,11
M_ODT0 7,11

M_A_BS#1 8,11

M_CS#1 7,11

M_A_CAS# 8,11

M_A_WE# 8,11

M_A_BS#0 8,11

M_A_BS#2 8,11

M_CKE1 7,11

B

M_A_A[13..0] 8,11
M_B_A[13..0] 8,11

1D8V_S3

1D8V_S3

12

C748

C748
SCD1U16V

SCD1U16V

12

C771

C771
SCD1U16V

SCD1U16V

DY

DY

Put decap near power(0.9V)
and pull-up resistor

DY

DY

12

12

DY

DY

DY

DY

12

C746

C746
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C322

C322

Do Not Stuff

Do Not Stuff

12

C775

C775

Do Not Stuff

Do Not Stuff

12

C773

C773

Do Not Stuff

Do Not Stuff

12

C368

C368
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C319

C319

DY

DY

Do Not Stuff

Do Not Stuff

12

C327

C327

DY

DY

Do Not Stuff

Do Not Stuff

C

C774

C774
SCD1U16V

SCD1U16V

C769

C769
SCD1U16V

SCD1U16V

Place these Caps near DM1

12

C320

C320

Do Not Stuff

Do Not Stuff

Place these Caps near DM2

12

C745

C745
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

DY

DY

C325

C325

Do Not Stuff

Do Not Stuff

12

C772

C772
SCD1U16V

SCD1U16V

12

C727

C727
SCD1U16V

SCD1U16V

12

C371

C371
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C326

C326

DY

DY

Do Not Stuff

Do Not Stuff

12

C726

C726

DY

DY

Do Not Stuff

Do Not Stuff

12

C386

C386
SCD1U16V

SCD1U16V

12

C724

C724
SCD1U16V

SCD1U16V

12

12

C321

C321

DY

DY

Do Not Stuff

Do Not Stuff

12

C370

C370
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

DY

DY

C385

C385
SCD1U16V

SCD1U16V

C720

C720
SCD1U16V

SCD1U16V

12

12

12

C740

C740
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

12

C369

C369
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

C384

C384

Do Not Stuff

Do Not Stuff

C719

C719
SCD1U16V

SCD1U16V

12

12

C383

C383
SCD1U16V

SCD1U16V

12

C718

C718

DY

DY

Do Not Stuff

Do Not Stuff

C372

C372
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

D

DY

DY

DY

C744

C744
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

DY

DY

12

C381

C381

Do Not Stuff

Do Not Stuff

12

C717

C717
SCD1U16V

SCD1U16V

12

C388

C388
SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet of

Date: Sheet of

DY

DY

12

C380

C380

Do Not Stuff

Do Not Stuff

12

C766

C766
SCD1U16V

SCD1U16V

DDR2 Termination Resistor

DDR2 Termination Resistor

DDR2 Termination Resistor

12

C755

C755

Do Not Stuff

Do Not Stuff

12

C767

C767
SCD1U16V

SCD1U16V

DY

12

12

12

C382

C382

C756

C756

SCD1U16V

SCD1U16V

Do Not Stuff

Do Not Stuff

12

C770

C770

C768

C768

SCD1U16V

SCD1U16V

SCD1U16V

SCD1U16V

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2

CANARY2

CANARY2

E

SA

SA

of

12 55Thursday, January 13, 2005

12 55Thursday, January 13, 2005

12 55Thursday, January 13, 2005

SA

Q54

Q54

OUT

OUT

STBY_LED#

3

R1

R1

STDBY_LED30

NUM_LED30

CAP_LED30

PWR_LED30

CHARGE_LED30

802.11_ACT29

R127

R127
100KR2

100KR2

WL_LED30

BT_LED30

2

IN

IN

2

IN

IN

2

IN

IN

2

IN

IN

2

IN

IN

2

IN

IN

12

12/27

1/3

2

IN

IN

1/3

2

IN

IN

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q55

Q55

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q52

Q52

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q51

Q51

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q53

Q53

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q13

Q13

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1

Q12

Q12

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1
Q50

Q50

R1

R1

R2

R2

DTC114EUA-U1

DTC114EUA-U1

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

OUT

OUT

3

GND

GND

1

NUM#

CAPS#

PWR_LED#

CHARGE_LED#

WLANONLED#

BT_LED#

INVERTER INTERFACE

3D3V_S0

C577 SCD1U16VC577 SCD1U16V

1 2
32
2

4
6
8
10
12
14
16
18
20
22
24
26
28
30

34

15 MILS

12

C128

C128
SC680P50V2KX

SC680P50V2KX

ENTER_TAB 32
ALT_ESC_TAB 32

EC_BL_ON
IDE_LED#
NUM#

STBY_LED#
BRIGHTNESS

C126

C126

SC1000P50V

SC1000P50V

PAGE_UP_TAB32
PAGE_DN_TAB32
TAKE_NOTE_TAB32

SMBC_KBC19,30,34
SMBD_KBC19,30,34

3D3V_S0

5V_S5

INV1

INV1
AMP-CONN30A-1

AMP-CONN30A-1

C576 SCD1U16VC576 SCD1U16V

1 2

R587

R587

0R2-0

0R2-0

3D3V_S0

MIC_GND

12

C589

C589
SCD1U16V

SCD1U16V

C583

C583
SC1000P50V

SC1000P50V

1 2

CHARGE_LED#

CAPS#
BT_LED# WLANONLED#
PWR_LED#

12

C130

C130
SCD1U16V

SCD1U16V

35

31

1
3
5
7

9
11
13
15
17
19
21
23
25
27
29

33

36

INT_MIC 28

LCD_DCBAT

SCD1U16V

SCD1U16V

C124

C124

12

C588

C588
SC10U35V0ZY-U

SC10U35V0ZY-U

EC_BL_ON 30

12

3D3V_S3

C123

C123
SC1000P50V

SC1000P50V

SC1000P50V

SC1000P50V

C127

C127

5V_S0

12

C129

C129
SCD1U16V

SCD1U16V

Layout 40 mil

LCD_DCBAT DCBATOUT

R606

R606

C137

C137
SCD1U50V3KX

SCD1U50V3KX

IDE_LED#20

BRIGHTNESS30

0R5J-1

0R5J-1

CAPS#
NUM#

BT_LED#

CHARGE_LED#
STBY_LED#
PWR_LED#

12

C567

C567
SC1000P50V

SC1000P50V

C566

C566

SC100P50V2JN

SC100P50V2JN

C579

C579
SC1000P50V

SC1000P50V

C578

C578

SC100P50V2JN

SC100P50V2JN

C125

C125
SC1000P50V

SC1000P50V

C568

C568

SC100P50V2JN

SC100P50V2JN

12

C560

C560
SCD1U16V

SCD1U16V

12

C122

C122
SCD1U16V

SCD1U16V

GMCH_LCDVDD_ON7

NV_LCDVDD_ON50

LVDS_9
LVDS_10
LVDS_11
LVDS_12

LVDS_14
LVDS_13
LVDS_16
LVDS_15

LCDVDD_ON

R596 Do Not StuffUMAR596 Do Not StuffUMA
R597 Do Not StuffUMAR597 Do Not StuffUMA
R594 Do Not StuffUMAR594 Do Not StuffUMA
R595 Do Not StuffUMAR595 Do Not StuffUMA

R593 Do Not StuffUMAR593 Do Not StuffUMA
R592 Do Not StuffUMAR592 Do Not StuffUMA
R599 Do Not StuffUMAR599 Do Not StuffUMA
R598 Do Not StuffUMAR598 Do Not StuffUMA

Place them as close
to LCD as possible

R615 1KR2R615 1KR2

1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2

1 2

UMA

UMA

R613

R613
Do Not Stuff

Do Not Stuff

1 2

1 2

0R2-0

0R2-0
R616

R616

NV44

NV44

Layout 40 mil

LCDVDD

12

LCDVDD_ON

GMCH_TXACLK+ 7

GMCH_TXACLK- 7

GMCH_TXAOUT2+ 7

GMCH_TXAOUT2- 7

GMCH_TXAOUT1- 7

GMCH_TXAOUT1+ 7

GMCH_TXAOUT0- 7

GMCH_TXAOUT0+ 7

LCDVDD_ON_1

C615

C615
SC1U10V3KX

SC1U10V3KX

12

LVDS_9
LVDS_10
LVDS_11
LVDS_12

LVDS_14
LVDS_13
LVDS_16
LVDS_15

U67

U67

1

OUT

2

GND
ON/OFF#3IN

C620

C620
SCD1U

SCD1U

6

IN

5

GND

4

AAT4280IGU-3-T1

AAT4280IGU-3-T1

R122 0R2-0 NV44R122 0R2-0 NV44

1 2

R123 0R2-0 NV44R123 0R2-0 NV44

1 2

R120 0R2-0 NV44R120 0R2-0 NV44

1 2

R121 0R2-0 NV44R121 0R2-0 NV44

1 2

R119 0R2-0 NV44R119 0R2-0 NV44

1 2

R118 0R2-0 NV44R118 0R2-0 NV44

1 2

R125 0R2-0 NV44R125 0R2-0 NV44

1 2

R124 0R2-0 NV44R124 0R2-0 NV44

1 2

Place them as close
to LCD as possible

3D3V_S0

12

C602

C602
SC1U10V3KX

SC1U10V3KX

NV_TXACLK+ 50

NV_TXACLK- 50

NV_TXAOUT2+ 50

NV_TXAOUT2- 50

NV_TXAOUT1- 50

NV_TXAOUT1+ 50

NV_TXAOUT0- 50

NV_TXAOUT0+ 50

LCD1

LCD1

33

35

36

34

IPEX-CON30-U

IPEX-CON30-U

LCD CONN

LCDVDD

C611

31
MH1

1
2

3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
MH2

32

LVDS_16
LVDS_15
LVDS_10
LVDS_9

LVDS_12

LVDS_11
LVDS_14
LVDS_13

C611
SC10U6D3V5MX

SC10U6D3V5MX

PCIRST1#_2

D_TX 31
D_RX 31
D_DTR# 31
D_RTS# 31
D_CTS# 31

12

12

12

C605

C605

C606

C606

SCD1U16V

SCD1U16V

PANEL_ID1 31
PANEL_ID2 31

R611 0R2-0R611 0R2-0

12

PCIRST1#_DIG_T

12

1 2

R117

R117
DUMMY-R2

DUMMY-R2

C619

C619
DUMMY-C2

DUMMY-C2

SCD1U16V

SCD1U16V

3D3V_S0

12

PCIRST1# 16,22,24,25,29,53

C601

C601
SCD1U16V

SCD1U16V

D_TX
D_RTS#
D_CTS#
D_DTR#
D_RX

12

12

C134

C134

SC680P50V2KX

SC680P50V2KX

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

LCD/Inverter Connector

LCD/Inverter Connector

LCD/Inverter Connector

CANARY2

CANARY2

CANARY2

12

C133

C133

C131

C131

SC680P50V2KX

SC680P50V2KX

SC680P50V2KX

SC680P50V2KX

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

12

C132

C132

SC680P50V2KX

SC680P50V2KX

13 55Thursday, January 13, 2005

13 55Thursday, January 13, 2005

13 55Thursday, January 13, 2005

12

C135

C135

SC680P50V2KX

SC680P50V2KX

of

of

of

SA

SA

SA

CRT_R_SYS34

CRT_G_SYS34

CRT_B_SYS34

Hsync & Vsync level shift

NV_HSYNC49
GMCH_HSYNC7

NV_VSYNC49
GMCH_VSYNC7

CRT I/F &TV CONNECTOR

CRT_R_SYS

CRT_G_SYS

CRT_B_SYS

12

12

R11

R11

R19

R19

150R2F

150R2F

150R2F

150R2F

NV44

NV44

R4 0R2-0

R4 0R2-0

1 2

R9 Do Not Stuff

R9 Do Not Stuff

1 2

UMA

UMA
NV44

NV44

R16 0R2-0

R16 0R2-0

1 2

R14

R14

1 2

Do Not Stuff

Do Not Stuff

UMA

UMA

50 Ohm Impedance 75 Ohm Impedance

Ferrite bead impedance: 75ohm@100MHz

12

12

12

C13

C13

C21

R20

R20

150R2F

150R2F

SC3P50V2CN

SC3P50V2CN

C21

SC3P50V2CN

SC3P50V2CN

CRT_HSYNC

14

5 6

7

4

12

C22

C22

SC3P50V2CN

SC3P50V2CN

5V_S0

14

2 3

U52B

U52B

7

TSAHCT125

TSAHCT125

L4

L4

1 2

BLM11B750S

BLM11B750S
L5

L5

1 2

BLM11B750S

BLM11B750S
L6

L6

1 2

BLM11B750S

BLM11B750S

12

C504

C504
SCD1U16V

SCD1U16V

1

U52A

U52A

TSAHCT125

TSAHCT125

12

R12 39R2JR12 39R2J

R13 39R2JR13 39R2J

R461 39R2JR461 39R2J

R452 39R2JR452 39R2J

C494

C494
SC3P50V2CN

SC3P50V2CN

1 2

1 2

1 2

1 2

12

CRT_HSYNC1

CRT_R

CRT_VSYNC1CRT_VSYNC

VSYNC_5

HSYNC_5

5V_S0 5V_CRT_S0

D22

D22

SDMK0340L-7

CRT_R
DAT_DDC1_5

CRT_G
JVGA_HS

CRT_B

JVGA_VS

CLK_DDC1_5

SDMK0340L-7

CRT_R

CRT_G

CRT_B CRT_IN#

12

C496

C496
SC3P50V2CN

SC3P50V2CN

JVGA_HS

C498

C498
SC3P50V2CN

SC3P50V2CN

12

R458

R458
10KR2

10KR2

C493

C493
SC100P50V2JN

SC100P50V2JN

2 1

12

R8
2K2R2R82K2R2

C501

C501
SC100P50V2JN

SC100P50V2JN

For System CRT

JVGA_VS

5V_S0

U1

U1

5 4
6
7
8

PACDN009

PACDN009

VSYNC_5 34

For Dock CRT

HSYNC_5 34

CRT_G

3
2

CRT_B

1

12

R459

R459
2K2R2

2K2R2

C495

C495
SC100P50V2JN

SC100P50V2JN

TV_CRMA_SYS34

TV_LUMA_SYS34

TV_COMP_SYS34

C497

C497
SC100P50V2JN

SC100P50V2JN

150 Ohm close to
connector

C500

C500
SC100P50V2JN

SC100P50V2JN

12

R5
150R2FR5150R2F

12

R6
150R2FR6150R2F

12

C499

C499
SCD01U16V2KX

SCD01U16V2KX

16

11

12

13

14
10

15

17

VIDEO-15-34

VIDEO-15-34

R7
150R2FR7150R2F

6
1

7
2

8
3

9
4

5

5V @ ext. CRT side

CRT1

CRT1

12

C6
SC150PC6SC150P

12

C10

C10
SC150P

SC150P

12

C12

C12
SC150P

SC150P

6 MHz Low-Pass filter
close to CONN

GMCH_DDCDATA7

NV_DDCDATA49

NV_DDCCLK49

GMCH_DDCCLK7

C5

1 2

SC33PC5SC33P

L1

L1

1 2

IND-1D2UH

IND-1D2UH

C9

1 2

SC33PC9SC33P

L2

L2

1 2

IND-1D2UH

IND-1D2UH

C11

C11

1 2

SC33P

SC33P

L3

L3

1 2

IND-1D2UH

IND-1D2UH

12/29

DDC_CLK & DATA level shift

2D5V_S0 3D3V_S0

12

12

R499

R499
Do Not Stuff

1 2
1 2

1 2
1 2

CRMA_1

LUMA_1

COMP_1

Do Not Stuff

For GMCH

UMA

UMA

NV44

NV44

UMA

UMA

For GMCH

UMA

UMA

12

For NV

TVCONN_12

Do Not Stuff

Do Not Stuff

R448

R448
0R2-0

0R2-0

1 2

R484

R484
2K2R2

2K2R2

C492

C492

For GMCH For NV

R465 Do Not Stuff

R465 Do Not Stuff
R466 0R2-0

R466 0R2-0

R468 0R2-0NV44R468 0R2-0NV44
R467 Do Not Stuff

R467 Do Not Stuff

C2

C2
SC270P50V2JN

SC270P50V2JN

12

C7

C7
SC270P50V2JN

SC270P50V2JN

12

C4

C4
SC270P50V2JN

SC270P50V2JN

DY

DY

R482

R482
0R2-0

0R2-0

NV44

NV44

R485

R485
2K2R2

2K2R2

12

G

G

1

2 3

S

S

Q2

Q2
2N7002

2N7002

12

CLK_DDC1_534
DAT_DDC1_534

R483

R483
2K2R2

2K2R2

G

G

1

2 3

S

S

Q1

Q1
2N7002

2N7002

D

D

DAT_DDC1_5

CLK_DDC1_5

D

D

9
6

3
7
2
5
1
4

8

TV1

TV1

MINDIN7-9

MINDIN7-9

ESD Protection DiodeESD Protection Diode

3D3V_S0

D24

D24
BAV99LT1

BAV99LT1

LUMA_1

3

D25

D25
BAV99LT1

BAV99LT1

CRMA_1

3

D23

D23

COMP_1

3

12/29

BAV99LT1

BAV99LT1

CLK_DDC1_5
DAT_DDC1_5

2

1

2

1

2

1

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CRT Connector

CRT Connector

CRT Connector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CANARY2

CANARY2

CANARY2

of

of

of

14 55Thursday, January 13, 2005

14 55Thursday, January 13, 2005

14 55Thursday, January 13, 2005

SA

SA

SA

A

B

C

D

E

DY

DY

H_DPSLP#

1 2

1D05V_S0

1D05V_S0

R809

R809
10KR2

10KR2

12

1D05V_S0

12

12

R273

R273
56R2J

56R2J

R300

R300
Do Not Stuff

Do Not Stuff

R710

R710
75R2F

75R2F

NO_STUFF

3D3V_S0

H_FERR# 4

PM_THRMTRIP-I# 4,38

XTAL-32D768K-4P

C403

C403

1 2

SC2P50V

SC2P50V

3D3V_AUX_S5

4 4

D37

D37

21

CH751H-40-U

CH751H-40-U

RTC circuitry

D36

D36

BAT_D

12

R306

R306
1KR2

1KR2

BAT

123

5

RTC1

RTC1
SCON3

3 3

2 2

SCON3

RTC_SENSE#

BAT

21

CH751H-40-U

CH751H-40-U

R293

1 2

RTC_AUX_S5

12

12

R293

1 2

0R2-0

0R2-0

R763

R763
Do Not Stuff

Do Not Stuff

R770

R770
0R2-0

0R2-0

RTC_SENSE#_1

4

C377 SC1000P50VC377 SC1000P50V

C400 SCD01U16V2KXC400 SCD01U16V2KX

DY

DY

RTC_AUX_S5

12

C399

C399
SC1U10V3ZY

SC1U10V3ZY

R303 20KR2FR303 20KR2F

1 2

R759 1MR2R759 1MR2

1 2

P.H. for internal VCCSUS1_5

INTVRMEN

C398

C398

SCD1U16V

SCD1U16V

RTC_SENSE# 30

C407

C407

1 2

SC2P50V

SC2P50V

12

RCT_RST#16
INTRUDER#19

ACZ_BITCLK27
ACZ_SYNC21,27

ACZ_RST#21,27

ACZ_SDATAOUT21,27

TP84 TPAD28TP84 TPAD28

TP36 TPAD28TP36 TPAD28
TP37 TPAD28TP37 TPAD28

TP33 TPAD28TP33 TPAD28
TP32 TPAD28TP32 TPAD28

XTAL-32D768K-4P

X4

X4

41

2 3

R855 0R3-UR855 0R3-U

1 2

R385 39R2JR385 39R2J

1 2

R384 39R2JR384 39R2J

1 2

ACZ_SDATAIN027
ACZ_SDATAIN121

IDE_PDIORDY20
INT_IRQ1420
IDE_PDDACK#20
IDE_PDIOW#20
IDE_PDIOR#20

TP51 TPAD28TP51 TPAD28

R852 39R2JR852 39R2J

1 2

12

R330

R330

10MR3

10MR3

RCT_X1

RCT_X2
RCT_RST#
INTRUDER#

INTVRMEN

R383

R383

1 2

10KR2

10KR2

ACZ_SYNC_R
ACZ_RST#_R

ACZ_SDATAOUT_R

SATA_LED#

SATA_TXN0_C
SATA_TXP0_C

SATA_TXN1_C
SATA_TXP1_C

AA2
AA3

AA5

D12
B12
D11
F13

F12
B11
E12

E11
C13

C12
C11
E13

C10

A10
F11

F10
B10

AC19

AE3
AD3
AG2

AF2
AD7

AC7

AF6
AG6

AC2
AC1

AG11

AF11

AF16
AB16
AB15
AC14
AE16

Y1
Y2

B9

C9

RTCX1
RTCX2

RTCRST#
INTRUDER#

INTVRMEN

EE_CS
EE_SHCLK
EE_DOUT
EE_DIN

LAN_CLK
LAN_RSTSYNC
LANRXD[0]

LANRXD[1]
LANRXD[2]

LANTXD[0]
LANTXD[1]
LANTXD[2]

ACZ_BIT_CLK
ACZ_SYNC

ACZ_RST#
ACZ_SDIN[0]

ACZ_SDIN[1]
ACZ_SDIN[2]

ACZ_SDO

SATALED#
SATA[0]RXN

SATA[0]RXP
SATA[0]TXN
SATA[0]TXP

SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#
SATARBIAS

IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#

U34A

U34A

LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]

LPC

LPC

RTCLAN

RTCLAN

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

CPUSLP#
DPRSLP#

DPSLP#

CPU

CPU

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

STPCLK#

THRMTRIP#

SATA AC-97/AZALIA

SATA AC-97/AZALIA

IDE

IDE

DDREQ

ICH6-M

ICH6-M

A20M#

FERR#

INIT#
INTR

RCIN#

NMI

SMI#

DA[0]
DA[1]
DA[2]

DCS1#
DCS3#

DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]

DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]

P2
N3
N5
N4

N6
P4

P3

AF22
AF23

AE27
AE24

AD27
AF24
AG25
AG26

AE22
AF27
AG24

AD23
AF25

AG27
AE26
AE23

AC16
AB17
AC17

AD16
AE17

AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13

AB14

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

LPC_LDRQ1

H_CPUSLP#1
H_DPRSLP#1

H_FERR_R

H_THERMTRIP_R

LPC_LAD[0:3] 30,31,33

LPC_LDRQ#0 31

TP91 TPAD28TP91 TPAD28

LPC_LFRAME# 30,31,33

KA20GATE 30
H_A20M# 4

DY

DY

R292 Do Not Stuff

R292 Do Not Stuff

1 2

R717 0R2-0R717 0R2-0

1 2

H_DPSLP# 4

R280 56R2JR280 56R2J

1 2

H_PWRGD 4,38
H_IGNNE# 4

FWH_INIT# 33
H_INIT# 4
H_INTR 4

KBRCIN# 30
H_NMI 4

H_SMI# 4
H_STPCLK# 4

R718

R718

1 2

56R2J

56R2J

IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20

IDE_PDCS1# 20
IDE_PDCS3# 20

IDE_PDD0 20
IDE_PDD1 20
IDE_PDD2 20
IDE_PDD3 20
IDE_PDD4 20
IDE_PDD5 20
IDE_PDD6 20
IDE_PDD7 20
IDE_PDD8 20
IDE_PDD9 20
IDE_PDD10 20
IDE_PDD11 20
IDE_PDD12 20
IDE_PDD13 20
IDE_PDD14 20
IDE_PDD15 20

IDE_PDDREQ 20

LPC_LDRQ1

Open R253 for Dothan A step
Shunt for Dothan B step
& all Yonah

H_CPUSLP# 4,6
H_DPRSLP# 4

Layout Note: R632 needs to placed
within 2" of ICH6, R634 must be placed
within 2" of R632 w/o stub.

1 1

A

B

C

D

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

Date: Sheet of

ICH6-M (1 of 4)

ICH6-M (1 of 4)

ICH6-M (1 of 4)

CANARY2 SA

CANARY2 SA

CANARY2 SA

15 55Thursday, January 13, 2005

15 55Thursday, January 13, 2005

15 55Thursday, January 13, 2005

E

of

A

U34B

PCI_AD[31..0]

,24,29

4 4

PCI_FRAME#

,24,29

INT_PIRQB#24

3 3

TP83 TPAD28TP83 TPAD28
TP81 TPAD28TP81 TPAD28
TP35 TPAD28TP35 TPAD28
TP34 TPAD28TP34 TPAD28
TP82 TPAD28TP82 TPAD28

PCI_IRDY#
PCI_TRDY#
INT_PIRQD#
PCI_FRAME#

3D3V_S0

PCI_DEVSEL#
PCI_LOCK#
PCI_PERR#
PCI_SERR#

3D3V_S0

2 2

PCI_REQ#0
INT_PIRQB#
INT_PIRQA#
INT_PIRQC#

3D3V_S0

4K7R2

4K7R2

T=22ms

R333

R333
100KR2

100KR2

1 1

3D3V_S5

R334

R334

1
2
3
4
5 6

1
2
3
4
5 6

1
2
3
4
5 6

1 2

12

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

RP7

RP7

SRP10K

SRP10K
RP6

RP6

SRP10K

SRP10K
RP4

RP4

SRP10K

SRP10K

3

1

2

12

C411

C411
SC4D7U10V5ZY

SC4D7U10V5ZY

78.47593.411

78.47593.411

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

D12

D12
BAT54-1

BAT54-1

3
2

A

10

INT_PIRQG#

9

INT_PIRQF#

8

INT_PIRQE#

7

PCI_STOP#

10

PCI_REQ#3

9

INT_PIRQH#

8

PM_CLKRUN#

7

PCI_REQ#2

10
9
8
7

Q22

Q22

R1

R1

R2

R2

Do Not Stuff

Do Not Stuff

DY

DY

E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4

J5
K2
K5
D4
L6

G3

H4
H2
H5
B3

M6

B2
K6
K3
A5
L1
K4

J3

N2
L2

M1

L3

AC5
AD5

AF4
AG4
AC9

INT_SERIRQ
THRM#
MCH_SYNC#
PCI_REQ#5

1

U34B

AD[0]

PCI

PCI

AD[1]
AD[2]
AD[3]
AD[4]
AD[5]
AD[6]
AD[7]
AD[8]
AD[9]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]

FRAME#

Interrupt I/F

Interrupt I/F

PIRQ[A]#
PIRQ[B]#
PIRQ[C]#
PIRQ[D]#

RESERVED

RESERVED

RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]

ICH6 Pullups

3D3V_S0

3D3V_S0

3D3V_S0

RSMRST#_TO_KBC 30

REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

PLTRST#

PCICLK

PME#

PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#/GPI[4]
PIRQ[H]#/GPI[5]

RSVD[6]
RSVD[7]
RSVD[8]

TP[3]

ICH6-M

ICH6-M

PM_RI# PCI_REQ#6
SMB_ALERT#
SMB_LINK_ALERT#
SMLINK0
SMLINK1
ICH6_WAKE#
PM_BATLOW#_R
DBRESET#

ECSMI#
ECSWI#
PSW_CLR#

PM_SLP_S3#_ICH

PM_DPRSLPVR_R

KBC_BB_ENABLE#30
RCT_RST#15

HW_SHUT 19

PCI_REQ#0

L5

PCI_GNT#0

C1

PCI_REQ#1

B5
B6

PCI_REQ#2

M5
F1

PCI_REQ#3

B8
C8

PCI_REQ#4

F7
E7

PCI_REQ#5

E8

PCI_GNT#5

F6

PCI_REQ#6

B7

PCI_GNT#6

D8
J6

H6
G4
G2

A3
E1

R348 0R2-0R348 0R2-0

R2
C3
E3

PCI_LOCK#

C5
G5
J1
J2

PLT_RST1#_1

R5
G6
P6

D9
C7
C6
M3

AD9
AF8
AG8
U3

R345 10KR2R345 10KR2
R778 10KR2R778 10KR2
R773 10KR2R773 10KR2
R783 10KR2R783 10KR2
R715 10KR2R715 10KR2
R714 1KR2R714 1KR2
R341 8K2R2R341 8K2R2
R343 10KR2R343 10KR2

R349 100KR2R349 100KR2
R716 100KR2R716 100KR2
R798 10KR2R798 10KR2

1 2

DY

DY

1 2

B

TP115

TP115
TP112

TP112

1 2

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

R795

R795

0R2-0

0R2-0

R720

R720
Do Not Stuff

Do Not Stuff

PSW_CLR#

Boot block
(GPI40)
RTC_RST#

Password clear
(GPIO28)

B

PCI_REQ#0 24
PCI_GNT#0 24
PCI_REQ#1 29
PCI_GNT#1 29
PCI_REQ#2 22
PCI_GNT#2 22

TPAD28

TPAD28
TPAD28

TPAD28

PCI_C/BE#0 22,24,29
PCI_C/BE#1 22,24,29
PCI_C/BE#2 22,24,29
PCI_C/BE#3 22,24,29

PCI_IRDY# 22,24,29
PCI_PAR 22,24,29

PCI_DEVSEL# 22,24,29
PCI_PERR# 22,24,29

PCI_SERR# 22,24,29
PCI_STOP# 22,24,29
PCI_TRDY# 22,24,29

R806

R806

0R2-0

1 2

DY

DY

0R2-0

CLK_ICHPCI 3

ICH_PME# 22,30

INT_PIRQE# 22,29
INT_PIRQF# 24
INT_PIRQG# 24

TP80TPAD28 TP80TPAD28
TP31TPAD28 TP31TPAD28
TP30TPAD28 TP30TPAD28
TP88TPAD28 TP88TPAD28

3D3V_S5

PCI_REQ#1
PCI_REQ#4
ECSCI#

R787

R787
Do Not Stuff

Do Not Stuff

1 2

SW2

SW2

1
2
3
4

SW-DIP-4-2-U2

SW-DIP-4-2-U2

Low Active
1 - 5 ON

3 - 7 ON

4 - 8 ON

Int. PH

R386 10KR2R386 10KR2
R387 10KR2R387 10KR2
R814 10KR2R814 10KR2
R721 100KR2R721 100KR2

PM_SLP_S3# 18,30,36,40,42

ON

5
6
7
8

PCIRST1# 13,22,24,25,29,53

PLT_RST1# 7,18,30,31,33,34,46

PM_CLKRUN#22,29,30,31

3D3V_S0

1 2
1 2
1 2
1 2

PM_DPRSLPVR39

PM_PWRBTN#30

C

3D3V_S0

Need Check

R283 10KR2R283 10KR2

1 2

R722 10KR2R722 10KR2

1 2

R282 10KR2R282 10KR2

1 2

R281 10KR2R281 10KR2

1 2

SMB_CLK18
SMB_DATA18

ACZ_SPKR27
PM_SUS_STAT#30,31

PM_BMBUSY#7
ECSCI#30

ECSMI#30

TP102 TPAD28TP102 TPAD28

ECSWI#30
PM_STPPCI#3

TP85 TPAD28TP85 TPAD28

PM_STPCPU#3,39

TP79 TPAD28TP79 TPAD28
TP78 TPAD28TP78 TPAD28

TP87 TPAD28TP87 TPAD28
TP97 TPAD28TP97 TPAD28

TP90 TPAD28TP90 TPAD28

TP29 TPAD28TP29 TPAD28
TP86 TPAD28TP86 TPAD28

INT_SERIRQ24,29,30,31
THRM#19
VGATE_PWRGD7,38
CLK_ICH143
CLK48_ICH3
PM_SUS_CLK18
PM_SLP_S3#_ICH5,34,42

PM_SLP_S4#30,34,36,42

TP89 TPAD28TP89 TPAD28

PWROK19

R719 100R2R719 100R2

1 2

D39

D39

BAT54-1

BAT54-1

C

2
1

3

RSMRST#_KBC30

PM_RI#
SATA0_R0

SATA0_R1
SATA0_R2
SATA0_R3

SMB_LINK_ALERT#

SMLINK0
SMLINK1
MCH_SYNC#

DBRESET#

SMB_ALERT#
ICH_GPI12

ICH_GPO19

ICH_GPO21
ICH_GPO23

ICH_GPIO24
ICH_GPIO25

ICH_GPIO27
PSW_CLR#

ICH_GPIO33
ICH_GPIO34

ICH6_WAKE#

PM_SLP_S5#

PM_DPRSLPVR_R
PM_BATLOW#_R
PWRBTN#_ICH-1
LAN_RST#

12

R781

R781
100KR2

100KR2

T2

AF17

AE18

AF18

AG18

Y4

W5

Y5

W4

U6

AG21

F8

W3

U2
AD19
AE19

R1

W6
M2

R6
AC21
AB21
AD22
AD20

AD21

V3

P5

R3

T3

AF19
AF20

AC18

U5
AB20
AC20

AF21

E10
A27

V6

T4

T5

T6

AA1

AE20

V2

U1

V5

Y3

12

R776

R776
10KR2

10KR2

RI#
SATA[0]GP/GPI[26]

SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]

SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR

SUS_STAT#/LPCPD#
SYS_RESET#
BMBUSY#
GPI[7]

GPI[8]
SMBALERT#/GPI[11]
GPI[12]

GPI[13]
STP_PCI#
GPO[19]
STP_CPU#
GPO[21]

GPO[23]
GPIO[24]
GPIO[25]

GPIO[27]
GPIO[28]
CLKRUN#
GPIO[33]
GPIO[34]

WAKE#
SERIRQ
THRM#
VRMPWRGD
CLK14
CLK48
SUSCLK
SLP_S3#

SLP_S4#
SLP_S5#

PWROK
DPRSLPVR
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#

ICH6-M

ICH6-M

D

U34C

U34C

H25

PERn[1]

H24

PERp[1]

G27

PETn[1]

G26

PETp[1]

K25

PERn[2]

K24

PERp[2]

J27

PETn[2]

J26

PETp[2]

M25

PERn[3]

M24

PERp[3]

L27

PETn[3]
PETp[3]

PERn[4]
PERp[4]

PETn[4]
PETp[4]

DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP

DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP

DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP

DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP

DMI_CLKN
DMI_CLKP

OC[0]#
OC[1]#
OC[2]#
OC[3]#

USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P

USBRBIAS

L26
P24

P23
N27
N26

T25
T24
R27
R26

V25
V24
U27
U26

Y25
Y24
W27
W26

AB24
AB23
AA27
AA26

AD25
AC25

F24
F23

USB_OC#4

C23

USB_OC#5

D23

USB_OC#6

C25

USB_OC#7

C24

USB_OC#0

C27

USB_OC#1

B27

USB_OC#2

B26

USB_OC#3

C26
C21

D21

USBPN1

A20

USBPP1

B20
D19
C19

USBPN3

A18

USBPP3

B18
E17
D17

USBPN5

B16

USBPP5

A16

USBPN6

C15

USBPP6

D15

USBPN7

A14

USBPP7

B14
A22

B22

Place within 500 mils of ICH

GPIO

GPIO

PCI-EXPRESSDirect Media Interface

PCI-EXPRESSDirect Media Interface

DMI_ZCOMP

DMI_IRCOMP

OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]

USB

USB

POWER MGT CLOCKS

POWER MGT CLOCKS

USBRBIAS#

D

E

PCIE_RXN0 34
PCIE_RXP0 34
PCIE_TXN0 34
PCIE_TXP0 34

PCIE_RXN1 34
PCIE_RXP1 34
PCIE_TXN1 34
PCIE_TXP1 34

1D5V_S0

Place within 500 mils of ICH

12

R816

R816
24D9R2F

24D9R2F

RP3

RP3

1
2
3
4
5 6

SRP10K

SRP10K

3D3V_S0

R813

R813

1 2

DY

DY

R829

R829

1 2

DY

DY

Do Not Stuff

Do Not Stuff
R833

R833

1 2

DY

DY

Do Not Stuff

Do Not Stuff
R316

R316

1 2

10KR2

10KR2

10
9
8
7

Do Not Stuff

Do Not Stuff

PCI_GNT#6

PCI_GNT#5

PWROK

3D3V_S5

USB_OC#7
USB_OC#6
USB_OC#5
USB_OC#4

R7F9

ACZ_SPKR

R7F8

R7F7

C428 SCD1U16VC428 SCD1U16V
C431 SCD1U16VC431 SCD1U16V

C425 SCD1U16VC425 SCD1U16V
C426 SCD1U16VC426 SCD1U16V

DMI_RXN0 7
DMI_RXP0 7
DMI_TXN0 7
DMI_TXP0 7

DMI_RXN1 7
DMI_RXP1 7
DMI_TXN1 7
DMI_TXP1 7

DMI_RXN2 7
DMI_RXP2 7
DMI_TXN2 7
DMI_TXP2 7

DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3

DMI_IRCOMP_R

USB_OC#4 21

USB_OC#0 21
USB_OC#2 21

USB_RBIAS_PN

Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.

1 2
1 2

1 2
1 2

TP100TPAD28 TP100TPAD28
TP101TPAD28 TP101TPAD28
TP41TPAD28 TP41TPAD28
TP42TPAD28 TP42TPAD28

TP95TPAD28 TP95TPAD28
TP96TPAD28 TP96TPAD28
TP39TPAD28 TP39TPAD28
TP40TPAD28 TP40TPAD28

Layout Note:
PCIE AC coupling caps
need to be within 250 mils of the driver.

USB_OC#2
USB_OC#1
USB_OC#3
USB_OC#0

3D3V_S5

USBPN0 21
USBPP0 21

TP45TPAD28 TP45TPAD28
TP44TPAD28 TP44TPAD28

USBPN2 21
USBPP2 21

TP47TPAD28 TP47TPAD28
TP46TPAD28 TP46TPAD28

USBPN4 21
USBPP4 21

TP50TPAD28 TP50TPAD28
TP49TPAD28 TP49TPAD28

USBPN6 21
USBPP6 21

TP43TPAD28 TP43TPAD28
TP48TPAD28 TP48TPAD28
R844

R844

1 2

22D6R2F

22D6R2F

ICH6-M Strapping Options

FUNCTION

REF

No Reboot

R7F9

A16 Swap
Override

R7F8

R7F7

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet of

Date: Sheet of

Boot BIOS

DEFAULT OPTIONAL OVERRIDE

NO_STUFF

NO_STUFF

NO_STUFF

ICH6-M (2 of 4)

ICH6-M (2 of 4)

ICH6-M (2 of 4)

CANARY2 SA

CANARY2 SA

CANARY2 SA

STUFF

STUFF

STUFF

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

16 55Thursday, January 13, 2005

16 55Thursday, January 13, 2005

16 55Thursday, January 13, 2005

E

of

A

Layout Note:
Place above caps within
100 mils of ICH near F27, P27, AB27

1D5V_S0

B

U34E

U34E

SCD1U10V2MX-1

SCD1U10V2MX-1

C

12

C843

C843

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C844

C844

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C815

C815

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C814

C814

SCD1U10V2MX-1

SCD1U10V2MX-1

D

12

Layout Note:

C801

C801

Place near pin AA19

1D5V_S0

E

AA22

VCC1_5_B

12

TC16

4 4

3D3V_S0

3D3V_S0

NO_STUFF

C838

3 3

2 2

1 1

C838

Do Not Stuff

Do Not Stuff

1D5V_S0

1 2

Place within 100
mils of ICH

Place within 100
mils of ICH
pin AG10

C840

C840

12

Do Not Stuff

Do Not Stuff

DY

DY

12

12

12

NO_STUFFNO_STUFF

Do Not Stuff

Do Not Stuff

DY

DY

DY

DY

Place within 100
mils of ICH
near pin AG5

1D5V_GPLL_ICH_S0

R315

R315
0R3-U

0R3-U

12

Place within 100
mils of ICH
near E26, E27

1D5V_S0

C865

C865

C856

C856

12

12

Do Not Stuff

Do Not Stuff

DY

DY

DY

DY

SCD1U10V2MX-1

SCD1U10V2MX-1

TC16

ST220U2D5VBM

ST220U2D5VBM

Layout Note:
IDE decoupling

12

C753

C753

C804

C804

DY

DY

SCD1U10V2MX-1

SCD1U10V2MX-1

Layout Note:
PCI decoupling

12

NO_STUFF

C846

C846

C849

C849

Do Not Stuff

Do Not Stuff

DY

DY

C394

C394
SC10U6D3V5MX

SC10U6D3V5MX

3D3V_S0

C867

C867

SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S0

12

C757

C757
SCD1U10V2MX-1

SCD1U10V2MX-1

C850

C850

12

Do Not Stuff

Do Not Stuff

A

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C798

C798

Do Not Stuff

Do Not Stuff

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C741

C741

DY

DY

Place within 100
mils of ICH
near pin AG9

12

1D5V_S0

Place within 100
mils of ICH
pin AE1

Place within 100
mils of ICH
pin A13

12

Do Not Stuff

Do Not Stuff

DY

DY

1D5V_S0

3D3V_S5

12

C796

C796

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C797

C797

SCD1U10V2MX-1

SCD1U10V2MX-1

Do Not Stuff

Do Not Stuff

C421

C421

12

1D5V_S0

12

C782

C782

12

R744

R744

SCD01U16V2KX

SCD01U16V2KX

1 2

0R3-U

0R3-U

0R3-U

0R3-U

1 2

R854

R854

SCD1U10V2MX-1

SCD1U10V2MX-1

C784

C784

SCD1U10V2MX-1

SCD1U10V2MX-1

C794

C794

SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_ICH_S0

12

SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S5

12

C860

C860

1D5V_S0

NO_STUFF

C779

C779

12

C885

C885
SCD1U10V2MX-1

SCD1U10V2MX-1

V3D3A_VCCPSUS

12

C886

C886

C826

C826

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C852

C852

DY

DY

Do Not Stuff

Do Not Stuff

12

C776

C776

DY

DY

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C783

C783

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C854

C854
SCD1U10V2MX-1

SCD1U10V2MX-1

Place within 100
mils of ICH
pin V7 NO_STUFF NO_STUFF mils of ICH

AA23

12

12

C762

C762

Do Not Stuff

Do Not Stuff

12

C761

C761

SCD1U10V2MX-1

SCD1U10V2MX-1

B

VCC1_5_B

AA24

VCC1_5_B

AA25

VCC1_5_B

AB25

VCC1_5_B

AB26

VCC1_5_B

AB27

VCC1_5_B

F25

VCC1_5_B

F26

VCC1_5_B

F27

VCC1_5_B

G22

VCC1_5_B

G23

VCC1_5_B

G24

VCC1_5_B

G25

VCC1_5_B

H21

VCC1_5_B

H22

VCC1_5_B

J21

VCC1_5_B

J22

VCC1_5_B

K21

VCC1_5_B

K22

VCC1_5_B

L21

VCC1_5_B

L22

VCC1_5_B

M21

VCC1_5_B

M22

VCC1_5_B

N21

VCC1_5_B

N22

VCC1_5_B

N23

VCC1_5_B

N24

VCC1_5_B

N25

VCC1_5_B

P21

VCC1_5_B

P25

VCC1_5_B

P26

VCC1_5_B

P27

VCC1_5_B

R21

VCC1_5_B

R22

VCC1_5_B

T21

VCC1_5_B

T22

VCC1_5_B

U21

VCC1_5_B

U22

VCC1_5_B

V21

VCC1_5_B

V22

VCC1_5_B

W21

VCC1_5_B

W22

VCC1_5_B

Y21

VCC1_5_B

Y22

VCC1_5_B

AA6

VCC1_5_A

AB4

VCC1_5_A

AB5

VCC1_5_A

AB6

VCC1_5_A

AC4

VCC1_5_A

AD4

VCC1_5_A

AE4

VCC1_5_A

AE5

VCC1_5_A

AF5

VCC1_5_A

AG5

VCC1_5_A

AA7

VCC1_5_A

AA8

VCC1_5_A

AA9

VCC1_5_A

AB8

VCC1_5_A

AC8

VCC1_5_A

AD8

VCC1_5_A

AE8

VCC1_5_A

AE9

VCC1_5_A

AF9

VCC1_5_A

AG9

VCC1_5_A

AC27

VCCDMIPLL

E26

VCC3_3

AE1

VCCSATAPLL

AG10

VCC3_3

A13

VCCLAN3_3/VCCSUS3_3

F14

VCCLAN3_3/VCCSUS3_3

G13

VCCLAN3_3/VCCSUS3_3

G14

VCCLAN3_3/VCCSUS3_3

A11

VCCSUS3_3

U4

VCCSUS3_3

V1

VCCSUS3_3

V7

VCCSUS3_3

W2

VCCSUS3_3

Y7

VCCSUS3_3

A17

VCCSUS3_3

B17

VCCSUS3_3

C17

VCCSUS3_3

F18

VCCSUS3_3

G17

VCCSUS3_3

G18

VCCSUS3_3

COREIDEPCI

COREIDEPCI

PCIE

PCIE

VCCSUS1_5
VCCSUS1_5

VCCSUS1_5

SATA

SATA

USB CORE USB

USB CORE USB

PCI/IDE

PCI/IDE

REF

REF

V5REF_SUS

VCCUSBPLL

VCCSUS3_3

VCCLAN1_5/VCCSUS1_5
VCCLAN1_5/VCCSUS1_5

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

ICH6-M

ICH6-M

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A

VCC2_5
VCC2_5

V5REF
V5REF

VCCRTC

V_CPU_IO
V_CPU_IO
V_CPU_IO

F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19

AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12

P1
M7
L7
L4
J7
H7
H1
E4
B1
A6

U7
R7

G19
G20

F20
E24
E23
E22
E21
E20
D27
D26
D25
D24

G8
AB18

P7

SCD1U10V2MX-1

SCD1U10V2MX-1

AA18
A8

F21
A25

A24
AB3

G11
G10

SCD1U10V2MX-1

SCD1U10V2MX-1

AG23
AD26
AB22

G16
G15
F16
F15
E16
D16
C16

C881

C881

SCD1U10V2MX-1

SCD1U10V2MX-1

12

C848

C848
SCD1U10V2MX-1

SCD1U10V2MX-1

Place within 100
mils of ICH pin
AG13, AG16

C754

C754

SCD1U10V2MX-1

SCD1U10V2MX-1

Layout Note:
Distribute in PCI section
near pin A2-A6 near D1-H1

12

C892

C892

SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_INT_S5

C864

C864

SCD1U10V2MX-1

SCD1U10V2MX-1

V2D5S_PCI_IDE

12

C836

C836

V5REF_S0
V5REF_S5

12

C855

C855

C752

C752

SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_ICH_S5

12

C859

C859

SCD1U10V2MX-1

SCD1U10V2MX-1

C

12

C842

C842

Do Not Stuff

Do Not Stuff

DY

DY

3D3V_S0

12

12

C760

C760
SCD1U10V2MX-1

SCD1U10V2MX-1

12

C880

C880

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_S0

12

12

C870

C870
SCD1U10V2MX-1

SCD1U10V2MX-1

Place both
within 100 mils
of ICH near D27

R811

R811

1 2

0R3-U

0R3-U

Layout Note:
Place near AB18

1D5V_INT_S5

Place within 100
mils of ICH
pin G10

12

Layout Note:
Place near AG23

12

C862

C862

Do Not Stuff

Do Not Stuff

12

Do Not Stuff

Do Not Stuff

DY

DY

3D3V_S0

C813

C813

2D5V_S0

1D05V_S0

12

DY

DY

12

C809

C821

C821

12

C853

C853
SCD1U10V2MX-1

SCD1U10V2MX-1

12

1D5V_INT_S5

C809

Do Not Stuff

Do Not Stuff

DY

DY

ALL NO_STUFF Caps do
not have layout
requirements but if
layout allows then place
next to ICH6

R377

R377
0R3-U

0R3-U

1 2

12

C827

C827
SCD1U10V2MX-1

SCD1U10V2MX-1

12

C858

C858
SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_ICH_S5

Place within 100

12

mils of ICH

C884

C884

SCD1U10V2MX-1

SCD1U10V2MX-1

C790

C790

SCD1U10V2MX-1

SCD1U10V2MX-1

R850

R850
0R3-U

0R3-U

1 2

12

Do Not Stuff

Do Not Stuff

C876

C876

DY

DY

12

C803

C803

Do Not Stuff

Do Not Stuff

DY

DY

1D5V_ICH_S5

1D5V_ICH_S0

12

RTC_AUX_S5

12

12

3D3V_S5

Place within 100

pin A17

D

C835

C835

Do Not Stuff

Do Not Stuff

DY

DY

Layout Note:
Place near ICH6

Place within 100
mils of ICH

C883

C883
SCD01U16V2KX

SCD01U16V2KX

Layout Note:
Place near AB3

C795

C795
SCD1U10V2MX-1

SCD1U10V2MX-1

*Within a given well, 5VREF needs to be up before the
corresponding 3.3V rail

3D3V_S0

V5REF_S0

V5REF_S5

BOM2(NV44+G)

BOM2(NV44+G)

BOM2(NV44+G)

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet of

Date: Sheet of

Date: Sheet

2 1
12

C887

C887
SCD1U16V

SCD1U16V

2 1
12

C857

C857
SCD1U16V

SCD1U16V

ICH6-M (3 of 4)

ICH6-M (3 of 4)

ICH6-M (3 of 4)

CANARY2 SA

CANARY2 SA

CANARY2 SA

5V_S0

R405

5V_S53D3V_S5

IN

3

R405
10R2

10R2

1 2
12

C456

C456
SC1U10V3ZY

SC1U10V3ZY

R840

R840
10R2

10R2

1 2
12

C875

C875
SC1U10V3ZY

SC1U10V3ZY

VOUT

E

2

17 55Thursday, January 13, 2005

17 55Thursday, January 13, 2005

17 55Thursday, January 13, 2005

1D5V_ICH_S5

3D3V_S5

D13

D13
CH751H-40-U

CH751H-40-U

83.R0304.08F

83.R0304.08F

D40

D40
CH751H-40-U

CH751H-40-U

83.R0304.08F

83.R0304.08F

U37

U37
CM2830AAIM23-U1

CM2830AAIM23-U1

1

GND

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of