1
2
3
4
5
6
7
8
ZE1
REV:E2C
A A
CONNECTOR
Page 41
Dothan/Celeron-M
(478 Micro-FCPGA)
BATT
CHARGER
+0.9V
+1.8VSUS
DDR-SODIMM1
Page 10,11
B B
DDR-SODIMM2
Page 10,11
533 MHZ DDR II
533 MHZ DDR II
Page 40
+1.5V
+1.8VSUS
Page 4,5
4X133MHZ
+1.05V
Alviso
1257 PCBGA
+2.5V
Page 6,7,8,9
DMI interface
Parallel-HDD
Page 32
Multi-Bay
C C
Page 32
IDE
IDE
Azalia
+1.5V +1.05V
+2.5V
+3V
+3VSUS
+1.5VSUS
ICH6-M
609 BGA
Page 18,19,20
33MHz PCI
MINI-PCI
Wireless LAN
Page 29
DC/DC AC/BATT
+1.2V/+2.5V
+1.05V/+1.5V
+1.8V/+0.9V
+3V/+5V
Page 37
EXT. VGA
n-VIDIA NV44MV
Page 12,13,14,15
INT_LVDS
INT_TVOUT
INT_VGA
DVI
CH7307
Page 16
PCI
BUFFER
Page 34
CPU VR
CLOCKS
Generator
Page 36 Page 3
EXT_LVDS
EXT_TVOUT
EXT_VGA
LAN (10M/100M/1G)
BCM5788M
Page 23
CARDBUS/1394/3-IN-1
TI 7411
Page 21,22
SWITCH
CIRCUIT
Page 17
DOCKING
Page 33
VGA
RJ45
Page 24
LCD Connector
Page 28
CRT
Page 17
EZ4 DVI
1394 PORT
Page 21
AL C260
(Codec)
&
Page 30
Head phone
D D
Internal-MIC
LINE-IN/MIC-IN
Page 31
Page 31
Page 31
1
MDC1.5
Page 30
RJ11
Page 24
SUPER I/O
PC87391
Page 26
COM A COM B
Digitizer
Page 26
2
FIR
Page 26
3V_591
EC NSC97551
176 Pins LQFP
Page 27
+5V +3VPCU
JOGDIAL
Page 28 Page 27 Page 27
3
+5V
Keyboard
FLASH
4
USB
+5V
FAN 1
Page 25
USB PORT X 3
Page 25
Mini-Bluetooth
(USB bus)
Page 25
Finger
Printer
Page 28
5
3 in 1
socket
MMC,SD,MS
Page 22
6
CARDBUS
CON.
Page 22
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Schematic Block Diagram
Schematic Block Diagram
Schematic Block Diagram
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
14 2 Monday, August 22, 2005
14 2 Monday, August 22, 2005
14 2 Monday, August 22, 2005
8
E2C
E2C
E2C
1
B TEST CHANGE ITMES:
06/22 MODIFY LIST
1. Remove all no-use text meno, ie: Rev A2.
2. Page 12. Chage R157, R158, R162~R167 power source from +3V to IFPC_IOVDD.
3. Page 15. Add R615, R616, R614 Q44 and Q43. Follow nVIDIA's suggestion. TMDS Backdrive Prevention circuit.
4. Page 16. Change single R to RN. R62, R63 => RN16; R56, R57 => RN17; R58, R59 => RN18; R60, R61=> RN19. And all use 0 ohm.
5. Page 24. Swap net of CN10-12 and CN10-13. Wrong connection.
6. Page 25. Change USB power source from 5VPCU to +5VSUS. Wrong design.
7. Page 30. Reserve R617 (stuff), R618 (stuff), C859 (NA), C869 (NA), C861 (NA) and C862 (NA). For noise in EZ4's LINE-IN.
06/23 MODIFY LIST
8. Page 23. Delete R36 and R76. VESDchange PWR source from LAN_3V to 3V_LAN directly.
9. Page 23. Delete R40 from TCK.
10. Page 23. Delete R42 from Q9-B and Q9-C.
A A
11. Page 23. Add option resisters in 3VLAN. Add R56 and R57 for BCM4401.
12. Page 23. Add PI-filiter for AVDD and separate from VDDP. Add L72.
13. Page 23. Add PI-filiter for AVDDL. Add L73 and C863.
14. Page 23. BOM modification. Correct RDAC's resister from 1.18K to 1.24K (BCM5788).
15. Page 23. BOM modification. R70: stuff; R68: NA. FAE: Support CLKRUN#.
06/28 MODIFY LIST
16. Page 28. Delete R112 (pull hign/ 10K) and Add R624 (0 ohm) to GND. BOM.
17. Page 28. Add R625 and R626 to GND. ALPS setting. BOM.
18. Page 28. Add R619, R620, R621 and R623 for bypass 3D function. BOM.
19. Page 28. Reserve R624, R622, C864 and U62. Those are for 3D function.
06/28 MODIFY LIST
20. Page 13. Update and correct U27 and U28 footprint. Correct DQS and DQM.
21. Page 13. Re-route MDA[0..63], QSA[0..7] and -DQMA[0..7]
22. Page 9. C272 change from CH73301M8B9 to CH747LM8801(LOW profile). BOM
B2 TEST CHANGE ITMES:
07/19 MODIFY LIST
23. Page 25. Change U32, U58 and U33 to AL000547001 (GMT).
Change C489, C800 and C490 to CH71001M393 (100uF).
Del R289, R296, R562, R555, R292 and R294
24. Page 25. Add USB PWR control (SUSON) circuit. Add R554 (10K) and Q39(DTC144EUA )
25. Page 42. Add Semtcech solution in Track-point.
Add U63, U66, U65, U64, C866, C868, C867, C870, C872, C871, R637, R638, R643, R642, R645, R644, R647, R641, R646, R640, R639, R638.
26. Page 22. Chane CN13 from 4 in1 to 3 in 1. Re-routing it.
27. Page 28. BOM delete D4. Acer: no action in LID.
B B
07/26 MODIFY LIST
28. Page 32. Add HOLE45 for MDC.
29. Page 32. Add HOLE46 for VRAM. (NO SPACE!!!)
30. Page 32. Add clip's PAD. P5, P6 and P7.
07/29 MODIFY LIST
31. Page 27. Add PULL HIGH 10K/ R649 to 3V. (EC)
32. Page 40. BOM: Remove PR149 and Stuff PR147. (EC)
33. Page 40. Delete PQ41, PU10, PC97, PC98 and PC99. REFP => VIN; REF3V => 3V_591. (EC and PWR)
REFP in PD19-1 and PC130-1; REF3V in PU13-12, PR40-1, PR64-1 and PU14-5.
34. Page 40. Delete PR134 and PR139. Then SHORT them. (PWR)
35. Page 40. Change PQ52-3 from PU13-13(CC-SET) to PU13-8. And change PR87 from 0 ohm to 10K.(PWR)
36. Page 28. Upate CN7's footprint to 88264-06XX-6P-R
37. Page 28. Upate CN8's footprint to 88264-10XX-10P-R
38. Page 28. Upate CN3's footprint to 88264-04XX-4P-L
39. Page 39. Delete JP1. Change +1V5_S5 to +1.5V_S5.
40. Page 39. Delete JP2 and JP5. Change VCCP-OUT to +VCCP.
40. Page 31. Reserve and Stuff R650 and R651. For Fine-tune the value of headphone.
07/30 MODIFY LIST
41. Page 35. Disable NVVDD & +1.2V for INT VGA cost-down
42. Page 35. change R128 from 100K to 97.6Kohm, R127 from 34K to 100Kohm for power fine-tune VGA voltage
43. Page 42. Change trackpointer function from ALPS to SEMTECH
44. Page 12. Change EXT_BLON reistor R446 form 10K to 1K for boot white screen
45. Page 04. Disable R596 for Battery only can't boot
C TEST CHANGE ITMES:
08/9 MODIFY LIST
46. Page 26. Modify serial port function for EZ4 (MRXD1 & MTXD1)
C C
47. Page 25. Change USB_Power_on voltage from +5VSUS to 5VPCU
48. Page 25. Modify all USB power switch OC# pull-up 10k to +3VSUS
08/10 MODIFY LIST
49. Page 26. Add GND in C577 & C578 for FIR
50. Page 33. Remove LAN's reserve capacitors(C817/C513/C542/C546/C554/C555/C525/C523/C533/C530) by EMI engineer confirm
08/11 MODIFY LIST
51. Page 36. CPU CORE Power(PU11's pin25) add another CAP 0.022UF(C170) by power engineer request
52. Page 23. Add two new CAP 0.1UF(C873 & C874) for AVDD_LAN & +1.8V_1.2V_LAN by EMI request
08/12 MODIFY LIST
53. Page 23. Change R38 from 1.24k to 1.18k for LAN droop & template
54. Page 17. Change L59/L60/L61 from FBM-10-160808-470(47ohm) to BLM18BA220(22ohm) for EA measure fail
55. Page 28. Modify Bluetooth led can't light for FOXCONN Bluetooth module (Add R652 & R653)
56. Page 31. Modify Line-in noise change R650 &R651 from 0ohm to 1kohm
Page 30. Modify Line-in noise add C859 &C861 (0.1UF)
57. Page 31. Add AND gate(U67) & R654(0 ohm) for popo sound (delete D29 & D30 & R550)
58. Page 31. Add MOSFET (Q48&Q49) for headphone popo sound, and reserve Q46/Q47 for speaker popo sound issue
59. Page 33. Change L33/L34/L36 from 22ohm BEAD to short
08/13 MODIFY LIST
60. Page 26. Change R449 from 1k ohm to 4.7k ohm for SIO
08/18 MODIFY LIST
61. Page 17. Change R399/R400/R401/R387/R388/R390 size from 0402 to 0603 for EMI request
62. Page 31. Add Q50 & R656(10K) for Normal close type audio jack issue (Reserve)
63. Page 32. Change Q13 from Transistor to MOS and R110 (47k to 10k) & C139(0.22U to 0.1U) and add R657 (0R) from EC (154pin) for Lite_On ODD issue
64. Page 33. Add C875/C876/C877/C878 (12pf) for Docking DVI EMI issue(Reserve)
08/19 MODIFY LIST
D D
65. Page 21. Change 1394 connecotor(CN28) type form SMD to DIP for SMT request
66. Page 28. Update CN7's footprint to 88264-06XX-6P-R-ZE1 & CN8's footprint to 88264-10XX-10P-R-ZE1 for SMT request (Increase PAD length 0.2mm)
67. Page 25. Update CN5's footprint to SM08B-SURS-8P-R-ZE1 for SMT request (Increase PAD length 0.2mm)
68. Page 41. Add new CAP(PC171/PC172) in BAT-V plane for EMI request
69. Page 23. Add new CAP(C879/C880) in AVDD_LAN plane for EMI request
70. Page 23. Add new CAP(C881/C882) in +3V plane for EMI request
71. Page 33. Change C1/C2 from TOP to BOT side for Mechanical request
1
2
2
3
3
4
BCM5788M
BCM4401
NOTE
4
5
NA 1.24K
STUFF
R38 Q5, Q9 U7 U8 R97, R87
1.27K
5
R51, R48 R56, R57
STUFF
NA
+3VRUN 3V_LAN RDAC
STUFF
NA NA
STUFF
6
NA
STUFF
NA
STUFF
AT93C46 24LC128
6
7
06/27 LAYOUT SWAP
Pin 'JDIM1.152' moved to net 'R_B_MD42'.
Pin 'JDIM2.153' moved to net 'R_A_MD46'.
Pin 'JDIM2.191' moved to net 'R_A_MD54'.
Pin 'JDIM2.181' moved to net 'R_A_MD48'.
Pin 'JDIM1.58' moved to net 'R_B_MD19'.
Pin 'JDIM2.6' moved to net 'R_A_MD0'.
Pin 'JDIM2.175' moved to net 'R_A_MD61'.
Pin 'JDIM2.16' moved to net 'R_A_MD6'.
Pin 'JDIM2.44' moved to net 'R_A_MD16'.
Pin 'JDIM2.43' moved to net 'R_A_MD21'.
Pin 'JDIM1.56' moved to net 'R_B_MD18'.
Pin 'JDIM2.154' moved to net 'R_A_MD42'.
Pin 'JDIM1.57' moved to net 'R_B_MD22'.
Pin 'JDIM2.192' moved to net 'R_A_MD51'.
Pin 'JDIM1.176' moved to net 'R_B_MD51'.
Pin 'JDIM2.179' moved to net 'R_A_MD49'.
Pin 'JDIM1.194' moved to net 'R_B_MD59'.
Pin 'JDIM1.192' moved to net 'R_B_MD58'.
Pin 'JDIM2.186' moved to net 'R_A_DQS#6'.
Pin 'JDIM1.5' moved to net 'R_B_MD4'.
Pin 'JDIM2.7' moved to net 'R_A_MD5'.
Pin 'JDIM2.167' moved to net 'R_A_DQS#7'.
Pin 'JDIM2.152' moved to net 'R_A_MD43'.
Pin 'JDIM1.7' moved to net 'R_B_MD5'.
Pin 'JDIM2.157' moved to net 'R_A_MD57'.
Pin 'JDIM2.20' moved to net 'R_A_MD13'.
Pin 'JDIM1.158' moved to net 'R_B_MD48'.
Pin 'JDIM2.159' moved to net 'R_A_MD60'.
Pin 'JDIM2.173' moved to net 'R_A_MD56'.
Pin 'JDIM1.191' moved to net 'R_B_MD62'.
Pin 'JDIM2.5' moved to net 'R_A_MD1'.
Pin 'JDIM1.61' moved to net 'R_B_MD29'.
Pin 'JDIM2.170' moved to net 'R_A_DM7'.
Pin 'JDIM2.57' moved to net 'R_A_MD22'.
Pin 'JDIM1.154' moved to net 'R_B_MD43'.
Pin 'JDIM2.188' moved to net 'R_A_DQS6'.
Pin 'JDIM1.62' moved to net 'R_B_MD24'.
Pin 'JDIM2.61' moved to net 'R_A_MD29'.
Pin 'JDIM1.182' moved to net 'R_B_MD57'.
Pin 'JDIM1.153' moved to net 'R_B_MD46'.
Pin 'JDIM1.151' moved to net 'R_B_MD47'.
Pin 'JDIM1.126' moved to net 'R_B_MD32'.
Pin 'JDIM1.157' moved to net 'R_B_MD52'.
Pin 'JDIM1.180' moved to net 'R_B_MD56'.
Pin 'JDIM1.175' moved to net 'R_B_MD55'.
Pin 'JDIM2.17' moved to net 'R_A_MD3'.
Pin 'JDIM1.4' moved to net 'R_B_MD0'.
Pin 'JDIM2.169' moved to net 'R_A_DQS7'.
Pin 'JDIM1.63' moved to net 'R_B_MD28'.
Pin 'JDIM1.36' moved to net 'R_B_MD15'.
Pin 'JDIM2.64' moved to net 'R_A_MD25'.
Pin 'JDIM1.38' moved to net 'R_B_MD10'.
Pin 'JDIM1.64' moved to net 'R_B_MD25'.
Pin 'RP4.4' moved to net 'R_B_MA4'.
Pin 'RP6.4' moved to net 'SM_CS2#'.
Pin 'RP7.2' moved to net 'M_ODT2'.
Pin 'RP20.2' moved to net 'R_A_MA13'.
Pin 'RP6.2' moved to net 'R_B_SRASA#'.
Pin 'RP28.4' moved to net 'R_A_BMWEA#'.
Pin 'RP24.2' moved to net 'R_A_MA12'.
Pin 'RP20.4' moved to net 'M_ODT0'.
Pin 'RP4.2' moved to net 'R_B_MA2'.
Pin 'RP7.4' moved to net 'R_B_MA13'.
Pin 'RP2.4' moved to net 'R_B_MA6'.
Pin 'RP2.2' moved to net 'CKE3'.
Pin 'RP24.4' moved to net 'R_A_MA9'.
Pin 'RP3.2' moved to net 'R_B_MA7'.
Pin 'RP14.2' moved to net 'R_B_MA12'.
Pin 'RP28.2' moved to net 'R_A_SCASA#'.
Pin 'RP14.4' moved to net 'R_B_MA9'.
Pin 'JDIM1.55' moved to net 'R_B_MD23'.
Pin 'JDIM1.45' moved to net 'R_B_MD20'.
Pin 'JDIM2.180' moved to net 'R_A_MD53'.
Pin 'JDIM2.58' moved to net 'R_A_MD19'.
Pin 'JDIM2.23' moved to net 'R_A_MD12'.
Pin 'JDIM2.185' moved to net 'R_A_DM6'.
Pin 'JDIM1.35' moved to net 'R_B_MD14'.
Pin 'JDIM1.174' moved to net 'R_B_MD50'.
Pin 'JDIM2.63' moved to net 'R_A_MD28'.
Pin 'JDIM2.45' moved to net 'R_A_MD20'.
Pin 'JDIM2.160' moved to net 'R_A_MD63'.
Pin 'JDIM1.179' moved to net 'R_B_MD61'.
Pin 'JDIM1.43' moved to net 'R_B_MD21'.
Pin 'JDIM2.182' moved to net 'R_A_MD52'.
Pin 'JDIM1.159' moved to net 'R_B_MD53'.
Pin 'JDIM2.151' moved to net 'R_A_MD47'.
Pin 'JDIM2.158' moved to net 'R_A_MD58'.
Pin 'JDIM1.189' moved to net 'R_B_MD63'.
Pin 'JDIM1.6' moved to net 'R_B_MD1'.
Pin 'JDIM2.14' moved to net 'R_A_MD2'.
Pin 'JDIM1.173' moved to net 'R_B_MD54'.
Pin 'JDIM2.62' moved to net 'R_A_MD24'.
Pin 'JDIM2.194' moved to net 'R_A_MD50'.
Pin 'JDIM1.160' moved to net 'R_B_MD49'.
Pin 'JDIM1.181' moved to net 'R_B_MD60'.
Pin 'JDIM2.46' moved to net 'R_A_MD17'.
Pin 'JDIM1.44' moved to net 'R_B_MD16'.
Pin 'JDIM2.189' moved to net 'R_A_MD55'.
Pin 'JDIM2.174' moved to net 'R_A_MD62'.
Pin 'JDIM1.46' moved to net 'R_B_MD17'.
Pin 'JDIM2.22' moved to net 'R_A_MD8'.
Pin 'JDIM2.19' moved to net 'R_A_MD7'.
Pin 'JDIM2.56' moved to net 'R_A_MD23'.
Pin 'JDIM2.176' moved to net 'R_A_MD59'.
Pin 'JDIM1.123' moved to net 'R_B_MD37'.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
7
8
of
of
24 2 Monday, August 22, 2005
24 2 Monday, August 22, 2005
24 2 Monday, August 22, 2005
8
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
E2C
E2C
E2C
1
Clock gen
A A
L53 TI201209G121 L53 TI201209G121
+3V
B B
VDD_CKG_CPU
L30 TI201209G121 L30 TI201209G121
+3V
C466
C466
10U
10U
C451
C451
.047U
.047U
2
CLK_EN# (36)
STP_CPU# (19,36)
STP_PCI# (19)
SELPSB1_CLK (5,7)
CLKVDD
C705
R500
R500
2.2R
2.2R
C462
C462
.047U
.047U
C705
10U
10U
C706
C706
10U
10U
C464
C464
.047U
.047U
C708
C708
.047U
.047U
C707
C707
.047U
.047U
R277 2.2R R277 2.2R
C454
C454
.047U
.047U
C712 33P C712 33P
C711 33P C711 33P
C709
C709
.047U
.047U
R253 1/F R253 1/F
C449 .047U C449 .047U
3
Y8
Y8
14.318MHZ/20PF
14.318MHZ/20PF
R520 475/F R520 475/F
Iref=5mA, Ioh=4*Iref
C715
C715
.047U
.047U
CG_XIN
CG_XOUT
CGCLK_SMB
CGDAT_SMB
SELPSB1_CLK
IREF
VDD_CKGREF
VDD_CKG_48
VDD_CKG_CPU
VDDA_CKG VDD_CKG_CPU
C467
C467
10U
10U
250mA ( MAX. )
U48
U48
50
XIN
49
XOUT
46
SMCLK
47
SMDAT
10
VTT_PWRGD#/PD
54
CPU_STOP#
55
PCI/PCIE_STOP#
16
TEST_MODE/FSB
39
IREF
1
VDDPCI1
7
VDDPCI2
48
VDDREF
11
VDD48
21
VDDSRC1
28
VDDSRC2
34
VDDSRC3
42
VDDCPU
37
VDDA
38
GNDA
ICS954206
ICS954206
4
SEL_96M#/PCICLKF1
REF0
REF1/FSC
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
DOT_96
DOT_96#
96M_SS/SRC0
96M_SS#/SRC0#
SRC1
SRC1#
SRC2
SRC2#
SRC3
SRC3#
SRC4_SATA
SRC4#_SATA#
SRC5
SRC5#
SRC6
SRC6#
ITPCLK/SRC7
ITPCLK#/SRC7#
ITP_EN/PCICLKF0
PCICLK2
PCICLK3
PCICLK4
PCICLK5
USB_48/FSA
GND1
GND2
GND3
GND4
GND5
GND6
14M_REF
52
53
R_HCLK_CPU
44
R_HCLK_CPU#
43
R_HCLK_MCH
41
R_HCLK_MCH#
40
R_DOT96
14
R_DOT96#
15
R_DREFSSCLK
17
R_DREFSSCLK#
18
R_PCIE_VGA
19
R_PCIE_VGA#
20
R_PCIE_ICH
22
R_PCIE_ICH#
23
R_MCH_3GPLL
24
R_MCH_3GPLL#
25
26
27
R_PCIE_EZ1
31
R_PCIE_EZ1#
30
R_PCIE_EZ2
33
R_PCIE_EZ2#
32
36
35
R_PCLK_591
8
R_PCLK_ICH
9
R_PCLK_SIO
56
R_PCLK_MINI
3
R_PCLK_PCM
4
R_PCLK_LAN
5
SELPSB0_CLK
12
2
6
13
29
45
51
5
R509 12.1/F R509 12.1/F
R512 12.1/F R512 12.1/F
RP39
4
2
4
2
2
4
2
4
2
4
2
4
2
4
4
2
4
2
R510 33R R510 33R
R252 33R R252 33R
R503 33R R503 33R
R502 33R R502 33R
R505 33R R505 33R
R507 33R R507 33R
R514 22R R514 22R
R629 22R R629 22R
ECN C2A
48Mhz to Cardbus controller(7411) for cost down
RP39
3
33X2
33X2
1
RP41
RP41
3
33X2
33X2
1
RP40
RP40
1
33X2
33X2
3
RP42
RP42
1
33X2
33X2
3
RP43
RP43
1
33X2
33X2
3
RP45
RP45
1
33X2
33X2
3
RP47
RP47
1
33X2
33X2
3
RP46
RP46
3
33X2
33X2
1
RP44
RP44
3
33X2
33X2
1
6
14M_SIO (26)
14M_ICH (19)
HCLK_CPU (4)
HCLK_CPU# (4)
HCLK_MCH (6)
HCLK_MCH# (6)
DOT96 (7)
DOT96# (7)
DREFSSCLK (7)
DREFSSCLK# (7)
CLK_PCIE_VGA (12)
CLK_PCIE_VGA# (12)
CLK_PCIE_ICH (19)
CLK_PCIE_ICH# (19)
CLK_MCH_3GPLL (7)
CLK_MCH_3GPLL# (7)
CLK_PCIE_EZ1 (33)
CLK_PCIE_EZ1# (33)
CLK_PCIE_EZ2 (33)
CLK_PCIE_EZ2# (33)
PCLK_591 (27)
PCLK_ICH (18)
PCLK_SIO (26)
PCLK_MINI (29)
PCLK_PCM (21)
PCLK_LAN (23)
CLK48_USB (19)
TI-48M (21)
EZ_CLKREQ# (33)
7
R581 4.7K R581 4.7K
SELPSB2_CLK R_SELPSB2_CLK
CLKREQA# - SRC0, 2, SATA
CLKREQB# - SRC1, 3, 4
S/W programable for
effected clock pairs
EZ_CLKREQ#
R_PCLK_591
R_PCLK_ICH
ITP/SRC7 SELECT 0:SRC7 1:ITP
R298 1K R298 1K
R511 1K R511 1K
R513 1K R513 1K
8
SELPSB2_CLK (5,7)
+3V
SM Bus Speed setting
+VCCP +3V +VCCP
C C
+3V
2
4
RP38
RP38
Q37
Q37
10KX2
RHU002N06
RHU002N06
PDAT_SMB (19,33)
Q36
Q36
RHU002N06
D D
PCLK_SMB (19,33)
RHU002N06
10KX2
2
3 1
+3V
2
3 1
1
3
CGDAT_SMB
CGCLK_SMB
CGDAT_SMB (10)
CGCLK_SMB (10)
Resistor Stuff Table
RA RB RC RD
Dothan A 400 V X X V
Dothan A 533 X V X V
Dothan B X X X X
Clock Gen. Frequency Selection Table
FSC FSB FSA CPU SRC PCI
1 0 1 100 100 33
0 0 1 133 100 33
0 1 1 166 100 33
0 1 0 200 100 33
Default
Frequency
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 RSVD 100 33
1
2
3
4
R506
R506
*1K
*1K
RA
SELPSB2_CLK SELPSB0_CLK SELPSB1_CLK DOT96#
R508
R508
*1K
*1K
RB
DOTHAN BSEL Output Value
DOTHAN A-Step DOTHAN B-Step FSB
400 MHz
533 MHz 1
0
0
5
R258
R258
*1K
*1K
RC
R260
R260
*1K
*1K
RD
For Dothan B
BSEL0 BSEL1 BSEL1 BSEL0
0
0
0
R515
R515
10K
10K
1
0
6
Clock terminator
HCLK_CPU
HCLK_CPU#
HCLK_MCH
HCLK_MCH#
CLK_PCIE_VGA
CLK_PCIE_VGA#
DOT96
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_EZ2
CLK_PCIE_EZ2#
CLK_PCIE_EZ1
CLK_PCIE_EZ1#
DREFSSCLK
DREFSSCLK#
R254
R254
R256
R256
R257 49.9/F R257 49.9/F
R259 49.9/F R259 49.9/F
R521 49.9/F R521 49.9/F
R522 49.9/F R522 49.9/F
R516 49.9/F R516 49.9/F
R517 49.9/F R517 49.9/F
R527 49.9/F R527 49.9/F
R528 49.9/F R528 49.9/F
R523 49.9/F R523 49.9/F
R526 49.9/F R526 49.9/F
R267 49.9/F R267 49.9/F
R269 49.9/F R269 49.9/F
R271 49.9/F R271 49.9/F
R274 49.9/F R274 49.9/F
R518 49.9/F R518 49.9/F
R519 49.9/F R519 49.9/F
49.9/F
49.9/F
49.9/F
49.9/F
Close to Clock Gen.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Clock Gen.
Clock Gen.
Clock Gen.
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
34 2 Monday, August 22, 2005
34 2 Monday, August 22, 2005
34 2 Monday, August 22, 2005
of
of
of
8
B2A
B2A
B2A
CPU
1
2
3
4
5
6
7
8
Thermal monitor
U51A
HA#[3..31] (6)
A A
B B
C C
G1 Pin:NC for
Dothan and
DPRSTP# for
Yonah
DPRSTP# (18)
D D
ECN D2B For Battery only can't boot
THERMTRIP# (7,18)
+VCCP
1
HA#[3..31]
HADSTB0# (6)
HADSTB1# (6)
HREQ#0 (6)
HREQ#1 (6)
HREQ#2 (6)
HREQ#3 (6)
HREQ#4 (6)
ADS# (6)
HBREQ0# (6)
BPRI# (6)
BNR# (6)
HLOCK# (6)
HIT# (6)
HITM# (6)
DEFER# (6)
T200 T200
T197 T197
T111 T111
T113 T113
HTRDY# (6)
RS#0 (6)
RS#1 (6)
RS#2 (6)
A20M# (18)
FERR# (18)
IGNNE# (18)
CPUPWRGD (18)
SMI# (18)
T196 T196
T198 T198
T112 T112
T199 T199
DBR# (19)
INTR (18)
NMI (18)
STPCLK# (18)
CPUSLP# (6,18)
DPSLP# (18)
R596 *0R R596 *0R
EMI request
R499 56R R499 56R
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
A20M#
FERR#
IGNNE#
CPUPWRGD
SMI#
STPCLK#
CPUSLP#
DPSLP#
THERMDA
THERMDC
THERMTRIP#_RR
CPU_PROCHOT#
IERR#
BPM0#
BPM1#
BPM2#
BPM3#
TCK
TDO
TDI
TMS
TRST#
PREQ#
PRDY#
DBR#
U51A
P4
A3#
U4
A4#
V3
A5#
R3
A6#
V2
A7#
W1
A8#
T4
A9#
W2
A10#
Y4
A11#
Y1
A12#
U1
A13#
AA3
A14#
Y3
A15#
AA2
A16#
AF4
A17#
AC4
A18#
AC7
A19#
AC3
A20#
AD3
A21#
AE4
A22#
AD2
A23#
AB4
A24#
AC6
A25#
AD5
A26#
AE2
A27#
AD6
A28#
AF3
A29#
AE1
A30#
AF1
A31#
U3
ADSTB0#
AE5
ADSTB1#
R2
REQ0#
P3
REQ1#
T2
REQ2#
P1
REQ3#
T1
REQ4#
N2
ADS#
A4
IERR#
N4
BREQ0#
J3
BPRI#
L1
BNR#
J2
LOCK#
K3
HIT#
K4
HITM#
L4
DEFER#
C8
BPM0#
B8
BPM1#
A9
BPM2#
C9
BPM3#
M3
TRDY#
H1
RS0#
K1
RS1#
L2
RS2#
C2
A20M#
D3
FERR#
A3
IGNNE#
E4
PWRGOOD
B4
SMI#
A13
TCK
A12
TDO
C12
TDI
C11
TMS
B13
TRST#
A16
ITP_CLK0
A15
ITP_CLK1
B10
PREQ#
A10
PRDY#
A7
DBR#
D1
LINT0
D4
LINT1
C6
STPCLK#
A6
SLP#
B7
DPSLP#
G1
DPRSTP#
B18
THERMDA
A18
THERMDC
C17
THERMTRIP#
B17
PROCHOT#
Dothan Processor
Dothan Processor
2
Dothan
Dothan
REQUEST
REQUEST
PHASE
PHASE
SIGNALS
SIGNALS
ERROR
ERROR
SIGNALS
SIGNALS
ARBITRATION
ARBITRATION
PHASE
PHASE
SIGNALS
SIGNALS
SNOOP PHASE
SNOOP PHASE
SIGNALS
SIGNALS
RESPONSE
RESPONSE
PHASE
PHASE
SIGNALS
SIGNALS
PC
PC
COMPATIBILITY
COMPATIBILITY
SIGNALS
SIGNALS
DIAGNOSTIC
DIAGNOSTIC
& TEST
& TEST
SIGNALS
SIGNALS
EXECUTION
EXECUTION
CONTROL
CONTROL
SIGNALS
SIGNALS
THERMAL DIODE
THERMAL DIODE
1 OF 3
1 OF 3
3
DATA
DATA
PHASE
PHASE
SIGNALS
SIGNALS
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
DBSY#
DRDY#
BCLK1
BCLK0
INIT#
RESET#
DPWR#
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
M2
H2
B14
B15
B5
B11
C19
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
CPUINIT#
CPURST#
4
HD#[0..63]
HDSTBN0# (6)
HDSTBP0# (6)
HDSTBN1# (6)
HDSTBP1# (6)
HDSTBN2# (6)
HDSTBP2# (6)
HDSTBN3# (6)
HDSTBP3# (6)
HDBI0# (6)
HDBI1# (6)
HDBI2# (6)
HDBI3# (6)
DBSY# (6)
DRDY# (6)
HCLK_CPU# (3)
HCLK_CPU (3)
CPUINIT# (18)
CPURST# (6)
DPWR# (6)
HD#[0..63] (6)
5
MBCLK (12,27,41)
MBDATA (12,27)
THERM_ALERT# (19)
Power reset circuit
+VCCP
ITP debug
TDI
TMS
TDO
TRST#
CPURST#
TCK
Close to CPU
TDI
R492 150/F R492 150/F
IERR#
R486 56R R486 56R
CPUPWRGD
R276 200/F R276 200/F
+3V
Q38
Q38
RHU002N06
RHU002N06
2
3 1
+3V
Q40
Q40
RHU002N06
RHU002N06
2
3 1
+3V
2
3 1
R263 332/F R263 332/F
+VCCP +VCCP
R489
R489
54.9/F
54.9/F
R495
+VCCP
6
R495
27.4/F
27.4/F
R496
R496
680R
680R
+3V
THCLK_SMB
R549
R549
10K
10K
THDAT_SMB
Q41
Q41
*RHU002N06
*RHU002N06
THERM_ALERT#_RR
C453
C453
.1U
.1U
Default ITP Function Disabled
R491
R494
R494
*54.9/F
*54.9/F
R493 *22.6/F R493 *22.6/F JT4JT4
R490 *22.6/F R490 *22.6/F
R491
39.2/F
39.2/F
TCK NO STUB
JITP Connector
Place these Components
as close as possible.
VCC
DXP
GND
280VCC
1
3
2
C799
C799
.1U
.1U
THERMDA
C775
C775
2200P
2200P
THERMDC
R553
R553
10K
10K
R575
R575
10K
10K
R566 100R R566 100R
U57
U57
4
SCLK
5
SDA
6
ALERT#
MAX6642ATT98-T
MAX6642ATT98-T
Address 1001 101
1999_SHT#
Q25
Q25
2
MMBT3904
MMBT3904
1 3
R610 330R R610 330R
JT7JT7
JT8JT8
JT2JT2
JT3JT3
JT1JT1
JT5JT5
JT6JT6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DOTHAN (HOST)
DOTHAN (HOST)
DOTHAN (HOST)
Date: Sheet
Date: Sheet
Date: Sheet
7
Quanta Computer Inc.
Quanta Computer Inc.
1999_SHT# (37)
THERMTRIP#
+VCCP +3V_S5
C733
C733
*.1U
*.1U
DBR#
PROJECT : ZE1
PROJECT : ZE1
R488
R488
150/F
150/F
44 2 Monday, August 22, 2005
44 2 Monday, August 22, 2005
44 2 Monday, August 22, 2005
8
of
of
of
B2A
B2A
B2A
1
2
3
4
5
6
7
8
CPU
Place pulldown
C727
C727
T116 T116
T115 T115
T203 T203
C461
C461
10U
10U
C717
C717
10U
10U
+
+
+
+
C468
C468
.1U
.1U
3
resistors within
0.5" of COMP pins
R278 27.4/F R278 27.4/F
R280 54.9/F R280 54.9/F
R282 27.4/F R282 27.4/F
R279 54.9/F R279 54.9/F
R487
R487
R262
R262
*1K
*1K
*1K
*1K
C480
C480
10U
10U
C456
C456
10U
10U
C785
C785
150U/4V
150U/4V
C642
C642
150U/4V
150U/4V
C472
C472
C471
C471
.1U
.1U
.1U
.1U
T201 T201
T202 T202
T207 T207
T117 T117
T114 T114
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
VCC_CORE
4
P25
P26
AB2
AB1
AD26
AF7
AC1
E26
AC26
D18
D20
D22
E17
E19
E21
G21
H22
K22
V22
W21
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
C5
F23
B2
C3
N1
B1
F26
D6
D8
E5
E7
E9
F6
F8
F18
F20
F22
G5
H6
J5
J21
U5
V6
W5
Y6
U51B
U51B
COMP0
COMP1
COMP2
COMP3
GTLREF0
TEST1
TEST2
NC1
RSVD2
RSVD3
RSVD4
RSVD5
VCCA3
VCCA2
VCCA1
VCCA0
VCC00
VCC01
VCC02
VCC03
VCC04
VCC05
VCC06
VCC07
VCC08
VCC09
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
Dothan Processor
Dothan Processor
Dothan
Dothan
2 OF 3
2 OF 3
POWER,
POWER,
GROUND,
GROUND,
RESERVED
RESERVED
SIGNALS
SIGNALS
A2
VSS00
A5
VSS01
A8
VSS02
A11
VSS03
A14
VSS04
A17
VSS05
A20
VSS06
A23
VSS07
A26
VSS08
B3
VSS09
B6
VSS10
B9
VSS11
B12
VSS12
B16
VSS13
B19
VSS14
B22
VSS15
B25
VSS16
C1
VSS17
C4
VSS18
C7
VSS19
C10
VSS20
C13
VSS21
C15
VSS22
C18
VSS23
C21
VSS24
C24
VSS25
D2
VSS26
D5
VSS27
D7
VSS28
D9
VSS29
D11
VSS30
D13
VSS31
D15
VSS32
D17
VSS33
D19
VSS34
D21
VSS35
D23
VSS36
D26
VSS37
E3
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
5
DOTHAN-A NC
E6
DOTHAN-B POP
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
SELPSB2_CLK (3,7)
SELPSB1_CLK (3,7)
SELPSB2_CLK
SELPSB1_CLK
PSI# (36)
ECN C2A
Reserve for Power saving
R498 0R R498 0R
R497 0R R497 0R
6
CPU_VID0 (36)
CPU_VID1 (36)
CPU_VID2 (36)
CPU_VID3 (36)
CPU_VID4 (36)
CPU_VID5 (36)
R628 *0R R628 *0R
+VCCP
R281
R281
1K/F
1K/F
A A
B B
Place voltage divider within
0.5" of GTLREF pin
R283
R283
2K/F
2K/F
R275 0R R275 0R
+1.5V
C463
C463
.01U
.01U
CPU_VCCA
C473
C473
10U
10U
CAP
VCC_CORE
C742
C742
C743
C743
10U
10U
C C
D D
+VCCP
C436
C436
+
+
150U/4V
150U/4V
C477
C477
10U
10U
10U
10U
C744
C744
10U
10U
C720
C720
VCC_CORE
1
C476
C476
10U
10U
10U
10U
C745
C745
10U
10U
VCC_CORE
C719
C719
C474
C474
.1U
.1U
C741
C741
10U
10U
10U
10U
C459
C459
C465
C465
.1U
.1U
10U
10U
C721
C721
10U
10U
10U
10U
C460
C460
C735
C735
.1U
.1U
C740
C740
10U
10U
C722
C722
10U
10U
10U
10U
C458
C458
2
10U
10U
10U
10U
VCC_CORE
VCC_CORE
C731
C731
.1U
.1U
C475
C475
+
+
+
+
C479
C479
C658
C658
150U/4V
150U/4V
C815
C815
150U/4V
150U/4V
C728
C728
.1U
.1U
C718
C718
10U
10U
10U
10U
VCC_CORE
VCC_CORE VCC_CORE
C478
C478
+VCCP
+
+
+
+
C737
C737
.1U
.1U
C457
C457
10U
10U
C723
C723
10U
10U
C801
C801
150U/4V
150U/4V
C470
C470
150U/4V
150U/4V
.1U
.1U
+VCCP
T206 T206
T205 T205
BSEL0
BSEL1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
U51C
U51C
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCQ0
W4
VCCQ1
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
C16
BSEL0
C14
BSEL1
E1
PSI
R6
VSS100
R22
VSS101
R25
VSS102
T3
VSS103
T5
VSS104
T21
VSS105
T23
VSS106
T26
VSS107
U2
VSS108
U6
VSS109
U22
VSS110
U24
VSS111
V1
VSS112
V4
VSS113
V5
VSS114
V21
VSS115
V25
VSS116
W3
VSS117
W6
VSS118
W22
VSS119
Dothan Processor
Dothan Processor
DOTHAN (POWER & NC)
DOTHAN (POWER & NC)
DOTHAN (POWER & NC)
Dothan
Dothan
3 OF 3
3 OF 3
POWER, GROUND AND NC
POWER, GROUND AND NC
VID
VID
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
7
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
54 2 Monday, August 22, 2005
54 2 Monday, August 22, 2005
54 2 Monday, August 22, 2005
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
of
of
of
8
B2A
B2A
B2A
1
U46E
U46E
AF23
VSS136
H23
VSS137
AL22
VSS138
AH22
VSS139
J22
VSS140
E22
VSS141
D22
VSS142
A22
VSS143
AN21
VSS144
AF21
VSS145
F21
VSS146
C21
VSS147
AK20
VSS148
V20
VSS149
G20
VSS150
A A
B B
C C
D D
F20
VSS151
E20
VSS152
D20
VSS153
A20
VSS154
AN19
VSS155
AG19
VSS156
W19
VSS157
T19
VSS158
J19
VSS159
H19
VSS160
C19
VSS161
AL18
VSS162
U18
VSS163
B18
VSS164
A18
VSS165
AN17
VSS166
AJ17
VSS167
AF17
VSS168
G17
VSS169
C17
VSS170
AL16
VSS171
K16
VSS172
H16
VSS173
D16
VSS174
A16
VSS175
K15
VSS176
C15
VSS177
AN14
VSS178
AL14
VSS179
AJ14
VSS180
AG14
VSS181
K14
VSS182
J14
VSS183
F14
VSS184
B14
VSS185
A14
VSS186
J12
VSS187
D12
VSS188
B12
VSS189
AN11
VSS190
AL11
VSS191
AJ11
VSS192
AG11
VSS193
AF11
VSS194
AA11
VSS195
Y11
VSS196
H11
VSS197
F11
VSS198
AA10
VSS199
Y10
VSS200
L10
VSS201
D10
VSS202
AN9
VSS203
AH9
VSS204
AE9
VSS205
AC9
VSS206
AA9
VSS207
V9
VSS208
T9
VSS209
K9
VSS210
H9
VSS211
A9
VSS212
AL8
VSS213
Y8
VSS214
P8
VSS215
L8
VSS216
E8
VSS217
C8
VSS218
AN7
VSS219
AK7
VSS220
AG7
VSS221
AA7
VSS222
V7
VSS223
G7
VSS224
AJ6
VSS225
AE6
VSS226
AC6
VSS227
AA6
VSS228
T6
VSS229
P6
VSS230
L6
VSS231
J6
VSS232
B6
VSS233
AP5
VSS234
AL5
VSS235
W5
VSS236
E5
VSS237
AN4
VSS238
AF4
VSS239
Y4
VSS240
U4
VSS241
P4
VSS242
L4
VSS243
H4
VSS244
C4
VSS245
AJ3
VSS246
AC3
VSS247
AB3
VSS248
AA3
VSS249
C3
VSS250
A3
VSS251
AN2
VSS252
AL2
VSS253
AH2
VSS254
AE2
VSS255
AD2
VSS256
V2
VSS257
T2
VSS258
P2
VSS259
L2
VSS260
B27
VSS261
J26
VSS262
G26
VSS263
E26
VSS264
A26
VSS265
AN24
VSS266
AL24
VSS267
J2
VSS268
G2
VSS269
D2
VSS270
Y1
VSS271
B36
VSSALVDS
1
VSS
VSS
2
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
ALVISO
ALVISO
2
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
AG37
Y37
V37
T37
P37
M37
K37
H37
E37
AN36
AL36
AJ36
AF36
AE36
AD36
AC36
AB36
AA36
C36
AE35
Y35
W35
V35
U35
T35
R35
P35
N35
M35
L35
K35
J35
H35
G35
F35
E35
D35
B35
AN34
AH34
AD34
AC34
AB34
AA34
C34
AL33
AF33
AD33
W33
V33
U33
T33
R33
P33
N33
M33
L33
K33
J33
H33
G33
F33
E33
D33
AN32
AJ32
AD32
AC32
AB32
AA32
Y32
C32
A32
AL31
AG31
AD31
W31
V31
U31
T31
R31
P31
N31
M31
L31
K31
J31
H31
G31
F31
E31
D31
AP30
AE30
AC30
AB30
AA30
Y30
C30
AM29
AJ29
AG29
AD29
AA29
W29
V29
U29
P29
L29
H29
G29
F29
E29
D29
A29
AC28
AB28
AA28
W28
E28
AN27
AL27
AJ27
AG27
AF27
AB27
AA27
W27
G27
E27
AJ24
AG24
J24
F24
D24
B24
+VCCP
+VCCP
+VCCP
+VCCP
3
3
HXRCOMP
R478
R478
24.9/F
24.9/F
R225
R225
54.9/F
54.9/F
HXSCOMP
R474
R474
221/F
221/F
R475
R475
100/F
100/F
HYRCOMP
R226
R226
24.9/F
24.9/F
R227
R227
54.9/F
54.9/F
HYSCOMP
R220
R220
221/F
221/F
R223
R223
100/F
100/F
HXSWING
C664
C664
.1U
.1U
HYSWING
C403
C403
.1U
.1U
4
HD#[0..63] (4)
HD#[0..63]
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HXRCOMP
HXSCOMP
HXSWING
HYRCOMP
HYSCOMP
HYSWING
4
5
U46A
U46A
E4
HD0#
E1
HD1#
F4
HD2#
H7
HD3#
E2
HD4#
F1
HD5#
E3
HD6#
D3
HD7#
K7
HD8#
F2
HD9#
J7
HD10#
J8
HD11#
H6
HD12#
F3
HD13#
K8
HD14#
H5
HD15#
H1
HD16#
H2
HD17#
K5
HD18#
K6
HD19#
J4
HD20#
G3
HD21#
H3
HD22#
J1
HD23#
L5
HD24#
K4
HD25#
J5
HD26#
P7
HD27#
L7
HD28#
J3
HD29#
P5
HD30#
L3
HD31#
U7
HD32#
V6
HD33#
R6
HD34#
R5
HD35#
P3
HD36#
T8
HD37#
R7
HD38#
R8
HD39#
U8
HD40#
R4
HD41#
T4
HD42#
T5
HD43#
R1
HD44#
T3
HD45#
V8
HD46#
U6
HD47#
W6
HD48#
U3
HD49#
V5
HD50#
W8
HD51#
W7
HD52#
U2
HD53#
U1
HD54#
Y5
HD55#
Y2
HD56#
V4
HD57#
Y7
HD58#
W1
HD59#
W3
HD60#
Y3
HD61#
Y6
HD62#
W2
HD63#
C1
HXRCOMP
C2
HXSCOMP
D1
HXSWING
T1
HYRCOMP
L1
HYSCOMP
P1
HYSWING
ALVISO
ALVISO
5
HOST
HOST
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HADS#
HADSTB0#
HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
HCLKINN
HCLKINP
HDBSY#
HDEFER#
HDINV#0
HDINV#1
HDINV#2
HDINV#3
HDPWR#
HDRDY#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#
HDSTBP0#
HDSTBP1#
HDSTBP2#
HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0#
HRS1#
HRS2#
HCPUSLP#
HTRDY#
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
F8
B9
E13
J11
A5
D5
E7
H10
AB1
AB2
C6
E6
H8
K3
T7
U5
G6
F7
G4
K1
R3
V3
G5
K2
R2
W4
F6
D4
D6
B3
A11
A7
D7
B8
C7
A8
A4
C5
B4
G8
B5
6
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HCPUSLP#_GMCH
HA#[3..31]
HA#[3..31] (4)
ADS# (4)
HADSTB0# (4)
HADSTB1# (4)
BNR# (4)
BPRI# (4)
HBREQ0# (4)
CPURST# (4)
HCLK_MCH# (3)
HCLK_MCH (3)
DBSY# (4)
DEFER# (4)
HDBI0# (4)
HDBI1# (4)
HDBI2# (4)
HDBI3# (4)
DPWR# (4)
DRDY# (4)
HDSTBN0# (4)
HDSTBN1# (4)
HDSTBN2# (4)
HDSTBN3# (4)
HDSTBP0# (4)
HDSTBP1# (4)
HDSTBP2# (4)
HDSTBP3# (4)
HIT# (4)
HITM# (4)
HLOCK# (4)
HREQ#0 (4)
HREQ#1 (4)
HREQ#2 (4)
HREQ#3 (4)
HREQ#4 (4)
RS#0 (4)
RS#1 (4)
RS#2 (4)
HTRDY# (4)
7
HVREF
T82T82
T104T104
R244 0R R244 0R
+VCCP
R224
R224
100/F
100/F
R228
R228
200/F
200/F
C398
C398
.1U
.1U
CPUSLP# (4,18)
DO NOT INSTALL FOR DOTHAN-A AND INSTALL FOR DOTHAN-B(R244)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO_A (HOST)
ALVISO_A (HOST)
ALVISO_A (HOST)
Date: Sheet
Date: Sheet
6
Date: Sheet
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
7
8
B2A
B2A
64 2 Monday, August 22, 2005
64 2 Monday, August 22, 2005
64 2 Monday, August 22, 2005
8
B2A
of
of
of
1
DMI_TXN0 (19)
DMI_TXN1 (19)
DMI_TXN2 (19)
A A
B B
C C
R207
R207
*40.2/F
*40.2/F
Route as short
as possible.
+1.8VSUS
R196
R196
80.6/F
80.6/F
D D
R203
R203
80.6/F
80.6/F
DMI_TXN3 (19)
DMI_TXP0 (19)
DMI_TXP1 (19)
DMI_TXP2 (19)
DMI_TXP3 (19)
DMI_RXN0 (19)
DMI_RXN1 (19)
DMI_RXN2 (19)
DMI_RXN3 (19)
DMI_RXP0 (19)
DMI_RXP1 (19)
DMI_RXP2 (19)
DMI_RXP3 (19)
CLK_SDRAM0 (10)
CLK_SDRAM1 (10)
CLK_SDRAM3 (10)
CLK_SDRAM4 (10)
CLK_SDRAM0# (10)
CLK_SDRAM1# (10)
CLK_SDRAM3# (10)
CLK_SDRAM4# (10)
CKE0 (10,11)
CKE1 (10,11)
CKE2 (10,11)
CKE3 (10,11)
SM_CS0# (10,11)
SM_CS1# (10,11)
SM_CS2# (10,11)
SM_CS3# (10,11)
M_ODT0 (10,11)
M_ODT1 (10,11)
M_ODT2 (10,11)
M_ODT3 (10,11)
SMXSLEW
SMYSLEW
It's point to point,
55ohm trace, keep as
short as possible.
R206
R206
*40.2/F
*40.2/F
M_RCOMPN
M_RCOMPP
T58T58
T65T65
T59T59
T64T64
CKE0
CKE1
CKE2
CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDCOMP0
M_OCDCOMP1
M_RCOMPN
M_RCOMPP
SMVREF_MCH
+2.5V
R241 10K R241 10K
R240 10K R240 10K
Place Close to MCH
1
2
CFG[0:2]=100 FOR FSB 533
CFG[0:2]=101 FOR FSB 400
U46C
U46C
AA31
DMIRXN0
AB35
DMIRXN1
AC31
DMIRXN2
AD35
DMIRXN3
Y31
DMIRXP0
AA35
DMIRXP1
AB31
DMIRXP2
AC35
DMIRXP3
AA33
DMITXN0
AB37
DMITXN1
AC33
DMITXN2
AD37
AA37
AB33
AC37
AM33
AE11
AJ34
AC10
AN33
AE10
AJ33
AD10
AP21
AM21
AH21
AK21
AN16
AM14
AH15
AG16
AF22
AF16
AP14
AL15
AM11
AN10
AK10
AK11
AF37
AD1
AE27
AE28
AF10
Y33
AL1
AF6
AK1
AF5
AF9
DMITXN3
DMITXP0
DMITXP1
DMITXP2
DMITXP3
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
ALVISO
ALVISO
+1.8VSUS
2
PM_EXTTS#0
PM_EXTTS#1
R180
R180
10K/F
10K/F
SMVREF_MCH
R205
R205
10K/F
10K/F
DMI DDR MUXING
DMI DDR MUXING
C336
C336
.1U
.1U
CFG/RSVD PM LCK NC
CFG/RSVD PM LCK NC
THRMTRIP#
DREF_CLKN
DREF_CLKP
DREF_SSCLKN
DREF_SSCLKP
C325
C325
2.2U
2.2U
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
BM_BUSY#
EXT_TS0#
EXT_TS1#
PWROK
RSTIN#
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
TXLCLKOUT+ (28)
TXLCLKOUT- (28)
TXLOUT0+ (28)
TXLOUT0- (28)
TXLOUT1- (28)
TXLOUT1+ (28)
TXLOUT2+ (28)
TXLOUT2- (28)
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
J23
J21
H22
F5
AD30
AE29
A24
A23
C37
D37
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
3
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_EXTTS#0
PM_EXTTS#1
DOT96#
DOT96
DREFSSCLK#
DREFSSCLK
TP_NC1
TP_NC2
TP_NC3
TP_NC4
TP_NC5
TP_NC6
TP_NC7
TP_NC8
TP_NC9
TP_NC10
TP_NC11
DISP_ON (12,15,28)
BLON (12,28)
3
T85T85
T93T93
T70T70
T98T98
T89T89
T97T97
T81T81
T103 T103
T71T71
T74T74
T72T72
T86T86
T76T76
T87T87
T73T73
T80T80
T75T75
T101 T101
T105 T105
T78T78
R255 0R R255 0R
R183 100R R183 100R
T144 T144
T143 T143
T137 T137
T147 T147
T141 T141
T139 T139
T184 T184
T187 T187
T185 T185
T190 T190
T188 T188
BLON
TXLCLKOUT+
TXLCLKOUT-
TXLOUT0+
TXLOUT0-
TXLOUT1ÂTXLOUT1+
TXLOUT2+
TXLOUT2-
R231 4.7K R231 4.7K
R245 0R R245 0R
R246 0R R246 0R
R234 *1K R234 *1K
R230 *1K R230 *1K
R237 1K R237 1K
R239 1K R239 1K
DOT96# (3)
DOT96 (3)
DREFSSCLK# (3)
DREFSSCLK (3)
4
+VCCP
FOR DDR533
Low=DMIx2
High=DMIx4
FOR CPU533
SELPSB1_CLK (3,5)
SELPSB2_CLK (3,5)
INT_TV_COMP (17)
INT_TV_Y/G (17)
INT_TV_C/R (17)
R232 *INT@4.99K/F R232 *INT@4.99K/F
5
SDVO_CTRLDATA (16)
SDVO_CTRLCLK (16)
CLK_MCH_3GPLL# (3)
CLK_MCH_3GPLL (3)
INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R
TV_REFSET
INT VGA Staff
INT_DDCCLK (17)
INT_DDCDAT (17)
INT_VGA_BLU (17)
INT_VGA_GRN (17)
INT_VGA_RED (17)
INT_VSYNC (17)
INT_HSYNC (17)
INT_DDCCLK
INT_DDCDAT
INT_VGA_BLU
INT_VGA_GRN
INT_VGA_RED
INT_VSYNC
INT_HSYNC
INT VGA Staff
INT_DISP_ON
INT_TXLCLKOUT+
INT_TXLCLKOUT-
INT_TXLOUT0+
INT_TXLOUT0-
INT_TXLOUT1ÂINT_TXLOUT1+
INT_TXLOUT2+
INT_TXLOUT2-
REFSET
INT_BLON
I_EDIDCLK (28)
I_EDIDDATA (28)
INT_TXLCLKOUTÂINT_TXLCLKOUT+
INT_TXLOUT0ÂINT_TXLOUT1ÂINT_TXLOUT2-
INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+
R229 *INT@255/F R229 *INT@255/F
R242 *INT@1.5K/F R242 *INT@1.5K/F
PM_BMBUSY# (19)
THERMTRIP# (4,18)
IMVP_PWRGD_NB (19)
PLTRST# (12,16,18,19,26,27,32,33)
INT VGA Staff
R483 *INT@150/F R483 *INT@150/F
R480 *INT@150/F R480 *INT@150/F
R481 *INT@150/F R481 *INT@150/F
R484 *INT@150/F R484 *INT@150/F
R485 *INT@150/F R485 *INT@150/F
R482 *INT@150/F R482 *INT@150/F
R233 *INT@0R R233 *INT@0R
R235 *INT@0R R235 *INT@0R
RN13 *INT@0X2 RN13 *INT@0X2
RN14 *INT@0X2 RN14 *INT@0X2
RN15 *INT@0X2 RN15 *INT@0X2
RN12 *INT@0X2 RN12 *INT@0X2
INT_TV_C/R
INT_TV_COMP
INT_TV_Y/G
INT_VGA_RED
INT_VGA_GRN
INT_VGA_BLU
241
241
241
241
INT_DISP_ON DISP_ON
INT_BLON
R236
R236
*INT@100K
*INT@100K
3
3
3
3
EXT VGA Staff(Place back RN12/RN13/RN14/RN15)
RN3 EXT@0X2 RN3 EXT@0X2
3
1
RN2 EXT@0X2 RN2 EXT@0X2
3
1
RN1 EXT@0X2 RN1 EXT@0X2
1
3
RN4 EXT@0X2 RN4 EXT@0X2
3
1
4
4
2
4
2
2
4
4
2
EXT_TXLCLKOUTÂEXT_TXLCLKOUT+
EXT_TXLOUT0+
EXT_TXLOUT0-
EXT_TXLOUT1ÂEXT_TXLOUT1+
EXT_TXLOUT2ÂEXT_TXLOUT2+
5
T91T91
T92T92
T95T95
T100 T100
T83T83
T84T84
T96T96
T99T99
T79T79
T88T88
T94T94
T106 T106
T77T77
T90T90
U46F
U46F
H24
SDVOCTRL_DATA
H25
SDVOCTRL_CLK
AB29
GCLKN
AC29
GCLKP
A15
TVDAC_A
C16
TVDAC_B
A17
TVDAC_C
J18
TV_REFSET
B15
TV_IRTNA
B16
TV_IRTNB
B17
TV_IRTNC
E24
DDCCLK
E23
DDCDATA
E21
BLUE
D21
BLUE#
C20
GREEN
B20
GREEN#
A19
RED
B19
RED#
H21
VSYNC
G21
HSYNC
J20
REFSET
E25
LBKLT_CTRL
F25
LBKLT_EN
C23
LCTLA_CLK
C22
LCTLB_DATA
F23
LDDC_CLK
F22
LDDC_DATA
F26
LVDD_EN
C33
LIBG
C31
LVBG
F28
LVREFH
F27
LVREFL
B30
LACLKN
B29
LACLKP
C25
LBCLKN
C24
LBCLKP
B34
LADATAN0
B33
LADATAN1
B32
LADATAN2
A34
LADATAP0
A33
LADATAP1
B31
LADATAP2
C29
LBDATAN0
D28
LBDATAN1
C27
LBDATAN2
C28
LBDATAP0
D27
LBDATAP1
C26
LBDATAP2
EXT_TXLCLKOUT- (12)
EXT_TXLCLKOUT+ (12)
EXT_TXLOUT0+ (12)
EXT_TXLOUT0- (12)
EXT_TXLOUT1- (12)
EXT_TXLOUT1+ (12)
EXT_TXLOUT2- (12)
EXT_TXLOUT2+ (12)
ALVISO
ALVISO
6
MISC
MISC
TV VGA LVDS
TV VGA LVDS
6
EXP_COMPI
EXP_ICOMPO
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
EXP_TXN8
EXP_TXN9
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
EXP_TXP0
EXP_TXP1
EXP_TXP2
EXP_TXP3
EXP_TXP4
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
INT VGA Staff(Place back
C681/C667/C673/C659/C683/C671/C675/C662)
CGMCHEXP_TXP0
CGMCHEXP_TXN0 SDVOB_RÂCGMCHEXP_TXP1
CGMCHEXP_TXN1
CGMCHEXP_TXP2
CGMCHEXP_TXN2
CGMCHEXP_TXP3
CGMCHEXP_TXN3
7
GMCHEXP_TXP[15..0] (12)
GMCHEXP_TXN[15..0] (12)
GMCHEXP_RXP[15..0] (12,16)
GMCHEXP_RXN[15..0] (12,16)
D36
D34
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
7
R219 24.9/F R219 24.9/F
GMCHEXP_RXN0
GMCHEXP_RXN1
GMCHEXP_RXN2
GMCHEXP_RXN3
GMCHEXP_RXN4
GMCHEXP_RXN5
GMCHEXP_RXN6
GMCHEXP_RXN7
GMCHEXP_RXN8
GMCHEXP_RXN9
GMCHEXP_RXN10
GMCHEXP_RXN11
GMCHEXP_RXN12
GMCHEXP_RXN13
GMCHEXP_RXN14
GMCHEXP_RXN15
GMCHEXP_RXP0
GMCHEXP_RXP1
GMCHEXP_RXP2
GMCHEXP_RXP3
GMCHEXP_RXP4
GMCHEXP_RXP5
GMCHEXP_RXP6
GMCHEXP_RXP7
GMCHEXP_RXP8
GMCHEXP_RXP9
GMCHEXP_RXP10
GMCHEXP_RXP11
GMCHEXP_RXP12
GMCHEXP_RXP13
GMCHEXP_RXP14
GMCHEXP_RXP15
CGMCHEXP_TXN0
CGMCHEXP_TXN1 GMCHEXP_TXN1
CGMCHEXP_TXN2
CGMCHEXP_TXN3
CGMCHEXP_TXN4
CGMCHEXP_TXN5
CGMCHEXP_TXN6
CGMCHEXP_TXN7
CGMCHEXP_TXN9
CGMCHEXP_TXN10
CGMCHEXP_TXN11
CGMCHEXP_TXN12
CGMCHEXP_TXN13
CGMCHEXP_TXN15
CGMCHEXP_TXP0
CGMCHEXP_TXP1
CGMCHEXP_TXP2
CGMCHEXP_TXP3
CGMCHEXP_TXP4
CGMCHEXP_TXP5
CGMCHEXP_TXP6
CGMCHEXP_TXP7
CGMCHEXP_TXP8
CGMCHEXP_TXP9
CGMCHEXP_TXP10
CGMCHEXP_TXP11
CGMCHEXP_TXP12
CGMCHEXP_TXP13
CGMCHEXP_TXP15
C420 *INT@.1U C420 *INT@.1U
C418 *INT@.1U C418 *INT@.1U
C409 *INT@.1U C409 *INT@.1U
C406 *INT@.1U C406 *INT@.1U
C414 *INT@.1U C414 *INT@.1U
C412 *INT@.1U C412 *INT@.1U
C404 *INT@.1U C404 *INT@.1U
C399 *INT@.1U C399 *INT@.1U
ALVISO_B (DMI & PCIE)
ALVISO_B (DMI & PCIE)
ALVISO_B (DMI & PCIE)
C681 EXT@.1U C681 EXT@.1U
C667 EXT@.1U C667 EXT@.1U
C673 EXT@.1U C673 EXT@.1U
C659 EXT@.1U C659 EXT@.1U
C417 EXT@.1U C417 EXT@.1U
C653 EXT@.1U C653 EXT@.1U
C411 EXT@.1U C411 EXT@.1U
C643 EXT@.1U C643 EXT@.1U
C405 EXT@.1U C405 EXT@.1U
C625 EXT@.1U C625 EXT@.1U
C602 EXT@.1U C602 EXT@.1U
C613 EXT@.1U C613 EXT@.1U
C632 EXT@.1U C632 EXT@.1U
C606 EXT@.1U C606 EXT@.1U
C608 EXT@.1U C608 EXT@.1U
C604 EXT@.1U C604 EXT@.1U
C683 EXT@.1U C683 EXT@.1U
C671 EXT@.1U C671 EXT@.1U
C675 EXT@.1U C675 EXT@.1U
C662 EXT@.1U C662 EXT@.1U
C422 EXT@.1U C422 EXT@.1U
C657 EXT@.1U C657 EXT@.1U
C413 EXT@.1U C413 EXT@.1U
C641 EXT@.1U C641 EXT@.1U
C408 EXT@.1U C408 EXT@.1U
C626 EXT@.1U C626 EXT@.1U
C601 EXT@.1U C601 EXT@.1U
C612 EXT@.1U C612 EXT@.1U
C631 EXT@.1U C631 EXT@.1U
C605 EXT@.1U C605 EXT@.1U
C607 EXT@.1U C607 EXT@.1U
C603 EXT@.1U C603 EXT@.1U
SDVOB_R+
SDVOB_G+
SDVOB_GÂSDVOB_B+
SDVOB_B-
SDVOB_CLK+
SDVOB_CLK-
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
8
VCC3G_PCIE
EXT VGA Staff
GMCHEXP_TXN0
GMCHEXP_TXN2
GMCHEXP_TXN3
GMCHEXP_TXN4
GMCHEXP_TXN5
GMCHEXP_TXN6
GMCHEXP_TXN7
GMCHEXP_TXN8 CGMCHEXP_TXN8
GMCHEXP_TXN9
GMCHEXP_TXN10
GMCHEXP_TXN11
GMCHEXP_TXN12
GMCHEXP_TXN13
GMCHEXP_TXN14 CGMCHEXP_TXN14
GMCHEXP_TXN15
GMCHEXP_TXP0
GMCHEXP_TXP1
GMCHEXP_TXP2
GMCHEXP_TXP3
GMCHEXP_TXP4
GMCHEXP_TXP5
GMCHEXP_TXP6
GMCHEXP_TXP7
GMCHEXP_TXP8
GMCHEXP_TXP9
GMCHEXP_TXP10
GMCHEXP_TXP11
GMCHEXP_TXP12
GMCHEXP_TXP13
GMCHEXP_TXP14 CGMCHEXP_TXP14
GMCHEXP_TXP15
SDVOB_R+ (16)
SDVOB_R- (16)
SDVOB_G+ (16)
SDVOB_G- (16)
SDVOB_B+ (16)
SDVOB_B- (16)
SDVOB_CLK+ (16)
SDVOB_CLK- (16)
of
of
of
74 2 Monday, August 22, 2005
74 2 Monday, August 22, 2005
74 2 Monday, August 22, 2005
8
B2A
B2A
B2A
1
A A
2
3
4
5
6
7
8
R_A_MD[0..63] (10)
B B
C C
R_A_MD0
R_A_MD1
R_A_MD2
R_A_MD3
R_A_MD4
R_A_MD5
R_A_MD6
R_A_MD7
R_A_MD8
R_A_MD9
R_A_MD10
R_A_MD11
R_A_MD12
R_A_MD13
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17
R_A_MD18
R_A_MD19
R_A_MD20
R_A_MD21
R_A_MD22
R_A_MD23
R_A_MD24
R_A_MD25
R_A_MD26
R_A_MD27
R_A_MD28
R_A_MD29
R_A_MD30
R_A_MD31
R_A_MD32
R_A_MD33
R_A_MD34
R_A_MD35
R_A_MD37
R_A_MD38
R_A_MD39
R_A_MD40
R_A_MD41
R_A_MD42
R_A_MD43
R_A_MD44
R_A_MD45
R_A_MD46
R_A_MD47
R_A_MD48
R_A_MD49
R_A_MD50
R_A_MD51
R_A_MD52
R_A_MD53
R_A_MD54
R_A_MD55
R_A_MD56
R_A_MD57
R_A_MD58
R_A_MD59
R_A_MD60
R_A_MD61
R_A_MD62
R_A_MD63
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
U46B
U46B
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
SA_BS0#
SA_BS1#
SA_BS2#
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
ALVISO
ALVISO
AK15
AK16
AL21
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
AN15
AP16
AF29
AF28
AP15
R_A_BS0#
R_A_BS1#
R_A_BS2#
R_A_DM0
R_A_DM1
R_A_DM2
R_A_DM3
R_A_DM4
R_A_DM5
R_A_DM6
R_A_DM7
R_A_DQS0
R_A_DQS1
R_A_DQS2
R_A_DQS3
R_A_DQS4
R_A_DQS5
R_A_DQS6
R_A_DQS7
R_A_DQS#0
R_A_DQS#1
R_A_DQS#2
R_A_DQS#3
R_A_DQS#4
R_A_DQS#5
R_A_DQS#6
R_A_DQS#7
R_A_MA0
R_A_MA1
R_A_MA2
R_A_MA3
R_A_MA4
R_A_MA5
R_A_MA6
R_A_MA7
R_A_MA8
R_A_MA9
R_A_MA10
R_A_MA11
R_A_MA12
R_A_MA13
R_A_SCASA#
R_A_SRASA#
SA_RCVENIN#
SA_RCVENOUT#
R_A_BMWEA#
R_A_BS0# (10,11)
R_A_BS1# (10,11)
R_A_BS2# (10,11)
R_A_DM[0..7] (10)
R_A_DQS[0..7] (10)
R_A_DQS#[0..7] (10)
R_A_MA[0..13] (10,11)
R_A_SCASA# (10,11)
R_A_SRASA# (10,11)
R_A_BMWEA# (10,11)
R_B_MD[0..63] (10)
T63T63
R_B_MD0
R_B_MD1
R_B_MD2
R_B_MD3
R_B_MD4
R_B_MD5
R_B_MD6
R_B_MD7
R_B_MD8
R_B_MD9
R_B_MD10
R_B_MD11
R_B_MD12
R_B_MD13
R_B_MD14
R_B_MD15
R_B_MD16
R_B_MD17
R_B_MD18
R_B_MD19
R_B_MD20
R_B_MD21
R_B_MD22
R_B_MD23
R_B_MD24
R_B_MD25
R_B_MD26
R_B_MD27
R_B_MD28
R_B_MD29
R_B_MD30
R_B_MD31
R_B_MD32
R_B_MD33
R_B_MD34
R_B_MD35
R_B_MD36 R_A_MD36
R_B_MD37
R_B_MD38
R_B_MD39
R_B_MD40
R_B_MD41
R_B_MD42
R_B_MD43
R_B_MD44
R_B_MD45
R_B_MD46
R_B_MD47
R_B_MD48
R_B_MD49
R_B_MD50
R_B_MD51
R_B_MD52
R_B_MD53
R_B_MD54
R_B_MD55
R_B_MD56
R_B_MD57
R_B_MD58
R_B_MD59
R_B_MD60
R_B_MD61
R_B_MD62
R_B_MD63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AK9
AK6
AH5
AK8
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U46G
U46G
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
AJ9
SBDQ38
SBDQ39
AJ7
SBDQ40
SBDQ41
AJ4
SBDQ42
SBDQ43
SBDQ44
AJ8
SBDQ45
AJ5
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
SB_BS0#
SB_BS1#
SB_BS2#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
ALVISO
ALVISO
AJ15
AG17
AG21
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
AH14
AK14
AF15
AF14
AH16
R_B_BS0#
R_B_BS1#
R_B_BS2#
R_B_DM0
R_B_DM1
R_B_DM2
R_B_DM3
R_B_DM4
R_B_DM5
R_B_DM6
R_B_DM7
R_B_DQS0
R_B_DQS1
R_B_DQS2
R_B_DQS3
R_B_DQS4
R_B_DQS5
R_B_DQS6
R_B_DQS7
R_B_DQS#0
R_B_DQS#1
R_B_DQS#2
R_B_DQS#3
R_B_DQS#4
R_B_DQS#5
R_B_DQS#6
R_B_DQS#7
R_B_MA0
R_B_MA1
R_B_MA2
R_B_MA3
R_B_MA4
R_B_MA5
R_B_MA6
R_B_MA7
R_B_MA8
R_B_MA9
R_B_MA10
R_B_MA11
R_B_MA12
R_B_MA13
R_B_SCASA#
R_B_SRASA#
SB_RCVENIN#
SB_RCVENOUT#
R_B_BMWEA#
R_B_BS0# (10,11)
R_B_BS1# (10,11)
R_B_BS2# (10,11)
R_B_DM[0..7] (10)
R_B_DQS[0..7] (10)
R_B_DQS#[0..7] (10)
R_B_MA[0..13] (10,11)
R_B_SCASA# (10,11)
R_B_SRASA# (10,11)
R_B_BMWEA# (10,11)
T60T60 T62T62
T61T61
D D
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO_C (DDR2)
ALVISO_C (DDR2)
ALVISO_C (DDR2)
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
7
B2A
B2A
84 2 Monday, August 22, 2005
84 2 Monday, August 22, 2005
84 2 Monday, August 22, 2005
of
of
of
8
B2A
5
4
3
2
1
+VCCP
C390
C390
C381
C381
C400
C400
C363
C363
.1U
.1U
D D
L28 10UH L28 10UH
+1.5V
L52 10UH L52 10UH
+1.5V
C C
L23 1UH L23 1UH
+1.5V
L21 1UH L21 1UH
+1.5V
R611 EXT@0R R611 EXT@0R
+VCCP
D34 *INT@CH551 D34 *INT@CH551
+2.5V
+2.5V
2 1
L69 *INT@BLM18PG181SN1 L69 *INT@BLM18PG181SN1
R583 *INT@0R R583 *INT@0R
+VCCP
68mA
B B
INT VGA Staff All(C831 0.1U / R611 NC)
EXT VGA Staff R611/C831 0ohm
A A
.1U
.1U
.1U
.1U
VCCA_DPLLA
C424
C424
.1U
.1U
VCCA_DPLLB
C701
C701
.1U
.1U
C331
C331
.1U
.1U
C307
C307
.1U
.1U
R582 *INT@10R R582 *INT@10R
C829
C829
*INT@.022U
*INT@.022U
C831
C831
EXT@0R
EXT@0R
10U
10U
+
+
+
+
+
+
+
+
C437 .47U/25V C437 .47U/25V
C674 .47U/25V C674 .47U/25V
C350 .22U C350 .22U
C407 .22U C407 .22U
+VCCP
C387
C387
2.2U
2.2U
C434
C434
470U/2.5V
470U/2.5V
C431
C431
470U/2.5V
470U/2.5V
C377
C377
150U/4V
150U/4V
C292
C292
150U/4V
150U/4V
C832
C832
*INT@10U
*INT@10U
C386
C386
10U
10U
C830
C830
*INT@.1U
*INT@.1U
C365
C365
4.7U/10V
4.7U/10V
C401
C401
10U
10U
+1.5V
+VCCP
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2
VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
C374
C374
.022U
.022U
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
C364
C364
.1U
.1U
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
AC2
AC1
B23
C35
AA1
AA2
F19
E19
G19
H20
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
U46H
U46H
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCCH_MPLL1
VCCH_MPLL0
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VCCA_CRTDAC0
VCCA_CRTDAC1
VVSSA_CRTDAC
VCC_SYNC
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
ALVISO
ALVISO
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCDQ_TVDAC
POWER
POWER
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCA_LVDS
VCCHV0
VCCHV1
VCCHV2
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GBG
VSSA_3GBG
F17
E17
D18
C18
F18
E18
H18
G18
D19
H17
B26
B25
A25
A35
B22
B21
A21
AM37
AH37
AP29
AD28
AD27
AC27
AP26
AN26
AM26
AL26
AK26
AJ26
AH26
AG26
AF26
AE26
AP25
AN25
AM25
AL25
AK25
AJ25
AH25
AG25
AF25
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AE17
AE16
AE15
AE14
AP13
AN13
AM13
AL13
AK13
AJ13
AH13
AG13
AF13
AE13
AP12
AN12
AM12
AL12
AK12
AJ12
AH12
AG12
AF12
AE12
AD11
AC11
AB11
AB10
AB9
AP8
AM1
AE1
B28
A28
A27
AF20
AP19
AF19
AF18
AE37
W37
U37
R37
N37
L37
J37
Y29
Y28
Y27
F37
G37
VCC_TVDACA
VCC_TVDACB
VCC_TVDACC
VCC_TVBG
+1.5V
VCC_QTVDAC
V1.8_DDR_CAP6
V1.8_DDR_CAP3
V1.8_DDR_CAP4
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
+1.8VSUS
C353
C353
10U
10U
+2.5V
VCC_DDRDLL
VCC3G_PCIE
VCCA_3GPLL
C425
C425
.1U
.1U
C438
C438
.1U
.1U
Note: All VCCSM
pins shorted
internally.
C337
C337
10U
10U
Note: All VCCSM
pins shorted
internally.
C280 .1U C280 .1U
C285 .1U C285 .1U
C316 .1U C316 .1U
+2.5V
C415
C415
.1U
.1U
C703
C703
4.7U/10V
4.7U/10V
C435
C435
10U
10U
C277 .1U C277 .1U
C278 .1U C278 .1U
C609 .1U C609 .1U
+
+
C272
C272
*150U/4V
*150U/4V
C818
C818
EXT@0R
EXT@0R
+
+
150U/4V
150U/4V
+2.5V
+2.5V
C379
C379
C352
C352
.1U
.1U
+2.5V
C428
C426
C426
.1U
.1U
L64 *INT@BLM18PG181SN1 L64 *INT@BLM18PG181SN1
C819
C819
*INT@.1U
*INT@.1U
C373
C373
10U
10U
C428
.01U
.01U
INT VGA Staff All(C824/C827/C818/C822/C820 0.1U)
EXT VGA Staff C824/C827/C818/C822/C820 0 ohm
VCC_TVBG
C824
C824
EXT@0R
EXT@0R
VCC_QTVDAC
C827
C827
EXT@0R
EXT@0R
VCC_TVDACC
C822
C822
EXT@0R
EXT@0R
VCC_TVDACB
C820
C820
EXT@0R
EXT@0R
+
+
C269
C269
150U/4V
150U/4V
VCC3G_PCIE
C388
C388
10U
10U
R184 0.5/F R184 0.5/F
C357
C357
10U
10U
C430
C430
.1U
.1U
L67 *INT@BLM18PG181SN1 L67 *INT@BLM18PG181SN1
C825
C825
C826
C826
*INT@.1U
*INT@.1U
*INT@10U
*INT@10U
L68 *INT@BLM18PG181SN1 L68 *INT@BLM18PG181SN1
C828
C828
*INT@.1U
*INT@.1U
+3V
R593
R593
V1_5VFOLLOW VCC_TVDACA
*INT@10R
*INT@10R
L66 *INT@BLM18PG181SN1 L66 *INT@BLM18PG181SN1
C823
C823
*INT@.1U
*INT@.1U
L65 *INT@BLM18PG181SN1 L65 *INT@BLM18PG181SN1
C821
C821
*INT@.1U
*INT@.1U
L17 BLM18PG181SN1 L17 BLM18PG181SN1
C321
C321
.1U
.1U
L27 BLM18PG181SN1 L27 BLM18PG181SN1
C319
C319
.1U
.1U
L18 BLM18PG181SN1 L18 BLM18PG181SN1
+1.5V
C293
C293
10U
10U
D33 *INT@CH551 D33 *INT@CH551
2 1
+1.5V
+1.5V
U46D
U46D
+3V
+1.5V
AB26
AA26
AB25
AA25
AB24
AA24
AB23
AA23
AB22
AA22
AB21
AA21
AB20
AA20
AB19
AA19
AB18
AA18
AB17
AA17
AB16
AA16
AB15
AA15
AB14
AA14
AA13
AA12
W13
V13
U13
T13
R13
P13
N13
M13
L13
W12
V12
U12
T12
R12
P12
N12
M12
L12
Y26
Y25
Y24
Y23
Y22
Y21
R21
Y17
R17
Y16
W16
V16
U16
T16
R16
P16
N16
M16
L16
Y15
W15
V15
U15
T15
R15
P15
N15
M15
L15
Y14
W14
V14
U14
T14
R14
P14
N14
M14
L14
Y13
Y12
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
VSS_NCTF68
+VCCP
+1.5V
+3V
+3V
+1.5V
NCTF
NCTF
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
ALVISO
ALVISO
AD26
AC26
AD25
AC25
AD24
AC24
AD23
AC23
AD22
AC22
AD21
AC21
AD20
AC20
AD19
AC19
AD18
AC18
AD17
AC17
AD16
AC16
AD15
AC15
AD14
AC14
AD13
AC13
AB13
AD12
AC12
AB12
W26
V26
U26
T26
R26
P26
N26
M26
L26
W25
V25
U25
T25
R25
P25
N25
M25
L25
W24
V24
U24
T24
R24
P24
N24
M24
L24
W23
V23
U23
T23
R23
P23
N23
M23
L23
W22
V22
U22
T22
R22
P22
N22
M22
L22
W21
V21
U21
T21
P21
N21
M21
L21
Y20
R20
P20
N20
M20
L20
Y19
R19
P19
N19
M19
L19
Y18
R18
P18
N18
M18
L18
W17
V17
U17
T17
P17
N17
M17
L17
+1.8VSUS
+VCCP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ALVISO_D (POWER)
ALVISO_D (POWER)
ALVISO_D (POWER)
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
94 2 Monday, August 22, 2005
94 2 Monday, August 22, 2005
94 2 Monday, August 22, 2005
of
of
1
of
B2A
B2A
B2A
1
+1.8VSUS +1.8VSUS
R_A_MD5
R_A_DQS#0
A A
B B
CKE0 (7,11)
R_A_BS2# (8,11)
R_A_BS0# (8,11)
R_A_BMWEA# (8,11)
R_A_SCASA# (8,11)
SM_CS1# (7,11)
M_ODT1 (7,11)
C C
D D
R_A_DQS0
R_A_MD3
R_A_MD7
R_A_MD12
R_A_MD9
R_A_DQS#1
R_A_DQS1
R_A_MD10
R_A_MD11
R_A_MD21
R_A_DQS#2
R_A_DQS2
R_A_MD18
R_A_MD22
R_A_MD28 R_A_MD25
R_A_DM3
R_A_MD26
R_A_MD27
CKE0
R_A_BS2#
R_A_MA12
R_A_MA9
R_A_MA8
R_A_MA5
R_A_MA3
R_A_MA1
R_A_MA10
R_A_BS0#
R_A_BMWEA#
R_A_SCASA#
SM_CS1#
M_ODT1
R_A_MD32
R_A_MD37
R_A_DQS#4
R_A_DQS4
R_A_MD34
R_A_MD35
R_A_MD40
R_A_MD41
R_A_DM5
R_A_MD47
R_A_MD46
R_A_MD57
R_A_MD60
R_A_DQS#7
R_A_DQS7
R_A_MD56
R_A_MD61
R_A_MD49
R_A_MD48
R_A_DM6
R_A_MD55
R_A_MD54
CGDAT_SMB
CGCLK_SMB
+3V
SMbus address A0
1
2
SMDDR_VREF SMDDR_VREF
JDIM2
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_5.2MM_RVS
PC4800_DDR2_5.2MM_RVS
2
VSS46
4
DQ4
DQ5
VSS15
DM0
VSS5
DQ6
DQ7
VSS16
DQ12
DQ13
VSS17
DM1
VSS53
CK0
CK0#
VSS41
DQ14
DQ15
VSS54
VSS20
DQ20
DQ21
VSS6
NC3
DM2
VSS21
DQ22
DQ23
VSS24
DQ28
DQ29
VSS25
DQS#3
DQS3
VSS10
DQ30
DQ31
VSS8
CKE1
VDD8
A15
A14
VDD11
A11
A7
A6
VDD4
A4
A2
A0
VDD12
BA1
RAS#
S0#
VDD1
ODT0
A13
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
NC2
VSS12
DQ36
DQ37
VSS28
DM4
VSS42
DQ38
DQ39
VSS55
DQ44
DQ45
VSS43
DQS#5
DQS5
VSS56
DQ46
DQ47
VSS44
DQ52
DQ53
VSS57
CK1
CK1#
VSS45
DM6
VSS32
DQ54
DQ55
VSS35
DQ60
DQ61
VSS7
DQS#7
DQS7
VSS36
DQ62
DQ63
VSS13
SA0
SA1
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
R_A_MD0 R_A_MD1
CLK_SDRAM0
CLK_SDRAM0#
R_A_BS1#
R_A_SRASA#
R_A_MD4
R_A_DM0
R_A_MD2
R_A_MD6
R_A_MD13
R_A_MD8
R_A_DM1
R_A_MD14
R_A_MD15
R_A_MD16
R_A_MD17 R_A_MD20
R_A_DM2
R_A_MD23
R_A_MD19
R_A_MD24 R_A_MD29
R_A_DQS#3
R_A_DQS3
R_A_MD30
R_A_MD31
CKE1
R_A_MA11
R_A_MA7
R_A_MA6
R_A_MA4
R_A_MA2
R_A_MA0
SM_CS0#
M_ODT0
R_A_MA13
R_A_MD36
R_A_MD33
R_A_DM4
R_A_MD38
R_A_MD39
R_A_MD44
R_A_MD45
R_A_DQS#5
R_A_DQS5
R_A_MD43
R_A_MD42
R_A_MD58
R_A_MD63
CLK_SDRAM1
CLK_SDRAM1#
R_A_DM7
R_A_MD62
R_A_MD59
R_A_MD53
R_A_MD52
R_A_DQS#6
R_A_DQS6
R_A_MD51
R_A_MD50
R145
R145
10K
10K
3
CLK_SDRAM0 (7)
CLK_SDRAM0# (7)
R_A_BS1# (8,11)
R_A_SRASA# (8,11)
SM_CS0# (7,11)
M_ODT0 (7,11)
R144
R144
10K
10K
R_A_DM[0..7] (8)
R_A_MD[0..63] (8)
R_A_DQS[0..7] (8)
R_A_DQS#[0..7] (8)
R_A_MA[0..13] (8,11)
CLK_SDRAM1 (7)
CLK_SDRAM1# (7)
CGDAT_SMB (3)
CGCLK_SMB (3)
CKE2 (7,11) CKE3 (7,11) CKE1 (7,11)
R_B_BS2# (8,11)
R_B_BS0# (8,11)
R_B_BMWEA# (8,11)
R_B_SCASA# (8,11)
SM_CS3# (7,11)
M_ODT3 (7,11)
SMbus address A1
4
+1.8VSUS +1.8VSUS
R_B_MD4
R_B_MD5
R_B_DQS#0
R_B_DQS0
R_B_MD2
R_B_MD3
R_B_MD8
R_B_MD9
R_B_DQS#1
R_B_DQS1
R_B_MD14 R_B_MD15
R_B_MD11
R_B_MD20 R_B_MD17
R_B_DQS#2
R_B_DQS2
R_B_MD22 R_B_MD19
R_B_MD28 R_B_MD25
R_B_DM3
R_B_MD26
R_B_MD27
CKE2
R_B_BS2#
R_B_MA12
R_B_MA9
R_B_MA5
R_B_MA3
R_B_MA1
R_B_MA10
R_B_BS0#
R_B_BMWEA#
R_B_SCASA#
SM_CS3#
M_ODT3
R_B_MD37
R_B_MD33
R_B_DQS#4
R_B_DQS4
R_B_MD34
R_B_MD35
R_B_MD40
R_B_MD41
R_B_DM5
R_B_MD47
R_B_DQS#6
R_B_DQS6
R_B_MD60 R_B_MD57
R_B_DM7
R_B_MD63
R_B_MD62
CGDAT_SMB
CGCLK_SMB
+3V
CLOCK 0,1,2
2
3
4
5
JDIM1
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800_DDR2_9.2MM_RVS
PC4800_DDR2_9.2MM_RVS
CLOCK 3,4,5
CKE 2,3 CKE 0,1
5
6
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
PC4800 DDR2 SDRAM
SO-DIMM (200P)
PC4800 DDR2 SDRAM
SO-DIMM (200P)
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
R_B_MD0
R_B_MD1
R_B_DM0
R_B_MD6
R_B_MD7
R_B_MD12
R_B_MD13
R_B_DM1
CLK_SDRAM3
CLK_SDRAM3#
R_B_MD10
R_B_MD16 R_B_MD21
R_B_DM2
R_B_MD18 R_B_MD23
R_B_MD24 R_B_MD29
R_B_DQS#3
R_B_DQS3
R_B_MD30
R_B_MD31
CKE3
R_B_MA11
R_B_MA7
R_B_MA6 R_B_MA8
R_B_MA4
R_B_MA2
R_B_MA0
R_B_BS1#
R_B_SRASA#
SM_CS2#
M_ODT2
R_B_MA13
R_B_MD36
R_B_MD32
R_B_DM4
R_B_MD38
R_B_MD39
R_B_MD44
R_B_MD45
R_B_DQS#5
R_B_DQS5
R_B_MD42
R_B_MD43 R_B_MD46
R_B_MD48 R_B_MD52
R_B_MD49 R_B_MD53
CLK_SDRAM4
CLK_SDRAM4#
R_B_DM6
R_B_MD50 R_B_MD54
R_B_MD51 R_B_MD55
R_B_MD56 R_B_MD61
R_B_DQS#7
R_B_DQS7
R_B_MD58
R_B_MD59
R135
R135
10K
10K
+3V
R136
R136
10K
10K
6
R_B_DM[0..7] (8)
R_B_MD[0..63] (8)
R_B_DQS[0..7] (8)
R_B_DQS#[0..7] (8)
R_B_MA[0..13] (8,11)
CLK_SDRAM3 (7)
CLK_SDRAM3# (7)
R_B_BS1# (8,11)
R_B_SRASA# (8,11)
SM_CS2# (7,11)
M_ODT2 (7,11)
CLK_SDRAM4 (7)
CLK_SDRAM4# (7)
7
+1.8VSUS
+1.8VSUS
+1.8VSUS
+1.8VSUS
SMDDR_VREF SMDDR_VREF
C238
C238
.1U
.1U
Close to JDIMM1
C198
C198
C246
C246
2.2U
2.2U
2.2U
2.2U
C244
C244
C243
C243
.1U
.1U
.1U
.1U
Close to JDIMM2
C160
C160
C197
C197
2.2U
2.2U
2.2U
2.2U
C164
C164
C247
C247
.1U
.1U
.1U
.1U
C235
C235
2.2U
2.2U
C163
C163
.1U
.1U
C162
C162
.1U
.1U
2.2U
2.2U
2.2U
2.2U
C201
C201
C158
C158
C161
C161
.1U
.1U
C248
C248
.1U
.1U
2.2U
2.2U
2.2U
2.2U
C159
C159
+3V
C245
C245
+3V
C187
C187
.1U
.1U
C182
C182
2.2U
2.2U
C233
C233
2.2U
2.2U
2.2U
2.2U
2.2U
2.2U
C157
C157
C199
C199
C186
C186
2.2U
2.2U
8
C236
C236
.1U
.1U
C184
C184
.1U
.1U
Place Close to JDIMM1 Place Close to JDIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 SO-DIMM (200P)
DDR2 SO-DIMM (200P)
DDR2 SO-DIMM (200P)
Date: Sheet
Date: Sheet
Date: Sheet
7
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
10 42 Monday, August 22, 2005
10 42 Monday, August 22, 2005
10 42 Monday, August 22, 2005
of
of
of
8
B2A
B2A
B2A
1
A A
2
3
SMDDR_VTERM
C227
C227
.1U
.1U
C226
C226
.1U
.1U
4
C229
C229
.1U
.1U
C177
C177
.1U
.1U
C173
C173
.1U
.1U
C174
C174
.1U
.1U
5
C192
C192
.1U
.1U
C175
C175
.1U
.1U
C172
C172
.1U
.1U
C176
C176
.1U
.1U
6
C228
C228
C231
C231
.1U
.1U
.1U
.1U
C232
C232
.1U
.1U
7
8
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
SMDDR_VTERM
C188
R_A_MA[0..13] (8,10)
C230
C230
.1U
.1U
C213
C213
.1U
.1U
C208
C208
.1U
.1U
C191
C191
.1U
.1U
C185
C185
.1U
.1U
C212
C212
.1U
.1U
C211
C211
.1U
.1U
C215
C215
.1U
.1U
C214
C214
.1U
.1U
C209
C209
.1U
.1U
C190
C190
.1U
.1U
C189
C189
.1U
.1U
C188
.1U
.1U
R_B_MA[0..13] (8,10)
B B
R_B_BS1# (8,10)
R_A_BS2# (8,10)
CKE0 (7,10)
R_B_SRASA# (8,10)
SM_CS2# (7,10)
M_ODT1 (7,10)
SM_CS1# (7,10)
R_A_BS0# (8,10)
C C
M_ODT2 (7,10)
CKE1 (7,10)
R_B_BS2# (8,10)
CKE2 (7,10)
R_B_BS1#
R_B_MA0
R_A_BS2#
CKE0
R_A_MA6
R_A_MA2
R_B_SRASA#
SM_CS2#
M_ODT1
SM_CS1#
R_A_MA10
R_A_BS0#
M_ODT2
R_B_MA13
CKE1
R_A_MA7
R_B_MA7
R_B_MA11
R_B_BS2#
CKE2
R_B_MA2
R_B_MA4
R_B_MA5
R_B_MA8
2
RP5 56X2 RP5 56X2
4
2
RP23 56X2 RP23 56X2
4
2
RP17 56X2 RP17 56X2
4
2
RP6 56X2 RP6 56X2
4
4
RP22 56X2 RP22 56X2
2
4
RP25 56X2 RP25 56X2
2
2
RP7 56X2 RP7 56X2
4
2
RP15 56X2 RP15 56X2
4
2
RP3 56X2 RP3 56X2
4
2
RP13 56X2 RP13 56X2
4
2
RP4 56X2 RP4 56X2
4
2
RP8 56X2 RP8 56X2
4
1
3
1
3
1
3
1
3
3
1
3
1
1
3
1
3
1
3
1
3
1
3
1
3
Layout note: Place one cap close to every 2 pullup resistors terminated to SMDDR_VTERM
R_A_MA12
R_A_MA9
M_ODT3 (7,10)
SM_CS3# (7,10)
SMDDR_VTERM SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
R_B_SCASA# (8,10)
R_B_BMWEA# (8,10)
CKE3 (7,10)
R_A_BMWEA# (8,10)
R_A_SCASA# (8,10)
R_B_BS0# (8,10)
M_ODT3
SM_CS3#
R_B_SCASA#
R_B_BMWEA#
CKE3
R_B_MA6
R_B_MA12
R_B_MA9
R_A_MA5
R_A_MA8
R_A_MA11
R_A_MA4
R_A_BMWEA#
R_A_SCASA#
R_B_MA1
R_B_MA3
R_B_BS0#
R_B_MA10
2
RP24 56X2 RP24 56X2
4
2
RP12 56X2 RP12 56X2
4
2
RP11 56X2 RP11 56X2
4
2
RP2 56X2 RP2 56X2
4
2
RP14 56X2 RP14 56X2
4
2
RP26 56X2 RP26 56X2
4
2
RP16 56X2 RP16 56X2
4
4
RP28 56X2 RP28 56X2
2
2
RP9 56X2 RP9 56X2
4
2
RP10 56X2 RP10 56X2
4
1
3
1
3
1
3
1
3
1
3
1
3
1
3
3
1
1
3
1
3
SMDDR_VTERM
SMDDR_VTERM
R_A_MA3
R_A_MA1
SM_CS0# (7,10)
D D
R_A_SRASA# (8,10)
M_ODT0 (7,10)
R_A_BS1# (8,10)
1
SM_CS0#
R_A_SRASA#
R_A_MA13
M_ODT0
R_A_MA0
R_A_BS1#
2
4
RP27 56X2 RP27 56X2
2
4
RP19 56X2 RP19 56X2
2
2
RP20 56X2 RP20 56X2
4
2
RP18 56X2 RP18 56X2
4
3
1
3
1
1
3
1
3
3
SMDDR_VTERM
4
PROJECT : ZE1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR2 RES. ARRAY
DDR2 RES. ARRAY
DDR2 RES. ARRAY
Date: Sheet
Date: Sheet
5
Date: Sheet
6
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
of
of
of
11 42 Monday, August 22, 2005
11 42 Monday, August 22, 2005
7
11 42 Monday, August 22, 2005
8
B2A
B2A
B2A
5
GMCHEXP_TXP[0..15] (7)
GMCHEXP_TXN[0..15] (7)
GMCHEXP_RXP[0..15] (7,16)
GMCHEXP_RXN[0..15] (7,16)
D D
C C
R211 *EXT@200R R211 *EXT@200R
PLACE CLOSE TO GPU
+3V
L42 EXT@TB160808G301 L42 EXT@TB160808G301
C600
C600
EXT@4.7U
B B
EXT@4.7U
C599
C599
EXT@18P
EXT@18P
Y7
Y7
EXT@27MHZ
EXT@27MHZ
GMCHEXP_RXP0
GMCHEXP_RXN0
GMCHEXP_TXP0
GMCHEXP_TXN0
GMCHEXP_RXP1
GMCHEXP_RXN1
GMCHEXP_TXP1
GMCHEXP_TXN1
GMCHEXP_RXP2
GMCHEXP_RXN2
GMCHEXP_TXP2
GMCHEXP_TXN2
GMCHEXP_RXP3
GMCHEXP_RXN3
GMCHEXP_TXP3
GMCHEXP_TXN3
GMCHEXP_RXP4
GMCHEXP_RXN4
GMCHEXP_TXP4
GMCHEXP_TXN4
GMCHEXP_RXP5
GMCHEXP_RXN5
GMCHEXP_TXP5
GMCHEXP_TXN5
GMCHEXP_RXP6
GMCHEXP_RXN6
GMCHEXP_TXP6
GMCHEXP_TXN6
GMCHEXP_RXP7
GMCHEXP_RXN7
GMCHEXP_TXP7
GMCHEXP_TXN7
GMCHEXP_RXP8
GMCHEXP_RXN8
GMCHEXP_TXP8
GMCHEXP_TXN8
GMCHEXP_RXP9
GMCHEXP_RXN9
GMCHEXP_TXP9
GMCHEXP_TXN9
GMCHEXP_RXP10
GMCHEXP_RXN10
GMCHEXP_TXP10
GMCHEXP_TXN10
GMCHEXP_RXP11
GMCHEXP_RXN11
GMCHEXP_TXP11
GMCHEXP_TXN11
GMCHEXP_RXP12
GMCHEXP_RXN12
GMCHEXP_TXP12
GMCHEXP_TXN12
GMCHEXP_RXP13
GMCHEXP_RXN13
GMCHEXP_TXP13
GMCHEXP_TXN13
GMCHEXP_RXP14
GMCHEXP_RXN14
GMCHEXP_TXP14
GMCHEXP_TXN14
GMCHEXP_RXP15
GMCHEXP_RXN15
GMCHEXP_TXP15
GMCHEXP_TXN15
CLK_PCIE_VGA (3)
CLK_PCIE_VGA# (3)
PLTRST# (7,16,18,19,26,27,32,33)
PLTRST# PEX_RST
40mA
C624
C624
C611
C611
EXT@.1U
EXT@.1U
EXT@4.7U
EXT@4.7U
2 1
C610
C610
EXT@18P
EXT@18P
+3V
PLACE CLOSE TO GPU
C283 EXT@.1U C283 EXT@.1U
C287 EXT@.1U C287 EXT@.1U
C317 EXT@.1U C317 EXT@.1U
C318 EXT@.1U C318 EXT@.1U
C290 EXT@.1U C290 EXT@.1U
C295 EXT@.1U C295 EXT@.1U
C338 EXT@.1U C338 EXT@.1U
C346 EXT@.1U C346 EXT@.1U
C304 EXT@.1U C304 EXT@.1U
C308 EXT@.1U C308 EXT@.1U
C360 EXT@.1U C360 EXT@.1U
C371 EXT@.1U C371 EXT@.1U
C320 EXT@.1U C320 EXT@.1U
C313 EXT@.1U C313 EXT@.1U
C384 EXT@.1U C384 EXT@.1U
C385 EXT@.1U C385 EXT@.1U
C343 EXT@.1U C343 EXT@.1U
C354 EXT@.1U C354 EXT@.1U
C394 EXT@.1U C394 EXT@.1U
C395 EXT@.1U C395 EXT@.1U
C366 EXT@.1U C366 EXT@.1U
C376 EXT@.1U C376 EXT@.1U
C668 EXT@.1U C668 EXT@.1U
C663 EXT@.1U C663 EXT@.1U
C655 EXT@.1U C655 EXT@.1U
C652 EXT@.1U C652 EXT@.1U
C380 EXT@.1U C380 EXT@.1U
C382 EXT@.1U C382 EXT@.1U
C648 EXT@.1U C648 EXT@.1U
C650 EXT@.1U C650 EXT@.1U
C396 EXT@.1U C396 EXT@.1U
C397 EXT@.1U C397 EXT@.1U
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
R199 EXT@0R R199 EXT@0R
PLLVDD
C623
C623
EXT@4700P
EXT@4700P
C314
C314
EXT@.1U
EXT@.1U
V_GMCHEXP_RXP0
V_GMCHEXP_RXN0
V_GMCHEXP_RXP1
V_GMCHEXP_RXN1
V_GMCHEXP_RXP2
V_GMCHEXP_RXN2
V_GMCHEXP_RXP3
V_GMCHEXP_RXN3
V_GMCHEXP_RXP4
V_GMCHEXP_RXN4
V_GMCHEXP_RXP5
V_GMCHEXP_RXN5
V_GMCHEXP_RXP6
V_GMCHEXP_RXN6
V_GMCHEXP_RXP7
V_GMCHEXP_RXN7
V_GMCHEXP_RXP8
V_GMCHEXP_RXN8
V_GMCHEXP_RXP9
V_GMCHEXP_RXN9
V_GMCHEXP_RXP10
V_GMCHEXP_RXN10
V_GMCHEXP_RXP11
V_GMCHEXP_RXN11
V_GMCHEXP_RXP12
V_GMCHEXP_RXN12
V_GMCHEXP_RXP13
V_GMCHEXP_RXN13
V_GMCHEXP_RXP14
V_GMCHEXP_RXN14
V_GMCHEXP_RXP15
V_GMCHEXP_RXN15
THERMDC_VGA
THERMDA_VGA
PLLVDD
XTALSSIN
XTALOUTBUFF
XTALIN XTALIN
XTALOUT XTALOUT
EDIDCLK
EDIDDATA
AG10
AG12
AG13
AG15
AG16
AG18
AG19
AG21
AG22
AG24
AG25
AG26
AE10
AD10
AC10
AE12
AE13
AD13
AC13
AF10
AF11
AC15
AD15
AE15
AE16
AC18
AD18
AF16
AF17
AE18
AE19
AC21
AD21
AF19
AF20
AE21
AE22
AD22
AD23
AF22
AF23
AF25
AE25
AE24
AD24
AF27
AF13
AF14
AD5
AD6
AF1
AG2
AE6
AE7
AG3
AG4
AD7
AC7
AF4
AF5
AE9
AG6
AG7
AF7
AF8
AG9
AE3
AE4
AC6
C9
B9
H4
C1
C3
B1
C2
H5
D11
E9
D8
U44A
U44A
EXT@NV44M-V
EXT@NV44M-V
PEX_TX0P
PEX_TX0N
PEX_RX0P
PEX_RX0N
PEX_TX1P
PEX_TX1N
PEX_RX1P
PEX_RX1N
PEX_TX2P
PEX_TX2N
PEX_RX2P
PEX_RX2N
PEX_TX3P
PEX_TX3N
PEX_RX3P
PEX_RX3N
PEX_TX4P
PEX_TX4N
PEX_RX4P
PEX_RX4N
PEX_TX5P
PEX_TX5N
PEX_RX5P
PEX_RX5N
PEX_TX6P
PEX_TX6N
PEX_RX6P
PEX_RX6N
PEX_TX7P
PEX_TX7N
PEX_RX7P
PEX_RX7N
PEX_TX8P
PEX_TX8N
PEX_RX8P
PEX_RX8N
PEX_TX9P
PEX_TX9N
PEX_RX9P
PEX_RX9N
PEX_TX10P
PEX_TX10N
PEX_RX10P
PEX_RX10N
PEX_TX11P
PEX_TX11N
PEX_RX11P
PEX_RX11N
PEX_TX12P
PEX_TX12N
PEX_RX12P
PEX_RX12N
PEX_TX13P
PEX_TX13N
PEX_RX13P
PEX_RX13N
PEX_TX14P
PEX_TX14N
PEX_RX14P
PEX_RX14N
PEX_TX15P
PEX_TX15N
PEX_RX15P
PEX_RX15N
PEX_REFCLKP
PEX_REFCLKN
PEX_TSTCLK_OUT0
PEX_TSTCLK_OUT1
PEX_RST
THERMDN
THERMAL
THERMAL
THERMDP
PLLVDD
XTALSSIN
XTALOUTBUFF
XTALIN
XTALOUT
PLLGND
CLAMP
I2CC_SCL
I2CC_SDA
4
PCI EXPRESS
PCI EXPRESS
PLL
PLL
GPIO
GPIO
JTAG
JTAG
IFPAB
IFPAB
IFPC
IFPC
DACA
DACA
DACB
DACB
GPIOD0
GPIOD1
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD7
GPIOD8
GPIOD9
GPIOD10
GPIOD11
GPIOD12
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST
IFPATXC#
IFPATXC
IFPATXD0#
IFPATXD0
IFPATXD1#
IFPATXD1
IFPATXD2#
IFPATXD2
IFPATXD3#
IFPATXD3
IFPBTXC#
IFPBTXC
IFPBTXD4#
IFPBTXD4
IFPBTXD5#
IFPBTXD5
IFPBTXD6#
IFPBTXD6
IFPBTXD7#
IFPBTXD7
IFPCTXC#
IFPCTXC
IFPCTXD0#
IFPCTXD0
IFPCTXD1#
IFPCTXD1
IFPCTXD2#
IFPCTXD2
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
I2CB_SCL
I2CB_SDA
I2CB_HSYNC
I2CB_VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
A9
D9
A10
B10
C10
C12
B12
A12
A13
B13
B15
A15
B16
JTAG_TCK
AE27
JTAG_TMS
AD26
JTAG_TDI
AD27
JTAG_TDO
AE26
JTAG_TRST
AD25
EXT_TXLCLKOUT-
U4
EXT_TXLCLKOUT+
T4
EXT_TXLOUT0-
N5
EXT_TXLOUT0+
N4
EXT_TXLOUT1-
R4
EXT_TXLOUT1+
R5
EXT_TXLOUT2-
T6
EXT_TXLOUT2+
T5
P6
R6
W6
W5
W2
W3
AA3
AA2
AA1
AB1
AB2
AB3
EXT_TMDS_TXCM_PR
W1
EXT_TMDS_TXCP_PR
V1
EXT_TMDS_TX0M_PR
R1
EXT_TMDS_TX0P_PR
T1
EXT_TMDS_TX1M_PR
T2
EXT_TMDS_TX1P_PR
T3
EXT_TMDS_TX2M_PR
V3
EXT_TMDS_TX2P_PR
V2
D10
E10
AD4
AC4
AE1
AD1
AD2
U9
F9
F10
E6
F5
F4
E4
D5
115mA
DACB_IDUMP
L9
G3_GPIO1
G3_GPIO2
DISP_ON1
EXT_BLON
G3_GPIO5
G3_GPIO6
G3_GPIO7
VGAGPIO8_THRM
G3_GPIO9
T158T158
T157T157
T161T161
T56T56
T57T57
T53T53
T55T55
T134T134
T138T138
T129T129
T140T140
T131T131
T54T54
EXT_DDCCLK
EXT_DDCDAT
EXT_HSYNC
EXT_VSYNC
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
I2CB_SCL
I2CB_SDA
EXT_TV_C/R
EXT_TV_Y/G
EXT_TV_COMP
DVI_DET (16,33)
T150T150
T151T151
R447 EXT@0R R447 EXT@0R
T152T152
T153T153
T154T154
T155T155
T178T178
T177T177
T175T175
T176T176
T68T68
EXT_DDCCLK (17)
EXT_DDCDAT (17)
EXT_HSYNC (17)
EXT_VSYNC (17)
EXT_VGA_RED (17)
EXT_VGA_GRN (17)
EXT_VGA_BLU (17)
TMDS_DDCCLK (16,33)
TMDS_DDCDATA (16,33)
EXT_TV_C/R (17)
EXT_TV_Y/G (17)
EXT_TV_COMP (17)
3
BLON (7,28)
GPIO5 and GPIO6 are for NVVDD VID change
Link-A Bus for singal or ODD group
Link-B Bus for Dual or Even group
IFPAxxx should be connected to TXLxxx
IFPBxxx should be connected to TXUxxx
EXT_TXLCLKOUT- (7)
EXT_TXLCLKOUT+ (7)
EXT_TXLOUT0- (7)
EXT_TXLOUT0+ (7)
EXT_TXLOUT1- (7)
EXT_TXLOUT1+ (7)
EXT_TXLOUT2- (7)
EXT_TXLOUT2+ (7)
EXT_TMDS_TXCM_PR (16)
EXT_TMDS_TXCP_PR (16)
EXT_TMDS_TX0M_PR (16)
EXT_TMDS_TX0P_PR (16)
EXT_TMDS_TX1M_PR (16)
EXT_TMDS_TX1P_PR (16)
EXT_TMDS_TX2M_PR (16)
EXT_TMDS_TX2P_PR (16)
DISP_ON1
VGAGPIO8_THRM
ECN C2A
NVIDIA RECOMMEND:
CHANGE FROM +3V TO IFPC_IOVDD
EXT_TMDS_TXCM_PR
EXT_TMDS_TXCP_PR
EXT_TMDS_TX0M_PR
EXT_TMDS_TX0P_PR
EXT_TMDS_TX1M_PR
EXT_TMDS_TX1P_PR
EXT_TMDS_TX2M_PR
EXT_TMDS_TX2P_PR
R445 *EXT@10K R445 *EXT@10K
+3V
R444 EXT@0R R444 EXT@0R
R443
R443
ECN D2B Change R446 to 1K
EXT@10K
EXT@10K
for boot white screen
EXT_BLON
PLACE CLOSE TO ASIC
EXT_VGA_RED
EXT_VGA_GRN
EXT_VGA_BLU
EXT_TV_Y/G
EXT_TV_C/R
EXT_TV_COMP
R446 EXT@1K R446 EXT@1K
R476 *EXT@10K R476 *EXT@10K
R157 EXT@51R R157 EXT@51R
R158 EXT@51R R158 EXT@51R
R167 EXT@51R R167 EXT@51R
R166 EXT@51R R166 EXT@51R
R164 EXT@51R R164 EXT@51R
R165 EXT@51R R165 EXT@51R
R163 EXT@51R R163 EXT@51R
R162 EXT@51R R162 EXT@51R
R407 EXT@150/F R407 EXT@150/F
R408 EXT@150/F R408 EXT@150/F
R406 EXT@150/F R406 EXT@150/F
R423 EXT@150/F R423 EXT@150/F
R419 EXT@150/F R419 EXT@150/F
R428 EXT@150/F R428 EXT@150/F
Impedance 50±5Ω
DISP_ON (7,15,28)
+3V
IFPC_IOVDD
2
U44E
U44E
AC14
AC23
AC26
AD11
AD12
AD14
AD16
AD17
AD19
AD20
AF12
AF15
B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E14
E17
E20
E23
E26
F11
H2
H6
H23
H26
J14
K9
K19
L2
L5
L11
L14
L17
L23
L26
N12
N13
N14
N15
N16
P2
P5
P9
P11
P12
P13
P14
P15
P16
P17
P19
P23
P26
R12
R13
R14
R15
R16
U2
U5
U11
U14
U17
U23
U26
V9
V19
W14
Y2
Y5
Y23
Y26
AC2
AC5
AC8
AD8
AD9
AF2
AF3
AF6
AF9
GND00
GND01
GND02
GND03
GND04
GND05
GND06
GND07
GND08
GND09
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GROUND
GROUND
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
EXT@NV44M-V
EXT@NV44M-V
NC PIN
NC PIN
MIOBCAL_PU_GND
FBCAL_PU_GND
FBCAL_TERM_GND
GND91
GND92
GND93
GND94
NC_1
NC_2
NC_3
NC_4
PEX_PLLGND
AF18
AF21
AF24
AF26
C13
D12
E12
F12
AA6
M3
R209 EXT@37.4/F R209 EXT@37.4/F
E13
H22
T208T208
T209T209
1
Thermal Sensor for Graphic Spread Spectrum Control
+3V +3V
R460 EXT@4.7R R460 EXT@4.7R
C640 EXT@4.7U C640 EXT@4.7U
C638 EXT@.1U C638 EXT@.1U
C637 EXT@470P C637 EXT@470P
A A
XTALOUTBUFF
Place close to GPU C3
R458 EXT@22 R458 EXT@22
R455 *EXT@10K R455 *EXT@10K
CLK_VDD
I2C ADDR D4H/D5H (Default)
U43
XBUFF
CFOUT
5
U43
XIN/CLKIN1PD#
2
VDD
3
GND
4
CLKOUT
EXT@ICS91730AM-T
EXT@ICS91730AM-T
R448 EXT@22 R448 EXT@22
SCLK
SDATA
REFOUT
8
7
6
5
REFOUT
XTALSSIN
R439
R439
EXT@10K
EXT@10K
EDIDCLK
EDIDDATA
R452
R452
EXT@10K
EXT@10K
REV .A2
For VGA SS
4
EDIDCLK
EDIDDATA
EDIDCLK (28)
EDIDDATA (28)
THERMDC_VGA
THERMDA_VGA
3
C651
C651
EXT@.1U
EXT@.1U
C649
C649
EXT@2200P
EXT@2200P
6642VCC_VGA
SLAVE ADDRESS: 9A
R466 EXT@200R R466 EXT@200R
U47
U47
VCC1/ALERT
3
DXN
SDA
2
DXP
SCLK
GND5PWM
EXT@MAX6649
EXT@MAX6649
R435 EXT@0R R435 EXT@0R
R471
R471
R434 EXT@0R R434 EXT@0R
EXT@10K
EXT@10K
6
7
8
4
VGAGPIO8_THRM
R470 *EXT@0R R470 *EXT@0R
R469 *EXT@0R R469 *EXT@0R
R436
R436
*EXT@2.2K
*EXT@2.2K
+3V
R433
R433
*EXT@2.2K
*EXT@2.2K
EDIDDATA
EDIDCLK
MBDATA (4,27)
MBCLK (4,27,41)
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NV44M_V_PCIE/DAC/GND
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
of
12 42 Monday, August 22, 2005
12 42 Monday, August 22, 2005
1
12 42 Monday, August 22, 2005
B2A
B2A
B2A
5
U27
MAA0
MAA1
MAA2_L
MAA3_L
MAA4_L
NEAR VRAM CHIP
D D
M_CLKA0
-M_CLKA0
CKEA
R243
R243
EXT@10K
EXT@10K
T195T195
T182T182
T180T180
T102T102
T189T189
T194T194
C C
B B
A A
T192T192
T193T193
MAA5_L
MAA6
MAA7
MAA8
MABA0
MABA1
R214
R214
MAA9
EXT@120R
EXT@120R
MAA10
MAA11
MAA12 -DQMA6
-DQMA3
-DQMA1
-DQMA0
-DQMA2
-RASA
-CASA
-WEA
-CSA0
M_CLKA0
-M_CLKA0
CKEA
MAVREF_A
-CSA1
U27
M4
A0
M5
A1
L5
A2
M6
A3
M7
A4
L8
A5
M8
A6
M9
A7
M10
A8(AP)
M3
BA0
L4
BA1
L7
A9
K5
A10
L6
A11
K8
A12
A2
DQM0
G11
DQM1
G2
DQM2
A11
DQM3
L1
RAS
K1
CAS
K2
WE
M1
CS
L10
CLK
L11
CLK#
M11
CKE
L12
MCL
M12
VREF
M2
NC1
B3
NC2
B10
NC3
G3
NC4
G10
NC5
K11
NC6
K12
NC7
L2
NC8
L3
NC9
G7
NC/TH1
G8
NC/TH2
H5
NC/TH3
H6
NC/TH4
H7
NC/TH5
H8
NC/TH6
G5
NC/TH7
G6
NC/TH8
E5
NC/TH9
E6
NC/TH10
E7
NC/TH11
E8
NC/TH12
F5
NC/TH13
F6
NC/TH14
F7
NC/TH15
F8
NC/TH16
D6
VSS_0
D7
VSS_1
D9
VSS_2
J5
VSS_3
J6
VSS_4
J7
VSS_5
J8
VSS_6
K4
VSS_7
K9
VSS_8
D4
VSS_9
C8
VSSQ_0
C9
VSSQ_1
C10
VSSQ_2
D5
VSSQ_3
D8
VSSQ_4
E4
VSSQ_5
E9
VSSQ_6
F4
VSSQ_7
F9
VSSQ_8
G4
VSSQ_9
G9
VSSQ_10
H4
VSSQ_11
H9
VSSQ_12
J4
VSSQ_13
J9
VSSQ_14
A3
VSSQ_15
C3
VSSQ_16
C4
VSSQ_17
C5
VSSQ_18
A10
VSSQ_19
EXT@VRAM_8MX32-33_Hynix
EXT@VRAM_8MX32-33_Hynix
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
MDA29
A6
MDA28
B5
MDA31
A5
MDA27
A4
MDA30
B1
MDA25
C2
MDA26
C1
MDA24
D1
MDA9
J12
MDA8
J11
MDA15
H12
MDA12
H11
MDA11
F12
MDA10
F11
MDA14
E12
MDA13
E11
MDA2
E2
MDA1
E1
MDA4
F2
MDA7
F1
MDA0
H2
MDA6
H1
MDA3
J1
MDA5
J2
MDA21
D12
MDA17
C12
MDA20
C11
MDA19
B12
MDA22
A9
MDA16
A8
MDA23
B8
MDA18
A7
QSA3
A1
QSA1
G12
QSA0
G1
QSA2
A12
C676 EXT@.022U C676 EXT@.022U
C6
C696 EXT@.022U C696 EXT@.022U
C7
C690 EXT@.022U C690 EXT@.022U
D3
D10
C695 EXT@.022U C695 EXT@.022U
K3
C689 EXT@.022U C689 EXT@.022U
K6
C691 EXT@.022U C691 EXT@.022U
K7
C698 EXT@.022U C698 EXT@.022U
K10
C684 EXT@.022U C684 EXT@.022U
C678 EXT@10U C678 EXT@10U
C682 EXT@22U/10V C682 EXT@22U/10V
+1.8V
C687 EXT@220P C687 EXT@220P
B2
B4
C699 EXT@4700P C699 EXT@4700P
B6
B7
C700 EXT@.1U C700 EXT@.1U
B9
B11
C704 EXT@10U C704 EXT@10U
D2
D11
C402 EXT@22U/10V C402 EXT@22U/10V
E3
E10
F3
F10
H3
H10
J3
J10
+1.8V
nNIDIA AVL:
8Mx32 GDDR1: 1.8v/1.8v
Hynix: HY5DS573222FP-33 (lead-free).
Samsung: K4D553235F-VC33 (lead-free),
4MX32 GDDR1: 1.8v/1.8v
Hynix: HY5DS283222BFP-33 (lead-free)
Samsung: K4D26323QG-VC33 (lead-free)
MAVREF_A
MAVREF_B
+1.8V
R504
R504
EXT@1.5K
EXT@1.5K
R501
R501
EXT@1K
EXT@1K
+1.8V
R247
R247
EXT@1.5K
EXT@1.5K
R248
R248
EXT@1K
EXT@1K
4
4
C710
C710
EXT@.1U
EXT@.1U
C713
C713
EXT@.1U
EXT@.1U
C439
C439
EXT@.1U
EXT@.1U
C440
C440
EXT@.1U
EXT@.1U
NEAR VRAM CHIP
M_CLKA1
R215
R215
-M_CLKA1
EXT@120R
EXT@120R
T109T109
T183T183
T179T179
T191T191
T186T186
T107T107
T108T108
T110T110
MAA0
MAA1
MAA2_R
MAA3_R
MAA4_R
MAA5_R
MAA6
MAA7
MAA8
MABA0
MABA1
MAA9
MAA10
MAA11
MAA12
-DQMA7
-DQMA4
-DQMA5
-RASA
-CASA
-WEA
-CSA0
M_CLKA1
-M_CLKA1
CKEA
MAVREF_B
-CSA1
U28
U28
M4
A0
M5
A1
L5
A2
M6
A3
M7
A4
L8
A5
M8
A6
M9
A7
M10
A8(AP)
M3
BA0
L4
BA1
L7
A9
K5
A10
L6
A11
K8
A12
A2
DQM0
G11
DQM1
G2
DQM2
A11
DQM3
L1
RAS
K1
CAS
K2
WE
M1
CS
L10
CLK
L11
CLK#
M11
CKE
L12
MCL
M12
VREF
M2
NC1
B3
NC2
B10
NC3
G3
NC4
G10
NC5
K11
NC6
K12
NC7
L2
NC8
L3
NC9
G7
NC/TH1
G8
NC/TH2
H5
NC/TH3
H6
NC/TH4
H7
NC/TH5
H8
NC/TH6
G5
NC/TH7
G6
NC/TH8
E5
NC/TH9
E6
NC/TH10
E7
NC/TH11
E8
NC/TH12
F5
NC/TH13
F6
NC/TH14
F7
NC/TH15
F8
NC/TH16
D6
VSS_0
D7
VSS_1
D9
J5
J6
J7
J8
K4
K9
D4
C8
C9
C10
D5
D8
E4
E9
F4
F9
G4
G9
H4
H9
J4
J9
A3
C3
C4
C5
A10
VDDQ_0
VSS_2
VDDQ_1
VSS_3
VDDQ_2
VSS_4
VDDQ_3
VSS_5
VDDQ_4
VSS_6
VDDQ_5
VSS_7
VDDQ_6
VSS_8
VDDQ_7
VSS_9
VDDQ_8
VSSQ_0
VDDQ_9
VSSQ_1
VDDQ_10
VSSQ_2
VDDQ_11
VSSQ_3
VDDQ_12
VSSQ_4
VDDQ_13
VSSQ_5
VDDQ_14
VSSQ_6
VSSQ_7
VDDQ_15
VSSQ_8
VSSQ_9
VSSQ_10
VSSQ_11
VSSQ_12
VSSQ_13
VSSQ_14
VSSQ_15
VSSQ_16
VSSQ_17
VSSQ_18
VSSQ_19
EXT@VRAM_8MX32-33_Hynix
EXT@VRAM_8MX32-33_Hynix
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQS0
DQS1
DQS2
DQS3
VDD_0
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
3
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
3
MDA52
A6
MDA48
B5
MDA53
A5
MDA49
A4
MDA50
B1
MDA55
C2
MDA51
C1
MDA54
D1
J12
J11
MDA62
H12
MDA59
H11
F12
F11
E12
E11
E2
E1
F2
F1
H2
H1
MDA32
J1
MDA35
J2
MDA45
D12
MDA44
C12
MDA43
C11
MDA40
B12
MDA41
A9
MDA46
A8
MDA42
B8
MDA47
A7
QSA6
A1
QSA7
G12
QSA4
G1
QSA5
A12
C677 EXT@.022U C677 EXT@.022U
C6
C441 EXT@.022U C441 EXT@.022U
C7
C692 EXT@.022U C692 EXT@.022U
D3
C680 EXT@.022U C680 EXT@.022U
D10
C685 EXT@.022U C685 EXT@.022U C679 EXT@.022U C679 EXT@.022U
K3
C686 EXT@.022U C686 EXT@.022U
K6
C447 EXT@.022U C447 EXT@.022U
K7
C442 EXT@.022U C442 EXT@.022U
K10
C688 EXT@.022U C688 EXT@.022U
C429 EXT@10U C429 EXT@10U
C670 EXT@22U/10V C670 EXT@22U/10V
+1.8V
C427 EXT@220P C427 EXT@220P
B2
B4
C694 EXT@4700P C694 EXT@4700P
B6
B7
C702 EXT@.1U C702 EXT@.1U
B9
B11
C433 EXT@10U C433 EXT@10U
D2
D11
C419 EXT@22U/10V C419 EXT@22U/10V
E3
E10
F3
F10
H3
H10
J3
J10
MDA56
MDA58
MDA63
MDA57
MDA60
MDA61
MDA38
MDA36
MDA39
MDA37
MDA34
MDA33
+1.8V
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
-DQMA0
-DQMA1
-DQMA2
-DQMA3
-DQMA4
-DQMA5
-DQMA6
-DQMA7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
AB23
AB24
AB22
AC24
AC22
AA23
AA22
AA24
AA27
AA26
AB25
AB26
AB27
AA25
2
A26
C24
B24
A24
C22
A25
B25
D23
G22
J23
E24
F23
J24
F24
G23
H24
D16
E16
D17
F18
E19
E18
D20
D19
A18
B18
A19
B19
D18
C19
C16
C18
N26
N25
R25
R26
R27
T25
T27
T26
Y24
T24
T23
R24
R23
R22
T22
N23
P24
W25
D21
F22
F20
A21
V27
W22
V22
V24
B22
D22
E21
C21
V25
W24
U24
W26
2
U44B
U44B
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
EXT@NV44M-V
EXT@NV44M-V
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBACLK0
FBACLK0#
FBACLK1
FBACLK1#
FBA_REFCLKP
FBA_REFCLKN
FBA_DEBUG
MEMORY INTERFANE A
MEMORY INTERFANE A
FB_VREF1
FBA_PLLVDD
FBA_PLLAVDD
FBA_PLLGND
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
1
MAA12
G27
MAA4_L
D25
MAA5_L
F26
MAA6
F25
MAA5_R
G25
MAA4_R
J25
MAA2_R
J27
-CSA1
M26
-CSA0
C27
-CASA
C25
MAA0
D24
CKEA
N27
G24
MAA3_R
J26
MABA0
M27
-RASA MDA15
C26
MABA1
M25
MAA3_L
D26
MAA1
D27
MAA2_L
K26
MAA10
K25
MAA9
K24
MAA7
F27
MAA11
K27
MAA8
G26
-WEA
B27
N24
M_CLKA0
L24
-M_CLKA0
K23
M_CLKA1
M22
-M_CLKA1
N22
FBA_REFCLK
M23
-FBA_REFCLK
M24
10mill spacing
K22
MAVREF
A16
12 MIL
D14
12 MIL
D13
C15
A22
E22
F21
B21
V26
W23
V23
W27
12 MIL
FBA_PLLVDD
FBA_PLLAVDD
T66T66
T67T67
PLACE CLOSE TO GPU
C339
C339
C348
C348
EXT@470P
EXT@470P
EXT@4700P
EXT@4700P
C323
C323
C330
C330
EXT@4700P
EXT@4700P
EXT@470P
EXT@470P
+1.8V
R463
R463
EXT@1K
EXT@1K
R464
R464
EXT@1K
EXT@1K
PLACE CLOSE TO GPU
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NV44M_V_MEMORY A/B
Date: Sheet
Date: Sheet of
Date: Sheet of
PROJECT : ZE1
PROJECT : ZE1
Quanta Computer Inc.
Quanta Computer Inc.
1
C644
C644
EXT@.1U
EXT@.1U
C639
C639
EXT@.047U
EXT@.047U
C349
C349
EXT@4.7U
EXT@4.7U
C634
C634
EXT@4.7U
EXT@4.7U
13 42 Tuesday, August 23, 2005
13 42 Tuesday, August 23, 2005
13 42 Tuesday, August 23, 2005
L25 EXT@TB160808G301 L25 EXT@TB160808G301
+3V
L24 EXT@TB160808G301 L24 EXT@TB160808G301
NVVDD
B2A
B2A
B2A
of