Acer TravelMate 8572, TravelMate 8572Z Schematics

5

4

3

2

1

GPU CORE PWR

SW@ --> iGPU & GPU Switch IV@ --> iGPU only EV@ --> GPU only SNP@ --> GPU N11P only SNM@ --> GPU N11M only

D D

CSP@ --> Operation P/N

Optional

X'TAL

14.318MHz

CLOCK GENERATOR

SELGO: SLG8SP585V

P3

=5%/2&.',$*5$0

BCLK: 133MHz PEG_CLK: 100MHz DPLL_REF_SSCLK: 120MHz

intel

Fan Driver

(PWM Type)

P34

DOCKING

DVI

VGA

DDR III

SO-DIMM 0 SO-DIMM 1

P14, 15

Dual Channel

800/ 1066 MHz

800 MT/s 1066 MT/s

RJ45 USBX4

C C

AC JACK

[Arrandale Only]

*

Arrandale (SG)

rPGA 989

(37.5mm X 37.5mm)

DDR SYSTEM MEMORY

FDI

P4.5.6.7

AUDIO/SPDIF MIC / LINE-IN

1RWH +0GRHVQRWVXSSRUW86% +0GRHVQRWVXSSRUW6$7$

Card Reader Connector AU6437

P25

HDD (SATA) *1

P29

ODD (SATA)

P29

SATA0

SATA1

SATA

3.0 GT/s

intel

<PCH>

Ibex Peak_M

*

PCI-E X16

DMI

X4 DMI interface

DMIFDI

Graphics Interfaces

PCI-E

PCIE

2.5GT/s

INT_CRT INT_LVDS INT_HDMI

PCI-Express

2.5GT/s

Nvidia GPU

N11M 512M

(64Mb x 32 IO x 8 pcs)

P16,17,18,19,20,21,22,23

[Arrandale Only]

*

[Arrandale Only]

*

[Arrandale Only]

*

CRT LVDS HDMI

X'TAL

27.0MHz

HDMI/DVI PS8101

ISL6264

GPU IO PWR

ISL62827

DISCHARGER

+3V,+ 5V,+1.5V,+1.05V,+1. 1V_VT T

+1.0V/+1.5V

G93334 + Linear

CPU VGFX_AXG

ISL62881

THERMAL PROTECTION

LVDS_CRT_Switch Grapgics

P23

P24, 25

PCIE-2

CLKOUT_PEG_4

USB Port x 4

B B

USB 1, 3, 11, 12

Bluetooth

USB 4 P32

CCD

FingerPrint

SIMM card

USB 0 P28

A A

P31

P23USB 8

P34USB 2

5

MDC

AUDIO Jack

P30

Audio CODEC

CX20672

P33

P30

Docking S/PDIF

P33

Speaker Docking

P30

Line in

4

USB 2.0

Azalia

MIC Jack

USB

HDA

SPI

SPI ROM

4MB x1 (Basic ME+Braidwood)

Int. D-MIC

P30

mBGA 676

(27mm X 25mm)

P8.9.10.11.12.13

P9

P23P33

RTC P9

LPC

EC (WPC781)

SPI ROM

Touch Pad

K/B COON.

P38

P34

3

P38

X'TAL

32.768KHz

X'TAL

32.768KHz

TPM

SLB 9635

P31

PCIE-6

CLKOUT_PEG_1&3

PCIE-1

CLKOUT_PEG_B

Broadcom

Giga-LAN

BCM57760

Docking SW PI3L500

Docking

Transformer

RJ45 Connector

Size Document Number Rev

Date: Sheet

2

Date: Sheet

CHARGER

P44

ISL88731

3/5V SYS PWR

P45

ISL6237

CPU CORE PWR

P51

ISL62882

CPU VTT

P51

UP61111AQDD

VTT 1.05V

P43

UP61111AQDD

DDR3 PWR

P41

CRT

LVDS

Docking DVI

TPS5116

ARD: 1.05V CFD: 1.1V

P27

P24

P25

P50

P49

P42

P46

P47

P48

USB0

Mini card 3G/GPS

USB 10

P28

Mini Card

WLAN

USB 13

P26

X'TAL 25MHz

P27

Quanta Computer Inc.

PROJECT :

Block Diagram

ZR9

1

P28

147Thursday, April 29, 2010

of

1A

1

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V

2

VIN

3

+1.5V

4

+1.5V_SUS

5

+1.8V

6

7

8

+5V

P22

+3V_D

+VGPU_CORE (20A)

VDDC

ISL6264

dGPU_VRON

A A

VDDR3

MOS (AO3413)

+3_D (0.5A)

P44

PG_GPUIO_EN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

P47

PG_1.5V_EN

VDDR1

MOS (AO4710)

P43

+1.5V_GPU (10A)

PG_1.5V_EN

VDDR4

MOS (AO6402)

P43

+1.8V_GPU (3A)

PG_1.5V_EN

BJT

P22

dGPU_PWROK

dGPU_PWR_EN#

MOS

AO3413

+5_GPU

P22

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

dGPU_VRON

VDDC

ISL6264

PG_GPUIO_EN

P44

+VGPU_CORE (20A)

B B

VIN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

Power States

POWER PLANE

VIN +RTC_CELL +3VPCU +5VPCU +15V 3V_LAN_S5

C C

D D

+5VSUS +3VSUS +1.5VSUS +0.75V_DDR_VTT +5V +3V +1.8V +1.5V +1.1V_VTT +1.05V~+1.1V +1.05V +1.05V +VCC_CORE LCDVCC MBAT+ +5V_S5 +3V_S5 +3.3V S5D

1

+10V~+19V +3V~+3.3V +3.3V +5V +15V +3.3V +5V +3.3V +1.5V +0.9V +5V +3.3V +1.8V +1.5V

0V~+1.5V +3.3V

+5V S5_ON

DESCRIPTION

MAIN POWER RTC 8051 POWER CHARGE POWER LARGE POWER LAN POWER

SODIMM POWER SODIMM POWER

PCH POWER

CPU CORE POWER LCD Power MAIN BATTERY+10V~+17V

2

+1.5V

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

CONTROL SIGNAL

ALWON ALWON +15V_ALWP AUX_ON SUSD SUSD SUSON MAINON MAIND MAIND MAINON MAIND MAINONCPU POWER MAINONPCH POWER VRON LVDS_VDDEN

3

P47

PG_1.5V_EN

ACTIVE INVOLTAGE

S0~S5 S0~S5 S0~S5 S0~S5 S0~S5

+1.5V_SUS

VDDR1

MOS (AO4710)

P43

+1.5V_GPU (10A)

4

+3.3V

+1.5V_GPU

VDDR3

MOS (AO3413)

P22

+3_D (0.5A)

Thermal Follow Chart

CPU CORE PWR

+3V_D

H_ORICHOT#

5

+1.8V

VDDR4

MOS (AO6402)

+1.8V_GPU (3A)

H/W Throttling

SM-Bus

PG_1.5V_EN

P43

NTC Thermal Protection

CPU

PCH

EC

PM_THRMTRIP#

SML1ALERT#

CPUFAN#

6

BJT

P22

dGPU_PWROK

SYS_SHDN#

WIRE-AND

+5V

dGPU_PWR_EN#

MOS

AO3413

P22

+5_GPU

3V/5 V SYS PWR

FANFAN Driver

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

PWR Status & GPU PWR CRL & THRM

Date: Sheet of

7

PROJECT :

ZR9

247Thursday, April 29, 2010

8

1A

5

+1.5V

180ohm/1.5A

L33 BKP1608HS181T_6_1.5AL33 BKP1608HS181T_6_1.5A

C452

C456

4.7U/10V_8

D D

C C

+3V

L38 BKP1608HS181T_6_1.5AL38 BKP1608HS181T_6_1.5A

4.7U/10V_8

C463

4.7U/10V_8

C452

0.1U/16V_4

C471

0.1U/16V_4

150mA(20mil)

C451

0.1U/16V_4

C442

0.1U/16V_4

CLK_ICH_14M(10)

C432 33P/50V_4C432 33P/50V_4

C435 33P/50V_4C435 33P/50V_4

C492

0.1U/16V_4

+3V_CLK

+1.5V_CLK

4

R324

*585@0_6

R320 33/J_4R320 33/J_4

Y3

14.318MHZ

2 1

CLK_SDATA CLK_SCLK

CPU_SEL

XTAL_IN XTAL_OUT

U26

1

VDD_DOT

5

VDD_27

17

VDD_SRC

24

VDD_CPU

29

VDD_REF

31

SDA

32

SCL

30

REF_0/CPU_SEL

28

XTAL_IN

27

XTAL_OUT

2

VSS_DOT

8

VSS_27

9

VSS_SATA

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

33

GND

SLG8SP595V

3

VDD_SRC_I/O VDD_CPU_I/O

DOT_96

DOT_96#

27M

27M_SS

SRC_1/SATA

SRC_1#/SATA#

SRC_2

SRC_2#

*CPU_STOP#

CPU_1

CPU_1#

CPU_0

CPU_0#

CKPWRGD/PD#

15 18

3 4

6 7

10 11 13 14

16 20

19 23 22

25

R345 *0/J_4R345 *0/J_4 R354 *0/J_4R354 *0/J_4

CLK_BUF_DREFCLKP (10) CLK_BUF_DREFCLKN (10)

C491 *10p/50V_4C491 *10p/50V_4

CLK_BUF_PCIE_3GPLLP (10) CLK_BUF_PCIE_3GPLLN (10) CLK_BUF_DREFSSCLKP (10) CLK_BUF_DREFSSCLKN (10)

R353 10K/J_4R353 10K/J_4

TP34TP34

TP33TP33

CLK_BUF_BCLKP (10) CLK_BUF_BCLKN (10)

CK_PWRGD_R

+VDDIO_CLK

27M_CLK (18) CLK_27M_SS (18)

+3V

2

80mA(20mil)

C476

C499

0.1U/16V_4

L37 BKP1608HS181T_6_1.5AL37 BKP1608HS181T_6_1.5A

C494

C475

C475 10U/10V_8

10U/10V_8

Place each 0.1uF cap as close as possible to each VDD IO pin. Place the 10uF caps on the VDD_IO plane.

C494 10U/10V_8

10U/10V_8

1

+1.05V

SMBusCPU_CLK select

+1.05V

B B

A A

CPU_SEL

01

CPU0/1=133MHz (default)

5

R312

R312 *10K/J_4

*10K/J_4

CPU_SEL

R319

R319 10K/J_4

10K/J_4

CPU0/1=100MHz

C430

*10P/50V_4

ICH_SMBDATA(10,26,28)

ICH_SMBCLK(10,26,28)

4

+3V

CLK Enable

R327

2

3

Q39

Q39 2N7002K

2N7002K

+3V

2

3

Q38

Q38 2N7002K

2N7002K

R327

2.2K/J_4

CLK_SDATA

1

R326

2.2K/J_4

1

CLK_SCLK

3

CLK_SDATA (14,15,28)

CLK_SCLK (14,15,28)

VR_PWRGD_CK505#(39)

Size Document Number Rev

Date: Sheet

2

Date: Sheet

+3V

R330

R330 1K/F_4

1K/F_4

CK_PWRGD_R

3

Q16

Q16 2N7002K

2N7002K

2

1

Quanta Computer Inc.

PROJECT :

Clock Generator

R329

R329 100K/F_4

100K/F_4

ZR9

1

1A

of

347Thursday, May 06, 2010

of

347Thursday, May 06, 2010

of

347Thursday, May 06, 2010

5

4

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U42A

DMI_TXN0(8) DMI_TXN1(8) DMI_TXN2(8) DMI_TXN3(8)

D D

DMI_TXP0(8) DMI_TXP1(8) DMI_TXP2(8) DMI_TXP3(8)

DMI_RXN0(8) DMI_RXN1(8) DMI_RXN2(8) DMI_RXN3(8)

DMI_RXP0(8) DMI_RXP1(8) DMI_RXP2(8) DMI_RXP3(8)

FDI_TXN0(8) FDI_TXN1(8) FDI_TXN2(8) FDI_TXN3(8) FDI_TXN4(8) FDI_TXN5(8) FDI_TXN6(8) FDI_TXN7(8)

FDI_TXP0(8) FDI_TXP1(8) FDI_TXP2(8) FDI_TXP3(8) FDI_TXP4(8)

C C

FDI_TXP5(8) FDI_TXP6(8) FDI_TXP7(8)

FDI_FSYNC0(8) FDI_FSYNC1(8)

FDI_INT(8)

FDI_LSYNC0(8) FDI_LSYNC1(8)

B B

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

Clarksfield/Aubu rndale

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C

PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C

R517 49.9/F_4R517 49.9/F_4

R516 750/F_4R516 750/F_4

C639 SW@0.1U/10V_4C639 SW@0.1U/10V_4 C637 SW@0.1U/10V_4C637 SW@0.1U/10V_4 C629 SW@0.1U/10V_4C629 SW@0.1U/10V_4 C631 SW@0.1U/10V_4C631 SW@0.1U/10V_4 C633 SW@0.1U/10V_4C633 SW@0.1U/10V_4 C608 SW@0.1U/10V_4C608 SW@0.1U/10V_4 C635 SW@0.1U/10V_4C635 SW@0.1U/10V_4 C610 SW@0.1U/10V_4C610 SW@0.1U/10V_4 C612 SW@0.1U/10V_4C612 SW@0.1U/10V_4 C623 SW@0.1U/10V_4C623 SW@0.1U/10V_4 C614 SW@0.1U/10V_4C614 SW@0.1U/10V_4 C625 SW@0.1U/10V_4C625 SW@0.1U/10V_4 C616 SW@0.1U/10V_4C616 SW@0.1U/10V_4 C627 SW@0.1U/10V_4C627 SW@0.1U/10V_4 C618 SW@0.1U/10V_4C618 SW@0.1U/10V_4 C620 SW@0.1U/10V_4C620 SW@0.1U/10V_4

C640 SW@0.1U/10V_4C640 SW@0.1U/10V_4 C638 SW@0.1U/10V_4C638 SW@0.1U/10V_4 C630 SW@0.1U/10V_4C630 SW@0.1U/10V_4 C632 SW@0.1U/10V_4C632 SW@0.1U/10V_4 C634 SW@0.1U/10V_4C634 SW@0.1U/10V_4 C609 SW@0.1U/10V_4C609 SW@0.1U/10V_4 C636 SW@0.1U/10V_4C636 SW@0.1U/10V_4 C611 SW@0.1U/10V_4C611 SW@0.1U/10V_4 C613 SW@0.1U/10V_4C613 SW@0.1U/10V_4 C624 SW@0.1U/10V_4C624 SW@0.1U/10V_4 C615 SW@0.1U/10V_4C615 SW@0.1U/10V_4 C626 SW@0.1U/10V_4C626 SW@0.1U/10V_4 C617 SW@0.1U/10V_4C617 SW@0.1U/10V_4 C628 SW@0.1U/10V_4C628 SW@0.1U/10V_4 C619 SW@0.1U/10V_4C619 SW@0.1U/10V_4 C621 SW@0.1U/10V_4C621 SW@0.1U/10V_4

PEG_RXN[0..15] (16)

Use reverse type (at GPU side)

PEG_RXP[0..15] (16)

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PM_THRMTRIP#(11)

PEG_TXN[0..15] (16)

PM_DRAM_PWRGD(8,31)

PEG_TXP[0..15] (16)

Processor Compensation Signals

R563 20/F_4R563 20/F_4 R565 20/F_4R565 20/F_4 R128 49.9/F_4R128 49.9/F_4 R564 49.9/F_4R564 49.9/F_4

R157 *1K/J_4R157 *1K/J_4

R561 *0/short_4R561 *0/short_4

H_PECI(11)

H_PROCHOT#(39)

PM_SYNC(8)

H_PWRGOOD(11)

R244 *0/short_4R244 *0/short_4

R276 *0/short_4R276 *0/short_4

R213 *0/short_4R213 *0/short_4

R214 *0/short_4R214 *0/short_4

TP6TP6

PLTRST#(10,11,16,25,26,28,31,36)

R235 1.5K/F_4R235 1.5K/F_4

SI 2/5 Modified

H_COMP3 H_COMP2 H_COMP1 H_COMP0

TP_SKT0CC#

H_CATERR#

H_PECI_ISO

H_PROCHOT#_R

PM_THRMTRIP#_R

H_CPURST#_R

H_PM_SYNC_R

H_VTTPWRGD

CPU_PLTRST#

R229

R229 750/F_4

750/F_4

U42B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

Clarksfield/Aubu rndale

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

A16 B16

AR30 AT30

E16 D16

A18 A17

F6 AL1

AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29 AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

XDP_PREQ# XDP_TCLK

XDP_TMS XDP_TRST#

XDP_TDI_R XDP_TDO_R XDP_TDI_M XDP_TDO_M

H_DBR#

XDP_OBS0_R XDP_OBS1_R XDP_OBS2_R XDP_OBS3_R XDP_OBS4_R XDP_OBS5_R XDP_OBS6_R XDP_OBS7_R

CLK_CPU_BCLKP (11) CLK_CPU_BCLKN (11)

TP58TP58 TP60TP60

CLK_PCIE_3GPLLP (10) CLK_PCIE_3GPLLN (10)

DPLL_REF_SSCLKP (10) DPLL_REF_SSCLKN (10)

CPU_DDR3_DRAMRST# (31)

R170 100/F_4R170 100/F_4 R173 24.9/F_4R173 24.9/F_4 R175 130/F_4R175 130/F_4

R203 *0/short_4R203 *0/short_4 R195 10K/J_4R195 10K/J_4 R196 10K/J_4R196 10K/J_4 R204 *0/short_4R204 *0/short_4

TP15TP15

TP4TP4

R263 *0/short_4R263 *0/short_4

TP17TP17 TP11TP11 TP8TP8 TP10TP10 TP9TP9 TP14TP14 TP7TP7 TP13TP13

+1.1V_VTT

XDP_DBRST#_R (8)

Layout Note: Place these resistors near Processor

PM_EXTTS#0 (14)

PM_EXTTS#1 (15)

ZR9

1 3

2

*CPU_BKT

Thermaltri p protect

+1.1V_VTT

3

Q14

DELAY_VR_PWRGOOD(8,39)

A A

PM_THRMTRIP#_R

2

1 3

FDV301N

1

R278

R278 1K/J_4

1K/J_4

2

Q13

Q13 MMBT3904

MMBT3904

SYS_SHDN# (38,46)

VTT PWR_Good

MPWROK(36)

+3V

C367

0.1U/16V_4

R219

3 5

4

U21

U21 TC7SH08FU

TC7SH08FU

R219

2K/F_4

H_VTTPWRGD

R225

R225 1K/J_4

1K/J_4

2 1

pull-up 56ohm close to PCH

5

4

3

Processor pull-up

+1.5V_CPUVDDQ

R228

1.1K/F_4

R234

R234 3K/F_4

3K/F_4

R180 51/F_4R180 51/F_4

H_CATERR#

R218 49.9/F_4R218 49.9/F_4

H_PROCHOT#_R

R262 68/J_4R262 68/J_4

H_CPURST#_R

R192 *68/J_4R192 *68/J_4

XDP_TMS

R177 *51_4R177 *51_4

XDP_TDI_R

R191 *51_4R191 *51_4

XDP_PREQ#

R251 *51_4R251 *51_4

XDP_TCLK

R176 *51/F_4R176 *51/F_4

XDP_TRST#

R250 51/F_4R250 51/F_4

PM_DRAM_PWRGD

Use a voltage divider with VDDQ (1.5V) rail (ON in S3) and resistor combination of 4.75K (to VDDQ)/12K(to GND) to generate the required voltage. Note: CRB uses a 3.3V (always ON) rail with 2K and 1K combination.

+1.1V_VTT

2

JTAG MAPPING

XDP_TDI_R XDP_TDIXDP_TDO_R

R190 *0_4R190 *0_4

XDP_TDO_M

R181 *0_4R181 *0_4

R185

R185 *0_4

*0_4

XDP_TDI_M

R184 *0_4R184 *0_4

XDP_TDO_R

R178 *0_4R178 *0_4

Scan Chain (Default)

CPU Only

GMCH Only

STUFF -> R535, R538, R528 NO STUFF -> R536, R534

STUFF -> R536, R534 NO STUFF -> R535, R538, R528

STUFF -> R534, R528 NO STUFF -> R538, R536, R535

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 1/4

Date: Sheet

PROJECT :

1

XDP_TDO

ZR9

1A

447Thursday, May 06, 2010

1A

of

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U42C

M_A_DQ[63:0](14)

D D

C C

B B

M_A_BS#0(14) M_A_BS#1(14) M_A_BS#2(14)

M_A_CAS#(14) M_A_RAS#(14) M_A_WE#(14)

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10 AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11 AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14 AP14

AC3 AB2

AE1 AB3 AE9

A10

B10 E10

F10

AJ7 AJ6

AJ9

AL7 AL8

J10

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

G8 K7

J8

G7

J7

L7 M6 M8

L9

L6 K8 N8 P9

U7

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

4

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0]

SA_DM[1]

SA_DM[2]

SA_DM[3]

SA_DM[4]

SA_DM[5]

SA_DM[6]

SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLKP0 (14) M_A_CLKN0 (14) M_A_CKE0 (14)

M_A_CLKP1 (14) M_A_CLKN1 (14) M_A_CKE1 (14)

M_A_CS#0 (14) M_A_CS#1 (14)

M_A_ODT0 (14) M_A_ODT1 (14)

M_A_DM[7:0] (14)

M_A_DQSN[7:0] (14)

M_A_DQSP[7:0] (14)

M_A_A[15:0] (14)

3

M_B_DQ[63:0](15)

M_B_BS#0(15) M_B_BS#1(15) M_B_BS#2(15)

M_B_CAS#(15) M_B_RAS#(15) M_B_WE#(15)

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AR10

AT10

AF3 AG1

AK1 AG4 AG3

AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9

AB1

AC5 AC6

AJ3

AJ4

B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3

G4

H6

G2

G1 G5

K2

M1

K5 K4

M4

N5

W5

R7

Y7

J6 J3

J2 J1 J5

L3

U42D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY - B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

1

M_B_CLKP0 (15) M_B_CLKN0 (15) M_B_CKE0 (15)

M_B_CLKP1 (15) M_B_CLKN1 (15) M_B_CKE1 (15)

M_B_CS#0 (15) M_B_CS#1 (15)

M_B_ODT0 (15) M_B_ODT1 (15)

M_B_DM[7:0] (15)

M_B_DQSN[7:0] (15)

M_B_DQSP[7:0] (15)

M_B_A[15:0] (15)

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Requires minimum 12mils spacing with all other signals, including data signals.

A A

5

4

3

Channel B DQ[16,18,36,42,56,57,60,61,62] Requires minimum 12mils spacing with all other signals, including data signals.

Clarksfield/Auburndale

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 2/4

Date: Sheet

PROJECT :

ZR9

547Wednesday, May 05, 2010

of

1

of

1A

5

U42F

CPU Core Power

ARD:48A CFD:52A

C280

+

C685

C685 22U/6.3V_8

22U/6.3V_8

C298

C328

C284

22U/6.3V_8

C292

C292 22U/6.3V_8

22U/6.3V_8

10U/6.3V_6

C679

C260

+

330U/2V_7343

C303

22U/6.3V_8

C331

C331 22U/6.3V_8

22U/6.3V_8

10U/6.3V_6

C267

C301

C296

22U/6.3V_8

C304

C304 22U/6.3V_8

22U/6.3V_8

D D

C674

C686

C256

22U/6.3V_8

C305

C680

C680 22U/6.3V_8

22U/6.3V_8

C300

C330

10U/6.3V_6

C329

10U/6.3V_6

C330

10U/6.3V_6

C259

10U/6.3V_6

C678

10U/6.3V_6

C C

C302

10U/6.3V_6

B B

A A

+

C311

22U/6.3V_8

C688

C688 22U/6.3V_8

22U/6.3V_8

C261

10U/6.3V_6

C258

10U/6.3V_6

C281

330U/2V_7343

C681

22U/6.3V_8

C687

C687 22U/6.3V_8

22U/6.3V_8

C677

10U/6.3V_6

C684

10U/6.3V_6

+VCC_CORE

U42F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Clarksfield/Auburndale

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

4

1.1V RAIL POWER

CPU CORE SUPPLY

POWER

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

VSS_SENSE_VTT

SENSE LINES

4

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11

+VTT_43

J16

+VTT_44

J15

H_PSI#

AN33

PSI#

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35

H_DPRSLPVR

AM34

H_VTTVID1

G15

H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V

AN35

AJ34 AJ35

VTT_SENSE

B15

VSS_SENSE_VTT

A15

C291

C291 22U/6.3V_8

22U/6.3V_8

C247

C247 10U/6.3V_8

10U/6.3V_8

C683

C683 10U/6.3V_8

10U/6.3V_8

C263

C263 22U/6.3V_8

22U/6.3V_8

R131 *0/short_4R131 *0/short_4 R133 *0/short_4R133 *0/short_4

C219

C219 1U/10V_4

1U/10V_4

R164 100/J_4R164 100/J_4

R167 100/J_4R167 100/J_4

VTT Rail Values are Auburndal VTT=1.05V Clarksfield VTT=1.1V

18A

+

C671

C671 22U/6.3V_8

22U/6.3V_8

C676

C676 10U/6.3V_8

10U/6.3V_8

C248

C248 10U/6.3V_8

10U/6.3V_8

+1.1V_VTT

+

C689

C689 10U/6.3V_8

10U/6.3V_8

C266

C266 *330U/2V_7343

*330U/2V_7343

C283

C283 22U/6.3V_8

22U/6.3V_8

C682

C682 10U/6.3V_8

10U/6.3V_8

C665

C661

C661 22U/6.3V_8

22U/6.3V_8

(15mils)

H_PSI# (39)

H_VID0 (39) H_VID1 (39) H_VID2 (39) H_VID3 (39) H_VID4 (39) H_VID5 (39) H_VID6 (39) H_DPRSLPVR (39)

TP1TP1

I_MON (39)

+VCC_CORE

VCCSENSE (39) VSSSENSE (39)

TP53TP53 TP54TP54

+1.1V_VTT

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U42G

R201

R201 1K/J_4

1K/J_4

R200

R200 *1K/J_4

*1K/J_4

U42G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield/Auburndale

+1.1V_VTT

R206

R216

*1K/J_4

R215

R205

1K/J_4

HFM_VID : Max 1.4V LFM_VID : Min 0.65V

2

R221

R221 1K/J_4

1K/J_4

R220

R220 *1K/J_4

*1K/J_4

GRAPHICS

FDI PEG & DMI

POWER

R224

R233

*1K/J_4

1K/J_4

R232

R223

R223 1K/J_4

1K/J_4

*1K/J_4

AR22

VAXG_SENSE

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_DPRSLPVR

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1.1V1.8V

R227

R227 *1K/J_4

*1K/J_4

R226

R226 1K/J_4

1K/J_4

VCC_AXG_SENSE (44) VSS_AXG_SENSE (44)

GFX_VID0 (44) GFX_VID1 (44) GFX_VID2 (44) GFX_VID3 (44) GFX_VID4 (44) GFX_VID5 (44) GFX_VID6 (44)

R566 4.7K_4R566 4.7K_4 R567 *10K/J_4R567 *10K/J_4

GFX_ON (44)

GFX_IMON (44)

R245 *1K/J_4R245 *1K/J_4

C327

C327 1U/10V_4

1U/10V_4

C324

C324 22U/6.3V_8

22U/6.3V_8

C666

10U/6.3V_6

C664

C664 22U/6.3V_8

22U/6.3V_8

C275

C275 1U/10V_4

1U/10V_4

C232

C232 22U/6.3V_8

22U/6.3V_8

C660

C660 10U/6.3V_6

10U/6.3V_6

C663

C663 22U/6.3V_8

22U/6.3V_8

GFX_DPRSLPVR (44)

add it for Intel suggestion at 6/1

ARD:3A CFD:6A

+1.5V_CPUVDDQ

C269

C289

1U/10V_4

+1.1V_VTT

C289 1U/10V_4

1U/10V_4

C297

C297 1U/10V_4

1U/10V_4

+

C332

C332 330U/2V_7343

330U/2V_7343

0.6A

C250

C255

C672

C670

C246

1U/10V_4

2.2U/10V_6

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 3/4 (PWR)

Date: Sheet

PROJECT :

1

4.7U/10V_6

ZR9

C246 22U/6.3V_8

22U/6.3V_8

647Thursday, May 06, 2010

of

+1.8V

1A

22A

+VGFX_AXG

330U/2V_7343

C355

22U/6.3V_8

C704

10U/6.3V_8

+1.1V_VTT

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_DPRSLPVR H_PSI#

3

330U/2V_7343

+

C535 and C1005 may be can save

C673

C673 22U/6.3V_8

22U/6.3V_8

Note: For Validating IMVP VR R6451 should be STUFF and R2N1 NO_STUFF

C708

C356

C356 22U/6.3V_8

22U/6.3V_8

C341

C341 10U/6.3V_8

10U/6.3V_8

22U/6.3V_8

C277

+

C706

C705

C705 22U/6.3V_8

22U/6.3V_8

C340

C340 10U/6.3V_8

10U/6.3V_8

C244

C244 22U/6.3V_8

22U/6.3V_8

C270

C270 22U/6.3V_8

22U/6.3V_8

R198

R198 1K/J_4

1K/J_4

R197

R197 *1K/J_4

*1K/J_4

C306

C306 22U/6.3V_8

22U/6.3V_8

R194

R194 1K/J_4

1K/J_4

R193

R193 *1K/J_4

*1K/J_4

C662

C662 22U/6.3V_8

22U/6.3V_8

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U42H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

D D

C C

B B

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

Clarksfield/Auburndale

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

U42I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

Clarksfield/Auburndale

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

TP59TP59 TP56TP56 TP3TP3

VREF_DQ_DIMM0(14) VREF_DQ_DIMM1(15)

CHECKLIST 2.0 CONNECT TO GND

TP2TP2

TP52TP52 TP55TP55

CFG0

CFG3 CFG4

CFG7

U42E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Clarksfield/Auburndale

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD_TP_59 RSVD_TP_60

RESERVED

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

AJ13

RSVD32

AJ12

RSVD33

AH25

RSVD34

AK26

RSVD35

AL26

RSVD36

AR2 AJ26

RSVD38

AJ27

RSVD39

AP1 AT2

AT3 AR1

AL28

RSVD45

AL29

RSVD46

AP30

RSVD47

AP32

RSVD48

AL27

RSVD49

AT31

RSVD50

AT32

RSVD51

AP33

RSVD52

AR33

RSVD53

AT33 AT34 AP35 AR35 AR32

RSVD58

E15 F15 A2

KEY

D15

RSVD62

C15

RSVD63

AJ15

RSVD64 RSVD65

VSS

TP12TP12

AH15

TP16TP16

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

TP57TP57

AP34 can be NC on CRB; EDS/DG suggestion to GND

Processor Strapping

A A

CFG4 (Display Port Presence)

CFG0 (PCI-Epress Configuration Select)

CFG3 (PCI-Epress Static Lane Reversal)

Disabled; No Physical Display Port attached to Embedded Diplay Port

Single PEG

Normal Operation Lane Numbers Reversed

5

10

Enabled; An external Display port device is connected to the Embedded Display port

Bifurcation enabled

4

CFG[ 1:0 ] - PCI_Epress Configuration Select

Use reverse type

* 11= 1 x 16 PEG * 10= 2 x 8 PEG

+1.1V_VTT

R260 3.01K/F_4R260 3.01K/F_4 R261 3.01K/F_4R261 3.01K/F_4 R237 *3.01K/F_4R237 *3.01K/F_4

3

CFG4

R242 *3.01K/F_4R242 *3.01K/F_4

CFG0

R243 *3.01K/F_4R243 *3.01K/F_4

CFG3

R236 3.01K/F_4R236 3.01K/F_4

CFG7

R562 *3.01K/F_4R562 *3.01K/F_4

The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed.(ES1 only)

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 4/4

Date: Sheet

PROJECT :

ZR9

747Wednesday, May 05, 2010

of

1

of

1A

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

U47C

ACIN_R

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_R1P0

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

SLP_LAN# / GPIO29

DMI_RXN0(4)

D D

C C

SYS_PWROK

B B

DMI_RXN1(4) DMI_RXN2(4) DMI_RXN3(4)

DMI_RXP0(4) DMI_RXP1(4) DMI_RXP2(4) DMI_RXP3(4)

DMI_TXN0(4) DMI_TXN1(4) DMI_TXN2(4) DMI_TXN3(4)

DMI_TXP0(4) DMI_TXP1(4) DMI_TXP2(4) DMI_TXP3(4)

R612 49.9/F_4R612 49.9/F_4

+1.05V

*0/short_4

XDP_DBRST#_R

SYS_PWROK_R

PCHPWROK

MEPWROK

RSV_ICH_LAN_RST#

R238 *0/short_4R238 *0/short_4

SUS_PWR_ACK_R

R632

R632 *0/short_4

*0/short_4 R397

R397 *0/J_4

*0/J_4

XDP_DBRST#_R(4)

R419

R648

R420

PM_DRAM_PWRGD(4,31)

ICH_RSMRST#(36)

DNBSWON#(36)

PCH_ACIN(36)

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

SUS_STAT#

P8

R636 *0/short_4R636 *0/short_4

F3

SLP_S5#_R

E4

H7

P12

SLP_M#

K8

N2

BJ10

PM_SLP_LAN#

F6

R400 *0/J_4R400 *0/J_4

TP43TP43

TP45TP45

TP72TP72

TP49TP49

FDI_TXN0 (4) FDI_TXN1 (4) FDI_TXN2 (4) FDI_TXN3 (4) FDI_TXN4 (4) FDI_TXN5 (4) FDI_TXN6 (4) FDI_TXN7 (4)

FDI_TXP0 (4) FDI_TXP1 (4) FDI_TXP2 (4) FDI_TXP3 (4) FDI_TXP4 (4) FDI_TXP5 (4) FDI_TXP6 (4) FDI_TXP7 (4)

FDI_INT (4) FDI_FSYNC0 (4) FDI_FSYNC1 (4) FDI_LSYNC0 (4) FDI_LSYNC1 (4)

PCIE_WAKE# (26)

CLKRUN# ( 31,36)

ICH_SUSCLK (36)

SUSC# (36)

SUSB# (36)

PM_SYNC (4)

INT_LVDS_BLON(23)

INT_LVDS_DIGON(23)

INT_LVDS_BRIGHT(23)

INT_LVDS_EDIDCLK(23) INT_LVDS_EDIDDATA(23)

INT_TXLCLKOUTN(23)

INT_TXLCLKOUTP(23)

INT_TXLOUTN0(23)

INT_TXLOUTN1(23)

INT_TXLOUTN2(23)

INT_TXLOUTP0(23)

INT_TXLOUTP1(23)

INT_TXLOUTP2(23)

INT_CRT_BLU(23) INT_CRT_GRE(23) INT_CRT_RED(23)

INT_CRT_DDCCLK(23) INT_CRT_DDCDAT(23)

INT_HSYNC(23)

INT_VSYNC(23)

+3V

R287 10K/J_4R287 10K/J_ 4 R288 10K/J_4R288 10K/J_ 4

R325 2.37K/F_4R325 2.37K/F_4

R308 *0/short_4R308 *0/short_4 R313 *0/short_4R313 *0/short_4

INT_TXLCLKOUTN INT_TXLCLKOUTP

INT_TXLOUTN0 INT_TXLOUTN1 INT_TXLOUTN2

INT_TXLOUTP0 INT_TXLOUTP1 INT_TXLOUTP2

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

R576

R576 R577

R577

*0/short_4

*0/short_4 *0/short_4

*0/short_4

DAC_IREF

R301

R301 1K/F_4

1K/F_4

IBEX PEAK-M (LVDS,DDI)

U47D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

HSYNC_R VSYNC_R

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49 AU52 AT53

AY51 AT48 AU50 AT51

AA52 AB53 AD53

AD48 AB51

V51 V53

Y53 Y51

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

IbexPeak-M_R1P0

LVDS

Digital Display Interface

CRT

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

INT_HDMI_TXN2_C INT_HDMI_TXP2_C INT_HDMI_TXN1_C INT_HDMI_TXP1_C INT_HDMI_TXN0_C INT_HDMI_TXP0_C INT_HDMI_TXCN_C INT_HDMI_TXCP_C

SDVO_CTRLCLK (24) SDVO_CTRLDAT (24)

C425 IV@0.1U/10V_4C425 IV@0.1U/10V_4 C422 IV@0.1U/10V_4C422 IV@0.1U/10V_4 C419 IV@0.1U/10V_4C419 IV@0.1U/10V_4 C416 IV@0.1U/10V_4C416 IV@0.1U/10V_4 C429 IV@0.1U/10V_4C429 IV@0.1U/10V_4 C426 IV@0.1U/10V_4C426 IV@0.1U/10V_4 C415 IV@0.1U/10V_4C415 IV@0.1U/10V_4 C411 IV@0.1U/10V_4C411 IV@0.1U/10V_4

R place close to PCH

R579 150/J_4R579 150/J_4 R575 150/J_4R575 150/J_4 R578 150/J_4R578 150/J_4

INT_HDMI_HPD (24)

INT_HDMI_TXN2 (24) INT_HDMI_TXP2 (24) INT_HDMI_TXN1 (24) INT_HDMI_TXP1 (24) INT_HDMI_TXN0 (24) INT_HDMI_TXP0 (24) INT_HDMI_TXCN (24) INT_HDMI_TXCP (24)

INT_CRT_BLU INT_CRT_GRE INT_CRT_RED

PCH Pull-high/low

+3V

CLKRUN#

A A

XDP_DBRST#_R

ICH_RSMRST# RSV_ICH_LAN_RST#

SYS_PWROK ACIN_R

R642 8.2K/J_4R642 8.2K/J_4 R395 1K/J_4R395 1K/J_4

R617 10K/J_4R617 10K/J_4 R620 10K/J_4R620 10K/J_4

5

PM_RI# PM_BATLOW# PCIE_WAKE# PM_SLP_LAN# SUS_PWR_ACK_R

R347 10K/J_4R347 10K/J_4 R646 8.2K/J_4R646 8.2K/J_4 R618 1K/J_4R618 1K/J_4 R409 *10K/J_4R409 *10K/J_4 R650 10K/J_4R650 10K/J_4 R417 10K/J_4R417 10K/J_4R418 *10K/J_4R418 *10K/J_4

+3V_S5

4

System PWR_OK

3

C744 *0.1U/10V_4C744 *0.1U/10 V_4

SYS_PWROK

U49

TC7SH08FU

+3V_S5

'(/$<B95B3:5*22'QHHG38.WR9 38DWSRZHUVLGH

53

1

4

2

R626 100K/J_4R626 100K/J_4

DELAY_VR_PWRGOOD (4,39) PWROK_EC (36)

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 1/6

Date: Sheet

PROJECT :

ZR9

of

847Thursday, May 06, 2010

1

847Thursday, May 06, 2010

1A

5

RTC Circuitry

+VCCRTC

D26

20mils

D26

BAT54C

1 3

2

20MIL

RTC_N01

Q37

MMBT3904

RTC_N03

C730

*27P/50V_4

C735

C735 1U/10V_4

1U/10V_4

C461

C461 1U/10V_4

1U/10V_4

R594

68.1K/F_4

R595

R595 150K/F_6

150K/F_6

RTC_RST#

12

J2

*SHORT_ PAD1

SRTC_RST#

12

J1

*SHORT_ PAD1

+5V_S5

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

ACZ_BIT_CLK

R614 20K/F_4R614 20K/F_4

30mils

R334 20K/F_4R334 20K/F_4

C734

C734 1U/10V_4

1U/10V_4

R596 22K_6R596 22K_6

R607 22/J_4R607 22/J_4 R608 22/J_4R608 22/J_4 R603 22/J_4R603 22/J_4 R604 22/J_4R604 22/J_4 R609 22/J_4R609 22/J_4 R351 37.4/F_4R351 37.4/F_4 R610 22/J_4R610 22/J_4

R605 22/J_4R605 22/J_4

R606 22/J_4R606 22/J_4

C727

C727 *27P/50V_4

*27P/50V_4

+3VPCU

VCCRTC_1

20MIL

D D

R590

R590 1K/J_4

1K/J_4

VCCRTC_2

20MIL

12

CN19

CN19 RTC_ML2032

RTC_ML2032

HDA Bus

C C

PCH_AZ_MDC_SYNC(33) PCH_AZ_CODEC_SYNC(30) PCH_AZ_MDC_RST#(33) PCH_AZ_CODEC_RST#(30) PCH_AZ_MDC_SDOUT(33) PCH_AZ_CODEC_SDOUT(30)

PCH_AZ_MDC_BITCLK(33) PCH_AZ_CODEC_BITCLK(30)

Place all series terms close to PCH except for SDIN input lines,which should be close to source.Placement of R773, R775, R776 & R777 should equal distance to the T split trace point. Basically, keep the same distance from T for all series termination resistors.

PCH SPI

B B

SPI_CS0#_R SPI_CLK_R SPI_SI_R SPI_SO_R

C740

C740 *22P/50V_4

*22P/50V_4

R403 3.3K/F_4R403 3.3K/F_4

+3V

A A

5

U28

1

CE#

6

SCK

5

SI

2

SO

3

WP#

W25X32VSSIG

HOLD#

VDD

VSS

8

R425 3.3K/F_4R425 3.3K/F_4

7 4

+3V

C538

0.1U/10V_4

4

+VCCRTC

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

PCH_AZ_CODEC_SDIN0(30) PCH_AZ_MDC_SDIN1(33)

+3V_S5

PCH Strap Table

Pin Name Strap description

SPKR

INIT3_3V

GNT3# / GPIO55

INTVRMEN

GNT1# / GPIO51

GNT0#

GNT2# / GPIO 53

NV_ALE

NV_CLE

HDA_DOCK_EN#/GPIO33

SPI_MOSI

HDA_SDO GPIO8 GPIO27 HDA_SYNC

GPIO15

4

No reboot mode setting PWRO K

Reserved

Integrated 1.05V VRM enable ALWAYS

Boot BIOS Selection 1 [bit-1]

Boot BIOS Selection 0 [bit-0]

ESI strap (Server only)

Intel Anti-T heft HDD protection PWROK 0 = Disable (Internal pull-down 32ohm)

DMI Termination volt age

Flash Descriptor Security

iTPM function Disable MEPWROK 0 = Default (weak pull-down 20K)

Reserved Reserved On-die PLL Voltage Regulator

On-die PLL PWR suppl y select RSMRST#

Reserved RSMRST#

C736

C739

15P/50V_4

SPKR(30)

TP75TP75 TP76TP76 TP73TP73 TP74TP74 TP77TP77

+3VPCU

3

23

Y8

R619

R619 10M/J_4

10M/J_4

32.768KHZY832.768KHZ

4 1

R615 1M/J_4R615 1M/J_4

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

R333 *10K/J_4R333 *10K/J_4

HDA_DOCK_EN#

PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_RST#

R625 *10K/J_4R625 *10K/J_4

Sampled

PWROK

PWROKTop-Block Swap Override

PWROK

RSMRST# RSMRST# RSMRST#

3

IBEX PEAK-M (HDA,JTAG,SATA)

U47A

RTC_X1 RTC_X2

RTC_RST# SRTC_RST# SM_INTRUDER# PCH_INVRMEN

TP32TP32 TP31TP31

PCH_GPIO13

SPI_CLK_R SPI_CS0#_R SPI_CS1#

SPI_SI_R SPI_SO_R

0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode

1 = Default (weak pull-up 20K) Should not be pull-down

0 = "top-block swap" mode 1 = Default (weak pull-up 20K)

Should be always pull-up

Should not be pull-down (weak pull-up 20K)

weak pull-down 32ohm

0 = Overri de 1 = Default (weak pull-up 20K)

1 = Enable

Should not be pull-up (weak pull-down 20K) Should not be pull-down (weak pull-up 20K)

0 = Disable 1 = Enable (weak pull-up 20K)

0 = 1.8V supply (weak pull-down 20K) 1 = 1.5V supply

0 = TLS no Confidentiality (weak pull-down 20K) 1 = TLS Confidentiality

U47A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_R1P0

Configuration

GNT0#GNT1#

11

01

00

Boot Location

SPI

PCI

LPC

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

FWH4 / LFRAME#

LDRQ1# / GPIO23

RTCIHDA

LPC

SATA0RXN SATA0RXP SATA0TXN

SATA1RXN SATA1RXP SATA1TXN

SATA2RXN SATA2RXP SATA2TXN

SATA3RXN SATA3RXP SATA3TXN

SATA4RXN SATA4RXP SATA4TXN

SATA

SATA5RXN SATA5RXP SATA5TXN

SATAICOMPO

SATAICOMPI

SATA0GP / GPIO21 SATA1GP / GPIO19

SPI JTAG

+3V

+VCCRTC

Default weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]

+3V

+1.8V

+3V

+3V_S5

use defaul (0 = 1.8V supply)

+3V_S5

2

D33 B33 C32 A32

C34 A34

LDRQ0#

F34 AB9

SERIRQ

AK7 AK6 AK11 AK9

SATA0TXP

AH6 AH5 AH9 AH8

SATA1TXP

AF11 AF9 AF7 AF6

SATA2TXP

AH3 AH1 AF3 AF1

SATA3TXP

AD9 AD8 AD6 AD5

SATA4TXP

AD3 AD1 AB3 AB1

SATA5TXP

AF16 AF15

T3

SATALED#

Y9 V1

ZY9B note

R633 *10K/J_4R633 *10K/J_4

R583 *4.7K_4R583 *4.7K_4

R616 330K/J_4R616 330K/J_4

R286 *1K/J_4R286 *1K/J_4 R282 *1K/J_4R282 *1K/J_4

R285 1K/J_4R285 1K/J_4 R306 1K/J_4R306 1K/J_4

R307 *4.7K_4R307 *4.7K_4

R623 *1K/J_4R623 *1K/J_4

R622 *1K/J_4R622 *1K/J_4

R310 *1K/J_4R310 *1K/J_4 R309 *10K/J_4R309 *10K/J_4

R624 *1K/J_4R624 *1K/J_4

+3V

R383 10K/J_4R383 10K/J_4

R364 *10K/J_4R364 *10K/J_4

R414 1K/J_4R414 1K/J_4

2

PCH_DRQ#0 PCH_DRQ#1

SATA_TXN0_C SATA_TXP0_C

SATA_TXN1_C SATA_TXP1_C

TP69TP69 TP30TP30

R392 10K/J_4R392 10K/J_4

C533 0.01U/25V_4C533 0.01U/25V_4 C532 0.01U/25V_4C532 0.01U/25V_4

C534 0.01U/25V_4C534 0.01U/25V_4 C535 0.01U/25V_4C535 0.01U/25V_4

Note: SATA port2/3 may not be available on all PCH sku (HM55 support 4port only)

R412 *10K/J_4R412 *10K/J_4

R644 10K/J_4R644 10K/J_4

NV_ALE

NV_CLE

SPKR

PCI_GNT3# (10)

PCH_INVRMEN

PCI_GNT0# (10) PCI_GNT1# (10)

PWM_SELECT# (10,23)

NV_ALE (10)

NV_CLE (10)

HDA_DOCK_EN#

SPI_SI_R

RSV_GPIO8 (11)

RSV_GPIO27 (11)

CR_WAKE# (11)

+3V

+1.05V

SATA_ACT# (35)

PCH_ODD_EN (29)

Size Document Number Rev

IBEX PEAK-M 2/6

Date: Sheet

1

LPC_LAD0 (28,31,36) LPC_LAD1 (28,31,36) LPC_LAD2 (28,31,36) LPC_LAD3 (28,31,36)

LPC_LFRAME# (28,31,36)

IRQ_SERIRQ (31,36)

SATA_RXN0 (29) SATA_RXP0 (29) SATA_TXN0 (29) SATA_TXP0 (29)

SATA_RXN1 (29) SATA_RXP1 (29) SATA_TXN1 (29) SATA_TXP1 (29)

SATA HDD

SATA ODD

Quanta Computer Inc.

PROJECT :

1

CAP. Close connect side

ZR9

947Wednesday, May 05, 2010

of

1A

5

4

3

2

1

IBEX PEAK-M (PCI,USB,NVRAM)

U47E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

D D

PCI_PIRQA#

TP29TP29

PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

TP66TP66

C C

B B

dGPU_SELECT#(23)

PCI_GNT 0#(9) PCI_GNT 1#(9)

PWM_SELECT#(9,23)

PCI_GNT 3#(9)

PCI_RS T#(28)

CLK_LPC_DEBUG(28) CLK_LPC_TPM(31)

CLK_PCI_775(36)

CLK_PCI_FB CLK_PCI_FB_C

TP65TP65

TP67TP67 TP61TP61 TP68TP68 TP62TP62

TP21TP21 TP18TP18

TP22TP22 TP28TP28 TP24TP24 TP64TP64

TP19TP19 TP25TP25

TP63TP63

TP44TP44

R284 22J_4R284 22J_4 R580 22J_4R580 22J_4 R300 22J_4R300 22J_4 R283 22J_4R283 22J_4

PCI_RE Q0# PCI_RE Q1# dGPU_SELECT# PCI_RE Q3#

PCI_GNT 0# PCI_GNT 1#

PCI_GNT 3# PCI_PIRQE#

PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_RS T# PCI_SERR#

PCI_PER R#

PCI_IRDY# PCI_PAR PCI_DE VSEL# PCI_FRAME#

PCI_PLO CK# PCI_STOP#

PCI_TRDY# ICH_PME# PCI_PLTRST#

CLK_PCI_TPM_C CLK_PCI_775_CCLK_PCI_775_C

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST #

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_R1P0

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

USB

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

NV_ALE

BD3

NV_CLE

AY6

NV_RCOMP

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22

USBP7-

B21

USBP7+

D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

USB_BIAS

B25 D25

USB_OC0#

N16

USB_OC1#

J16

USB_OC2#

F16

USB_OC3#CLK_LPC_DEBUG_C

L16

USB_OC4#

E14

USB_OC5#

G16

USB_OC6#

F12

USB_OC7#

T15

NV_ALE (9) NV_CLE (9)

R376 *32.4/F_4R376 *32.4/F_4

Port1 and port9 can be used on debug mo de

USBP0- (33) USBP0+ (33) USBP1- (32) USBP1+ (32) USBP11- (32) USBP11+ (32) USBP3- (32) USBP3+ (32) USBP9- (32) USBP9+ (32) USBP5- (28) USBP5+ (28)

TP40TP40 TP39TP39

USBP8- (23) USBP8+ (23) USBP4- (32) USBP4+ (32) USBP10- (28) USBP10+ (28) USBP2- (34) USBP2+ (34) USBP12- (25) USBP12+ (25) USBP13- (28) USBP13+ (28)

R613

Docking M/B USB EXT-USB1-1 EXT-USB2 15" USB PORT SIMM card

USB port6/7 may not be available on all PCH sku (HM55 support 12port only)

Camera BLUETOOTH Mini Card (WWAN) Finger Printer Card reader Mini Card (WLAN)

22.6/F_4

TP38TP38 TP35TP35

TP71TP71 TP70TP70

3/22 modify

USB_OC0# (32) USB_OC1# (32)

USB_OC4_5# (32)

Mini 3G

EHCI1

MiniWLAN

EHCI2

Express Card

Mini 3G

MiniWLAN

PCIE_R XN1(26) PCIE_R XP1(26)

LAN

PCIE_TXN1(26) PCIE_TXP1(26)

PCIE_R XN2(28) PCIE_R XP2(28) PCIE_TXN2(28) PCIE_TXP2(28)

PCIE_R XN6(28) PCIE_R XP6(28) PCIE_TXN6(28) PCIE_TXP6(28)

Note: PCIE port7/8 may not be available on all PCH sku (HM55 support 6port only)

CLK_PCH_SRC1N(28) CLK_PCH_SRC1P(28)

CLK_PCIE_REQ1#_R(28)

CLK_PCH_SRC2N(28) CLK_PCH_SRC2P(28)

CLK_PCIE_WLAN#(28)

CLK_PCIE_LOMN(26)

LAN

CLK_PCIE_LOMP(26)

CLK_PCIE_LAN_REQ#(26)

C732 0.1U/10V_4C732 0.1U/10V_4

C733 0. 1U/10V_4C733 0.1U/10V_4

C447 0.1U/10V_4C447 0.1U/10V_4

C453 0. 1U/10V_4C453 0.1U/10V_4

C441 0.1U/10V_4C441 0.1U/10V_4

C433 0. 1U/10V_4C433 0.1U/10V_4

R294 *0/short_4R294 *0/short_4 R293 *0/short_4R293 *0/short_4

R280 *0/short_4R280 *0/short_4 R279 *0/short_4R279 *0/short_4

R586 *0/short_4R586 *0/short_4 R587 *0/short_4R587 *0/short_4

CLK_PCIE_REQ5#

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U47B

BG30

PERN1

BJ30

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

T31T31 T32T32 T30T30 T29T29

PCIE_TXN6_C PCIE_TXP6_C

CLK_PCIE_REQ0#

CLK_PCH_SRC1N_R CLK_PCH_SRC1P_R

CLK_PCIE_REQ1#_R

CLK_PCH_SRC2N_R CLK_PCH_SRC2P_R

CLK_PCIE_WLAN#

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCH_SRC6N_R CLK_PCH_SRC6P_R

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_R1P0

SMBus

PCI-E*

Link

Controller

PEG

CLKOUT_DP_N / C L K O UT_ B C LK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

Clock Flex

SMBALERT# / GPIO11

SMBCLK

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

CL_CLK1 CL_DATA1 CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_R COMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

B9 H14 C8

J14 C6 G8

M14 E10 G12

CL_CLK1

T13

CL_DATA1

T11

CL_RST1#

T9

PEG_CLKREQ#_R

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

XCLK_R COMP

AF38

BOARD_ID1

T45

BOARD_ID2

P43

BOARD_ID3

T42

N50

RSV_SMBALERT# ICH_SMBCLK ICH_SMBDATA

RSV_SML0ALERT# SMB_CLK_ME0 SMB_DATA_ME0

RSV_SML1ALERT# SMB_CLK_ME1 SMB_DATA_ME1

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

R311 90.9/F_4R311 90.9/ F_4

R581 10K/J_4R581 10K/J_4

ICH_SMBCLK (3,26,28) ICH_SMBDATA (3,26,28)

R340 *0/J_4R340 *0/J_4

1/20 modify

For LAN

SML1ALERT# (11,34,36)

For EC

CL_CLK1 (28) CL_DATA1 (28) CL_RST1# (28)

3/18 change stort pad

R652 * 0/short_4R652 *0/short_4

No stuff XTAL25_IN and XTAL25_OUT circuitry until integrated CG becomes PCH POR.

PEG_CLKREQ# (16)

PEG_A_CLKRQ# PD for FreeRun, due GPU not support.

CLK_PCIE_VGAN (16) CLK_PCIE_VGAP (16)

CLK_PCIE_3GPLLN (4) CLK_PCIE_3GPLLP (4)

DPLL_REF_SSCLKN (4) DPLL_REF_SSCLKP (4)

CLK_BUF_PCIE_3GPLLN (3) CLK_BUF_PCIE_3GPLLP (3)

CLK_BUF_BCLKN (3) CLK_BUF_BCLKP (3)

CLK_BUF_DREFCLKN (3) CLK_BUF_DREFCLKP (3)

CLK_BUF_DREFSSCLKN (3) CLK_BUF_DREFSSCLKP (3)

CLK_ICH_14M (3)

dGPU_EDIDSEL# (23,24)

+3V

+1.05V

1/11 change to 33P

C715 33P/50V_4C715 33P/50V_4

21

Y7

R588

25MHzY725MHz

1M/J_4

C714 33P/50V_4C714 33P/50V_4

PLTRST#

Add Buffers as needed for

+3V_S5

Loading and fanout concerns.

C745

0.1U/10V_4

PCI_PLTRST#

2

R172 0_4R172 0_4

A A

+3V

4

1

U48

3 5

R174

TC7SH08FU

*0_4

R627

R627 100K/J_4

100K/J_4

PLTRST# (4,11,16,25,26,28,31,36)

4/20 reserved

5

PCI/USBOC# Pull-up CLK_REQ/Strap Pin

+3V_S5

R415 10K/J_4R415 10K/J_4 R638 10K/J_4R638 10K/J_4 R399 10K/J_4R399 10K/J_4 R423 10K/J_4R423 10K/J_4 R416 10K/J_4R416 10K/J_4 R634 IV@10K/J_4R634 IV@10K/J_4

+3V

R630 10K/J_4R630 10K/J_4 R396 10K/J_4R396 10K/J_4 R591 10K/J_4R591 10K/J_4 R597 8.2K/J_4R597 8.2K/J_4 R582 8.2K/J_4R582 8.2K/J_4 R602 8.2K/J_4R602 8.2K/J_4

R651 *SW@10K/J_4R651 *SW@10K/J_4

USB_OC7# USB_OC6# USB_OC5# USB_OC4#

+3V_S5

PCI_RE Q0# PCI_PIRQB# PCI_RE Q3# PCI_PIRQD#

+3V

PCI_PLO CK# PCI_SE RR# PCI_DE VSEL# PCI_STOP#

+3V

6 7 8 9

10

6 7 8 9

10

6 7 8 9

10

RP4

8.2K_10P8R

RP3

8.2K_10P8R

RP2

8.2K_10P8R

4

5 4 3 2 1

USB_OC0# USB_OC1# USB_OC2# USB_OC3#

PCI_PIRQH# PCI_TR DY# PCI_FRAME# PCI_RE Q1#

PCI_PERR# PCI_PIRQC# PCI_IRDY# PCI_PIRQA#

+3V_S5

+3V

CLK_PCIE_REQ0# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5# CLK_PCIE_LAN_REQ#

PEG_CLKREQ#_R

CLK_PCIE_REQ1#_R CLK_PCIE_WLAN# dGPU_SELECT# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG#

PEG_CLKREQ#_R

3

PEG_A_CLKRQ# PD for FreeRun, due GPU not support.

A16 swap override Strap/Top-Block Swap Override jumper

Low = A16 swap override/Top-Block

PCI_GNT3#

Swap Override enabled High = Default

Danbury Technology Enabled

High = Enable

NV_ALE

Low = Disable

DMI Termination Voltage

Set to Vcc when LOW

NV_CLE

Set to Vcc/2 when HIGH

+3V_S5

R647 10K/J_4R647 10K/J_4 R342 10K/J_4R342 10K/J_4 R341 10K/J_4R341 10K/J_4 R357 2.2K/J_4R357 2.2K/J_4 R361 2.2K/J_4R361 2.2K/J_4 R134 4. 7K_4R134 4.7K_4 R135 4. 7K_4R135 4.7K_4

Board ID3 Board ID2 Board ID1

Debug port 0:PCI 1:LPC(default)

110

11NC 111

+3V

R653 * 10K_4R653 *10K_4 R654 10K_4R654 10K_4 R656 10K_4R656 10K_4

2

RSV_SMBALERT# RSV_SML0ALERT# RSV_SML1ALERT# ICH_SMBCLK ICH_SMBDATA SMB_CLK_ME0 SMB_DATA_ME0

1/20 modify

0:ZQ3 series 1:ZR9 series

Main Board ID

BOARD_ID1

R661 10K_4R661 10K_4

BOARD_ID2

R655 * 10K_4R655 *10K_4

BOARD_ID3

R657 * 10K_4R657 *10K_4

0:non- optimas 1:NV optimas

NC11

011

+3V_S5

Q18 *2N7002KQ18 *2N7002K

Board ID0

0:UMA 1:Discrete

NC 0 1 NC 1

2ND_MBCLK(36)

2ND_MBDATA(36)

Size Document Number Rev

IBEX PEAK-M 3/6

Date: Sheet of

Date: Sheet

3

R370 0_4R370 0_4

+3V_S5

Q17

3

R348 0_4R348 0_4

Quanta Computer Inc.

PROJECT :

1

2

1

*2N7002K

1

ZR9

R377

2.2K/J_4

SMB_CLK_ME1

R349

2.2K/J_4

SMB_DATA_ME1

of

10 47Wednesday, May 05, 2010

1A

SMBus/Pull-up

5

BMBUSY#

SIO_EXT_SMI#(36) SIO_EXT_SCI#(36)

D D

dGPU_PWROK(18)

dGPU_PWR_EN# should be stable before dGPU_VRON enable

C C

SML1ALERT#(10,34,36)

EC suggestion use GPIO49 for FAN control

SATA5GP / GPIO49 / TEMP_ALERT# is used to alert for EC when CPU or Graph/Memory controllers' temperature go out of limit. So connecting GPIO49 to EC and avoid this pin to be used for other purpose

B B

RSV_GPIO8(9)

TP48TP48

CR_WAKE#(9)

TP47TP47

RSV_GPIO27(9)

dGPU_VRON(43)

dGPU_PWR_EN(45)

RST_GATE#(31)

R629 *0/short_4R629 *0/short_4

SIO_EXT_SMI# SIO_EXT_SCI# BOARD_ID0 RSV_GPIO8 LAN_DISABLE# CR_WAKE# dGPU_HOLD_RST#

GPIO22

GPIO27 TP_PCH_GPIO28 STP_PCI#

dGPU_PWR_EN dGPU_PRSNT# GPIO38 SAVE_LED# GPIO45 RST_GATE# SV_SET_UP

SATA5GP

GPIO57

4

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U47F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_R1P0

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18

TP19 NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

3

2

1

GPU RST#

TP_PCH_PCIE6N

AH45

TP_PCH_PCIE6P

AH46

AF48

4/16

AF47

Delete test pad to reserve spacing

U2

AM3 AM1

PCH_PECI_R

BG10 T1 BE10

PCH_THRMTRIP#_R

BD10

TP1_PCH

BA22

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9

AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

P6 C10

TP2_PCH

TP_INT3_3V

TP27TP27 TP26TP26

R621 *0/short_4R621 *0/short_4

R366 56/F_4R366 56/F_4

TP36TP36 TP37TP37

TP46TP46

SIO_A20GATE (36)

CLK_CPU_BCLKN (4) CLK_CPU_BCLKP (4) H_PECI (4) SIO_RCIN# (36) H_PWRGOOD (4)

R368 56/F_4R368 56/F_4

GPU_RST#(16)

PM_THRMTRIP# (4)

+1.1V_VTT

GPIO Pull-up/Pull-down

SV_SET_UP 1-X High = Strong (Default)

+3V

1/25 modify

+3V

C743 *SW@0.1U/10V_4C743 *SW@0.1U/10V_4

53

1

4

2

U50

U50 SW@TC7SH08FU

SW@TC7SH08FU

TP_PCH_GPIO28 GPIO45 RST_GATE# GPIO57 LAN_DISABLE#

SIO_EXT_SMI# SIO_EXT_SCI#

dGPU_PWR_EN

SIO_RCIN# SIO_A20GATE dGPU_HOLD_RST# SATA5GP GPIO22 dGPU_PRSNT# SAVE_LED# STP_PCI#

GPIO38 BMBUSY# SV_SET_UP

GPIO57

R315 SW@10K/J_4R315 SW@10K/J_4

dGPU always exist

PLTRST# (4,10,16,25,26,28,31,36)

dGPU_HOLD_RST#

R628

R628 SW@100K/J_4

SW@100K/J_4

R413 10K/J_4R413 10K/J_4 R635 10K/J_4R635 10K/J_4 R637 10K/J_4R637 10K/J_4 R408 *10K/J_4R408 *10K/J_4 R422 10K/J_4R422 10K/J_4

R600 10K/J_4R600 10K/J_4 R601 10K/J_4R601 10K/J_4

R411 IV@10K/J_4R411 IV@10K/J_4

R631 10K/J_4R631 10K/J_4 R645 10K/J_4R645 10K/J_4 R640 *SW@10K/J_4R640 *SW@10K/J_4 R639 10K/J_4R639 10K/J_4 R394 10K/J_4R394 10K/J_4 R391 IV@10K/J_4R391 IV@10K/J_4 R649 10K/J_4R649 10K/J_4 R398 10K/J_4R398 10K/J_4

R643 10K/J_4R643 10K/J_4 R641 8.2K/J_4R641 8.2K/J_4 R393 10K/J_4R393 10K/J_4

R405 10K/J_4R405 10K/J_4

BOARD_ID0

dGPU_PRSNT#

R316 IV@10K/J_4R316 IV@10K/J_4

R410 SW@10K/J_4R410 SW@10K/J_4

+3V_S5

+3V

1/19 modify

+3V

Integrated Clock Chip Enable

BOARD_ID0

A A

RSV_GPIO8

High = Discrete

Low = SW

High = Disable

Low = Enable

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 4/6

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

ZR9

1A

of

11 47Wednesday, May 05, 2010

1

IBEX PEAK-M (POWER)

VCCCORE(+1.05V) = 1.432A(80mils)

D D

40mA(15mils)

C C

VRM enable by strap pin GPIO27 which supply clean 1.05V for [VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

B B

+1.05V

A A

5

+1.05V

37mA(15mils)

L54 10uh_8L54 10uh_8

L53 10uh_8L53 10uh_8

R599 *0/short_8R599 *0/short_8 R598 *0/short_8R598 *0/short_8

R336 *0/short_6R336 *0/short_6

L34 *1uH_6L34 *1uH_6

C469 *10U/6.3V_6C469 *10U/6.3V_6

VCCIO = 3.062A(150mils)

L36 *1uH_6L36 *1uH_6

C477

C477 *10U/6.3V_6

*10U/6.3V_6

VCCVRM=196mA(15mils)

R355 *0/short_6R355 *0/short_6

+1.8V

+V1.1LAN_VCCA_A_DPL

+

C713

C713 220U/2.5V_3528

220U/2.5V_3528

+V1.1LAN_VCCA_B_DPL

+

C712

C712 220U/2.5V_3528

220U/2.5V_3528

+1.05V_VCCCORE_ICH

C454 1U/10V_4C454 1U/10V_4 C726 10U/6.3V_6C726 10U/6.3V_6

+1.05V_PCH_VCCDPLL_EXP

+V1.1LAN_VCCAPLL_EXP

C462 1U/10V_4C462 1U/10V_4 C450 1U/10V_4C450 1U/10V_4 C449 1U/10V_4C449 1U/10V_4 C464 1U/10V_4C464 1U/10V_4 C459 10U/6.3V_6C459 10U/6.3V_6

+3V

+V1.5S_1.8S

+V1.1LAN_VCCAPLL_FDI

+1.05V

C474

0.1U/16V_4

C720

C720 1U/10V_4

1U/10V_4

C719

C719 1U/10V_4

1U/10V_4

C488

0.1U/16V_4

AB24 AB26

AB28 AD26 AD28

AF26

AF28

AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28

AV26

AV28 AW26 AW28

BA26

BA28

BB26

BB28 BC26 BC28 BD26 BD28

BE26

BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18 AM23

+V1.5S_1.8S

U47G

VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15]

VCCIO[24]

VCCAPLLEXP

VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53]

VCCIO[54] VCCIO[55]

VCC3_3[1]

VCCVRM[1] VCCFDIPLL VCCIO[1]

IbexPeak-M_R1P0

4

POWER

VCC CORE

PCI E*

FDI

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

VCCADAC[1] VCCADAC[2]

VSSA_DAC[1]

CRTLVDS

VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3] VCC3_3[4]

HVCMOS

VCCVRM[2]

VCCDMI[1]

DMI

VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1]

NAND / SPI

VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

+VCCA_DAC_1_2

AE50 AE52 AF53 AF51

AH38 AH39

VCCTX_LVDS

AP43 AP45 AT46 AT45

AB34 AB35

+3V_VCC_GIO

AD35

VCCVRM= 196mA(15mils)

+VCCVRM

AT24

+VCCDM

AT16 AU16

AM16 AK16 AK20

VCCPNAND

AK19 AK15 AK13 AM12 AM13 AM15

AM8

+3V_VCCME_SPI

AM9 AP11 AP9

VCCADAC= 69mA(15mils)

C404

C401

0.01U/25V_4

22U/6.3V_8

VCCALVDS= 1mA

R322 *0/short_4R322 *0/short_4

12/02 modify

C438

0.1U/16V_4

C410

C418

0.1U/16V_4

0.01U/25V_4

VCC3_3 = 357mA(30mils)

R289 *0/short_4R289 *0/short_4

C431

0.1U/16V_4

R339 *0/short_6R339 *0/short_6

R373 0/J_4R373 0/J_4 R369 *0/J_4R369 *0/J_4

C498

C498 1U/10V_4

1U/10V_4

VCCPNAND= 156mA(15mils)

R375 *0/short_8R375 *0/short_8

C493

0.1U/16V_4

VCCME3_3= 85mA(15mils)

R360 *0/short_6R360 *0/short_6

C511

0.1U/16V_4

C406

0.1U/16V_4

C405

10U/6.3V_6

+3V

+V1.5S_1.8S

+1.8V

L26

BKP1608HS181T_6_1.5A

C530

*10U/6.3V_6

+3V

L27

R297

R297 *0/J_4

*0/J_4

+1.1V_VTT +1.05V

+3V

.1uh_8

3/24 modify

VCCDMI= 61mA(15mils)

3

+3V

VCCACLK= 52mA(15mils)

VCCLAN = 320mA(30mils)

+1.05V

VCCTX_LVDS= 59mA(15mils)

+1.8V

VCCME(+1.05V) = 1.849A(100mils)

+1.05V

VCCIO = 3.062A(150mils)

VCCSUS3_3 = 163mA(20mils)

VCC3_3 = 0.357A(30mils)

V_CPU_IO >1mA(15mils)

VCCRTC= 2mA(15mils)

+1.05V

R343 *0/short_4R343 *0/short_4

R292 *0/short_8R292 *0/short_8 R291 *0/short_8R291 *0/short_8

68mA(15mils)

69mA(15mils)

+3V_S5

+3V

+1.1V_VTT

+VCCRTC

L55 *10uh_8L55 *10uh_8

C716 *10U/6.3V_6C716 *10U/6.3V_6 C718 *1U/6.3V_4C718 *1U/6.3V_4

R338

R338 *0/J_4

*0/J_4

+1.05V_VCCEPW

C402 22U/6.3V_8C402 22U/6.3V_8 C403 22U/6.3V_8C403 22U/6.3V_8 C428 1U/10V_4C428 1U/10V_4 C436 1U/10V_4C436 1U/10V_4

+V1.5S_1.8S

+V1.1LAN_VCCA_A_DPL

+V1.1LAN_VCCA_B_DPL

+1.05V

C536 0.1U/16V_4C536 0.1U/16V_4

C480 0.1U/16V_4C480 0.1U/16V_4

R344 *0/short_6R344 *0/short_6

R356 *0/short_6R356 *0/short_6

R365 *0/short_6R365 *0/short_6

C507 4.7U/10V_8C507 4.7U/10V_8 C509 0.1U/16V_4C509 0.1U/16V_4 C504 0.1U/16V_4C504 0.1U/16V_4

+V1.1LAN_VCCA_CLK

TP_PCH_VCCDSW

C481

0.1U/16V_4

+VCCRTCEXT

C528 0.1U/16V_4C528 0.1U/16V_4

C465 1U/10V_4C465 1U/10V_4 C448 1U/10V_4C448 1U/10V_4 C479 1U/10V_4C479 1U/10V_4

+VCCSST

+V1.1LAN_INT_VCCSUS

+3V_S5_VCCPSUS

0.1U/16V_4C496 0.1U/16V_4C496

+3V_VCCPCORE

C495

0.1U/16V_4

+VTT_VCCPCPU

C737

0.1U/16V_4

2

AP51 AP53

AF23 AF24

Y20

AD38 AD39 AD41 AF43 AF41 AF42

V39 V41 V42 Y39 Y41 Y42

V9

AU24

BB51 BB53

BD51 BD53

AH23 AJ35 AH35

AF34 AH34 AF32

V12

Y22

P18 U19 U20 U22

V15 V16 Y16

AT18

AU18

A12

C738

0.1U/16V_4

U47J

VCCACLK[1] VCCACLK[2]

VCCLAN[1] VCCLAN[2]

DCPSUSBYP

VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6] VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2] VCCIO[3] VCCIO[4] DCPSST

DCPSUS

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_R1P0

POWER

VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13]

USB

VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

PCI/GPIO/LPC

VCCSATAPLL[1] VCCSATAPLL[2]

SATA

CPU

RTC PCI/GPIO/LPC

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13]

VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13]

VCCME[14]

VCCME[15]

VCCME[16]

VCCSUSHDA

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

K49

J38 L38 M36 N36 P36 U35

AD13

AK3 AK1

AH22

AT20

AH19 AD20 AF22 AD19

AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

C466 1U/10V_4C466 1U/10V_4

+3V_S5_VCCPUSB+1.05V_VCCAUX

C458

0.022U/16V_4

C412

C412 1U/16V_6

1U/16V_6

C408

C408 1U/16V_6

1U/16V_6

+3V_VCCPPCI

C437

0.1U/16V_4

C434

0.1U/16V_4

C741

*1U/6.3V_4

+V1.5S_1.8S

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C414

C414 1U/10V_4

1U/10V_4

1

VCCIO = 3.062A(150mils)

+1.05V

+V1.1LAN_VCCAPLL

C742

C742 *10U/6.3V_6

*10U/6.3V_6

+1.05V

VCCSUS3_3 = 0.163A(20mils)

R611 *0/short_6R611 *0/short_6 C460

C460

C457

0.1U/16V_4

R304 100/F_4R304 100/F_4

D17 RB500V-40D17 RB500V-40

R281 100/F_4R281 100/F_4

D16 RB500V-40D16 RB500V-40

R317 *0/short_6R317 *0/short_6

VCC3_3 = 0.357A(30mils)

+3V+1.05V

31mA(15mils)

VCCIO = 3.062A(150mils)

VCCME = 1.849A(100mils)

R302 *0/short_4R302 *0/short_4

VCCSUSHDA= 6mA(15mils)

+3V_S5

V5REF_SUS< 1mA

V5REF< 1mA

+3V

L56 *10uh_8L56 *10uh_8

+1.05V

C489

C489 1U/10V_4

1U/10V_4

+3V_S5

+5V_S5 +3V_S5

+5V +3V

+1.05V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 5/6

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

ZR9

12 47Thursday, April 29, 2010

1

12 47Thursday, April 29, 2010

1A

of

5

IBEX PEAK-M (GND)

D D

U47H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49

AF12 AH49 AF35

AP13 AN34 AF45 AF46 AF49

AG52

AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47

AJ19 AJ20

AJ22 AJ23 AJ26 AJ28 AJ32 AJ34

AK12

AM41

AN19 AK26 AK22 AK23 AK28

AB5 AB8 AC2

AD7 AE2 AE4

Y13 AU4

AF5 AF8 AG2

AH7 AJ2

AT5 AJ4

VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

IbexPeak-M_R1P0

C C

B B

A A

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

4

AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47

BG12 BB12 BB16 BB20

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

BB24 BB30 BB34 BB38 BB42 BB49

BB5 BC10 BC14 BC18

BC2 BC22 BC32 BC36 BC40 BC44 BC52

BH9 BD48 BD49

BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BE6

BE8

BF3 BF49 BF51 BG18 BG24

BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

BH7

C12

C50

D51

E12

E16

E20

E24

E30

E34

E38

E42

E46

E48

G10

G14

G18

G22

G32

G36

G40

G44

G52 AF39

H16

H20

H30

H34

H38

H42

3

U47I

VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241] VSS[242] VSS[243] VSS[244]

G2

VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

2

1

IbexPeak-M_R1P0

Size Document Number Rev

IBEX PEAK-M 6/6

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

PROJECT :

1

ZR9

of

13 47Thursday, April 29, 2010

1A

5

M_A_A[15:0](5)

D D

M_A_BS#0(5) M_A_BS#1(5) M_A_BS#2(5) M_A_CS#0(5) M_A_CS#1(5) M_A_CLKP0(5) M_A_CLKN0(5) M_A_CLKP1(5) M_A_CLKN1(5) M_A_CKE0(5) M_A_CKE1(5) M_A_CAS#(5) M_A_RAS#(5)

R246 10K/J_4R246 10K/J_4 R254 10K/J_4R254 10K/J_4

C C

B B

M_A_WE#(5)

CLK_SCLK(3,15,28)

CLK_SDATA(3,15,28)

M_A_ODT0(5) M_A_ODT1(5)

M_A_DM[7:0](5)

M_A_DQSP[7:0](5)

M_A_DQSN[7:0](5)

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 CLK_SCLK CLK_SDATA

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7 M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

Place these Caps near So-Dimm0.

+1.5V_SUS

C287

C273

10U/6.3V_6

C252

C252 10U/6.3V_6

10U/6.3V_6

C262

C262 10U/6.3V_6

10U/6.3V_6

C287 10U/6.3V_6

10U/6.3V_6

C286

C286 10U/6.3V_6

10U/6.3V_6

C271

C271 10U/6.3V_6

10U/6.3V_6

C276

0.1U/16V_4

C265

0.1U/16V_4

C308

0.1U/16V_4

C279

0.1U/16V_4

C278

0.1U/16V_4

+

C310

*330U/2V_7343

4

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM0_H=4_Standard

+SMDDR_VREF_DIMM

C326

0.1U/16V_4

(204P)

PC2100 DDR3 SDRAM SO-DIMM

C322

2.2U/6.3V_6

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

+SMDDR_VREF_DQ0

C206

0.1U/16V_4

M_A_DQ5 M_A_DQ4 M_A_DQ2 M_A_DQ3 M_A_DQ0 M_A_DQ1 M_A_DQ7 M_A_DQ6 M_A_DQ8 M_A_DQ9 M_A_DQ11 M_A_DQ14 M_A_DQ13 M_A_DQ12 M_A_DQ15 M_A_DQ10 M_A_DQ20 M_A_DQ21 M_A_DQ19 M_A_DQ23 M_A_DQ17 M_A_DQ16 M_A_DQ22 M_A_DQ18 M_A_DQ28 M_A_DQ25 M_A_DQ31 M_A_DQ27 M_A_DQ29 M_A_DQ24 M_A_DQ26 M_A_DQ30 M_A_DQ32 M_A_DQ33 M_A_DQ35 M_A_DQ39 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ34 M_A_DQ41 M_A_DQ40 M_A_DQ46 M_A_DQ47 M_A_DQ45 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ53 M_A_DQ48 M_A_DQ50 M_A_DQ51 M_A_DQ49 M_A_DQ52 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ62

C208

2.2U/6.3V_6

3

M_A_DQ[63:0] (5)

+SMDDR_VREF

R162 0_6R162 0_6

+SMDDR_VREF

VREF_DQ_DIMM0(7)

PM_EXTTS#0(4)

DDR3_DRAMRST#(15,31)

+1.5V_SUS

R149

R149 *10K/J_4

*10K/J_4

+SMDDR_VREF_DIMM

R163

R163 *10K/J_4

*10K/J_4

2.48A

+3V

R255 *10K/J_4R255 *10K/J_4

+3V

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

C325

C325 470P/50V_4

470P/50V_4

R123 *M1@0_6R123 *M1@0_6

R122 *M3@0_6R122 *M3@0_6

2

+1.5V_SUS

75 76 81 82 87 88 93 94

99 100 105 106 111 112 117 118 123 124

199

77 122 125

198

30

1

126

2 3 8

9 13 14 19 20 25 26 31 32 37 38 43

+1.5V_SUS

R111

R111 10K/F_4

10K/F_4

+SMDDR_VREF_DQ0

R116

R116 10K/F_4

10K/F_4

JDIM1B

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

VDDSPD NC1

NC2 NCTEST

EVENT# RESET#

VREF_DQ VREF_CA

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15

DDR3-DIMM0_H=4_Standard

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

+0.75V_DDR_VTT

A A

+3V

C365

2.2U/6.3V_6

C370

0.1U/16V_4

5

+0.75V_DDR_VTT

C389

C389 1U/6.3V_4

1U/6.3V_4

C386

C386 1U/6.3V_4

1U/6.3V_4

C378

C378 1U/6.3V_4

1U/6.3V_4

C388

C388 1U/6.3V_4

1U/6.3V_4

4

C373

C373 10U/6.3V_6

10U/6.3V_6

C395

C395 10U/6.3V_6

10U/6.3V_6

C374

C374 10U/6.3V_6

10U/6.3V_6

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-0

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZR9

1

1A

14 47Thursday, May 06, 2010

5

4

3

2

1

JDIM2A

M_B_A[15:0](5)

D D

M_B_BS#0(5) M_B_BS#1(5) M_B_BS#2(5) M_B_CS#0(5) M_B_CS#1(5) M_B_CLKP0(5) M_B_CLKN0(5) M_B_CLKP1(5) M_B_CLKN1(5) M_B_CKE0(5) M_B_CKE1(5) M_B_CAS#(5) M_B_RAS#(5)

M_B_DM[7:0](5)

M_B_DQSP[7:0](5)

M_B_DQSN[7:0](5)

C307

C307 10U/6.3V_6

10U/6.3V_6

C312

C312 10U/6.3V_6

10U/6.3V_6

M_B_WE#(5)

CLK_SCLK(3,14,28)

CLK_SDATA(3,14,28)

M_B_ODT0(5) M_B_ODT1(5)

C288

C288 10U/6.3V_6

10U/6.3V_6

+0.75V_DDR_VTT

C282

0.1U/16V_4

R239 10K/J_4R239 10K/J_4 R256 10K/J_4R256 10K/J_4

+3V

C C

B B

+1.5V_SUS

C290

C290 10U/6.3V_6

10U/6.3V_6

+3V

Place these Caps near So-Dimm1.

C272

C272 10U/6.3V_6

10U/6.3V_6

C268

C268 10U/6.3V_6

10U/6.3V_6

C254

0.1U/16V_4

C253

0.1U/16V_4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7 M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7

C309

0.1U/16V_4

C249

0.1U/16V_4

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM1_H=8_Standard

+

C264

C264 330U/2V_7343

330U/2V_7343

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

+SMDDR_VREF_DIMM

C320

0.1U/16V_4

C321

2.2U/6.3V_6

M_B_DQ5 M_B_DQ4 M_B_DQ7 M_B_DQ3 M_B_DQ1 M_B_DQ0 M_B_DQ2 M_B_DQ6 M_B_DQ12 M_B_DQ13 M_B_DQ11 M_B_DQ14 M_B_DQ8 M_B_DQ9 M_B_DQ15 M_B_DQ10 M_B_DQ17 M_B_DQ20 M_B_DQ19 M_B_DQ23 M_B_DQ21 M_B_DQ16 M_B_DQ22 M_B_DQ18 M_B_DQ29 M_B_DQ28 M_B_DQ30 M_B_DQ31 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ37 M_B_DQ36 M_B_DQ38 M_B_DQ39 M_B_DQ33 M_B_DQ32 M_B_DQ34 M_B_DQ35 M_B_DQ41 M_B_DQ40 M_B_DQ46 M_B_DQ47 M_B_DQ44 M_B_DQ45 M_B_DQ43 M_B_DQ42 M_B_DQ52 M_B_DQ53 M_B_DQ55 M_B_DQ54 M_B_DQ49 M_B_DQ48 M_B_DQ51 M_B_DQ50 M_B_DQ56 M_B_DQ57 M_B_DQ62 M_B_DQ63 M_B_DQ60 M_B_DQ61 M_B_DQ59 M_B_DQ58

+SMDDR_VREF_DQ1

C209

0.1U/16V_4

2.2U/6.3V_6

C210

M_B_DQ[63:0] (5)

VREF_DQ_DIMM1(7)

+SMDDR_VREF

+3V

PM_EXTTS#1(4)

DDR3_DRAMRST#(14,31)

+SMDDR_VREF_DIMM

R126 *M1@0_6R126 *M1@0_6

R125 *M3@0_6R125 *M3@0_6

2.48A

+1.5V_SUS

+3V

R247 *10K/J_4R247 *10K/J_4

+SMDDR_VREF_DQ1

+1.5V_SUS

R117

R117 10K/F_4

10K/F_4

+SMDDR_VREF_DQ1

R119

R119 10K/F_4

10K/F_4

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8_Standard

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

C375

C390

C391

A A

C692

2.2U/6.3V_6

C691

0.1U/16V_4

5

C391 1U/6.3V_4

1U/6.3V_4

C379

C379 1U/6.3V_4

1U/6.3V_4

C380

C380 1U/6.3V_4

1U/6.3V_4

C390 1U/6.3V_4

1U/6.3V_4

C375

10U/6.3V_6

4

C382

10U/6.3V_6

C383

C383 10U/6.3V_6

10U/6.3V_6

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-1

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZR9

1

1A

15 47Thursday, May 06, 2010