Acer TravelMate 7740, TravelMate 7740Z Schematics

5

4

3

2

1

=<'6<67(0%/2&.',$*5$0

Channel A

D D

intel

Channel B

64MB/128MB x 8

P19, 20

DDRIII-SODIMM1 DDRIII-SODIMM2

X'TAL

14.318MHz

Dual Channel DDR III 800/1066/1333 MHZ

P14,15

*

SLG8LV595

CLK GEN

C C

SATA - HDD

SATA - ODD

USB Port X1

CCD

Bluetooth Con.

AU6437-GBL

B B

Cardreader

USB Port X2

DB

P3

P29

P33

P24

P33

P31

SATA 0

SATA 1

USB-1

USB-8

USB-4

USB-3/11/12

BATTERY

Azalia

Arrandale(UMA) Clarksfield (Discr ete)

rPGA 989

(37.5mm X 37.5mm)

FDI

[Arrandale Only]

FDI

CLK

SATA

Ibex Peak-M

USB

PCH

P8, 9, 10, 11, 12, 13

RTC

IHDA

LPC

DMI

P4,5,6,7

DMI(x4)

Display

PCI-E x1

GFXIMC

SPI

PCIEX16

2.5GT/s

INT_CRT

INT_LVDS

INT_HDMI

X'TAL

32.768KHz

X'TAL 25MHz

SPI ROM

ATI GPU

Madison/Park M2 Madison LP/PRO 1GB

[Arrandale Only]

*

[Arrandale Only]

*

P16~P23

Level shift

P8

LPC

CX20672-11Z

AUDIO CODEC

P30

NPCE781

EC

CRT

LVDS

PCIE-6 USB-13

PCIE-2 USB-10

PCIE-1

HDMI LVDS CRT

X'TAL

27.0MHz

P24

HDMI

MINI CARD WLAN

MINI CARD

AR8151

GIGA LAN

P36

P25

X'TAL 25MHz

P28

P26

RJ45

ISL88731A

Batery Charger

RT8206B

3V/5V

ISL62882

CPU core

UP6111AQDD

+1.1V_VTT

P27

P37

P38

P39

P40

MAX8792ETD+T

+VGPU_CORE

ISL62872

+VGPU_IO

ISL62881HRZ-T

+VGFX_AXG

HPA00835RTER*2

+1.8V/+1V

P43

P44

P45

P46

Speaker

A A

BOM Option Table

Reference

IV@

EV@

SP@

*

Description

for UMA only SKU for Discrete Graphic only SKU special case component do not stuff

5

P30 P30

MIC JACK

INT. MIC

P30 P30

HP

4

Power Board Con.

P33

K/B Con.

SPI FLASH

W25X16VSS1G

P36P34

3

HALL SENSOR

Touch Pad Board Con.

P24

P34

Fan Driver

(PWM Type)

P34

2

UP6111AQDD

+1.05V

RT8207A

+1.5V_SUS

Size Document Number Rev

Date: Sheet

Discharger

P41 P46

Thermal Protection

P42

Quanta Computer Inc.

PROJECT :

Block Diagram

P47

ZYD

150Tuesday, April 06, 2010

1

3B

of

1

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V

2

VIN

3

+1.5V

4

+1.5V_SUS

5

6

7

8

+1.8V

MAINON

A A

VDDR3

MOS (AO3413)

+3_D (0.5A)

+3V_D

P21

VDDC

ISL6264

+VGPU_CORE (20A)

P42

PG_GPUIO_EN

VDDCI

ISL62872

P43

+VGPU_IO (4.5A)

PG_1V_EN

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

P45

PG_1.5V_EN

VDDR1

MOS (AO4710)

P41

+1.5V_GPU (10A)

+1.5V_GPU

VDDR4

MOS (AO6402)

P45

+1.8V_GPU (3A)

+1.8V_GPU

BJT

dGPU_PWROK

P21

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

MAINON

VDDC

ISL6264

PG_GPUIO_EN

P42

+VGPU_CORE (20A)

Power States

POWER PLANE

B B

C C

D D

VIN +VCCRTC +3VPCU +5VPCU +15V +3V_S5 +5V_S5 +5V

+1.5V_SUS +0.75V_DDR_VTT +VGFX_AXG S0GFX_ONInternal GPU POWER +1.8V +1.5V +1.1V_VTT S0 +1.05V +VCC_CORE LCDVCC +5V_GPU +3V_D +VGPU_CORE +VGPU_IO PG_GPUIO_EN+0.9V~+1.1V

VOLTAGE

+10V~+19V +3V~+3.3V +3.3V +5V +15V +3.3V +5V +5V +3.3V +1.5V +0.75V variation +1.8V +1.5V

+1.05V or +1.1V

+1.05V variation +3.3V +5V +3.3V Discrete enable

VIN

VDDCI

ISL62872

PG_1V_EN

P43

+VGPU_IO (4.5A)

DESCRIPTION

RTC POWER EC POWER CHARGE POWER CHARGE PUMP POWER LAN/BT/PCH USB POWER HDD/ODD/Codec/TP/CRT CLK GEN/PCH/GPU/LVDS/Mini card/Codec/card Reader+3V CPU/SODIMM CORE POWER SODIMM Termination POWER

CPU/PCH/Braidwood POWER MINI CARD/NEW CARD POWER

PCH CORE POWER MAINON CPU CORE POWER LCD POWER SWITCHABLE PWM IC POWER I/O POWER for 3.3V pins

DP/PEG POWER VRAM CORE POWER GPU_CRE/LVDS/PLL POWER

+1.5V

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

dGPU_PWR_EN# dGPU_VRON

P45

CONTROL SIGNAL

ALWAYSMAIN POWER ALWAYS ALWAYS ALWAYS

S5_ON S5_ON MAINON MAINON SUSON MAINON

MAINON MAINON MAINONCPU VTT POWER

VRON LVDS_VDDEN

PG_1V_EN+1V+1V PG_1.5V_EN+1.5V+1.5V_GPU +1.5V_GPU+1.8V+1.8V_GPU

PG_1.5V_EN

+1.5V_SUS

VDDR1

MOS (AO4710)

P41

+1.5V_GPU (10A)

ACTIVE IN

ALWAYS ALWAYS ALWAYS ALWAYS ALWAYSALWAYS S0-S5 S0-S5 S0 S0 S0-S3 S0

S0 S0

S0 S0 S0

Discrete enable

Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V Discrete enableGPU I/O POWER Discrete enable Discrete enable Discrete enable

+1.5V_GPU

Thermal Follow Chart

+3.3V

VDDR3

MOS (AO3413)

P21

+3_D (0.5A)

CPU CORE PWR

+1.5V_GPU

H_ORICHOT#

+1.8V

VDDR4

MOS (AO6402)

P45

+1.8V_GPU (3A)

NTC Thermal Protection

H/W Throttling

SM-Bus

+1.8V_GPU

CPU

PCH

EC

BJT

P21

PM_THRMTRIP#

SML1ALERT#

CPUFAN#

dGPU_PWROK

SYS_SHDN#

WIRE-AND

3V/5 V SYS PWR

FANFAN Driver

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

PWR Status & GPU PW R CRL & T HRM

Date: Sheet

1

2

3

4

5

6

Date: Sheet

7

PROJECT :

ZYD

3B

of

250Tuesday, April 06, 2010

8

5

4

3

2

1

D D

L53 595@PBY160808T-181Y-N/2A/180ohm_6L53 595@PBY160808T-181Y-N/2A/180ohm_6

+1.5V

modify 1202

C431

.1u/16V_4

20mil

L56 BLM18AG601SN1D/200mA/600ohm_6L56 BLM18AG601SN1D/200mA/600ohm_6

+3V

C726

4.7u/10V_8

C C

IDT: AL003197001 (ICS9LVS3197A KLFT) Realtek: AL000890000 (RTM890N-632-GRT) Silego: AL000595000 (SLG8LV595VTR)

B B

+1.05V

R544

R544 *10K_4

*10K_4

R550

R550 10K_4

10K_4

CPU_SEL

150mA(30mil)

C693

C692

C760

C760 *1u/10V_4

*1u/10V_4

C718

.1u/16V_4

.1u/16V_4 C715 *EV@10p/50V_4C715 *EV@10p/50V_4

C729

C729 *10p/50V/COG_4

*10p/50V/COG_4

.1u/16V_4

CLK_ICH_14M10

.1u/16V_4

+3V_CLK

+1.5V_CLK

C714

C714 .1u/16V_4

.1u/16V_4

C701 33p/50V_4C701 33p/50V_4

C697 33p/50V_4C697 33p/50V_4

SMBusCPU_CLK select

ICH_SMBDATA10

R549

*585@0_6

R545 33_4R545 33_4

Y4

14.318MHz

CLK_SDATA CLK_SCLK

CPU_SEL

XTAL_IN XTAL_OUT

3

+3V

2

U27

1

VDD_DOT

17

VDD_SRC

24

VDD_CPU

5

VDD_27

29

VDD_REF

31

SDA

32

SCL

30

REF_0/CPU_SEL

28

XTAL_IN

27

XTAL_OUT

2

VSS_DOT

8

VSS_27

9

VSS_SATA

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

33

GND

SLG8LV595V

1

Q21

Q21 2N7002K

2N7002K

R279

2.2K_4

CLK_SDATA

VDD_SRC_I/O VDD_CPU_I/O

DOT_96

DOT_96#

27M

27M_SS

SRC_1/SATA

SRC_1#/SATA#

SRC_2

SRC_2#

*CPU_STOP#

CPU_1

CPU_1#

CPU_0

CPU_0#

CKPWRGD/PD#

CLK_SDATA 14,15,28

15 18

3 4

6 7

10 11 13 14

16 20

19 23 22

25

+VDDIO_CLK

CLK_BUF_DREFCLK 10 CLK_BUF_DREFCLK# 10

CLK_VGA_27M_SS

CLK_BUF_PCIE_3GPLL 10 CLK_BUF_PCIE_3GPLL# 10 CLK_BUF_DREFSSCLK 10 CLK_BUF_DREFSSCLK# 10

R525 10K_4R525 10K_4

TP51TP51

TP50TP50

CLK_BUF_BCLK 10 CLK_BUF_BCLK# 10

CK_PWRGD_R

CLK Enable

80mA(20mil)

C689

C700

.1u/16V_4

Place each 0.1uF cap as close as possible to each VDD IO pin. Place the 10uF caps on the VDD_IO plane.

R257 *EV@33_4R257 *EV@33_4 R542 *EV@33_4R542 *EV@33_4

+3V

VR_PWRGD_CK505#39

L51 PBY160808T/2A/180ohm_6L51 PBY160808T/2A/180ohm_6

C688

C688 10u/Y5V_8

10u/Y5V_8

C695

C695 10u/Y5V_8

10u/Y5V_8

2

+3V

3

Q29

Q29 2N7002K

2N7002K

R522

R522 1K/F_4

1K/F_4

CK_PWRGD_R

27M_CLK 17 CLK_27M_SS 17

R521

R521 100K/F_4

100K/F_4

+1.05V

R278

01

A A

CPU_SEL

CPU0/1=133MHz (default)

5

CPU0/1=100MHz

ICH_SMBCLK10

4

2

3

Q20

Q20 2N7002K

2N7002K

R278

2.2K_4

CLK_SCLK

1

3

CLK_SCLK 14,15,28

Size Document Number Rev

Clock Generator

Date: Sheet

2

Date: Sheet

1

Quanta Computer Inc.

PROJECT :

ZYD

350Tuesday, April 06, 2010

1

3B

of

5

4

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

U26A

FDI_FSYNC0_R FDI_FSYNC1_R

FDI_INT_R FDI_LSYNC0_R

FDI_LSYNC1_R

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

Clarksfield/Auburndale

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

DMI_TXN08 DMI_TXN18 DMI_TXN28 DMI_TXN38

D D

DMI_TXP08 DMI_TXP18 DMI_TXP28 DMI_TXP38

DMI_RXN08 DMI_RXN18 DMI_RXN28 DMI_RXN38

DMI_RXP08 DMI_RXP18 DMI_RXP28 DMI_RXP38

FDI_TXN08 FDI_TXN18 FDI_TXN28 FDI_TXN38 FDI_TXN48 FDI_TXN58 FDI_TXN68 FDI_TXN78

FDI_TXP08 FDI_TXP18 FDI_TXP28 FDI_TXP38 FDI_TXP48

C C

FDI_TXP58 FDI_TXP68 FDI_TXP78

B B

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS PEG_RX#[0]

PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

CPEG_TXN0 CPEG_TXN1 CPEG_TXN2 CPEG_TXN3 CPEG_TXN4 CPEG_TXN5 CPEG_TXN6 CPEG_TXN7 CPEG_TXN8 CPEG_TXN9 CPEG_TXN10 CPEG_TXN11 CPEG_TXN12 CPEG_TXN13 CPEG_TXN14 CPEG_TXN15

CPEG_TXP0 CPEG_TXP1 CPEG_TXP2 CPEG_TXP3 CPEG_TXP4 CPEG_TXP5 CPEG_TXP6 CPEG_TXP7 CPEG_TXP8 CPEG_TXP9 CPEG_TXP10 CPEG_TXP11 CPEG_TXP12 CPEG_TXP13 CPEG_TXP14 CPEG_TXP15

R444 49.9/F_4R444 49.9/F_4

R445 750/F_4R445 750/F_4

C279 EV@0.1u/10V_4_X7RC279 EV@0.1u/10V_4_X7R C625 EV@0.1u/10V_4_X7RC625 EV@0.1u/10V_4_X7R C268 EV@0.1u/10V_4_X7RC268 EV@0.1u/10V_4_X7R C261 EV@0.1u/10V_4_X7RC261 EV@0.1u/10V_4_X7R C263 EV@0.1u/10V_4_X7RC263 EV@0.1u/10V_4_X7R C260 EV@0.1u/10V_4_X7RC260 EV@0.1u/10V_4_X7R C264 EV@0.1u/10V_4_X7RC264 EV@0.1u/10V_4_X7R C256 EV@0.1u/10V_4_X7RC256 EV@0.1u/10V_4_X7R C611 EV@0.1u/10V_4_X7RC611 EV@0.1u/10V_4_X7R C600 EV@0.1u/10V_4_X7RC600 EV@0.1u/10V_4_X7R C602 EV@0.1u/10V_4_X7RC602 EV@0.1u/10V_4_X7R C592 EV@0.1u/10V_4_X7RC592 EV@0.1u/10V_4_X7R C604 EV@0.1u/10V_4_X7RC604 EV@0.1u/10V_4_X7R C594 EV@0.1u/10V_4_X7RC594 EV@0.1u/10V_4_X7R C606 EV@0.1u/10V_4_X7RC606 EV@0.1u/10V_4_X7R C596 EV@0.1u/10V_4_X7RC596 EV@0.1u/10V_4_X7R

C271 EV@0.1u/10V_4_X7RC271 EV@0.1u/10V_4_X7R C624 EV@0.1u/10V_4_X7RC624 EV@0.1u/10V_4_X7R C270 EV@0.1u/10V_4_X7RC270 EV@0.1u/10V_4_X7R C258 EV@0.1u/10V_4_X7RC258 EV@0.1u/10V_4_X7R C266 EV@0.1u/10V_4_X7RC266 EV@0.1u/10V_4_X7R C257 EV@0.1u/10V_4_X7RC257 EV@0.1u/10V_4_X7R C262 EV@0.1u/10V_4_X7RC262 EV@0.1u/10V_4_X7R C254 EV@0.1u/10V_4_X7RC254 EV@0.1u/10V_4_X7R C612 EV@0.1u/10V_4_X7RC612 EV@0.1u/10V_4_X7R C601 EV@0.1u/10V_4_X7RC601 EV@0.1u/10V_4_X7R C603 EV@0.1u/10V_4_X7RC603 EV@0.1u/10V_4_X7R C593 EV@0.1u/10V_4_X7RC593 EV@0.1u/10V_4_X7R C605 EV@0.1u/10V_4_X7RC605 EV@0.1u/10V_4_X7R C595 EV@0.1u/10V_4_X7RC595 EV@0.1u/10V_4_X7R C607 EV@0.1u/10V_4_X7RC607 EV@0.1u/10V_4_X7R C597 EV@0.1u/10V_4_X7RC597 EV@0.1u/10V_4_X7R

PEG_RXN[0..15] 16

Use reverse type (at GPU side)

PEG_RXP[0..15] 16

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXN[0..15] 16

PEG_TXP[0..15] 16

FDI_FSYNC08 FDI_FSYNC18

FDI_LSYNC08 FDI_LSYNC18

R516 IV@0_4R516 IV@0_4 R511 IV@0_4R511 IV@0_4

FDI_INT8

R507 IV@0_4R507 IV@0_4 R513 IV@0_4R513 IV@0_4

R509 IV@0_4R509 IV@0_4 R501 EV@1K_4R501 EV@1K_4

R503 EV@1K_4R503 EV@1K_4 R505 EV@1K_4R505 EV@1K_4 R502 EV@1K_4R502 EV@1K_4 R504 EV@1K_4R504 EV@1K_4

Processor Compensation Signals

R476 20/F_4R476 20/F_4 R475 20/F_4R475 20/F_4 R124 49.9/F_4R124 49.9/F_4 R473 49.9/F_4R473 49.9/F_4

H_PECI11

H_PROCHOT#39

PM_THRMTRIP#11

PM_SYNC8

H_PWRGOOD11

PM_DRAM_PWRGD8,35

PLTRST#10,11,26,28,31,36

R171 1.5K/F_4R171 1.5K/F_4

FDI_FSYNC0_R FDI_FSYNC1_R

FDI_INT_R

FDI_LSYNC0_R FDI_LSYNC1_R

Amos 1013

H_COMP3 H_COMP2 H_COMP1 H_COMP0

T63T63

H_CATERR#

H_PROCHOT#

H_CPURST# XDP_TMS

H_VTTPWRGD

T53T53

CPU_PLTRST#

R166

R166 750/F_4

750/F_4

U26B

AT23 AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

Clarksfield/Aubu rndale

COMP3 COMP2 COMP1 COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

MISC THERMAL

CLOCKS

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

A16 B16

T55T55

AR30

T59T59

AT30 E16

D16

DPLL_REF_SSCLK_R

A18

DPLL_REF_SSCLK#_R

A17

CPU_DDR3_DRAMRST#

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1 AN15

AP15

XDP_PRDY#

AT28

XDP_PREQ#

AP27

XDP_TCLK

AN28 AP28

XDP_TRST#

AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

H_DBR#_R

AN25

XDP_OBS0

AJ22

XDP_OBS1

AK22

XDP_OBS2

AK24

XDP_OBS3

AJ24

XDP_OBS4

AJ25

XDP_OBS5

AH22

XDP_OBS6

AK23

XDP_OBS7

AH23

CLK_CPU_BCLK 11 CLK_CPU_BCLK# 11

CLK_PCIE_3GPLL 10 CLK_PCIE_3GPLL# 10

R438 IV@0_4R438 IV@0_4

R440 IV@0_4R440 IV@0_4 R442 EV@0_4R442 EV@0_4 R443 EV@0_4R443 EV@0_4

CPU_DDR3_DRAMRST# 35

R156 100/F_4R156 100/F_4 R158 24.9/F_4R158 24.9/F_4 R160 130/F_4R160 130/F_4

R174 10K_4R174 10K_4 R165 10K_4R165 10K_4

T52T52 T87T87

T56T56 T60T60 T88T88

T91T91 T89T89 T90T90 T92T92

R176 *Short_4R176 *Short_4

T51T51 T54T54 T50T50 T57T57 T62T62 T58T58 T61T61 T64T64

PM_EXTTS#0 14

+1.1V_VTT

PM_EXTTS#1 15

XDP_DBRST# 8

Amos 1013

Layout Note: Place these resistors near Processor

R127 *100K_4R127 *1 0 0K_4

DPLL_REF_SSCLK 10 DPLL_REF_SSCLK# 10

1017 modify

Thermaltri p pr ot e c t

+1.1V_VTT

3

Q16

DELAY_VR_PWRGOOD8,39

A A

PM_THRMTRIP#

5

2

1 3

FDV301N

1

R175

R175 1K_4

1K_4

2

Q15

Q15 MMBT3904

MMBT3904

SYS_SHDN# 38,47

4

VTT PWR_Good

MPWROK36

+3V

C385

0.1u/10V_4

R173

3 5

4

U8 TC7SH0 8FUU8TC7SH0 8FU

R173

2K/F_4

3

H_VTTPWRGD

R164

R164 1K_4

1K_4

2 1

Processor pull-up

XDP_TDO

R482 51/F_4R482 51/F_4

H_CATERR#

R144 49.9/F_4R144 49.9/F_4

H_PROCHOT#

R474 68_4R474 68_4

H_CPURST#

R179 *68_4R179 *68_4

XDP_TMS

R177 *51_4R177 *51_4

XDP_TDI_R

R497 *51_4R497 *51_4

XDP_PREQ#

R480 *51_4R480 *51_4

XDP_TCLK

R169 *51_4R169 *51_4

XDP_TRST#

R477 51/F_4R477 51/F_4

+1.5V_CPUVDDQ

R168

1.1K/F_4

PM_DRAM_PWRGD

R167

R167 3K/F_4

3K/F_4

PM_DRAM_PWRGD: Never drive hight before DDR3 voltage ramp to stable

Use a voltage divider with VDDQ (1.5V) rail (ON in S3) and resistor combination of 4.75K (to VDDQ)/12K(to GND) to generate the required voltage. Note: CRB uses a 3.3V (always ON) rail with 2K and 1K combination.

+1.1V_VTT

2

JTAG MAPPING

XDP_TDI_R XDP_TDI XDP_TDO_M

XDP_TDI_M XDP_TDO_R

Scan Chain (Default)

CPU Only

GMCH Only

R491 *Short_4R491 *Short_4

R489 *0_4R489 *0_4

R488

R488 *Short_4

*Short_4

R487 *0_4R487 *0_4 R481 *Short_4R481 *Short_4

STUFF -> R469, R491, R507 NO STUFF -> R489, R490

STUFF -> R490, R491 NO STUFF -> R469, R489, R507

STUFF -> R489, R507 NO STUFF -> R491, R490, R469

Size Document Number Rev

AUBURNDA 1/4

Date: Sheet

XDP_TDO

Quanta Computer Inc.

PROJECT :

1

ZYD

450Tuesday, April 06, 2010

3B

of

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U26C

M_A_DQ[63:0]14

D D

C C

B B

M_A_BS#014 M_A_BS#114 M_A_BS#214

M_A_CAS#14 M_A_RAS#14 M_A_WE#14

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10 AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

AC3 AB2

AE1 AB3 AE9

A10

B10 E10

F10

J10

AJ7 AJ6

AJ9

AL7 AL8

C7 A7

A8 D8

E6 F7 E9 B7 E7 C6

G8 K7

J8

G7

J7

L7 M6 M8

L9

L6 K8 N8 P9

U7

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

4

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0]

SA_MA[1]

SA_MA[2]

SA_MA[3]

SA_MA[4]

SA_MA[5]

SA_MA[6]

SA_MA[7]

SA_MA[8]

SA_MA[9]

SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLK0 14 M_A_CLK0# 14 M_A_CKE0 14

M_A_CLK1 14 M_A_CLK1# 14 M_A_CKE1 14

M_A_CS#0 14 M_A_CS#1 14

M_A_ODT0 14 M_A_ODT1 14

M_A_DM[7:0] 14

M_A_DQS#[7:0] 14

M_A_DQS[7:0] 14

M_A_A[15:0] 14

3

M_B_DQ[63:0]15

M_B_BS#015 M_B_BS#115 M_B_BS#215

M_B_CAS#15 M_B_RAS#15 M_B_WE#15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AG1

AG4 AG3

AH4

AM6 AN2

AM4 AM3

AN5 AN6

AN4 AN3

AN7

AR10 AT10

AC5 AC6

AF3

AJ3

AK1

AJ4

AK3 AK4

AK5 AK2

AP3 AT4

AT5 AT6

AP6 AP8 AT9 AT7 AP9

AB1

B5 A5

C3

B3 E4 A6

A4 C4 D1 D2

F2

F1 C2

F5

F3 G4 H6 G2

J6

J3 G1 G5

J2

J1

J5

K2

L3 M1

K5

K4 M4 N5

W5 R7

Y7

U26D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY - B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

1

M_B_CLK0 15 M_B_CLK0# 15 M_B_CKE0 15

M_B_CLK1 15 M_B_CLK1# 15 M_B_CKE1 15

M_B_CS#0 15 M_B_CS#1 15

M_B_ODT0 15 M_B_ODT1 15

M_B_DM[7:0] 15

M_B_DQS#[7:0] 15

M_B_DQS[7:0] 15

M_B_A[15:0] 15

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Requires minimum 12mils spacing with all other signals, including data signals.

A A

5

4

3

Channel B DQ[16,18,36,42,56,57,60,61,62] Requires minimum 12mils spacing with all other signals, including data signals.

Clarksfield/Auburndale

2

Quanta Computer Inc.

PROJECT :

Size Doc u ment Number Rev

AUBURNDA 2/4

Date: Sheet

PROJECT :

ZYD

550Tuesday, April 06, 2010

of

1

of

3B

5

U26F

CPU Core Power

ARD:48A CFD:52A

C315 22U/6.3V_8C315 22U/6.3V_8 C656 22U/6.3V_8C656 22U/6.3V_8 C317 22U/6.3V_8C317 22U/6.3V_8

D D

C C

B B

A A

C282 22U/6.3V_8C282 22U/6.3V_8 C643 22U/6.3V_8C643 22U/6.3V_8 C648 22U/6.3V_8C648 22U/6.3V_8 C645 22U/6.3V_8C645 22U/6.3V_8 C348 22U/6.3V_8C348 22U/6.3V_8 C320 22U/6.3V_8C320 22U/6.3V_8 C637 22U/6.3V_8C637 22U/6.3V_8 C288 22U/6.3V_8C288 22U/6.3V_8 C333 22U/6.3V_8C333 22U/6.3V_8 C303 10U/6.3V_8C303 10U/6.3V_8 C305 10U/6.3V_8C305 10U/6.3V_8 C296 10U/6.3V_8C296 10U/6.3V_8 C646 10U/6.3V_8C646 10U/6.3V_8 C635 10U/6.3V_8C635 10U/6.3V_8 C654 10U/6.3V_8C654 10U/6.3V_8 C651 10U/6.3V_8C651 10U/6.3V_8 C352 10U/6.3V_8C352 10U/6.3V_8 C638 10U/6.3V_8C638 10U/6.3V_8 C322 10U/6.3V_8C322 10U/6.3V_8 C323 10U/6.3V_8C323 10U/6.3V_8 C294 10U/6.3V_8C294 10U/6.3V_8 C640 10U/6.3V_8C640 10U/6.3V_8 C297 10U/6.3V_8C297 10U/6.3V_8 C290 10U/6.3V_8C290 10U/6.3V_8 C653 10U/6.3V_8C653 10U/6.3V_8 C312 0.1u/10V_4_X7RC312 0.1u/10V_4_X7R C287 0.1u/10V_4_X7RC287 0.1u/10V_4_X7R

C289 330u/2V_7343

C289 330u/2V_7343 C309 330u/2V_7343

C309 330u/2V_7343

+VCC_CORE

+

U26F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Clarksfield/Auburndale

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

4

1.1V RAIL POWER

CPU CORE SUPPLY

POWER

PROC_DPRSLPVR

CPU VIDS

VTT_SELECT

VSS_SENSE_VTT

SENSE LINES

4

VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32

VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

H_PSI#

AN33

PSI#

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35

H_DPRSLPVR

AM34

H_VTTVID1

G15

H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V

AN35

AJ34 AJ35

VTT_SENSE

B15

VSS_SENSE_VTT

A15

C652 10U/6.3V_8C652 10U/6.3V_8 C647 10U/6.3V_8C647 10U/6.3V_8 C628 10U/6.3V_8C628 10U/6.3V_8 C328 10U/6.3V_8C328 10U/6.3V_8 C655 10U/6.3V_8C655 10U/6.3V_8 C630 10U/6.3V_8C630 10U/6.3V_8 C629 10U/6.3V_8C629 10U/6.3V_8 C657 22U/6.3V_8C657 22U/6.3V_8 C599 22U/6.3V_8C599 22U/6.3V_8 C298 22U/6.3V_8C298 22U/6.3V_8

C284

+

330u/2V_7343

C272 22U/6.3V_8C272 22U/6.3V_8 C273 22U/6.3V_8C273 22U/6.3V_8

R145 100/F_4R145 100/F_4

R146 100/F_4R146 100/F_4

VTT Rail Values are Auburndal VTT=1.05V Clarksfield VTT=1.1V

18A

+1.1V_VTT

H_PSI# 39

H_VID0 39 H_VID1 39 H_VID2 39 H_VID3 39 H_VID4 39 H_VID5 39 H_VID6 39 H_DPRSLPVR 39

T48T48

I_MON 39

+VCC_CORE

VCCSENSE 39 VSSSENSE 39

T85T85 T86T86

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U26G

22A

+VGFX_AXG

+

C675

C675 IV@330U/2V_7343

IV@330U/2V_7343

+

C673

C673 IV@330U/2V_7343

IV@330U/2V_7343

C325

C325 IV@22u/6.3V_8

IV@22u/6.3V_8

C326

C326 IV@10u/6.3V_8

IV@10u/6.3V_8

R490 EV@0_4R490 EV@0_4

C324

C324 IV@22u/6.3V_8

IV@22u/6.3V_8

C327

C327 IV@10u/6.3V_8

IV@10u/6.3V_8

Amos 1013

+1.1V_VTT

C275

C639

22u/6.3V_8

C274

C304

C313

C644

22u/6.3V_8

1

0

1

0

1

0

Note: For Validating IMVP VR R6451 should be STUFF and R2N1 NO_STUFF

3

22u/6.3V_8

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_DPRSLPVR H_PSI#

C304 22u/6.3V_8

22u/6.3V_8

R496 1K_4R496 1K_4 R495 *1K/F_4R495 *1K/F_4 R499 1K_4R499 1K_4 R498 *1K/F_4R498 *1K/F_4 R185 1K_4R185 1K_4 R184 *1K/F_4R184 *1K/F_4 R486 *1K/F_4R486 *1K/F_4 R485 1K_4R485 1K_4 R180 *1K/F_4R180 *1K/F_4 R181 1K_4R181 1K_4 R479 1K_4R479 1K_4 R472 *1K/F_4R472 *1K/F_4 R484 *1K/F_4R484 *1K/F_4 R483 1K_4R483 1K_4 R187 1K_4R187 1K_4 R186 *1K/F_4R186 *1K/F_4 R478 *1K/F_4R478 *1K/F_4 R471 1K_4R471 1K_4

U26G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield/Auburndale

HFM_VID : Max 1.4V LFM_VID : Min 0.65V

2

GRAPHICS

FDI PEG & DMI

+1.1V_VTT

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_DPRSLPVR

GFX_IMON

GRAPHICS VIDs

POWER

DDR3 - 1.5V RAILS

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65

1.1V1.8V

VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

R492 EV@1K_4R492 EV@1K_4

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10

C631 10U/6.3V_8C631 10U/6.3V_8

L10

C636 10U/6.3V_8C636 10U/6.3V_8

K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

Size Document Number Rev

AUBURNDA 3/4 (PWR)

Date: Sheet

C334

C334 1U/6.3V_4

1U/6.3V_4

C342

C342 1U/6.3V_4

1U/6.3V_4

VCC_AXG_SENSE 45 VSS_AXG_SENSE 45

GFX_VID0 45 GFX_VID1 45 GFX_VID2 45 GFX_VID3 45 GFX_VID4 45 GFX_VID5 45 GFX_VID6 45

GFX_ON 45 GFX_DPRSLPVR 45 GFX_IMON 45

C281

C281 1U/6.3V_4

1U/6.3V_4

C329

C329 22U/6.3V_8

22U/6.3V_8

C62622U/6.3V_8 C62622U/6.3V_8 C62722U/6.3V_8 C62722U/6.3V_8

0.6A

C27622U/6.3V_8 C27622U/6.3V_8 C2774.7U/6.3V_6 C2774.7U/6.3V_6 C2492.2U/6.3V_6 C2492.2U/6.3V_6 C2511U/6.3V_4 C2511U/6.3V_4 C2501U/6.3V_4 C2501U/6.3V_4

Quanta Computer Inc.

PROJECT :

+1.1V_VTT

+1.8V

1

Amos 1013

C286

C286 1U/6.3V_4

1U/6.3V_4

C291

C291 22U/6.3V_8

22U/6.3V_8

GFX_DPRSLPVR GFX_ON

*IV@4.7K_4

ARD:3A CFD:6A

C343

C343 1U/6.3V_4

1U/6.3V_4

ZYD

R494

+

C253

C253 330U/2V_7343

330U/2V_7343

650Tuesday, April 06, 2010

R493

R493 *IV@10K_4

*IV@10K_4

+1.5V_CPUVDDQ

of

3B

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U26E

U26H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

D D

C C

B B

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

Clarksfield/Auburndale

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

U26I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

Clarksfield/Auburndale

VSS

NCTF

VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7

AT35 AT1 AR34 B34 B2 B1 A35

TP4TP4 TP2TP2 TP45TP45

VREF_DQ_DIMM014,35 VREF_DQ_DIMM115,35

Modify 1017

R126 *EV@100K_4R126 *EV@100K_4

R125 *EV@100K_4R125 *EV@100K_4

TP43TP43 TP44TP44

CFG0

CFG3 CFG4

CFG7

Processor Strapping

CFG0

10

(PCI-Epress Configuration Select)

CFG3 (PCI-Epress Static Lane Reversal)

A A

5

CFG4 (Embended Display Port Presence)

㪫㪿

㪠㪼

㫅

㪸㩷

㫋

㫅

㪺㪚

㪼

㪻

㫆㫃

㫃

㩷

㫄㪸

㩷

㪙

㫇㫉

㫉

㪞

㫆㫂

㪼

㪘

㫅㪽

㪺

㪼㫀

㫆

㫅㪼

㫄

㫋

Single PEG

Bifurcation enabled

Normal Operation Lane Numbers Reversed

Disabled; No Physical Display Port attached to Embedded Diplay Port

4

Enabled; An external Display port device is connected to the Embedded Display port

3

DEFAULT

1

U26E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Clarksfield/Auburndale

CFG0

R172 *3.01K_NCR172 *3.01K_NC

CFG3

R159 *3.01K/F_4R159 *3.01K/F_4

CFG4

R157 *3.01KR157 *3.01K

CFG7

R161 *3.01K/F_4R161 *3.01K/F_4

AJ13

RSVD32

AJ12

RSVD33

AH25

RSVD34

AK26

RSVD35

AL26

RSVD36

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD_TP_59 RSVD_TP_60

RESERVED

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

2

AR2 AJ26

RSVD38

AJ27

RSVD39

AP1 AT2

AT3 AR1

AL28

RSVD45

AL29

RSVD46

AP30

RSVD47

AP32

RSVD48

AL27

RSVD49

AT31

RSVD50

AT32

RSVD51

AP33

RSVD52

AR33

RSVD53

AT33 AT34 AP35 AR35 AR32

RSVD58

E15 F15 A2

KEY

D15

RSVD62

C15

RSVD63

AJ15

RSVD64 RSVD65

VSS

Size Docum ent Number Rev

Date: Sheet

TP5TP5

AH15

TP6TP6

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

TP3TP3

AP34 can be NC on CRB; EDS/DG suggestion to GND

Quanta Computer Inc.

PROJECT :

AUBURNDA 4/4

1

ZYD

750Tuesday, April 06, 2010

3B

of

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

IBEX PEAK-M (LVDS,DDI)

U28D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49

AU52

AT53 AY51

AT48

AU50

AT51

AA52 AB53

AD53

AD48

AB51

V51 V53

Y53 Y51

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

IbexPeak-M_R1P0

LVDS

Digital Display Interface

CRT

LCD_IBG

LVD_VREFH LVD_VREFL

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

INT_HDMITX2N_R

BD42

INT_HDMITX2P_R

BC42

INT_HDMITX1N_R

BJ42

INT_HDMITX1P_R

BG42

INT_HDMITX0N_R

BB40

INT_HDMITX0P_R

BA40

INT_HDMICLK-_R

AW38

INT_HDMICLK+_R

BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

TP47TP47 TP46TP46

C781 IV@0.1u/10V_4_X7RC781 IV@0.1u/10V_4_X7R C782 IV@0.1u/10V_4_X7RC782 IV@0.1u/10V_4_X7R C778 IV@0.1u/10V_4_X7RC778 IV@0.1u/10V_4_X7R C784 IV@0.1u/10V_4_X7RC784 IV@0.1u/10V_4_X7R C779 IV@0.1u/10V_4_X7RC779 IV@0.1u/10V_4_X7R C780 IV@0.1u/10V_4_X7RC780 IV@0.1u/10V_4_X7R C783 IV@0.1u/10V_4_X7RC783 IV@0.1u/10V_4_X7R C785 IV@0.1u/10V_4_X7RC785 IV@0.1u/10V_4_X7R

R place close to PCH

R554 IV@150_4R554 IV@150_4 R553 IV@150_4R553 IV@150_4 R548 IV@150_4R548 IV@150_4

SDVO_CTRLCLK 25 SDVO_CTRLDAT 25

Amos 1013

INT_HDMI_HPD 25

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

INT_HDMITX2N 25 INT_HDMITX2P 25 INT_HDMITX1N 25 INT_HDMITX1P 25 INT_HDMITX0N 25 INT_HDMITX0P 25 INT_HDMICLK- 25 INT_HDMICLK+ 25

U28C

XDP_DBRST#

ACIN_R

PM_BATLOW#

PM_RI#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_R1P0

System Power Management

DMI_RXN04

SYS_PWROK

ICH_RSMRST#36

DNBSWON#36

PCH_ACIN36

DMI_RXN14 DMI_RXN24 DMI_RXN34

DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34

DMI_TXN04 DMI_TXN14 DMI_TXN24 DMI_TXN34

DMI_TXP04 DMI_TXP14 DMI_TXP24 DMI_TXP34

+1.05V

R500 49.9/F_4R500 49.9/F_4

RSV_ICH_LAN_RST#

SUS_PWR_ACK_R

R312 *0_4R312 *0_4

D D

C C

XDP_DBRST#4

PM_DRAM_PWRGD4,35

B B

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_LAN# / GPIO29

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

SUS_STAT#

SLP_S5#_R

SLP_M#

PM_SLP_LAN#

Amos 1013

R236 IV@0_4R236 IV@0_4

FDI_TXN0_R FDI_TXN1_R

R212 IV@0_4R212 IV@0_4 R210 IV@0_4R210 IV@0_4

FDI_TXN2_R FDI_TXN3_R

R208 IV@0_4R208 IV@0_4 R229 IV@0_4R229 IV@0_4

FDI_TXN4_R

R217 IV@0_4R217 IV@0_4

FDI_TXN5_R FDI_TXN6_R

R228 IV@0_4R228 IV@0_4 R221 IV@0_4R221 IV@0_4

FDI_TXN7_R

R234 IV@0_4R234 IV@0_4

FDI_TXP0_R

R213 IV@0_4R213 IV@0_4

FDI_TXP1_R FDI_TXP2_R

R209 IV@0_4R209 IV@0_4

FDI_TXP3_R FDI_TXP4_R

R232 IV@0_4R232 IV@0_4 R215 IV@0_4R215 IV@0_4

FDI_TXP5_R

R225 IV@0_4R225 IV@0_4

FDI_TXP6_R FDI_TXP7_R

R218 IV@0_4R218 IV@0_4

R508 *EV@1K_4R508 *EV@1K_4 R515 *EV@1K_4R515 *EV@1K_4 R512 *EV@1K_4R512 *EV@1K_4 R514 *EV@1K_4R514 *EV@1K_4 R510 *EV@1K_4R510 *EV@1K_4

modify 1024

R299 *0_4R299 *0_4

TP24TP24

TP36TP36

TP53TP53

TP39TP39

FDI_TXN0 4 FDI_TXN1 4 FDI_TXN2 4 FDI_TXN3 4 FDI_TXN4 4 FDI_TXN5 4 FDI_TXN6 4 FDI_TXN7 4

FDI_TXP0 4 FDI_TXP1 4 FDI_TXP2 4 FDI_TXP3 4 FDI_TXP4 4 FDI_TXP5 4 FDI_TXP6 4 FDI_TXP7 4

FDI_INT 4 FDI_FSYNC0 4 FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_LSYNC1 4

PCIE_WAKE# 26,28

CLKRUN# 36

ICH_SUSCLK 36

SUSC# 36

SUSB# 36

PM_SYNC 4

Amos 1014

INT_CRT_DDCCLK24 INT_CRT_DDCDAT24

INT_LVDS_BLON24

INT_LVDS_DIGON24

INT_LVDS_BRIGHT24

INT_LVDS_EDIDCLK24 INT_LVDS_EDIDDATA24

+3V

Amos 1013

INT_TXLCLKOUT-24 INT_TXLCLKOUT+24

INT_TXLOUT0-24

INT_TXLOUT1-24

INT_TXLOUT2-24

INT_TXLOUT0+24

INT_TXLOUT1+24

INT_TXLOUT2+24

INT_TXUCLKOUT-24 INT_TXUCLKOUT+24

INT_TXUOUT0-24

INT_TXUOUT1-24 INT_TXUOUT2-24

INT_TXUOUT0+24

INT_TXUOUT1+24

INT_TXUOUT2+24

INT_CRT_BLU24 INT_CRT_GRN24 INT_CRT_RED24

INT_HSYNC24 INT_VSYNC24

R267 IV@10K_4R267 IV@10K_4 R274 IV@10K_4R274 IV@10K_4R211 IV@0_4R211 IV@0_4

R249 IV@2.37K/F_4R249 IV@2.37K/F_4

R239 IV@0_4R239 IV@0_4 R235 IV@0_4R235 IV@0_4

INT_TXLCLKOUTINT_TXLCLKOUT+

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

INT_TXLOUT0+ INT_TXLOUT1+ INT_TXLOUT2+

INT_TXUCLKOUTINT_TXUCLKOUT+

INT_TXUOUT0INT_TXUOUT1INT_TXUOUT2-

INT_TXUOUT0+ INT_TXUOUT1+ INT_TXUOUT2+

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

DAC_IREF

R258

R258 1K/F_4

1K/F_4

PCH Pull-high/low

+3V

CLKRUN#

A A

XDP_DBRST#

ICH_RSMRST# RSV_ICH_LAN_RST# SYS_PWROK ACIN_R

R530 8.2K_4R530 8.2K_4 R273 10K_4R273 10K_4

R569 10K_4R569 10K_4 R571 10K_4R571 10K_4 R591 10K_4R591 10K_4

5

modify 1026

PM_RI# PM_BATLOW# PCIE_WAKE# PM_SLP_LAN# SUS_PWR_ACK_R

R321 10K_4R321 10K_4 R577 8.2K_4R577 8.2K_4 R329 10K_4R329 10K_4 R330 *10K_4R330 *10K_4 R565 10K_4R565 10K_4 R295 10K_4R295 10K_4

+3V_S5

modify 1022 change to 8.2 K

Amos 1014 change to 10 K

4

System PWR_OK

3

C759 *.1u_4C759 *.1u_4

SYS_PWROK

U31

TC7SH08FU

+3V_S5

'(/$<B95B3:5*22'QHHG38.WR9 38DWSRZHUVLGH

53

1

4

2

R597 100K_4R597 100K_4

DELAY_VR_PWRGOOD 4,39 PWROK_EC 36

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 1/6

Date: Sheet

PROJECT :

ZYD

of

850Tuesday, April 06, 2010

of

850Tuesday, April 06, 2010

of

1

850Tuesday, April 06, 2010

3B

5

RTC Circuitry

+3VPCU

VCCRTC_1

D D

R205

R205 1K_4

1K_4

VCCRTC_2

12

CN14

CN14 BAT_CONN

BAT_CONN

CR1

BAT54C

1 3

2

+VCCRTC

RTC_N01

Q19

*MMBT3904

RTC_N03

R207 20K/F_4R207 20K/F_4

R216 20K/F_4R216 20K/F_4

C406

C406 1u/10V_4

1u/10V_4

R204 *22K_6R204 *22K_6

C402

C402 1u/10V_4

1u/10V_4

C403

C403 1u/10V_4

1u/10V_4

R201

R201 *68.1K/F_4

*68.1K/F_4

R200

R200 *150K/F_6

*150K/F_6

RTC_RST#

12

J2

J2 *SHORT_ PAD1

*SHORT_ PAD1

SRTC_RST#

12

J1

J1 *SHORT_ PAD1

*SHORT_ PAD1

+5V_S5

HDA Bus

C C

PCH_AZ_CODEC_SYNC30

PCH_AZ_CODEC_RST#30

PCH_AZ_CODEC_SDOUT30

PCH_AZ_CODEC_BITCLK30

R583 33_4R583 33_4

R587 33_4R587 33_4

R586 33_4R586 33_4

R584 33_4R584 33_4

C755

C755 *27p_4

*27p_4

ACZ_SYNCACZ_SYNC

ACZ_RST#

ACZ_SDOUTACZ_SDOUT

ACZ_BIT_CLKACZ_BIT_CLK

4

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

+VCCRTC

PCH_AZ_CODEC_SDIN030

+3V_S5

HDMI_HPD_PCH#25

C758

15p/50V_4

23

C756

15p/50V_4

R570 1M_4R570 1M_4

SPKR30

R582 *10K_4R582 *10K_4

R523 *10K_4R523 *10K_4

+3VPCU

Y6

32.768KHZY632.768KHZ

4 1

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST#

3

R594

R594 10M_4

10M_4

RTC_RST# SRTC_RST# SM_INTRUDER#

PCH_INVRMEN

SPKR

ACZ_SDOUT

PCH_GPIO33

RTC_X1 RTC_X2

TP32TP32 TP31TP31 TP29TP29

PCH_GPIO13

SPI_CLK_R SPI_CS0#_R SPI_CS1#

SPI_SI_R

SPI_SO_R

U28A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_R1P0

RTCIHDA

SPI JTAG

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA

SATA0GP / GPIO21 SATA1GP / GPIO19

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN

SATA0RXP SATA0TXN SATA0TXP

SATA1RXN

SATA1RXP SATA1TXN SATA1TXP

SATA2RXN

SATA2RXP SATA2TXN SATA2TXP

SATA3RXN

SATA3RXP SATA3TXN SATA3TXP

SATA4RXN

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

2

D33 B33 C32 A32

C34 A34

F34 AB9

SATA_RXN0_C

AK7

SATA_RXP0_C

AK6 AK11 AK9

SATA_RXN1_C

AH6

SATA_RXP1_C

AH5 AH9 AH8

AF11 AF9 AF7

Note:

AF6

SATA port2/3 may not be available on all PCH sku

AH3

(HM55 support 3 port only)

AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

R260 37.4/F_4R260 37.4/F_4

AF15

T3

Y9 V1

R262 10K_4R262 10K_4

R250 10K_4R250 10K_4 R541 10K_4R541 10K_4

+1.05V

SATA_ACT# 32

+3V +3V

LPC_LAD0 28,36 LPC_LAD1 28,36 LPC_LAD2 28,36 LPC_LAD3 28,36

LPC_LFRAME# 28,36

+3V

IRQ_SERIRQ 36

SATA_RXN0_C 29 SATA_RXP0_C 29 SATA_TXN0 29 SATA_TXP0 29

SATA_RXN1_C 29 SATA_RXP1_C 29 SATA_TXN1 29 SATA_TXP1 29

Amos 1014 change to 10K

1

3&+6WUDS3LQ&RQILJXUDWLRQ7DEOH

INTVRMEN

SPI_MOSI

MDC Bus

B B

SPI_CS0#_R SPI_CLK_R

SPI_SI_R

SPI_SO_R

Amos 1014

R556 3.3K/F_4R556 3.3K/F_4

+3V

C731

C731 *22p/50V_4

*22p/50V_4

U30

1

CE#

6

SCK

5

SI

2

SO

3

WP#

W25X16AVSSIG

8

VDD

R557 3.3K/F_4R557 3.3K/F_4

7

HOLD#

4

VSS

Modify 1128

+3V

C734

C734 .1u/10V_4

.1u/10V_4

SPKR

HDA_DOCK_EN #/GPIO33

GNT0#, GNT1#

GNT2#/ GPIO53

GNT3#/ GPIO55

NV_ALE NV_CLE

PCH SPI

GPIO8

A A

5

4

GPIO15

GPIO27

Integrated 1.05V VRM Enable / Disable

TPM Functionality Disable

Reboot option at power-up 0 = Default Mode (Internal weak Pull-down)

Flash Descriptor Security Override

Boot BIOS Strap

ESI Strap (Server Only)

Top-Block Swap Override

IntelR Anti-Theft Technology HDD Data Protection (Intel AT-d) Enable

DMI Termination Voltage

Reserved This signal has a weak internal pull up.

Reserved

On-Die PLL Voltage Regulator <internal weak pull-up>

1 = Integrated VRM is enabled

1 = Enabled 0 = Disable

1 = No Reboot Mode with TCO Disabled

0 = Flash Descriptor Security will be overridden 1 = Security measure defined in the Flash Descriptor will be enabled.

(0,0) = LPC (0,1) = Reserved NAND (1,0) = PCI (1,1) = SPI

ESI compatible mode is for server platforms only

0 = Top Block Swap Mode 1 = Default Mode (Internal pull-up)

1 = Enabled 0 = Disabled (Default)

DMI termination voltage. Weak internal pull-up. Do not pull low.

0 = Integrated VRM is disabled

Modify 1019

NOTE: This signal should not be pulled low

0 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality 1 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality

0 = Disables the VccVRM. 1 = Enables the internal VccVRM to have a clean supply for analog rails.

3

RSV_GPIO811

CR_WAKE#11

PCH_GPIO2711

+VCCRTC

+3V

PCH_GPIO33

PCI_GNT0#10 PCI_GNT1#10

PCI_GNT2#10

PCI_GNT3#10

NV_ALE10

NV_CLE10

R593 330K_6R593 330K_6

R559 *1K_4R559 *1K_4

R307 *1K/F_4R307 *1K/F_4

J3 *SHORT_ PAD1J3 *SHORT_ PAD1

1 2

R322 10K_4R322 10K_4

R315 1K_4R315 1K_4 R310 1K_4R310 1K_4

R313 *1K/F_4R313 *1K/F_4

R560 *10K/F_4R560 *10K/F_4

R231 *1K/F_4R231 *1K/F_4

R230 *1K/F_4R230 *1K/F_4

R325 10K_4R325 10K_4

R320 *1K_4R320 *1K_4

R282 1K_4R282 1K_4

R263 *10K_4R263 *10K_4

PCH_INVRMEN

SPI_SI_R

SPKR

+3V_S5

2

+1.8V

+3V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 2/6

Date: Sheet of

PROJECT :

ZYD

950Tuesday, April 06, 2010

1

950Tuesday, April 06, 2010

3B

5

U28E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

D D

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

TP34TP34

TP37TP37

R555 22_4R555 22_4

TP30TP30

R304 22_4R304 22_4 R296 22_4R296 22_4

PCI_RE Q0# PCI_RE Q1# PCI_RE Q2# PCI_RE Q3#

PCI_GNT 0# PCI_GNT 1# PCI_GNT 2# PCI_GNT 3#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_RS T# PCI_SERR#

PCI_PER R#

PCI_IRDY# PCI_PAR PCI_DE VSEL# PCI_FRAME#

PCI_PLO CK# PCI_STOP#

PCI_TRDY# ICH_PME# PCI_PLTR ST#

CLK_LPC_DEBUG_C CLK_PCI_PCCARD CLK_PCI_775_CCLK_PCI_775_C

Amos 1014

CLK_LPC_DEBUG28

CLK_PCI_77536

Amos 1014

PCI_GNT 0#9 PCI_GNT 1#9 PCI_GNT 2#9 PCI_GNT 3#9

PCI_RS T#28

CLK_PCI_FB CLK_PCI_FB_C

C C

B B

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST #

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_R1P0

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N

USBP10P

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25 D25

N16 J16 F16 L16 E14 G16 F12 T15

4

NV_ALE NV_CLE

NV_RCOMP

Amos 1014

Port1 and port9 can be used on debug mo de

TP35TP35 TP28TP28

TP26TP26 TP23TP23

TP42TP42

Modify 1014

TP41TP41

USB port6/7 may not be available on all PCH sku (HM55 support 12port only)

USBP9USBP9+

USB_BIAS

R581 22.6/F_4R581 22.6/F_4

USB_OC0# USB_OC2#

USB_OC3# USB_OC4#

USB_OC6# USB_OC7#

NV_ALE 9 NV_CLE 9

USBP1- 33 USBP1+ 33

USBP3- 31 USBP3+ 31 USBP4- 33 USBP4+ 33

USBP8- 24 USBP8+ 24

TP40TP40

TP38TP38

USBP10- 28 USBP10+ 28 USBP11- 31 USBP11+ 31 USBP12- 31 USBP12+ 31 USBP13- 28 USBP13+ 28

TP16TP16

TP15TP15

Modify 1019

TP17TP17

TP18TP18

TP20TP20

MB USB

USB/B BLUETOOTH

Camera

Mini Card (3G) USB and cardreader/B Card Reader Mini Card (WLAN)

USB_OC0# 33

Modify 1016

USB_OC1_5# 31

Modify 1020

EHCI1

EHCI2

3

PCIE_R X1-26 PCIE_R X1+26 PCIE_TX1-26 PCIE_TX1+26

PCIE_R X2-28 PCIE_R X2+28 PCIE_TX2-28 PCIE_TX2+28

PCIE_R X6-28 PCIE_R X6+28 PCIE_TX6-28 PCIE_TX6+28

CLK_PCH_SRC1#28 CLK_PCH_SRC128

CLKREQ_3G#28

CLK_PCH_SRC2#28 CLK_PCH_SRC228

PCIE_CLK_REQ2#28

CLK_PCIE_LOM#26 CLK_PCIE_LOM26

CLK_PCIE_LAN_REQ#26

C680 0.1u/10V_4_X7RC680 0.1u/10V_4_X7R C681 0.1u/10V_4_X7RC681 0.1u/10V_4_X7R

C405 0.1u/10V_4_X7RC405 0.1u/10V_4_X7R C404 0.1u/10V_4_X7RC404 0.1u/10V_4_X7R

C410 0.1u/10V_4_X7RC410 0.1u/10V_4_X7R C409 0.1u/10V_4_X7RC409 0.1u/10V_4_X7R

modify 1223_B

R202 *Short_4R202 *Short_4 R203 *Short_4R203 *Short_4

R540 *Short_4R540 *Short_4

R566 *Short_4R566 *Short_4

R547 *Short_4R547 *Short_4

CLK_PCIE_REQ0#

CLK_PCH_SRC1N CLK_PCH_SRC1P

CLK_PCIE_REQ1#_R

CLK_PCIE_REQ2#_R

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

PCIE_CLK_REQB#

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN6_C PCIE_TXP6_C

BG30 BF29

BH29

AW30

BA30 BC30 BD30

AU30 AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33 BG32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34 BG36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

AK53 AK51

BJ30

BJ32

BJ34 BJ36

M9

AJ50 AJ52

P13

U28B

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_R1P0

2

PCI-E*

SMBALERT# / GPIO11

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SMBus

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Controller

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

Clock Flex

CL_DATA1 CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

SMBCLK

CL_CLK1

B9 H14 C8

J14 C6 G8

M14 E10 G12

CL_CLK1

T13

CL_DATA1

T11

CL_RST1#

T9

PEG_CLKREQ#_R

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

XCLK_RCOMP

AF38

CLK_FLEX0

T45

CLK_FLEX1

P43

CLK_FLEX2

T42

CLK_FLEX3

N50

RSV_SMBALERT# ICH_SMBCLK ICH_SMBDATA

RSV_SML0ALERT# SMB_CLK_ME0 SMB_DATA_ME0

RSV_SML1ALERT# SMB_CLK_ME1 SMB_DATA_ME1

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

R253 90.9/F_4R253 90.9/F_4

R292 *0_4R292 *0_4

R573 *0_4R573 *0_4R524 *32.4/F_4R524 *32.4/F_4

T66T66

T68T68

T65T65

T67T67

1

ICH_SMBCLK 3 ICH_SMBDATA 3

SMB_CLK_ME0 26 SMB_DATA_ME0 26

CL_CLK1 28 CL_DATA1 28 CL_RST1# 28

CLK_PCIE_VGA# 16 CLK_PCIE_VGA 16

CLK_PCIE_3GPLL# 4 CLK_PC IE_3GPLL 4

DPLL_REF_SSCLK# 4 DPLL_REF_SSCLK 4

CLK_BUF_PCIE_3GPLL# 3 CLK_BUF_PCIE_3GPLL 3

CLK_BUF_BCLK# 3 CLK_BUF_BCLK 3

CLK_BUF_DREFCLK# 3 CLK_BUF_DREFCLK 3

CLK_BUF_DREFSSCLK# 3 CLK_BUF_DREFSSCLK 3

CLK_ICH_14M 3

+1.05V

modify 1014

DIMM0/1, CLK GEN.

Giga LAN

SML1ALERT# 11,34,36

EC

PEG_CLKREQ# 17

12

R537

R537 1M_4

1M_4

C705 18p/50V_4C705 18p/50V_4

Y5 25MHzY525MHz

C708 18p/50V_4C708 18p/50V_4

SMB Pull up

+3V_S5

R291 10K_4R291 10K_4 R580 10K_4R580 10K_4 R303 10K_4R303 10K_4 R308 10K_4R308 10K_4 R552 10K_4R552 10K_4 R575 IV@10K_4R575 IV@10K_4

+3V

R543 10K_4R543 10K_4

+3V

R318 8.2K_4R318 8.2K_4 R323 8.2K_4R323 8.2K_4 R558 8.2K_4R558 8.2K_4 R596 8.2K_4R596 8.2K_4 R567 10K_4R567 10K_4

R574 EV@10K/F_4R574 EV@10K/F_4

CLK_PCIE_REQ0# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5# PCIE_CLK_REQB#

PEG_CLKREQ#_R

CLK_PCIE_REQ1#_R

PCI_RE Q2# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# CLK_PCIE_REQ2#_R

PEG_CLKREQ#_R

3

Amos 1014

+3V_S5

R572 10K_4R572 10K_4 R339 10K_4R339 10K_4 R297 10K_4R297 10K_4 R326 2.2K_4R326 2.2K_4 R579 2.2K_4R579 2.2K_4 R578 2.2K_4R578 2.2K_4 R331 2.2K_4R331 2.2K_4

2

RSV_SMBALERT# RSV_SML0ALERT# RSV_SML1ALERT# ICH_SMBCLK ICH_SMBDATA SMB_CLK_ME0 SMB_DATA_ME0

2ND_MBCLK36

2ND_MBDATA36

Modify 1019

USB_OC7# USB_OC6#

+3V_S5

C463

C463 .1u/10V_4

.1u/10V_4

PCI_PLTRST#

2

4

A A

1

U12

3 5

TC7SH08FU

R300 *0_4R300 *0_4

5

R301

R301 100K_4

100K_4

PLTRST# 4,11, 26,28,31,36

USB_OC4#

+3V_S5

PCI_PIRQD# PCI_RE Q1# PCI_FRAME# PCI_TRDY#

+3V

PCI_PIRQC# PCI_PIRQA# PCI_STOP# PCI_PLO CK# PCI_IRDY#

+3V

6 7 8 9

10

6 7 8 9

10

6 7 8 9

10

RP2

8.2K_10P8R

RP3

8.2K_10P8R

RP4

8.2K_10P8R

4

5 4 3 2 1

USB_OC0# USB_OC1_5# USB_OC2# USB_OC3#

PCI_RE Q3# PCI_PIRQB# PCI_RE Q0# PCI_PIRQH#

PCI_PER R# PCI_DE VSEL#

PCI_SERR#

+3V_S5

Modify 1022

+3V

+3V_S5

R334

2

2.2K_4

SMB_CLK_ME1

3

1

Q22

Q22 2N7002K

2N7002K

+3V_S5

R335

2

2.2K_4

SMB_DATA_ME1

3

1

Q23

Q23 2N7002K

2N7002K

Quanta Computer Inc.

PROJECT :

Size Document Nu mb er Rev

IBEX PEAK-M 3/6

Date: Sheet

PROJECT :

1

ZYD

10 50Tuesday, April 06, 2010

of

3B

5

4

3

2

1

GPU RST#

R406 *Short_4R406 *Short_4

D D

TP52TP52

SIO_EXT_SMI#36 SIO_EXT_SCI#36

TP54TP54

RSV_GPIO89

TP27TP27

CR_WAKE#9

modify 1024

C C

modidy 1019

dGPU_PWROK21,36

dGPU_VRON21,43

dGPU_PWR_EN#38

TP19TP19

TP33TP33

PCH_GPIO279

R272 *EV@0_4R272 *EV@0_4 R255 *EV@0_4R255 *EV@0_4

TP14TP14

modify 1019

modify 1223_B

RST_GATE#35

SML1ALERT#10,34,36

EC suggestion use GPIO49 for FAN control

SATA5GP / GPIO49 / TEMP_ALERT# is used to alert for EC when CPU or Graph/Memory controllers' temperature go out of limit.

B B

So connecting GPIO49 to EC and avoid this pin to be used for other purpose

A A

R283 *Short_4R283 *Short_4

BMBUSY# SIO_EXT_SMI# SIO_EXT_SCI# BOARD_ID0

RSV_GPIO8

LAN_DISABLE#

CR_WAKE#

dGPU_HOLD_RST#

R327 *EV@0_4R327 *EV@0_4

dGPU_PWROK_R

GPIO22

PCH_GPIO27

TP_PCH_GPIO28 STP_PCI#

dGPU_VRON_R dGPU_PWR_EN#_R dGPU_PRSNT# GPIO38 GPIO39 GPIO45

SV_SET_UP

SATA5GP

GPIO57

AB12

M11

AB13

BE1

BE53

BF53

BH1

BH2 BH52 BH53

BJ49 BJ50

BJ52 BJ53

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U28F

A20GATE

PECI

RCIN#

TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8

TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19

NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

U2

AM3 AM1 BG10 T1 BE10 BD10

BA22 AW22 BB22 AY45 AY46 AV43 AV45 AF13 M18 N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

P6 C10

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24 GPIO27

V13

GPIO28 STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36 SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12

BF1

VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21 VSS_NCTF_22

BJ5

VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_R1P0

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

PROCPWRGD

THRMTRIP#

PCH_THRMTRIP#_R

TP_INT3_3V

R227 56/F_4R227 56/F_4

TP21TP21

SIO_A20GATE 36

CLK_CPU_BCLK# 4 CLK_CPU_BCLK 4 H_PECI 4 SIO_RCIN# 36 H_PWRGOOD 4

R219 56/F_4R219 56/F_4

PM_THRMTRIP# 4

+1.1V_VTT

GPU_RST#16

GPIO Pull-up/Pull-down

TP_PCH_GPIO28 GPIO45 RST_GATE# GPIO57 LAN_DISABLE#

modify 1024

SV_SET_UP 1-X High = Strong (Default)

GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1

modify 1116

+3V

modify 1116

+3V

53

1

4

SIO_EXT_SMI# SIO_EXT_SCI#

dGPU_PWR_EN#_R dGPU_PWROK_R

SIO_RCIN# SIO_A20GATE dGPU_HOLD_RST# SATA5GP GPIO22

GPIO39 STP_PCI#

GPIO38 BMBUSY# SV_SET_UP

GPIO57 dGPU_VRON_R

R592 EV@10K_4R592 EV@10K_4 R251 IV@10K_4R251 IV@10K_4

dGPU_HOLD_RST#

2

U22

U22 *EV@TC7SH08FU

*EV@TC7SH08FU

R284 10K_4R284 10K_4 R576 10K_4R576 10K_4 R348 10K_4R348 10K_4 R332 *10K_4R332 *10K_4 R285 10K_4R285 10K_4

R337 10K_4R337 10K_4 R588 10K_4R588 10K_4

R265 10K_4R265 10K_4 R336 10K_4R336 10K_4

R562 10K_4R562 10K_4 R563 10K_4R563 10K_4 R532 10K_4R532 10K_4 R275 10K_4R275 10K_4 R276 10K_4R276 10K_4

R564 10K_4R564 10K_4 R280 10K_4R280 10K_4

R538 10K_4R538 10K_4 R531 8.2K_4R531 8.2K_4 R268 10K_4R268 10K_4

BOARD_ID0 dGPU_PRSNT#

dGPU always exist

Integrated Clock Chip Enable

BOARD_ID0

RSV_GPIO8

High = Discrete

Low = IV

High = Disable

Low = Enable

C578 *EV@.1u_4C578 *EV@.1u_4

PLTRST# 4,10,26,28,31,36

R411

R411 *EV@100K_4

*EV@100K_4

+3V_S5

+3V

R319 10K_4R319 10K_4 R271 *10K_4R271 *10K_4

R595 IV@10K_4R595 IV@10K_4

R254 EV@10K_4R254 EV@10K_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 4/6

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

ZYD

3B

of

11 50Tuesday, April 06, 2010

of

11 50Tuesday, April 06, 2010

of

11 50Tuesday, April 06, 2010

1

IBEX PEAK-M (POWER)

D D

40mA(15mils)

C C

37mA(15mils)

B B

VRM enable by strap pin GPIO27 which supply clean 1.05V for [VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

A A

5

R290 *Short_8R290 *Short_8

+1.05V

R289 *Short_8R289 *Short_8

modify 1223_B

VCCCORE(+1.05V) = 1.432A(80mils)

+1.05V

L29 *1uh_6L29 *1uh_6

+1.05V

VCCIO = 3.062A(150mils)

+1.05V

+3V

+V1.5S_1.8S

L30 *1uH_6L30 *1uH_6

+1.05V

U28G

+1.05V_VCCCORE_ICH

C442

C442 10u/6.3V_8

10u/6.3V_8

+1.05V_PCH_VCCDPLL_EXP

R220 *Short_6R220 *Short_6 C709

C408 *10u/6.3V_6C408 *10u/6.3V_6

R527 *Short_6R527 *Short_6

R240 *Short_6R240 *Short_6

C407

C407 *10u/6.3V_6

*10u/6.3V_6

R245 *Short_6R245 *Short_6

C439

C439 1u/6.3V_4

1u/6.3V_4

+V1.1LAN_VCCAPLL_EXP

C427 10U/6.3V_8C427 10U/6.3V_8 C414 1U/6.3V_4C414 1U/6.3V_4 C419 1U/6.3V_4C419 1U/6.3V_4 C437 1U/6.3V_4C437 1U/6.3V_4 C417 1U/6.3V_4C417 1U/6.3V_4

+3V_VCCA3GBG

+VCCAFDI_VRM

+V1.1LAN_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

+1.8V

U28G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IbexPeak-M_R1P0

VCCVRM=196mA(15mils)

R222 *Short_6R222 *Short_6

L50 10uh_8L50 10uh_8

+1.05V

L49 10uh_8L49 10uh_8

POWER

VCC CORE

PCI E*

C413

C413 .1u/16V_4

.1u/16V_4

C696

C696 220u_3528

220u_3528

C691

C691 220u_3528

220u_3528

4

CRTLVDS

HVCMOS

DMI

NAND / SPI

FDI

C412

C412 .1u/16V_4

.1u/16V_4

+

VCCADAC[1]

VCCADAC[2] VSSA_DAC[1] VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

VCC3_3[2] VCC3_3[3] VCC3_3[4]

VCCVRM[2]

VCCDMI[1] VCCDMI[2]

VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9]

VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4]

+V1.5S_1.8S

C418

C418 1u/10V_4

1u/10V_4

C694

C694 1u/10V_4

1u/10V_4

+VCCA_DAC_1_2

AE50 AE52 AF53 AF51

AH38 AH39

AP43 AP45 AT46 AT45

AB34 AB35 AD35

AT24

AT16 AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

+V1.1LAN_VCCA_A_DPL

R520

R520 *0_8

*0_8

+V1.1LAN_VCCA_B_DPL

C720

C720 .01u/25V_4

.01u/25V_4

VCCALVDS= 1mA

VCCALVDS

R256

R256 EV@0_4

EV@0_4

C424

C424 IV@.01u/25V_4

IV@.01u/25V_4

+3V_VCC_GIO

C445

C445 .1u/16V_4

.1u/16V_4

VCCVRM= 196mA(15mils)

+VCCVRM

+VCCDMI

C423

C423 1u/10V_4

1u/10V_4

VCCPNAND= 156mA(15mils)

VCCPNAND

C432

C432 .1u/16V_4

.1u/16V_4

VCCME3_3= 85mA(15mils)

+3V_VCCME_SPI

C430

C430 .1u/16V_4

.1u/16V_4

C789

C732

1U/10V/X5R_6

10u/6.3V_6

R264 IV@0_4R264 IV@0_4

C436

C436 IV@0.1u/10V_4

IV@0.1u/10V_4

VCCTX_LVDS

C707

C707 IV@.01u/25V_4

IV@.01u/25V_4

VCC3_3 = 357mA(30mils)

R281 *Short_6R281 *Short_6

R244 *Short_6R244 *Short_6

R237 *Short_4R237 *Short_4

R226 *Short_8R226 *Short_8

R246 *Short_6R246 *Short_6

Amos 1014

L54 IV@0.1UH_8/250mAL54 IV@0.1UH_8/250mA C709 IV@22u/6.3V_8

IV@22u/6.3V_8

+3V

+V1.5S_1.8S

+1.1V_VTT

+1.8V

+3V

3

VCCADAC= 69mA(15mils)

L57

L57 PBY160808T/2A/180ohm_6

PBY160808T/2A/180ohm_6

C721

C786

0.1u/10V_4_X7R

10u/6.3V_6

+3V

VCCLAN = 320mA(30mils)

+1.05V

VCCTX_LVDS= 59mA(15mils)

R528

R528 EV@0_4

EV@0_4

+1.8V

VCCME(+1.05V) = 1.849A(100mils)

+1.05V

VCCDMI= 61mA(15mils)

VCCSUS3_3 = 163mA(20mils)

VCC3_3 = 0.357A(30mils)

V_CPU_IO >1mA(15mils)

VCCRTC= 2mA(15mils)

+3V

VCCACLK= 52mA(15mils)

+1.05V

R259 *Short_6R259 *Short_6

R266 *Short_8R266 *Short_8 R302 *Short_8R302 *Short_8

L32 *10uh_8L32 *10uh_8

+1.05V_VCCAUX

C443

C443 1U/6.3V_4

1U/6.3V_4

0.1u/10V_4

+V1.5S_1.8S

68mA(15mils)

69mA(15mils)

+3V_S5

+3V

+1.05V

C458 0.1u/10V_4_X7RC458 0.1u/10V_4_X7R

C446 0.1u/10V_4_X7RC446 0.1u/10V_4_X7R

R328 *Short_6R328 *Short_6

R293 *Short_6R293 *Short_6

R233 *Short_6R233 *Short_6

+VCCRTC

VCCIO = 3.062A(150mils)

+1.1V_VTT

+V1.1LAN_VCCA_CLK

C428 *10u/6.3V_6C428 *10u/6.3V_6 C429 *1u/6.3V_4C429 *1u/6.3V_4

TP_PCH_VCCDSW

C451

+1.05V_VCCEPW

C449 22U/6.3V_8C449 22U/6.3V_8 C456 22U/6.3V_8C456 22U/6.3V_8 C452 1U/6.3V_4C452 1U/6.3V_4 C455 1U/6.3V_4C455 1U/6.3V_4

C457 0.1u/10V_4_X7RC457 0.1u/10V_4_X7R

+V1.1LAN_VCCA_A_DPL

+V1.1LAN_VCCA_B_DPL

C434 1U/6.3V_4C434 1U/6.3V_4 C435 1U/6.3V_4C435 1U/6.3V_4 C438 1U/6.3V_4C438 1U/6.3V_4

+V1.1LAN_INT_VCCSUS

+3V_S5_VCCPSUS

C459 0.1u/10V_4_X7RC459 0.1u/10V_4_X7R

+3V_VCCPCORE

C450 0.1u/10V_4_X7RC450 0.1u/10V_4_X7R

+VTT_VCCPCPU

C420 4.7U/6.3V_6C420 4.7U/6.3V_6 C421 0.1u/10V_4_X7RC421 0.1u/10V_4_X7R C422 0.1u/10V_4_X7RC422 0.1u/10V_4_X7R

C750 0.1u/10V_4_X7RC750 0.1u/10V_4_X7R C748 0.1u/10V_4_X7RC748 0.1u/10V_4_X7R

+VCCRTCEXT

+VCCSST

AP51 AP53

AF23 AF24

AD38 AD39 AD41 AF43 AF41 AF42

AU24

BB51 BB53

BD51 BD53

AH23 AH35 AF34 AH34 AF32

AT18

AU18

2

Y20

V39 V41 V42 Y39 Y41 Y42

V9

AJ35

V12

Y22

P18 U19 U20 U22

V15 V16 Y16

A12

U28J

VCCACLK[1] VCCACLK[2]

VCCLAN[1] VCCLAN[2]

DCPSUSBYP

VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6] VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2] VCCIO[3] VCCIO[4] DCPSST

DCPSUS

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_R1P0

POWER

VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13]

USB

VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

Clock and Miscellaneous

PCI/GPIO/LPC

VCCSATAPLL[1] VCCSATAPLL[2]

SATA

CPU

RTC PCI/GPIO/LPC

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13]

VCC3_3[14]

VCCIO[9]

VCCVRM[4]

VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13]

VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

V24 V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

K49

J38 L38 M36 N36 P36 U35

AD13

AK3 AK1

AH22

AT20

AH19 AD20 AF22 AD19

AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

1

VCCIO = 3.208A(150mils)

C454 1U/6.3V_4C454 1U/6.3V_4

+3V_S5_VCCPUSB

C464 0.1u/10V_4_X7RC464 0.1u/10V_4_X7R C465 0.1u/10V_4_X7RC465 0.1u/10V_4_X7R C470 0.022U/16V_4C470 0.022U/16V_4

+1.05V

R324 *Short_8R324 *Short_8

VCCSUS3_3 = 0.163A(20mils)

V5REF_SUS

V5REF

+3V_VCCPPCI

C469 0.1u/10V_4_X7RC469 0.1u/10V_4_X7R

C466 0.1u/10V_4_X7RC466 0.1u/10V_4_X7R

+V1.1LAN_VCCAPLL

C698

C698 *1u/6.3V_4

*1u/6.3V_4

+V1.1LAN_VCC_SATA

+V1.5S_1.8S

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C471

C471 1u/10V_4

1u/10V_4

R287 *Short_6R287 *Short_6

R309 *Short_6R309 *Short_6

C717

C717 *10u/6.3V_6

*10u/6.3V_6

VCCME = 1.849A(100mils)

VCCSUSHDA= 6mA(15mils)

+1.05V

V5REF_SUS< 1mA

R585 100/F_4R585 100/F_4 D22 RB500V-40D22 RB500V-40 C749 1U/6.3V_4C749 1U/6.3V_4

V5REF< 1mA

R316 100/F_4R316 100/F_4

D14 RB500V-40D14 RB500V-40 C468 1U/6.3V_4C468 1U/6.3V_4

+3V

VCC3_3 = 0.357A(30mils)

31mA(15mils)

L55 *10uh_8L55 *10uh_8

VCCIO = 3.062A(150mils)

R261 *Short_1206R261 *Short_1206

C441

C441 1u/10V_4

1u/10V_4

R288 *0_4R288 *0_4

R294 *Short_4R294 *Short_4

modify 1026

+1.5V_SUS

+3V_S5

+1.05V

+3V_S5

+5V_S5 +3V_S5

+5V +3V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 5/6

Date: Sheet

5

4

3

2

Date: Sheet

PROJECT :

1

ZYD

3B

12 50Tuesday, April 06, 2010

3B

of

5

IBEX PEAK-M (GND)

D D

U28H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49

AF12 AH49 AF35

AP13 AN34 AF45 AF46 AF49

AG2

AG52

AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47

AJ19 AJ20

AJ22 AJ23 AJ26 AJ28 AJ32 AJ34

AK12

AM41

AN19 AK26 AK22 AK23 AK28

AB5 AB8 AC2

AD7 AE2 AE4

Y13 AU4

AF5 AF8

AH7 AJ2

AT5 AJ4

VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

IbexPeak-M_R1P0

C C

B B

A A

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

4

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC2 BC22 BC32 BC36 BC40 BC44 BC52

BH9 BD48 BD49

BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49

BF51 BG18 BG24

BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

BH7

AF39

3

U28I

AY7

VSS[159]

B11

VSS[160]

B15

VSS[161]

B19

VSS[162]

B23

VSS[163]

B31

VSS[164]

B35

VSS[165]

B39

VSS[166]

B43

VSS[167]

B47

VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179]

BB5

VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205]

BE6

VSS[206]

BE8

VSS[207]

BF3

VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224]

C12

VSS[225]

C50

VSS[226]

D51

VSS[227]

E12

VSS[228]

E16

VSS[229]

E20

VSS[230]

E24

VSS[231]

E30

VSS[232]

E34

VSS[233]

E38

VSS[234]

E42

VSS[235]

E46

VSS[236]

E48

VSS[237]

E6

VSS[238]

E8

VSS[239]

F49

VSS[240]

F5

VSS[241]

G10

VSS[242]

G14

VSS[243]

G18

VSS[244]

G2

VSS[245]

G22

VSS[246]

G32

VSS[247]

G36

VSS[248]

G40

VSS[249]

G44

VSS[250]

G52

VSS[251] VSS[252]

H16

VSS[253]

H20

VSS[254]

H30

VSS[255]

H34

VSS[256]

H38

VSS[257]

H42

VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

2

1

IbexPeak-M_R1P0

Size Document Number Rev

IBEX PEAK-M 6/6

Date: Sheet

5

4

3

2

Date: Sheet

Quanta Computer Inc.

PROJECT :

ZYD

of

13 50Tuesday, April 06, 2010

1

3B

5

M_A_A[15:0]5

D D

M_A_BS#05 M_A_BS#15 M_A_BS#25 M_A_CS#05 M_A_CS#15 M_A_CLK05 M_A_CLK0#5 M_A_CLK15 M_A_CLK1#5 M_A_CKE05 M_A_CKE15 M_A_CAS#5 M_A_RAS#5

R206 10K_4R206 10K_4 R214 10K_4R214 10K_4

C C

B B

M_A_WE#5

CLK_SCLK3,15,28

CLK_SDATA3,15,28

M_A_ODT05 M_A_ODT15

M_A_DM[7:0]5

M_A_DQS[7:0]5

M_A_DQS#[7:0]5

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 CLK_SCLK CLK_SDATA

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

4

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

3

M_A_DQ[63:0] 5

+SMDDR_VREF

VREF_DQ_DIMM07,35

+SMDDR_VREF_DQ035

+SMDDR_VREF

M1

R123 *Short_6R123 *Short_6

DDR3_DRAMRST#15,35

R129 *Short_6R129 *Short_6

M3

R128 *EV@0_6R128 *EV@0_6

+1.5V_SUS

R117

R117 *10K_4

*10K_4

+SMDDR_VREF_DIMM

R118

R118 *10K_4

*10K_4

2

+1.5V_SUS

2.48A

+3V

PM_EXTTS#04

+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM

Modify 1017

C248

C248 470p/X7R_4

470p/X7R_4

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM0_H=4_STD

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

+0.75V_DDR_VTT

DDR3-DIMM0_H=4_STD

Place these Caps near So-Dimm0.

+1.5V_SUS

C350

C302

C302 10u/6.3V_6

10u/6.3V_6

C400

C400 .1u/16V_4

.1u/16V_4

5

C350 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

C332

C316

C316 10u/6.3V_6

10u/6.3V_6

C397

2.2u/6.3V_6

C332 10u/6.3V_6

10u/6.3V_6

C341

C341 10u/6.3V_6

10u/6.3V_6

C301

10u/6.3V_6

A A

+3V

C318

C318 .1u/16V_4

.1u/16V_4

C391

C391 1U/6.3V_4

1U/6.3V_4

C310

C310 .1u/16V_4

.1u/16V_4

C345

C345 .1u/16V_4

.1u/16V_4

C395

C395 1U/6.3V_4

1U/6.3V_4

C306

C306 .1u/16V_4

.1u/16V_4

C321

C321 .1u/16V_4

.1u/16V_4

C393

C393 1U/6.3V_4

1U/6.3V_4

+

C357

C365

330u/2V_7343

.1u/16V_4

C392

C392 1U/6.3V_4

1U/6.3V_4

+SMDDR_VREF_DIMM

C366

2.2u/6.3V_6

C389

10u/6.3V_6

4

+SMDDR_VREF_DQ0

C245

.1u/16V_4

C388

10u/6.3V_6

2.2u/6.3V_6

C386

10u/6.3V_6

C247

For Arrandale only designs--->Only method M1 should be enabled. For Clarksfield only designs--->Both M1 AND M3 methods should be enabled simultaneously For Common Motherboard designs--->Both M1 AND M3 methods should be enabled simultaneously.

M1:PWR SMDRR_VREF

M1+:voltage divider(Default)

M3:CPU VREF_DQ_DIMM0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-0

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

1

ZYD

3B

14 50Tuesday, April 06, 2010

5

4

3

2

1

JDIM2A

M_B_A[15:0]5

D D

M_B_BS#05 M_B_BS#15 M_B_BS#25 M_B_CS#05 M_B_CS#15 M_B_CLK05 M_B_CLK0#5 M_B_CLK15 M_B_CLK1#5 M_B_CKE05 M_B_CKE15 M_B_CAS#5 M_B_RAS#5

R196 10K_4R196 10K_4 R199 10K_4R199 10K_4

+3V

C C

B B

M_B_WE#5

CLK_SCLK3,14,28

CLK_SDATA3,14,28

M_B_ODT05 M_B_ODT15

M_B_DM[7:0]5

M_B_DQS[7:0]5

M_B_DQS#[7:0]5

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3-DIMM1_H=8_STD

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

PC2100 DDR3 SDRAM SO-DIMM

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQ[63:0] 5

M1

+SMDDR_VREF_DIMM

M3

2.48A

PM_EXTTS#14

DDR3_DRAMRST#14,35

+SMDDR_VREF_DQ135 VREF_DQ_DIMM17,35

R114 *Short_6R114 *Short_6 R122 *EV@0_6R122 *EV@0_6

Modify 1017

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

+1.5V_SUS

+3V

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8_STD

(204P)

PC2100 DDR3 SDRAM SO-DIMM

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

+1.5V_SUS

C351

C351 10u/6.3V_6

10u/6.3V_6

+3V

A A

Place these Caps near So-Dimm1.

C346

C346 10u/6.3V_6

10u/6.3V_6

C401

2.2u/6.3V_6

C299

C299 10u/6.3V_6

10u/6.3V_6

C311

C311 10u/6.3V_6

10u/6.3V_6

C398

C398 .1u/16V_4

.1u/16V_4

C356

C356 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

5

C330

C330 10u/6.3V_6

10u/6.3V_6

C396

C396 1U/6.3V_4

1U/6.3V_4

C319

C319 .1u/16V_4

.1u/16V_4

C347

C347 .1u/16V_4

.1u/16V_4

C307

C307 .1u/16V_4

.1u/16V_4

C383

C383 1U/6.3V_4

1U/6.3V_4

C340

C340 .1u/16V_4

.1u/16V_4

C349

C349 .1u/16V_4

.1u/16V_4

C394

C394 1U/6.3V_4

1U/6.3V_4

+SMDDR_VREF_DIMM

+

C331

C331 330u/2V_7343

330u/2V_7343

C382

C382 1U/6.3V_4

1U/6.3V_4

C364

.1u/16V_4

10u/6.3V_6

4

C384

C362

.1u/16V_4

2.2u/6.3V_6

C390

10u/6.3V_6

+SMDDR_VREF_DQ1

C244

C246

2.2u/6.3V_6

C387

C387 10u/6.3V_6

10u/6.3V_6

For Arrandale only designs--->Only method M1 should be enabled. For Clarksfield only designs--->Both M1 AND M3 methods should be enabled simultaneously For Common Motherboard designs--->Both M1 AND M3 methods should be enabled simultaneously.

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-1

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZYD

3B

15 50Tuesday, April 06, 2010

1