Acer Predator PH517-61 Schematic

5

4

3

2

1

ZGX System Block Diagram

1 of 2/CH (xR-0) : SR(2667), DR(2400-2667) MT/s
2 of 2/CH (1R-1R) : 2133-2400 MT/s
2 of 2/CH (2R-xR) : 1866-2133 MT/s

X'TAL
48MHz

X'TAL

32.768 kHz

CHA

Memory

CHB

USB

Azalia

HDA

USB

AMD Promontory

SATA

X'TAL
25MHz

AMD APU

Raven Ridge
17H(10h-1Fh)

Summit Ridge
17H(00h-0Fh)

Pinnacle Ridge

P2,3,4,5,6,7,8

PCIe (GPP)
/SATA

AM4 Socketu
BGA-1331

PCIe(HUB)

PCIe x4 (GEN3)

PROM 2/4

(400 series)

SATA Express

P13,14,15

uBGA-583

PEG *16 (Summit)
PEG *8 (Raven)

PEG

CLK

RTC

SPI

LPC

SPI

SATA Express(GEN3) 0~1

PCIe

BATT

P7

GPP(GEN3) 0~3
SATA(GEN3) 1

PCIe (GEN2) -0

CIe (GEN2) -1

P

USB2 - 2

AMD GPU

X'TAL
100 MHz

M.2
SSD-2

LAN

Killer E2500

X'TAL
25 MHz

M.2
WLAN+BT w/ Debug

Vega 10
Vega 11

P16,17,18,19,20

SPI ROM 512K

P18

3.3 V

SPI ROM 16MB

P6

1.8 V

PCIE Re-driver *2

PS8559BQFN40GTR

PCIE CLK Re-driver

PI6CEQ20200LIEX

SPI ROM 128 KB

3.3 V P41

P29

P33

P30

DP

X'TAL
27 MHz

P28

P28

EC

IT8987E/BX

RJ45 Con.

DPA

DPB

DPC

DPD

USB2 - 5
USB3.1 (GEN2) - 0

DPE

USB2 - 0
USB3.1 (GEN2) - 1

M.2
SSD-1

P41

P33

P28

eDP Re-driver

TUSB546

Type-C MUX
+Re-driver

TUSB1046

Type-C MUX
+Re-driver

TUSB1046

MCU

ENE 6K5130

PWM IC for LED

P2501NHC0

P37

P37

P23

P27

P27

PS/2
I2C-0

HDMI 2.0 Con.

DP Con.

eDP Con.

Type-C Con.

With PD+DP

USB TYPE-C PD

CYPRESS CCG4
CYPD4225-40LQXIT

Type-C Con.

With PD+DP

Daughter Board

Power LED
Battery LED
HDD LED

Thermal Seneor

CPU/GPU FAN
(PWM)

Plastic KB

Touch Pad
Con.

Daughter Board

Macro Key
(LED)

BASE B/L

Daughter Board

Power Button
(LED)
HALL Seneor

KBL

SUB@ SubWoofer
*Tobii@ Tobii

P21

P22

P24

P26,27

P25

P26,27

P40

P36

P36

P38

P39

P37

P37

P40

P37

P-KB@ Plastic Keyboard

*M-KB@ Metal Keyboard

Macro@ Macro Key

*XBOX@ XBOX

*LVPECL@ LVPECL XTAL
SP@ Special part
SR@ Summit
EV@ GPU
TYPE-C@ Type C solution

*ID2@ BASE KBL
*P_BAT@ Battery onnector
*HDT@ AMD Debug
*DBG@ Debug CARD
*PCIE@ PCIE SSD
*SATA@ SATA SSD

*UHD@ Battery Vin boost

N-UHD@ nun-Battery Vin boost

*CLKR@ CLK redriver

N-CLKR@ non-CLK redriver
DS@ HDD Device Sleep
*NDS@ non-HDD Device Sleep

Power source

BQ24780S

Batery Charger

TPS51225R

3V/5V/+3V_GFX

G5335QT2U

+1.05V_PCH_S5

AOZ2263QI-18

+VDDP_S5

RT8231B

DDR4_+1.2VSUS

MP2853GU (6+2)

VCORE

G5335QT2U

+1.8V_S5

TPS61087

+12V_FAN

P42

P43

P44

P45

P46

P47,48

P49

P50

TPS61087

+12V_PANEL

NCP81022

+VGPU_CORE

NCP302045

+VDD_GFX

G5335QT2U

+VDDCI_GFX

G5335QT2U

+0.8V_GFX

AOZ1331DI

+1.8V_GFX & Thermal

M5671RE1U

+VPP_GFX & PCC

D D

DDR4 SO-DIMM

RVS

DDR4 SO-DIMM

STD

DDR4 SO-DIMM

RVS

DDR4 SO-DIMM

RVS

Daughter Board

USB3.0 redriver
Headphone AMP
USB3 Con. *2
HP Con. *1
MIC Con. *1

PTN36002
SV3H715+SV3S700A

C C

FFC

I/O Board Con.

P40

XBOX

Channel A0

P9

Channel A1

P10

Channel B0

P11

Channel B1

P12

USB2 - 0
USB3.0 (GEN1) - 0

USB2 - 1
USB3.0 (GEN1) - 1

USB2 - 2

(BT)

USB2 - 3

P36

AUDIO CODEC

SubWoofer

P32

ALC1006

DMIC

P24

USB3 Con.

B B

HDD (cable tpye)

A A

ALC299

P35

P34

P31

(Type-C)

(Type-C)

USB Charger

TPS2544RTER

Metal Keyboard

CCD

Tobii

PS8527B

P35

P38

P24

P36

P34

USB2 - 5
USB3.1 (GEN2) - 0

USB2 - 0
USB3.1 (GEN2) - 1

USB2 - 10

USB3.0 (GEN1) - 0

USB2 - 1

USB2 - 2

USB2 - 3

SATA (GEN3) - 0SATA Re-driver

01

P51

P52,53,54

P55

P56

P57

P58

P59

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZGX

PROJECT :

ZGX

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Block Diagram

Block Diagram

Block Diagram

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

5

4

3

2

Tuesday, June 26, 2018

1

ZGX

1 59

1 59

1 59

1A

1A

1A

5

4

3

2

1

(CPU)

P_HUB_RXP0[13]
P_HUB_RXN0[13]

P_HUB_RXP1[13]

D D

FCH

M.2 SSD1

C C

GFX (RR)

GFX (SR)

B B

A A

5

P_HUB_RXN1[13]

P_HUB_RXP2[13]
P_HUB_RXN2[13]

P_HUB_RXP3[13]
P_HUB_RXN3[13]

PCIE_SSD_RXP0[28]
PCIE_SSD_RXN0[28]

PCIE_SSD_RXP1[28]
PCIE_SSD_RXN1[28]

PCIE_SSD_RXP2[28]
PCIE_SSD_RXN2[28]

PCIE_SSD_RXP3[28]
PCIE_SSD_RXN3[28]

GFX_PEG_RXP0[16]
GFX_PEG_RXN0[16]

GFX_PEG_RXP1[16]
GFX_PEG_RXN1[16]

GFX_PEG_RXP2[16]
GFX_PEG_RXN2[16]

GFX_PEG_RXP3[16]
GFX_PEG_RXN3[16]

GFX_PEG_RXP4[16]
GFX_PEG_RXN4[16]

GFX_PEG_RXP5[16]
GFX_PEG_RXN5[16]

GFX_PEG_RXP6[16]
GFX_PEG_RXN6[16]

GFX_PEG_RXP7[16]
GFX_PEG_RXN7[16]

GFX_PEG_RXP8[16]
GFX_PEG_RXN8[16]

GFX_PEG_RXP9[16]
GFX_PEG_RXN9[16]

GFX_PEG_RXP10[16]
GFX_PEG_RXN10[16]

GFX_PEG_RXP11[16]
GFX_PEG_RXN11[16]

GFX_PEG_RXP12[16]
GFX_PEG_RXN12[16]

GFX_PEG_RXP13[16]
GFX_PEG_RXN13[16]

GFX_PEG_RXP14[16]
GFX_PEG_RXN14[16]

GFX_PEG_RXP15[16]
GFX_PEG_RXN15[16]

U28B

AE8

P_HUB_RXP0

AD8

P_HUB_RXN0

AB8

P_HUB_RXP1

AA8

P_HUB_RXN1

Y6

P_HUB_RXP2

Y7

P_HUB_RXN2

W4

P_HUB_RXP3

W5

P_HUB_RXN3

AR9

P_GPP_RXP0

AT9

P_GPP_RXN0

AM9

P_GPP_RXP1

AM10

P_GPP_RXN1

AR10

P_GPP_RXP2/SATA_RX0P

AP10

P_GPP_RXN2/SATA_RX0N

AP11

P_GPP_RXP3/SATA_RX1P

AN11

P_GPP_RXN3/SATA_RX1N

F6

P_GFX_RXP0

F5

P_GFX_RXN0

G5

P_GFX_RXP1

G4

P_GFX_RXN1

H7

P_GFX_RXP2

H6

P_GFX_RXN2

J6

P_GFX_RXP3

J5

P_GFX_RXN3

K8

P_GFX_RXP4

K7

P_GFX_RXN4

K5

P_GFX_RXP5

K4

P_GFX_RXN5

L7

P_GFX_RXP6

L6

P_GFX_RXN6

M6

P_GFX_RXP7

M5

P_GFX_RXN7

N8

P_GFX_RXP8

N7

P_GFX_RXN8

N5

P_GFX_RXP9

N4

P_GFX_RXN9

P7

P_GFX_RXP10

P6

P_GFX_RXN10

R6

P_GFX_RXP11

R5

P_GFX_RXN11

T8

P_GFX_RXP12

T7

P_GFX_RXN12

T4

P_GFX_RXP13

T5

P_GFX_RXN13

U7

P_GFX_RXP14

U6

P_GFX_RXN14

V6

P_GFX_RXP15

V5

P_GFX_RXN15

W8

P_ZVDDP

AV7

SATA_ZVDDP

APU_AM4_SOCKET_1331P

4

T0 only

T0 only

PCIE

P_GPP_TXP2/SATA_TX0P

P_GPP_TXN2/SATA_TX0N

P_GPP_TXP3/SATA_TX1P

P_GPP_TXN3/SATA_TX1N

T0 only
T2 only
T2 only

AM4 REV 0.95

PART 2 OF 12

T0 only

P_HUB_TXP0
P_HUB_TXN0

P_HUB_TXP1
P_HUB_TXN1

P_HUB_TXP2
P_HUB_TXN2

P_HUB_TXP3
P_HUB_TXN3

P_GPP_TXP0
P_GPP_TXN0

P_GPP_TXP1
P_GPP_TXN1

P_GFX_TXP0
P_GFX_TXN0

P_GFX_TXP1
P_GFX_TXN1

P_GFX_TXP2
P_GFX_TXN2

P_GFX_TXP3
P_GFX_TXN3

P_GFX_TXP4
P_GFX_TXN4

P_GFX_TXP5
P_GFX_TXN5

P_GFX_TXP6
P_GFX_TXN6

P_GFX_TXP7
P_GFX_TXN7

P_GFX_TXP8
P_GFX_TXN8

P_GFX_TXP9
P_GFX_TXN9

P_GFX_TXP10
P_GFX_TXN10

P_GFX_TXP11
P_GFX_TXN11

P_GFX_TXP12
P_GFX_TXN12

P_GFX_TXP13
P_GFX_TXN13

P_GFX_TXP14
P_GFX_TXN14

P_GFX_TXP15
P_GFX_TXN15

P_ZVSS
P0A_ZVSS
P0B_ZVSS

SATA_ZVSS

P_HUB_TXP0_C

AE4

P_HUB_TXN0_C

AE5

P_HUB_TXP1_C

AA5

P_HUB_TXN1_C

AB5

P_HUB_TXP2_C

AC6

P_HUB_TXN2_C

AC7

P_HUB_TXP3_C

AD5

P_HUB_TXN3_C

AD6

AT12
AR12

AP13
AR13

AL13
AM13

AN14
AP14

GFX_PEG_TXP0_C

D1

GFX_PEG_TXN0_C

E1

GFX_PEG_TXP1_C

E3

GFX_PEG_TXN1_C

F3

GFX_PEG_TXP2_C

F2

GFX_PEG_TXN2_C

G2

GFX_PEG_TXP3_C

G1

GFX_PEG_TXN3_C

H1

GFX_PEG_TXP4_C

H3

GFX_PEG_TXN4_C

J3

GFX_PEG_TXP5_C

J2

GFX_PEG_TXN5_C

K2

GFX_PEG_TXP6_C

K1

GFX_PEG_TXN6_C

L1

GFX_PEG_TXP7_C

L3

GFX_PEG_TXN7_C

M3

GFX_PEG_TXP8_C

M2

GFX_PEG_TXN8_C

N2

GFX_PEG_TXP9_C

N1

GFX_PEG_TXN9_C

P1

GFX_PEG_TXP10_C

P3

GFX_PEG_TXN10_C

R3

GFX_PEG_TXP11_C

R2

GFX_PEG_TXN11_C

T2

GFX_PEG_TXP12_C

T1

GFX_PEG_TXN12_C

U1

GFX_PEG_TXP13_C

U3

GFX_PEG_TXN13_C

V3

GFX_PEG_TXP14_C

V2

GFX_PEG_TXN14_C

W2

GFX_PEG_TXP15_C

W1

GFX_PEG_TXN15_C

Y1

W7

P0A_ZVSS

V8

P0B_ZVSS

AT8
AV6

3

C112 0.22U/10V_4
C113 0.22U/10V_4

C106 0.22U/10V_4
C107 0.22U/10V_4

C109 0.22U/10V_4
C108 0.22U/10V_4

C111 0.22U/10V_4
C110 0.22U/10V_4

C865 EV@0.22u/10V_4
C866 EV@0.22u/10V_4

C855 EV@0.22u/10V_4
C863 EV@0.22u/10V_4

C871 EV@0.22u/10V_4
C877 EV@0.22u/10V_4

C851 EV@0.22u/10V_4
C859 EV@0.22u/10V_4

C868 EV@0.22u/10V_4
C873 EV@0.22u/10V_4

C862 EV@0.22u/10V_4
C867 EV@0.22u/10V_4

C838 EV@0.22u/10V_4
C842 EV@0.22u/10V_4

C852 EV@0.22u/10V_4
C860 EV@0.22u/10V_4

C833 EV@0.22u/10V_4
C836 EV@0.22u/10V_4

C832 EV@0.22u/10V_4
C835 EV@0.22u/10V_4

C834 EV@0.22u/10V_4
C840 EV@0.22u/10V_4

C837 EV@0.22u/10V_4
C841 EV@0.22u/10V_4

C856 EV@0.22u/10V_4
C849 EV@0.22u/10V_4

C850 EV@0.22u/10V_4
C857 EV@0.22u/10V_4

C853 EV@0.22u/10V_4
C861 EV@0.22u/10V_4

C847 EV@0.22u/10V_4
C854 EV@0.22u/10V_4

R61 *200_1%_4
R106 *20 0_1%_4

P_HUB_TXP0 [13]
P_HUB_TXN0 [13]

P_HUB_TXP1 [13]
P_HUB_TXN1 [13]

P_HUB_TXP2 [13]
P_HUB_TXN2 [13]

P_HUB_TXP3 [13]
P_HUB_TXN3 [13]

PCIE_SSD_TXP0 [28]
PCIE_SSD_TXN0 [28]

PCIE_SSD_TXP1 [28]
PCIE_SSD_TXN1 [28]

PCIE_SSD_TXP2 [28]
PCIE_SSD_TXN2 [28]

PCIE_SSD_TXP3 [28]
PCIE_SSD_TXN3 [28]

GFX_PEG_TXP0 [16]
GFX_PEG_TXN0 [16]

GFX_PEG_TXP1 [16]
GFX_PEG_TXN1 [16]

GFX_PEG_TXP2 [16]
GFX_PEG_TXN2 [16]

GFX_PEG_TXP3 [16]
GFX_PEG_TXN3 [16]

GFX_PEG_TXP4 [16]
GFX_PEG_TXN4 [16]

GFX_PEG_TXP5 [16]
GFX_PEG_TXN5 [16]

GFX_PEG_TXP6 [16]
GFX_PEG_TXN6 [16]

GFX_PEG_TXP7 [16]
GFX_PEG_TXN7 [16]

GFX_PEG_TXP8 [16]
GFX_PEG_TXN8 [16]

GFX_PEG_TXP9 [16]
GFX_PEG_TXN9 [16]

GFX_PEG_TXP10 [16]
GFX_PEG_TXN10 [16]

GFX_PEG_TXP11 [16]
GFX_PEG_TXN11 [16]

GFX_PEG_TXP12 [16]
GFX_PEG_TXN12 [16]

GFX_PEG_TXP13 [16]
GFX_PEG_TXN13 [16]

GFX_PEG_TXP14 [16]
GFX_PEG_TXN14 [16]

GFX_PEG_TXP15 [16]
GFX_PEG_TXN15 [16]

gnd voids undermeath

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

FCH

M.2 SSD1

GFX (RR)

GFX (SR)

Tuesday, June 26, 2018

Tuesday, June 26, 2018

Tuesday, June 26, 2018

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

AM4 PCIE

AM4 PCIE

AM4 PCIE

1

ZGX

ZGX

ZGX

02

2 59

2 59

2 59

1A

1A

1A

5

4

3

2

1

(CPU)

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5

D D

M_A_ACT#[9,10]
M_A_BG0[9,10]
M_A_BG1[9,10]

M_A_BANK0[9,10]
M_A_BANK1[9,10]

M_A_DM[8:0][9,10] M_B_DM[ 8:0][11, 12]

M_A_DQS0[9,10]
M_A_DQS#0[9,10]

C C

CH A0

CH A1

CH A0

B B

CH A1

CH A0

CH A1

CH A0

CH A1

M_A_DQS1[9,10]
M_A_DQS#1[9,10]
M_A_DQS2[9,10]
M_A_DQS#2[9,10]
M_A_DQS3[9,10]
M_A_DQS#3[9,10]
M_A_DQS4[9,10]
M_A_DQS#4[9,10]
M_A_DQS5[9,10]
M_A_DQS#5[9,10]
M_A_DQS6[9,10]
M_A_DQS#6[9,10]
M_A_DQS7[9,10]
M_A_DQS#7[9,10]
M_A_DQS8[9,10]
M_A_DQS#8[9,10]

M_A0_CLK0[9]
M_A0_CLK0#[9]
M_A0_CLK1[9]
M_A0_CLK1#[9]
M_A1_CLK0[10]
M_A1_CLK0#[10]
M_A1_CLK1[10]
M_A1_CLK1#[10]

M_A_RST#[9,10]

M_A_EVENT#[9,10] M_B_EVENT#[11,12]

M_A0_CKE0[9]
M_A0_CKE1[9]
M_A1_CKE0[10]
M_A1_CKE1[10]

M_A0_ODT0[9]
M_A0_ODT1[9]
M_A1_ODT0[10]
M_A1_ODT1[10]

M_A0_CS#0[9]
M_A0_CS#1[9]
M_A1_CS#0[1 0]
M_A1_CS#1[1 0]

M_A_RAS#[9,10]
M_A_CAS#[9,10]
M_A_WE#[9,1 0]

M_A_ALERT#[9,10]
M_A_PARITY[9 ,10]

M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DM8 M_B_DM8

U28A

AA32

MA_ADD0

T32

MA_ADD1

T35

MA_ADD2

T31

MA_ADD3

R30

MA_ADD4

R33

MA_ADD5

R32

MA_ADD6

P34

MA_ADD7

P30

MA_ADD8

P31

MA_ADD9

AA36

MA_ADD10

P33

MA_ADD11

N35

MA_ADD12

AE32

MA_ADD13

M35

MA_ACT_L

N31

MA_BG0

N32

MA_BG1

AA35

MA_BANK0

AA33

MA_BANK1

K19

MA_DM0

J23

MA_DM1

G26

MA_DM2

H30

MA_DM3

AJ31

MA_DM4

AM31

MA_DM5

AL29

MA_DM6

AL26

MA_DM7

G34

MA_DM8

H19

MA_DQS_H0

G19

MA_DQS_L0

F23

MA_DQS_H1

G23

MA_DQS_L1

F27

MA_DQS_H2

F26

MA_DQS_L2

F30

MA_DQS_H3

E30

MA_DQS_L3

AJ33

MA_DQS_H4

AJ34

MA_DQS_L4

AN32

MA_DQS_H5

AN33

MA_DQS_L5

AP29

MA_DQS_H6

AN29

MA_DQS_L6

AP26

MA_DQS_H7

AN26

MA_DQS_L7

H34

MA_DQS_H8

H33

MA_DQS_L8

T34

MA_CLK_H0

U34

MA_CLK_L0

U33

MA_CLK_H1

V33

MA_CLK_L1

V35

MA_CLK_H2

V36

MA_CLK_L2

V32

MA_CLK_H3

W32

MA_CLK_L3

L33

MA_RESET_L

W35

MA_EVENT_L

M32

MA0_CKE0

M30

MA0_CKE1

M33

MA1_CKE0

L34

MA1_CKE1

AD35

MA0_ODT0

AF31

MA0_ODT1

AD33

MA1_ODT0

AF34

MA1_ODT1

AC33

MA0_CS_L0

AE35

MA0_CS_L1

AC34

MA1_CS_L0

AE34

MA1_CS_L1

AF33

MA_ADD_17

AB34

MA_RAS_L_ADD16

AD32

MA_CAS_L_ADD15

AB35

MA_WE_L_ADD14

N34

MA_ALERT_L

Y33

MA_PAROUT

APU_AM4_SOCKET_1331P

MEMORY A

AM4 REV 0.95

PART 1 OF 12

T0 only

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7

MA_DATA8

MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15

MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23

MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31

MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39

MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47

MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55

MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

MA_CHECK0
MA_CHECK1
MA_CHECK2
MA_CHECK3
MA_CHECK4
MA_CHECK5
MA_CHECK6
MA_CHECK7

MA_ZVDDIO_MEM_S3

MA_ZVSS

M_A_DQ0

E18

M_A_DQ1

J18

M_A_DQ2

J20

M_A_DQ3

H21

M_A_DQ4

H18

M_A_DQ5

F18

M_A_DQ6

G20

M_A_DQ7

F20

M_A_DQ8

H22

M_A_DQ9

G22

M_A_DQ10

E24

M_A_DQ11

J24

M_A_DQ12

F21

M_A_DQ13

J21

M_A_DQ14

H24

M_A_DQ15

F24

M_A_DQ16

J26

M_A_DQ17

J27

M_A_DQ18

G28

M_A_DQ19

H28

M_A_DQ20

H25

M_A_DQ21

G25

M_A_DQ22

E28

M_A_DQ23

H27

M_A_DQ24

F29

M_A_DQ25

J30

M_A_DQ26

H31

M_A_DQ27

F32

M_A_DQ28

J29

M_A_DQ29

G29

M_A_DQ30

E31

M_A_DQ31

G31

M_A_DQ32

AH34

M_A_DQ33

AJ30

M_A_DQ34

AK30

M_A_DQ35

AL34

M_A_DQ36

AH31

M_A_DQ37

AH32

M_A_DQ38

AK33

M_A_DQ39

AK32

M_A_DQ40

AM34

M_A_DQ41

AM33

M_A_DQ42

AP31

M_A_DQ43

AR33

M_A_DQ44

AL32

M_A_DQ45

AL31

M_A_DQ46

AP34

M_A_DQ47

AP32

M_A_DQ48

AR31

M_A_DQ49

AK29

M_A_DQ50

AM28

M_A_DQ51

AL28

M_A_DQ52

AM30

M_A_DQ53

AN30

M_A_DQ54

AP28

M_A_DQ55

AR28

M_A_DQ56

AK27

M_A_DQ57

AK26

M_A_DQ58

AP25

M_A_DQ59

AR25

M_A_DQ60

AN27

M_A_DQ61

AM27

M_A_DQ62

AL25

M_A_DQ63

AM25

MA_CHECK0

F33

MA_CHECK1

G32

MA_CHECK2

K31

MA_CHECK3

K32

MA_CHECK4

E33

MA_CHECK5

E34

MA_CHECK6

J32

MA_CHECK7

J33

Y34

MA_ZVSS_40 MB_ZVSS_40

AJ37

M_A_DQ[63:0] [9,10]M_A_A[13:0][9,10]

DDR_CHECK:
connected signals within
their respective byte grouping

CH B0

CH B1

CH B0

CH B1

CH B0

CH B1

CH B0

CH B1

M_B_A[13:0][11,12]

M_B_ACT#[11,12]
M_B_BG0[11,12]
M_B_BG1[11,12]

M_B_BANK0[11,12]
M_B_BANK1[11,12]

M_B_DQS0[11,12]
M_B_DQS#0[11,12]
M_B_DQS1[11,12]
M_B_DQS#1[11,12]
M_B_DQS2[11,12]
M_B_DQS#2[11,12]
M_B_DQS3[11,12]
M_B_DQS#3[11,12]
M_B_DQS4[11,12]
M_B_DQS#4[11,12]
M_B_DQS5[11,12]
M_B_DQS#5[11,12]
M_B_DQS6[11,12]
M_B_DQS#6[11,12]
M_B_DQS7[11,12]
M_B_DQS#7[11,12]
M_B_DQS8[11,12]
M_B_DQS#8[11,12]

M_B0_CLK0[11]
M_B0_CLK0#[11]
M_B0_CLK1[11]
M_B0_CLK1#[11]
M_B1_CLK0[12]
M_B1_CLK0#[12]
M_B1_CLK1[12]
M_B1_CLK1#[12]

M_B_RST#[11,12]

M_B0_CKE0[11]
M_B0_CKE1[11]
M_B1_CKE0[12]
M_B1_CKE1[12]

M_B0_ODT0[11]
M_B0_ODT1[11]
M_B1_ODT0[12]
M_B1_ODT1[12]

M_B0_CS#0[11]
M_B0_CS#1[11]
M_B1_CS#0[12]
M_B1_CS#1[12]

M_B_RAS#[11,12]
M_B_CAS#[11,12]
M_B_WE#[11,12]

M_B_ALERT#[11,12]
M_B_PARITY[1 1,12]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

U28I

AC36

MB_ADD0

U36

MB_ADD1

U37

MB_ADD2

T38

MB_ADD3

T37

MB_ADD4

R39

MB_ADD5

R36

MB_ADD6

P39

MB_ADD7

R38

MB_ADD8

P36

MB_ADD9

AC39

MB_ADD10

P37

MB_ADD11

N38

MB_ADD12

AG38

MB_ADD13

M38

MB_ACT_L

M36

MB_BG0

M39

MB_BG1

AD38

MB_BANK0

AC37

MB_BANK1

C21

MB_DM0

D26

MB_DM1

A32

MB_DM2

D37

MB_DM3

AL38

MB_DM4

AR39

MB_DM5

AT35

MB_DM6

AW29

MB_DM7

F39

MB_DM8

B22

MB_DQS_H0

A22

MB_DQS_L0

C27

MB_DQS_H1

B27

MB_DQS_L1

C33

MB_DQS_H2

C32

MB_DQS_L2

B37

MB_DQS_H3

A37

MB_DQS_L3

AM37

MB_DQS_H4

AM36

MB_DQS_L4

AT38

MB_DQS_H5

AT39

MB_DQS_L5

AU34

MB_DQS_H6

AV34

MB_DQS_L6

AU28

MB_DQS_H7

AU29

MB_DQS_L7

G38

MB_DQS_H8

G37

MB_DQS_L8

U39

MB_CLK_H0

V39

MB_CLK_L0

V38

MB_CLK_H1

W38

MB_CLK_L1

W37

MB_CLK_H2

Y37

MB_CLK_L2

Y39

MB_CLK_H3

AA39

MB_CLK_L3

K35

MB_RESET_L

AA38

MB_EVENT_L

L37

MB0_CKE0

K37

MB0_CKE1

L39

MB1_CKE0

L36

MB1_CKE1

AF39

MB0_ODT0

AH36

MB0_ODT1

AF37

MB1_ODT0

AH38

MB1_ODT1

AE37

MB0_CS_L0

AG39

MB0_CS_L1

AE38

MB1_CS_L0

AG36

MB1_CS_L1

AH37

MB_ADD_17

AD36

MB_RAS_L_ADD16

AF36

MB_CAS_L_ADD15

AD39

MB_WE_L_ADD14

N37

MB_ALERT_L

AB38

MB_PAROUT

APU_AM4_SOCKET_1331P

MEMORY B

T0 only

AM4 REV 0.95

PART 9 OF 12

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7

MB_DATA8

MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15

MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23

MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31

MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39

MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47

MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55

MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

MB_CHECK0
MB_CHECK1
MB_CHECK2
MB_CHECK3
MB_CHECK4
MB_CHECK5
MB_CHECK6
MB_CHECK7

MB_ZVDDIO_MEM_S3

MB_ZVSS

D20
B21
B24
C24
A20
C20
A23
C23

A26
C26
A29
C29
A25
B25
A28
B28

A31
B31
B34
C35
B30
C30
B33
A34

B36
E36
C39
D38
A35
C36
B38
C38

AK39
AL37
AN36
AN39
AK38
AK36
AM39
AN38

AR36
AR37
AU37
AV37
AP37
AP38
AT36
AU38

AW35
AU35
AW32
AU32
AV36
AW36
AW33
AV33

AW30
AV30
AW27
AW26
AV31
AU31
AV28
AV27

F38
F36
H39
J39
E37
E39
H36
H37

Y36
AJ39

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15

M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23

M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39

M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47

M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55

M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

MB_CHECK0
MB_CHECK1
MB_CHECK2
MB_CHECK3
MB_CHECK4
MB_CHECK5
MB_CHECK6
MB_CHECK7

M_B_DQ[63:0] [1 1,12]

MB_CHECK[7:0] [11,12]MA_CHECK[7:0] [9,10]

DDR_CHECK:
connected signals within
their respective byte grouping

R675 *40.2_1%_4R6 77 *40.2_1%_4

03

A A

5

M_A_RST# M_B_RST#

C963
*0.1u/16V_4

R711
*10_5%_6

4

3

2

C962
*0.1u/16V_4

R710
*10_5%_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

PROJECT :

AM4 MEMORY

AM4 MEMORY

AM4 MEMORY

ZGX

ZGX

ZGX

3 59

3 59

1

3 59

1A

1A

1A

5

4

3

2

1

(CPU)

+1.8V

R151 1K_1%_4
R150 1K_1%_4
R144 300_5%_4
R135 300_5%_4

+3V

R644 1K_1%_4

D D

R112 1K_1%_4
R649 1K_1%_4

C469
*27p/50V_4

APU_PWRGD_SVID_RE G

C474
*27p/50V_4

FOR DEBUG, PLACE THESE CAPS CLOSE TO APU

C C

APU_PWRGD_SVID_RE G[47]

Serial VID

B B

+1.8V

R639
*1K_1%_4

R647
*220_1%_4

APU_PWRGD
APU_RST#

C451
*27p/50V_4

APU_SVT

C939
*27p/50V_4

R643
*1K_1%_4

R629
*220_1%_4

APU_SIC
APU_SID
APU_PWRGD
APU_RST#

APU_ALERT#_C
APU_PROCHOT#_C
THERMTRIP#

+1.8V

R641
*1K_1%_4

R143
*2.2K_5%_4

R142
*220_1%_4

APU_SVT
APU_SVC
APU_SVD

SVT need 0R in power side

R648 10_1%_4
R651 10_1%_4

R139 HD T@0_5%_4

R141 *Short_4

APU_RST#

R137 *Short_4

R628 *Short_4
R107 *Short_4

VID Override table (VDD)

FAN:3VS0

APU_ALERT#[41]

APU_PROCHOT#[41,42,59]

APU_SVC[47]

APU_SVD[47]

APU_SVT[47]

APU_PWRGD_D

3V_S0

VFIX MODE

SVC SVD

0

0
001
1
1 1 0.8V

for normal operation open all switches

Boot Voltage

1.1V

1.0V

0.9V

APU_SVD_R

APU_PWRGD
APU_RST#_C

APU_SIC
APU_SID
APU_ALERT#_C
APU_PROCHOT#_C
THERMTRIP#

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

U28C

B6

DP2_TXP0

B7

DP2_TXN0

A7

DP2_TXP1

A8

DP2_TXN1

C8

DP2_TXP2

C9

DP2_TXN2

B9

DP2_TXP3

B10

DP2_TXN3

D4

DP1_TXP0

D5

DP1_TXN0

D7

DP1_TXP1

D8

DP1_TXN1

F8

DP1_TXP2

G8

DP1_TXN2

E9

DP1_TXP3

F9

DP1_TXN3

D2

DP0_TXP0

C2

DP0_TXN0

C3

DP0_TXP1

B3

DP0_TXN1

B4

DP0_TXP2

A4

DP0_TXN2

C5

DP0_TXP3

C6

DP0_TXN3

D17

SVC

C17

18_S0

SVD

A17

SVT

E16

PWROK

B16

B18
C18
D16
H15
A19

A14
C14
C15
B15
B13
E13
D14

18_S0

RESET_L

SIC

18/33_S0

SID
ALERT_L
PROCHOT_L
THERMTRIP_L

TDI
TDO

18_S5

TCK
TMS
TRST_L

18_S5

DBRDY

18_S0

DBREQ_L

18_S5

APU_AM4_SOCKET_1331P

DISPLAY/SVI2/JTAG/TEST

T0 only
T0 only

18_S0
18_S0
18_S0

18_S0

18_S0

18_S0

18_S0

DP_STEREOSYNC

33_S0

VDDCR_CPU_SENSE
VDDCR_SOC_SENSE

VDDIO_MEM_S3_SENSE

AM4 REV 0.95

PART 3 OF 12

CORETYPE0

TYPE2-L
TYPE3-H

DP_ZVSS

DP_AUX_ZVSS

DP_BLON

DP_DIGON

DP_VARY_BL

DP2_AUXP
DP2_AUXN

DP2_HPD

DP1_AUXP
DP1_AUXN

DP1_HPD

DP0_AUXP
DP0_AUXN

DP0_HPD

TEST4
TEST5

TEST6
TEST47
TEST10
TEST14
TEST15
TEST16
TEST17
TEST11
TEST19
TEST18

TEST28_H

TEST28_L

TEST31
TEST40

AM4R1
CORETYPE0
CORETYPE1

TEST41

VSS_SENSE_A

VDDP_SENSE

VSS_SENSE_B

+1.8V_S5

R146
*1K_1%_4

A1

F12
E12
G13
H13
H12

A10
A11
E10

F11
G11
D10

G10
H10
H9

L23
M22
D13
P28
AB4
C12
B12
C11
D11
A13
H16
G16

E6
E7
AA30
W30
K14

AL8
AM24
AN9

A16

F14
E15
G14
F15

AL22
AM23

+1.8V_S5

A

+3V_S5 3V_LDO

R611
*10K_5%_4

AM4R1

R613 *0_5%_4

TEST4_HERMDA
TEST5_THERMDC
APU_TEST6
APU_TEST47
APU_TEST10
APU_TEST14
APU_TEST15
APU_TEST16
APU_TEST17
APU_TEST11
APU_TEST19
APU_TEST18APU_SVC_R

APU_TEST28_H
APU_TEST28_L
APU_TEST31
APU_TEST40
DP_STEREOSYNC

AM4R1
CORETYPE0
CORETYPE1

APU_TEST41

APU_VSS_SENSE_A

VDDP_SENSE
VSS_SENSE_B

GND

U8
*SN74LVC1G07YZVR

A2

VCC

Y

B2

B1

R122 1K_1%_4

+5V_S5

+3V_S5

2

3

1

Q13
*2N7002K

TP25
TP24
TP95
TP26
TP86
R621 *1K_1%_4
TP94
R614 *1K_1%_4
R619 *1K_1%_4
R625 *1K_1%_4
R552 1K_1%_4
R557 1K_1%_4

TP8
TP5
TP29
TP28

R126 *1K_1%_4
R121 1K_1%_4

TP96

VDDIO_MEM_S3_SENSE [46]

R114 *Short_4
R115 *Short_4

R155

R154

*1K_1%_4

*10K_1%_4

R132
*10K_1%_4

SYS_SHDN# [4,16,36,41,43,58]

+3V_S5

VDDCR_CPU_SENSE [47]
VDDCR_SOC_SENSE [47]

VSS_VDDCR_CPU_SEN SE [47]
VSS_VDDCR_SOC_SENSE [47]
VDDP_SENSE [45]
VSS_SENSE_B [45]

Q18

*AO3402
C549
*180p/50V_4

+1.8V

2

+1.8V_S5

3

1

04

+3V

R128
*10K_1%_4

VDDCR_CPU_PG[41,47]

THERMTRIP#

SMBUS(Internal Thermal sensor)

3ND_MBCLK[37,40,41]

(PU in EC side )

3ND_MBDATA[37,40,41]

+1.8V

1

2

3

Q16
*PJA3413

C560
10u/6.3V_4

R152
0_5%_4

+1.8_S0S5

TYPE2-18_S0
TYPE3-18_S5

R167
*100_1%_4

R130 *100K_1%_4

2

1 3

Q14

METR3904-G

R131
1K_1%_4

SYS_SHDN# [4,16,36,41,43,58]

+1.8V

2

6 1

Q15B PJT138K

Q15A PJT138K

3 4

5

+1.8V

APU_SIC

18/33_S03V_S0

APU_SID

R149 *0_5%_4

CN30

20 21
19

22
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

*HDT@HDT CONN

88511-2001-20p-l

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

PROJECT :

AM4 DISPLAY/MISC

AM4 DISPLAY/MISC

AM4 DISPLAY/MISC

ZGX

ZGX

ZGX

4 59

4 59

1

4 59

1A

1A

1A

C416
HDT@0.1u/16V_4

+1.8V_S5

TP150

APU_TEST18
APU_TEST19
APU_RST_L_BUF
CPU_LDT_RST_HTPA#
HDT_DBREQ#
APU_DBRDY
APU_TCK
APU_TMS
HDT_APU_TDI
HDT_TRST#
APU_TDO
APU_PWROK_BUF

2

HDT(Hardware Debug Tool ) Connector

+1.8V_S5 +1.8V_S5

CN7

4

8
10
12

16
18
20

*HDT@HDT CONN

APU_TCK
APU_TMS
HDT_APU_TDI
APU_TDO
APU_PWROK_BUF
APU_RST_L_BUF
APU_DBRDY
HDT_DBREQ#
APU_TEST19
APU_TEST18

R622 HDT@0_5 %_4

R567 HDT@33_ 1%_4

4

APU_TDI

APU_DBREQ#

C926
*HDT@0.01u/50V_4

R634 HDT@1K_1%_4
R635 HDT@1K_1%_4
R626 HDT@1K_1%_4

R569 HDT@1K_1%_4
R568 HDT@1K_1%_4

R129 HDT@1K_1%_4

C397
HDT@0.01u/50V_4

R554

A A

HDT@1K_1%_4

APU_TRST#

C869
HDT@0.01u/50V_4

R570 HD T@33_1%_4
R560 HD T@10K_1%_4
R563 HD T@10K_1%_4
R575 HD T@10K_1%_4

HDT_TRST#
DBRDY3
DBRDY2
DBRDY1

1 2
3
5 6
7

9
11
13 14
15
17
19

PLACE HDT CONNECTOR ON BOT

5

+1.8V_S5

U7

APU_RST#

APU_PWRGD_D APU_PWROK_BUF

3

1

2

GND

3

A24Y2

HDT@SN74LVC2G07DCKR

+1.8V_S5

A1

Y1

VCC

6

5

APU_RST_L_BUF

5

(CPU)

SCL0
SDA0
PCIE_REQ_GPU#

I2C_SCL
I2C_SDA
APU_I2C_INT#
DNBSWON#
PCIE_WAKE#
PCIE_RST#
S0A3
ACPRESENT

1 2

PU in STRAPS PINS side

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_BCLK_R
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDOUT_R

SYS_RST#

APU_TEST0

APU_TEST1

APU_TEST2

RSMRST_GATE# from EC

RSMRST#[41]

USB_OC_APU0#[40]

R80 15K_1%_4

R576 15K_1%_4

C364
10u/6.3V_4

D7

1

RB500V-40

R609
10K_1%_4

R591 *10K_1%_4
R604 10K_1%_4
R600 10K_1%_4
R598 1K_1%_4
R587 1K_1%_4
R590 1K_1%_4
R595 1K_1%_4

D D

+3V

R654 2.2K_5%_4
R657 2.2K_5%_4
R653 *10K_1%_4

+3V_S5

R603 2.2K_5%_4
R602 2.2K_5%_4
R92 10K_1%_4
R81 10K_1%_4
R74 10K_1%_4
R70 10K_1%_4
R577 *2.2K_5%_4
R125 *8.2K_5%_4

C C

+3V_S5

R564 *10K_1%_4

J1

*SHORT_PAD

Test mode setting (Follow AMD's suggestion)

+3V_S5

NC,no install by default

R77 *2.2K_5%_4

R79 *1K_1%_4

R580 *2.2K_5%_4

B B

2

2

+1.8V_S5

RSMRST#_R

+3V_S5

3

1

4

R84
22K_1%_4

AMD : 10ms RC-delay

C189
1u/6.3V_4

C188
*0.1u/16V_4

R88
*10_5%_6

R601
10K_1%_4

Q56
2N7002K

3

2

1

05

U28D

AU22

LPC_RST_L

AL7

PCIE_RST_L/EGPIO26

AP5

RSMRST_L

AN5

PWR_BTN_L/AGPIO0

AM3

PWR_GOOD

AM4

SYS_RESET_L/AGPIO1

AL5

WAKE_L/AGPIO2

AT2

SLP_S3_L

AP2

SLP_S5_L

AR3

S0A3_GPIO/AGPIO10/SGPIO0_CLK

AP4

S5_MUX_CTRL/EGPIO42

AM6

TEST0

AM7

TEST1/TMS

AT3

TEST2

AN24

ESPI_RESET_L/KBRST_L

AL2

LPC_PME_L/AGPIO22

AW17

AGPIO86

AN3

AGPIO23/SGPIO0_LOAD

AT23

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

AV24

CLK_REQ1_L/AGPIO115

AT24

CLK_REQ2_L/AGPIO116

AL23

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

AR22

CLK_REQG_L/OSCIN/EGPIO132

AL1

USB_OC0_L/AGPIO16

AM1

USB_OC1_L/TDI/AGPIO17

AR1

USB_OC2_L/TCK/AGPIO18

AP1

USB_OC3_L/TDO/AGPIO24

AW3

AZ_BITCLK

AV3

AZ_SDIN0

AU5

AZ_SDIN1

AV4

AZ_SDIN2

AU1

AZ_RST_L

AU2

AZ_SYNC

AU4

AZ_SDOUT

AP8

RTCCLK

AW5

X32K_X1

AW6

X32K_X2

APU_AM4_SOCKET_1331P

ACPI/SD/AZ/GPIO/RTC/I2C/MISC

33_S5

18_S5

33_S5

33_S5

TMS-33_S5

33_S5

S0

33_S5

USB _ OC
Type 0 active low
Type 2 active high
Type 1/3 programmable

18_S5

33_S0

T0 only (GENINT1)

33_S0

33_S5
33_S5
33_S5
33_S5

AM4 REV 0.95

PART 4 OF 12

33_S5

33_S0

33_S5

S5

33_S0
33_S5

33_S0

33_S0

EGPIO95

S0

EGPIO96

EGPIO97
EGPIO98

S0

EGPIO99

EGPIO100

SCL0/I2C2_SCL/EGPIO113

SDA0/I2C2_SDA/EGPIO114

SCL1/I2C3_SCL/AGPIO19

SDA1/I2C3_SDA/AGPIO20

S5

AGPIO3

S5

AGPIO4

AGPIO5/DEVSLP0

33_S5

S5

AGPIO6

S5

AGPIO9/SGPIO0_DATAOUT

S0

SATA_ACT_L/AGPIO130

AGPIO40/SGPIO0_DATAIN

33_S0

33_S5

AGPIO8

GENINT1_L/AGPIO89
GENINT2_L/AGPIO90

SPKR/AGPIO91

BLINK/AGPIO11

FANIN0/AGPIO84

FANOUT0/AGPIO85

TEST4613

AW11
AV12

AW12
AU13
AV13
AT14

AU25
AV25

AK3
AK2

AT6
AR6
AP22
AN8
AP7
AN2
AV22
AU23
AM22
AR4

AW23

AT5

AN23
AP23

AL4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3

BOARD_ID8

BOARD_ID9
BOARD_ID10

TP98
TP97

SSD1_LED#_CPU

SPKR [31]

TP30

APU_TEST46

SSD1 Det

SSD SATA I/F --> L
S

SD PCIE I/F --> H

NGFF_DET1 [28]
NGFF_DET2_CPU [29]

SCL0 [9,10,11,12]
SDA0 [9,10,11,12]

I2C_SCL [39]
I2C_SDA [39]

AGPIO3 [6]

R145 NDS@10 K_1%_4

DEVSLP_GATE# [28,29,34]

R124 *Short_4

R1014 *0_5%_4

R1015 0_5%_4

SSD1_RST# [28]

TP11

DEVSLP_SSD1 [28]

+3V

SSD1_LED# [28,40]

APU_I2C_INT# [39]

PCIE_WAKE#[13,16,30,33]

PCIE_REQ_GPU#[16]

ACZ_BCLK[31]

ACZ_SDIN0[31]

ACZ_RST#[31]
ACZ_SYNC[31]
ACZ_SDOUT[31]

C938 150p/50V_4

C120 150p/50V_4

DNBSWON#[41]

SUSB#[41]

SUSC#[41]

SUS_CLK[30]
RTC_CLK[6]

C892

15p/50V_4

C896

15p/50V_4

PLTRST#[30,41]
PCIERST#[13,16,28,29,30,33,36]

PCIE_CLKREQ_SSD1#[28]
DGPU_RST_L[16]
APU_CLKREQN[13]

R650 33_1%_4
R66 33_1%_4

C153 *100p/50V_4
R581 *Short_4
R574 *Short_4

SIO_RCIN#[41]

SIO_EXT_SCI#[41]

PM_SMI#_C[13]

ACPRESENT[41]

R597 22_1%_4

R585 22_1%_4
R588 22_1%_4
R594 22_1%_4

R104 *0_5%_4R76 15K_1%_4

12

Y4

32.768KHZ/20ppm

AMD CL maximum ESR of the XTAL is 65 kΩ
TXC:BG332768111 20PPM (ESR 70kΩ)Metal shell
NDK:BG332768108 20PPM (ESR 70kΩ)Metal shell
SEIKO:BG632768006 20PPM (ESR 70kΩ)Metal shell
**SEG:BG332768453 20PPM (ESR 70kΩ)Glass shell

LPC_RST#_R
PCIE_RST#

RSMRST#_R

SYS_PWRGD
SYS_RST#

SUSB#_C
SUSC#_C

S0A3

BOARD_ID4

APU_TEST0
APU_TEST1
APU_TEST2

TP27

USB_OC_APU0#_C

TP87
TP90
TP89

ACZ_BCLK_R

ACZ_SDIN1

ACZ_SDIN2
ACZ_RST#_R
ACZ_SYNC_R
ACZ_SDOUT_R

32K_X1

32K_X2

R607
20M_5%_4

SYS PWRGD

5

SYS_PWRGD_R

+3V_S5

R558
100K_1%_4

34

Q53A
2N7002KDW

EC_PWROK[41]

SYS_RST#[6,13]

A A

D57 RB500V-40

D58 *RB500V-40

SUSB#

D6 *RB500V-40

5

21

21

21

HWPG[41]

+3V_S5

R555

8.2K_5%_4

R551 *Short_4

C858

0.1u/25V_4

61

2

Q53B
2N7002KDW

4

SYS_PWRGD

C848
*0.1u/16V_4

R547
*10_5%_6

BOARD ID

+3V

R123 10K_1%_4
R116 10K_1%_4
R118 *10K_1%_4
R610 10K_1%_4
R615 *10K_1%_4
R120 *10K_1%_4

+3V_S5

R589 *10K_1%_4
R99 *10K_1%_4
R109 *10K_1%_4
R97 *10K_1%_4

3

BOARD_ID0[24]
BOARD_ID1[24]

BOARD_ID3[24]
BOARD_ID5[6]
BOARD_ID6[6]

BOARD_ID0

R119 *10K_1%_4

BOARD_ID1

R113 *10K_1%_4

BOARD_ID2

R117 10K_1%_4

BOARD_ID3

R608 *10K_1%_4

BOARD_ID5

R616 10K_1%_4

BOARD_ID6

R612 10K_1%_4

BOARD_ID4

R582 10K_1%_4

BOARD_ID8

R91 10K_1%_4

BOARD_ID9

R108 10K_1%_4

BOARD_ID10

R98 10K_1%_4

2

GPIO

BOARD_ID0

BOARD_ID1

BOARD_ID2

BOARD_ID3

BOARD_ID4

BOARD_ID5

Normal,DD,Freesync

Reserve Reserve

nun-OD Panel OD Panel

Reserve Reserve

Reserve Reserve (Default)

BOARD_ID6

NA

BOARD_ID8

BOARD_ID9

BOARD_ID10

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Reserve Reserve

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

AM4 ACPI/AZ/SD/I2C/GPIO/FC

AM4 ACPI/AZ/SD/I2C/GPIO/FC

AM4 ACPI/AZ/SD/I2C/GPIO/FC

Tuesday, June 26, 2018

Tuesday, June 26, 2018

Tuesday, June 26, 2018

1

LowHigh

Reserve,DDNVSR,Normal,Freesync

Reserve,NVSR

(Default)

(Default)

ReserveReserve (Default)

NANA

ReserveReserve (Default)

ReserveReserve (Default)

(Default)

ZGX

ZGX

ZGX

5 59

5 59

5 59

1A

1A

1A

AMD read EDID data to get its device ID and manufacture code via AUX channel.(NO NVSR)

5

(CPU)

D D

GFX_PEG_CLKP[16]
GFX_PEG_CLKN[16]

CLK_PCIE_SSDP[28]
CLK_PCIE_SSDN[28]

CLK_PCIE_HUBP[14]
CLK_PCIE_HUBN[14]

C C

B B

C872 2.2p/50V_4

TXC:BG648000021 15PPM
HHE:BG648000026 15PPM

C864 2.2p/50V_4 TP84

CLK_PCI_EC[41]

CLK_LPC_DEBUG[30]

R57 *Short_4

R49 *CLKR@49.9_1%_4
R54 *CLKR@49.9_1%_4

R62 *Short_4
R53 *Short_4

R60 *Short_4
R59 *Short_4

TP85

1

2

Y2
48MHZ/15ppm

4

3

all XTAL need add TP2650 for ICT test
test pad must place in Bottom side

R638 22_1%_4
R627 22_1%_4

LPC_LAD0[30,41]
LPC_LAD1[30,41]
LPC_LAD2[30,41]
LPC_LAD3[30,41]

LPC_LFRAME#[30,41]

BOARD_ID6[5]

SERIRQ[41]

CLKRUN#[41]

BOARD_ID5[5]

GFX_PEG_CLKP_C
GFX_PEG_CLKN_C

CLK_PCIE_SSDP_C
CLK_PCIE_SSDN_C

CLK_PCIE_HUBP_C
CLK_PCIE_HUBN_C

48M_X1

R559
1M_1%_4

48M_X2

LPCCLK0
LPCCLK1

TP93

SPI_CLK
SPI_CS#

TP91

SPI_SO
SPI_SI
SPI_WP
SPI_HOLD#

TP92

4

U28E

AF6

GFX_CLK P

AF7

GFX_CLK N

AG5

GPP_CLK 0P

AG6

GPP_CLK 0N

AH4

GPP_CLK 1P

AH5

GPP_CLK 1N

AH7

GPP_CLK 2P

AH8

GPP_CLK 2N

AJ6

GPP_CLK 3P

AJ7

GPP_CLK 3N

AJ1

X48M_X1

AH1

X48M_X2

AU20

LPCCLK0 /EGPIO74

AU19

LPCCLK1 /EGPIO75

AW2 0

LAD0/EGP IO104

AV21

LAD1/EGP IO105

AT21

LAD2/EGP IO106

AT20

LAD3/EGP IO107

AW1 8

LFRAME_ L/EGPIO109

AT15

ESPI_ALER T_L/LDRQ0_L/EGP IO108

AW2 1

SERIRQ/AGPIO8 7

AV19

LPC_CLK RUN_L/AGPIO88

AV18

LPC_PD_ L/AGPIO21

AT18

EGPIO70

AW1 4

AT17
AW1 5
AU14
AU16

AV16

AV15
AU17

S0

SPI_CLK/ES PI_CLK
SPI_CS1_L /EGPIO118
SPI_CS2_L /ESPI_CS_L/EGPIO119
SPI_DI/ESPI_DAT 1
SPI_DO/ESP I_DAT0
SPI_WP _L/ESPI_DAT2/EGP IO122
SPI_HOLD_ L/ESPI_DAT3/EGPIO13 3
SPI_TPM_C S_L/AGPIO76

APU_AM4_SOCKET_1331P

33_S0

33_S0

CLK/USB/SPI/LPC

33_S0
33_S0
33_S0

TYPE2-18_S0
TYPE3-18_S5

AM4 REV 0.95
PART 5 OF 12

18_S5

T0 only

USB_HSD 0P
USB_HSD 0N

USB_HSD 1P
USB_HSD 1N

33_S5

USB_HSD 2P
USB_HSD 2N

USB_HSD 3P
USB_HSD 3N

USB0_ZV SS
USB1_ZV SS
USB2_ZV SS
USB3_ZV SS

T0 only

USB_SS_ ZVSS

T0 only

USB_SS_ ZVDDP

USB_SS_ 0TXP
USB_SS_ 0TXN

USB_SS_ 0RXP
USB_SS_ 0RXN

USB_SS_ 1TXP
USB_SS_ 1TXN

S5

USB_SS_ 1RXP
USB_SS_ 1RXN

USB_SS_ 2TXP
USB_SS_ 2TXN

EGPIO108-18/33_S0

USB_SS_ 2RXP
USB_SS_ 2RXN

USB_SS_ 3TXP
USB_SS_ 3TXN

USB_SS_ 3RXP
USB_SS_ 3RXN

48M_OSC

USB_ZVS S

AR7

AT11

AU7
AU8

AW8
AW9

AU10
AU11

AV9
AV10

AJ3
AN6
AK6
AK5

AJ4
AK8

AF3
AF4

Y3
Y4

AB1
AC1

AA2
AA3

AC3
AC4

AD2
AE2

AG2
AG3

AE1
AF1

3

48M_OSC

R103 *22_1%_4

TP16

2

AM4 USB"3.1" RX need through an 0.33uF AC-coupling capacitor.

USB0_ZVSS
USB1_ZVSS
USB2_ZVSS
USB3_ZVSS

USB2_APU_0P [40]
USB2_APU_0N [40]

USB2_APU_1P [40]
USB2_APU_1N [40]

USB2_APU_2P [30]
USB2_APU_2N [30]

USB2_APU_3P [36]
USB2_APU_3N [36]

R48 *200_1%_4
R87 *200_1%_4
R55 *200_1%_4
R65 *200_1%_4

USB3.0 Port 1 (DB)

USB3.0 Port 2 (DB)

Blue tooth

XBOX

C953 *22p/50V_4

+1.8_S0S5

R695 *Short_4

SPI_CLK

R670 10_5%_4

SPI EMI

SPI_SI

R673 *Short_4

SPI_SO

R671 *Short_4

R692 *10K_1%_4

SPI_WP

R688 *Short_4

SPI_CS_ASPI_CS#
SPI_SCK_A

SPI_SDI_A
SPI_SDO_A

SPI_WP_R

SP@ socket P/N: DG008000011 only for A-TEST
(FP:50960-0084n-001-8p-socket)

B-STAGE need change FP to soic8-7_9-1_27-2_16h

USB3_APU_TXP0 [40]
USB3_APU_TXN0 [40]

USB3_APU_RXP0 [40]

USB3_APU_RXN0 [40]

USB3_APU_TXP1 [40]
USB3_APU_TXN1 [40]

USB3_APU_RXP1 [40]

USB3_APU_RXN1 [40]

USB3.0 Port 1 (DB)

USB3.0 Port 2 (DB)

BIOS ROM(16MB)

+1.8_S0S5

R694
10K_1%_4

U29

1

TP106
TP99R58 *Short_4
TP102
TP101

TP105

CS

6

CLK

5

DI

2

DO

3

WP

SP@MX25U12835FM2I-10G

BIOS every pin need add TP2675(First)/TP2650 for ICT test
test pad must place in TOP side

VCC

HOLD

GND

8

7

4

1

+1.8_S0S5

TP31

TP100

R674
*10K_1%_4

SPI_HOLD#

06

C954

0.1u/16V_4

Type0 only Type0 only

R105
*10K_1%_4

R102
*2K_1%_4

4

+3V_S5 +3V_S5+3V +3V +3V

R95
*10K_1%_4

R100
*2K_1%_4

STRAPS PINS

R637
*10K_1%_4

LPCCLK0

LPCCLK1

LPC_LFRAME#

RTC_CLK[5]

A A

AGPIO3[5]

SYS_RST#[5,13]

5

SPI_SCK_A

R631
*2K_1%_4

R623
*10K_1%_4

R624
*2K_1%_4

R618
SR@10K_1%_4

R620
*SR@2K_1%_4

R566
10K_1%_4

R565
*2K_1%_4

+1.8_S0S5+3V_S5

R669
10K_1%_4

R672
*2K_1%_4

LPC_CLK0 LFRAME#

BOOT Fail Timer

ENABLE

PU

OOT Fail Timer

B

DISABLE

PD

DEFAULT

3

CZ/ST ONLY ZP ONLY

LPC_CLK1

Use 48Mhz crystal clock
and generate both internal
and external clocks

DEFAULT

Use 100Mhz PCIE clock as
reference clock and generate
internal clocks only

RTC_CLK AGPIO3

Coin battery
is on board.

Coin battery
isn't on board.

Enhanced Reset logic
(for quicker S5 resume) normal reset mode

Default to
traditional reset logic

2

SYS_RST#

SPI ROM

DEFAULTDEFAULT DEFAULT DEFAULT DEFAULT

LPC ROM

short reset mode

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

PROJECT :

AM4 CLK/LPC/SPI/USB

AM4 CLK/LPC/SPI/USB

AM4 CLK/LPC/SPI/USB

SPI CLK(ZP)

Use 48Mhz crystal clock and
generate both internal and
external clocks

Use 100Mhz PCIE clock as
reference clock and generate
internal clocks only

ZGX

ZGX

ZGX

6 59

6 59

6 59

1

1A

1A

1A

5

(CPU)

TOP : Under the CPU

BOT : BOT CAVITY

C919

C914

22u/6.3V_6

22u/6.3V_6

D D

C489
22u/6.3V_6

TOP

C374

C311

22u/6.3V_6

22u/6.3V_6

C470
22u/6.3V_6

BOT

C279

C292

4.7u/6.3V_4

4.7u/6.3V_4

C C

B B

A A

TOP

C240

4.7u/6.3V_4

C276

0.22u/10V_4

C242

4.7u/6.3V_4

C299

0.22u/10V_4

C920
22u/6.3V_6

C476
22u/6.3V_6

C341
22u/6.3V_6

C373
22u/6.3V_6

C291

4.7u/6.3V_4

C238

4.7u/6.3V_4

C435

0.22u/10V_4

C908
22u/6.3V_6

C931
22u/6.3V_6

C409
22u/6.3V_6

C313
22u/6.3V_6

C414

4.7u/6.3V_4

C241

4.7u/6.3V_4

C319

0.22u/10V_4

C922
22u/6.3V_6

C930
22u/6.3V_6

C454
22u/6.3V_6

C312
22u/6.3V_6

C463

4.7u/6.3V_4

C243

4.7u/6.3V_4

C429

4.7u/6.3V_4

C385

0.22u/10V_4

C269

0.22u/10V_4

C915
22u/6.3V_6

C934
22u/6.3V_6

C434
22u/6.3V_6

C342
22u/6.3V_6

C237

4.7u/6.3V_4

C234

4.7u/6.3V_4

C274

4.7u/6.3V_4

C294

0.22u/10V_4

C239

0.22u/10V_4

122

A

VDDCR_CPU VDDCR_NB +1.2VSUS VDDP

C447

C925

22u/6.3V_6

22u/6.3V_6

C911

C907

22u/6.3V_6

22u/6.3V_6

C347

C410

22u/6.3V_6

22u/6.3V_6

C444

C448

22u/6.3V_6

22u/6.3V_6

C446

C244

4.7u/6.3V_4

4.7u/6.3V_4

C248

C254

4.7u/6.3V_4

4.7u/6.3V_4

C456

C280

4.7u/6.3V_4

4.7u/6.3V_4

C267

C281

0.22u/10V_4

0.22u/10V_4

C293

C257

0.22u/10V_4

0.22u/10V_4

C282

C270

180p/50V_4

180p/50V_4

U28L

M7

VDDCR_CPU_1

N3

VDDCR_CPU_2

N6

VDDCR_CPU_3

P2

VDDCR_CPU_4

R7

VDDCR_CPU_5

T3

VDDCR_CPU_6

T6

VDDCR_CPU_7

T9

VDDCR_CPU_8

U2

VDDCR_CPU_9

U10

VDDCR_CPU_10

V9

VDDCR_CPU_11

V11

VDDCR_CPU_12

W3

VDDCR_CPU_13

W6

VDDCR_CPU_14

W10

VDDCR_CPU_15

W12

VDDCR_CPU_16

Y2

VDDCR_CPU_17

Y9

VDDCR_CPU_18

Y11

VDDCR_CPU_19

Y13

VDDCR_CPU_20

AA7

VDDCR_CPU_21

AA10

VDDCR_CPU_22

AA12

VDDCR_CPU_23

AB3

VDDCR_CPU_24

AB6

VDDCR_CPU_25

AB9

VDDCR_CPU_26

AB11

VDDCR_CPU_27

AB13

VDDCR_CPU_28

AC2

VDDCR_CPU_29

AC10

VDDCR_CPU_30

AC12

VDDCR_CPU_31

AD7

VDDCR_CPU_32

AD9

VDDCR_CPU_33

AD11

VDDCR_CPU_34

AD13

VDDCR_CPU_35

AE3

VDDCR_CPU_36

AE6

VDDCR_CPU_37

AE10

VDDCR_CPU_38

AE12

VDDCR_CPU_39

AF2

VDDCR_CPU_40

AF9

VDDCR_CPU_41

AF11

VDDCR_CPU_42

AF13

VDDCR_CPU_43

AG7

VDDCR_CPU_44

AG10

VDDCR_CPU_45

AG12

VDDCR_CPU_46

AG14

VDDCR_CPU_47

AG16

VDDCR_CPU_48

AG18

VDDCR_CPU_49

AG20

VDDCR_CPU_50

AG22

VDDCR_CPU_51

AG24

VDDCR_CPU_52

AG26

VDDCR_CPU_53

AH3

VDDCR_CPU_54

AH6

VDDCR_CPU_55

AH9

VDDCR_CPU_56

AH11

VDDCR_CPU_57

AH13

VDDCR_CPU_58

AH15

VDDCR_CPU_59

AH17

VDDCR_CPU_60

AH19

VDDCR_CPU_61

AH21

VDDCR_CPU_62

AH23

VDDCR_CPU_63

AH25

VDDCR_CPU_64

AH27

VDDCR_CPU_65

AJ2

VDDCR_CPU_66

AJ10

VDDCR_CPU_67

AJ12

VDDCR_CPU_68

AJ14

VDDCR_CPU_69

AJ22

VDDCR_CPU_70

AJ24

VDDCR_CPU_71

AK7

VDDCR_CPU_72

AK9

VDDCR_CPU_73

AK11

VDDCR_CPU_74

AK13

VDDCR_CPU_75

AL3

VDDCR_CPU_76

AL6

VDDCR_CPU_77

AL10

VDDCR_CPU_78

AL12

VDDCR_CPU_79

AL14

VDDCR_CPU_80

AM2

VDDCR_CPU_81

AM8

VDDCR_CPU_82

AN7

VDDCR_CPU_83

AN10

VDDCR_CPU_84

AN13

VDDCR_CPU_85

AP3

VDDCR_CPU_86

AP9

VDDCR_CPU_87

AP12

VDDCR_CPU_88

AR2

VDDCR_CPU_89

AT4

VDDCR_CPU_90

AU3

VDDCR_CPU_91

AU6

VDDCR_CPU_92

AU9

VDDCR_CPU_93

AU12

VDDCR_CPU_94

AU15

VDDCR_CPU_95

AV5

VDDCR_CPU_96

AV8

VDDCR_CPU_97

AV11

VDDCR_CPU_98

AV14

VDDCR_CPU_99

APU_AM4_SOCKET_1331P

AM4 REV 0.95

PART 12 OF 12

POWER

VDDCR_SOC_1
VDDCR_SOC_2
VDDCR_SOC_3
VDDCR_SOC_4
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_SOC_7
VDDCR_SOC_8

VDDCR_SOC_9
VDDCR_SOC_10
VDDCR_SOC_11
VDDCR_SOC_12
VDDCR_SOC_13
VDDCR_SOC_14
VDDCR_SOC_15
VDDCR_SOC_16
VDDCR_SOC_17
VDDCR_SOC_18
VDDCR_SOC_19
VDDCR_SOC_20
VDDCR_SOC_21
VDDCR_SOC_22
VDDCR_SOC_23
VDDCR_SOC_24
VDDCR_SOC_25
VDDCR_SOC_26
VDDCR_SOC_27
VDDCR_SOC_28
VDDCR_SOC_29
VDDCR_SOC_30
VDDCR_SOC_31
VDDCR_SOC_32
VDDCR_SOC_33
VDDCR_SOC_34
VDDCR_SOC_35
VDDCR_SOC_36
VDDCR_SOC_37
VDDCR_SOC_38
VDDCR_SOC_39
VDDCR_SOC_40
VDDCR_SOC_41
VDDCR_SOC_42
VDDCR_SOC_43
VDDCR_SOC_44
VDDCR_SOC_45
VDDCR_SOC_46
VDDCR_SOC_47
VDDCR_SOC_48
VDDCR_SOC_49
VDDCR_SOC_50
VDDCR_SOC_51
VDDCR_SOC_52
VDDCR_SOC_53
VDDCR_SOC_54
VDDCR_SOC_55
VDDCR_SOC_56
VDDCR_SOC_57
VDDCR_SOC_58
VDDCR_SOC_59
VDDCR_SOC_60
VDDCR_SOC_61
VDDCR_SOC_62
VDDCR_SOC_63
VDDCR_SOC_64
VDDCR_SOC_65
VDDCR_SOC_66
VDDCR_SOC_67
VDDCR_SOC_68
VDDCR_SOC_69
VDDCR_SOC_70
VDDCR_SOC_71
VDDCR_SOC_72
VDDCR_SOC_73

4

48A

B5
B8
B11
B14
B17
B20
C4
C7
C10
C13
C16
C19
D3
E2
F7
F10
F13
F16
G3
G6
G9
G12
G15
G18
H2
J7
J10
J12
J14
J16
K3
K6
K9
K11
K13
K15
L2
L10
L12
L14
L16
L18
L20
L22
L24
L26
M9
M11
M13
M15
M17
M19
M21
M23
M25
N10
N12
N14
N16
N18
N20
N22
N24
N26
P9
P11
P13
R10
R12
T11
T13
U12
V13

C929
22u/6.3V_6

C439
22u/6.3V_6

C372
22u/6.3V_6

C390

4.7u/6.3V_4

C449

4.7u/6.3V_4

C324

4.7u/6.3V_4

C250

4.7u/6.3V_4

C305

0.22u/10V_4

C490

0.22u/10V_4

C488
180p/50V_4

C913
22u/6.3V_6

C247
22u/6.3V_6

C437
22u/6.3V_6

C403

4.7u/6.3V_4

C289

4.7u/6.3V_4

C360

4.7u/6.3V_4

C478

4.7u/6.3V_4

C349

0.22u/10V_4

C475

0.22u/10V_4

C462
180p/50V_4

C927
22u/6.3V_6

C466
22u/6.3V_6

C452
22u/6.3V_6

C283

4.7u/6.3V_4

C338

4.7u/6.3V_4

C450

4.7u/6.3V_4

C458

0.22u/10V_4

C477
180p/50V_4

C918
22u/6.3V_6

C932
22u/6.3V_6

C438
22u/6.3V_6

C334

4.7u/6.3V_4

C396

4.7u/6.3V_4

C278

4.7u/6.3V_4

C442

0.22u/10V_4

C393
22u/6.3V_6

C906
22u/6.3V_6

C320
22u/6.3V_6

C370

4.7u/6.3V_4

C275

4.7u/6.3V_4

C371

4.7u/6.3V_4

C441

0.22u/10V_4

C924
22u/6.3V_6

C310
22u/6.3V_6

C345
22u/6.3V_6

C430

4.7u/6.3V_4

C272

4.7u/6.3V_4

C433

4.7u/6.3V_4

C492

0.22u/10V_4

C344
22u/6.3V_6

C465
22u/6.3V_6

C431

4.7u/6.3V_4

C251

4.7u/6.3V_4

C246

4.7u/6.3V_4

C471

0.22u/10V_4

C928
22u/6.3V_6

OP

T

C408
22u/6.3V_6

BOT

C245

4.7u/6.3V_4

C277

4.7u/6.3V_4

C309

4.7u/6.3V_4

C300

0.22u/10V_4

TOP

3

C935
22u/6.3V_6

C933
22u/6.3V_6

C936
22u/6.3V_6

C464
22u/6.3V_6

C937
22u/6.3V_6

C468
22u/6.3V_6

C500
22u/6.3V_6

TOP

C486
22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

C481

C482

BOT

C521

C504

4.7u/6.3V_4

C506

4.7u/6.3V_4

4.7u/6.3V_4

C525

4.7u/6.3V_4

C512

0.22u/10V_4

C509

4.7u/6.3V_4

C502

4.7u/6.3V_4

C507

0.22u/10V_4

C493

4.7u/6.3V_4

C518

4.7u/6.3V_4

C473

0.22u/10V_4

C529

0.22u/10V_4

C513

4.7u/6.3V_4

C503

4.7u/6.3V_4

C508

0.22u/10V_4

C479

0.22u/10V_4

C515

4.7u/6.3V_4

C472

0.22u/10V_4

C491

0.22u/10V_4

C496
180p/50V_4

C511

4.7u/6.3V_4

C494

4.7u/6.3V_4

C497

4.7u/6.3V_4

C524

0.22u/10V_4

C517

0.22u/10V_4

C514
180p/50V_4

C510

4.7u/6.3V_4

C495

4.7u/6.3V_4

C519

4.7u/6.3V_4

C499

0.22u/10V_4

C520

0.22u/10V_4

C505
180p/50V_4

TOP

Q38

+5V_S5

20MIL

R297

68.1K_1%_ 4

R298
150K_1%_4

+1.5V_RTC

1

VOUT

2

GND

AP2138N-1.5TRG1

R304 4.7K_5%_4

20MIL

3

VIN

+VCCRTC_4 +VCCRTC_3

R293 4.7K_5%_4

+VCCRTC_5

20MIL20MIL

20MIL

+3VRTC

3

C743
1u/6.3V_4

D24

BAT54CW

2

1

13

Q43METR3 904-G

2

Charge function

+VCCRTC_2

C467
22u/6.3V_6

C480
22u/6.3V_6

C522

4.7u/6.3V_4

C501

4.7u/6.3V_4

C526

4.7u/6.3V_4

C498

0.22u/10V_4

C516

0.22u/10V_4

C487
180p/50V_4

+3VPCU

+BAT

12

+ -

20MIL

20MIL

2

21A

R294
1K_1%_4

CN19
AAA-BAT-046-K03

34

U28F

K36

VDDIO_MEM_S3_1

K39

VDDIO_MEM_S3_2

L32

VDDIO_MEM_S3_3

L35

VDDIO_MEM_S3_4

L38

VDDIO_MEM_S3_5

M29

VDDIO_MEM_S3_6

M31

VDDIO_MEM_S3_7

M34

VDDIO_MEM_S3_8

M37

VDDIO_MEM_S3_9

N28

VDDIO_MEM_S3_10

N30

VDDIO_MEM_S3_11

N33

VDDIO_MEM_S3_12

N36

VDDIO_MEM_S3_13

N39

VDDIO_MEM_S3_14

P27

VDDIO_MEM_S3_15

P29

VDDIO_MEM_S3_16

P32

VDDIO_MEM_S3_17

P35

VDDIO_MEM_S3_18

P38

VDDIO_MEM_S3_19

R28

VDDIO_MEM_S3_20

R31

VDDIO_MEM_S3_21

R34

VDDIO_MEM_S3_22

R37

VDDIO_MEM_S3_23

T27

VDDIO_MEM_S3_24

T29

VDDIO_MEM_S3_25

T33

VDDIO_MEM_S3_26

T36

VDDIO_MEM_S3_27

T39

VDDIO_MEM_S3_28

U28

VDDIO_MEM_S3_29

U30

VDDIO_MEM_S3_30

U32

VDDIO_MEM_S3_31

U35

VDDIO_MEM_S3_32

U38

VDDIO_MEM_S3_33

V27

VDDIO_MEM_S3_34

V29

VDDIO_MEM_S3_35

V31

VDDIO_MEM_S3_36

V34

VDDIO_MEM_S3_37

V37

VDDIO_MEM_S3_38

W28

VDDIO_MEM_S3_39

W33

VDDIO_MEM_S3_40

W34

VDDIO_MEM_S3_41

W36

VDDIO_MEM_S3_42

W39

VDDIO_MEM_S3_43

Y27

VDDIO_MEM_S3_44

Y29

VDDIO_MEM_S3_45

Y31

VDDIO_MEM_S3_46

Y32

VDDIO_MEM_S3_47

Y35

VDDIO_MEM_S3_48

Y38

VDDIO_MEM_S3_49

AA28

VDDIO_MEM_S3_50

AA34

VDDIO_MEM_S3_51

AA37

VDDIO_MEM_S3_52

AB27

VDDIO_MEM_S3_53

AB29

VDDIO_MEM_S3_54

AB31

VDDIO_MEM_S3_55

AB32

VDDIO_MEM_S3_56

AB33

VDDIO_MEM_S3_57

AB36

VDDIO_MEM_S3_58

AB39

VDDIO_MEM_S3_59

AC28

VDDIO_MEM_S3_60

AC30

VDDIO_MEM_S3_61

AC32

VDDIO_MEM_S3_62

AC35

VDDIO_MEM_S3_63

AC38

VDDIO_MEM_S3_64

AD27

VDDIO_MEM_S3_65

AD29

VDDIO_MEM_S3_66

AD31

VDDIO_MEM_S3_67

AD34

VDDIO_MEM_S3_68

AD37

VDDIO_MEM_S3_69

AE28

VDDIO_MEM_S3_70

AE30

VDDIO_MEM_S3_71

AE33

VDDIO_MEM_S3_72

AE36

VDDIO_MEM_S3_73

AE39

VDDIO_MEM_S3_74

AF27

VDDIO_MEM_S3_75

AF29

VDDIO_MEM_S3_76

AF32

VDDIO_MEM_S3_77

AF35

VDDIO_MEM_S3_78

AF38

VDDIO_MEM_S3_79

AG33

VDDIO_MEM_S3_80

AG34

VDDIO_MEM_S3_81

AG35

VDDIO_MEM_S3_82

AG37

VDDIO_MEM_S3_83

AH39

VDDIO_MEM_S3_84

APU_AM4_SOCKET_1331P

POWER

VDDCR_SOC_S5_1
VDDCR_SOC_S5_2

AM4 REV 0.95

PART 6 OF 12

RTC(RTC)

VDDP_1
VDDP_2
VDDP_3
VDDP_4
VDDP_5
VDDP_6
VDDP_7
VDDP_8
VDDP_9

VDDIO_AUDIO

VDD_18_1
VDD_18_2

VDD_33_1
VDD_33_2

VDDP_S5_1
VDDP_S5_2

T0 only

VDD_18_S5_1
VDD_18_S5_2

VDD_33_S5_1
VDD_33_S5_2

VDDBT_RTC_G

CLR_CMOS[41]

For EC reset RTC

1

11.5A

07

C1182
*0.1u/16V_4

R934
*10_5%_6

R987
100K_1%_4

VDDIO_AUDIO

VDD_33

TOP

VDDP_S5_C

VDD_18_S5

VDD_33_S5

4.5uA

C317

0.22u/10V_4

2

C318

0.22u/10V_4

C455
22u/6.3V_6

C453

0.22u/10V_4

C348

0.22u/10V_4

C343

0.22u/10V_4

C436

0.22u/10V_4

+1.5V_RTC_RST#

3

1

TOP

Q71
2N7002K

C386
*22u/6.3V_6

C483
*0.22u/10V_4

C440

0.22u/10V_4

C457
10u/6.3V_4

C353
10u/6.3V_4

C346
10u/6.3V_4

C387
10u/6.3V_4

20MIL

C322
1u/6.3V_4

C415
*22u/6.3V_6

C461
*180p/50V_4

R133 *Short_4

C407
10u/6.3V_4

C388

0.22u/10V_4

R138 *Short_4

R136 *Short_8

R127 *Short_4

R140 *Short_4

R950 1K_1%_4

12

G1
*SHORT_PAD

C459
*22u/6.3V_6

C432
*180p/50V_4

C384

0.1u/16V_4

C484
*10u/6.3V_4

C411
22u/6.3V_6

C485
*10u/6.3V_4

C445
22u/6.3V_6

2.7

A

+1.8V

C460
*22u/6.3V_6

C391
*180p/50V_4

+1.8V

0.34A

C443

0.22u/10V_4

+3V

0.34A

1.35A

VDDP_S5

0.68A

+1.8V_S5

0.34A

+3V_S5

+1.5V_RTC

AM18
AM19
AM20
AN18
AN19
AN20
AP18
AP19
AP20

AM15

AJ20
AK20

AJ21
AK21

AJ16
AJ17

AJ18
AK18

AJ15
AK15

AJ19
AK19

AL15

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

ZGX

PROJECT :

ZGX

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AM4 POWER

AM4 POWER

AM4 POWER

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

5

4

3

2

Tuesday, June 26, 2018

1

ZGX

7 59

7 59

7 59

1A

1A

1A

5

(CPU)

D D

C C

B B

U28G

J15

L29

AJ11

A12
A15
A18
A21
A24
A27
A30
A33
A36
B19
B23
B26
B29
B32
B35

C22
C25
C28
C31
C34
C37

D12
D15
D18
D19
D21
D22
D23
D24
D25
D27
D29
D30
D31
D32
D33
D34
D35
D36
D39

E11
E14
E17
E20
E21
E23
E26
E27
E29
E32

A3
A6
A9

C1

D6
D9

E4
E5
E8

GND

VSS_397
VSS_398
VSS_399
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59

AM4 REV 0.95
PART 7 OF 12

APU_AM4_SOCKET_1331P

VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121

E35
E38
F1
F4
F17
F19
F22
F25
F28
F31
F34
F35
F37
G7
G21
G24
G27
G30
G33
G35
G36
G39
H4
H5
H8
H11
H14
H17
H20
H23
H26
H29
H32
H35
H38
J1
J4
J8
J9
J11
J13
J17
J19
J22
J25
J28
J31
J34
J35
J37
K10
K12
K18
K20
K21
K22
K23
K26
K27
K28
K29
K30

4

U28H

K33

L11
L13
L15
L17
L19
L21
L25
L27
L28
L30
L31

M10
M12
M14
M16
M18
M20
M24
M26
M27
M28

N11
N13
N15
N17
N19
N21
N23
N25
N27
N29

P10
P12

R11
R13
R27
R29

T10
T12
T28
T30

U11

L4
L5
L8
L9

M1
M4
M8

N9

P4
P5
P8

R1
R4
R8
R9

U4
U5
U8
U9

GND

VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183

AM4 REV 0.95
PART 8 OF 12

APU_AM4_SOCKET_1331P

VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_215
VSS_214
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245

U13
U27
U29
U31
V1
V4
V7
V10
V12
V28
V30
W9
W11
W13
W27
W29
W31
Y5
Y8
Y10
Y12
Y28
Y30
AA1
AA4
AA6
AA9
AA11
AA13
AA27
AA31
AA29
AB7
AB10
AB12
AB28
AB30
AC5
AC8
AC9
AC11
AC13
AC27
AC29
AC31
AD1
AD4
AD10
AD12
AD28
AD30
AE7
AE9
AE11
AE13
AE27
AE29
AE31
AF5
AF8
AF10
AF12

U28J

AF28

VSS_246

AF30

VSS_247

AG1

VSS_248

AG4

VSS_249

AG8

VSS_250

AG9

VSS_251

AG11

VSS_252

AG13

VSS_253

AG15

VSS_254

AG17

VSS_255

AG19

VSS_256

AG21

VSS_257

AG23

VSS_258

AG25

VSS_259

AG27

VSS_260

AG28

VSS_261

AG29

VSS_262

AG30

VSS_263

AG31

VSS_264

AG32

VSS_265

AH10

VSS_266

AH12

VSS_267

AH14

VSS_268

AH16

VSS_269

AH18

VSS_270

AH20

VSS_271

AH22

VSS_272

AH24

VSS_273

AH26

VSS_274

AH28

VSS_275

AH29

VSS_276

AH30

VSS_277

AH33

VSS_278

AJ5

VSS_279

AJ8

VSS_280

AJ9

VSS_281

AJ13

VSS_282

AJ23

VSS_283

AJ25

VSS_284

AJ26

VSS_285

AJ27

VSS_286

AJ28

VSS_287

AJ29

VSS_288

AJ32

VSS_289

AJ35

VSS_290

AJ36

VSS_291

AJ38

VSS_292

AK1

VSS_293

AK4

VSS_294

AK10

VSS_295

AK12

VSS_296

AK14

VSS_297

AK22

VSS_298

AK25

VSS_299

AK28

VSS_300

AK31

VSS_301

AK35

VSS_302

AK37

VSS_303

AL9

VSS_304

AL11

VSS_305

AL24

VSS_306

AL27

VSS_307

AM4 REV 0.95

PART 10 OF 12

APU_AM4_SOCKET_1331P

3

GND

VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
VSS_361
VSS_362
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369

AL30
AL33
AL35
AL36
AL39
AM5
AM11
AM14
AM26
AM29
AM32
AM35
AM38
AN1
AN4
AN22
AN25
AN28
AN31
AN34
AN35
AN37
AP6
AP24
AP27
AP30
AP33
AP35
AP36
AP39
AR5
AR8
AR11
AR14
AR17
AR23
AR26
AR27
AR29
AR30
AR32
AR34
AR35
AR38
AT1
AT7
AT10
AT13
AT16
AT22
AT26
AT27
AT28
AT29
AT31
AT32
AT33
AT34
AT37
AU18
AU21
AU24

U28K

AU26
AU27
AU30
AU33
AU36
AU39

AV2
AV17
AV20
AV23
AV26
AV29
AV32
AV35
AV38

AW4

AW7
AW10
AW13
AW16
AW19
AW22
AW25
AW28
AW31
AW34
AW37

GND & RSVD

VSS_370
VSS_371
VSS_372
VSS_373
VSS_374
VSS_375
VSS_376
VSS_377
VSS_378
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_385
VSS_386
VSS_387
VSS_388
VSS_389
VSS_390
VSS_391
VSS_392
VSS_393
VSS_394
VSS_395
VSS_396

AM4 REV 0.95

PART 11 OF 12

APU_AM4_SOCKET_1331P

2

RSVD_24
RSVD_45
RSVD_37
RSVD_33
RSVD_28
RSVD_29
RSVD_46
RSVD_47
RSVD_43

RSVD_1
RSVD_14
RSVD_12
RSVD_15
RSVD_18
RSVD_19
RSVD_20
RSVD_21
RSVD_22
RSVD_23
RSVD_25
RSVD_26
RSVD_27
RSVD_30
RSVD_31
RSVD_32
RSVD_34
RSVD_35
RSVD_36
RSVD_38
RSVD_39
RSVD_40
RSVD_41
RSVD_42
RSVD_44

RSVD_2

RSVD_3

RSVD_4

RSVD_5

RSVD_6

RSVD_7

RSVD_8

RSVD_9
RSVD_10
RSVD_11
RSVD_13
RSVD_16
RSVD_17

AM12
AT25
AR15
AP15
AN12
AN15
AT30
AW24
AR24
A5
AD3
AB2
AH2
AL16
AL17
AL18
AL19
AL20
AL21
AM16
AM17
AM21
AN16
AN17
AN21
AP16
AP17
AP21
AR16
AR18
AR19
AR20
AR21
AT19
D28
E19
E22
E25
G17
J36
J38
K34
K38
R35
AB37
AH35
AK34

1

08

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

5

4

3

2

Tuesday, June 26, 2018

PROJECT :

AM4 GND

AM4 GND

AM4 GND

1

ZGX

ZGX

ZGX

8 59

8 59

8 59

1A

1A

1A

5

SODIMM (SDM)

Address A0

Device

8-bit Address (hex)

DIMMA0

DIMMA1 A4

DIMMB0

DIMMB1

D D

C C

B B

A0

A2

A6

+1.2VSUS

R788 1K_1%_4

M_A_EVENT#

M_A_A[13:0][3,10]

M_A_WE#[3,10]
M_A_CAS#[3,10]
M_A_RAS#[3,10]

M_A_ACT#[3,10]
M_A_PARITY[3,10]
M_A_ALERT#[3,10]

M_A_EVENT#[3,10]

M_A_RST#[3,10]

M_A_BANK0[3,10]
M_A_BANK1[3,10]
M_A_BG0[3,10]
M_A_BG1[3,10]

M_A0_CS#0[3]
M_A0_CS#1[3]
M_A0_CKE0[3]
M_A0_CKE1[3]

M_A0_CLK0[3]
M_A0_CLK0#[3]
M_A0_CLK1[3]
M_A0_CLK1#[3]

M_A0_ODT0[3]
M_A0_ODT1[3]

SCL0[5,10,11,12]

SDA0[5,10,11,12]

MA_CHECK[8:0][3,10]

M_A_DM[8:0][3,10]

4

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_EVENT#

MA_CHECK0
MA_CHECK1
MA_CHECK2
MA_CHECK3
MA_CHECK4
MA_CHECK5
MA_CHECK6
MA_CHECK7

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

JDIM3A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

CS2#/C0

165

CS3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

CS0#

157

CS1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DBI8#

D4AR0-26001-1P52

M_A_DQ0
M_A_DQ1

M_A_DQ3
M_A_DQ2
M_A_DQ5
M_A_DQ4
M_A_DQ7
M_A_DQ6

M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15

M_A_DQ17
M_A_DQ16

M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

M_A_DQ25
M_A_DQ24

M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29

M_A_DQ31
M_A_DQ30
M_A_DQ33
M_A_DQ32

M_A_DQ34
M_A_DQ35

M_A_DQ37
M_A_DQ36
M_A_DQ39
M_A_DQ38
M_A_DQ41
M_A_DQ40

M_A_DQ42
M_A_DQ43

M_A_DQ45
M_A_DQ44
M_A_DQ47
M_A_DQ46
M_A_DQ49
M_A_DQ48
M_A_DQ51
M_A_DQ50
M_A_DQ53
M_A_DQ52

M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61

M_A_DQ63
M_A_DQ62

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS8

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#8M_A_DM8

3

M_A_DQ[63:0]

0-7

2250mA

8-15

16-23

24-31

33-39

40-47

48-55

56-63

M_A_DQS[8:0] [3,10]

M_A_DQS#[8:0] [3,10]

DDR industry-standard specification
All bits within a byte must be wired to the same DRAM.
Bits within a nibble may be swapped in any order.
Nibbles may be swapped within a byte.

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

(260P)

DDR4 SODIMM 260 PIN

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

13

DQS0

34

DQS1

55

DQS2

76

DQS3

179

DQS4

200

DQS5

221

DQS6

242

DQS7

97

DQS8

11

DQS#0

32

DQS#1

53

DQS#2

74

DQS#3

177

DQS#4

198

DQS#5

219

DQS#6

240

DQS#7

95

DQS#8

2

+1.2VSUS

JDIM3B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

263
264

264

D4AR0-26001-1P52

1

09

+3V

255

257
259

258

164

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

C1071 1u/6.3V_4

M_A_VREFCA

C1022
1000p/50V_4

+2.5VSUS

+SMDDR_VTT

M_A_VREFCA

0.6A

0.5A

VDDSPD

VPP1
VPP2

VTT

VREFCA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

DDR4 SODIMM 260 PIN

VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

Place these Caps near So-Dimm A0

+1.2VSUS

C1032

0.1u/16V_4

A A

+1.2VSUS

C1008
1u/6.3V_4

C985

0.1u/16V_4

C1052
1u/6.3V_4

C1044

0.1u/16V_4

C1002
1u/6.3V_4

5

C1051

0.1u/16V_4

C1040
1u/6.3V_4

C1060

0.1u/16V_4

+1.2VSUS

+SMDDR_VTT

4

C997
22u/6.3V_6

C1064

4.7u/6.3V_4

C1019
22u/6.3V_6

C1065

0.1u/16V_4

C1001
22u/6.3V_6

(+MEM_VPP)

+2.5VSUS

C988
22u/6.3V_6

C1110
1u/6.3V_4

C1009
22u/6.3V_6

C1094
1u/6.3V_4

DECOUPLING CAPS

C959
22u/6.3V_6

C1107
1u/6.3V_4

3

22u/6.3V_6

C1097
1u/6.3V_4

C961
22u/6.3V_6

C1084

0.1u/16V_4

C981
22u/6.3V_6

C1089

0.1u/16V_4

From Power Chip (+0.6V)

+SMDDR_VREF

R748 *0_5%_6C966

2

+1.2VSUS

R742
1K_1%_4

R754
1K_1%_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

C1045

0.1u/16V_4

M_A_VREFCA

C1046

0.47u/25V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

DDR4 DIMM CHA0 (RVS-H5-B)

DDR4 DIMM CHA0 (RVS-H5-B)

DDR4 DIMM CHA0 (RVS-H5-B)

C1033

0.1u/16V_4

1

ZGX

ZGX

ZGX

9 59

9 59

9 59

1A

1A

1A

5

SODIMM (SDM)

Address A4

D D

C C

B B

M_A_A[13:0][3,9]

M_A_WE#[3,9]
M_A_CAS#[3,9]
M_A_RAS#[3,9]

M_A_ACT#[3,9]
M_A_PARITY[3,9]
M_A_ALERT#[3,9]

M_A_EVENT#[3,9]

M_A_RST#[3,9]

M_A_BANK0[3,9]
M_A_BANK1[3,9]
M_A_BG0[3,9]
M_A_BG1[3,9]

M_A1_CS#0[3]
M_A1_CS#1[3]
M_A1_CKE0[3]
M_A1_CKE1[3]

M_A1_CLK0[3]
M_A1_CLK0#[3]
M_A1_CLK1[3]
M_A1_CLK1#[3]

M_A1_ODT0[3]
M_A1_ODT1[3]

SCL0[5,9,11,12]

SDA0[5,9,11,12]

R790 1K_1%_4

MA_CHECK[8:0][3,9]

+3V

M_A_DM[8:0][3,9]

4

A1_SA1

JDIM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

CS2#/C0

165

CS3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

CS0#

157

CS1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DBI8#

D4AS0-26001-1P52

DDR4 SODIMM 260 PIN

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

M_A_EVENT#

MA_CHECK0
MA_CHECK1
MA_CHECK2
MA_CHECK3
MA_CHECK4
MA_CHECK5
MA_CHECK6
MA_CHECK7

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DM8 M_A_DQS#8

DDR industry-standard specification
All bits within a byte must be wired to the same DRAM.
Bits within a nibble may be swapped in any order.
Nibbles may be swapped within a byte.

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

(260P)

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_A_DQS0

13

M_A_DQS1

34

M_A_DQS2

55

M_A_DQS3

76

M_A_DQS4

179

M_A_DQS5

200

M_A_DQS6

221

M_A_DQS7

242

M_A_DQS8

97

M_A_DQS#0

11

M_A_DQS#1

32

M_A_DQS#2

53

M_A_DQS#3

74

M_A_DQS#4

177

M_A_DQS#5

198

M_A_DQS#6

219

M_A_DQS#7

240
95

M_A_DQ1
M_A_DQ0

M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7

M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ10
M_A_DQ13
M_A_DQ12
M_A_DQ15
M_A_DQ14

M_A_DQ16
M_A_DQ17

M_A_DQ19
M_A_DQ18
M_A_DQ21
M_A_DQ20
M_A_DQ23
M_A_DQ22

M_A_DQ24
M_A_DQ25

M_A_DQ27
M_A_DQ26
M_A_DQ29
M_A_DQ28

M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33

M_A_DQ35
M_A_DQ34

M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41

M_A_DQ43
M_A_DQ42

M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53

M_A_DQ55
M_A_DQ54
M_A_DQ57
M_A_DQ56
M_A_DQ59
M_A_DQ58
M_A_DQ61
M_A_DQ60

M_A_DQ62
M_A_DQ63

3

M_A_DQ[63:0]

0-7

2250mA

8-15

16-23

24-31

33-39

40-47

48-55

56-63

M_A_DQS[8:0] [3,9]

M_A_DQS#[8:0] [3,9]

2

+1.2VSUS

JDIM1B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

263
264

264

D4AS0-26001-1P52

1

10

+3V

255

257
259

258

164

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

C736 1u/6.3V_4

M_A_VREFCA

C1055
1000p/50V_4

+2.5VSUS

+SMDDR_VTT

M_A_VREFCA

0.6A

0.5A

VDDSPD

VPP1
VPP2

VTT

VREFCA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

DDR4 SODIMM 260 PIN

VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

Place these Caps near So-Dimm A1

+1.2VSUS

C1039

0.1u/16V_4

A A

+1.2VSUS

C1026
1u/6.3V_4

C1031

0.1u/16V_4

C995
1u/6.3V_4

C1025

0.1u/16V_4

C1020
1u/6.3V_4

5

C991

0.1u/16V_4

C1014
1u/6.3V_4

C979

0.1u/16V_4

+SMDDR_VTT

4

C1063

4.7u/6.3V_4

C1053

0.1u/16V_4

(+MEM_VPP)

+2.5VSUS

C1070
1u/6.3V_4

C1076
1u/6.3V_4

DECOUPLING CAPS

C1120
1u/6.3V_4

3

C1121
1u/6.3V_4

C1122

0.1u/16V_4

C1119

0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

2

Tuesday, June 26, 2018

PROJECT :

DDR4 DIMM CHA1 (STD-H4-T)

DDR4 DIMM CHA1 (STD-H4-T)

DDR4 DIMM CHA1 (STD-H4-T)

1

ZGX

ZGX

ZGX

10 59

10 59

10 59

1A

1A

1A

5

SODIMM (SDM)

Address A2

D D

+1.2VSUS

R959 1K_1%_4

C C

B B

M_B_EVENT# M_B_DQ24

M_B_A[16:0][3,12]

M_B_WE#[3,12]
M_B_CAS#[3,12]
M_B_RAS#[3,12]

M_B_ACT#[3,12]
M_B_PARITY[3,12]
M_B_ALERT#[3,12]
M_B_EVENT#[3,12]
M_B_RST#[3,12]

M_B_BANK0[3,12]
M_B_BANK1[3,12]
M_B_BG0[3,12]
M_B_BG1[3,12]

M_B0_CS#0[3]
M_B0_CS#1[3]
M_B0_CKE0[3]
M_B0_CKE1[3]

M_B0_CLK0[3]
M_B0_CLK0#[3]
M_B0_CLK1[3]
M_B0_CLK1#[3]

M_B0_ODT0[3]
M_B0_ODT1[3]

SCL0[5,9,10,12]
SDA0[5,9,10,12]

R872 1K_1%_4

+3V

MB_CHECK[8:0][3,12]

M_B_DM[8:0][3,12]

4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_EVENT#

MB_CHECK0
MB_CHECK1
MB_CHECK2
MB_CHECK3
MB_CHECK4
MB_CHECK5
MB_CHECK6
MB_CHECK7

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

B0_SA0

JDIM2A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

CS2#/C0/NC

165

CS3#/C1/NC

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

CS0#

157

CS1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0/NC

91

CB1/NC

101

CB2/NC

105

CB3/NC

88

CB4/NC

87

CB5/NC

100

CB6/NC

104

CB7/NC

12

DM0_n/DBI0_n

33

DM1_n/DBI1_n

54

DM2_n/DBI2_n

75

DM3_n/DBI3_n

178

DM4_n/DBI4_n

199

DM5_n/DBI5_n

220

DM6_n/DBI6_n

241

DM7_n/DBI7_n

96

DBI8#

D4AR0-26001-1P80

DDR industry-standard specification
All bits within a byte must be wired to the same DRAM.
Bits within a nibble may be swapped in any order.
Nibbles may be swapped within a byte.

M_B_DQ1

8

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48

(260P)

DDR4 SODIMM 260 PIN

DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_B_DQ0

7

M_B_DQ3

20

M_B_DQ2

21

M_B_DQ5

4

M_B_DQ4

3

M_B_DQ7

16

M_B_DQ6

17

M_B_DQ8

28

M_B_DQ9

29

M_B_DQ11

41

M_B_DQ10

42

M_B_DQ13

24

M_B_DQ12

25

M_B_DQ15

38

M_B_DQ14

37

M_B_DQ17

50

M_B_DQ16

49

M_B_DQ19

62

M_B_DQ18

63

M_B_DQ21

46

M_B_DQ20

45

M_B_DQ23

58

M_B_DQ22

59

M_B_DQ25

70
71

M_B_DQ27

83

M_B_DQ26

84

M_B_DQ29

66

M_B_DQ28

67

M_B_DQ31

79

M_B_DQ30

80

M_B_DQ32

174

M_B_DQ33

173

M_B_DQ35

187

M_B_DQ34

186

M_B_DQ37

170

M_B_DQ36

169

M_B_DQ38

183

M_B_DQ39

182

M_B_DQ41

195

M_B_DQ40

194

M_B_DQ42

207

M_B_DQ43

208

M_B_DQ45

191

M_B_DQ44

190

M_B_DQ46

203

M_B_DQ47

204

M_B_DQ48

216

M_B_DQ49

215

M_B_DQ50

228

M_B_DQ51

229

M_B_DQ52

211

M_B_DQ53

212

M_B_DQ54

224

M_B_DQ55

225

M_B_DQ57

237

M_B_DQ56

236

M_B_DQ59

249

M_B_DQ58

250

M_B_DQ60

232

M_B_DQ61

233

M_B_DQ63

245

M_B_DQ62

246

M_B_DQS0

13

M_B_DQS1

34

M_B_DQS2

55

M_B_DQS3

76

M_B_DQS4

179

M_B_DQS5

200

M_B_DQS6

221

M_B_DQS7

242

M_B_DQS8

97

M_B_DQS#0

11

M_B_DQS#1

32

M_B_DQS#2

53

M_B_DQS#3

74

M_B_DQS#4

177

M_B_DQS#5

198

M_B_DQS#6

219

M_B_DQS#7

240

M_B_DQS#8M_B_DM8

95

3

M_B_DQ[63:0] [3,12]

0-7

8-15

16-23

24-31

33-39

40-47

48-55

56-63

M_B_DQS[8:0] [3,12]

M_B_DQS#[8:0] [3,12]

2250mA

+1.2VSUS

2

JDIM2B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

263
264

264

D4AR0-26001-1P80

1

11

+3V

255

257
259

258

164

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

C1118 1u/6.3V_4

M_B_VREFCA

C1237
1000p/50V_4

+2.5VSUS

+SMDDR_VTT

M_B_VREFCA

0.6A

0.5A

VDDSPD

VPP1
VPP2

VTT

VREFCA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

DDR4 SODIMM 260 PIN

VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

Place these Caps near So-Dimm B0

+1.2VSUS

C1241

0.1u/16V_4

A A

+1.2VSUS

C1227
1u/6.3V_4

C1249

0.1u/16V_4

C1201
1u/6.3V_4

5

C1226

0.1u/16V_4

C1224
1u/6.3V_4

C1248

0.1u/16V_4

C1250
1u/6.3V_4

C1239

0.1u/16V_4

+1.2VSUS

+SMDDR_VTT

4

C1203
22u/6.3V_6

C1213

4.7u/6.3V_4

C1211
22u/6.3V_6

C1217

0.1u/16V_4

C1210
22u/6.3V_6

(+MEM_VPP)

+2.5VSUS

C1230
22u/6.3V_6

C1206
1u/6.3V_4

C1216
22u/6.3V_6

C1208
1u/6.3V_4

DECOUPLING CAPS

C1231
22u/6.3V_6

C1083
1u/6.3V_4

3

C1232
22u/6.3V_6

C1205
1u/6.3V_4

C1215
22u/6.3V_6

C1207

0.1u/16V_4

C1214
22u/6.3V_6

C1209

0.1u/16V_4

From Power Chip (+0.6V)

+SMDDR_VREF

R957 *0_5%_6

2

+1.2VSUS

R983
1K_1%_4

R984
1K_1%_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

C1222

0.1u/16V_4

M_B_VREFCA

C1204

0.47u/25V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

DDR4 DIMM CHB0 (RVS-H4-T)

DDR4 DIMM CHB0 (RVS-H4-T)

DDR4 DIMM CHB0 (RVS-H4-T)

C1238

0.1u/16V_4

1

ZGX

ZGX

ZGX

11 59

11 59

11 59

1A

1A

1A

5

SODIMM (SDM)

Address A6

D D

C C

B B

M_B_A[16:0][3,11]

M_B_WE#[3,11]
M_B_CAS#[3,11]
M_B_RAS#[3,11]

M_B_ACT#[3,11]
M_B_PARITY[3,11]
M_B_ALERT#[3,11]
M_B_EVENT#[3,11]
M_B_RST#[3,11]

M_B_BANK0[3,11]
M_B_BANK1[3,11]
M_B_BG0[3,11]
M_B_BG1[3,11]

M_B1_CS#0[3]
M_B1_CS#1[3]
M_B1_CKE0[3]
M_B1_CKE1[3]

M_B1_CLK0[3]
M_B1_CLK0#[3]
M_B1_CLK1[3]
M_B1_CLK1#[3]

M_B1_ODT0[3]
M_B1_ODT1[3]

SCL0[5,9,10,11]
SDA0[5,9,10,11]

R965 1K_1%_4
R966 1K_1%_4

+3V

MB_CHECK[8:0][3,11]

M_B_DM[8:0][3,11]

4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

M_B_EVENT#

MB_CHECK0
MB_CHECK1
MB_CHECK2
MB_CHECK3
MB_CHECK4
MB_CHECK5
MB_CHECK6
MB_CHECK7

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DM8

B1_SA0
B1_SA1

144
133
132
131
128
126
127
122
125
121
146
120
119
158
151
156
152

162
165

114
143
116
134
108

150
145
115
113

149
157
109
110

137
139
138
140

155
161

253
254

256
260
166

92

91
101
105

88

87
100
104

12

33

54

75
178
199
220
241

96

JDIM4A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14/WE#
A15/CAS#
A16/RAS#

CS2#/C0/NC
CS3#/C1/NC

ACT#
PARITY
ALERT#
EVENT#
RESET#

BA0
BA1
BG0
BG1

CS0#
CS1#
CKE0
CKE1

CK0
CK0#
CK1
CK1#

ODT0
ODT1

SCL
SDA

SA0
SA1
SA2

CB0/NC
CB1/NC
CB2/NC
CB3/NC
CB4/NC
CB5/NC
CB6/NC
CB7/NC

DM0_n/DBI0_n
DM1_n/DBI1_n
DM2_n/DBI2_n
DM3_n/DBI3_n
DM4_n/DBI4_n
DM5_n/DBI5_n
DM6_n/DBI6_n
DM7_n/DBI7_n
DBI8#

DDR H=9.2

DDR industry-standard specification
All bits within a byte must be wired to the same DRAM.
Bits within a nibble may be swapped in any order.
Nibbles may be swapped within a byte.

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

(260P)

DDR4 SODIMM 260 PIN

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

13

DQS0

34

DQS1

55

DQS2

76

DQS3

179

DQS4

200

DQS5

221

DQS6

242

DQS7

97

DQS8

11

DQS#0

32

DQS#1

53

DQS#2

74

DQS#3

177

DQS#4

198

DQS#5

219

DQS#6

240

DQS#7

95

DQS#8

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

M_B_DQ9
M_B_DQ8

M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31

M_B_DQ33
M_B_DQ32

M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37

M_B_DQ39
M_B_DQ38

M_B_DQ40
M_B_DQ41

M_B_DQ43
M_B_DQ42

M_B_DQ44
M_B_DQ45

M_B_DQ47
M_B_DQ46
M_B_DQ49
M_B_DQ48
M_B_DQ51
M_B_DQ50
M_B_DQ53
M_B_DQ52
M_B_DQ55
M_B_DQ54

M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59

M_B_DQ61
M_B_DQ60

M_B_DQ62
M_B_DQ63

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS8

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5

M_B_DQS#6
M_B_DQS#7
M_B_DQS#8

3

M_B_DQ[63:0] [3,11]

0-7

8-15

16-23

24-31

33-39

0-47

4

48-55

56-63

M_B_DQS[8:0] [3,11]

M_B_DQS#[8:0] [3,11]

2250mA

+1.2VSUS

2

1

12

111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163

15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93

99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251

263
264

JDIM4B

1
5
9

264

DDR H=9.2

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47

263

VDDSPD

VPP1
VPP2

VREFCA

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68

(260P)

DDR4 SODIMM 260 PIN

VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

+3V

255

C1218 1u/6.3V_4

257
259

258

VTT

M_B_VREFCA

164

C1202
1000p/50V_4

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

+2.5VSUS

+SMDDR_VTT

M_B_VREFCA

0.6A

0.5A

Place these Caps near So-Dimm B1

+1.2VSUS

C1251

0.1u/16V_4

A A

+1.2VSUS

C1234
1u/6.3V_4

C1240

0.1u/16V_4

C1236
1u/6.3V_4

5

C1252

0.1u/16V_4

C1225
1u/6.3V_4

C1223

0.1u/16V_4

C1212
1u/6.3V_4

C1235

0.1u/16V_4

+SMDDR_VTT

4

C1133

4.7u/6.3V_4

C1138

0.1u/16V_4

(+MEM_VPP)

+2.5VSUS

C1183
1u/6.3V_4

C1174
1u/6.3V_4

DECOUPLING CAPS

C1148
1u/6.3V_4

3

C1178
1u/6.3V_4

C1197

0.1u/16V_4

C1228

0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

2

Tuesday, June 26, 2018

PROJECT :

DDR4 DIMM CHB1 (RVS-H9-B)

DDR4 DIMM CHB1 (RVS-H9-B)

DDR4 DIMM CHB1 (RVS-H9-B)

1

ZGX

ZGX

ZGX

12 59

12 59

12 59

1A

1A

1A

5

4

3

2

1

PCH (CLG)

13

U33A

2

U33D

C25

PWR_GD

V6

PERSTN

AE26

GPP_INTN

C26

FAN_CTRL/DEBUG21

D25

TACH_IN/DEBUG20

E8

SMCL

F8

SMDA

E7

UART_RX

D7

UART_TX

C5

SPI_SCK

A5

SPI_CS

B5

SPI_SDI

A4

SPI_SDO

B23

TCK

C24

TDI

A23

TDO

D24

TMS

F25

RTCK

AF26

TESTEN

B25

DEBUG_ENABLE

Y21

EFUSE_PWR

D9

PKG0

D8

PKG1

FCH_B450_583P

+3V+3V

R171
10K_1%_4

3

Q61
2N7002K

1

ACPI/SPI/GPIO/MISC

GPIO_R4/DEBUG22
GPIO_R5/DEBUG23
GPIO_R6/DEBUG24
GPIO_R7/DEBUG25
GPIO_R8/DEBUG26

GPIO_R9/DEBUG27
GPIO_R10/DEBUG28
GPIO_R11/DEBUG29
GPIO_R12/DEBUG30
GPIO_R13/DEBUG31

GPIO_R14/DEBUG7

4/8

PROMONTORY REV 0.3

HWPG_1.05VS5[41,44]

PEWAKEN

GPP_RSTN

INT_GPIO/DEBUG6

GPIO_R0
GPIO_R1
GPIO_R2
GPIO_R3

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7

+3V

SYS_RST#[5,6]

PM_PCIEWAKE#_C

V5

PM_PCIERST#_C

AC10

PM_SMI#

B7

SMI

A21

A1
B3
C4
A3

GPIO_R4

A24

GPIO_R5

A26

GPIO_R6

E25

GPIO_R7

B26

GPIO_R8

F24

GPIO_R9

E22
E26

GPIO_R11

F23
F26
E23
B21

B1
B4
C6
B6
A6
B2
C7
A2

R691 *200K_1%_4
R689 200K_1%_4

R192 *200K_1%_4
R690 200K_1%_4

R704 200K_1%_4
R709 *200K_1%_4
R721 200K_1%_4
R719 200K_1%_4
R727 200K_1%_4
R730 200K_1%_4
R733 200K_1%_4
R797 *200K_1%_4
R714 *200K_1%_4

FCH_PWR_GD

D10 RB500V-40

D12 *RB500V-40

D13 *RB500V-40

D D

APU

LAN

WLAN

C C

B B

NGFF_DET2_PCH[29]

P_HUB_TXP0[2]
P_HUB_TXN0[2]

P_HUB_TXP1[2]
P_HUB_TXN1[2]

P_HUB_TXP2[2]
P_HUB_TXN2[2]

P_HUB_TXP3[2]
P_HUB_TXN3[2]

PCIE_LAN_RXP2[33]
PCIE_LAN_RXN2[33]

PCIE_WLAN_RXP1[30]
PCIE_WLAN_RXN1[30]

SATA_RXP0[34]
SATA_RXN0[34]

PCIE_SSD2_RXP0[29]
PCIE_SSD2_RXN0[29]

PCIE_SSD2_RXP1[29]
PCIE_SSD2_RXN1[29]

DEVSLP_HDD[34]

DEVSLP:No on-board pull-up resistor is needed

R201 *20K_1%_4

R202 12.1K_1%_4

R185 *20K_1%_4

SSD Det

A A

SSD SATA I/F --> L

SD PCIE I/F --> H

S

PM_PREXT

G5

APU_RXP0

G4

APU_RXN0

J5

APU_RXP1

J4

APU_RXN1

L5

APU_RXP2

L4

APU_RXN2

N5

APU_RXP3

N4

APU_RXN3

R23

GPP_RXP0

R24

GPP_RXN0

P23

GPP_RXP1

R22

GPP_RXN1

T21

GPP_RXP2

T22

GPP_RXN2

T23

GPP_RXP3

T24

GPP_RXN3

K22

GPP_RXP4

L22

GPP_RXN4

L24

GPP_RXP5

L23

GPP_RXN5

M23

GPP_RXP6

M22

GPP_RXN6

P22

GPP_RXP7

N22

GPP_RXN7

E15

SATA_RXP0

D15

SATA_RXN0

E16

SATA_RXP1

D16

SATA_RXN1

E17

SATA_RXP2

D17

SATA_RXN2

E18

SATA_RXP3

D18

SATA_RXN3

D11

SATAE_RXP0

E11

SATAE_RXN0

D12

SATAE_RXP1

E12

SATAE_RXN1

D13

SATAE_RXP2

E13

SATAE_RXN2

D14

SATAE_RXP3

E14

SATAE_RXN3

B22

DEVSLP0/DEBUG0

C23

DEVSLP1/DEBUG1

A22

DEVSLP2/DEBUG2

D21

DEVSLP3/DEBUG3

C22

DEVSLP4/DEBUG4

C21

DEVSLP5/DEBUG5

C8

IFDET0

A7

IFDET1

C9

PREXT

FCH_B450_583P

PCIE/SATA/SATAE

SATALED0/DEBUG8

SATALED1/DEBUG9
SATALED2/DEBUG10
SATALED3/DEBUG11
SATALED4/DEBUG12
SATALED5/DEBUG13
SATALED6/DEBUG14
SATALED7/DEBUG15

1/8

PROMONTORY REV 0.3

APU_TXP0
APU_TXN0

APU_TXP1
APU_TXN1

APU_TXP2
APU_TXN2

APU_TXP3
APU_TXN3

GPP_TXP0
GPP_TXN0

GPP_TXP1
GPP_TXN1

GPP_TXP2
GPP_TXN2

GPP_TXP3
GPP_TXN3

GPP_TXP4
GPP_TXN4

GPP_TXP5
GPP_TXN5

GPP_TXP6
GPP_TXN6

GPP_TXP7
GPP_TXN7

SATA_TXP0
SATA_TXN0

SATA_TXP1
SATA_TXN1

SATA_TXP2
SATA_TXN2

SATA_TXP3
SATA_TXN3

SATAE_TXP0
SATAE_TXN0

SATAE_TXP1
SATAE_TXN1

SATAE_TXP2
SATAE_TXN2

SATAE_TXP3
SATAE_TXN3

P_HUB_RXP0_C

G1

P_HUB_RXN0_C

G2

P_HUB_RXP1_C

J1

P_HUB_RXN1_C

J2

P_HUB_RXP2_C

L1

P_HUB_RXN2_C

L2

P_HUB_RXP3_C

N1

P_HUB_RXN3_C

N2

PCIE_LAN_TXP2_C

M25

PCIE_LAN_TXN2_C

M26

PCIE_WLAN_TXP1_C

N24

PCIE_WLAN_TXN1_C

N25

P25
P26

R26
R25

H25
H26

H24
J24

K25
K26

L26
L25

A15
B15

A16
B16

A17
B17

A18
B18

PCIE_SSD2_TXP0_C

B11

PCIE_SSD2_TXN0_C

A11

PCIE_SSD2_TXP1_C

B12

PCIE_SSD2_TXN1_C

A12

B13
A13

B14
A14

E20
E19
A20
B20

SSD2_LED#_PCH

C20
A19
B19
C19

C969 0.22u/10V_4
C973 0.22u/10V_4

C984 0.22u/10V_4
C990 0.22u/10V_4

C994 0.22u/10V_4
C999 0.22u/10V_4

C1006 0.22u/10V_4
C1013 0.22u/10V_4

C1000 0.1u /16V_4
C996 0.1u/1 6V_4

C1021 0.1u /16V_4
C1015 0.1u /16V_4

SATA_TXP0 [34]
SATA_TXN0 [34]

HDDHDD

gnd voids undermeath

C957 0.22u/10V_4
C958 0.22u/10V_4

C955 0.22u/10V_4
C956 0.22u/10V_4

HDD_LED# [40]

R199 *Short_4

P_HUB_RXP0 [2]
P_HUB_RXN0 [2]

P_HUB_RXP1 [2]
P_HUB_RXN1 [2]

P_HUB_RXP2 [2]
P_HUB_RXN2 [2]

P_HUB_RXP3 [2]
P_HUB_RXN3 [2]

PCIE_LAN_TXP2 [33]
PCIE_LAN_TXN2 [33]

PCIE_WLAN_TXP1 [30]
PCIE_WLAN_TXN1 [30]

PCIE_SSD2_TXP0 [29]
PCIE_SSD2_TXN0 [29]

PCIE_SSD2_TXP1 [29]
PCIE_SSD2_TXN1 [29]

SSD2_LED# [29,40]

APU_CLKREQN[5]

PCIERST#[5,16,28,29,30,33,36]

APU

LAN

WLAN

SSD2SSD2

PCH_PWRGD

+2.5V

R718 *Short_4
R755 *Short_4

PM_PCIE_WAKE#[33]

+3V

R794 *10K_1%_4

+3V

TP36
TP37

TP35

R1016 4.9 9K_1%_4
R203 *200K_1 %_4
R204 200 K_1%_4

PIN D9
B350:PKGO (mount 200K)
B450:APU_CLKREQN (mount 5K)

00

01

R205 1K_1%_4

PCH_PWRGD_C
PCIERST#_R

PM_PCIE_WAKE#

TP33
TP34

SB_SMB_CLK
SB_SMB_DAT

UART_RX
UART_TX

SPI_SCK

SPI_SDI
SPI_SDO

TP103
TP114
TP108
TP32
TP40

TESTEN
DEBUG_ENABLE

Q28

2

METR3904-G

1 3

3V_PKG1

R178
10K_1%_4

+3V

R262
*10K_1%_4

R244 *Short_4

R254 *Short_4
C734 150p/50V_4
R617 *Short_4

TP115

TP112
TP118
TP116
TP110

TP38

TP39
TP104
TP109

TP119
TP111

TP113
TP107

TP117

SPI_SDO
SPI_SCK

UART_TX
SPI_SDI

GPIO_R4
GPIO_R5
GPIO_R6
GPIO_R7
GPIO_R8
GPIO_R9
GPIO_R11
TESTEN
DEBUG_ENABLE

21

21

21

LAN_RST# [33]

WLAN_RST# [30]
SSD2_RST# [29]

R698 1K_1%_4
R696 *1K_1%_4

R189 1K_1%_4
R697 *1K_1%_4

R705 *1K_1%_4
R708 1K_1%_4
R722 *1K_1%_4
R720 *1K_1%_4
R728 *1K_1%_4
R731 *1K_1%_4
R734 *1K_1%_4
R792 1K_1%_4
R715 1K_1%_4

+3V

R210
15K_1%_4

C607
1u/6.3V_4

PCIE_WAKE# [5 ,16,30,33]

PM_PCIERST# [29,30,33]

PM_SMI#_C [5]

PCH_PWRGD [41]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

5

4

3

2

Tuesday, June 26, 2018

PROJECT :

PROMONTORY PCIe/SATA/GPIO

PROMONTORY PCIe/SATA/GPIO

PROMONTORY PCIe/SATA/GPIO

ZGX

ZGX

ZGX

1A

1A

13 59

13 59

1

13 59

1A

5

4

3

2

1

PCH (CLG)

+3V_S5

R830 10K_5%_4
R828 10K_5%_4
R829 10K_5%_4

D D

USB_OC_PCH0[26]
USB_OC_PCH1[26]
USB_OC_PCH2[35]

C C

B B

USB_OC_PCH0
USB_OC_PCH1
USB_OC_PCH2

TP139
TP134
TP131
TP140
TP133
TP48
TP54
TP52
TP55
TP53
TP51
TP137
TP138
TP129

R807 *Short_4
R806 *Short_4
R805 *Short_4

R831 4.7K_ 5%_4
R832 4.7K_ 5%_4
R804 4.7K_ 5%_4
R809 4.7K_ 5%_4
R808 4.7K_ 5%_4

+3V_S5

R854 12.1 K_1%_4

USB3_FCH_RXP0[35]
USB3_FCH_RXN0[35]

USB3P_FCH_RXP0[27]
USB3P_FCH_RXN0[27]

USB3P_FCH_RXP1[27]
USB3P_FCH_RXN1[27]

USB_OC_PCH0_C
USB_OC_PCH1_C
USB_OC_PCH2_C

PM_UREXT

AE6

AE7
AD7
AC7
AB7
AA7
AC9
AB9
AA9

AE9
AD9

AE3

AE4
AE5

AF10

AB15
AC15

AC16
AB16

AB18
AC18

AC19
AB19

AC21
AB21

AF24
AE24

AB11
AA11

AC13
AB13

AF6

AF7

AF9

AF1
AF2

AF3
AF4

AF5

U33B

PPON_0
PPON_1
PPON_2
PPON_3
PPON_4
PPON_5
PPON_6
PPON_7
PPON_8
PPON_9
PPON_10
PPON_11
PPON_12
PPON_13

USB_OC0N
USB_OC1N
USB_OC2N
USB_OC3N
USB_OC4N
USB_OC5N
USB_OC6N
USB_OC7N

UREXT

USB_SS_RXP0
USB_SS_RXN0

USB_SS_RXP1
USB_SS_RXN1

USB_SS_RXP2
USB_SS_RXN2

USB_SS_RXP3
USB_SS_RXN3

USB_SS_RXP4
USB_SS_RXN4

USB_SS_RXP5
USB_SS_RXN5

USB_SSP_RXP0
USB_SSP_RXN0

USB_SSP_RXP1
USB_SSP_RXN1

FCH_B450_583P

USB

OC0-SSP0/HSD5
OC1-SSP1/HSD0
OC2-SS0/HSD10
OC3-SS1/HSD11
OC4-SS2/HSD6
OC5-SS3/HSD7
OC6-SS4/HSD8
OC7-SS5/HSD1-4

9,12,13

GEN1

GEN2

2/8

PROMONTORY REV 0.3

USB_HSDP0
USB_HSDN0

USB_HSDP1
USB_HSDN1

USB_HSDP2
USB_HSDN2

USB_HSDP3
USB_HSDN3

USB_HSDP4
USB_HSDN4

USB_HSDP5
USB_HSDN5

USB_HSDP6
USB_HSDN6

USB_HSDP7
USB_HSDN7

USB_HSDP8
USB_HSDN8

USB_HSDP9
USB_HSDN9

USB_HSDP10
USB_HSDN10

USB_HSDP11
USB_HSDN11

USB_HSDP12
USB_HSDN12

USB_HSDP13
USB_HSDN13

USB_SS_TXP0
USB_SS_TXN0

USB_SS_TXP1
USB_SS_TXN1

USB_SS_TXP2
USB_SS_TXN2

USB_SS_TXP3
USB_SS_TXN3

USB_SS_TXP4
USB_SS_TXN4

USB_SS_TXP5
USB_SS_TXN5

USB_SSP_TXP0
USB_SSP_TXN0

USB_SSP_TXP1
USB_SSP_TXN1

AE1
AE2

AC6
AC5

Y3
Y4

AB1
AB2

AD1
AD2

AD4
AD3

AA1
AA2

Y5
Y6

AB5
AB6

AB4
AB3

W5
W6

V3
V4

V1
V2

W1
W2

AF16
AE16

AF17
AE17

AF18
AE18

AF20
AE20

AF21
AE21

AF22
AE22

AE12
AF12

AE14
AF14

USB3P_FCH_TXP0_C
USB3P_FCH_TXN0_C

USB3P_FCH_TXP1_C
USB3P_FCH_TXN1_C

USB2_FCH_0P [27]
USB2_FCH_0N [27]

USB2_FCH_1P [38]
USB2_FCH_1N [38]

USB2_FCH_2P [24]
USB2_FCH_2N [24]

USB2_FCH_3P [36]
USB2_FCH_3N [36]

USB2_FCH_5P [27]
USB2_FCH_5N [27]

USB2_FCH_10P [35]
USB2_FCH_10N [35]

USB3_FCH_TXP0 [35]
USB3_FCH_TXN0 [ 35]

Type-C

Metal kayboard

CCD

Tobii

Type-C

USB3.0

USB3.0

gnd voids undermeath

C1081 TYPC@0.22U/10 V_4
C1082 TYPC@0.22U/10 V_4

C1079 TYPC@0.22U/10 V_4
C1080 TYPC@0.22U/10 V_4

PCIE_REQ_LAN#[33]
PCIE_CLKREQ_WLAN#[30]

R812 *Short_4

1

2

Y6
25MHZ/30ppm

4

3

R811 *Short_4

25MHz 2016 size
BG625000185Muruta
BG625000181 TXC
BG6250000D0 HOSONIC
BG625000182NDK

USB3P_FCH_TXP0 [27]
USB3P_FCH_TXN0 [27]

USB3P_FCH_TXP1 [27]
USB3P_FCH_TXN1 [27]

U33C

CLK_PCIE_HUBP[6]
CLK_PCIE_HUBN[6]

DEVSLP_SSD2[29]

XTAL_FCH_X1

C1077

5.6p/50V_4

XTAL_FCH_X2

A8

APU_CLKP

A9

APU_CLKN

AD26

GPP_CLKREQ0N

AD25

GPP_CLKREQ1N

AD23

GPP_CLKREQ2N

W22

GPP_CLKREQ3N

AA23

GPP_CLKREQ4N/DEBUG16

Y22

GPP_CLKREQ5N/DEBUG17

AA22

GPP_CLKREQ6N/DEBUG18

AC23

GPP_CLKREQ7N/DEBUG19

A10

SATAE_CLKREQ0N

B10

SATAE_CLKREQ1N

AE10

XI

AD10

XO

FCH_B450_583P

CLOCKS

3/8

PROMONTORY REV 0.3

GPP_CLKP0
GPP_CLKN0

GPP_CLKP1
GPP_CLKN1

GPP_CLKP2
GPP_CLKN2

GPP_CLKP3
GPP_CLKN3

GPP_CLKP4
GPP_CLKN4

GPP_CLKP5
GPP_CLKN5

GPP_CLKP6
GPP_CLKN6

GPP_CLKP7
GPP_CLKN7

PCIE_LAN_CLKP0_C

AC26

PCIE_LAN_CLKN0_C

AC25

PCIE_WLAN_CLKP1_C

AA26

PCIE_WLAN_CLKN1_C

AA25

Y26
Y25

V26
V25

AB26
AB25

PCIE_SSD2_CLKP0_C

Y24

PCIE_SSD2_CLKN0_C

Y23

W26
W25

W24
W23

R774 *Short_4
R784 *Short_4

R759 *Short_4
R766 *Short_4

R751 *Short_4
R757 *Short_4

Type-C

Type-C

14

PCIE_LAN_CLKP0 [33]
PCIE_LAN_CLKN0 [33]

PCIE_WLAN_CLKP1 [30]
PCIE_WLAN_CLKN1 [30]

PCIE_SSD2_CLKP0 [29]
PCIE_SSD2_CLKN0 [29]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

5

4

3

2

Date: Sheet

PROJECT :

PROMONTORY USB/CLOCK

PROMONTORY USB/CLOCK

PROMONTORY USB/CLOCK

ZGX

ZGX

ZGX

1A

1A

1A

of

14 59

14 59

1

14 59

5

4

3

2

1

PCH (CLG)

AB12
AB14
AB17
AB20
AB22
AB23
AB24
AC1
AC2
AC3
AC4
AC11
AC12
AC14
AC17
AC20
AC22
AC24
AD5
AD6
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD24
AE11
AE13
AE15
AE19
AE23
AE25
AF11
AF13
AF15
AF19
AF23
AF25

15

7.43A

+1.05V_PCH

D D

C681
22u/6.3V_6

C653
1u/6.3V_4

C C

C648
1u/6.3V_4

C649
1u/6.3V_4

C651
1u/6.3V_4

C671
1u/6.3V_4

B B

C610
22u/6.3V_6

C619
22u/6.3V_6

C652
1u/6.3V_4

C655
1u/6.3V_4

C643
1u/6.3V_4

C695
1u/6.3V_4

C679
1u/6.3V_4

C609
22u/6.3V_6

C617
22u/6.3V_6

C650
1u/6.3V_4

C700
1u/6.3V_4

C702
1u/6.3V_4

C673
1u/6.3V_4

C663
1u/6.3V_4

C683
22u/6.3V_6

C611
22u/6.3V_6

C647
1u/6.3V_4

C676
1u/6.3V_4

C675
1u/6.3V_4

C705
1u/6.3V_4

C678
1u/6.3V_4

C677
180p/50V_4

C624
22u/6.3V_6

C608
22u/6.3V_6

C654
1u/6.3V_4

C670
1u/6.3V_4

C669
1u/6.3V_4

C703
1u/6.3V_4

C636
1u/6.3V_4

C685
180p/50V_4

W11
W13
W16

H15
H17
J11

K13
K14
K17

L17
M17
N17

P17

R17

T17

U17

V10
V11
V14
V15
V16
V20
V21

K8
K9

L8

P7
P8

R1
R2
R3
R4
R5
R6
R7
R8

T1
T2
T3
T4
T5
T6
T7
T8

U1
U2
U3
U4
U5
U6
U7
U8

V9

U33E

VDD105_1
VDD105_2
VDD105_3
VDD105_4
VDD105_5
VDD105_6
VDD105_7
VDD105_8
VDD105_9
VDD105_10
VDD105_11
VDD105_12
VDD105_13
VDD105_14
VDD105_15
VDD105_16
VDD105_17
VDD105_18
VDD105_19
VDD105_20
VDD105_21
VDD105_22
VDD105_23
VDD105_24
VDD105_25
VDD105_26
VDD105_27
VDD105_28
VDD105_29
VDD105_30
VDD105_31
VDD105_32
VDD105_33
VDD105_34
VDD105_35
VDD105_36
VDD105_37
VDD105_38
VDD105_39
VDD105_40
VDD105_41
VDD105_42
VDD105_43
VDD105_44
VDD105_45
VDD105_46
VDD105_47
VDD105_48
VDD105_49
VDD105_50
VDD105_51
VDD105_52
VDD105_53

POWER

5/8

PROMONTORY REV 0.3

VCC25_1
VCC25_2
VCC25_3
VCC25_4
VCC25_5
VCC25_6
VCC25_7
VCC25_8

VCC25_9
VCC25_10
VCC25_11
VCC25_12
VCC25_13
VCC25_14
VCC25_15
VCC25_16
VCC25_17
VCC25_18
VCC25_19
VCC25_20
VCC25_21
VCC25_22
VCC25_23
VCC25_24
VCC25_25
VCC25_26
VCC25_27
VCC25_28
VCC25_29

VCC33_1

VCC33_2

VCC33_3

VSUS33_1
VSUS33_2
VSUS33_3
VSUS33_4
VSUS33_5
VSUS33_6
VSUS33_7

VSUS105_1
VSUS105_2

FCH_B450_583P

C1
C2
C3
D1
D2
D3
D4
D5
D6
E1
E2
E3
E4
E5
E6
F6
K11
K12
K15
K16
M8
M19
N8
N19
P19
R19
V12
V13
V17

G9
L18
Y20

V8
AA8
AB8
AC8
AD8
AE8
AF8

V7
W15

L11 BLM2 1PG220SN1D

1 2

C644
22u/6.3V_6

C640
22u/6.3V_6

L18 PBY1608 08T-600Y-N

1 2

C711
22u/6.3V_6

C726
22u/6.3V_6

C732

0.1u/16V_4

L22 PBY1608 08T-600Y-N

1 2

C738
22u/6.3V_6

+2.5V

+2.5V_PCH

C576
22u/6.3V_6

C965
180p/50V_4

C968
22u/6.3V_6

C577
180p/50V_4

0.27A

+3V

+3V_PCH_B

C708

0.1u/16V_4

+3V_S5_B

C720
22u/6.3V_6

C719

0.1u/16V_4

+1.05V_PCH_S5_B

C689

0.1u/16V_4

C602

0.1u/16V_4

L23 PBY160808T-600Y-N

1 2

C716

0.1u/16V_4

C724

0.1u/16V_4

C701

0.1u/16V_4

C662
22u/6.3V_6

C605

0.1u/16V_4

C735

0.1u/16V_4

C706

0.1u/16V_4

+1.05V_PCH_S5

0.07A

0.09A

+3V_S5

C712

0.1u/16V_4

K10
L10
L11
L16

M7
M10
M11
M12
M13
M14
M15
N10
N11
N12
N13
N14
N15

P10
P11
P12
P13
P14

P15
R10
R11
R12
R13
R14
R15

T10

T11

T12

T13

T14

T15

T16
U10
U12
U16

V22

V23

V24

W21

C730

0.1u/16V_4

U33F

GND

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43

6/8

PROMONTORY REV 0.3

FCH_B450_583P

U33G

A25

B8

B9
B24
C10
C11
C12
C13
C14
C15
C16
C17
C18
D10
D19
D20
D22
D23
D26

E9
E10
E24

F1

F2

F3

F4

F5

F9
F10
F11
F12
F13
F14
F15
F16
F17
F18
F19
F22

G3

G6

G22
G23
G24
G25
G26

H1

FCH_B450_583P

GNDA_1
GNDA_2
GNDA_3
GNDA_4
GNDA_5
GNDA_6
GNDA_7
GNDA_8
GNDA_9
GNDA_10
GNDA_11
GNDA_12
GNDA_13
GNDA_14
GNDA_15
GNDA_16
GNDA_17
GNDA_18
GNDA_19
GNDA_20
GNDA_21
GNDA_22
GNDA_23
GNDA_24
GNDA_25
GNDA_26
GNDA_27
GNDA_28
GNDA_29
GNDA_30
GNDA_31
GNDA_32
GNDA_33
GNDA_34
GNDA_35
GNDA_36
GNDA_37
GNDA_38
GNDA_39
GNDA_40
GNDA_41
GNDA_42
GNDA_43
GNDA_44
GNDA_45
GNDA_46
GNDA_47

PROMONTORY REV 0.3

GND

7/8

GNDA_48
GNDA_49
GNDA_50
GNDA_51
GNDA_52
GNDA_53
GNDA_54
GNDA_55
GNDA_56
GNDA_57
GNDA_58
GNDA_59
GNDA_60
GNDA_61
GNDA_62
GNDA_63
GNDA_64
GNDA_65
GNDA_66
GNDA_67
GNDA_68
GNDA_69
GNDA_70
GNDA_71
GNDA_72
GNDA_73
GNDA_74
GNDA_75
GNDA_76
GNDA_77
GNDA_78
GNDA_79
GNDA_80
GNDA_81
GNDA_82
GNDA_83
GNDA_84
GNDA_85
GNDA_86
GNDA_87
GNDA_88
GNDA_89
GNDA_90
GNDA_91
GNDA_92
GNDA_93
GNDA_94

U33H

H2
H3
H4
H5
H6
H22
H23
J3
J6
J22
J23
J25
J26
K1
K2
K3
K4
K5
K6
K23
K24
L3
L6
L9
L12
L13
L14
L15
L21
M1
M2
M3
M4
M5
M6
M9
M16
M21
M24
N3
N6
N9
N16
N21
N23
N26
P1

AA10
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA24
AB10

R16
R21

U11
U13
U14
U15
U21
U22
U23
U24
U25
U26

AA3
AA4
AA5
AA6

P2

GNDA_95

P3

GNDA_96

P4

GNDA_97

P5

GNDA_98

P6

GNDA_99

P9

GNDA_100

P16

GNDA_101

P21

GNDA_102

P24

GNDA_103

R9

GNDA_104
GNDA_105
GNDA_106

T9

GNDA_107

T25

GNDA_108

T26

GNDA_109

U9

GNDA_110
GNDA_111
GNDA_112
GNDA_113
GNDA_114
GNDA_115
GNDA_116
GNDA_117
GNDA_118
GNDA_119
GNDA_120

W3

GNDA_121

W4

GNDA_122

Y1

GNDA_123

Y2

GNDA_124
GNDA_125
GNDA_126
GNDA_127
GNDA_128
GNDA_129
GNDA_130
GNDA_131
GNDA_132
GNDA_133
GNDA_134
GNDA_135
GNDA_136
GNDA_137
GNDA_138
GNDA_139
GNDA_140
GNDA_141

FCH_B450_583P

GND

GNDA_142
GNDA_143
GNDA_144
GNDA_145
GNDA_146
GNDA_147
GNDA_148
GNDA_149
GNDA_150
GNDA_151
GNDA_152
GNDA_153
GNDA_154
GNDA_155
GNDA_156
GNDA_157
GNDA_158
GNDA_159
GNDA_160
GNDA_161
GNDA_162
GNDA_163
GNDA_164
GNDA_165
GNDA_166
GNDA_167
GNDA_168
GNDA_169
GNDA_170
GNDA_171
GNDA_172
GNDA_173
GNDA_174
GNDA_175
GNDA_176
GNDA_177
GNDA_178
GNDA_179
GNDA_180
GNDA_181
GNDA_182
GNDA_183
GNDA_184
GNDA_185
GNDA_186

PROMONTORY REV 0.3

8/8

1.22A

+2.5V_PCH

C672

A A

1u/6.3V_4

C594
1u/6.3V_4

C580
1u/6.3V_4

C596

0.1u/16V_4

5

C579
1u/6.3V_4

C578

0.1u/16V_4

C600
1u/6.3V_4

C595

0.1u/16V_4

C586
1u/6.3V_4

C699

0.1u/16V_4

C582
1u/6.3V_4

C698

0.1u/16V_4

C581
1u/6.3V_4

C627

0.1u/16V_4

C704
1u/6.3V_4

C628

0.1u/16V_4

4

C599
1u/6.3V_4

C623

0.1u/16V_4

C598
1u/6.3V_4

C621

0.1u/16V_4

C634
1u/6.3V_4

C626

0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

3

2

Tuesday, June 26, 2018

PROJECT :

PROMONTORY POWER

PROMONTORY POWER

PROMONTORY POWER

ZGX

ZGX

ZGX

1A

1A

15 59

15 59

1

15 59

1A

GPU (VGA)

DGPU_RST_L[5]

GFX (SR)

GFX (RR)

GFX (SR)

GFX (RR)

R606

GPU RESET

PCIERST#

reversed design for layout
(

0<=>15)(P<=>N)

GFX_PEG_CLKP[6]
GFX_PEG_CLKN[6]

GFX_PEG_TXN15[2]
GFX_PEG_TXP15[2]

GFX_PEG_TXN14[2]
GFX_PEG_TXP14[2]

GFX_PEG_TXN13[2]
GFX_PEG_TXP13[2]

GFX_PEG_TXN12[2]
GFX_PEG_TXP12[2]

GFX_PEG_TXN11[2]
GFX_PEG_TXP11[2]

GFX_PEG_TXN10[2]
GFX_PEG_TXP10[2]

GFX_PEG_TXN9[2]
GFX_PEG_TXP9[2]

GFX_PEG_TXN8[2]
GFX_PEG_TXP8[2]

GFX_PEG_TXN7[2]
GFX_PEG_TXP7[2]

GFX_PEG_TXN6[2]
GFX_PEG_TXP6[2]

GFX_PEG_TXN5[2]
GFX_PEG_TXP5[2]

GFX_PEG_TXN4[2]
GFX_PEG_TXP4[2]

GFX_PEG_TXN3[2]
GFX_PEG_TXP3[2]

GFX_PEG_TXN2[2]
GFX_PEG_TXP2[2]

GFX_PEG_TXN1[2]
GFX_PEG_TXP1[2]

GFX_PEG_TXN0[2]
GFX_PEG_TXP0[2]

GFX_PEG_RXN15[2]
GFX_PEG_RXP15[2]

GFX_PEG_RXN14[2]
GFX_PEG_RXP14[2]

GFX_PEG_RXN13[2]
GFX_PEG_RXP13[2]

GFX_PEG_RXN12[2]
GFX_PEG_RXP12[2]

GFX_PEG_RXN11[2]
GFX_PEG_RXP11[2]

GFX_PEG_RXN10[2]
GFX_PEG_RXP10[2]

GFX_PEG_RXN9[2]
GFX_PEG_RXP9[2]

GFX_PEG_RXN8[2]
GFX_PEG_RXP8[2]

GFX_PEG_RXN7[2]
GFX_PEG_RXP7[2]

GFX_PEG_RXN6[2]
GFX_PEG_RXP6[2]

GFX_PEG_RXN5[2]
GFX_PEG_RXP5[2]

GFX_PEG_RXN4[2]
GFX_PEG_RXP4[2]

GFX_PEG_RXN3[2]
GFX_PEG_RXP3[2]

GFX_PEG_RXN2[2]
GFX_PEG_RXP2[2]

GFX_PEG_RXN1[2]
GFX_PEG_RXP1[2]

GFX_PEG_RXN0[2]
GFX_PEG_RXP0[2]

EV@10K_1%_4

R605 *Short_4

R599
*EV@10K_1%_4

EV@MC74VHC1G08DFT2G

C67 EV@0.22u/10V_4
C65 EV@0.22u/10V_4

C69 EV@0.22u/10V_4
C68 EV@0.22u/10V_4

C62 EV@0.22u/10V_4
C61 EV@0.22u/10V_4

C64 EV@0.22u/10V_4
C63 EV@0.22u/10V_4

C59 EV@0.22u/10V_4
C58 EV@0.22u/10V_4

C56 EV@0.22u/10V_4
C55 EV@0.22u/10V_4

C47 EV@0.22u/10V_4
C41 EV@0.22u/10V_4

C39 EV@0.22u/10V_4
C33 EV@0.22u/10V_4

C49 EV@0.22u/10V_4
C42 EV@0.22u/10V_4

C36 EV@0.22u/10V_4
C29 EV@0.22u/10V_4

C48 EV@0.22u/10V_4
C43 EV@0.22u/10V_4

C25 EV@0.22u/10V_4
C19 EV@0.22u/10V_4

C38 EV@0.22u/10V_4
C31 EV@0.22u/10V_4

C17 EV@0.22u/10V_4
C16 EV@0.22u/10V_4

C27 EV@0.22u/10V_4
C21 EV@0.22u/10V_4

C15 EV@0.22u/10V_4
C14 EV@0.22u/10V_4

gnd voids undermeath

Power up sequence and entry mode(PX_EN=1)

+3V_GFX+3V_S5+3V

C888

EV@0.1u/16V_4

1

2

U27

CMOS

3 5

PERST#_BUF

4

R596
*EV@100K_1%_4

DGPUT_CLK

DGPUT_DATA

GFX_PEG_RXN15_C
GFX_PEG_RXP15_C

GFX_PEG_RXN14_C
GFX_PEG_RXP14_C

GFX_PEG_RXN13_C
GFX_PEG_RXP13_C

GFX_PEG_RXN12_C
GFX_PEG_RXP12_C

GFX_PEG_RXN11_C
GFX_PEG_RXP11_C

GFX_PEG_RXN10_C
GFX_PEG_RXP10_C

GFX_PEG_RXN9_C
GFX_PEG_RXP9_C

GFX_PEG_RXN8_C
GFX_PEG_RXP8_C

GFX_PEG_RXN7_C
GFX_PEG_RXP7_C

GFX_PEG_RXN6_C
GFX_PEG_RXP6_C

GFX_PEG_RXN5_C
GFX_PEG_RXP5_C

GFX_PEG_RXN4_C
GFX_PEG_RXP4_C

GFX_PEG_RXN3_C
GFX_PEG_RXP3_C

GFX_PEG_RXN2_C
GFX_PEG_RXP2_C

GFX_PEG_RXN1_C
GFX_PEG_RXP1_C

GFX_PEG_RXN0_C
GFX_PEG_RXP0_C

8/10
WAKE and CLKREQB
AMD suggest keeep NC

U26I

9/22

BD3

PERSTB

BC2

SMBCLK

BC1

SMBDAT

AY5

PCIE_REFCLKP

AY6

PCIE_REFCLKN

BC5

PCIE_RX0P

BC6

PCIE_RX0N

BE6

PCIE_RX1P

BE7

PCIE_RX1N

BD7

PCIE_RX2P

BD8

PCIE_RX2N

BC8

PCIE_RX3P

BC9

PCIE_RX3N

BE9

PCIE_RX4P

BE10

PCIE_RX4N

BD10

PCIE_RX5P

BD11

PCIE_RX5N

BC11

PCIE_RX6P

BC12

PCIE_RX6N

BE12

PCIE_RX7P

BE13

PCIE_RX7N

BD13

PCIE_RX8P

BD14

PCIE_RX8N

VDDCR_BACO#1

BC14
BC15

BE15
BE16

BD16
BD17

BC17
BC18

BE18
BE19

BD19
BD20

BC20
BC21

BB10

BA10
BA11

AY11
AY12

BB12
BB13

BA13
BA14

AY14
AY15

BB15
BB16

BA16
BA17

AY17
AY18

BB18
BB19

BA19
BA20

AY20
AY21

BB21
BB22

BB6
BB7

BA7
BA8

AY8
AY9

BB9

VDDCR_BACO#2

PCIE_RX9P

VDDCR_BACO#3

PCIE_RX9N

VDDCR_BACO#4

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

EV@R17M-E2-90_2013P

CLKREQB

PCIE_ZVSS

REV0.90

+3V_GFX

R525

*EV@4.7K_5%_4

3V_GFX APU 3V_S5(Ext PU)

PCIE_WAKE#_GPU

BD2

WAKEB

AU16

PX_EN

R513 EV@1K_1%_4

R524
*EV@10K_1%_4

PEX_CLKREQ#

BE3

R658
*EV@10K_1%_4

AG10
AG11
AH9
AH10

C154
EV@1u/6.3V_4

PCIE_ZVSS

AK5

R571 EV@200_1%_4

Q55

2

*EV@2N7002K

3

1

R586 *EV@0_4

PX_EN

+3V_GFX

Q59

2

*EV@2N7002K

3

1

R655 *EV@0_4

VDDCR_BACO

C163
EV@1u/6.3V_4

C146
EV@1u/6.3V_4

Should minimize the trace

SYS_SHDN#[4, 16,36,41,43,58]

+0.8V_GFX_ON[16,57]

PCIE_REQ_GPU# [5]

1 2

L9

EV@BLM15AG121SN1D

C152
EV@1u/6.3V_4

*EV@2N7002K

PERST#_BUF

PCIE_WAKE# [5,13,30,33]

+0.8V_GFX

3

2

Q7

EV@2N7002K

1

3

2

Q9

1

21

D5 EV@1N4148WS

R504

*EV@10K_1%_4

DDCVGACLK

DDCVGADATA

+3V_GFX

TEMP_FAIL

R30
EV@10K_1%_4

Power side PU

HWPG_+0.8V_GFX[41,57]

HWPG_1.8VS5[41,49]

Power side PU

PX_EN

PERST#_BUF

PERST#_BUF

VGPU_PG[41,52]

Power side PU

PERST#_BUF

2ND_MBDATA[25,32,36,41,47,52]

2ND_MBCLK[25,32,36,41,47,52]

R503
*EV@10K_1%_4

R499 *EV@100_1%_4

R498 *EV@100_1%_4

R519 *Short_4
R520 *EV@0_5%_4

BD31

TP69

GPU_ALERT#_C

BC29

BE31

AU37

TP70

AT37

TP6

CTF:
High (+3.3v) : critial temperature fault occurs.
Low: dGPU operator normally as default

R33 *Short_4

+3V_GFX

*EV@0.1u/16V_4

1

CMOS

2

3 5

U5

R40 EV@10K_1%_4

R35 EV@10K_1%_4

R593 *Short_4

U26U

ALERT_L

PROCHOT_L

CTF

TEMPIN
TEMPINRETURN

EV@R17M-E2-90_2013P

*EV@MC74VHC1G08DFT2G

+3V_GFX

1

2

CMOS

3 5

U3
EV@MC74VHC1G08DFT2G

R28 *EV@0_5%_4

2ND_MBCLK_GPUTHM

2ND_MBDATA_GPUTHM

GPU_PORCHOT#_GPUTHM

G781_THRM#

+3V_GFX

+3V_GFX

R506
EV@10K_1%_4

21/22

PUMPOUT

DDCVGACLK

DDCVGADATA

REV0.90

+3V_GFX

C66

4

6

3 4

R27
*EV@10K_1%_4

R507
*EV@20K_1%_4

GPU_PORCHOT#_GPUTHM

DPLUS

DMINUS

FANIN

FANOUT

PUMPIN

R34
*EV@10K_1%_4

4

2

Q11
EV@METR3904-G

1 3

2

Q10
EV@METR3904-G

1 3

C18

EV@0.1u/16V_4

+3V_GFX

R592
*EV@4.7K_5%_4

Q54A

2

EV@2N7002KDW

1

5

Q54B
EV@2N7002KDW

G781 Slave Address:1001 1000(98)
Can't use 98, need change Part

U4

8

SMBCLK

7

SMBDATA

6

ALERT

4

THERM

+3V_GFX

*EV@G781P8

R26
*EV@10K_1%_4

2

1 3

Q8

*EV@METR3904-G

differential trace

GPU_DPLUS_C

BB34

GPU_DMINUS_C

BC34

BE29
BD29

R516 EV@10_5%_4

BE33
BD33

R497 EV@10_5%_4

BD30

DDCVGACLK

BE30

DDCVGADATA

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R32 *Short_4
R31 *Short_4

R43 *Short_4

R39 *Short_4

R36
*EV@0_5%_4

+3V_GFX

R495
EV@10K_1%_4

R493 *Short_4
R496 *Short_4

VGPU_VDDGFX_PG [41,52]

+3V_GFX

R573
EV@47K_1%_4

DGPUT_DATA

DGPUT_CLK

1

R505 *EV@0_5%_4

VCC

2

DXP

3

DXN

5

GND

SYS_SHDN# [4,16,36,41,43,58]

GPU_ALERT# [41]

R521 *EV@0_5%_4
R522 *EV@0_5%_4

Vega10 PCIe Interface

Vega10 PCIe Interface

Vega10 PCIe Interface

Tuesday, June 26, 2018

Tuesday, June 26, 2018

Tuesday, June 26, 2018

+VDDCI_GFX_ON [56]
+VPP_GFX_ON [59]

DGPU_PWREN [52]

HWPG_+VPP_GFX [41,59]

+3V_GFX

R494

D56
*EV@1N4148WS

R572
EV@47K_1%_4

R578 *EV@0_5%_4

R579 *EV@0_5%_4

*EV@10K_1%_4

21

+0.8V_GFX_ON [16,57]
+1.8V_GFX_ON [58]

2ND_MBDATA_GPUTHM

2ND_MBCLK_GPUTHM

+3V_GFX

C825
*EV@0.1u/16V_4

GPU_DPLUS

C57

*EV@2200p/50V_4

GPU_DMINUS

GPU_DPLUS
GPU_DMINUS

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZGX

ZGX

ZGX

16 59

16 59

16 59

16

1A

1A

1A

GPU(VGA)

U26D

AB31

VSS#277

AB32

VSS#278

AB33

VSS#279

AB34

VSS#280

AB35

VSS#281

AB36

VSS#282

AB39

VSS#283

AB43

VSS#284

AC3

VSS#285

AC5

VSS#286

AC9

VSS#287

AC12

VSS#288

AC15

VSS#289

AC16

VSS#290

AC19

VSS#291

AC20

VSS#292

AD1

VSS#293

AD4

VSS#294

AD7

VSS#295

AD11

VSS#296

AD12

VSS#297

AD15

VSS#298

AD16

VSS#299

AD19

VSS#300

AD20

VSS#301

AE3

VSS#302

AE5

VSS#303

AE9

VSS#304

AE12

VSS#305

AE15

VSS#306

AE16

VSS#307

AE19

VSS#308

AE20

VSS#309

AE21

VSS#310

AE22

VSS#311

AE23

VSS#312

AE24

VSS#313

AE25

VSS#314

AE26

VSS#315

AE27

VSS#316

AE28

VSS#317

AE29

VSS#318

AE30

VSS#319

AE31

VSS#320

AE32

VSS#321

AE33

VSS#322

AE34

VSS#323

AE35

VSS#324

AE36

VSS#325

AE37

VSS#326

AE41

VSS#327

AF1

VSS#328

AF4

VSS#329

AF7

VSS#330

AF11

VSS#331

AF12

VSS#332

AF13

VSS#333

AF14

VSS#334

AF15

VSS#335

AF16

VSS#336

AF19

VSS#337

AF20

VSS#338

AF21

VSS#339

AF22

VSS#340

AF23

VSS#341

AF24

VSS#342

AF25

VSS#343

AF26

VSS#344

AF27

VSS#345

AF28

VSS#346

AF29

VSS#347

AF30

VSS#348

AF31

VSS#349

AF32

VSS#350

AF33

VSS#351

AF34

VSS#352

AF35

VSS#353

AF36

VSS#354

AF39

VSS#355

AF43

VSS#356

AG3

VSS#357

AG12

VSS#358

AG13

VSS#359

AG14

VSS#360

AG15

VSS#361

AG16

VSS#362

AH1

VSS#363

AH4

VSS#364

AH7

VSS#365

AH8

VSS#366

AH11

VSS#367

AH12

VSS#368

AH13

VSS#369

AH14

VSS#370

AH15

VSS#371

AH16

VSS#372

AJ3

VSS#373

AJ6

VSS#374

AJ9

VSS#375

AJ12

VSS#376

AJ13

VSS#377

AJ19

VSS#378

AJ22

VSS#379

AJ25

VSS#380

AJ28

VSS#381

AJ31

VSS#382

AJ34

VSS#383

AJ37

VSS#384

AJ41

VSS#385

AK1

VSS#386

AK4

VSS#387

AK6

VSS#388

AK11

VSS#389

AK12

VSS#390

AK13

VSS#391

AK18

VSS#392

AK21

VSS#393

AK24

VSS#394

AK27

VSS#395

AK30

VSS#396

AK33

VSS#397

AK36

VSS#398

AK37

VSS#399

AK39

VSS#400

AK43

VSS#401

AL1

VSS#402

AL3

VSS#403

AL9

VSS#404

AL12

VSS#405

AL13

VSS#406

AL16

VSS#407

AM2

VSS#408

AM4

VSS#409

AM7

VSS#410

AM11

VSS#411

AM12

VSS#412

AM13

VSS#413

AM16

VSS#414

AN7

VSS#415

AN9

VSS#416

BE20

VSS#557

BE25

VSS#559

BE34

VSS#561

BE39

VSS#563

BE44

VSS#566

EV@R17M-E2-90_2013P

GPU Voltage Feedback

3/22

REV0.90

VSS#139
VSS#140
VSS#141
VSS#142
VSS#143
VSS#144
VSS#145
VSS#146
VSS#147
VSS#148
VSS#149
VSS#150
VSS#151
VSS#152
VSS#153
VSS#154
VSS#155
VSS#156
VSS#157
VSS#158
VSS#159
VSS#160
VSS#161
VSS#162
VSS#163
VSS#164
VSS#165
VSS#166
VSS#167
VSS#168
VSS#169
VSS#170
VSS#171
VSS#172
VSS#173
VSS#174
VSS#175
VSS#176
VSS#177
VSS#178
VSS#179
VSS#180
VSS#181
VSS#182
VSS#183
VSS#184
VSS#185
VSS#186
VSS#187
VSS#188
VSS#189
VSS#190
VSS#191
VSS#192
VSS#193
VSS#194
VSS#195
VSS#196
VSS#197
VSS#198
VSS#199
VSS#200
VSS#201
VSS#202
VSS#203
VSS#204
VSS#205
VSS#206
VSS#207
VSS#208
VSS#209
VSS#210
VSS#211
VSS#212
VSS#213
VSS#214
VSS#215
VSS#216
VSS#217
VSS#218
VSS#219
VSS#220
VSS#221
VSS#222
VSS#223
VSS#224
VSS#225
VSS#226
VSS#227
VSS#228
VSS#229
VSS#230
VSS#231
VSS#232
VSS#233
VSS#234
VSS#235
VSS#236
VSS#237
VSS#238
VSS#239
VSS#240
VSS#241
VSS#242
VSS#243
VSS#244
VSS#245
VSS#246
VSS#247
VSS#248
VSS#249
VSS#250
VSS#251
VSS#252
VSS#253
VSS#254
VSS#255
VSS#256
VSS#257
VSS#258
VSS#259
VSS#260
VSS#261
VSS#262
VSS#263
VSS#264
VSS#265
VSS#266
VSS#267
VSS#268
VSS#269
VSS#270
VSS#271
VSS#272
VSS#273
VSS#274
VSS#275
VSS#276

FB_VSS_A
FB_VSS_B

FB_VDDCR_SOC[52]

P33
P34
P35
P36
P39
P43
R3
R6
R9
R12
R15
R16
R19
R20
R23
R24
R27
R28
T1
T4
T7
T11
T12
T15
T16
T19
T20
T23
T24
T27
T28
U3
U6
U9
U12
U15
U16
U19
U20
U23
U24
U27
U28
U29
U30
U31
U32
U33
U34
U35
U36
U37
U41
V1
V4
V8
V11
V12
V15
V16
V19
V20
V23
V24
V27
V28
V29
V30
V31
V32
V33
V34
V35
V36
V39
V43
W3
W6
W9
W12
W15
W16
W19
W20
W23
W24
Y1
Y4
Y8
Y11
Y12
Y15
Y16
Y19
Y20
Y23
Y24
AA3
AA6
AA9
AA12
AA15
AA16
AA19
AA20
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA41
AB1
AB4
AB7
AB11
AB12
AB15
AB16
AB19
AB20
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AJ16
AY28

351

+VGPU_CORE

FB_VSSAB

U26A

A

AH17

FB_VDDCR_SOC

A2

VDDCR_SOC#1

A3

VDDCR_SOC#2

A4

VDDCR_SOC#3

A6

VDDCR_SOC#4

A7

VDDCR_SOC#5

A8

VDDCR_SOC#6

A9

VDDCR_SOC#7

A10

VDDCR_SOC#8

A11

VDDCR_SOC#9

A12

VDDCR_SOC#10

A13

VDDCR_SOC#11

A14

VDDCR_SOC#12

A15

VDDCR_SOC#13

A16

VDDCR_SOC#14

A17

VDDCR_SOC#15

A18

VDDCR_SOC#16

A19

VDDCR_SOC#17

A20

VDDCR_SOC#18

A21

VDDCR_SOC#19

A22

VDDCR_SOC#20

A23

VDDCR_SOC#21

A24

VDDCR_SOC#22

A25

VDDCR_SOC#23

A26

VDDCR_SOC#24

A27

VDDCR_SOC#25

A28

VDDCR_SOC#26

A29

VDDCR_SOC#27

A30

VDDCR_SOC#28

A31

VDDCR_SOC#29

A32

VDDCR_SOC#30

A33

VDDCR_SOC#31

A34

VDDCR_SOC#32

A35

VDDCR_SOC#33

A36

VDDCR_SOC#34

A37

VDDCR_SOC#35

A38

VDDCR_SOC#36

A39

VDDCR_SOC#37

A40

VDDCR_SOC#38

A42

VDDCR_SOC#39

A43

VDDCR_SOC#40

A44

VDDCR_SOC#41

B10

VDDCR_SOC#42

B15

VDDCR_SOC#43

B19

VDDCR_SOC#44

B23

VDDCR_SOC#45

B27

VDDCR_SOC#46

B31

VDDCR_SOC#47

B35

VDDCR_SOC#48

B45

VDDCR_SOC#49

C45

VDDCR_SOC#50

D15

VDDCR_SOC#51

D19

VDDCR_SOC#52

D23

VDDCR_SOC#53

D27

VDDCR_SOC#54

D31

VDDCR_SOC#55

D35

VDDCR_SOC#56

D45

VDDCR_SOC#57

F15

VDDCR_SOC#58

F19

VDDCR_SOC#59

F23

VDDCR_SOC#60

F27

VDDCR_SOC#61

F31

VDDCR_SOC#62

F35

VDDCR_SOC#63

F45

VDDCR_SOC#64

G45

VDDCR_SOC#65

H15

VDDCR_SOC#66

H19

VDDCR_SOC#67

H23

VDDCR_SOC#68

H27

VDDCR_SOC#69

H31

VDDCR_SOC#70

H35

VDDCR_SOC#71

H39

VDDCR_SOC#72

H43

VDDCR_SOC#73

H45

VDDCR_SOC#74

J13

VDDCR_SOC#75

J17

VDDCR_SOC#76

J21

VDDCR_SOC#77

J25

VDDCR_SOC#78

J29

VDDCR_SOC#79

J33

VDDCR_SOC#80

J45

VDDCR_SOC#81

K13

VDDCR_SOC#82

K14

VDDCR_SOC#83

K17

VDDCR_SOC#84

K18

VDDCR_SOC#85

K21

VDDCR_SOC#86

K22

VDDCR_SOC#87

K25

VDDCR_SOC#88

K26

VDDCR_SOC#89

K29

VDDCR_SOC#90

K30

VDDCR_SOC#91

K33

VDDCR_SOC#92

K34

VDDCR_SOC#93

EV@R17M-E2-90_2013P

R517 *Short_4
R518 *Short_4

1/22

VDDCR_SOC#94
VDDCR_SOC#95
VDDCR_SOC#96
VDDCR_SOC#97
VDDCR_SOC#98

VDDCR_SOC#99
VDDCR_SOC#100
VDDCR_SOC#101
VDDCR_SOC#102
VDDCR_SOC#103
VDDCR_SOC#104
VDDCR_SOC#105
VDDCR_SOC#106
VDDCR_SOC#107
VDDCR_SOC#108
VDDCR_SOC#109
VDDCR_SOC#110
VDDCR_SOC#111
VDDCR_SOC#112
VDDCR_SOC#113
VDDCR_SOC#114
VDDCR_SOC#115
VDDCR_SOC#116
VDDCR_SOC#117
VDDCR_SOC#118
VDDCR_SOC#119
VDDCR_SOC#120
VDDCR_SOC#121
VDDCR_SOC#122
VDDCR_SOC#123
VDDCR_SOC#124
VDDCR_SOC#125
VDDCR_SOC#126
VDDCR_SOC#127
VDDCR_SOC#128
VDDCR_SOC#129
VDDCR_SOC#130
VDDCR_SOC#131
VDDCR_SOC#132
VDDCR_SOC#133
VDDCR_SOC#134
VDDCR_SOC#135
VDDCR_SOC#136
VDDCR_SOC#137
VDDCR_SOC#138
VDDCR_SOC#139
VDDCR_SOC#140
VDDCR_SOC#141
VDDCR_SOC#142
VDDCR_SOC#143
VDDCR_SOC#144
VDDCR_SOC#145
VDDCR_SOC#146
VDDCR_SOC#147
VDDCR_SOC#148
VDDCR_SOC#149
VDDCR_SOC#150
VDDCR_SOC#151
VDDCR_SOC#152
VDDCR_SOC#153
VDDCR_SOC#154
VDDCR_SOC#155
VDDCR_SOC#156
VDDCR_SOC#157
VDDCR_SOC#158
VDDCR_SOC#159
VDDCR_SOC#160
VDDCR_SOC#161
VDDCR_SOC#162
VDDCR_SOC#163
VDDCR_SOC#164
VDDCR_SOC#165
VDDCR_SOC#166
VDDCR_SOC#167
VDDCR_SOC#168
VDDCR_SOC#169
VDDCR_SOC#170
VDDCR_SOC#171
VDDCR_SOC#172
VDDCR_SOC#173
VDDCR_SOC#174
VDDCR_SOC#175
VDDCR_SOC#176
VDDCR_SOC#177
VDDCR_SOC#178
VDDCR_SOC#179
VDDCR_SOC#180
VDDCR_SOC#181
VDDCR_SOC#182
VDDCR_SOC#183
VDDCR_SOC#184
VDDCR_SOC#185
VDDCR_SOC#186
VDDCR_SOC#187

REV 0.90

C199 EV@10u/6.3V_4

C179 EV@10u/6.3V_4

C236 EV@10u/6.3V_4

C301 EV@1u/6.3V_4

C340 EV@1u/6.3V_4

C215 EV@1u/6.3V_4

C323 EV@1u/6.3V_4

C178 EV@1u/6.3V_4

C383 EV@1u/6.3V_4

C362 EV@1u/6.3V_4

C399 EV@1u/6.3V_4

C420 EV@1u/6.3V_4

+VGPU_CORE

K39
K43
K45
L13
L14
L17
L18
L21
L22
L25
L26
L29
L30
L33
L34
L35
L36
L37
L41
L45
M13
M14
M17
M18
M21
M22
M25
M26
M29
M30
M33
M34
M35
M36
M39
M43
M45
N13
N14
N17
N18
N21
N22
N25
N26
N29
N30
N45
P13
P14
P17
P18
P21
P22
P25
P26
P29
P30
P45
R13
R14
R17
R18
R21
R22
R25
R26
R29
R30
R31
R32
R33
R34
R35
R36
R37
R41
R45
T13
T14
T17
T18
T21
T22
T25
T26
T29
T30
T31
T32
T33
T34
T35
T36

FB_VSSC_VDDCI [56]
FB_VSSC_VDDCR [52]

4.73A

+1.8V_GFX

0.14A

+3V_GFX +0.8V_GFX

4/22

AN13

VSS#417

AN16

VSS#418

AN18

VSS#419

AN21

VSS#420

AN24

VSS#421

AN27

VSS#422

AN30

VSS#423

AN33

VSS#424

AN36

VSS#425

AN41

VSS#426

AP7

VSS#427

AP11

VSS#428

AP12

VSS#429

AP13

VSS#430

AP17

VSS#431

AP20

VSS#432

AP23

VSS#433

AP26

VSS#434

AP29

VSS#435

AP32

VSS#436

AP35

VSS#437

AR3

VSS#438

AR7

VSS#439

AR9

VSS#440

AR12

VSS#441

AR13

VSS#442

AR16

VSS#443

AT3

VSS#444

AT7

VSS#445

AT11

VSS#446

AT13

VSS#447

AT15

VSS#448

AT38

VSS#449

AU10

VSS#450

AU12

VSS#451

AU13

VSS#452

AU17

VSS#453

AU20

VSS#454

AU23

VSS#455

AU26

VSS#456

AU29

VSS#457

AU32

VSS#458

AU35

VSS#459

AU45

VSS#460

AV5

VSS#461

AV6

VSS#462

AV9

VSS#463

AV11

VSS#464

AV25

VSS#465

AV28

VSS#466

AV31

VSS#467

AV34

VSS#468

AV37

VSS#469

AV43

VSS#470

AW4

VSS#471

AW5

VSS#472

AW8

VSS#473

AW11

VSS#474

AW14

VSS#475

AW17

VSS#476

AW18

VSS#477

AW19

VSS#478

AW20

VSS#479

AW21

VSS#480

AW22

VSS#481

AW41

VSS#482

AW45

VSS#483

AY4

VSS#484

AY7

VSS#485

AY10

VSS#486

AY13

VSS#487

AY16

VSS#488

AY19

VSS#489

AY22

VSS#490

AY39

VSS#491

AY43

VSS#492

BA5

VSS#493

BA6

VSS#494

BA9

VSS#495

BA12

VSS#496

BA15

VSS#497

BA18

VSS#498

BA21

VSS#499

BA22

VSS#500

BA27

VSS#501

BA31

VSS#502

BA34

VSS#503

BA37

VSS#504

BA41

VSS#505

BB4

VSS#506

BB5

VSS#507

BB8

VSS#508

BB11

VSS#509

BB14

VSS#510

BB17

VSS#511

BB20

VSS#512

BB23

VSS#513

BB28

VSS#514

BB29

VSS#515

BB30

VSS#516

BB42

VSS#517

BB44

VSS#518

BB45

VSS#519

BC4

VSS#520

BC7

VSS#521

BC10

VSS#522

BC13

VSS#523

BC16

VSS#524

BC19

VSS#525

BC22

VSS#526

BC25

VSS#527

BC30

VSS#528

BC32

VSS#529

BC35

VSS#530

BC38

VSS#531

BC41

VSS#532

BC44

VSS#533

BC45

VSS#534

BD1

VSS#535

BD5

VSS#536

BD6

VSS#537

BD9

VSS#538

BD12

VSS#539

BD15

VSS#540

BD18

VSS#541

BD21

VSS#542

BD23

VSS#543

BD25

VSS#544

BD34

VSS#545

BD37

VSS#546

BD40

VSS#547

BD43

VSS#548

BD44

VSS#549

BD45

VSS#550

BE2

VSS#551

BE4

VSS#552

BE8

VSS#553

BE11

VSS#554

BE14

VSS#555

BE42

VSS#564

BE37

VSS#562

BE28

VSS#560

BE21

VSS#558

BE17

VSS#556

BE43

VSS#565

REV0.90

U26C

B3

VSS#1

B7

VSS#2

B11

VSS#3

B39

VSS#4

B43

VSS#5

C5

VSS#6

C9

VSS#7

C13

VSS#8

C17

VSS#9

C21

VSS#10

C25

VSS#11

C29

VSS#12

C33

VSS#13

C37

VSS#14

C41

VSS#15

D1

VSS#16

D7

VSS#17

D11

VSS#18

D39

VSS#19

D43

VSS#20

E2

VSS#21

E5

VSS#22

E9

VSS#23

E13

VSS#24

E17

VSS#25

E21

VSS#26

E25

VSS#27

E29

VSS#28

E33

VSS#29

E37

VSS#30

E41

VSS#31

F1

VSS#32

F4

VSS#33

F7

VSS#34

F11

VSS#35

F39

VSS#36

F43

VSS#37

G3

VSS#38

G6

VSS#39

G9

VSS#40

G13

VSS#41

G17

VSS#42

G21

VSS#43

G25

VSS#44

G29

VSS#45

G33

VSS#46

G37

VSS#47

G41

VSS#48

H1

VSS#49

H4

VSS#50

H7

VSS#51

H11

VSS#52

J3

VSS#53

J6

VSS#54

J9

VSS#55

J37

VSS#56

J41

VSS#57

K1

VSS#58

K4

VSS#59

K7

VSS#60

K11

VSS#61

K12

VSS#62

K15

VSS#63

K16

VSS#64

K19

VSS#65

K20

VSS#66

K23

VSS#67

K24

VSS#68

K27

VSS#69

K28

VSS#70

K31

VSS#71

K32

VSS#72

K35

VSS#73

K36

VSS#74

L3

VSS#75

L5

VSS#76

L9

VSS#77

L12

VSS#78

L15

VSS#79

L16

VSS#80

L19

VSS#81

L20

VSS#82

L23

VSS#83

L24

VSS#84

L27

VSS#85

L28

VSS#86

L31

VSS#87

L32

VSS#88

M1

VSS#89

M4

VSS#90

M7

VSS#91

M11

VSS#92

M12

VSS#93

M15

VSS#94

M16

VSS#95

M19

VSS#96

M20

VSS#97

M23

VSS#98

M24

VSS#99

M27

VSS#100

M28

VSS#101

M31

VSS#102

M32

VSS#103

N3

VSS#104

N5

VSS#105

N9

VSS#106

N12

VSS#107

N15

VSS#108

N16

VSS#109

N19

VSS#110

N20

VSS#111

N23

VSS#112

N24

VSS#113

N27

VSS#114

N28

VSS#115

N31

VSS#116

N32

VSS#117

N33

VSS#118

N34

VSS#119

N35

VSS#120

N36

VSS#121

N37

VSS#122

N41

VSS#123

P1

VSS#124

P4

VSS#125

P7

VSS#126

P11

VSS#127

P12

VSS#128

P15

VSS#129

P16

VSS#130

P19

VSS#131

P20

VSS#132

P23

VSS#133

P24

VSS#134

P27

VSS#135

P28

VSS#136

P31

VSS#137

P32

VSS#138

EV@R17M-E2-90_2013P

U26B

T39

VDDCR_SOC#188

T43

VDDCR_SOC#189

T45

VDDCR_SOC#190

U13

VDDCR_SOC#191

U14

VDDCR_SOC#192

U17

VDDCR_SOC#193

U18

VDDCR_SOC#194

U21

VDDCR_SOC#195

U22

VDDCR_SOC#196

U25

VDDCR_SOC#197

U26

VDDCR_SOC#198

U45

VDDCR_SOC#199

V13

VDDCR_SOC#200

V14

VDDCR_SOC#201

V17

VDDCR_SOC#202

V18

VDDCR_SOC#203

V21

VDDCR_SOC#204

V22

VDDCR_SOC#205

V25

VDDCR_SOC#206

V26

VDDCR_SOC#207

V45

VDDCR_SOC#208

W13

VDDCR_SOC#209

W14

VDDCR_SOC#210

W17

VDDCR_SOC#211

W18

VDDCR_SOC#212

W21

VDDCR_SOC#213

W22

VDDCR_SOC#214

W25

VDDCR_SOC#215

W26

VDDCR_SOC#216

W27

VDDCR_SOC#217

W28

VDDCR_SOC#218

W29

VDDCR_SOC#219

W30

VDDCR_SOC#220

W31

VDDCR_SOC#221

W32

VDDCR_SOC#222

W33

VDDCR_SOC#223

W34

VDDCR_SOC#224

W35

VDDCR_SOC#225

W36

VDDCR_SOC#226

W37

VDDCR_SOC#227

W41

VDDCR_SOC#228

W45

VDDCR_SOC#229

Y13

VDDCR_SOC#230

Y14

VDDCR_SOC#231

Y17

VDDCR_SOC#232

Y18

VDDCR_SOC#233

Y21

VDDCR_SOC#234

Y22

VDDCR_SOC#235

Y25

VDDCR_SOC#236

Y26

VDDCR_SOC#237

Y27

VDDCR_SOC#238

Y28

VDDCR_SOC#239

Y29

VDDCR_SOC#240

Y30

VDDCR_SOC#241

Y31

VDDCR_SOC#242

Y32

VDDCR_SOC#243

Y33

VDDCR_SOC#244

Y34

VDDCR_SOC#245

Y35

VDDCR_SOC#246

Y36

VDDCR_SOC#247

Y39

VDDCR_SOC#248

Y43

VDDCR_SOC#249

Y45

VDDCR_SOC#250

AA13

VDDCR_SOC#251

AA14

VDDCR_SOC#252

AA17

VDDCR_SOC#253

AA18

VDDCR_SOC#254

AA21

VDDCR_SOC#255

AA22

VDDCR_SOC#256

AA45

VDDCR_SOC#257

AB13

VDDCR_SOC#258

AB14

VDDCR_SOC#259

AB17

VDDCR_SOC#260

AB18

VDDCR_SOC#261

AB21

VDDCR_SOC#262

AB22

VDDCR_SOC#263

AB45

VDDCR_SOC#264

AC13

VDDCR_SOC#265

AC14

VDDCR_SOC#266

AC17

VDDCR_SOC#267

AC18

VDDCR_SOC#268

AC21

VDDCR_SOC#269

AC22

VDDCR_SOC#270

AC23

VDDCR_SOC#271

AC24

VDDCR_SOC#272

AC25

VDDCR_SOC#273

AC26

VDDCR_SOC#274

AC27

VDDCR_SOC#275

AC28

VDDCR_SOC#276

AC29

VDDCR_SOC#277

AC30

VDDCR_SOC#278

AC31

VDDCR_SOC#279

AC32

VDDCR_SOC#280

AC33

VDDCR_SOC#281

AC34

VDDCR_SOC#282

AC35

VDDCR_SOC#283

AC36

VDDCR_SOC#284

AC37

VDDCR_SOC#285

AC41

VDDCR_SOC#286

AC45

VDDCR_SOC#287

AD13

VDDCR_SOC#288

AD14

VDDCR_SOC#289

EV@R17M-E2-90_2013P

U26V

M5

VDDAN_18#1

M6

VDDAN_18#2

N4

VDDAN_18#3

N6

VDDAN_18#4

Y5

VDD_18#1

Y6

VDD_18#2

AA5

VDD_18#3

AB5

VDD_18#4

AB6

VDD_18#5

AC6

VDD_18#6

AE6

VDD_18#7

AG4

VDD_18#8

AG5

VDD_18#9

AH5

VDD_18#10

H5

VDDAN_33#1

H6

VDDAN_33#2

K6

VDDAN_33#3

L6

VDDAN_33#4

EV@R17M-E2-90_2013P

2/22

VDDCR_SOC#290
VDDCR_SOC#291
VDDCR_SOC#292
VDDCR_SOC#293
VDDCR_SOC#294
VDDCR_SOC#295
VDDCR_SOC#296
VDDCR_SOC#297
VDDCR_SOC#298
VDDCR_SOC#299
VDDCR_SOC#300
VDDCR_SOC#301
VDDCR_SOC#302
VDDCR_SOC#303
VDDCR_SOC#304
VDDCR_SOC#305
VDDCR_SOC#306
VDDCR_SOC#307
VDDCR_SOC#308
VDDCR_SOC#309
VDDCR_SOC#310
VDDCR_SOC#311
VDDCR_SOC#312
VDDCR_SOC#313
VDDCR_SOC#314
VDDCR_SOC#315
VDDCR_SOC#316
VDDCR_SOC#317
VDDCR_SOC#318
VDDCR_SOC#319
VDDCR_SOC#320
VDDCR_SOC#321
VDDCR_SOC#322
VDDCR_SOC#323
VDDCR_SOC#324
VDDCR_SOC#325
VDDCR_SOC#326
VDDCR_SOC#327
VDDCR_SOC#328
VDDCR_SOC#329
VDDCR_SOC#330
VDDCR_SOC#331
VDDCR_SOC#332
VDDCR_SOC#333
VDDCR_SOC#334
VDDCR_SOC#335
VDDCR_SOC#336
VDDCR_SOC#337
VDDCR_SOC#338
VDDCR_SOC#339
VDDCR_SOC#340
VDDCR_SOC#341
VDDCR_SOC#342
VDDCR_SOC#343
VDDCR_SOC#344
VDDCR_SOC#345
VDDCR_SOC#346
VDDCR_SOC#347
VDDCR_SOC#348
VDDCR_SOC#349
VDDCR_SOC#350
VDDCR_SOC#351
VDDCR_SOC#352
VDDCR_SOC#353
VDDCR_SOC#354
VDDCR_SOC#355
VDDCR_SOC#356
VDDCR_SOC#357
VDDCR_SOC#358
VDDCR_SOC#359
VDDCR_SOC#360
VDDCR_SOC#361
VDDCR_SOC#362
VDDCR_SOC#363
VDDCR_SOC#364
VDDCR_SOC#365
VDDCR_SOC#366
VDDCR_SOC#367
VDDCR_SOC#368
VDDCR_SOC#369
VDDCR_SOC#370
VDDCR_SOC#371
VDDCR_SOC#372
VDDCR_SOC#373
VDDCR_SOC#374
VDDCR_SOC#375
VDDCR_SOC#376
VDDCR_SOC#377
VDDCR_SOC#378
VDDCR_SOC#379
VDDCR_SOC#380
VDDCR_SOC#381
VDDCR_SOC#382
VDDCR_SOC#383
VDDCR_SOC#384
VDDCR_SOC#385
VDDCR_SOC#386
VDDCR_SOC#387
VDDCR_SOC#388
VDDCR_SOC#389
VDDCR_SOC#390

REV 0.90

22/22

VDD_080_EFUSE#1

VDD_080_EFUSE#2
VDDAN_Q_EFUSE#1
VDDAN_Q_EFUSE#2

REV0.90

VDD_080#10

VDDAN_C_EFUSE = 0.8/0.9
VDDAN_Q_EFUSE = 1.8

VDD_080#1
VDD_080#2
VDD_080#3
VDD_080#4
VDD_080#5
VDD_080#6
VDD_080#7
VDD_080#8
VDD_080#9

+VGPU_CORE+VGPU_CORE

AD17
AD18
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AD32
AD33
AD34
AD35
AD36
AD39
AD43
AD45
AE13
AE14
AE17
AE18
AE45
AF17
AF18
AF45
AG17
AG18
AG19
AG20
AG21
AG22
AG23
AG24
AG25
AG26
AG27
AG28
AG29
AG30
AG31
AG32
AG33
AG34
AG35
AG36
AG37
AG41
AG45
AH18
AH19
AH20
AH21
AH22
AH23
AH24
AH25
AH26
AH27
AH28
AH29
AH30
AH31
AH32
AH33
AH34
AH35
AH36
AH39
AH43
AH45
AJ45
AK45
AL41
AL45
AM39
AM43
AM44
AM45
AN43
AN44
AN45
AP42
AP43
AP44
AP45
AR41
AR42
AR43
AR44
AT39
AT40
AT41
AT42
AU38
AU39
AU40
AU41

AL7
AM8
AP8
AT8
AV4
AV7
AV10
AW3
AW6
AW9

AK8
AK9
AF8
AF9

6.75A

+VDDCI_GFX +VDD_GFX

U26J

AL17

VDDCI_MEM#1

AL20

VDDCI_MEM#2

AL23

VDDCI_MEM#3

AL26

VDDCI_MEM#4

AL29

VDDCI_MEM#5

AL32

VDDCI_MEM#6

AL35

VDDCI_MEM#7

AM19

VDDCI_MEM#8

AM22

VDDCI_MEM#9

AM25

47.3A

VDDCI_MEM#10

AM28

VDDCI_MEM#11

AM31

+VDD_GFX

VDDCI_MEM#12

AM34

VDDCI_MEM#13

AP16

VDDIO_MEM#1

AP30

VDDIO_MEM#2

AR19

VDDIO_MEM#3

AR22

VDDIO_MEM#4

AR25

VDDIO_MEM#5

AR28

VDDIO_MEM#6

AR31

VDDIO_MEM#7

AT17

VDDIO_MEM#8

AT18

VDDIO_MEM#9

AT21

VDDIO_MEM#10

AT24

VDDIO_MEM#11

AT27

VDDIO_MEM#12

AT30

VDDIO_MEM#13

AT33

VDDIO_MEM#14

AU19

VDDIO_MEM#15

AU24

VDDIO_MEM#16

AV24

VDDIO_MEM#17

AV26

VDDIO_MEM#18

AV27

VDDIO_MEM#19

AW30

VDDIO_MEM#20

AW33

VDDIO_MEM#21

AW36

VDDIO_MEM#22

AY24

VDDIO_MEM#23

AY32

VDDIO_MEM#24

AY35

VDDIO_MEM#25

AY38

VDDIO_MEM#26

BB33

VDDIO_MEM#27

BB35

VDDIO_MEM#28

BB36

VDDIO_MEM#29

BB39

VDDIO_MEM#30

EV@R17M-E2-90_2013P

FB_VDDIO_MEM_HBM

FB_VDDIO_MEM_GPU

+VGPU_CORE +VGPU_CORE +VGPU_CORE+VGPU_CORE

6.75A

+0.8V_GFX

C121 EV@10u/6.3V_4
C132 EV@10u/6.3V_4
C103 EV@10u/6.3V_4

C144 EV@1u/6.3V_4
C92 EV @1u/6.3V_4
C88 EV @1u/6.3V_4
C79 EV @1u/6.3V_4
C84 EV @1u/6.3V_4

+1.8V_GFX

C119
EV@1u/6.3V_4

10/22

AP18

VDDCR_HBM#1

AP19

VDDCR_HBM#2

AP21

VDDCR_HBM#3

AP22

VDDCR_HBM#4

AP24

VDDCR_HBM#5

AP25

VDDCR_HBM#6

AP27

VDDCR_HBM#7

AP28

VDDCR_HBM#8

AP33

VDDCR_HBM#9

AR34

VDDCR_HBM#10

AT16

VDDCR_HBM#11

AU18

VDDCR_HBM#12

AU21

VDDCR_HBM#13

AU22

VDDCR_HBM#14

AW25

VDDCR_HBM#15

AW28

VDDCR_HBM#16

AW37

VDDCR_HBM#17

AY27

VDDCR_HBM#18

BA33

VDDCR_HBM#19

AK16

FB_VDDCI_MEM

FB_VDDCR_HBM

BA29

BA28

AY29

BD26

VPP#1

BE26

VPP#2

BE27

VPP#3

REV0.90

C308 EV@1u/6.3V_4
C379 EV@1u/6.3V_4
C336 EV@1u/6.3V_4
C210 EV@1u/6.3V_4
C228 EV@1u/6.3V_4
C175 EV@1u/6.3V_4
C427 EV@1u/6.3V_4
C176 EV@1u/6.3V_4
C389 EV@1u/6.3V_4
C315 EV@1u/6.3V_4

C413 EV@1u/6.3V_4
C208 EV@1u/6.3V_4
C227 EV@1u/6.3V_4
C223 EV@1u/6.3V_4
C173 EV@1u/6.3V_4
C229 EV@1u/6.3V_4
C194 EV@1u/6.3V_4
C365 EV@1u/6.3V_4
C192 EV@1u/6.3V_4
C295 EV@1u/6.3V_4

C351 EV@1u/6.3V_4
C265 EV@1u/6.3V_4
C375 EV@1u/6.3V_4
C304 EV@1u/6.3V_4
C217 EV@1u/6.3V_4
C361 EV@1u/6.3V_4
C266 EV@1u/6.3V_4
C290 EV@1u/6.3V_4
C287 EV@1u/6.3V_4
C232 EV@1u/6.3V_4

C303 EV@1u/6.3V_4
C222 EV@1u/6.3V_4
C202 EV@1u/6.3V_4
C418 EV@1u/6.3V_4
C424 EV@1u/6.3V_4
C425 EV@1u/6.3V_4
C404 EV@1u/6.3V_4
C423 EV@1u/6.3V_4
C354 EV@1u/6.3V_4
C421 EV@1u/6.3V_4

C339 EV@1u/6.3V_4
C377 EV@1u/6.3V_4
C352 EV@1u/6.3V_4
C302 EV@1u/6.3V_4
C233 EV@1u/6.3V_4
C359 EV@1u/6.3V_4
C164 EV@1u/6.3V_4
C201 EV@1u/6.3V_4
C286 EV@1u/6.3V_4
C147 EV@1u/6.3V_4

C260 EV@1u/6.3V_4
C172 EV@1u/6.3V_4
C367 EV@1u/6.3V_4
C368 EV@1u/6.3V_4
C328 EV@1u/6.3V_4
C329 EV@1u/6.3V_4
C333 EV@1u/6.3V_4
C332 EV@1u/6.3V_4
C200 EV@1u/6.3V_4
C419 EV@1u/6.3V_4

FB_VDDCR

R512 *Short_4

FB_VDDIO_H

R523 *Short_4

FB_VDDIO_G

R500 *Short_4

2017.09.01

2.1

A

followAMD sugg est follow CRB the resister is fully connected.
Not followcheck list only mount FB_VDDIO_H p ath.

+VPP_GFX

PUT ALL CAP ON TOP

+VDD_GFX

+VPP_GFX

C831 EV@22u/6.3V_6

C827 EV@1u/6.3V_4
C826 EV@1u/6.3V_4
C828 EV@1u/6.3V_4

+VPP_GFX decoupling caps
1uF *3
22uF*1

C212 EV@1u/6.3V_4
C394 EV@1u/6.3V_4
C355 EV@1u/6.3V_4
C197 EV@1u/6.3V_4
C392 EV@1u/6.3V_4
C193 EV@1u/6.3V_4
C428 EV@1u/6.3V_4
C314 EV@1u/6.3V_4
C412 EV@1u/6.3V_4
C207 EV@1u/6.3V_4

C316 EV@1u/6.3V_4
C231 EV@1u/6.3V_4
C196 EV@1u/6.3V_4
C249 EV@1u/6.3V_4
C195 EV@1u/6.3V_4
C366 EV@1u/6.3V_4
C177 EV@1u/6.3V_4
C296 EV@1u/6.3V_4
C174 EV@1u/6.3V_4
C259 EV@1u/6.3V_4

C382 EV@1u/6.3V_4
C426 EV@1u/6.3V_4
C369 EV@1u/6.3V_4
C378 EV@1u/6.3V_4
C252 EV@1u/6.3V_4
C381 EV@1u/6.3V_4
C253 EV@1u/6.3V_4
C306 EV@1u/6.3V_4
C288 EV@1u/6.3V_4
C235 EV@1u/6.3V_4

C203 EV@1u/6.3V_4
C216 EV@1u/6.3V_4
C402 EV@1u/6.3V_4
C376 EV@1u/6.3V_4
C401 EV@1u/6.3V_4
C400 EV@1u/6.3V_4 C540 EV@22u/6.3V_6
C395 EV@1u/6.3V_4
C422 EV@1u/6.3V_4
C321 EV@1u/6.3V_4
C398 EV@1u/6.3V_4

C165 EV@1u/6.3V_4
C380 EV@1u/6.3V_4
C284 EV@1u/6.3V_4
C285 EV@1u/6.3V_4
C213 EV@1u/6.3V_4
C356 EV@1u/6.3V_4
C214 EV@1u/6.3V_4
C218 EV@1u/6.3V_4
C307 EV@1u/6.3V_4
C221 EV@1u/6.3V_4

FB_VDDCI [56]

FB_MVDD [52]

C117 EV@1u/6.3V_4
C70 EV @1u/6.3V_4
C99 EV @1u/6.3V_4
C89 EV @1u/6.3V_4
C28 EV @1u/6.3V_4
C104 EV@1u/6.3V_4
C118 EV@1u/6.3V_4
C52 EV @1u/6.3V_4
C30 EV @1u/6.3V_4
C34 EV @1u/6.3V_4

C26 EV @1u/6.3V_4
C44 EV @1u/6.3V_4
C101 EV@1u/6.3V_4
C46 EV @1u/6.3V_4
C24 EV @1u/6.3V_4
C23 EV @1u/6.3V_4
C78 EV @1u/6.3V_4
C82 EV @1u/6.3V_4
C97 EV @1u/6.3V_4
C20 EV @1u/6.3V_4

C100 EV@1u/6.3V_4
C74 EV @1u/6.3V_4
C50 EV @1u/6.3V_4
C90 EV @1u/6.3V_4
C85 EV @1u/6.3V_4
C80 EV @1u/6.3V_4
C45 EV @1u/6.3V_4
C75 EV @1u/6.3V_4
C83 EV @1u/6.3V_4
C51 EV @1u/6.3V_4

C37 EV @1u/6.3V_4

C139 EV@47u/6.3V_8
C258 EV@47u/6.3V_8
C297 EV@47u/6.3V_8
C256 EV@47u/6.3V_8
C204 EV@47u/6.3V_8
C905 EV@47u/6.3V_8
C335 EV@47u/6.3V_8
C155 EV@47u/6.3V_8
C186 EV@47u/6.3V_8
C184 EV@47u/6.3V_8

C187 EV@47u/6.3V_8
C185 EV@47u/6.3V_8
C156 EV@47u/6.3V_8
C138 EV@47u/6.3V_8
C160 EV@47u/6.3V_8
C206 EV@47u/6.3V_8
C159 EV@47u/6.3V_8
C220 EV@47u/6.3V_8
C158 EV@47u/6.3V_8
C846 EV@47u/6.3V_8

C902 EV@47u/6.3V_8
C883 EV@47u/6.3V_8
C885 EV@47u/6.3V_8
C879 EV@47u/6.3V_8
C884 EV@47u/6.3V_8
C874 EV@47u/6.3V_8
C330 EV@47u/6.3V_8
C845 EV@47u/6.3V_8
C331 EV@47u/6.3V_8
C876 EV@47u/6.3V_8

C140 EV@47u/6.3V_8
C951 EV@47u/6.3V_8
C537 EV@47u/6.3V_8
C538 EV@47u/6.3V_8
C157 EV@47u/6.3V_8
C904 EV@47u/6.3V_8
C261 EV@47u/6.3V_8
C536 EV@47u/6.3V_8
C875 EV@47u/6.3V_8
C843 EV@47u/6.3V_8

C530 EV@47u/6.3V_8
C533 EV@47u/6.3V_8
C205 EV@47u/6.3V_8
C531 EV@47u/6.3V_8
C337 EV@47u/6.3V_8
C534 EV@47u/6.3V_8
C532 EV@47u/6.3V_8
C327 EV@47u/6.3V_8
C273 EV@47u/6.3V_8
C535 EV@47u/6.3V_8

+VDD_GFX

+VDD_GFX

C105 EV@22u/6.3V_6
C35 EV @22u/6.3V_6
C22 EV @22u/6.3V_6
C40 EV @22u/6.3V_6
C53 EV @22u/6.3V_6
C32 EV @22u/6.3V_6
C81 EV @22u/6.3V_6
C76 EV @22u/6.3V_6
C72 EV @22u/6.3V_6

C114 EV@22u/6.3V_6
C71 EV @22u/6.3V_6
C91 EV @22u/6.3V_6
C102 EV@22u/6.3V_6
C77 EV @22u/6.3V_6
C115 EV@22u/6.3V_6
C73 EV @22u/6.3V_6
C60 EV @22u/6.3V_6
C98 EV @22u/6.3V_6

+VDD_GFX decoupling caps
1uF *31
22uF*18

+VGPU_CORE

C268 EV@22u/6.3V_6
C325 EV@22u/6.3V_6
C844 EV@22u/6.3V_6
C211 EV@22u/6.3V_6
C946 EV@22u/6.3V_6
C170 EV@22u/6.3V_6
C134 EV@22u/6.3V_6
C225 EV@22u/6.3V_6
C198 EV@22u/6.3V_6
C182 EV@22u/6.3V_6

C180 EV@22u/6.3V_6
C161 EV@22u/6.3V_6
C950 EV@22u/6.3V_6
C264 EV@22u/6.3V_6
C169 EV@22u/6.3V_6
C224 EV@22u/6.3V_6
C162 EV@22u/6.3V_6
C219 EV@22u/6.3V_6
C209 EV@22u/6.3V_6
C948 EV@22u/6.3V_6

C947 EV@22u/6.3V_6
C544 EV@22u/6.3V_6
C539 EV@22u/6.3V_6
C940 EV@22u/6.3V_6
C226 EV@22u/6.3V_6
C942 EV@22u/6.3V_6
C949 EV@22u/6.3V_6
C943 EV@22u/6.3V_6
C230 EV@22u/6.3V_6
C941 EV@22u/6.3V_6

C262 EV@22u/6.3V_6
C86 EV @22u/6.3V_6
C298 EV@22u/6.3V_6
C96 EV @22u/6.3V_6
C523 EV@22u/6.3V_6

C95 EV @22u/6.3V_6
C357 EV@22u/6.3V_6
C548 EV@22u/6.3V_6
C542 EV@22u/6.3V_6

C190 EV@22u/6.3V_6
C545 EV@22u/6.3V_6
C171 EV@22u/6.3V_6
C149 EV@22u/6.3V_6
C191 EV@22u/6.3V_6
C94 EV @22u/6.3V_6
C87 EV @22u/6.3V_6
C181 EV@22u/6.3V_6
C541 EV@22u/6.3V_6
C358 EV@22u/6.3V_6

+VDDCI_GFX

C122 EV@1u/6.3V_4
C141 EV@1u/6.3V_4
C142 EV@1u/6.3V_4
C135 EV@1u/6.3V_4
C143 EV@1u/6.3V_4
C128 EV@1u/6.3V_4
C125 EV@1u/6.3V_4
C129 EV@1u/6.3V_4
C126 EV@1u/6.3V_4
C137 EV@1u/6.3V_4

+VDDCI_GFX

C130 EV@22u/6.3V_6
C124 EV@22u/6.3V_6
C145 EV@22u/6.3V_6
C127 EV@22u/6.3V_6
C123 EV@22u/6.3V_6
C131 EV@22u/6.3V_6
C133 EV@22u/6.3V_6
C136 EV@22u/6.3V_6

+VDDCI_GFX decoupling caps
1uF *10
22uF*8

C168 EV@22u/6.3V_6
C528 EV@22u/6.3V_6
C543 EV@22u/6.3V_6
C417 EV@22u/6.3V_6
C183 EV@22u/6.3V_6
C405 EV@22u/6.3V_6
C167 EV@22u/6.3V_6
C406 EV@22u/6.3V_6
C151 EV@22u/6.3V_6
C363 EV@22u/6.3V_6

C271 EV@22u/6.3V_6
C148 EV@22u/6.3V_6
C547 EV@22u/6.3V_6
C150 EV@22u/6.3V_6
C527 EV@22u/6.3V_6
C350 EV@22u/6.3V_6
C546 EV@22u/6.3V_6
C326 EV@22u/6.3V_6
C93 EV @22u/6.3V_6
C263 EV@22u/6.3V_6

+VGPU_CORE decoupling caps
1uF *110
22uF *70
47uF *50

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

PROJECT :

Vega10 Power / GND

Vega10 Power / GND

Vega10 Power / GND

ZGX

ZGX

ZGX

17

17 59

17 59

17 59

1A

1A

1A

GPU(VGA)

HPD 󰵖󵙉󱌌󳂰CRB󵝏󱷘,
󴄳󱫣󳻲󲋛󱅠󱞴󳲯AMD󱉎󱂮VBIOS󱂰󱊼󱌸

+VDD_GFX +VDD_GFX

R535
EV@100_1%_4

R539
EV@100_1%_4

+3V_GFX

C839
EV@1u/6.3V_4

+3V_GFX

+1.8V_GFX

+1.8V_GFX

R556 EV@10K_1%_4
R549 EV@10K_1%_4
R550 EV@10K_1%_4

TP71
TP73
TP72
TP74
TP76
TP77
TP78
TP79

R111 *Short_4

TP88
TP1

TYPEC_DDI2_HPD[25,27]
TYPEC_DDI1_HPD[25,27]

EDP_HPD[23,24]
DP_HPD[22]

HDMI_HPD[21]

R52 *EV@4.7K_5%_4

1

TP4

1

TP7

R90 *EV@2.2K_5%_4
R96 *EV@2.2K_5%_4

R82 EV@1K_1%_4
R86 EV@1K_1%_4

R46
EV@100_1%_4

R47
EV@100_1%_4

TP12

1

VREFEXTAVREFEXTB

C116

EV@1u/6.3V_4

OSC_GAIN2

OSC_GAIN1

OSC_GAIN0

PINSTRAP_0

1

PINSTRAP_1

1

PINSTRAP_2

1

PINSTRAP_3

1

PINSTRAP_4

1

PINSTRAP_5

1

PINSTRAP_6

1

PINSTRAP_7

1

1
1

XTRIG6
XTRIG7

TEST_PG
TEST_PG_BACO

TS_A

U26Q

AR15

AR36

AP3
AP2
AP1

EV@R17M-E2-90_2013P

U26S

BB3

PINSTRAP_0

BB2

PINSTRAP_1

BB1

PINSTRAP_2

BA3

PINSTRAP_3

BA2

PINSTRAP_4

AY3

PINSTRAP_5

AY2

PINSTRAP_6

AY1

PINSTRAP_7

T37

TEST6

G7

HPD1

AL2

GENERICA

AV14

GENERICB

K5

GENERICC_HPD2

P6

GENERICD_HPD3

V5

GENERICE_HPD4

AC4

GENERICF_HPD5

AE4

GENERICG_HPD6

AN10

SCL

SCL

AM10

SDA

SDA

AD9

XTRIG6

AG9

XTRIG7

AJ11

TEST_PG

AV15

TEST_PG_BACO

AL10

TS_A

EV@R17M-E2-90_2013P

R510 LVPECL@130_1%_4

R514 EV@49.9_1%_4

17/22

REFCLKP

REFCLKN

VREFEXTA

VREFEXTB

OSC_GAIN2
OSC_GAIN1
OSC_GAIN0

REV0.90

XTALOUT

PLLCHARZ1_H

PLLCHARZ1_L

GPIO_0 selected by default for mobile
used as AC/DC switch indicator or fast
power reduction mechanism for desktop.

It is programmable through VBIOS.

19/22

GPIO_7_ROMSCK

GPIO_8_ROMSI

GPIO_9_ROMSO

GPIO_10_ROMCSB

BL_PWM_D IM

GENLK_VSYNC

SWAPLOCKA

SWAPLOCKB

REV0.90

BE22
BE23

AM1

XTALIN

AM3

AY26

AY25

GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6

GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_18
GPIO_19
GPIO_20

GPIO_SVC0
GPIO_SVD0
GPIO_SVT0

BL_ENABLE

GENLK_CLK

MACO_EN

DIGON

ANALOGIO

REFCLKP

REFCLKN

CLKTESTA

CLKTESTB

+3V_GFX

+3V_GFX

R646
EV@10K_1%_4

GPU_GPIO0

T8

1

U7

TP19

1

V7

TP17

1

AG8

TP14

GPU_GPIO4

AG7

GPU_GPIO5

AE7

1

AE8

TP15

GPIO_7_ROMSCK_C

W7

GPIO_8_ROMSI_C

W8

GPIO_9_ROMSO_C

V6

GPIO_10_ROMCS#_C

Y7

GPIO_11

AL4

GPIO_12

AL5

GPIO_13

AM6

GPIO_14

1

AM5
AR4
AR5
AR6
AT4
AT5
AT6

V9
T9
U8

AU14
AV16

R7
R8

T5
T6

AT12

AV17

AJ7

R502 *Short_4

R501 *Short_4

R511 LVPECL@130_1%_4

R515 EV@49.9_1%_4

C830 EV@0.1u/16V_4

C829 EV@0.1u/16V_4

TP9

GPIO_15
GPIO_16_VDDCR_IO_VID0
GPIO_17_VDDCR_IO_VID1
GPIO_18
GPIO_19

GPU_SVC_C
GPU_SVD_C

GENLK_CLK
GENLK_VSYNC

SWAP_LOCK_A
SWAP_LOCK_B

MACO_EN

1

ANALOGIO

R562

EV@1M_1%_4

2

Power side PU

1

Q57

EV@2N7002K

R636 EV@33_1%_4
R630 EV@33_1%_4
R134 EV@33_1%_4
R633 EV@33_1%_4
R640 *EV@5.1K_1%_4

33R near Flash

R656 *Short_4
R664 *Short_4

R659 *EV@10K_1%_4

R667 EV@10K_1%_4

EDP_DISP_BLEN [24,41]
EDP_DISP_PWM [24]

1

TP18

1

TP20

1

TP22

1

TP21

1

TP3

EDP_DISP_ON [24]

TP13

100MHZ_OUTN

100MHZ_OUTP

+3V_GFX+3V_GFX

EVGA-XTALI

EV@27MHZ/10ppm

EVGA-XTALO

CLKTESTA_C

R509 EV@51.1_1%_4

CLKTESTB_C

R508 EV@51.1_1%_4

Make sure they are accessible Avoid noisy area

3

R1020 *Short_4

OUT OUT#

4 6

GND

1

2

Y3

4

3

ACIN [18,41,42]

GPIO_7_ROMSCK
GPIO_8_ROMSI
GPIO_9_ROMSO
GPIO_10_ROMCS#

+3V_GFX

NA

R661 EV@10K_1%_4R64 *EV@4.7K_5%_4

R665 *EV@10K_1%_4

VID Override table (+VDD_GFX)

SVC

SVD Boot Volt age

0 0

10

1 0

1 1

100M XTAL power 3V

100MHz
BF710000049
BF710000050

Y1
EV@100Mhz/25ppm

VDD

13

C823

OE

NC

2 5

EV@0.1u/25V_4

C878EV@4.7p/50V_4

C870EV@5.6p/50V_4

PDID ; MVDD (RSV)

VDDCR_SOC & VDDCR_MEM PCC (High)

VR HOT

VR HOT

ROM Control; ROMSCK

ROM Control; ROMSO

ROM Control; ROMSI

ROM COntrol; ROMSCB / Pinstrap

Pinstrap

Pinstrap

Pinstrap

ROM Control: Write Protect

Pinstrap / AC-DC switch

Pinstrap / VDDCR_IO PVID[0]

Pinstrap / VDDCR_IO PVID[1]

Pinstrap

Pinstrap

GPU_SVC [52]
GPU_SVD [52]
GPU_SVT [52]

+1.8V_GFX

1.1V

1.0V

0.9V

0.8V

L35

EV@BLM15AG121SN1D

1 2

C824
EV@4.7u/6.3V_4

+3V_GFX

GPU_GPIO4

GPU_GPIO5

+3V_GFX

+3V_GFX

User

R89
EV@10K_1%_4

R101
EV@10K_1%_4

R541 EV@5.1K_1%_4

R543 EV@5.1K_1%_4

R68 EV@5.1K_1%_4

R51 EV@5.1K_1%_4

R536 EV@5.1K_1%_4

R534 *EV@5.1K_1%_4

R532 *EV@5.1K_1%_4

DCE BIF

R67 *EV@5.1K_1%_4

R75 *EV@5.1K_1%_4

R42 EV@5.1K_1%_4

R63 EV@5.1K_1%_4

R45 EV@5.1K_1%_4

R531 *EV@5.1K_1%_4

R528 EV@5.1K_1%_4

R526 *EV@5.1K_1%_4

SMU Platform

R38 EV@5.1K_1%_4

R632 *EV@5.1K_1%_4

R1023 *Short_4

Q79A

2

EV@2N7002KDW

1

6

R83
*EV@0_5%_4

5

Q79B
EV@2N7002KDW

3 4

R1018
*EV@0_5%_4

+3V

R1021
*EV@10K_1%_4

GPU_THROTTLING# [41,42,59]

+3V

R1022
EV@10K_1%_4

GPU_THROTTLING#_GPIO5 [41,53,55]

+1.8V_GFX +3V_GFX

R540 *EV@5.1K_1%_4

R542 *EV@5.1K_1%_4

R72 *EV@5.1K_1%_4

R50 *EV@5.1K_1%_4

R538 *EV@5.1K_1%_4

R537 EV@5.1K_1%_4

R533 EV@5.1K_1%_4

R69 EV@5.1K_1%_4

R71 EV@5.1K_1%_4

R41 *EV@5.1K_1%_4

R56 *EV@5.1K_1%_4

R44 *EV@5.1K_1%_4

R529 EV@5.1K_1%_4

R530 *EV@5.1K_1%_4

R527 EV@5.1K_1%_4

R37 *EV@5.1K_1%_4

R642 EV@5.1K_1%_4

ACIN [18,41,42]

EC side GPU_THROTTLING# & GPU_THROTTLING#_GPIO5 connect together,
R1021/R1022 only need one PU.

PINSTRAP_6

PINSTRAP_7

GPIO_13

GPIO_15

PINSTRAP_5

PINSTRAP_4

PINSTRAP_3

GPIO_12

GPIO_11

GPIO_18

GPIO_17_VDDCR_I O_VID1

GPIO_16_VDDCR_I O_VID0

PINSTRAP_2

PINSTRAP_1

PINSTRAP_0

GPIO_19

GPIO_10_ROMCS#

GPIO_10_ROMCS#
GPIO_9_ROMSO

+3V_GFX

Note: Internal PU/PD at GPIO pad is ~40k

Internal
default
Value

L

L

L

L

L
H
H

H
H

L
L
L

H
L
H

L

H

1
2
3

STRAP_BIF_GEN3_DIS_A

0

0: PCIe GEN 3 supported

1: PCIe GEN 3 not supported

PINSTRAP_BIF_CLK_PM_EN

0

0: CLKREQ# power management capability is disabled

1: CLKREQ# power management capability is enabled

PINSTRAP_BIF_LC_TX_SWING

0

PINSTRAP_BIF_VGA_DIS

0

0: VGA controller capacity enabled

1: The device won't be recognised as the system's VGA controller

0

PINSTRAP_AUD_PORT_CONN[2:0]

Number of audio-capable display outputs

0

0: All endpoints connected

1: 6 endpoints connected

2: 5 endpoints connected

0

3: 4 endpoints connected

0

PINSTRAP_AUD[1:0]

1: Audio for DisplayPort only

0

2: Audio for DisplayPort and HDMI if dongle is detected

3: Audio for DisplayPort and native HDMI

0

PINSTRAP_BOARD_CONFIG[2:0]

TBD

0

0

1

PINSTRAP_ROM_CONFIG[2:0]

100 - 512KBIT (ST) M25P05A

101 - 1MBIT (ST) (M25P10A)

0

101 - 2MBIT (ST) M25P20

101 - 4MBIT (ST) M25P40

101 - 8MBIT (ST) M25P80

1

100 - 512KBIT (CHINGIS) PM25LV512

101 - 1MBIT (CHINGIS) PM25LV010

PINSTRAP_SMBUS_ADDR

0

0: 0x41h

1: 0x40h

PINSTRAP_BIOS_ROM_EN

1

0: Disable the external BIOS ROM device

1: Enable the external BIOS ROM device

U10

CE#

VDD

SO

HOLD#

WP#

SCK

VSS4SI

EV@W25X40CLSNIG

Definition

+3V_GFX

8
7
6
5

4: 3 endpoints connected

5: 2 endpoints connected

6: 1 endpoint connected

7: 0 endpoints connected

18

GPIO_7_ROMSCK
GPIO_8_ROMSI

C567
EV@0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet of

Tuesday, June 26, 2018

Date: Sheet

PROJECT :

Vega10 GPIO, EXTRA

Vega10 GPIO, EXTRA

Vega10 GPIO, EXTRA

ZGX

ZGX

ZGX

of

18 59

18 59

18 59

1A

1A

1A