Acer Predator Helios 300 G3-571 Schematic

Page 1
A
1 1
2 2
B
C
D
E
Compal Confidential
C5PRH MB Schematic Document
LA-E921P
3 3
Rev:1.A
2017.03.29
4 4
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Cover&Sheet
Cover&Sheet
Cover&Sheet
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
173Friday, March 31, 2017
173Friday, March 31, 2017
173Friday, March 31, 2017
E
1.A
1.A
1.A
Page 2
A
HDMI Conn.
eDP
B
C
D
E
Fan Control*2
page 42
Interleaved Memory
page 30
1 1
eDP
Kabylake H PROCESSOR BGA1440
HDMI x 4 lanes
Nvidia N17E-G1 with gDDR5 x6
page 23 ~34
PEG x16 8GT/s
(42X28) (SKL-H_4+2)
Processor
page 06 ~13
Memory BUS
Dual Channel
1.2V DDR4 1333/1600
260 pin DDR4-SO-DIMM X1
BANK 0, 1, 2, 3
page 14
260pin DDR4-SO-DIMM X1
BANK 4, 5, 6, 7
page 15
NGFF
WLAN
USB port 7
2 2
page 37
PCIE 2.0 5GT/s
port 3
Card Reader
3 3
page 34
PCIE 3.0 x4 8GT/s
Port 9-12
page 32
PCIE 2.0 5GT/s
port 4
LAN(GbE)
Realtek 8411B
RJ45 conn.
page 32.
SATA Re-Driver
PARADE PS8527
SATA HDD Conn.
page 38
Flexible IO
page 38
SATA3.0
6.0 Gb/s
port 3
Skylake PCH - H FCBGA(23X23)
837pin FCBGA
LPC/eSPI BUS
CLK= 24 MH z
ENE KB9022/9032
page 39
X4 DMI
TPM
USBx8
HD Audio
page 16 ~22
page 41
USB 3.0 conn x1
USB (port 1,2)
48MH z
page 36 page 30
3.3V 24MHz
SPI
RTC CKT.
page 21
Power On/Off CKT.
page 41
DC/DC Interface CKT.
4 4
page 43
Power Circuit DC/DC
page 44 ~61
A
Sub Board
LS-E921P HS/B
LS-E922P USB2/B
page 33
page 33
Touch Pad Int.KBD
PS2 / I2C
Issued D ate
Issued D ate
Issued D ate
page 41
page 41
Security Classification
Security Classification
Security Classification
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
SPI ROM x1
page 17
Compal Secret Data
Compal Secret Data
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
USB 3.0 Type-C x1
USB/B
D
(port 3)
page 35
Int. Speaker
CMOS Camera
USB (port 9)
Finger_Print
USB (port 11)
page 31
HDA Codec
ALC255
page 40
Int. DMIC
page 40
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
on Sub/B
page 33 page 33
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
UAJ
on Sub/B
E
273Friday, March 31, 2017
273Friday, March 31, 2017
273Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 3
A
1 1
B
C
D
E
REV = 1
SKYLAKE_H ALO
BGA1 440
4 OF 14
EDP_TXP[0] EDP_TXN[0] EDP_TXP[1] EDP_TXN[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXP EDP_AUXN
EDP_DISP_UTIL
EDP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
D29 E29 F28 E28 B29 A29 B28 C28
C26 B26
A33
EDP_COMP
D37
CAD note: Trace width=20 mils,Spa cing=25mil,Max length=100mils
G27 G25
CPU_DISPA_SDI
G29
EDP_TXP0 <36> EDP_TXN0 <36> EDP_TXP1 <36> EDP_TXN1 <36> EDP_TXN2 <36> EDP_TXP2 <36> EDP_TXN3 <36> EDP_TXP3 <36>
EDP_AUXP <36>
EDP_AUXN <36>
RC2
20_0402_5%
<eDP>
+1.0VS_VCCIO
12
RC124.9_0402_1%
CPU_DISPA_BCLK <19 >
12
CPU_DISPA_SDO <19 >
CPU_DISPA_SDI_R <19>
Close to CPU
CPU_XDP_TMS<10,19> CPU_XDP_TDI<10,19>
CPU_XDP_TDO<10,19> CPU_XDP_TCK0<10,19> PCH_JTAG_TCK1<19>
CPU_XDP_TMS CPU_XDP_TDI
CPU_XDP_TDO CPU_XDP_TCK0 PCH_JTAG_TCK1
If need debug from usb port. this cmc@ need pop
+1.0VS_VCCSTG
TMS/TDI pin CPU on-die termination
2 2
Place to PCH side
Place to CPU side
3 3
UC1
SR32S 2.5G
SA0000AD850
RC5 51_0402_5%CMC@
RC6 51_0402_5%CMC@
RC7 100_0402_1%CMC@
RC14 51_0402_5%@
+1.0VS_VCCSTG
RC8 100_0402_1%CMC@
RC13 51_0402_5%CMC@
GL82HM175 SR30W
SA0000ADB30
12
12
1 2
12
1 2
12
UH1
CPU_XDP_TMS
CPU_XDP_TDI
CPU_XDP_TDO
PCH_JTAG_TCK1
CPU_XDP_TDO
CPU_XDP_TCK0
UG1
N17E-G1 R1
SA00009PM10
K36
DDI1_TXP[0]
K37
DDI1_TXN[0]
J35
DDI1_TXP[1]
J34
DDI1_TXN[1]
H37
DDI1_TXP[2]
H36
DDI1_TXN[2]
J37
DDI1_TXP[3]
J38
DDI1_TXN[3]
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP[0]
H33
DDI2_TXN[0]
F37
DDI2_TXP[1]
G38
DDI2_TXN[1]
F34
DDI2_TXP[2]
F35
DDI2_TXN[2]
E37
DDI2_TXP[3]
E36
DDI2_TXN[3]
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP[0]
D34
DDI3_TXN[0]
B36
DDI3_TXP[1]
B34
DDI3_TXN[1]
F33
DDI3_TXP[2]
E33
DDI3_TXN[2]
C33
DDI3_TXP[3]
B33
DDI3_TXN[3]
A27
DDI3_AUXP
B27
DDI3_AUXN
SKL-H_BGA1440
@
UC1D
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal&Electronics,&Inc.
SKL-H(1/9)DDI,EDP
SKL-H(1/9)DDI,EDP
SKL-H(1/9)DDI,EDP
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
E
1.A
1.A
773Friday, March 31, 2017
773Friday, March 31, 2017
773Friday, March 31, 2017
1.A
of
of
of
Page 4
A
B
C
D
E
Interleaved Memory
DDR_A_D[0..15]<15>
1 1
DDR_A_D[16..31]<15>
DDR_A_D[32..47]<15>
2 2
DDR_A_D[48..63]<15>
3 3
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
UC1A
BR6
DDR0_DQ[0]
BT6
DDR0_DQ[1]
BP3
DDR0_DQ[2]
BR3
DDR0_DQ[3]
BN5
DDR0_DQ[4]
BP6
DDR0_DQ[5]
BP2
DDR0_DQ[6]
BN3
DDR0_DQ[7]
BL4
DDR0_DQ[8]
BL5
DDR0_DQ[9]
BL2
DDR0_DQ[10 ]
BM1
DDR0_DQ[11]
BK4
DDR0_DQ[12 ]
BK5
DDR0_DQ[13 ]
BK1
DDR0_DQ[14 ]
BK2
DDR0_DQ[15 ]
BG4
DDR0_DQ[16] /DDR0_DQ[32]
BG5
DDR0_DQ[17] /DDR0_DQ[33]
BF4
DDR0_DQ[18] /DDR0_DQ[34]
BF5
DDR0_DQ[19] /DDR0_DQ[35]
BG2
DDR0_DQ[20] /DDR0_DQ[36]
BG1
DDR0_DQ[21] /DDR0_DQ[37]
BF1
DDR0_DQ[22] /DDR0_DQ[38]
BF2
DDR0_DQ[23] /DDR0_DQ[39]
BD2
DDR0_DQ[24] /DDR0_DQ[40]
BD1
DDR0_DQ[25] /DDR0_DQ[41]
BC4
DDR0_DQ[26] /DDR0_DQ[42]
BC5
DDR0_DQ[27] /DDR0_DQ[43]
BD5
DDR0_DQ[28] /DDR0_DQ[44]
BD4
DDR0_DQ[29] /DDR0_DQ[45]
BC1
DDR0_DQ[30] /DDR0_DQ[46]
BC2
DDR0_DQ[31] /DDR0_DQ[47]
AB1
DDR0_DQ[32] /DDR1_DQ[0]
AB2
DDR0_DQ[33] /DDR1_DQ[1]
AA4
DDR0_DQ[34] /DDR1_DQ[2]
AA5
DDR0_DQ[35] /DDR1_DQ[3]
AB5
DDR0_DQ[36] /DDR1_DQ[4]
AB4
DDR0_DQ[37] /DDR1_DQ[5]
AA2
DDR0_DQ[38] /DDR1_DQ[6]
AA1
DDR0_DQ[39] /DDR1_DQ[7]
V5
DDR0_DQ[40] /DDR1_DQ[8]
V2
DDR0_DQ[41] /DDR1_DQ[9]
U1
DDR0_DQ[42] /DDR1_DQ[10]
U2
DDR0_DQ[43 ]/DDR1_DQ[11]
V1
DDR0_DQ[44] /DDR1_DQ[12]
V4
DDR0_DQ[45] /DDR1_DQ[13]
U5
DDR0_DQ[46] /DDR1_DQ[14]
U4
DDR0_DQ[47] /DDR1_DQ[15]
R2
DDR0_DQ[48] /DDR1_DQ[32]
P5
DDR0_DQ[49] /DDR1_DQ[33]
R4
DDR0_DQ[50] /DDR1_DQ[34]
P4
DDR0_DQ[51] /DDR1_DQ[35]
R5
DDR0_DQ[52] /DDR1_DQ[36]
P2
DDR0_DQ[53] /DDR1_DQ[37]
R1
DDR0_DQ[54] /DDR1_DQ[38]
P1
DDR0_DQ[55] /DDR1_DQ[39]
M4
DDR0_DQ[56] /DDR1_DQ[40]
M1
DDR0_DQ[57] /DDR1_DQ[41]
L4
DDR0_DQ[58] /DDR1_DQ[42]
L2
DDR0_DQ[59] /DDR1_DQ[43]
M5
DDR0_DQ[60] /DDR1_DQ[44]
M2
DDR0_DQ[61] /DDR1_DQ[45]
L5
DDR0_DQ[62] /DDR1_DQ[46]
L1
DDR0_DQ[63] /DDR1_DQ[47]
BA2
DDR0_ECC[0]
BA1
DDR0_ECC[1]
AY4
DDR0_ECC[2]
AY5
DDR0_ECC[3]
BA5
DDR0_ECC[4]
BA4
DDR0_ECC[5]
AY1
DDR0_ECC[6]
AY2
DDR0_ECC[7]
DDR CHANNEL A
SKL-H_BGA1440
REV = 1
@
SKYLAKE_HAL O
BGA1440
DDR0_BA[0]/D DR0_CAB[4]/DDR0 _BA[0] DDR0_BA[1]/D DR0_CAB[6]/DDR0 _BA[1] DDR0_BA[2]/D DR0_CAA[5]/DDR0 _BG[0]
DDR0_RAS#/DD R0_CAB[3]/DDR0 _MA[16]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_CAS#/DD R0_CAB[1]/DDR0 _MA[15]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[15]/ DDR0_CAA[8]/DDR0 _ACT#
DDR0_DQSN[2]/D DR0_DQSN[4] DDR0_DQSN[3]/D DR0_DQSN[5] DDR0_DQSP[4]/D DR1_DQSP[0] DDR0_DQSP[5]/D DR1_DQSP[1] DDR0_DQSP[6]/D DR1_DQSP[4] DDR0_DQSP[7]/D DR1_DQSP[5]
DDR0_DQSP[2]/D DR0_DQSP[4] DDR0_DQSP[3]/D DR0_DQSP[5] DDR0_DQSN[4]/D DR1_DQSN[0] DDR0_DQSN[5]/D DR1_DQSN[1] DDR0_DQSN[6]/D DR1_DQSN[4] DDR0_DQSN[7]/D DR1_DQSN[5]
1 OF 14
DDR0_CKP[0] DDR0_CKN[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CLKP[2]
DDR0_CLKN[2]
DDR0_CLKP[3]
DDR0_CLKN[3]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_CS#[2] DDR0_CS#[3]
DDR0_ODT[0] DDR0_ODT[1] DDR0_ODT[2] DDR0_ODT[3]
DDR0_MA[3] DDR0_MA[4]
DDR0_PAR
DDR0_ALERT#
DDR0_DQSN[0] DDR0_DQSN[1]
DDR0_DQSP[0] DDR0_DQSP[1]
DDR0_DQSP[8] DDR0_DQSN[8]
?
AG1 AG2 AK1 AK2 AL3 AK3 AL2 AL1
AT1 AT2 AT3 AT5
AD5 AE2 AD2 AE5
AD3 AE4 AE1 AD4
AH5 AH1 AU1
AH4 AG4 AD1
AH3 AP4 AN4 AP5 AP2 AP1 AP3 AN1 AN3 AT4 AH2 AN2 AU4 AE3 AU2 AU3
AG3 AU5
BR5 BL3 BG3 BD3 AB3 V3 R3 M3
BP5 BK3 BF3 BC3 AA3 U3 P3 L3
AY3 BA3
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK#1 DDR_A_CLK1
DDR_A_CKE0 DDR_A_CKE1
DDR_A_CS#0 DDR_A_CS#1
DDR_A_ODT0 DDR_A_ODT1
DDR_A_BA0 DDR_A_BA1 DDR_A_BG0
DDR_A_MA16 DDR_A_MA14 DDR_A_MA15
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_BG1 DDR_A_ACT#
DDR_A_PARITY DDR_A_ALERT#
DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_CLK0 <15> DDR_A_CLK#0 <15> DDR_A_CLK#1 <15> DDR_A_CLK1 <15>
DDR_A_CKE0 <15> DDR_A_CKE1 <15>
DDR_A_CS#0 <15> DDR_A_CS#1 <15>
DDR_A_ODT0 <15> DDR_A_ODT1 <15>
DDR_A_BA0 <15> DDR_A_BA1 <15> DDR_A_BG0 < 15>
DDR_A_MA16 <15> DDR_A_MA14 <15> DDR_A_MA15 <15>
DDR_A_MA0 <15> DDR_A_MA1 <15> DDR_A_MA2 <15> DDR_A_MA3 <15> DDR_A_MA4 <15> DDR_A_MA5 <15> DDR_A_MA6 <15> DDR_A_MA7 <15> DDR_A_MA8 <15> DDR_A_MA9 <15> DDR_A_MA10 <15> DDR_A_MA11 <15> DDR_A_MA12 <15> DDR_A_MA13 <15> DDR_A_BG1 < 15> DDR_A_ACT# <15>
DDR_A_PARITY <15> DDR_A_ALERT# <15>
DDR_A_DQS#0 <15> DDR_A_DQS#1 <15> DDR_A_DQS#2 <15> DDR_A_DQS#3 <15> DDR_A_DQS4 <15> DDR_A_DQS5 <15> DDR_A_DQS6 <15> DDR_A_DQS7 <15>
DDR_A_DQS0 <15> DDR_A_DQS1 <15> DDR_A_DQS2 <15> DDR_A_DQS3 <15> DDR_A_DQS#4 <15> DDR_A_DQS#5 <15> DDR_A_DQS#6 <15> DDR_A_DQS#7 <15>
DDR_B_D[0..15]<16>
DDR_B_D[16..31]<16>
DDR_B_D[32..47]<16>
DDR_B_D[48..63]<16>
close to CPU
DDR CHANNEL B
SKYLAKE_HAL O
BGA1440
DDR1_RAS#/DD R1_CAB[3]/DDR1 _MA[16]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_CAS#/DD R1_CAB[1]/DDR1 _MA[15]
DDR1_BA[0]/D DR1_CAB[4]/DDR1 _BA[0] DDR1_BA[1]/D DR1_CAB[6]/DDR1 _BA[1] DDR1_BA[2]/D DR1_CAA[5]/DDR1 _BG[0]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[15]/ DDR1_CAA[8]/DDR1 _ACT#
DDR1_DQSN[0]/D DR0_DQSN[2] DDR1_DQSN[1]/D DR0_DQSN[3] DDR1_DQSN[2]/D DR0_DQSN[6] DDR1_DQSN[3]/D DR0_DQSN[7] DDR1_DQSN[4]/D DR1_DQSN[2] DDR1_DQSN[5]/D DR1_DQSN[3]
DDR1_DQSP[0]/D DR0_DQSP[2] DDR1_DQSP[1]/D DR0_DQSP[3] DDR1_DQSP[2]/D DR0_DQSP[6] DDR1_DQSP[3]/D DR0_DQSP[7] DDR1_DQSP[4]/D DR1_DQSP[2] DDR1_DQSP[5]/D DR1_DQSP[3]
2 OF 14
DDR1_CKP[0] DDR1_CKN[0] DDR1_CKN[1]
DDR1_CKP[1]
DDR1_CLKP[2]
DDR1_CLKN[2]
DDR1_CLKP[3]
DDR1_CLKN[3]
DDR1_CKE[0]
DDR1_CKE[1]
DDR1_CKE[2]
DDR1_CKE[3]
DDR1_CS#[0]
DDR1_CS#[1]
DDR1_CS#[2]
DDR1_CS#[3]
DDR1_ODT[0] DDR1_ODT[1] DDR1_ODT[2] DDR1_ODT[3]
DDR1_MA[3] DDR1_MA[4]
DDR1_PAR
DDR1_ALERT#
DDR1_DQSN[6] DDR1_DQSN[7]
DDR1_DQSP[6] DDR1_DQSP[7]
DDR1_DQSP[8] DDR1_DQSN[8]
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
AM9 AN9 AM8 AM7 AM11 AM10 AJ10 AJ11
AT8 AT10 AT7 AT11
AF11 AE7 AF10 AE10
AF7 AE8 AE9 AE11
AH10 AH11 AF8
AH8 AH9 AR9
AJ9 AK6 AK5 AL5 AL6 AM6 AN7 AN10 AN8 AR11 AH7 AN11 AR10 AF9 AR7 AT9
AJ7 AR8
BP9 BL9 BG9 BC9 AC9 W9 R9 M9
BR9 BJ9 BF9 BB9 AA9 V9 P9 L9
AW9 AY9
BN13 BP13 BR13
DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK#1 DDR_B_CLK1
DDR_B_CKE0 DDR_B_CKE1
DDR_B_CS#0 DDR_B_CS#1
DDR_B_ODT0 DDR_B_ODT1
DDR_B_MA16 DDR_B_MA14 DDR_B_MA15
DDR_B_BA0 DDR_B_BA1 DDR_B_BG0
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_BG1 DDR_B_ACT#
DDR_B_PARITY DDR_B_ALERT#
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
+0.6V_VREFCA
+0.6V_B_VREFDQ
DDR_B_CLK0 <16> DDR_B_CLK#0 <16> DDR_B_CLK#1 <16> DDR_B_CLK1 <16>
DDR_B_CKE0 <16> DDR_B_CKE1 <16>
DDR_B_CS#0 <16> DDR_B_CS#1 <16>
DDR_B_ODT0 <16> DDR_B_ODT1 <16>
DDR_B_MA16 <16> DDR_B_MA14 <16> DDR_B_MA15 <16>
DDR_B_BA0 <16> DDR_B_BA1 <16> DDR_B_BG0 <16>
DDR_B_MA0 <16> DDR_B_MA1 <16> DDR_B_MA2 <16> DDR_B_MA3 <16> DDR_B_MA4 <16> DDR_B_MA5 <16> DDR_B_MA6 <16> DDR_B_MA7 <16> DDR_B_MA8 <16> DDR_B_MA9 <16> DDR_B_MA10 <16> DDR_B_MA11 <16> DDR_B_MA12 <16> DDR_B_MA13 <16> DDR_B_BG1 <16> DDR_B_ACT# <16>
DDR_B_PARITY <16> DDR_B_ALERT# <16>
DDR_B_DQS#0 <16> DDR_B_DQS#1 <16> DDR_B_DQS#2 <16> DDR_B_DQS#3 <16> DDR_B_DQS#4 <16> DDR_B_DQS#5 <16> DDR_B_DQS#6 <16> DDR_B_DQS#7 <16>
DDR_B_DQS0 <16> DDR_B_DQS1 <16> DDR_B_DQS2 <16> DDR_B_DQS3 <16> DDR_B_DQS4 <16> DDR_B_DQS5 <16> DDR_B_DQS6 <16> DDR_B_DQS7 <16>
+0.6V_VREFCA
+0.6V_B_VREFDQ
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
SM_RCOMP0
RC17121_0402_1% 12
SM_RCOMP1
12
RC1875_0402_1%
SM_RCOMP2
RC19100_0402_1% 12
UC1B
BT11
DDR1_DQ[0]/ DDR0_DQ[16]
BR11
DDR1_DQ[1]/ DDR0_DQ[17]
BT8
DDR1_DQ[2]/ DDR0_DQ[18]
BR8
DDR1_DQ[3]/ DDR0_DQ[19]
BP11
DDR1_DQ[4]/ DDR0_DQ[20]
BN11
DDR1_DQ[5]/ DDR0_DQ[21]
BP8
DDR1_DQ[6]/ DDR0_DQ[22]
BN8
DDR1_DQ[7]/ DDR0_DQ[23]
BL12
DDR1_DQ[8]/ DDR0_DQ[24]
BL11
DDR1_DQ[9]/ DDR0_DQ[25]
BL8
DDR1_DQ[10] /DDR0_DQ[26]
BJ8
DDR1_DQ[11]/ DDR0_DQ[27]
BJ11
DDR1_DQ[12] /DDR0_DQ[28]
BJ10
DDR1_DQ[13] /DDR0_DQ[29]
BL7
DDR1_DQ[14] /DDR0_DQ[30]
BJ7
DDR1_DQ[15] /DDR0_DQ[31]
BG11
DDR1_DQ[16] /DDR0_DQ[48]
BG10
DDR1_DQ[17] /DDR0_DQ[49]
BG8
DDR1_DQ[18] /DDR0_DQ[50]
BF8
DDR1_DQ[19] /DDR0_DQ[51]
BF11
DDR1_DQ[20] /DDR0_DQ[52]
BF10
DDR1_DQ[21] /DDR0_DQ[53]
BG7
DDR1_DQ[22] /DDR0_DQ[54]
BF7
DDR1_DQ[23] /DDR0_DQ[55]
BB11
DDR1_DQ[24] /DDR0_DQ[56]
BC11
DDR1_DQ[25] /DDR0_DQ[57]
BB8
DDR1_DQ[26] /DDR0_DQ[58]
BC8
DDR1_DQ[27] /DDR0_DQ[59]
BC10
DDR1_DQ[28] /DDR0_DQ[60]
BB10
DDR1_DQ[29] /DDR0_DQ[61]
BC7
DDR1_DQ[30] /DDR0_DQ[62]
BB7
DDR1_DQ[31] /DDR0_DQ[63]
AA11
DDR1_DQ[32] /DDR1_DQ[16]
AA10
DDR1_DQ[33] /DDR1_DQ[17]
AC11
DDR1_DQ[34] /DDR1_DQ[18]
AC10
DDR1_DQ[35] /DDR1_DQ[19]
AA7
DDR1_DQ[36] /DDR1_DQ[20]
AA8
DDR1_DQ[37] /DDR1_DQ[21]
AC8
DDR1_DQ[38] /DDR1_DQ[22]
AC7
DDR1_DQ[39] /DDR1_DQ[23]
W8
DDR1_DQ[40] /DDR1_DQ[24]
W7
DDR1_DQ[41] /DDR1_DQ[25]
V10
DDR1_DQ[42] /DDR1_DQ[26]
V11
DDR1_DQ[43] /DDR1_DQ[27]
W11
DDR1_DQ[44] /DDR1_DQ[28]
W10
DDR1_DQ[45] /DDR1_DQ[29]
V7
DDR1_DQ[46] /DDR1_DQ[30]
V8
DDR1_DQ[47] /DDR1_DQ[31]
R11
DDR1_DQ[48 ]
P11
DDR1_DQ[49 ]
P7
DDR1_DQ[50 ]
R8
DDR1_DQ[51 ]
R10
DDR1_DQ[52 ]
P10
DDR1_DQ[53 ]
R7
DDR1_DQ[54 ]
P8
DDR1_DQ[55 ]
L11
DDR1_DQ[56 ]
M11
DDR1_DQ[57 ]
L7
DDR1_DQ[58 ]
M8
DDR1_DQ[59 ]
L10
DDR1_DQ[60 ]
M10
DDR1_DQ[61 ]
M7
DDR1_DQ[62 ]
L8
DDR1_DQ[63 ]
AW11
DDR1_ECC[0]
AY11
DDR1_ECC[1]
AY8
DDR1_ECC[2]
AW8
DDR1_ECC[3]
AY10
DDR1_ECC[4]
AW10
DDR1_ECC[5]
AY7
DDR1_ECC[6]
AW7
DDR1_ECC[7]
G1
DDR_RCOMP[0]
H1
DDR_RCOMP[1]
J2
DDR_RCOMP[2]
SKL-H_BGA1440
REV = 1 ?
@
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
A
B
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Tit le
Tit le
Tit le
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
SKL-H(2/9)DDRIII
SKL-H(2/9)DDRIII
SKL-H(2/9)DDRIII
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Friday, March 31 , 2 017
Friday, March 31 , 2 017
Friday, March 31 , 2 017
1.A
1.A
1.A
73
73
73
8
8
8
of
of
E
of
Page 5
A
B
C
D
E
1 1
1 2
PEG_GTX_HRX_P15<24> PEG_GTX_HRX_N15<24>
PEG_GTX_HRX_P14<24> PEG_GTX_HRX_N14<24>
PEG_GTX_HRX_P13<24> PEG_GTX_HRX_N13<24>
PEG_GTX_HRX_P12<24> PEG_GTX_HRX_N12<24>
PEG_GTX_HRX_P11<24> PEG_GTX_HRX_N11<24>
PEG_GTX_HRX_P10<24> PEG_GTX_HRX_N10<24>
PEG_GTX_HRX_P9<24> PEG_GTX_HRX_N9<24>
PEG_GTX_HRX_P8<24>
2 2
3 3
PEG_GTX_HRX_N8<24>
PEG_GTX_HRX_P7<24> PEG_GTX_HRX_N7<24>
PEG_GTX_HRX_P6<24> PEG_GTX_HRX_N6<24>
PEG_GTX_HRX_P5<24> PEG_GTX_HRX_N5<24>
PEG_GTX_HRX_P4<24> PEG_GTX_HRX_N4<24>
PEG_GTX_HRX_P3<24> PEG_GTX_HRX_N3<24>
PEG_GTX_HRX_P2<24> PEG_GTX_HRX_N2<24>
PEG_GTX_HRX_P1<24> PEG_GTX_HRX_N1<24>
PEG_GTX_HRX_P0<24> PEG_GTX_HRX_N0<24>
CC6 0.22U_0201_6.3V6KVGA@
1 2
CC8 0.22U_0201_6.3V6KVGA@
1 2
CC10 0.22U_0201_6.3V6KVGA@
1 2
CC12 0.22U_0201_6.3V6KVGA@
1 2
CC14 0.22U_0201_6.3V6KVGA@
1 2
CC15 0.22U_0201_6.3V6KVGA@
1 2
CC3 0.22U_0201_6.3V6KVGA@
1 2
CC17 0.22U_0201_6.3V6KVGA@
1 2
CC19 0.22U_0201_6.3V6KVGA@
1 2
CC21 0.22U_0201_6.3V6KVGA@
1 2
CC5 0.22U_0201_6.3V6KVGA@
1 2
CC23 0.22U_0201_6.3V6KVGA@
1 2
CC25 0.22U_0201_6.3V6KVGA@
1 2
CC27 0.22U_0201_6.3V6KVGA@
1 2
CC29 0.22U_0201_6.3V6KVGA@
1 2
CC31 0.22U_0201_6.3V6KVGA@
1 2
CC33 0.22U_0201_6.3V6KVGA@
1 2
CC35 0.22U_0201_6.3V6KVGA@
1 2
CC37 0.22U_0201_6.3V6KVGA@
1 2
CC39 0.22U_0201_6.3V6KVGA@
1 2
CC41 0.22U_0201_6.3V6KVGA@
1 2
CC43 0.22U_0201_6.3V6KVGA@
1 2
CC45 0.22U_0201_6.3V6KVGA@
1 2
CC47 0.22U_0201_6.3V6KVGA@
1 2
CC49 0.22U_0201_6.3V6KVGA@
1 2
CC51 0.22U_0201_6.3V6KVGA@
1 2
CC53 0.22U_0201_6.3V6KVGA@
1 2
CC55 0.22U_0201_6.3V6KVGA@
1 2
CC57 0.22U_0201_6.3V6KVGA@
1 2
CC59 0.22U_0201_6.3V6KVGA@
1 2
CC61 0.22U_0201_6.3V6KVGA@
1 2
CC63 0.22U_0201_6.3V6KVGA@
+1.0VS_VCCIO
CAD n ote: Trace width=12 mils,Spacing=15mil,Max length=400mils
DMI_CRX_PTX_P0<17> DMI_CRX_PTX_N0<17>
DMI_CRX_PTX_P1<17> DMI_CRX_PTX_N1<17>
DMI_CRX_PTX_P2<17> DMI_CRX_PTX_N2<17>
DMI_CRX_PTX_P3<17> DMI_CRX_PTX_N3<17>
1 2
RC20 24.9_0402_1%
PEG_GTX_C_HRX_P15 PEG_GTX_C_HRX_N15
PEG_GTX_C_HRX_P14 PEG_GTX_C_HRX_N14
PEG_GTX_C_HRX_P13 PEG_GTX_C_HRX_N13
PEG_GTX_C_HRX_P12 PEG_GTX_C_HRX_N12
PEG_GTX_C_HRX_P11 PEG_GTX_C_HRX_N11
PEG_GTX_C_HRX_P10 PEG_GTX_C_HRX_N10
PEG_GTX_C_HRX_P9 PEG_GTX_C_HRX_N9
PEG_GTX_C_HRX_P8 PEG_GTX_C_HRX_N8
PEG_GTX_C_HRX_P7 PEG_GTX_C_HRX_N7
PEG_GTX_C_HRX_P6 PEG_GTX_C_HRX_N6
PEG_GTX_C_HRX_P5 PEG_GTX_C_HRX_N5
PEG_GTX_C_HRX_P4 PEG_GTX_C_HRX_N4
PEG_GTX_C_HRX_P3 PEG_GTX_C_HRX_N3
PEG_GTX_C_HRX_P2 PEG_GTX_C_HRX_N2
PEG_GTX_C_HRX_P1 PEG_GTX_C_HRX_N1
PEG_GTX_C_HRX_P0 PEG_GTX_C_HRX_N0
PEG_RCOMP
DMI_CRX_PTX_P0 DMI_CRX_PTX_N0
DMI_CRX_PTX_P1 DMI_CRX_PTX_N1
DMI_CRX_PTX_P2 DMI_CRX_PTX_N2
DMI_CRX_PTX_P3 DMI_CRX_PTX_N3
E25 D25
E24 F24
E23 D23
E22 F22
E21 D21
E20 F20
E19 D19
E18 F18
D17 E17
F16 E16
D15 E15
F14 E14
D13 E13
F12 E12
D11 E11
F10 E10
G2
D8 E8
E6 F6
D5 E5
J8 J9
UC1C
PEG_RXP[0] PEG_RXN[0]
PEG_RXP[1] PEG_RXN[1]
PEG_RXP[2] PEG_RXN[2]
PEG_RXP[3] PEG_RXN[3]
PEG_RXP[4] PEG_RXN[4]
PEG_RXP[5] PEG_RXN[5]
PEG_RXP[6] PEG_RXN[6]
PEG_RXP[7] PEG_RXN[7]
PEG_RXP[8] PEG_RXN[8]
PEG_RXP[9] PEG_RXN[9]
PEG_RXP[10] PEG_RXN[10]
PEG_RXP[11] PEG_RXN[11]
PEG_RXP[12] PEG_RXN[12]
PEG_RXP[13] PEG_RXN[13]
PEG_RXP[14] PEG_RXN[14]
PEG_RXP[15] PEG_RXN[15]
PEG_RCOMP
DMI_RXP[0] DMI_RXN[0]
DMI_RXP[1] DMI_RXN[1]
DMI_RXP[2] DMI_RXN[2]
DMI_RXP[3] DMI_RXN[3]
SKL-H_BGA1440
REV = 1
@
SKYLAKE_H ALO
BGA1 440
3 OF 14
PEG_TXP[0] PEG_TXN[0]
PEG_TXP[1] PEG_TXN[1]
PEG_TXP[2] PEG_TXN[2]
PEG_TXP[3] PEG_TXN[3]
PEG_TXP[4] PEG_TXN[4]
PEG_TXP[5] PEG_TXN[5]
PEG_TXP[6] PEG_TXN[6]
PEG_TXP[7] PEG_TXN[7]
PEG_TXP[8] PEG_TXN[8]
PEG_TXP[9] PEG_TXN[9]
PEG_TXP[10] PEG_TXN[10]
PEG_TXP[11] PEG_TXN[11]
PEG_TXP[12] PEG_TXN[12]
PEG_TXP[13] PEG_TXN[13]
PEG_TXP[14] PEG_TXN[14]
PEG_TXP[15] PEG_TXN[15]
DMI_TXP[0] DMI_TXN[0]
DMI_TXP[1] DMI_TXN[1]
DMI_TXP[2] DMI_TXN[2]
DMI_TXP[3] DMI_TXN[3]
B25 A25
B24 C24
B23 A23
B22 C22
B21 A21
B20 C20
B19 A19
B18 C18
A17 B17
C16 B16
A15 B15
C14 B14
A13 B13
C12 B12
A11 B11
C10 B10
B8 A8
C6 B6
B5 A5
D4 B4
?
PEG_HTX_GRX_P15 PEG_HTX_GRX_N15
PEG_HTX_GRX_P14 PEG_HTX_GRX_N14
PEG_HTX_GRX_P13 PEG_HTX_GRX_N13
PEG_HTX_GRX_P12 PEG_HTX_GRX_N12
PEG_HTX_GRX_P11 PEG_HTX_GRX_N11
PEG_HTX_GRX_P10 PEG_HTX_GRX_N10
PEG_HTX_GRX_P9 PEG_HTX_GRX_N9
PEG_HTX_GRX_P8 PEG_HTX_GRX_N8
PEG_HTX_GRX_P7 PEG_HTX_GRX_N7
PEG_HTX_GRX_P6 PEG_HTX_GRX_N6
PEG_HTX_GRX_P5 PEG_HTX_GRX_N5
PEG_HTX_GRX_P4 PEG_HTX_GRX_N4
PEG_HTX_GRX_P3 PEG_HTX_GRX_N3
PEG_HTX_GRX_P2 PEG_HTX_GRX_N2
PEG_HTX_GRX_P1 PEG_HTX_GRX_N1
PEG_HTX_GRX_P0 PEG_HTX_GRX_N0
DMI_CTX_PRX_P0 DMI_CTX_PRX_N0
DMI_CTX_PRX_P1 DMI_CTX_PRX_N1
DMI_CTX_PRX_P2 DMI_CTX_PRX_N2
DMI_CTX_PRX_P3 DMI_CTX_PRX_N3
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
DMI_CTX_PRX_P0 <17> DMI_CTX_PRX_N0 <17>
DMI_CTX_PRX_P1 <17> DMI_CTX_PRX_N1 <17>
DMI_CTX_PRX_P2 <17> DMI_CTX_PRX_N2 <17>
DMI_CTX_PRX_P3 <17> DMI_CTX_PRX_N3 <17>
CC70.22U_0201_6.3V6K VGA@ CC90.22U_0201_6.3V6K VGA@
CC110.22U_0201_6.3V6K VGA@ CC130.22U_0201_6.3V6K VGA@
CC10.22U_0201_6.3V6K VGA@ CC20.22U_0201_6.3V6K VGA@
CC160.22U_0201_6.3V6K VGA@ CC180.22U_0201_6.3V6K VGA@
CC200.22U_0201_6.3V6K VGA@ CC40.22U_0201_6.3V6K VGA@
CC220.22U_0201_6.3V6K VGA@ CC240.22U_0201_6.3V6K VGA@
CC260.22U_0201_6.3V6K VGA@ CC280.22U_0201_6.3V6K VGA@
CC300.22U_0201_6.3V6K VGA@ CC320.22U_0201_6.3V6K VGA@
CC340.22U_0201_6.3V6K VGA@ CC360.22U_0201_6.3V6K VGA@
CC380.22U_0201_6.3V6K VGA@ CC400.22U_0201_6.3V6K VGA@
CC420.22U_0201_6.3V6K VGA@ CC440.22U_0201_6.3V6K VGA@
CC460.22U_0201_6.3V6K VGA@ CC480.22U_0201_6.3V6K VGA@
CC500.22U_0201_6.3V6K VGA@ CC520.22U_0201_6.3V6K VGA@
CC540.22U_0201_6.3V6K VGA@ CC560.22U_0201_6.3V6K VGA@
CC580.22U_0201_6.3V6K VGA@ CC600.22U_0201_6.3V6K VGA@
CC620.22U_0201_6.3V6K VGA@ CC640.22U_0201_6.3V6K VGA@
PEG_HTX_C_GRX_P15 <24> PEG_HTX_C_GRX_N15 <24>
PEG_HTX_C_GRX_P14 <24> PEG_HTX_C_GRX_N14 <24>
PEG_HTX_C_GRX_P13 <24> PEG_HTX_C_GRX_N13 <24>
PEG_HTX_C_GRX_P12 <24> PEG_HTX_C_GRX_N12 <24>
PEG_HTX_C_GRX_P11 <24> PEG_HTX_C_GRX_N11 <24>
PEG_HTX_C_GRX_P10 <24> PEG_HTX_C_GRX_N10 <24>
PEG_HTX_C_GRX_P9 <24 > PEG_HTX_C_GRX_N9 <24>
PEG_HTX_C_GRX_P8 <24 > PEG_HTX_C_GRX_N8 <24>
PEG_HTX_C_GRX_P7 <24 > PEG_HTX_C_GRX_N7 <24>
PEG_HTX_C_GRX_P6 <24 > PEG_HTX_C_GRX_N6 <24>
PEG_HTX_C_GRX_P5 <24 > PEG_HTX_C_GRX_N5 <24>
PEG_HTX_C_GRX_P4 <24 > PEG_HTX_C_GRX_N4 <24>
PEG_HTX_C_GRX_P3 <24 > PEG_HTX_C_GRX_N3 <24>
PEG_HTX_C_GRX_P2 <24 > PEG_HTX_C_GRX_N2 <24>
PEG_HTX_C_GRX_P1 <24 > PEG_HTX_C_GRX_N1 <24>
PEG_HTX_C_GRX_P0 <24 > PEG_HTX_C_GRX_N0 <24>
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
SKL-H(3/9) PEG,DMI
SKL-H(3/9) PEG,DMI
SKL-H(3/9) PEG,DMI
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
D
Date: Sheet
973Friday, March 31, 2017
973Friday, March 31, 2017
973Friday, March 31, 2017
E
1.A
1.A
1.A
of
of
of
Page 6
A
B
C
D
E
SVID Alert / Data
1 1
Place the PU resistors close to CPU
1 2
+1.0V_VCCST
+1.0V_VCCST
2 2
3 3
RC34 56_0402_5%
CPU_SVID_ALERT#
CPU_SVID_DAT
1 2
RC36 220_0402_5%
1 2
RC38 100_0402_1%
From EC(open-drain)
RC31
1K_0402_5%
H_PROCHOT#<45,52>
+1.0V_VCCST
RC27
From EC OD output
EC_VCCST_PG_R<45,49>
PM_DOWN_R<18>
+1.0V_VCCST
1K_0402_5%
1 2
RC28 1K_0402_5%
XESD@
1 2
CH65 .1U_0402_16V7K
XESD@
1 2
CH1 .1U_0402_16V7K
XESD@
1 2
CH3 .1U_0402_16V7K
ESD@
1 2
CH2 1000P_0402_50V7K
ESD@
1 2
CH67 1000P_0402_50V7 K
+1.0VS_VCCSTG
12
499_0402_1%
1 2
12
RC29
60.4_0402_1%
1 2
20_0402_1%
@
RC32 1K_0402_5%
1 2
(To VR)
CPU_SVID_ALERT#_R <58>
(To VR)
CPU_SVID_DAT <58>
RC33
H_PROCHOT#_R
EC_VCCST_PG
RC30
12
THERMTRIP#
H_PECI
H_CPUPWRGD
THERMTRIP#
H_PROCHOT#_R
EC_VCCST_PG
PM_DOWN
H_SKTOCC#<19>
CPU_BCLK<20> CPU_BCLK#<20>
CPU_PCIBCLK<20> CPU_PCIBCLK#<20>
CPU_24M<20> CPU_24M#<20>
CPU_SVID_CLK<58>
H_CPUPWRGD<19> PLTRST_CPU#<18 > H_PM_SYNC<18>
H_PECI<18,45>
THERMTRIP#<18>
1 2
RC21 0_0402_5%@
RC22
@
0_0402_5%
FLOAT FOR SKL GND FOR CNL
DDR_VTT_CNTL to DDR VTT supplied ramped <35uS (tCPU18 )
DDR_PG_CTRL
P/N: SA00007UR00 ( S IC SN74AUP1G07DCKR SC70 5P BUFFER)
1 2
CPU_SVID_ALERT# CPU_SVID_CLK CPU_SVID_DAT H_PROCHOT#_R
DDR_PG_CTRL
EC_VCCST_PG
H_CPUPWRGD PLTRST_CPU# H_PM_SYNC PM_DOWN H_PECI
THERMTRIP#
H_SKTOCC#_R SKL_CNL_N
@
T3 PAD
CPU_BCLK CPU_BCLK#
CPU_PCIBCLK CPU_PCIBCLK#
CPU_24M CPU_24M#
H_CATERR#
UC2
NC1VCC
2
A
3
GND
74AUP1G07GW_TSS OP5
B31 A32
D35 C36
E31 D31
BH31 BH32 BH29 BR30
BT13
H13
BT31 BP35 BM34 BP31
BT34
BR33
BN1
BM30
J31
UC1E
BCLKP BCLKN
PCI_BCLKP PCI_BCLKN
CLK24P CLK24N
VIDALERT# VIDSCK VIDSOUT PROCHOT#
DDR_VTT_CNTL
VCCST_PWRG D
PROCPWRG D RESET# PM_SYNC PM_DOWN PECI THERMTRIP#
SKTOCC# PROC_SELECT#
CATERR#
SKL-H_BGA1440
@
12
Y
REV = 1
+1.2V_VDDQ
CC650.1U_0201_10V6K
5
4
SKYLAKE_H ALO
BGA1 440
5 OF 14
+3VS
12
RC35 220K_0402_5%
RC37 2M_0402_5%@
1 2
CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8]
CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15]
CFG[17] CFG[16] CFG[19] CFG[18]
BPM#[0] BPM#[1] BPM#[2] BPM#[3]
PROC_TDO
PROC_TDI
PROC_TMS
PROC_TCK
PROC_TRST# PROC_PREQ# PROC_PRDY#
CFG_RCOMP
BN25
CFG0
BN27 BN26
CFG2
BN28 BR20
CFG4
BM20
CFG5
BT20 BP20
CFG7
BR23 BR22 BT23 BT22 BM19 BR19 BP19 BT19
BN23 BP23 BP22 BN22
BR27 BT27 BM31 BT30
CPU_XDP_TDO
BT28
CPU_XDP_TDI
BL32
CPU_XDP_TMS
BP28
CPU_XDP_TCK0
BR28
BP30 BL30 BP27
CFG_RCOMP
BT25
SM_PG_CTRL <54>
@
T1PAD
@
T2PAD
12
RC24
49.9_0402_1%
1 2
RC23 1K_0402_1%
1 2
RC25 1K_0402_1%@
1 2
RC26 1K_0402_1%
Config. Signals
111
*
11
11
1
0
00
00
000
CPU_XDP_TDO <7,19> CPU_XDP_TDI <7,19> CPU_XDP_TMS <7,1 9> CPU_XDP_TCK0 <7,19>
CFG4
CFG5
CFG2
PCIE pore assig n
1 x 16
1 x 16 rever se
2 x 8
2 x 8 rever se 1 x 8 + 2 x 4 1x8+2 x4 rever se
Reference SKL EDS 0.85 Table 6-8
CFG signals internal PH default value = 1
Desc ri ption
Stall reset sequence after PCU PLL
CFG[0 ]
CFG[4 ]
CFG[7 ]
CFG[1 ]
CFG[3 ]
lock until de-asserted — 1 = (Default) Normal Operation;
*
No stall. — 0 = Stall.
Enable eDP — 1 = Disabled. — 0 = Enabled.
*
PEG Training: — 1 = (default) PEG Train immediately
*
following RESET# de asserti on. — 0 = PEG Wait for BIOS for training
Reserved configuration lane.
CFG[2 ]CFG[5 ]CFG[6 ]
0
1
CFG[8:1 9]
ESD Reserve ,pleace close to cpu
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
SKL-H(4/9)CLK,GPIO
SKL-H(4/9)CLK,GPIO
SKL-H(4/9)CLK,GPIO
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
D
Date: Sheet
10 73Friday, March 31, 2017
10 73Friday, March 31, 2017
10 73Friday, March 31, 2017
E
1.A
1.A
1.A
of
of
of
Page 7
A
B
C
D
E
+VCC_CORE +VCC_CORE
1 1
2 2
3 3
4 4
AA13 AA31 AA32 AA33 AA34 AA35 AA36 AA37 AA38 AB29 AB30 AB31 AB32 AB35 AB36 AB37 AB38 AC13 AC14 AC29 AC30 AC31 AC32 AC33 AC34 AC35 AC36 AD13 AD14 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AE13 AE14 AE30 AE31 AE32 AE35 AE36 AE37 AE38
AF35 AF36 AF37 AF38
K13 K14
N13 N14 N30 N31 N32 N35 N36 N37 N38 P13
SKYLAKE_H ALO
UC1G
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
L13
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
SKL-H_BGA1440
REV = 1 ?
@
BGA1 440
7 OF 14
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCC_SENSE
VSS_SENSE
V32 V33 V34 V35 V36 V37 V38 W13 W14 W29 W30 W31 W32 W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36 L14 P29 P30 P31 P32 P33 P34 P35 P36 R13 R31 R32 R33 R34 R35 R36 R37 R38 T29 T30 T31 T32 T35 T36 T37 T38 U29 U30 U31 U32 U33 U34 U35 U36 V13 V14 V31 P14
Trace Length < 25 mils
AG37 AG38
PH/PL on pwr side
H-4+2/68 A H-4+2/55 A
+VCC_GT +VCC_GT
SKYLAKE_H ALO
UC1H
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKL-H_BGA1440
@
BGA1 440
REV = 1
8 OF 14
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCSENSE <58>
VSSSENSE <58>
BG34 BG35 BG36 BH33 BH34 BH35 BH36 BH37 BH38
BJ37 BJ38 BL36
BL37 BM36 BM37 BN36 BN37 BN38 BP37 BP38 BR37
BT37 BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38 BG29 BG30 BG31 BG32 BG33 BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BD35 BD36 BE31 BE32 BE37
AV29 AV30 AV31 AV32 AV33 AV34 AV35 AV36 AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38 AY29 AY30 AY31 AY32 AY35 AY36 AY37 AY38 BA13 BA14 BA29 BA30 BA31 BA32 BA33 BA34 BA35 BA36 BB13 BB14 BB31 BB32 BB33 BB34 BB35 BB36 BB37 BB38 BC29 BC30 BC31 BC32 BC35 BE33 BE34 BE35 BE36
?
EDS:Rail is unconnected for Processors without GT3/4.
+VCC_GT
AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35
AJ36 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38 AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP14 AP29 AP30 AP31 AP32 AP35 AP36 AP37 AP38 AR29 AR30 AR31 AR32 AR33 AR34 AR35 AR36
AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38 AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38
UC1N
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
SKL-H_BGA1440
SKYLAKE_H ALO
BGA1 440
@
14 OF 14
VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX VCCGTX
VCCGT_SENSE
VSSGTX_SENSE
VSSGT_SENSE
VCCGTX_SENSE
?
AF29 AF30 AF31 AF32 AF33 AF34 AG13 AG14 AG31 AG32 AG33 AG34 AG35 AG36 AH13 AH14 AH29 AH30 AH31 AH32 AJ13 AJ14
AH38 AH35 AH37 AH36
VCCGT_SENSE
VSSGT_SENSE
Trace Length < 25 mils
VCCGT_SENSE <58>
VSSGT_SENSE <58>
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
SKL-H(5/9)Power,SVID
SKL-H(5/9)Power,SVID
SKL-H(5/9)Power,SVID
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
E
1.A
1.A
11 73Friday, March 31, 2017
11 73Friday, March 31, 2017
11 73Friday, March 31, 2017
1.A
of
of
of
Page 8
A
B
C
D
E
+1.2V_VDDQ_CPU
For Power consumption
VCCSA_SENSE VSSSA_SENSE
VCCIO_SENSE VSSIO_SENSE
Measurement
JUMP_43X118
JUMP_43X118
+VDDQ_CLK
+VCCSFR_OC_1 +VCCSFR_OC_2
+1.0V_VCCST
+1.0VS_VCCSTG
+1.0V_VCCSFR
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VDDQC
VCCPLL_OC VCCPLL_OC
VCCST
VCCSTG
VCCSTG
VCCPLL VCCPLL
VCCSA_SENSE VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
DDR4/2.8 A
AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6
Y12
BH13 G11
H30
H29
G30
H28 J28
M38 M37
H14 J14
?
20mA
150mA
SKYLAKE_H ALO
K29 K30 K31 K32 K33 K34 K35
M29 M30 M31 M32 M33 M34 M35 M36
AG12
G15 G17 G19 G21 H15 H16 H17 H19 H20 H21 H26 H27
J30
L31 L32 L35 L36 L37 L38
J15 J16 J17 J19 J20 J21 J26 J27
UC1I
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
SKL-H_BGA1440
REV = 1
@
BGA1 440
9 OF 14
RVP11 47u*1,10u*7,1u*3 CAP place on PWR side.
1 1
RVP11 PWR NEED PROVIDE
0.95V FOR VCCIO
+VCC_SA
H-4+2/11. 1A
+1.0VS_VCCIO
H /5.5A
2 2
+1.2V_VDDQ
JPC1
12
@
JPC2
12
@
130mA
VCCSA_SENSE <58> VSSSA_SENSE <58>
VCCIO_SENSE <57> VSSIO_SENSE <57>
NOTE:
VCCPLL_OC is allowed to be turned off during S3 & DS3 if it is not powered directly from VDDQ
+1.2V_VDDQ_CPU
Place at Back Side
+1.2V_VDDQ
+1.0VS_VCCSTG
1U_0402_6.3V6K
1
2
+1.0V_VCCST
RC39 0_0402_5%@
RC40
1 2
@
0_0603_5%
1 2
RC41 0_0402_5%
1 2
RC42 0_0402_5%
(1.0VS )
1U_0402_6.3V6K
1
CC68
2
1 2
+VDDQ_CLK
BSC Side
10U_0603_6.3V6M
1
CC70
2
+VCCSFR_OC_1
@
@
1
2
1U_0402_6.3V6K
CC71
+VCCSFR_OC_2
1U_0402_6.3V6K
1
2
CC72
Place at Back Side
+1.0V_VCCST
CC69
1
CC67
1U_0402_6.3V6K
2
Place at Back Side
+1.0V_VCCSFR
1 2
CC66 1U_0402_6.3V6K
3 3
+1.2V_VDDQ_CPU
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC73
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CC74
1
1
CC75
2
1
CC76
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
CC77
10U_0603_6.3V6M
1
CC78
2
10U_0603_6.3V6M
1
CC79
2
1
1
CC80
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CC82
CC81
2
22U_0603_6.3V6M
CC83
1
1
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CC84
22U_0603_6.3V6M
CC85
1
1
2
2
Place at Back Side
+1.2V_VDDQ_CPU : 10UF/6.3V/0603 *10 22UF/6.3V/0603 * 4 update CRB cap QTY
4 4
A
CPU_CORE/VCCGT/VCCSA decoupling capacitor place to PWR side
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
+1.0VS_VCCIO
CC86
Place at Back Side
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1
1
CC91
2
1
CC92
2
2
1
CC89
2
22U_0603_6.3V6M
CC87
CC90
1
1
2
2
22U_0603_6.3V6M
22U_0603_6.3V6M
CC88
CC93
1
2
Follow ORB 3/20
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal&Electronics,&Inc.
SKL-H(6/9)POWER
SKL-H(6/9)POWER
SKL-H(6/9)POWER
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
12 73Friday, March 31, 2017
12 73Friday, March 31, 2017
12 73Friday, March 31, 2017
E
1.A
1.A
1.A
of
of
of
Page 9
A
B
C
D
E
BM9 BM6 BM2
C17 C13
BT9 BT5
BR7
BP7
BN9 BN7 BN4 BN2
BH9 BH8 BH5 BH4 BH1
BE6 BD9
C9
SKYLAKE_H ALO
UC1L
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL-H_BGA1440
REV = 1
@
BGA1 440
12 OF 14
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
C25 C23 C21 C19 C15 C11 C8 C5 BM29 BM25 BM18 BM11 BM8 BM7 BM5 BM3 BL38 BL35 BL13 BL6 BK25 BK22 BK13 BK6 BJ30 BJ29 BJ15 BJ12 BH11 BH10 BH7 BH6 BH3 BH2 BG37 BG14 BG6 BF34 BF6 BE30 BE5 BE4 BE3 BE2 BE1 BD38 BD37 BD12 BD11 BD10 BD8 BD7 BD6 BC33 BC14 BC13 BC6 BB30 BB29 BB6 BB5
C2 BT36 BT35 BT4 BT3 BR38
?
Y38 Y37 Y14 Y13 Y11 Y10
W34 W33 W12
V30 V29 V12
U38 U37
T34 T33 T14 T13 T12 T11 T10
R30 R29 R12
P38
P37
P12
N34 N33 N12
N11 N10
M14 M13 M12
L34
L33
L30
L29
K38
K11
K10
Y9 Y8 Y7
W5 W4 W3 W2 W1
V6
U6
T9 T8 T7
T4 T3 T2 T1
P6
N9 N8 N7 N6 N5 N4 N3 N2 N1
M6
K9 K8 K7 K5 K4 K3 K2
T5
SKL-H_BGA1440
@
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
UC1F
SKYLAKE_H ALO
BGA1 440
6 OF 14
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS
UC1M
SKYLAKE_H ALO
B9
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SKL-H_BGA1440
REV = 1
@
BGA1 440
13 OF 14
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTFVSS NCTFVSS NCTFVSS NCTFVSS NCTFVSS
AK30 AK29 AK4 AJ38 AJ37 AJ6 AJ5 AJ4 AJ3 AJ2 AJ1 AH34 AH33 AH12 AH6 AG30 AG29 AG11 AG10 AG8 AG7 AG6 AF14 AF13 AF12 AF4 AF3 AF2 AF1 AE34 AE33 AE6 AD30 AD29 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AC38 AC37 AC12 AC6 AC5 AC4 AC3 AC2 AC1 AB34 AB33 AB6 AA30 AA29 AA12 A30 A28 A26 A24 A22 A20 A18 A16 A14 A12 A10 A9 A6
B37 B3 A34 A4 A3
?
BT32 BT26 BT24 BT21 BT18 BT14 BT12
BR36 BR34 BR29 BR26 BR24 BR21 BR18 BR14 BR12
BP34 BP33 BP29 BP26 BP24 BP21 BP18 BP14 BP12
BN34 BN31 BN30 BN29 BN24 BN21 BN20 BN19 BN18 BN14 BN12
BM38 BM35 BM28 BM27 BM26 BM23 BM21 BM13 BM12
BL29 BK29 BK15 BK14
BJ32
BJ31
BJ25
BJ22 BH14 BH12
BG38 BG13 BG12
BF33
BF12 BE29
BC34 BC12 BB12
K1 J36 J33 J32 J25 J22 J18 J10 J7 J4 H35 H32 H25 H22 H18 H12 H11 G28 G26 G24 G23 G22 G20 G18 G16 G14 G12 G10 G9 G8 G6 G5 G4 F36 F31 F29 F27 F25 F23 F21 F19 F17 F15 F13 F11 F9 F8 F5 F4 F3 F2 E38 E35 E34 E9 E4 D33 D30 D28 D26 D24 D22 D20 D18 D16 D14 D12 D10 D9 D6 D3 C37 C31 C29 C27
D38
?REV = 1
BA38 BA37 BA12 BA11 BA10
AY34 AY33 AY14
AY12 AW30 AW29 AW12
AW5 AW4 AW3 AW2
AW1 AV38 AV37 AU34 AU33 AU12 AU11 AU10
AT30 AT29
AR38 AR37 AR14 AR13
AP34 AP33 AP12 AP11 AP10
AN30 AN29 AN12
AM38 AM37 AM12
AL34 AL33 AL14 AL12 AL10
BB4 BB3 BB2 BB1
BA9 BA8 BA7 BA6
AU9 AU8 AU7 AU6
AT6
AR5 AR4 AR3 AR2 AR1
AP9 AP8
AN6 AN5
AM5 AM4 AM3 AM2 AM1
AL9 AL8 AL7 AL4
SKYLAKE_H ALO
UC1J
BJ17 BJ19
BJ20 BK17 BK19 BK20
1 1
EDRAM
CRB EDRAM
2 2
3 3
T4 @ T5 @ T6 @
OPC_RCOMP OPCE_RCOMP OPCE_RCOMP2
BL16
BL17
BL18
BL19
BL20
BL21 BM17 BN17
BJ23
BJ26
BJ27 BK23 BK26 BK27
BL23
BL24
BL25
BL26
BL27
BL28 BM24
BL15 BM16
BL22 BM22
BP15 BR15
BT15
BP16 BR16
BT16
BN15 BM15
BP17 BN16
BM14
BL14
BJ35
BJ36
AT13
AW13
AU13 AY13
BT29 BR25 BP25
SKL-H_BGA1440
@
BGA1 440
VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC VCCOPC
RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD
VCCOPC_SENSE VSSOPC_SENSE
RSVD RSVD
VCCEOPIO VCCEOPIO VCCEOPIO
RSVD RSVD RSVD
VCCEOPIO_SENSE VSSEOPIO_SENSE
RSVD RSVD
VCC_OPC_1P8 VCC_OPC_1P8
RSVD RSVD
ZVM# MSM#
ZVM2# MSM2#
OPC_RCOMP OPCE_RCOMP OPCE_RCOMP2
REV = 1
10 OF 14
?
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
SKL-H(8/9)GND
SKL-H(8/9)GND
SKL-H(8/9)GND
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1.A
1.A
13 73Friday, March 31, 2017
13 73Friday, March 31, 2017
13 73Friday, March 31, 2017
E
1.A
of
of
of
Page 10
A
B
C
D
E
+1.0VALW TO +1.0V_VCCST
+1.0VALW
1
CC94 1U_0402_6.3V6K
2
UC3
1
+1.0VALW
EN_1.0V_VCCSTU
1
CC95
@
1U_0402_6.3V6K
2
VIN1
2
VIN2
7
VIN therm al
3
VBIAS
4
ON
AOZ1334DI-01_DFN8-7_3X3
+1.0V_VCCST: 60mA
R ON = 4.5mΩ VDROP= 1.32mV Delay time: 270us
VOUT
GND
6
5
+1.0VALW TO +1.0VS_VCCSTG
VCCSTG and VCCIO SLEW RATE <=65us
+1.0VALW
1
CC100 1U_0402_6.3V6K
2
UC4
1
+1.0VALW
@
VIN1
2
VIN2
7
VIN therm al
3
VBIAS
4
ON
1
AOZ1334DI-01_DFN8-7_3X3
CC102 1U_0402_6.3V6K
2
VOUT
GND
+1.0V_VCCST_L
+1.0VS_VCCSTG_IO
6
5
JPC3
112
JUMP_43X79
1
@
CC96
0.1U_0201_10V6K
2
+1.0V_VCCST
2
RC45
@
0_0402_5%
1 2
1
CC101
0.1U_0201_10V6K
2
+1.0VS_VCCSTG
CC98 1U_0402_6.3V6K
0_0402_5%
1 2
CC99
0.1U_0201_10V6K
+5VALW
1
2
RC43
+5VALW
1
2
1 2
SUSP#
RC46 0_0402_5%
1 1
UC1K
D1
RSVD_TP
E1
RSVD_TP
E3
RSVD_TP
E2
RSVD_TP
BR1
RSVD_TP
BT2
RSVD_TP
BN35
RSVD
J24
2 2
PROC_TRIGIN_R<23>
PROC_TRIGOUT_R<23>
3 3
1 2
RC44
30_0402_1%
PROC_TRIGIN_R PROC_TRIGOUT
BN33
BL34
AE29 AA14
BR35 BR31 BH30
H24
N29 R14
A36 A37
H23
F30 E30
B30 C30
J23
G3
J3
RSVD RSVD RSVD RSVD
RSVD RSVD RSVD RSVD
RSVD RSVD
PROC_TRIGIN PROC_TRIGOUT
RSVD RSVD
RSVD RSVD
RSVD RSVD
RSVD RSVD RSVD
SKL-H_BGA1440
@
SKYLAKE_H ALO
BGA1 440
11 OF 14
Rev_0.53
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD RSVD
VSS
RSVD_TP RSVD_TP
RSVD_TP RSVD_TP
RSVD RSVD
RSVD RSVD
VSS
RSVD_TP RSVD_TP
RSVD RSVD RSVD
NCTF NCTF NCTF NCTF NCTF NCTF
SYSON<45,49,54,56>
BM33 BL33
BJ14 BJ13
BK28 BJ28
BJ18
BJ16 BK16
BK24 BJ24
BK21 BJ21
BT17 BR17
BK18
BJ34 BJ33
G13 AJ8 BL31
NCTF_0
B2
NCTF_1
B38
NCTF_2
BP1
NCTF_3
BR2
NCTF_4
C1
NCTF_5
C38
?REV = 1
T7 PAD@ T8 PAD@ T9 PAD@ T10 PAD@ T11 PAD@ T12 PAD@
SUSP#<45,49,52,54,56,57>
+1.0VS_VCCSTG: 60mA
R ON = 4.4mΩ VDROP= 11mV Delay time: 9.3us
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
SKL-H(9/9)RSVD
SKL-H(9/9)RSVD
SKL-H(9/9)RSVD
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1.A
1.A
14 73Friday, March 31, 2017
14 73Friday, March 31, 2017
14 73Friday, March 31, 2017
E
1.A
of
of
of
Page 11
A
B
C
D
E
DDR_A_DQS#[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..16]<8>
DDR_A_BA0<8 >
DDR_A_BA1<8>
DDR_A_BG0<8>
1 1
Layout Note: Place nea r JDIMM 1
2 2
+1.2V_VDDQ
1U_0402_6.3V6 K
1
2
+1.2V_VDDQ
10U_0603_6.3V6 M
CD18
1
3 3
4 4
2
Layout Note: Place near JDIMM1.258
Layout Note: Place near JDIMM1.255
DDR_A_BG1<8>
DDR_A_CLK0<8> DDR_A_CLK#0<8> DDR_A_CLK1<8>
DDR_A_CLK#1<8>
DDR_A_CKE0<8 >
DDR_A_CKE1<8 >
DDR_A_CS#0<8>
DDR_A_CS#1<8>
D_CK_SDATA<16,19,44> D_CK_SCLK<16,19,44>
DDR_A_ODT0<8>
DDR_A_ODT1<8>
1U_0402_6.3V6 K
1U_0402_6.3V6 K
1
1
CD4
2
10U_0603_6.3V6 M
1
2
1U_0402_6.3V6 K
1
CD28
2
CD5
CD19
1
2
2
10U_0603_6.3V6 M
1
2
+0.6VS_VTT
1U_0402_6.3V6 K
CD29
CD6
10U_0603_6.3V6 M
CD20
1U_0402_6.3V6 K
1
2
DDR_A_BA0 DDR_A_BA1 DDR_A_BG0 DDR_A_BG1
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1
DDR_A_CKE0 DDR_A_CKE1 DDR_A_CS#0 DDR_A_CS#1
D_CK_SDATA D_CK_SCLK
DDR_A_ODT0 DDR_A_ODT1
Note: place caps close to DIMM 4 on each side of DIMM
1U_0402_6.3V6 K
1
2
CD21
1
2
CD30
0_0402_5%
A
1U_0402_6.3V6 K
1
CD8
CD7
2
10U_0603_6.3V6 M
10U_0603_6.3V6 M
CD22
1
2
1U_0402_6.3V6 K
1
CD31
2
@
RD8
12
1U_0402_6.3V6 K
1
1
CD9
2
2
10U_0603_6.3V6 M
CD23
1
1
2
2
10U_0603_6.3V6 M
CD32
1
1
2
2
Place Holder
1
CD35
2
0.1U_0201_10V6 K
1U_0402_6.3V6 K
CD10
10U_0603_6.3V6 M
CD24
10U_0603_6.3V6 M
@
CD33
+3VS_DIMMA
1
2
2.2U_0402_6.3V6 M
1
2
1
2
CD36
+1.2V_VDDQ
1U_0402_6.3V6 K
CD11
Follow MA51
1
+
CD25
2
+0.6V_DDRA_VRE FCA+3VS
1
CD12
2
CD26 330U_D2_2V_Y
SGA00009S0 0 330U 2V H1.9 9mohm POLY
CPU Side
+0.6V_VREFCA
1
CD2
0.022U_0402_16V 7K
RD4
24.9_0402_1%
2
12
Place near to SO-DIMM connector.
Layout Note: Place near JDIMM1.257/259
1
CD13
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
1
1
CD38
CD37
2
2
0.1U_0201_10V6 K
Layout Note: Place near JDIMM1.164
2.2U_0402_6.3V6 M
within 200mils
B
RD2 2_0402_1%
1
2
1U_0402_6.3V6 K
CD14
DDR_DRAMRST#<19>
+1.2V_VDDQ
RD1
12
1
2
1U_0402_6.3V6 K
1 2
RD3
1 2
+2.5V
1
CD15
2
Layout Note: Place near JDIMM1.164
1
CD1
2
1K_0402_1%
1K_0402_1%
10U_0603_6.3V6 M
1
CD3
2
1
CD16
2
+0.6V_DDRA_VRE FCA
0.1U_0201_10V6 K
0.1U_0201_10V6 K
CD17
10U_0603_6.3V6 M
Dimm1 Side
+0.6V_DDRA_VRE FCA
#543016 PDG 1.0164 20mils wide & spacing
DDR_A_ACT#<8>
+1.2V_VDDQ
RD7
@
12
0_0402_5%
Layout NOTE PLACE THE CAP within 200mil from Pin108
*2015MOW02, Can't install Cap on DRAMRST
DDR_A_PARITY<8 > DDR_A_ALERT#<8>
1 2
RD5 240_0402_1%
SPD Address for CHANNEL0 Write Adr ess 0xA 0 Read Addr ess 0xA 1 SA0=0;SA 1=0;S A2=0
+1.2V_VDDQ
RD6 470_0402_5%
1 2
1
XESD@
CD27
0.1U_0201_10V6 K
2
Secur ity Cla ssificat ion
Secur ity Cla ssificat ion
Secur ity Cla ssificat ion
Issued D ate
Issued D ate
Issued D ate
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
DDR_A_CLK0 DDR_A_CLK#0 DDR_A_CLK1 DDR_A_CLK#1
DDR_A_CKE0 DDR_A_CKE1
DDR_A_CS#0 DDR_A_CS#1
DDR_A_ODT0 DDR_A_ODT1
DDR_A_BG0 DDR_A_BG1 DDR_A_BA0 DDR_A_BA1
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_A_MA16
DDR_A_ACT#
DDR_A_PARITY DDR_A_ALERT# DDR_A_EVENT# DDR_DRAMRST#_R
D_CK_SDATA D_CK_SCLK
DDR_A_SA2 DDR_A_SA1 DDR_A_SA0
+1.2V_VDDQ
DDR_DRAMRST#_R <16>
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
JDIMM1A
REVERSE
137
CK0(T)
139
CK0#(C)
138
CK1(T)
140
CK1#(C)
109
CKE0
110
CKE1
149
S0#
157
S1#
162
S2#/C0
165
S3#/C1
155
ODT0
161
ODT1
115
BG0
113
BG1
150
BA0
145
BA1
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10_AP
120
A11
119
A12
158
A13
151
A14_WE#
156
A15_CAS#
152
A16_RAS#
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
254
SDA
253
SCL
166
SA2
260
SA1
256
SA0
92
CB0_NC
91
CB1_NC
101
CB2_NC
105
CB3_NC
88
CB4_NC
87
CB5_NC
100
CB6_NC
104
CB7_NC
97
DQS8(T)
95
DQS8#(C)
12
DM0#/DBI0#
33
DM1#/DBI1#
54
DM2#/DBI2#
75
DM3#/DBI3#
178
DM4#/DBI4#
199
DM5#/DBI5#
220
DM6#/DBI6#
241
DM7#/DBI7#
96
DM8#/DBI8#
LOTES_ADDR020 6-P001A
CONN@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Da te
Deciphere d Da te
Deciphere d Da te
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQS0(T)
DQS0#(C)
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQS1(T)
DQS1#(C)
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQS2(T)
DQS2#(C)
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQS3(T)
DQS3#(C)
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DQS4(T)
DQS4#(C)
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQS5(T)
DQS5#(C)
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQS6(T)
DQS6#(C)
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS7(T)
DQS7#(C)
8 7 20 21 4 3 16 17 13 11
28 29 41 42 24 25 38 37 34 32
50 49 62 63 46 45 58 59 55 53
70 71 83 84 66 67 79 80 76 74
174 173 187 186 170 169 183 182 179 177
195 194 207 208 191 190 203 204 200 198
216 215 228 229 211 212 224 225 221 219
237 236 249 250 232 233 245 246 242 240
D
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_DQS0 DDR_A_DQS#0
DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_DQS1 DDR_A_DQS#1
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_DQS2 DDR_A_DQS#2
DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_DQS3 DDR_A_DQS#3
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_DQS4 DDR_A_DQS#4
DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_DQS5 DDR_A_DQS#5
DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_DQS6 DDR_A_DQS#6
DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_DQS7 DDR_A_DQS#7
+1.2V_VDDQ +1.2V_VDDQ
+0.6V_DDRA_VRE FCA
+3VS_DIMMA
Interleaved Memory
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Reverse Type-4H
2-3A to 1 DIMMs/channel
JDIMM1B
REVERSE
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
255
VDDSPD
164
VREFCA
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
262
GND
LOTES_ADDR020 6-P001A
CONN@
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
DDR4_DIMMA
DDR4_DIMMA
DDR4_DIMMA
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19
VPP1 VPP2
GND
E
141 142 147 148 153 154 159 160 163
+0.6VS_VTT
258
VTT
257 259
99
VSS
102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
VSS
261
+2.5V
15 73Friday, March 31, 2017
15 73Friday, March 31, 2017
15 73Friday, March 31, 2017
1.A
1.A
1.A
Page 12
A
B
C
D
E
DDR_B_DQS#[0..7]<8>
DDR_B_D[0..63]<8 >
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..16]<8>
DDR_B_BA0<8> DDR_B_BA1<8>
1 1
Layout Note: Place near JDIMM2
2 2
+1.2V_VDDQ
+1.2V_VDDQ
10U_0603_6.3V6 M
3 3
Layout Note: Place near JDIMM2.258
4 4
Layout Note: Place near JDIMM1.255
DDR_B_BG0<8> DDR_B_BG1<8>
DDR_B_CLK0<8> DDR_B_CLK#0<8> DDR_B_CLK1<8> DDR_B_CLK#1<8>
DDR_B_CKE0<8> DDR_B_CKE1<8> DDR_B_CS#0<8> DDR_B_CS#1<8>
D_CK_SDATA<15,19,44> D_CK_SCLK<15,19,44>
DDR_B_ODT0<8> DDR_B_ODT1<8>
1U_0402_6.3V6 K
1
CD42
2
10U_0603_6.3V6 M
CD56
1
2
1
2
1U_0402_6.3V6 K
1U_0402_6.3V6 K
1
1
1U_0402_6.3V6 K
2
1
2
CD66
CD57
CD43
2
10U_0603_6.3V6 M
1
2
+0.6VS_VTT
1U_0402_6.3V6 K
1
CD67
2
A
CD44
10U_0603_6.3V6 M
CD58
1
2
DDR_B_BA0 DDR_B_BA1 DDR_B_BG0 DDR_B_BG1
DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1
DDR_B_CKE0 DDR_B_CKE1
DDR_B_CS#0
DDR_B_CS#1
D_CK_SDATA DDR_B_MA2 D_CK_SCLK
DDR_B_ODT0 DDR_B_ODT1
Note: place caps close to DIMM 4 on each side of DIMM
+3VS
1U_0402_6.3V6 K
1U_0402_6.3V6 K
1
2
CD59
1
2
CD68
1
CD45
2
10U_0603_6.3V6 M
1
2
1U_0402_6.3V6 K
1
2
@
RD15
0_0402_5%
1U_0402_6.3V6 K
1
CD46
2
10U_0603_6.3V6 M
CD60
1
2
1
CD69
2
12
1
2
1U_0402_6.3V6 K
CD47
10U_0603_6.3V6 M
CD61
10U_0603_6.3V6 M
CD70
Place Holder
0.1U_0201_10V6 K
1U_0402_6.3V6 K
1U_0402_6.3V6 K
1
1
CD72
2
1
2
1
2
CD48
10U_0603_6.3V6 M
CD62
10U_0603_6.3V6 M
@
CD71
+3VS_DIMMB
1
2
CD49
2
CD63
1
2
CD73
2.2U_0402_6.3V6 M
+0.6V_B_VREFDQ +0.6V_DDRB_VR EFCA
1
CD40
0.022U_0402_16V 7K
24.9_0402_1%
RD12
2
12
Place near to SO-DIMM connector.
+1.2V_VDDQ
1
1
CD50
CD51
2
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
1
+
CD64
@
220U_B2_2.5VM_R 35
SGA00009R0 0
2
+0.6V_DDRB_VRE FCA
1
CD75
CD74
2
0.1U_0201_10V6 K
+1.2V_VDDQ
RD9
1
2
RD11 2_0402_1%
2.2U_0402_6.3V6 M
B
1 2
1K_0402_1%
12
RD10
1 2
1K_0402_1%
Layout Note: Place near JDIMM2.257/259
1
1
CD52
2
2
1U_0402_6.3V6 K
Layout Note: Place near JDIMM1.164 within 200mils
Reverse Type-8H
1
CD39
Dimm2 SideCPU Side
2
0.1U_0201_10V6 K
+2.5V
1
CD53
2
1U_0402_6.3V6 K
10U_0603_6.3V6 M
Layout Note: Place near JDIMM2.164
20mils wide & spacing
1
CD41
0.1U_0201_10V6 K
2
1
CD55
CD54
2
10U_0603_6.3V6 M
Layout NOTE PLACE THE CAP within 200mil from Pin108
DDR_B_ACT#<8>
+1.2V_VDDQ
DDR_B_PARITY<8> DDR_B_ALERT#<8>
1 2
RD13 240_0402_1%
+3VS
PVT modify
SPD Address for CHANNELB Write Adress 0xA4 Read Address 0xA3 SA0=0;SA1=1;SA 2=0
1
XESD@
CD65 1000P_0201_16V7 K
2
1 2
DDR_B_CLK0 DDR_B_CLK#0 DDR_B_CLK1 DDR_B_CLK#1
DDR_B_CKE0 DDR_B_CKE1
DDR_B_CS#0 DDR_B_CS#1
DDR_B_ODT0 DDR_B_ODT1
DDR_B_BG0 DDR_B_BG1 DDR_B_BA0 DDR_B_BA1
DDR_B_MA0 DDR_B_MA1
DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 DDR_B_MA16
DDR_B_ACT#
DDR_B_PARITY DDR_B_ALERT# DDR_B_EVENT# DDR_DRAMRST#_R
D_CK_SDATA D_CK_SCLK
+1.2V_VDDQ
DDR_B_SA2 DDR_B_SA1 DDR_B_SA0
RD14
@
0_0402_5%
DDR_DRAMRST#_R <15>
JDIMM2A
RESERVE
137
CK0(T)
139
CK0#(C)
138
CK1(T)
140
CK1#(C)
109
CKE0
110
CKE1
149
S0#
157
S1#
162
S2#/C0
165
S3#/C1
155
ODT0
161
ODT1
115
BG0
113
BG1
150
BA0
145
BA1
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10_AP
120
A11
119
A12
158
A13
151
A14_WE#
156
A15_CAS#
152
A16_RAS#
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
254
SDA
253
SCL
166
SA2
260
SA1
256
SA0
92
CB0_NC
91
CB1_NC
101
CB2_NC
105
CB3_NC
88
CB4_NC
87
CB5_NC
100
CB6_NC
104
CB7_NC
97
DQS8(T)
95
DQS8#(C)
12
DM0#/DBI0#
33
DM1#/DBI1#
54
DM2#/DBI2#
75
DM3#/DBI3#
178
DM4#/DBI4#
199
DM5#/DBI5#
220
DM6#/DBI6#
241
DM7#/DBI7#
96
DM8#/DBI8#
LOTES_ADDR007 0-P009A
CONN@
DQS0(T)
DQS0#(C)
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQS1(T)
DQS1#(C)
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23
DQS2(T)
DQS2#(C)
DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQS3(T)
DQS3#(C)
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39
DQS4(T)
DQS4#(C)
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQS5(T)
DQS5#(C)
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55
DQS6(T)
DQS6#(C)
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS7(T)
DQS7#(C)
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
DQ8 DQ9
8 7 20 21 4 3 16 17 13 11
28 29 41 42 24 25 38 37 34 32
50 49 62 63 46 45 58 59 55 53
70 71 83 84 66 67 79 80 76 74
174 173 187 186 170 169 183 182 179 177
195 194 207 208 191 190 203 204 200 198
216 215 228 229 211 212 224 225 221 219
237 236 249 250 232 233 245 246 242 240
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_DQS0 DDR_B_DQS#0
DDR_B_D8 DDR_B_D9 DDR_B_D11 DDR_B_D15 DDR_B_D14 DDR_B_D10 DDR_B_D12 DDR_B_D13 DDR_B_DQS1 DDR_B_DQS#1
DDR_B_D16 DDR_B_D17 DDR_B_D19 DDR_B_D20 DDR_B_D22 DDR_B_D18 DDR_B_D23 DDR_B_D21 DDR_B_DQS2 DDR_B_DQS#2
DDR_B_D30 DDR_B_D25 DDR_B_D26 DDR_B_D24 DDR_B_D28 DDR_B_D27 DDR_B_D29 DDR_B_D31 DDR_B_DQS3 DDR_B_DQS#3
DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D32 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D33 DDR_B_DQS4 DDR_B_DQS#4
DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_DQS5 DDR_B_DQS#5
DDR_B_D48 DDR_B_D52 DDR_B_D50 DDR_B_D55 DDR_B_D51 DDR_B_D54 DDR_B_D49 DDR_B_D53 DDR_B_DQS6 DDR_B_DQS#6
DDR_B_D61 DDR_B_D57 DDR_B_D60 DDR_B_D56 DDR_B_D62 DDR_B_D59 DDR_B_D63 DDR_B_D58 DDR_B_DQS7 DDR_B_DQS#7
+0.6V_DDRB_VRE FCA
*2015MOW02, Can't install Cap on DRAMRST
2-3A to 1 DIMMs/channel
+1.2V_VDDQ
+3VS_DIMMB
JDIMM2B
RESERVE
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
255
VDDSPD
164
VREFCA
1
VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
262
GND
LOTES_ADDR007 0-P009A
CONN@
VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19
VPP1 VPP2
GND
VTT
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
+1.2V_VDDQ 141 142 147 148 153 154 159 160 163
+0.6VS_VTT
258
257 259
99 102 103 106 107 167 168 171 172 175 176 180 181 184 185 188 189 192 193 196 197 201 202 205 206 209 210 213 214 217 218 222 223 226 227 230 231 234 235 238 239 243 244 247 248 251 252
261
+2.5V
Interleaved Memory
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
DDR4_DIMMB
DDR4_DIMMB
DDR4_DIMMB
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
E
1.A
1.A
16 73Friday, March 31, 2017
16 73Friday, March 31, 2017
16 73Friday, March 31, 2017
1.A
of
of
of
Page 13
A
B
C
D
E
REV = 1.3
REV = 1.3
SPT-H_ PCH
USB
LPC/eSPI
SATA
SPT-H_ PCH
DMI
PCIe/USB 3
GPP_A1/ LAD0/ESP I_IO0 GPP_A2/ LAD1/ESP I_IO1 GPP_A3/ LAD2/ESP I_IO2 GPP_A4/ LAD3/ESP I_IO3
GPP_A5 /LFRAME#/E SPI_CS0 #
GPP_A6/ SERIRQ/ES PI_CS1#
GPP_A7 /PIRQA#/ES PI_ALERT0 #
GPP_A0 /RCIN#/ES PI_ALERT 1#
GPP_A1 4/SUS_STA T#/ESPI_R ESET#
GPP_A9/ CLKOUT_L PC0/ESPI_ CLK
GPP_A10 /CLKOUT_LP C1
6 OF 12
USB 2 .0
GPP_E10 /USB2_OC1 # GPP_E11 /USB2_OC2 #
GPP_E12 /USB2_OC3 # GPP_F15/ USB2_OCB _4 GPP_F16/ USB2_OCB _5 GPP_F17/ USB2_OCB _6 GPP_F18/ USB2_OCB _7
2 OF 12
GPP_G19 /SMI#
GPP_G18 /NMI#
GPP_E6/ DEVSLP2 GPP_E5/ DEVSLP1 GPP_E4/ DEVSLP0 GPP_F9/ DEVSLP7 GPP_F8/ DEVSLP6 GPP_F7/ DEVSLP5 GPP_F6/ DEVSLP4 GPP_F5/ DEVSLP3
USB2N_1 USB2P_1 USB2N_2 USB2P_2 USB2N_3 USB2P_3 USB2N_4 USB2P_4 USB2N_5 USB2P_5 USB2N_6 USB2P_6 USB2N_7 USB2P_7 USB2N_8 USB2P_8 USB2N_9
USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14
GPP_E9/U SB2_OC0#
USB2_COMP
USB2_VBUSSENSE
RSVD_AB13
USB2_ID
GPD7/RSV D
LPC_AD0
AT22
LPC_AD1
AV22
LPC_AD2
AT19
LPC_AD3
BD16
LPC_FRAME#
BE16
TPM_SERIRQ
BA17
LPC_PIRQA#
AW17 AT17
ESPI_RST#
BC18
CLK_LPC
BC17
CLK_LPC_TPM
AV19
M45 N43
AE45 AG43
SSD_DEVSLP0
AG42 AB39 AB36 AB43 AB42 AB41
AF5 AG7
USB20_N2
AD5
USB20_P2
AD7
USB20_N3
AG8
USB20_P3
AG10 AE1 AE2
USB20_N5
AC2
USB20_P5
AC3
USB20_N6
AF2
USB20_P6
AF3
USB20_N7
AB3
USB20_P7
AB2
USB20_N8
AL8
USB20_P8
AL7
USB20_N9
AA1
USB20_P9
AA2
USB20_N10
AJ8
USB20_P10
AJ7 W2 W3 AD3 AD2 V2 V1 AJ11 AJ13
AD43 AD42 AD39 AC44 Y43 Y41 W44 W43
AG3 AD10 AB13 AG2
BD14
?
CHECK ACER DVR for port use 12/08 Change Port, follow DVR1044_R1.03
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4 USB_OC5 USB_OC6 USB_OC7 USB_OC5
USB2_COMP USB2_VBUSSENSE
USB2_ID
546765_2015WW10_Skylake_MOW _Rev_ 1_0 05/19 RH150
LPC_AD0 <4 5,47> LPC_AD1 <4 5,47> LPC_AD2 <4 5,47> LPC_AD3 <4 5,47>
LPC_FRAME# <45,47> TPM_SERIRQ <45,47>
ESPI_RST# <45>
RH3 22_0402_5% RH4 22_0402_5%TPM@
12 12
SSD_DEVSLP0 <40>
USB20_N2 <41> USB20_P2 <41> USB20_N3 <42> USB20_P3 <42>
USB20_N5 <39> USB20_P5 <39> USB20_N6 <39> USB20_P6 <39> USB20_N7 <43> USB20_P7 <43> USB20_N8 <36> USB20_P8 <36> USB20_N9 <36> USB20_P9 <36> USB20_N10 <48> USB20_P10 <48>
USB_OC1# <41>
1 2
RH7 113_0402_1%
1 2
RH8 0_0402_5%@
1 2
RH9 0_0402_5%@
LPC Bus
LPC : +3.3V
To TPM
CLK_LPC_R <45 > CLK_LPC_TPM_R <47>
USB3 MB
TYPE C
USB2 (SUB/B)
BT
TS
Camera
FingerP rin t
TPM_SERIRQ
DG requierment 8 .2k PH +3VS CRB 10K PH +3vs
LPC_PIRQA#
1 2
RH1 10 K_0402_5%
RH5 10 K_0402_5%
DG requierment 8.2k~10K PH +3VS
To EC
USB_OC0#
CH68 1000P_0402_50V7K
USB_OC0# USB_OC1# USB_OC3# USB_OC2#
10K_0804_8P4R_5 %
USB_OC4 USB_OC6 USB_OC7
10K_0804_8P4R_5 %
RPH1
RPH2
@
ESD@
12
12
18 27 36 45
18 27 36 45
+3VS
+3VS
+3VALW_PCH_PRIM
UH1F
C11
USB3_1_TXN
B11
USB3_1_TXP
B7
USB3_1_RXN
A7
USB3_1_RXP
USB3_PTX_DRX_N2<41> USB3_PTX_DRX_P2<41>
1 1
USB3 MB
USB3 SUB
USB3 Type C
2 2
DMI_CTX_PRX_N0<9> DMI_CTX_PRX_P0<9 >
DMI_CRX_PTX_N0<9>
DMI_CRX_PTX_P0<9 > DMI_CTX_PRX_N1<9> DMI_CTX_PRX_P1<9 >
DMI_CRX_PTX_N1<9>
DMI_CRX_PTX_P1<9 > DMI_CTX_PRX_N2<9> DMI_CTX_PRX_P2<9 >
DMI_CRX_PTX_N2<9>
DMI_CRX_PTX_P2<9 > DMI_CTX_PRX_N3<9> DMI_CTX_PRX_P3<9 >
DMI_CRX_PTX_N3<9>
DMI_CRX_PTX_P3<9 >
1 2
RH6 10 0_0402_1%
#546884 P.231 PCIE_RCOMP N/PCIE_RCOMPP BO=4 W=12~15 S=12 R=100ohm
3 3
NGFF WL+BT(KEY E)
GLAN
PCIE_PRX_DTX_N3<43>
PCIE_PRX_DTX_P3<43> PCIE_PTX_C_DRX_N3<43> PCIE_PTX_C_DRX_P3<43>
PCIE_PRX_DTX_N4<38>
PCIE_PRX_DTX_P4<38> PCIE_PTX_C_DRX_N4<38> PCIE_PTX_C_DRX_P4<38>
CH5 .1U_0402_16V7K CH6 .1U_0402_16V7K
CH7 .1U_0402_16V7K CH8 .1U_0402_16V7K
USB3_PRX_DTX_N2<41> USB3_PRX_DTX_P2<41>
USB3_PTX_DRX_N5<39> USB3_PTX_DRX_P5<39> USB3_PRX_DTX_N5<39> USB3_PRX_DTX_P5<39>
USB3_PTX_DRX_P3<42> USB3_PTX_DRX_N3<42> USB3_PRX_DTX_P3<42> USB3_PRX_DTX_N3<42>
USB3_PTX_DRX_P4<42> USB3_PTX_DRX_N4<42> USB3_PRX_DTX_P4<42> USB3_PRX_DTX_N4<42>
DMI_CTX_PRX_N0 DMI_CTX_PRX_P0 DMI_CRX_PTX_N0 DMI_CRX_PTX_P0 DMI_CTX_PRX_N1 DMI_CTX_PRX_P1 DMI_CRX_PTX_N1 DMI_CRX_PTX_P1 DMI_CTX_PRX_N2 DMI_CTX_PRX_P2 DMI_CRX_PTX_N2 DMI_CRX_PTX_P2 DMI_CTX_PRX_N3 DMI_CTX_PRX_P3 DMI_CRX_PTX_N3 DMI_CRX_PTX_P3
PCIE_RCOMPN PCIE_RCOMPP
PCIE_PRX_DTX_N3
PCIE_PRX_DTX_P3
12 12
12 12
PCIE_PTX_DRX_N3
PCIE_PTX_DRX_P3
PCIE_PRX_DTX_N4
PCIE_PRX_DTX_P4 PCIE_PTX_DRX_N4 PCIE_PTX_DRX_P4
B12
USB3_2_TXN/SSIC_1_TXN
A12
USB3_2_TXP/SSIC_1_TXP
C8
USB3_2_RXN/SSIC_1_RXN
B8
USB3_2_RXP/SSIC_1_RXP
B15
USB3_6_TXN
C15
USB3_6_TXP
K15
USB3_6_RXN
K13
USB3_6_RXP
B14
USB3_5_TXN
C14
USB3_5_TXP
G13
USB3_5_RXN
H13
USB3_5_RXP
D13
USB3_3_TXP/SSIC_2_TXP
C13
USB3_3_TXN/SSIC_2_TXN
A9
USB3_3_RXP/SSIC_2_RXP
B10
USB3_3_RXN/SSIC_2_RXN
B13
USB3_4_TXP
A14
USB3_4_TXN
G11
USB3_4_RXP
E11
USB3_4_RXN
SKL-H-PCH_BGA837
@
UH1B
L27
DMI_RXN0
N27
DMI_RXP0
C27
DMI_TXN0
B27
DMI_TXP0
E24
DMI_RXN1
G24
DMI_RXP1
B28
DMI_TXN1
A28
DMI_TXP1
G27
DMI_RXN2
E26
DMI_RXP2
B29
DMI_TXN2
C29
DMI_TXP2
L29
DMI_RXN3
K29
DMI_RXP3
B30
DMI_TXN3
A30
DMI_TXP3
B18
PCIE_RCOMPN
C17
PCIE_RCOMPP
H15
PCIE1_RXN/USB3_7_RXN
G15
PCIE1_RXP/USB3_7_RXP
A16
PCIE1_TXN/USB3_7_TXN
B16
PCIE1_TXP/USB3_7_TXP
B19
PCIE2_TXN/USB3_8_TXN
C19
PCIE2_TXP/USB3_8_TXP
E17
PCIE2_RXN/USB3_8_RXN
G17
PCIE2_RXP/USB3_8_RXP
L17
PCIE3_RXN/USB3_9_RXN
K17
PCIE3_RXP/USB3_9_RXP
B20
PCIE3_TXN/USB3_9_TXN
C20
PCIE3_TXP/USB3_9_TXP
E20
PCIE4_RXN/USB3_10_RXN
G19
PCIE4_RXP/USB3_10_RXP
B21
PCIE4_TXN/USB3_10_TXN
A21
PCIE4_TXP/USB3_10_TXP
K19
PCIE5_RXN
L19
PCIE5_RXP
D22
PCIE5_TXN
C22
PCIE5_TXP
G22
PCIE6_RXN
E22
PCIE6_RXP
B22
PCIE6_TXN
A23
PCIE6_TXP
L22
PCIE7_RXN
K22
PCIE7_RXP
C23
PCIE7_TXN
B23
PCIE7_TXP
K24
PCIE8_RXN
L24
PCIE8_RXP
C24
PCIE8_TXN
B24
PCIE8_TXP
SKL-H-PCH_BGA837
@
4 4
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
PCH(1/7)DMI,PCIE,USB
PCH(1/7)DMI,PCIE,USB
PCH(1/7)DMI,PCIE,USB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
D
Date: Sheet
E
17 73Friday, March 31, 2017
17 73Friday, March 31, 2017
17 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 14
A
1 2
EC_PME#<38,45 >
1 1
SPI ROM
+3VALW_PCH_PRIM
12
RH42
10K_0402_5%
10K_0402_5%
DIS,Optimus10
2 2
M.2 SSD PCIE L2
M.2 SSD PCIE L3
3 3
SPI ROM ( 8MByte )
PCH_SPI_CS#0
PCH_SPI_IO2_0_R
4 4
UMA@
12
RH43
VGA@
UMA
PCH_SPI_CLK_0_R
DGPU_PRSNT#
GPP_F13
DGPU_PRSNT#
PCIE_PTX_DRX_P11<40> PCIE_PTX_DRX_N11<40>
PCIE_PRX_DTX_P11<40> PCIE_PRX_DTX_N11<40>
PCIE_PTX_DRX_P12<40> PCIE_PTX_DRX_N12<40> PCIE_PRX_DTX_P12<40> PCIE_PRX_DTX_N12<40>
UH3
1
/CS
2
DO(IO1)
3
/WP(IO2)
4
GND
W25Q64FVSSI Q_SO8
P/N: SA000039A40
1 2
A
@
RH44 0_0402_5%
VCC
/HOLD(IO3 )
CLK
DI(IO0)
+3VALW_SPI
CH17 0.1U_0201_10 V6K
8
PCH_SPI_IO3_0_RPCH_SPI_SO_0_R
7
PCH_SPI_CLK_0_R
6
PCH_SPI_SI_0_R
5
@
1 2
CH19 68P_0402_50V8 J
1 2
@
RH10 0_0402_5%
PCH_SPI_SI PCH_SPI_SO PCH_SPI_CS#0 PCH_SPI_CLK
PCH_SPI_IO2 PCH_SPI_IO3
PCIE_PTX_DRX_P11 PCIE_PTX_DRX_N11 PCIE_PRX_DTX_P11 PCIE_PRX_DTX_N11
DGPU_PRSNT#
PCIE_PTX_DRX_P12 PCIE_PTX_DRX_N12 PCIE_PRX_DTX_P12 PCIE_PRX_DTX_N12
EC_PME#_R
AV2 AV3
AW2
M44
AB33 AB35 AA44 AA45
G35 E35
A35 B35 H33 G33
K44 N38 N39 H44 H43
B
UH1A
BD17
GPP_A11/PME#
AG15
RSVD
AG14
RSVD
AF17
RSVD
AE17
RSVD
AR19
TP2
AN17
TP1
BB29
SPI0_MOSI
BE30
SPI0_MISO
BD31
SPI0_CS0#
BC31
SPI0_CLK
AW31
SPI0_CS1#
BC29
SPI0_IO2
BD30
SPI0_IO3
AT31
SPI0_CS2#
AN36
GPP_D1/ SPI1_CLK
AL39
GPP_D0/ SPI1_CS#
AN41
GPP_D3 /SPI1_MOS I
AN38
GPP_D2 /SPI1_MIS O
AH43
GPP_D22 /SPI1_IO3
AG44
GPP_D21 /SPI1_IO2
SKL-H-PCH_BGA837
@
UH1C
CL_CLK CL_DATA CL_RST#
R44
GPP_G8/FAN_PWM_0
R43
GPP_G9/FAN_PWM_1
U39
GPP_G10/FAN_PWM_2
N42
GPP_G11/FAN_PWM_3
U43
GPP_G0/F AN_TACH_ 0
U42
GPP_G1/F AN_TACH_ 1
U41
GPP_G2/F AN_TACH_ 2 GPP_G3/F AN_TACH_ 3
U36
GPP_G4/F AN_TACH_ 4
P44
GPP_G5/F AN_TACH_ 5
T45
GPP_G6/F AN_TACH_ 6
T44
GPP_G7/F AN_TACH_ 7
B33
PCIE11_TXP
C33
PCIE11_TXN
K31
PCIE11_RXP
L31
PCIE11_RXN
GPP_F10 /SCLOCK GPP_F11/ SLOAD GPP_F1 3/SDATAOUT 0 GPP_F1 2/SDATAOUT 1
B38
PCIE14_TXN/SATA1B_TXN
C38
PCIE14_TXP/SATA1B_TXP
D39
PCIE14_RXN/SATA1B_RXN
E37
PCIE14_RXP/SATA1B_RXP
C36
PCIE13_TXN/SATA0B_TXN
B36
PCIE13_TXP/SATA0B_TXP PCIE13_RXN/SATA0B_RXN PCIE13_RXP/SATA0B_RXP
PCIE12_TXP PCIE12_TXN PCIE12_RXP PCIE12_RXN
J45
PCIE20_TXP/SATA7_TXP PCIE20_TXN/SATA7_TXN PCIE20_RXP/SATA7_RXP PCIE20_RXN/SATA7_RXN PCIE19_TXP/SATA6_TXP PCIE19_TXN/SATA6_TXN
L39
PCIE19_RXP/SATA6_RXP
L37
PCIE19_RXN/SATA6_RXN
SKL-H-PCH_BGA837
@
To SPI ROM
B
REV = 1.3
SPT-H_ PCH
CLINK
FAN
?
PCH_SPI_CS#0
PCH_SPI_SI_0_R PCH_SPI_SO_0_R PCH_SPI_IO3_0_R PCH_SPI_CLK_0_R
SPT-H_ PCH
GPP_G15/ GSXSRESET #
1 OF 12
PCIe/SATA
HOST
3 OF 12
1 2
RH35 4.7K_0402_5%
RH38 15_0402_5%
GPP_B13 /PLTRST#
GPP_G16 /GSXCLK
GPP_G12/ GSXDOUT
GPP_G13/ GSXSLOAD
GPP_G14 /GSXDIN
GPP_E3/ CPU_GP0 GPP_E7/ CPU_GP1 GPP_B3/ CPU_GP2 GPP_B4/ CPU_GP3
GPP_H1 8/SML4ALE RT#
GPP_H17/SML4DATA
GPP_H16 /SML4CLK
GPP_H1 5/SML3ALE RT#
GPP_H14/SML3DATA
GPP_H13 /SML3CLK
GPP_H1 2/SML2ALE RT#
GPP_H11/SML2DATA
GPP_H10 /SML2CLK
INTRUD ER#
PCIE9_RXN/SATA0A_RXN
PCIE9_RXP/SATA0A_RXP PCIE9_TXN/SATA0A_TXN PCIE9_TXP/SATA0A_TXP
PCIE10_RXN/SATA1A_RXN
PCIE10_RXP/SATA1A_RXP PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
PCIE15_RXN/SATA2_RXN PCIE15_RXP/SATA2_RXP PCIE15_TXN/SATA2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN PCIE16_RXP/SATA3_RXP PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN PCIE17_RXP/SATA4_RXP PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN PCIE18_RXP/SATA5_RXP PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8 /SATALED# GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2 GPP_F0/SATAXPCIE3/SATAGP3 GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7
GPP_F2 1/EDP_BK LTCTL
GPP_F20 /EDP_BKLT EN
GPP_F19/ EDP_VDD EN
THERMTRIP#
PLTRST_PROC#
PM_DOWN
+3VALW_SPI
@
RPH3
PCH_SPI_SI
1 8
PCH_SPI_SO
2 7
PCH_SPI_IO3
3 6
PCH_SPI_CLK
4 5
15_0804_8P4R_5 %
PCH_SPI_IO2PCH_SPI_IO2_0_R
1 2
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
PLT_RST#
BB27
P43 R39 R36 R42 R41
AF41 AE44 BC23 BD24
BC36 BE34 BD39 BB36 BA35 BC35
for server and WS use
BD35 AW35 BD34
SM_INTRUDER#
BE11
PECI
PM_SYNC
C
TP_INT#
DH1 RB751V-40_SOD323-2
@
PAD
PCIE_PRX_DTX_N9
G31
PCIE_PRX_DTX_P9
H31
PCIE_PTX_DRX_N9
C31
PCIE_PTX_DRX_P9
B31
PCIE_PRX_DTX_N10
G29
PCIE_PRX_DTX_P10
E29
PCIE_PTX_DRX_N10
C32
PCIE_PTX_DRX_P10
B32
SATA_PRX_DTX_N2
F41
SATA_PRX_DTX_P2
E41
SATA_PTX_DRX_N2
B39
SATA_PTX_DRX_P2
A39
D43 E42 A41 A40
H42 H40 E45
+3VS
F45
K37 G37 G45 G44
AD44
1 2
AG36 AG35 AG39 AD35 AD31 AD38 AC43 AB44
FOR SERVER & WS ONLY
PCH_BKL_PWM
W36 W35
ENBKL PCH_ENVDD
W42
PCH_THERMTRIP#
AJ3
PCH_PECI
AL3
H_PM_SYNC_R
AJ4
PLTRST_CPU#
AK2 AH2
D
PLT_RST# <25,45,47>
12
T14
RH12
1M_0402_5%
1 2
EC_TP_INT# <45,47>
+RTCVCC
M.2 SSD PCIE L0
PCIE_PRX_DTX_N9 <40> PCIE_PRX_DTX_P9 <40> PCIE_PTX_DRX_N9 <40>
M.2 SSD PCIE L1
RH16 10K_0402_5%
SATA_GP0
1 2
RH19 10K_0402_5%@
1 2
RH20 10K_0402_5%@
1 2
RH21 1K_0402_5%PBA@
1 2
RH22 10K_0402_5%@
1 2
RH24 10K_0402_5%@
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
M.2 SSD PCIE/SATA select pin
PCH_BKL_PWM <36> ENBKL <45> PCH_ENVDD <36>
1 2
RH25 620_0402_5%
1 2
RH26 12.1_0402_1%@ RH27 30_0402_1%
PLTRST_CPU# <10>
PCIE_PTX_DRX_P9 <40>
PCIE_PRX_DTX_N10 <40> PCIE_PRX_DTX_P10 <40> PCIE_PTX_DRX_N10 <40> PCIE_PTX_DRX_P10 <40>
SATA_PRX_DTX_N2 <44>
SATA_PRX_DTX_P2 <44> SATA_PTX_DRX_N2 <44> SATA_PTX_DRX_P2 <44>
GPP_F0: SW internal pull up 20K ohm.
12
PM_DOWN_R <10>
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
SATA_GP0 <40>
THERMTRIP# <10> H_PECI <10,45> H_PM_SYNC <10>
HDD
MC74VHC 1G08DFT2G_ SC70-5
D
PLT_RST#
E
+3VS
TP_INT#
SPI0_ MO SI int. PH This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during strap sampl ing.
SPI0_ M IS O int. PH This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during strap sampl ing.
SPI0_ IO 2 int. PH This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during strap sampl ing.
SPI0_ IO 3 int. PH This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during strap sampl ing.
GPP_H12 int. PD This strap should sample LOW.
PCH_BKL_PWM ENBKL
+3VS
1
IN1
2
IN2
UH2
Custom
Custom
Custom
1 2
RH13 100K_0402_5 %
1 2
RH31 100K_040 2_5%
1 2
RH32 100K_040 2_5%
PCH PLTRST Buffer
CH16
0.1U_0201_10V6 K
1 2
5
P
PLT_RST_BUF#
4
O
G
3
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
12
RH28 100K_0402_5%
PCH(2/7)SPI,SATA,XDP
PCH(2/7)SPI,SATA,XDP
PCH(2/7)SPI,SATA,XDP
PLT_RST_BUF# <38,40,43>
E
18 73Friday, March 31, 2017
18 73Friday, March 31, 2017
18 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 15
A
HDA for AUDIO
1 2
ME_EN<45>
HDA_SDOUT_R<46> HDA_RST_AUDIO#<46> HDA_SYNC_R<46> HDA_BIT_CLK_R<46>
1 1
+3VALW_PCH_PRIM
+3VALW_DSW
+3VALW_DSW
2 2
+RTCVCC
RPH7
10K_0804_8P4R_5 %
1 2
RH49 10K_0402_5 %
1 2
RH50 10K_0402_5 %@
1 2
RH51 1K_0402_5 %
WAKE# (DSX wake event) 10 KΩ pull - up t o Vcc DS W 3_3 The pull-up is r equired even if PCIe* interface is not used on the platform.
1 2
RH60 20K_0402_5%
1 2
CH21 1U_0402_6.3V6K
@
RH47 0_0402_5%
RPH6
1 8 2 7 3 6 4 5
33_0804_8P4R_5 %
SYS_RESET#
18
PCH_PWROK
27
EC_RSMRST#
36
LAN_WAKE #
45
.1U_04 02_16V7K
2
CH64
1
XESD@
PM_BATLOW#
AC_PRESENT_R
WAKE#
PCH_SRTCRST#
HDA_SDOUT HDA_RST# HDA_SYNC HDA_BIT_CLK
1
CH62 .1U_04 02_16V7K
2
XESD@
CPU_DISPA_SDO<7>
CPU_DISPA_SDI_R<7>
CPU_DISPA_BCLK<7>
PCH_DMIC_DATA0<46> PCH_DMIC_CLK0<46>
Remove CLR ME
12
PCH_PWROKSYS_PWROK
12
PCH_SMBALERT#
PCH_SML0CLK
PCH_SML0DATA
EC_SMB_DA2 EC_SMB_CK2 PCH_SML1CLK PCH_SML1DATA
PCH_SMBDATA PCH_SMBCLK D_CK_SCLK D_CK_SDATA
PCH_RTCRST#
CLR CMOS
DMN65D8LDW-7_SOT363-6
PCH_SMBCLK
DMN65D8LDW-7_SOT363-6
PCH_SMBDATA
DMN65D8LDW-7_SOT363-6
PCH_SML1DATA
6 1
DMN65D8LDW-7_SOT363-6
QH1A
6 1
QH2A
1 2
RH63 20K_0402_5%
1 2
CH23 1U_0402_6.3V6K
1 2
JCMOS1 0_0603_5%@
Place at RAM DOOR
3 3
+3VALW_PCH_PRIM
4 4
EC_RSMRST# PCH_DPWROK
+3VALW_PCH_PRIM
RH64 4.7K_0402_5%
+3VALW_PCH_PRIM
RH65 499_0402_1%
RH66 499_0402_1%
+3VS
2.2K_0804_8P4R _5%
+3VALW_PCH_PRIM
+3VS
2.2K_0804_8P4R _5%
PDG_0_71 requirement PH to +3V_PCH 10/14 Dan
@
RH54 0_0402_5%
@
RH57 0_0402_5%
1 2
1 2
1 2
RPH8
18 27 36 45
RPH9
18 27 36 45
A
B
HDMI_HPD_PCH<25,37>
PCH_EDP_HPD<36>
HDA_SDIN0<46>
RH58 30_0402_1%
@
PAD
T204
@
PAD
PCH_RTCRST#<45>
PCH_PWROK<45,49> EC_RSMRST#<45>
T25
@
T27
@
+3VS
2
QH1B
3 4
+3VS
2
QH2B
3 4
B
T15
RH56 30_0402_1%
1 2
1 2
PCH_DMIC_DATA0 PCH_DMIC_CLK0 PCH_DMIC_DATA1 PCH_DMIC_CLK1
PAD
PAD
5
5
HDMI_HPD_PCH
EC_SCI#_I3
PAD@
PCH_EDP_HPD
HDA_BIT_CLK HDA_RST# HDA_SDIN0
HDA_SDOUT HDA_SYNC
CPU_DISPA_SDO_R CPU_DISPA_SDI_R CPU_DISPA_BCLK_R
PCH_RTCRST# PCH_SRTCRST#
PCH_PWROK EC_RSMRST#
PCH_DPWROK PCH_SMBALERT# PCH_SMBCLK PCH_SMBDATA PCH_SML0ALERT#
PCH_SML0CLK
PCH_SML0DATA PCH_SML1ALERT# PCH_SML1CLK PCH_SML1DATA
D_CK_SCLK
D_CK_SDATA
EC_SMB_CK2PCH_SML1CLK
EC_SMB_DA2
UH1E
AW4
GPP_I0/D DPB_HPD 0
AY2
GPP_I1/D DPC_HPD 1
AV4
GPP_I2/D DPD_HPD 2
BA4
GPP_I3/D DPE_HPD 3
BD7
GPP_I4/E DP_HPD
SKL-H-PCH_BGA837@
UH1D
BA9
HDA_BCLK
BD8
HDA_RST#
BE7
HDA_SDI0
BC8
HDA_SDI1
BB7
HDA_SDO
BD9
HDA_SYNC
BD1
RSVD_BD1
BE2
RSVD_BE2
AM1
DISPA_SDO
AN2
DISPA_SDI
AM2
DISPA_BCLK
AL42
GPP_D8/ I2S0_SCL K
AN42
GPP_D7/ I2S0_RXD
AM43
GPP_D6/ I2S0_TXD
AJ33
GPP_D5 /I2S0_SFR M
AH44
GPP_D20/DMIC_DATA0
AJ35
GPP_D19 /DMIC_CL K0
AJ38
GPP_D18/DMIC_DATA1
AJ42
GPP_D17 /DMIC_CL K1
BC10
RTCRST #
BB10
SRTCRST#
AW11
PCH_PWROK
BA11
RSMRST#
AV11
DSW_PWROK
BB41
GPP_C2 /SMBALERT #
AW44
GPP_C0/ SMBCLK
BB43
GPP_C1/SMBDATA
BA40
GPP_C5 /SML0ALE RT#
AY44
GPP_C3 /SML0CLK
BB39
GPP_C4/SML0DATA
AT27
GPP_B2 3/SML1ALE RT#/PCHH OT#
AW42
GPP_C6 /SML1CLK
AW45
GPP_C7/SML1DATA
SKL-H-PCH_BGA837@
(DDR,G-Senso r)
D_CK_SCLK <15,16,44>
D_CK_SDATA <15,16,44>
(EC, VGA)
EC_SMB_CK2 <25,39,45>
EC_SMB_DA2 <25,39,45>
AUDIO
SPT-H_ PCH
5 OF 12
C
GPP_I7/D DPC_CTR LCLK
GPP_I8/D DPC_CT RLDATA
GPP_I5/D DPB_CTR LCLK
GPP_I6/D DPB_CT RLDATA
GPP_I9/D DPD_CTR LCLK
GPP_I10 /DDPD_C TRLDATA
SPT-H_ PCH
GPP_A12 /BMBUSY#/ ISH_GP6/SX _EXIT_HOL DOFF#
GPP_A1 3/SUSWA RN#/SUS PWRDNAC K
SMBUS
JTAG
4 OF 12
BB3 BD6 BA5 BC4 BE5 BE6
Y44
GPP_F14
V44
GPP_F23
W39
GPP_F22
L43
GPP_G23
L44
GPP_G22
U35
GPP_G21
R35
GPP_G20
BD36
GPP_H23
GPP_G17/ ADR_COMP LETE
GPP_A8/ CLKRUN#
GPD11/LAN PHYPC
GPD9/SLP_WLAN#
GPP_B2/ VRALERT#
GPP_B12 /SLP_S0#
GPD0/BATLOW#
GPP_A15 /SUSACK#
GPD2/LA N_WAKE# GPD1/ACP RESENT
GPD3/PWRBTN#
DRAM_RESET#
GPP_B1 GPP_B0
GPP_B11
SYS_PWROK
WAKE#
GPD6/SL P_A#
SLP_LAN#
GPD4/SLP _S3# GPD5/SLP _S4#
GPD10/S LP_S5#
GPD8/SU SCLK
SLP_SUS#
SYS_RESET#
GPP_B14 /SPKR
PROCPWRGD
ITP_PM ODE
JTAGX JTAG_TMS JTAG_TDO
JTAG_TDI
JTAG_TCK
BB17 AW22
AR15
AV13
BC14 BD23 AL27 AR27 N44 AN24 AY1
BC13 BC15 AV15 BC26 AW15 BD15 BA13
AN15 BD13 BB19 BD19
BD11 BB15 BB13 AT13 AW1 BD26 AM3
AT2 AR3 AR2 AP1 AP2 AN3
D
H_SKTOCC# <10>
PM_CLKRUN#
SLP_WLAN#
DDR_DRAMRST# PCH_VRALERT# TYPEC_3A_1P5A# LAN_GPO
SYS_PWROK
WAKE# PM_SLP_A#
SLP_LAN# PM_SLP_S0# PM_SLP_S3# PM_SLP_S4# PM_SLP_S5#
SUSCLK PM_BATLOW#
1 2
@
RH62 0_0402_5%
LAN_WAKE # AC_PRESENT_R PM_SLP_SUS# PBTN_OUT#_R SYS_RESET# PCH_SPKR
H_CPUPWRGD
XDP_ITP_PMODE CPU_XDP_TCK0 CPU_XDP_TMS CPU_XDP_TDO CPU_XDP_TDI PCH_JTAG_TCK1
PM_CLKRUN# <47>
@
PAD
DDR_DRAMRST# <15>
TYPEC_3A_1P5A# <42> LAN_GPO <38 >
SYS_PWROK <45,49>
@
PAD
@
PAD
PM_SLP_S0# <45> PM_SLP_S3# <45,49> PM_SLP_S4# <45,49> @T203
PAD
SUSCLK <40,43>
@
PAD
@
PAD
PCH_SPKR <46>
H_CPUPWRGD <10>
PAD
CPU_XDP_TCK0 <7,10> CPU_XDP_TMS <7,10> CPU_XDP_TDO <7,10> CPU_XDP_TDI <7,10> PCH_JTAG_TCK1 <7>
Functional Strap Definitions
SMBALERT# / GPP_C2 int. PD 0 = Disable In tel ME (TL S) (Default) 1 = Enable Intel ME (TLS)
SML0ALERT# / GPP_C5 int. PD 0 = LPC Is selected for EC. (Default) 1 = eSPI Is selected for EC.
SML1ALER T# / PCHHOT# / GPP_B2 3 int. PD
SPKR / GPP_B14 int. PD 0 = Disable “ T op S wap” mode. ( Def aul t ) 1 = Enable “ Top S wap” mode.
HDA_SDO int. PD 0 = Enabl e security measures defin ed in the F lash Descriptor. (Default) 1 = D isable Flash Descrip tor S ecurity (ove rride).
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
D
T16
T17 T18
T21
T22
SUSPWRDNACK <45>
T23
T26
@
DDPB_CTRLDATA / GPP_I6 int. PD 0 = Port B is not detect ed. 1 = Port B is det ected. (Default)
DDPC_CTRLDATA / GPP_I8 int. PD 0 = Port C is not detect ed. 1 = Port C is detected. (Default)
DDPD_CTRLDATA / GPP_I10 int. PD 0 = Po rt D is not detected. (Def ault) 1 = Po rt D is detected.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
PCH(3/7)GPIO,SMBUS
PCH(3/7)GPIO,SMBUS
PCH(3/7)GPIO,SMBUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
PM_CLKRUN#
RH48 10K_040 2_5%
PCH_VRALERT#
PBTN_OUT#_R
PBTN_OUT#_R
AC_PRESENT_R
SYS_PWROK
SYS_RESET#
E
CRB 8.2K
1 2
+3VALW_PCH_PRIM
@
RH55
0_0402_5%
@
RH59
0_0402_5%
1 2
E
XESD@
1 2
XESD@
1 2
12
12
19 73Friday, March 31, 2017
19 73Friday, March 31, 2017
19 73Friday, March 31, 2017
+3VALW_DSW
PBTN_OUT# <45>
AC_PRESENT <45 >
of
of
of
RH52 10K_0402_5%@
RH53 100K_0402_5%
1 2
1 2
RH61 10K_0402_5%
CH61 .1U_0402_1 6V7K
CH22 .1U_0402_1 6V7K
+3VS
1.A
1.A
1.A
Page 16
A
RH164
24M X'tal
1 2
RH72 1M_0402_5%
YH2
24MHZ_18PF_XRCGB24M00 0F2P51R0
1 1
3
NC
CH24
4
3
33P_0402_50V8J
1
1
NC
2
33_0402_1%
1 2
RH165 33_0402_1%
1 2
18P_0402_50V8J
CH25
EMI@
XTAL24_OUT
EMI@
XTAL24_IN
B
C
D
E
RTC X'tal
RTCX1
1 2
RH71 10M_0402_5%
YH1
1 2
32.768KHZ_9PF_CM7V-T1A9.0PF 20PPM
8.2P_0402_50V8D
1
CH26
2
2 2
P/N: SJ10000Q400 (S CRYSTAL 32.768KHZ 9PF 20PPM 9H03280012)
+3VS
12
RH68
@
10K_0402_5%
CLKREQ_PCIE#3
+3VS
3 3
4 4
RPH10
18 27 36 45
10K_0804_8P4R_5%
RPH11
@
18 27 36 45
10K_0804_8P4R_5%
RPH12
@
18 27 36 45
10K_0804_8P4R_5%
RPH13
@
18 27 36 45
10K_0804_8P4R_5%
LAN_CLKREQ# VGA_CLKREQ# WLAN_CLKREQ# NGFF_CLKREQ#
CLKREQ_PCIE#12 CLKREQ_PCIE#7 CLKREQ_PCIE#10 CLKREQ_PCIE#5
CLKREQ_PCIE#9 CLKREQ_PCIE#8 CLKREQ_PCIE#6 CLKREQ_PCIE#13
CLKREQ_PCIE#14 CLKREQ_PCIE#11 CLKREQ_PCIE#15
RTCX2
CPU_24M<10>
LAN_CLKREQ#<38>
WLAN_CLKREQ#<43>
NGFF_CLKREQ#<40 >
CPU_24M#<10>
CPU_BCLK<10> CPU_BCLK#<10>
RH67
2.7K_0402_1%
XTAL24_OUT XTAL24_IN
12
RTCX1 RTCX2
VGA_CLKREQ# LAN_CLKREQ# WLAN_CLKREQ# CLKREQ_PCIE#3 NGFF_CLKREQ# CLKREQ_PCIE#5 CLKREQ_PCIE#6 CLKREQ_PCIE#7 CLKREQ_PCIE#8 CLKREQ_PCIE#9 CLKREQ_PCIE#10 CLKREQ_PCIE#11 CLKREQ_PCIE#12 CLKREQ_PCIE#13 CLKREQ_PCIE#14 CLKREQ_PCIE#15
XCLK_BIASREF
8.2P_0402_50V8D
1
CH27
2
+1.0VALW_VCCCLK 5
VGA_CLKREQ# <24>
UH1G
AR17
GPP_A16/CLKOUT_48
G1
CLKOUT_CPUNSSC_P
F1
CLKOUT_CPUNSSC_N
G2
CLKOUT_CPUBCLK_P
H2
CLKOUT_CPUBCLK_N
A5
XTAL24_OUT
A6
XTAL24_IN
E1
XCLK_BIASREF
BC9
RTCX1
BD10
RTCX2
BC24
GPP_B5/SRCCLKRE Q0#
AW24
GPP_B6/SRCCLKRE Q1#
AT24
GPP_B7/SRCCLKRE Q2#
BD25
GPP_B8/SRCCLKRE Q3#
BB24
GPP_B9/SRCCLKRE Q4#
BE25
GPP_B10/SRCCLK REQ5#
AT33
GPP_H0/SRCCLKRE Q6#
AR31
GPP_H1/SRCCLKRE Q7#
BD32
GPP_H2/SRCCLKRE Q8#
BC32
GPP_H3/SRCCLKRE Q9#
BB31
GPP_H4/SRCCLKRE Q10#
BC33
GPP_H5/SRCCLKRE Q11#
BA33
GPP_H6/SRCCLKRE Q12#
AW33
GPP_H7/SRCCLKRE Q13#
BB33
GPP_H8/SRCCLKRE Q14#
BD33
GPP_H9/SRCCLKRE Q15#
R13
CLKOUT_PCIE_N15
R11
CLKOUT_PCIE_P15
P1
CLKOUT_PCIE_N14
R2
CLKOUT_PCIE_P14
W7
CLKOUT_PCIE_N13
Y5
CLKOUT_PCIE_P13
U2
CLKOUT_PCIE_N12
U3
CLKOUT_PCIE_P12
SKL-H-PCH_BGA837
@
REV = 1.3
SPT-H_PCH
CLKOUT_CPUPCIBCLK_ N
CLKOUT_CPUPCIBCLK_ P
7 OF 12
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5
CLKOUT_PCIE_N6 CLKOUT_PCIE_P6
CLKOUT_PCIE_N7 CLKOUT_PCIE_P7
CLKOUT_PCIE_N8 CLKOUT_PCIE_P8
CLKOUT_PCIE_N9 CLKOUT_PCIE_P9
CLKOUT_PCIE_N10
CLKOUT_PCIE_P10
CLKOUT_PCIE_N11
CLKOUT_PCIE_P11
?
CLK_CPU_ITP#
L1
CLK_CPU_ITP
L2
CPU_PCIBCLK#
J1
CPU_PCIBCLK
J2
CLK_PEG_VGA#
N7
CLK_PEG_VGA
N8
CLK_PCIE_LAN#
L7
CLK_PCIE_LAN
L5
CLK_PCIE_WLAN#
D3
CLK_PCIE_WLAN
F2
E5 G4
CLK_PCIE_NGFF#
D5
CLK_PCIE_NGFF
E6
D8 D7
R8 R7
U5 U7
W10 W11
N3 N2
P3 P2
R3 R4
PAD
T28
@
PAD
T29
@
CPU_PCIBCLK# <10 > CPU_PCIBCLK <10 >
CLK_PEG_VGA# <24> CLK_PEG_VGA <24>
CLK_PCIE_LAN# <38>
CLK_PCIE_LAN <38>
CLK_PCIE_WLAN# <43>
CLK_PCIE_WLAN <43>
CLK_PCIE_NGFF# <40> CLK_PCIE_NGFF <40>
DGPU
GLAN
NGFF WL+BT(KEY E)
M2 SSD
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
PCH(4/7)CLK
PCH(4/7)CLK
PCH(4/7)CLK
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1.A
1.A
20 73Friday, March 31, 2017
20 73Friday, March 31, 2017
20 73Friday, March 31, 2017
E
1.A
of
of
of
Page 17
A
B
C
D
E
Functional Strap Definitions
GSPI1_MOSI / GPP_B22 int. PD Boot BIOS Destination 0 = SPI (Default) 1 = LPC
1 1
2 2
GSPI0_MOSI / GPP_B18 int. PD 0 = Disable “ No Reboot ” mode. ( Def aul t) 1 = Enable “ No Reboot ” mode ( P CH will di sabl e t he TCO Timer system reboot feature).
+3VS
RH14 10K_0402_5%@
+3VS
RH73 49.9K_0402_1%
RH74 49.9K_0402_1%
RH76 49.9K_0402_1%@
RH75 49.9K_0402_1%@
12
12
12
12
12
EC_SCI#
UART_2_CRXD_DTXD
UART_2_CTXD_DRXD
UART_2_CCTS_DRTS
UART_2_CRTS_DCTS
EC_SCI#
GC6_FB_EN
@
@
PAD
T37
PCH_AC_DET
GPU_EVENT_R#
DGPU_HOLD_RST# DGPU_PWR_EN
UART_2_CCTS_DRTS UART_2_CRTS_DCTS UART_2_CTXD_DRXD UART_2_CRXD_DTXD
I2C_1_SCL I2C_1_SDA
PCH_GPP_D4
EC_SCI# <45>
DGPU_AC_DETECT<25,45>
UART_2_CTXD_DRXD<43>
UART_2_CRXD_DTXD<43>
<Touch PAD>
1 2
RH77 0_0402_5%
DGPU_HOLD_RST#<25 >
DGPU_PWR_EN<25,35>
I2C_1_SCL<47> I2C_1_SDA<47>
UH1K
AT29
GPP_B22/GSPI1_MOSI
AR29
GPP_B21/GSPI1_MISO
AV29
GPP_B20/GSPI1_CLK
BC27
GPP_B19/GSPI1_CS#
BD28
GPP_B18/GSPI0_MOSI
BD27
GPP_B17/GSPI0_MISO
AW27
GPP_B16/GSPI0_CLK
AR24
GPP_B15/GSPI0_CS#
AV44
GPP_C9/UART0_TXD
BA41
GPP_C8/UART0_RXD
AU44
GPP_C11/UART0_CTS#
AV43
GPP_C10/UART0_RTS#
AU41
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AT44
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU43
GPP_C12/UART1_RXD/ISH_UART1_RXD
AN43
GPP_C23/UART2_CTS#
AN44
GPP_C22/UART2_RTS#
AR39
GPP_C21/UART2_TXD
AR45
GPP_C20/UART2_RXD
AR41
GPP_C19/I2C1_ SCL
AR44
GPP_C18/I2C1_ SDA
AR38
GPP_C17/I2C0_ SCL
AT42
GPP_C16/I2C0_ SDA
AM44
GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
AJ44
GPP_D23/ISH_I2 C2_SCL/ISH_I2C3_SCL
SKL-H-PCH_BGA837
@
SPT-H_PCH
GPP_D16/ISH_UART0_CTS#
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA
REV = 1.3
GPP_D15/ISH_UART0_RTS#
11 OF 12
GPP_D9 GPP_D10 GPP_D11 GPP_D12
GPP_H20/ISH_I2 C0_SCL GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2 C1_SCL GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1 GPP_A18/ISH_GP0 GPP_A17/ISH_GP7
AL44 AL36 AL35 AJ39
AJ43 AL43 AK44 AK45
BC38 BB38
BD38 BE39
BC22 BD18 BE21 BD22 BD21 BB22 BC19
VGA_ID1 VGA_ID2 PROJECT_ID0 PROJECT_ID1
SUB_DET
PAD PAD
PAD PAD
PAD PAD
PAD
@ @
@ @
@ @
@
T30 T31
T32 T33
T34 T35
T36
SUB_DET <39>
G_INT
+3VALW_PCH_PRIM
1 2
RH80 2.2K_0402_5%
1 2
RH81 2.2K_0402_5%
3 3
+3VS
RH83 10K_0402_5%VGA@
RH85 10K_0402_5%VGA@
<Touch PAD/PNL>
12
12
I2C_1_SCL
I2C_1_SDA
DGPU_PWR_EN
DGPU_HOLD_RST#
VGA_ID1
VGA_ID2
1 2
RH88 1K_0402_5%@
1 2
RH90 10K_0402_5%@
1 2
RH92 1K_0402_5%VGA@
1 2
RH94 10K_0402_5%
@
VGA_ID1 / VGA_ID2 / Project_ID0 / Project ID1 SW set GPI interanl pull down 20K.
VGA ID
N17P-G0
TO DGPU
GPU_EVENT#<25>
GC6_FB_EN3V3<25>
4 4
GC6_FB_EN3V3 GC6_FB_EN
A
RH86 0_0402_5%@
1 2
1 2
RH87 0_0402_5%@
GPU_EVENT_R#GPU_EVENT#
B
N17P-G1
*
N17E-G1 Reserved
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VALW_PCH_PRIM
VGA_ID1VGA_ID2
GPP_D9GPP_D10 00 0 1
1 0
11
Compal Secret Data
Compal Secret Data
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
C
Compal Secret Data
PROJECT_ID0
PROJECT_ID1
Project ID
C5MMH
*
C5PRH Reserved Reserved
Deciphered Date
Deciphered Date
Deciphered Date
1 2
RH89 1K_0402_5%
1 2
RH91 10K_0402_5%@
1 2
RH93 1K_0402_5%@
1 2
RH95 10K_0402_5%@
D
+3VALW_PCH_PRIM
Project_ID0Project_ID1
GPP_D11GPP_D12 00 0 1
1 0
11
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
PCH(5/7)UART,I2C,GPIO
PCH(5/7)UART,I2C,GPIO
PCH(5/7)UART,I2C,GPIO
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
+3VS
@
1 2
@
1 2
RH82
10K_0402_5%
G_INT
RH84
100K_0402_5%
E
G_INT <44>
21 73Friday, March 31, 2017
21 73Friday, March 31, 2017
21 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 18
A
B
C
D
E
+1.0VALW_PRIM+1.0VALW
JPC4
@
JUMP_43X39
2
112
RH98 0_0805_5%
1 1
+1.0VALW_PCH
2 2
3 3
4 4
1 2
RH101 for Deep SX.
1 2
RH101 0_0402_5%@
1 2
0_0603_5%
LH1
FBMA-L11-160808-800LMT_0603
1 2
1 2
0_0603_5%
NO USE MPHYGT ON H CHANGE TO +1.0VALW_MPHY
LH2
1 2
FBMA-L11-160808-800LMT_0603
LH3
1 2
FBMA-L11-160808-800LMT_0603
1 2
RH106 0_0402_5%
1 2
RH107 0_0402_5%
@
RH103
@
PVT modify
22U_0603_6.3V6M
RH104
@
22U_0603_6.3V6M
Near PIN U21,U23,U25,U26, V26
22U_0603_6.3V6M
22U_0603_6.3V6M
@
@
+1.0VALW_PCH
+1.0VALW_DCPDSW
Near PIN BA29
1
CH28
1U_0402_6.3V6K
2
+1.0VALW_VCCCLK
1
CH30
2
+1.0VALW_MPHY
1
CH39
2
1
CH47
2
+1.0VALW_AUSB_AZPLL
1
CH53
2
+1.0VALW_PRIMAL22
+1.0VALW_PRIMAD15
1
ESD@
CH71 1000P_0402_50V7K
2
+1.0VALW_VCCCLK5
Near PIN
22U_0603_6.3V6M
K2,K3
CH31
1
1
CH32
2
1U_0402_6.3V6K
2
@
modify follow PDG 05/1 8
1U_0402_6.3V6K
1U_0402_6.3V6K
CH41
CH40
1
1
2
2
Near PIN V28 Near PIN AC17
+1.0VALW_AMPHYPLL
Near PIN
22U_0603_6.3V6M
A42,A43,B4 3
CH48
1
1
CH49
2
Near PIN AJ5,AL5
CH54
22U_0603_6.3V6M
1U_0402_6.3V6K
@
2
1
2
PCH_EDS Table10-4
2.899A
0.0454A
0.021A
0.050A
0.024A
0.137A
0.006A
1.307A
0.110A
0.030A
0.533A
0.012A
0.033A
0.075A
CH44
1U_0402_6.3V6K
12/30 J
AA23 AA26
AA28 AC23 AC26 AC28
AE23
AE26
Y23 Y25
BA29
N17 R19 U20
V17
R17
U21 U23 U25 U26
V26 A43
B43 C44 C45
V28
AC17
AJ5
AL5
AN19
BA15 W15
K2 K3
UH1H
VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 DCPDSW_1P0
VCCCLK1 VCCCLK3 VCCCLK4 VCCCLK2 VCCCLK2 VCCCLK5 VCCCLK5
VCCMPHY_1P 0 VCCMPHY_1P 0 VCCMPHY_1P 0 VCCMPHY_1P 0 VCCMPHY_1P 0 VCCMPHYPLL_ 1P0 VCCMPHYPLL_ 1P0 VCCPCIE3PLL _1P0 VCCPCIE3PLL _1P0 VCCAPLLEBB_1 P0 VCCPRIM_1P 0 VCCUSB2PLL _1P0 VCCUSB2PLL _1P0 VCCHDAPLL_ 1P0
VCCHDA VCCDSW_3P3
SKL-H-PCH_BGA837
@
SPT-H_PCH
CORE
MPHY
USB
VCCGPIO
VCCRTCPRIM_3P3
8 OF 12
+3VALW_PCH_PRIM
1
@
2
+3VALW_PCH_PRIM
22U_0603_6.3V6M
1
@
2
VCCPRIM_1P 0
VCCDSW_3P3
VCCPGPPA
VCCPGPPBCH VCCPGPPBCH
VCCPGPPEF VCCPGPPEF
VCCPGPPG
VCCPRIM_3P 3
VCCPRIM_1P 0
VCCRTC DCPRTC
VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0 VCCPRIM_1P 0
VCCPGPPD VCCPGPPD VCCPGPPD VCCPGPPD
VCCPRIM_3P 3 VCCPRIM_3P 3 VCCPRIM_3P 3
1U_0402_6.3V6K
CH51
22U_0603_6.3V6M
CH55
1
@
2
VCCATS
VCCSPI VCCSPI VCCSPI
CH57
AL22
0.0908A
BA24
0.195A
BA31
0.082A
BC42
0.2726A
BD40 AJ41
0.1410A
AL41 AD41
0.1318A
AN5
0.2875A
AD15
0.0061A
AD13
0.007A
BA20
0.0002A
BA22 BA26
AJ20 AJ21 AJ23 AJ25
BE41
0.029A
BE43 BE42 BC44
0.078A
BA45 BC45 BB45
BD3
0.117A
BE3 BE4
+1.0VALW_PRIM
1U_0402_6.3V6K
1
@
2
+1.0VALW_PRIM
22U_0603_6.3V6M
CH56
1
@
@
2
1 2
CH34 0.1U_020 1_10V6K
CH52
22U_0603_6.3V6M
CH58
1
2
+1.0VALW_PRIMAL22
+3VALW_DSW +3VALW_PCH_PRIM
+1.0VALW_PRIMAD15 +3VS_VCCATS +3VALW_PCH_PRIM +RTCVCC
Near PIN BA26
+1.0VALW_PRIM
+3VALW_SPI
+3VALW_PCH_PRIM
+3VALW_PCH_PRIM
+1.0VALW_PRIM
+1.0VALW_DCPDSW
+1.0VALW_VCCCLK
+1.0VALW_VCCCLK5
+1.0VALW_MPHY
+1.0VALW_AMPHYPLL
modify follow PDG 05/1 8
+1.0VALW_MPHY
+1.0VALW_AUSB_AZPLL
+3VALW_HDA +3VALW_DSW
1U_0402_6.3V6K
CH42
1
2
1
2
Near PIN W15 Add 05/18
VCCMPHY power defined by HSIO lane qty.
Power Rail V ol tag e
+1.0VALW_MPHY
1
ESD@
CH69
1000P_0402_50V7K
2
Place close to CPU PIN
+CHGRTC
BAT54C (VF)
+3VL_RTC
Result : Pass
3.383V (MAX )
240 mV
3.143V
+3VALW
RH97 0_0603_5%@1 2
@
JPC5 JUMP_43X39
112
RH100 0_0603_5%@1 2
+3VALW_PCH_PRIM +3VALW_SPI
RH102
1 2
+3VALW_PCH_PRIM
1 2
CH29 1U_0402 _6.3V6K
@
1 2
CH33 1U_0402 _6.3V6K
@
1 2
CH35 0.1U_02 01_10V6K
1 2
CH36 1U_0402 _6.3V6K
CH37 0.1U_02 01_10V6K1 2
1 2
CH38 0.1U_02 01_10V6K
1 2
CH43 0.1U_02 01_10V6K
1 2
CH45 0.1U_02 01_10V6K
1 2
CH46 1U_0402 _6.3V6K
@1 2
RH105 0 _0402_5%
RTC Battery
+RTCVCC
1
1
CH60
0.1U_0201_10V6K
+RTCBATT
1U_0402_6.3V6K
2
2
JRTC1
1
1
2
2
3
GND
4
GND
ACES_50271-0020N-001
CONN@
SP0200 0RO00
CH59
+3VALW_DSW
+3VALW_PCH_PRIM
2
+3VALW_HDA
0_0603_5%@
Near PIN BD3,BE3,BE4
Near PIN BA20
Near PIN AN5
No requirment Near PIN BC44
Near PIN BC42,BD40
Near PIN AJ41 , AL41
Near PIN AD41
Near PIN BA20
+3VS_VCCATS+3VS
CH50 1U_0402 _6.3V6K
1 2
@
Near PIN AD13
DH3
2
1
3
BAV70W_SOT323-3
1
CH66
0.1U_0201_10V6K
2
1 2
RH163
10K_0402_5%
+CHGRTC
+RTCBATT
W=20mils
Place close to CPU PIN
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
A
B
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Tit le
Tit le
Tit le
PCH(6/7)POWER
PCH(6/7)POWER
PCH(6/7)POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
D
Date: Sheet
E
22 73Friday, March 31 , 2 017
22 73Friday, March 31 , 2 017
22 73Friday, March 31 , 2 017
1.A
1.A
1.A
of
of
of
Page 19
A
B
C
D
E
UH1I
SPT-H_PCH
AC18
VSS
AN4
VSS
AN10
VSS
1 1
2 2
3 3
BE14 BE18 BE23 BE28 BE32 BE37 BE40
BE9
M35 M42
AA17 AA18 AA20 AA21 AA25 AA29
AA4 AA42 AB10
C10
C28 C37
K10 K27 K33 K36
K42 K43 L12 L13 L15
L41
N10 N15 N19 N22 N24 N35 N36
N41
P17 P19 P22 P45 R10 R14 R22 R29 R33 R38
Y18 Y20 Y21 Y26 Y28 Y29 A18 A25 A32 A37
C2
J7
K4
L4
L8
N4
N5
R5 T1 T2 T4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
9 OF 12
SKL-H-PCH_BGA837
@
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
REV = 1.3
AR5 AR7 U15 AL4 AE29 AE4 AE42 AF18 AF20 AF21 AF23 AF25 AF26 AF28 AF29 AG11 AG13 AG31 AG32 AG33 AG38 AG4 AH1 AH17 AH18 AH20 AH21 AH23 AH25 AH26 AH28 AH29 AH45 AJ10 AJ14 AJ15 AJ17 AJ18 AJ26 AJ28 AJ29 AJ31 AJ32 AJ36 AK4 AK42 AU7 AV17 AV24 AV27 AV31 AV33 AV6 AW13 AW19 AW29 AW37 AW9 AY38 AY45 B25 B3 B37 B40 B6 BA1 BB11 BB16 BB21 BB25 BB30 BB34 BC2 BD43
?
C42 D10 D12 D15 D16 D17 D19 D21 D24 D25 D27 D29 D30 D31 D33 D35 D36 E13 E15 E31 E33 F44
G42
H17 H19 H22 H24 H27 H29
H35
T42 U10 U11 U14 U17 U18 U28 U29 U31 U32 U33 U38
V18 V20 V21 V23 V25 V29
V45 W14 W31 W32 W33 W38
Y17
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
F8
VSS VSS
G9
VSS VSS VSS VSS VSS VSS VSS
H3
VSS VSS
J10
VSS
J11
VSS
J3
VSS
J39
VSS
J5
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
U4
VSS
U8
VSS VSS VSS VSS VSS VSS VSS
V3
VSS VSS VSS VSS VSS VSS VSS
W4
VSS
W8
VSS VSS
SPT-H_PCH
UH1L
12 OF 12
SKL-H-PCH_BGA837
REV = 1.3
@
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
SPT-H_PCH
AR22
RSVD
W13
RSVD
U13
RSVD
P31
RSVD
N31
RSVD
P27
RSVD
R27
RSVD
N29
RSVD
P29
RSVD
AN29
RSVD
R24
RSVD
P24
RSVD
AT3
PREQ#
AT4
PRDY#
CPU_TRST#
PCH_TRIGOUT
PCH_TRIGIN
10 OF 12
REV = 1.3
@
AY5 AL2 AK1
?
PROC_TRIGIN PROC_TRIGOUT_R
RH108
30_0402_1%
12
PROC_TRIGIN_R <14>
PROC_TRIGOUT_R <14>
BD2 BD45 BD44 BE44
D45
A42
B45
B44
BB1
BC1
A44
A4 A3 B2 A2 B1
C1 D1
UH1J
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
RSVD RSVD
SKL-H-PCH_BGA837
AB11 AB7 AB14 AB31 AB32 AB38 AB4 AB5 AC1 AC20 AC21 AC25 AC29 AC45 AB8 AD11 AD14 AB15 AD32 AD33 AD36 AD4 AD8 AE18 AE20 AE21 AE25 AE28 AL10 AL11 AL13 AL17 AL19 AL24 AL29 AL32 AL33 AL38 AM15 AM17 AM19 AM22 AM24 AM27 AM29 AM45 AN11 AN22 AN27 AN31 AN39 AN7 AN8 AP11 AP4 AR33 AR34 AR42 AR9 AT10 AT15 AT36 AT9 AU1 AU35 AU36 AU39 AU45 C4
?
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
PCH(7/7)GND
PCH(7/7)GND
PCH(7/7)GND
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1.A
1.A
23 73Friday, March 31, 2017
23 73Friday, March 31, 2017
23 73Friday, March 31, 2017
E
1.A
of
of
of
Page 20
5
DGPU_PEX_RST#<25>
D D
RG2
10K_0201_5%
VGA_CLKREQ#<20>
C C
B B
A A
5
123
MESS138 W-G_SOT32 3-3
D
QG16
+3VSDGPU+3VSDGPU
RG3
1 2
G
S
10K_0201_5%
1 2
PEX_CLKREQ#
4
CLK_PEG_VGA<20> CLK_PEG_VGA#<20>
4
1 2
RG1 0_ 0402_5%
PEG_HTX_C_GRX_P0<9 > PEG_HTX_C_GRX_N0<9>
PEG_HTX_C_GRX_P1<9 > PEG_HTX_C_GRX_N1<9>
PEG_HTX_C_GRX_P2<9 > PEG_HTX_C_GRX_N2<9>
PEG_HTX_C_GRX_P3<9 > PEG_HTX_C_GRX_N3<9>
PEG_HTX_C_GRX_P4<9 > PEG_HTX_C_GRX_N4<9>
PEG_HTX_C_GRX_P5<9 > PEG_HTX_C_GRX_N5<9>
PEG_HTX_C_GRX_P6<9 > PEG_HTX_C_GRX_N6<9>
PEG_HTX_C_GRX_P7<9 > PEG_HTX_C_GRX_N7<9>
PEG_HTX_C_GRX_P8<9 > PEG_HTX_C_GRX_N8<9>
PEG_HTX_C_GRX_P9<9 > PEG_HTX_C_GRX_N9<9>
PEG_HTX_C_GRX_P10<9> PEG_HTX_C_GRX_N10<9>
PEG_HTX_C_GRX_P11<9> PEG_HTX_C_GRX_N11<9>
PEG_HTX_C_GRX_P12<9 > PEG_HTX_C_GRX_N12<9>
PEG_HTX_C_GRX_P13<9 > PEG_HTX_C_GRX_N13<9>
PEG_HTX_C_GRX_P14<9> PEG_HTX_C_GRX_N14<9>
PEG_HTX_C_GRX_P15<9> PEG_HTX_C_GRX_N15<9>
DGPU_PEX_RST#_RDGPU_PEX_RST#
@
PEG_GTX_HRX_P0<9> PEG_GTX_HRX_N0<9>
PEG_GTX_HRX_P1<9> PEG_GTX_HRX_N1<9>
PEG_GTX_HRX_P2<9> PEG_GTX_HRX_N2<9>
PEG_GTX_HRX_P3<9> PEG_GTX_HRX_N3<9>
PEG_GTX_HRX_P4<9> PEG_GTX_HRX_N4<9>
PEG_GTX_HRX_P5<9> PEG_GTX_HRX_N5<9>
PEG_GTX_HRX_P6<9> PEG_GTX_HRX_N6<9>
PEG_GTX_HRX_P7<9> PEG_GTX_HRX_N7<9>
PEG_GTX_HRX_P8<9> PEG_GTX_HRX_N8<9>
PEG_GTX_HRX_P9<9> PEG_GTX_HRX_N9<9>
PEG_GTX_HRX_P10<9> PEG_GTX_HRX_N10<9 >
PEG_GTX_HRX_P11<9> PEG_GTX_HRX_N11<9 >
PEG_GTX_HRX_P12<9> PEG_GTX_HRX_N12<9 >
PEG_GTX_HRX_P13<9> PEG_GTX_HRX_N13<9 >
PEG_GTX_HRX_P14<9> PEG_GTX_HRX_N14<9 >
PEG_GTX_HRX_P15<9> PEG_GTX_HRX_N15<9 >
PEX_CLKREQ#
3
UG1A
1/23 PCI_EXPRESS
BK26
PEX_RST*
BL26
PEX_CLKREQ*
BM26
PEX_REFCLK
BM27
PEX_REFCLK*
BG26
PEX_TX0
BH26
PEX_TX0*
BL27
PEX_RX0
BK27
PEX_RX0*
BF26
PEX_TX1
BE26
PEX_TX1*
BK29
PEX_RX1
BL29
PEX_RX1*
BF27
PEX_TX2
BG27
PEX_TX2*
BM29
PEX_RX2
BM30
PEX_RX2*
BG29
PEX_TX3
BH29
PEX_TX3*
BL30
PEX_RX3
BK30
PEX_RX3*
BF29
PEX_TX4
BE29
PEX_TX4*
BK32
PEX_RX4
BL32
PEX_RX4*
BF30
PEX_TX5
BG30
PEX_TX5*
BM32
PEX_RX5
BM33
PEX_RX5*
BG32
PEX_TX6
BH32
PEX_TX6*
BL33
PEX_RX6
BK33
PEX_RX6*
BF32
PEX_TX7
BE32
PEX_TX7*
BK35
PEX_RX7
BL35
PEX_RX7*
BF33
PEX_TX8
BG33
PEX_TX8*
BM35
PEX_RX8
BM36
PEX_RX8*
BG35
PEX_TX9
BH35
PEX_TX9*
BL36
PEX_RX9
BK36
PEX_RX9*
BF35
PEX_TX10
BE35
PEX_TX10*
BK38
PEX_RX10
BL38
PEX_RX10*
BF36
PEX_TX11
BG36
PEX_TX11*
BM38
PEX_RX11
BM39
PEX_RX11*
BG38
PEX_TX12
BH38
PEX_TX12*
BL39
PEX_RX12
BK39
PEX_RX12*
BF38
PEX_TX13
BE38
PEX_TX13*
BK41
PEX_RX13
BL41
PEX_RX13*
BF39
PEX_TX14
BG39
PEX_TX14*
BM41
PEX_RX14
BM42
PEX_RX14*
BH41
PEX_TX15
BG41
PEX_TX15*
BL42
PEX_RX15
BK42
PEX_RX15*
@
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PEX_DVDD_1 PEX_DVDD_2 PEX_DVDD_3 PEX_DVDD_4 PEX_DVDD_5 PEX_DVDD_6 PEX_DVDD_7 PEX_DVDD_8
PEX_HVDD_1 PEX_HVDD_2 PEX_HVDD_3 PEX_HVDD_4 PEX_HVDD_5 PEX_HVDD_6 PEX_HVDD_7 PEX_HVDD_8
PEX_HVDD_9 PEX_HVDD_10 PEX_HVDD_11
PEX_PLL_HVDD
PEX_TERMP
N17E-G1_BGA2152~D
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
BB33 BB35 BB36 BC33 BC35 BC36 BD33 BD36
BB26 BB27 BB29 BB32 BC26 BC27 BC29 BC30 BC32 BD27 BD30
BB30
PEX_TERMP
BL44
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
2
1
1
CG2
CG1
2
2
1U_0402_6.3V6 K
1U_0402_6.3V6 K
Under GPU
1
1
CG9
CG10
2
2
1U_0402_6.3V6 K
1U_0402_6.3V6 K
Under GPU
+PEX_PLL_HVDD
1
CG18
0.1U_0201_10V6 K
2
12
RG4
2.49K_0402_1%
2
RM20 0_0402_5%
1
CG3
2
1
CG11
2
@
1 2
PEX_DVD D
PEX_HV D D
1
+1.0VSDGPU
1
1
1
CG4
CG5
2
1
2
1U_0402_6.3V6 K
CG12
1U_0402_6.3V6 K
2
4.7U_0402_6.3V6 M
1
CG13
2
4.7U_0402_6.3V6 M
+1.8VSDGPU_MAIN
1U_0402_6.3V6 K
1U_0402_6.3V6 K
2
1
CG7
CG6
2
4.7U_0402_6.3V6 M
1
CG14
2
4.7U_0402_6.3V6 M
CG8
1
2
10U_0603_6.3V6 M
22U_0603_6.3V6 M
+1.8VSDGPU_MAIN
2
2
CG15
1
10U_0603_6.3V6 M
12
CG16
CG17
1
10U_0603_6.3V6 M
22U_0603_6.3V6 M
22uF 10uF 4.7uF 1uF 0.1uF
112
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
N17E-G1(1/6) PCIE,GPIO
N17E-G1(1/6) PCIE,GPIO
N17E-G1(1/6) PCIE,GPIO
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
4
42
1.A
1.A
24 73Friday, March 31, 2017
24 73Friday, March 31, 2017
1
24 73Friday, March 31, 2017
1.A
of
of
of
Page 21
5
+1.8VSDGPU_AON
+1.8VSDGPU_AON
CG340
12
D D
HDMI_HPD_PCH<19,37>
0.1U_0201_10V6 K
HDMI_HPD_PCH
DGPU_PEX_RST#
NL17SZ08DFT2G_SC70-5
1 2
RG198 0_0402_5%@
C C
UG28
5
1
IN B
VCC
4
OUT Y
2
IN A
GND
3
2
G
12
RG180
10K_0402_5%
1
D
S
3
+3VS
GPU_OVE RT#<45>
+1.8VSDGPU_AON
RG39
10K_0201_5%
B B
OVERT#
+1.8VSDGPU_AON
12
RG45 10K_0201_5%
61
QG7B
D
G
2
S
GPU_GC6_ FB_EN
PJT138KA_SOT363-6
A A
12
RG182
100K_0201_5%
DGPU_PEX_RST#
1
CG937
@
0.1U_0201_10V6 K
2
NVVDD1_PG<64>
+1.8VSDGPU_MAIN
1 2
G
2
34
D
G
5
QG12A
S
PJT138KA_SOT363-6
+1.8VSDGPU_AON
1
5
IN B
IN A
VCC
OUT Y
GND
3
SCS00008100
2
4
UG8 NL17SZ08DFT2G_SC70-5
1
2
DG7
RB751S40T1G_SOD523-2
1 2
RG183
100K_0201_5%
61
D
QG12B
S
PJT138KA_SOT363-6
0.1U_0201_10V6 K CG20
5
1.8VSDGPU_MAIN _EN
DG4
RB751S40T1G_SOD523-2
1 2
1 2
34
D
G
QG7A
S
PJT138KA_SOT363-6
SCS00008100
GPU_GC6_ FB_EN
NVVDD2_PG<67>
5
4
HDMI_HPD_GPU#
MESS138 W-G_SOT32 3-3 QG5
T38 PAD~D@ T39 PAD~D@ T40 PAD~D@ T41 PAD~D@
10K_0201_5%
RG15
JTAG_TRST#
12
1VSDGPU_PG<63>
RG34
100K_0201_5%
5
QG14A
PJT138KA_SOT363-6
4
BG5
OVERT#
BF12
BJ1
BJ2
JTAG_TCLK
BK24
JTAG_TMS
BL23
JTAG_TDI
BM23
JTAG_TDO
BM24
BL24
BK23
12
RG16 10K_0201_5%
DGPU_PWR_EN<21,35>
1 2
DG3
SCS00008100
RB751S40T1G_SOD523-2
1 2
RG190
10K_0402_5%
1
2
DG5
SCS00008100
RB751S40T1G_SOD523-2
12
RG191
1 2
1.5K_0402_1%
1
2
+3VS
12
RG31
+3VS
10K_0201_5%
12
61
G
2
34
D
G
S
UG1W
13/23 MISC 1
OVERT
TS_VREF
THERMDN
THERMDP
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST*
NVJTAG_SEL
@
CG928
0.22U_0402_16V7 K
NVVDD1_EN <35,64>
CG929
0.1U_0201_10V6 K
GC6_FB_ EN3V3
D
QG14B
S
PJT138KA_SOT363-6
+1.8VSDGPU_AON
5
1
IN B
2
IN A
3
BAV70W_SOT323-3
GC6_FB_ EN3V3 <21>
N17E-G1_BGA2152~D
VCC
4
OUT Y
GND
UG103 NL17SZ08DFT2G_SC70-5
DG2
2
3
1
I2CS_SC L
I2CS_SD A
I2CC_SC L I2CC_SD A
I2CB_SC L I2CB_SD A
1
2
12
3
BJ8 BH8
BG9 BH9
BG8 BF8
BD6
GPIO0
BB5
GPIO1
BD1
GPIO2
BE4
GPIO3
BE1
GPIO4
BG2
GPIO5
BD2
GPIO6
BD7
GPIO7
BH4
GPIO8
BJ3
GPIO9
BD3
GPIO10
BH3
GPIO11
BE6
GPIO12
BB1
GPIO13
BG4
GPIO14
BG1
GPIO15
BE2
GPIO16
BH1
GPIO17
BE3
GPIO18
BD4
GPIO19
BE5
GPIO20
BA5
GPIO21
BB6
GPIO22
BG3
GPIO23
BD5
GPIO24
BB2
GPIO25
BE7
GPIO26
BA4
GPIO27
BB4
GPIO28
BA3
GPIO29
BB3
GPIO30
BA2
GPIO31
BA1
GPIO32
CG920
0.1U_0201_10V6 K
NVVDD2_EN <35,63,67>
RG29 100K_0402_5%
3
VGA_SMB_CK2 VGA_SMB_DA2
I2CC_SC L_R I2CC_SD A_R
1 2
RG5 1.8K_0402_5%
1 2
RG6 1.8K_0402_5%
NVVDD1_VID GPU_GC6_ FB_EN GPU_EVE NT#_1 NVVDD2_VID
1.8VSDGPU_MAIN _EN
NVVDD1_PSI
MEM_VDD _CTL ALERT#
MEM_VREF
ACIN_BUF
DG9 RB751S40T1G_SOD523-2
GPU_PEX _RST_HOLD #
HDMI_HPD_GPU# OC_WAR N#
1.35VSDGPU_EN <35,62>
+1.8VSDGPU_AON
NVVDD1_VID <64>
NVVDD2_VID <67>
1.8VSDGPU_MA IN_EN < 35>
NVVDD1_PSI <64,67>
MEM_VDD _CTL <62>
MEM_VREF < 32,33,34>
12
SCS00008100
OC_WAR N# <35>
DGPU_HOLD_RST#<21>
PLT_RST#<18,45,47>
2
DG1
SCS00008100
RB751S40T1G_SOD523-2
12
GPU_EVE NT# <21>
DGPU_AC_DETECT <21,45>
DGPU_HOLD_RST#
PLT_RST#
2
1
NV Carter :Use Main power to prevent Hang issue
VGA_SMB_CK2
VGA_SMB_DA2
+1.8VSDGPU_MAIN
5
QG3A PJT138KA_SOT363-6
SGD
2
QG3B
G
PJT138KA_SOT363-6
61
S
D
34
EC_SMB_CK2 <19,39,45>
EC_SMB_DA2 <19,39,45>
+1.8VSDGPU_AON
12
2
S
+1.8VSDGPU_MAIN
5
QG4A PJT138KA_SOT363-6
34
SGD
QG4B
G
PJT138KA_SOT363-6
61
D
I2CC_SC L_R
I2CC_SD A_R
12
RG8
RG9
1.8K_0402_1%
1.8K_0402_1%
NV Carter : ALERT# no function no need
DGPU_PEX_RST#
G
123
D
S
@
QG15 MESS138 W-G_SOT32 3-3
1 2
RG13 10K_0201_5%
1 2
RG17 10K_0201_5%@
1 2
RG18 10K_0201_5%
1 2
RG19 100K_0201_5%
1 2
RG20 1.8K_0402_5%
1 2
RG21 1.8K_0402_5%
1 2
RG23 10K_0201_5%
1 2
RG25 10K_0201_5%@
1 2
RG26 10K_0201_5%
1 2
RG27 10K_0201_5%
1 2
RG28 100K_0201_5%
1 2
RG30 1M_0402_5%
GPU_AL ERT <45>
DGPU_PEX_RST# <24>
<Title>
<Title>
<Title>
C5PRH M/B LA-E921P 1.A
C5PRH M/B LA-E921P 1.A
C5PRH M/B LA-E921P 1.A
1
+1.8VSDGPU_AON
5
1
IN B
VCC
OUT Y
2
IN A
GND
3
ALERT#
GPU_EVE NT#_1
DGPU_HOLD_RST#
GPU_PEX _RST_HOLD #
ACIN_BUF
VGA_SMB_CK2
VGA_SMB_DA2
NVVDD1_PSI
ALERT#
OC_WAR N#
GPU_GC6_ FB_EN
MEM_VREF
DGPU_PEX_RST#
1
CG19
0.1U_0201_10V6 K
2
UG6 NL17SZ08DFT2G_SC70-5
DGPU_PEX_RST#
4
Title
Title
Title
Size Docu ment Num ber Rev
Size Docu ment Num ber Rev
Size Docu ment Num ber Rev
Custom
Custom
Custom
Date: Shee t
Date: Shee t
Date: Shee t
I2CC_S CL <35>
I2CC_S DA <35>
+1.8VSDGPU_AON
25 73Friday, March 31, 2017
25 73Friday, March 31, 2017
25 73Friday, March 31, 2017
of
of
of
Page 22
5
RG51 1K_0402_1%
IFPAB_RSET
12
D D
+IFPX_PLLVDD
1
2
CG21
0.1U_0201_10V6 K
Under GPU
+1.0VSDGPU
1
1
CG22
2
C C
2
4.7U_0402_6.3V6 M
1
CG23
CG930
2
1U_0402_6.3V6 K
0.1U_0201_10V6 K
1
1
CG25
CG24
2
2
0.1U_0201_10V6 K
Under GPU
RG52 1K_0402_1%
IFPCD_R SET
12
+IFPX_PLLVDD
1
CG27
2
0.1U_0201_10V6 K
1
CG934
2
Under GPU
1
2
1U_0402_6.3V6 K
1
CG29
CG926
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
B B
+1.0VSDGPU
Under GPU
+1.0VSDGPU
A A
5
Under GPU
1
CG33
2
4.7U_0402_6.3V6 M
1
1
CG34
CG932
2
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
0.1U_0201_10V6 K
BD20
BD18
BB21 BB23
BC15 BC17
BD23
BD21
BB17 BB15
BB18 BB20
UG1R
8/23 IFPC
IFPCD_R SET
IFPCD_ PLLVDD
IFP_IOVD D_5 IFP_IOVD D_6
UG1Q
IFP_IOVD D_7 IFP_IOVD D_8
4
UG1N
7/23 IFPAB
IFPAB_RSET
IFPAB_PLLVDD
IFP_IOVD D_2 IFP_IOVD D_1
IFP_IOVD D_3 IFP_IOVD D_4
IFPA B
@
IFPC
9/23 IFPD
IFPD
4
DL-DVI
DVI/HDM I
SDA
SCL
TXC TXC
TXD0 TXD0
TXD1
TXD1
TXD2 TXD2
DVI/HDM I
SDA
SCL
TXC TXC
TXD0
TXD0
TXD1 TXD1
TXD2
TXD2
SDA SCL
TXC TXC
TXD0
TXD0
TXD1 TXD1
TXD2
TXD2
TXD3
TXD3
TXD4 TXD4
TXD5
TXD5
IFPC_AU X_SDA*
N17E-G1_BGA2152~D@
IFPD_AU X_SDA*
N17E-G1_BGA2152~D@
SDA SCL
TXC TXC
TXD0
TXD0
TXD1 TXD1
TXD2
TXD2
SDA SCL
TXC TXC
TXD0
TXD0
TXD1 TXD1
TXD2
TXD2
N17E-G1_BGA2152~D
DP
IFPC_AU X_SCL
IFPC_L3 *
IFPC_L 3
IFPC_L2 *
IFPC_L 2
IFPC_L1 *
IFPC_L 1
IFPC_L0 *
IFPC_L 0
DP
IFPD_AU X_SCL
IFPD_L3 *
IFPD_L 3
IFPD_L2 *
IFPD_L 2
IFPD_L1 *
IFPD_L 1
IFPD_L0 *
IFPD_L 0
3
DPDVI/ HDM I
IFPA_AU X_SDA*
IFPA_AU X_SCL
IFPB_AU X_SDA*
IFPB_AU X_SCL
BL9 BK9
BF17 BE17
BF18 BG18
BG20 BH20
BF20 BE20
BF11 BE11
BM14 BM15
BL15 BK15
BK17 BL17
BM17 BM18
BH11 BG11
BF21
IFPA_L3*
BG21
IFPA_L3
BG23
IFPA_L2*
BH23
IFPA_L2
BF23
IFPA_L1*
BE23
IFPA_L1
BF24
IFPA_L0*
BG24
IFPA_L0
BG12 BH12
BL18
IFPB_L3 *
BK18
IFPB_L 3
BK20
IFPB_L2 *
BL20
IFPB_L 2
BM20
IFPB_L1 *
BM21
IFPB_L 1
BL21
IFPB_L0 *
BK21
IFPB_L 0
GPU_HD MI_CTRLD AT <37 > GPU_HD MI_CTRLC LK < 37>
GPU_HD MI_TXCN <37> GPU_HD MI_TXCP <3 7>
GPU_HD MI_TX0N <3 7> GPU_HD MI_TX0P <37>
GPU_HD MI_TX1N <3 7> GPU_HD MI_TX1P <37>
GPU_HD MI_TX2N <3 7> GPU_HD MI_TX2P <37>
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
UG1V
11/23 MIOA
AM5
MIOA_CAL_ PD_VDDQ
AM6
MIOA_CAL_ PU_GND
AM7
MIOA_VRE F
@
N17E-G1_BGA2152~D
HDMI 2.0
+1.8VSDGPU_MAIN +IFPX_PLLVDD
1 2
LG2 PBY160808T-300Y-N_2P
+1.0VSDGPU
Compal Secret Data
Compal Secret Data
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
MIOA_D0 MIOA_D1 MIOA_D2 MIOA_D3 MIOA_D4 MIOA_D5 MIOA_D6 MIOA_D7 MIOA_D8
MIOA_D9 MIOA_D10 MIOA_D11
MIOA_CTL 3 MIOA_HSYNC MIOA_VSYNC
MIOA_DE
MIOA_CLKOU T
MIOA_CLKIN
+1.0VSDGPU
1
2
RG53 1K_0402_1%
12
1
CG31
2
4.7U_0402_6.3V6 M
2
AN9 AM2 AN7 AN6 AR1 AR6 AR5 AM8 AN3 AR8 AR3 AR2
AT7 AM1 AR7 AN1
AN2
AM3
Under GPU
1
CG924
2
1U_0402_6.3V6 K
IFPEF_R SET
12
Under GPU
1
CG28
CG921
2
22U_0603_6.3V6 M
1
1
CG933
2
2
0.1U_0201_10V6 K
Under GPU
2
UG1U
12/23 MIOB
AV7
MIOB_CAL_ PD_VDDQ
AV8
MIOB_CAL_ PU_GND
AW9
MIOB_VRE F
GP106GP104
UNUSEDMIOB
@
UG1O
6/23 IFPF
BC21
IFP_IOVDD_11
BC23
IFP_IOVD D_12
1
CG26
CG931
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
IFPF
UG1P
10/23 IFPE
BD17
IFPEF_R SET
BD15
IFPEF_ PLLVDD
1
CG30
2
4.7U_0402_6.3V6 M
CG32
0.1U_0201_10V6 K
IFPE
0.1U_0201_10V6 K
BC18
IFP_IOVD D_9
BC20
IFP_IOVD D_10
22uF 10uF 4.7uF 1uF 0.1uF
IFPx_IOVD D
IFPx_PLLVDD
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N17E-G1(2/6) eDP,HDMI,mDP
N17E-G1(2/6) eDP,HDMI,mDP
N17E-G1(2/6) eDP,HDMI,mDP
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
MIOB_D0 MIOB_D1 MIOB_D2 MIOB_D3 MIOB_D4 MIOB_D5 MIOB_D6 MIOB_D7 MIOB_D8
MIOB_D9 MIOB_D10 MIOB_D11
MIOB_CTL 3 MIOB_HSYNC MIOB_VSYNC
MIOB_DE
MIOB_CLKOU T
MIOB_CLKIN
N17E-G1_BGA2152~D
DVI/HDM I
SDA
SCL
TXC TXC
TXD0
TXD0
TXD1
TXD1
TXD2
TXD2
N17E-G1_BGA2152~D@
DVI/HDM I
SDA
SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
N17E-G1_BGA2152~D@
1
AT3 AV6 AT2 AT1 AW6 AV2 AV1 AV3 AW3 BA8 AW7 BB8
BB7 AV5 BA7 AW2
AW1
AT6
DP
IFPF_AU X_SDA*
IFPF_AU X_SCL
DP
IFPE_AU X_SDA*
IFPE_AU X_SCL
3
1
IFPF_L3*
IFPF_L 3
IFPF_L2*
IFPF_L 2
IFPF_L1*
IFPF_L 1
IFPF_L0*
IFPF_L 0
IFPE_L3 *
IFPE_L 3
IFPE_L2 *
IFPE_L 2
IFPE_L1 *
IFPE_L 1
IFPE_L0 *
IFPE_L 0
3
26 73Friday, March 31, 2017
26 73Friday, March 31, 2017
26 73Friday, March 31, 2017
BM9 BM8
BK11 BL11
BM11 BM12
BL12 BK12
BK14 BL14
BL8 BK8
BG14 BH14
BF14 BE14
BF15 BG15
BG17 BH17
12
3
1.A
1.A
1.A
of
of
of
Page 23
5
FBA_D0<32> FBA_D1<32> FBA_D2<32> FBA_D3<32> FBA_D4<32> FBA_D5<32> FBA_D6<32> FBA_D7<32> FBA_D8<32> FBA_D9<32> FBA_D10<32>
D D
C C
B B
A A
FBA_D11<32> FBA_D12<32> FBA_D13<32> FBA_D14<32> FBA_D15<32> FBA_D16<32> FBA_D17<32> FBA_D18<32> FBA_D19<32> FBA_D20<32> FBA_D21<32> FBA_D22<32> FBA_D23<32> FBA_D24<32> FBA_D25<32> FBA_D26<32> FBA_D27<32> FBA_D28<32> FBA_D29<32> FBA_D30<32> FBA_D31<32> FBA_D32<32> FBA_D33<32> FBA_D34<32> FBA_D35<32> FBA_D36<32> FBA_D37<32> FBA_D38<32> FBA_D39<32> FBA_D40<32> FBA_D41<32> FBA_D42<32> FBA_D43<32> FBA_D44<32> FBA_D45<32> FBA_D46<32> FBA_D47<32> FBA_D48<32> FBA_D49<32> FBA_D50<32> FBA_D51<32> FBA_D52<32> FBA_D53<32> FBA_D54<32> FBA_D55<32> FBA_D56<32> FBA_D57<32> FBA_D58<32> FBA_D59<32> FBA_D60<32> FBA_D61<32> FBA_D62<32> FBA_D63<32>
FBA_DBI0<32> FBA_DBI1<32> FBA_DBI2<32> FBA_DBI3<32> FBA_DBI4<32> FBA_DBI5<32> FBA_DBI6<32> FBA_DBI7<32>
FBA_EDC0<32> FBA_EDC1<32> FBA_EDC2<32> FBA_EDC3<32> FBA_EDC4<32> FBA_EDC5<32> FBA_EDC6<32> FBA_EDC7<32>
+FBX_PLLAVDD
1
CG38
2
0.1U_0201_10V6 K
1
CG39
2
0.1U_0201_10V6 K
AJ44
AG48
AJ45 AG49 AF46 AF47 AF48 AD47 AD49 AD48 AC46 AC47 AA47 AA46 AA45
AW51
BA52
AW50
BA51 BA50 BB50 BA49
AW49
AV48 AT49 AT47 AT48 AT46 AV51 AV52 AV49
AJ48
AJ46
AJ47 AK49 AM47 AM46 AN48 AN49 AM44 AM45 AN45 AN46 AR48 AN47 AR47 AR46
AG47 AC48 BB51 AV50 AM48 AR49
AF44 AA48 BB52 AT50 AK48 AR51
W47
W49
W51
AF42
U51 U48 U50 U49 R51 R50 R47 U46
V46 Y45 Y47 Y46 V50 V47
U52
V51
Y44
U47
Y48
R48
V48
W6
W8 Y14 Y15 Y16
L29
UG1B
2/23 FBA
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
GND_694 GND_695 GND_696 GND_697 GND_698 GND_699 GND_700 GND_701
FB_REFPLL_AVDD0 FB_REFPLL_AVDD1
@
FBA_CMD0
FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33 FBA_CMD34 FBA_CMD35
FBA_DBG_RFU1 FBA_DBG_RFU2
FBA_CLK0*
FBA_CLK1*
FBA_WCK01
FBA_WCK01*
FBA_WCKB01
FBA_WCKB01*
FBA_WCK23
FBA_WCK23*
FBA_WCKB23
FBA_WCKB23*
FBA_WCK45
FBA_WCK45*
FBA_WCKB45
FBA_WCKB45*
FBA_WCK67
FBA_WCK67*
FBA_WCKB67
FBA_WCKB67*
FBA_PLL_AVDD
N17E-G1_BGA2152~D
FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9
FBA_CLK0
FBA_CLK1
4
Y51
FBA_CMD1
Y52
FBA_CMD2
Y49 AA52 AA51 AA50 AC50 AC51 AC52 AC49 AD52 AD51 AD50 AF50 AF51 AF52 AN50
FBA_CMD17
AN51
FBA_CMD18
AN52 AM49 AM52 AM51 AM50 AK50 AK51 AK52 AJ49 AJ52 AJ51 AJ50 AG50 AG51 AG52 AF49 Y50 AR50
AA44 AN44
AG45 AG46 AK46 AK45
U45 U44 V45 V44 AC45 AC44 AD46 AD45 AV47 AV46 AW48 AW47 AR45 AR44 AT45 AT44
Under GPU
AN42
RG184 60.4_0402_1%@ RG185 60.4_0402_1%@
+FBX_PLLAVDD
1
2
1 2 1 2
CG35
0.1U_0201_10V6 K
FBA_CMD0 <32 > FBA_CMD1 <32 > FBA_CMD2 <32 > FBA_CMD3 <32 > FBA_CMD4 <32 > FBA_CMD5 <32 > FBA_CMD6 <32 > FBA_CMD7 <32 > FBA_CMD8 <32 > FBA_CMD9 <32 > FBA_CMD10 < 32> FBA_CMD11 <32> FBA_CMD12 < 32> FBA_CMD13 < 32> FBA_CMD14 < 32> FBA_CMD15 < 32> FBA_CMD16 < 32> FBA_CMD17 < 32> FBA_CMD18 < 32> FBA_CMD19 < 32> FBA_CMD20 < 32> FBA_CMD21 < 32> FBA_CMD22 < 32> FBA_CMD23 < 32> FBA_CMD24 < 32> FBA_CMD25 < 32> FBA_CMD26 < 32> FBA_CMD27 < 32> FBA_CMD28 < 32> FBA_CMD29 < 32> FBA_CMD30 < 32> FBA_CMD31 < 32>
FBA_CLK0 < 32> FBA_CLK0# < 32> FBA_CLK1 < 32> FBA_CLK1# < 32>
FBA_WCK01 <32> FBA_WCK01# <32>
FBA_WCK23 <32> FBA_WCK23# <32>
FBA_WCK45 <32> FBA_WCK45# <32>
FBA_WCK67 <32> FBA_WCK67# <32>
FBA_CMD1
FBA_CMD17
FBA_CMD2
FBA_CMD18
12
CG36
22U_0603_6.3V6 M
12
12
1 2
RG56 10K_0402_5%
RG60 10K_0402_5%
+1.35VSDGPU
+1.8VSDGPU_MAIN
LG4 PBY160808T-300Y-N_2P
+1.35VSDGPU
12
RG57 10K_0402_5%
12
RG61 10K_0402_5%
3
UG1C
3/23 FBB
FBB_D0<33> FBB_D1<33> FBB_D2<33> FBB_D3<33> FBB_D4<33> FBB_D5<33> FBB_D6<33> FBB_D7<33> FBB_D8<33> FBB_D9<33> FBB_D10<33> FBB_D11<33> FBB_D12<33> FBB_D13<33> FBB_D14<33> FBB_D15<33> FBB_D16<33> FBB_D17<33> FBB_D18<33> FBB_D19<33> FBB_D20<33> FBB_D21<33> FBB_D22<33> FBB_D23<33> FBB_D24<33> FBB_D25<33> FBB_D26<33> FBB_D27<33> FBB_D28<33> FBB_D29<33> FBB_D30<33> FBB_D31<33> FBB_D32<33> FBB_D33<33> FBB_D34<33> FBB_D35<33> FBB_D36<33> FBB_D37<33> FBB_D38<33> FBB_D39<33> FBB_D40<33> FBB_D41<33> FBB_D42<33> FBB_D43<33> FBB_D44<33> FBB_D45<33> FBB_D46<33> FBB_D47<33> FBB_D48<33> FBB_D49<33> FBB_D50<33> FBB_D51<33> FBB_D52<33> FBB_D53<33> FBB_D54<33> FBB_D55<33> FBB_D56<33> FBB_D57<33> FBB_D58<33> FBB_D59<33> FBB_D60<33> FBB_D61<33> FBB_D62<33> FBB_D63<33>
FBB_DBI0<33> FBB_DBI1<33> FBB_DBI2<33> FBB_DBI3<33> FBB_DBI4<33> FBB_DBI5<33> FBB_DBI6<33> FBB_DBI7<33>
FBB_EDC0<33> FBB_EDC1<33> FBB_EDC2<33> FBB_EDC3<33> FBB_EDC4<33> FBB_EDC5<33> FBB_EDC6<33> FBB_EDC7<33>
H32 D32 A33 B32 E32 G32
J30
F32 H36 G36
J36
F36
F33 D33
J32 G33 E45 D45
F45 G45 D42 E42
F42 H41 E41
F39 E39 D39
F38 E38 D36 E36 M50 P48 M51 M49 P47 P52 R46 P46
L50
L51
L52
L49 M46
L47 M48 M47 D48 C50 C48 C49 E49 E50
F49
F48
F50 D52
J50 H48 H51
J51 H49 H52
C32 E33 E44 G39 P49
L48 D50 H50
B33 E35 G44 H38 P50
J48 D51
F51
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y24
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
GND_702 GND_703 GND_704 GND_705 GND_706 GND_707 GND_708 GND_709
@
2
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32 FBB_CMD33 FBB_CMD34 FBB_CMD35
FBB_DBG_RFU1 FBB_DBG_RFU2
FBB_CLK0
FBB_CLK0*
FBB_CLK1
FBB_CLK1*
FBB_WCK01
FBB_WCK01*
FBB_WCKB01
FBB_WCKB01*
FBB_WCK23
FBB_WCK23*
FBB_WCKB23
FBB_WCKB23*
FBB_WCK45
FBB_WCK45*
FBB_WCKB45
FBB_WCKB45*
FBB_WCK67
FBB_WCK67*
FBB_WCKB67
FBB_WCKB67*
FBB_PLL_AVDD
N17E-G1_BGA2152~D
B35
FBB_CMD1
A35
FBB_CMD2
D35 A36 B36 C36 C38 B38 A38 D38 A39 B39 C39 C41 B41 A41 B49
FBB_CMD17
A49
FBB_CMD18
A48 D47 A47 B47 C47 C45 B45 A45 D44 A44 B44 C44 C42 B42 A42 D41 C35 B50
J35 J41
H42 G42 F47 E47
J33 H33 G35 H35 J39 H39 F41 G41 L46 L45 M44 M45 H47 H46 J47 J46
L38
1 2
RG186 60.4_0402_1%@
1 2
RG187
+FBX_PLLAVDD
0.1U_0201_10V6 K
1
2
Under GPU
CG37
FBB_CMD0 <33 > FBB_CMD1 <33 > FBB_CMD2 <33 > FBB_CMD3 <33 > FBB_CMD4 <33 > FBB_CMD5 <33 > FBB_CMD6 <33 > FBB_CMD7 <33 > FBB_CMD8 <33 > FBB_CMD9 <33 > FBB_CMD10 < 33> FBB_CMD11 <33> FBB_CMD12 < 33> FBB_CMD13 < 33> FBB_CMD14 < 33> FBB_CMD15 < 33> FBB_CMD16 < 33> FBB_CMD17 < 33> FBB_CMD18 < 33> FBB_CMD19 < 33> FBB_CMD20 < 33> FBB_CMD21 < 33> FBB_CMD22 < 33> FBB_CMD23 < 33> FBB_CMD24 < 33> FBB_CMD25 < 33> FBB_CMD26 < 33> FBB_CMD27 < 33> FBB_CMD28 < 33> FBB_CMD29 < 33> FBB_CMD30 < 33> FBB_CMD31 < 33>
60.4_0402_1%@
FBB_CLK0 <33 > FBB_CLK0# <33 > FBB_CLK1 <33 > FBB_CLK1# <33 >
FBB_WCK01 <33> FBB_WCK01# <33>
FBB_WCK23 <33> FBB_WCK23# <33>
FBB_WCK45 <33> FBB_WCK45# <33>
FBB_WCK67 <33> FBB_WCK67# <33>
FBB_CMD1
FBB_CMD17
FBB_CMD2
FBB_CMD18
1
+1.35VSDGPU
12
RG54 10K_0402_5%
12
RG58 10K_0402_5%
+1.35VSDGPU
12
RG55 10K_0402_5%
12
RG59 10K_0402_5%
Title
Title
Title
<Title>
<Title>
<Title>
Size Docu ment Num ber Rev
Size Docu ment Num ber Rev
Size Docu ment Num ber Rev
C5PRH M/B LA-E921P 1.A
Custom
C5PRH M/B LA-E921P 1.A
Custom
C5PRH M/B LA-E921P 1.A
Custom
Date: Shee t
Date: Shee t
5
4
3
2
Date: Shee t
1
27 73Friday, March 31, 2017
27 73Friday, March 31, 2017
27 73Friday, March 31, 2017
of
of
of
Page 24
5
FBC_D0<34> FBC_D1<34> FBC_D2<34> FBC_D3<34> FBC_D4<34> FBC_D5<34> FBC_D6<34> FBC_D7<34> FBC_D8<34> FBC_D9<34> FBC_D10<34>
D D
C C
B B
FBC_D11<34> FBC_D12<34> FBC_D13<34> FBC_D14<34> FBC_D15<34> FBC_D16<34> FBC_D17<34> FBC_D18<34> FBC_D19<34> FBC_D20<34> FBC_D21<34> FBC_D22<34> FBC_D23<34> FBC_D24<34> FBC_D25<34> FBC_D26<34> FBC_D27<34> FBC_D28<34> FBC_D29<34> FBC_D30<34> FBC_D31<34> FBC_D32<34> FBC_D33<34> FBC_D34<34> FBC_D35<34> FBC_D36<34> FBC_D37<34> FBC_D38<34> FBC_D39<34> FBC_D40<34> FBC_D41<34> FBC_D42<34> FBC_D43<34> FBC_D44<34> FBC_D45<34> FBC_D46<34> FBC_D47<34> FBC_D48<34> FBC_D49<34> FBC_D50<34> FBC_D51<34> FBC_D52<34> FBC_D53<34> FBC_D54<34> FBC_D55<34> FBC_D56<34> FBC_D57<34> FBC_D58<34> FBC_D59<34> FBC_D60<34> FBC_D61<34> FBC_D62<34> FBC_D63<34>
FBC_DBI0<34> FBC_DBI1<34> FBC_DBI2<34> FBC_DBI3<34> FBC_DBI4<34> FBC_DBI5<34> FBC_DBI6<34> FBC_DBI7<34>
FBC_EDC0<34> FBC_EDC1<34> FBC_EDC2<34> FBC_EDC3<34> FBC_EDC4<34> FBC_EDC5<34> FBC_EDC6<34> FBC_EDC7<34>
C6 D6 A6 B6 B4 A4 B3 C4 D9 C9 E9 B9 B8 A8 F6 E6
F18
G18
E18 H18 D15
E15 G17 H17
J15
H15
E14
F14 H11 G11
F11
E11
J29
F30 H29 G30
B30
A30 H30 C30 D27
J26
F27 G27 C27
B27
A27 G29 H20 D18 G20
E20
F23
E21 D21
E23 G24 H26
F24 G26
F26 D26
B26 C26
A5 C8
J18
F12 D29
E27
F20
E26
D5
D8 E17 E12 E30 B29
G21
E24
Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32
UG1D
4/23 FBC
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
GND_710 GND_711 GND_712 GND_713 GND_714 GND_715 GND_716 GND_717
@
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31 FBC_CMD32 FBC_CMD33 FBC_CMD34 FBC_CMD35
FBC_DBG_RFU1 FBC_DBG_RFU2
FBC_CLK0*
FBC_CLK1*
FBC_WCK01
FBC_WCK01*
FBC_WCKB01
FBC_WCKB01*
FBC_WCK23
FBC_WCK23*
FBC_WCKB23
FBC_WCKB23*
FBC_WCK45
FBC_WCK45*
FBC_WCKB45
FBC_WCKB45*
FBC_WCK67
FBC_WCK67*
FBC_WCKB67
FBC_WCKB67*
FBC_PLL_AVDD
N17E-G1_BGA2152~D
FBC_CLK0
FBC_CLK1
4
C11
FBC_CMD1
B11
FBC_CMD2
A11 D11 A12 B12 C12 C14 B14 A14 D14 A15 B15 C15 C17 B17 B24
FBC_CMD17
A24
FBC_CMD18
D23 A23 B23 C23 C21 B21 A21 D20 A20 B20 C20 C18 B18 A18 D17 A17 A9
RG188 60.4_0402_1%@
C24
RG189 60.4_0402_1%@
J14 J23
G15 F15 H21 J21
F8 G8 G9 F9 H12 G12 G14 H14 J27 H27 E29 F29 G23 H23 H24 J24
Under GPU
L17
0.1U_0201_10V6 K
1
2
1 2 1 2
CG40
FBC_CMD0 <34> FBC_CMD1 <34> FBC_CMD2 <34> FBC_CMD3 <34> FBC_CMD4 <34> FBC_CMD5 <34> FBC_CMD6 <34> FBC_CMD7 <34> FBC_CMD8 <34> FBC_CMD9 <34> FBC_CMD10 <34> FBC_CMD11 <34> FBC_CMD12 <34> FBC_CMD13 <34> FBC_CMD14 <34> FBC_CMD15 <34> FBC_CMD16 <34> FBC_CMD17 <34> FBC_CMD18 <34> FBC_CMD19 <34> FBC_CMD20 <34> FBC_CMD21 <34> FBC_CMD22 <34> FBC_CMD23 <34> FBC_CMD24 <34> FBC_CMD25 <34> FBC_CMD26 <34> FBC_CMD27 <34> FBC_CMD28 <34> FBC_CMD29 <34> FBC_CMD30 <34> FBC_CMD31 <34>
FBC_CLK0 <34> FBC_CLK0# <34> FBC_CLK1 <34> FBC_CLK1# <34>
FBC_WCK01 <34> FBC_WCK01# <34>
FBC_WCK23 <34> FBC_WCK23# <34>
FBC_WCK45 <34> FBC_WCK45# <34>
FBC_WCK67 <34> FBC_WCK67# <34>
FBC_CMD1
FBC_CMD17
FBC_CMD2
FBC_CMD18
12
RG62 10K_0402_5%
12
RG64 10K_0402_5%
+1.35VSDGPU
+1.35VSDGPU
12
RG63 10K_0402_5%
12
RG65 10K_0402_5%
3
AK8 AK4 AK2 AK3 AK5 AK6 AK9 AK7 AG4 AF9 AG6 AG7
AJ4 AJ5 AJ6
AG5
Y6 Y5 V5
Y4 AA6 AA5 AC5 AC4 AD7 AC6 AF6 AD6 AF7 AF8 AF2 AF3
F4
E1
F3
F5
D2
D1
C3
C2
J5 J4
L8
J2 F1 F2 H4 H5 V7 V8 V6 V9 U4 R5 R6 U8 P6 R9 P4 P5 L7 L6 L4 L5
AJ1 AG1 AA7 AD5
D3 H3 U5
M9
AJ3 AG2 AA9 AF4
E3 H2 U6
M5
Y33
Y34
Y35
Y36
Y37
Y38
Y39
Y9
UG1E
5/23 FBD
FBD_D0 FBD_D1 FBD_D2 FBD_D3 FBD_D4 FBD_D5 FBD_D6 FBD_D7 FBD_D8 FBD_D9 FBD_D10 FBD_D11 FBD_D12 FBD_D13 FBD_D14 FBD_D15 FBD_D16 FBD_D17 FBD_D18 FBD_D19 FBD_D20 FBD_D21 FBD_D22 FBD_D23 FBD_D24 FBD_D25 FBD_D26 FBD_D27 FBD_D28 FBD_D29 FBD_D30 FBD_D31 FBD_D32 FBD_D33 FBD_D34 FBD_D35 FBD_D36 FBD_D37 FBD_D38 FBD_D39 FBD_D40 FBD_D41 FBD_D42 FBD_D43 FBD_D44 FBD_D45 FBD_D46 FBD_D47 FBD_D48 FBD_D49 FBD_D50 FBD_D51 FBD_D52 FBD_D53 FBD_D54 FBD_D55 FBD_D56 FBD_D57 FBD_D58 FBD_D59 FBD_D60 FBD_D61 FBD_D62 FBD_D63
FBD_DQM0 FBD_DQM1 FBD_DQM2 FBD_DQM3 FBD_DQM4 FBD_DQM5 FBD_DQM6 FBD_DQM7
FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_WP2 FBD_DQS_WP3 FBD_DQS_WP4 FBD_DQS_WP5 FBD_DQS_WP6 FBD_DQS_WP7
GND_071 8 GND_071 9 GND_072 0 GND_072 1 GND_072 2 GND_072 3 GND_072 4 GND_072 5
@
GP104
FBD
2
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8
FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30 FBD_CMD31 FBD_CMD32 FBD_CMD33 FBD_CMD34 FBD_CMD35
FBD_DBG_RFU1 FBD_DBG_RFU2
FBD_CLK0*
FBD_CLK1*
FBD_WCK01
FBD_WCK01*
FBD_WCKB01
FBD_WCKB01*
FBD_WCK23
FBD_WCK23*
FBD_WCKB23
FBD_WCKB23*
FBD_WCK45
FBD_WCK45*
FBD_WCKB45
FBD_WCKB45*
FBD_WCK67
FBD_WCK67*
FBD_WCKB67
FBD_WCKB67*
FBD_PLL_AVDD
GP106
UNUSED
N17E-G1_BGA2152~D
FBD_CLK0
FBD_CLK1
AD2 AD1 AD4 AC1 AC2 AC3 AA3 AA2 AA1 AA4 Y1 Y2 Y3 V3 V2 V1 L3 L2 L1 M4 M1 M2 M3 P3 P2 P1 R4 R1 R2 R3 U3 U2 U1 V4 AD3 J3
AC9 P9
Y8 Y7 R8 R7
AJ8 AJ7 AG8 AG9 AD8 AD9 AC7 AC8 J6 J7 H7 H6 P8 P7 M7 M8
+FBX_PLLAVDD+FBX_PLLAVDD
V11
0.1U_0201_10V6 K
1
2
Under GPU
1
CG41
A A
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
N17E-G1(3/6) MEM Interface
N17E-G1(3/6) MEM Interface
N17E-G1(3/6) MEM Interface
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
28 73Friday, March 31, 2017
28 73Friday, March 31, 2017
28 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 25
5
RG66 100K_0402_1%
@
1 2
D D
STRAP0
RG78 100K_0402_1%
@
1 2
RG67 100K_0402_1%
@
1 2
STRAP1
RG79 100K_0402_1%
@
1 2
RG68 100K_0402_1%
@
1 2
STRAP2
RG80 100K_0402_1%
@
1 2
RG69 100K_0402_1%
1 2
RG81 100K_0402_1%
@
1 2
STRAP3
4
1 2
1 2
RG70 100K_0402_1%
@
STRAP4
RG82 100K_0402_1%
+1.8VSDGPU_AON
RG71 100K_0402_1%
@
1 2
STRAP5
RG83 100K_0402_1%
1 2
BM4 BM5
3
UG1T
15/23 MISC 2
BL3
STRAP0
BL4
STRAP1 STRAP2 STRAP3
BK5
STRAP4
BJ5
STRAP5
ROM_CS*
ROM_SI
ROM_SO
ROM_SCLK
BUFRST*
BJ4
BK2 BK4 BK3
GPU_BUF RST#
BF9
ROM_CS#
ROM_SI ROM_SO ROM_SCLK
@
TG1 PAD~D
2
+1.8VSDGPU_AON
RG72 100K_0402_5%
1 2
RG75 100K_0402_1%
@
1 2
RG73 100K_0402_1%
1 2
RG76 100K_0402_5%
@
1 2
RG74 100K_0402_5%
1 2
RG77 100K_0402_1%
@
1 2
1
@
+1.8VSDGPU_AON +1.8VSDGPU_AON
12
RG87
@
10K_0402_5%
C C
ROM_CS#
1 2
@
RG88
0_0402_5%
DGPU_ROM_SO_RROM_SO
UG10
@
1
CS#
2
DO(IO1)
3
WP#(IO2)
4
GND
W25Q80EWSSIG_SO8
VCC
HOLD#(IO3)
DI(IO0)
8 7 6
CLK
5
1
@
0.1U_0201_10V6 K
2
DGPU_ROM_SCLK DGPU_ROM_SI
CG54
RG89
@
33_0402_5%
1 2 1 2
RG90
@
33_0402_5%
ROM_SCLK ROM_SI
N17E-G1_BGA2152~D
DGPU VBIOS ROM
+IFPX_PLLVDD
0.1U_0201_10V6 K
0.1U_0201_10V6 K
CG922
1
B B
2
0.1U_0201_10V6 K
0.1U_0201_10V6 K
CG50
CG49
1
1
2
2
0.1U_0201_10V6 K
CG51
1
2
0.1U_0201_10V6 K
CG52
CG53
1
1
2
2
BD12
BC12
U42
AF11
BB24
UG1S
14/23 XTAL/PLL
SP_PLLVDD
VID_PLLVDD
GPCPLL _AVDD0
GPCPLL _AVDD1
XS_PLLVDD
Under GPU
BJ6
XTAL_SSIN
12
RG84 10K_0402_5%
A A
5
BL6
XTALIN
2
CG55 15P_0402_50V8 J
1
XTAL_IN
RG86 10M_0402_5%@
YG1 27MHZ_10PF_XR CGB27M000F2P18R0
1
1
N17E-G1_BGA2152~D@
1 2
NC
2
4
XTAL_OUTBUFF
XTAL_OUT
3
3
NC
4
BK6
BM6
XTALOUTBUFF_R
12
RG199 330_0402_1%
2
CG56 15P_0402_50V8 J
1
12
RG85 10K_0402_5%
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
N17E-G1(6/6) Strap Pin,ROM
N17E-G1(6/6) Strap Pin,ROM
N17E-G1(6/6) Strap Pin,ROM
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
29 73Friday, March 31, 2017
29 73Friday, March 31, 2017
29 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 26
5
4
3
2
1
AP27 AP28 AP29 AP35 AP36 AP37 AP38 AP39 AV14 AV15 AV16 AV17 AV18 AV24 AV25 AV26 AV27 AV28 AV29 AV35 AV36 AV37 AV38 AV39
W14 W15 W16 W17 W18 W24 W25 W26 W27 W28 W29 W35 W36 W37 W38 W39
R14 R15 R16 R17 R18 R24 R25 R26 R27 R28 R29 R35 R36 R37 R38 R39
UG1J
23/23 VDDS
VDDS_057 VDDS_058 VDDS_059 VDDS_060 VDDS_061 VDDS_062 VDDS_063 VDDS_064 VDDS_065 VDDS_066 VDDS_067 VDDS_068 VDDS_069 VDDS_070 VDDS_071 VDDS_072 VDDS_073 VDDS_074 VDDS_075 VDDS_076 VDDS_077 VDDS_078 VDDS_079 VDDS_080 VDDS_081 VDDS_082 VDDS_083 VDDS_084 VDDS_085 VDDS_086 VDDS_087 VDDS_088 VDDS_089 VDDS_090 VDDS_091 VDDS_092 VDDS_093 VDDS_094 VDDS_095 VDDS_096 VDDS_097 VDDS_098 VDDS_099 VDDS_100 VDDS_101 VDDS_102 VDDS_103 VDDS_104 VDDS_105 VDDS_106 VDDS_107 VDDS_108 VDDS_109 VDDS_110 VDDS_111 VDDS_112
@
VDDS_001 VDDS_002 VDDS_003 VDDS_004 VDDS_005 VDDS_006 VDDS_007 VDDS_008 VDDS_009 VDDS_010 VDDS_011 VDDS_012 VDDS_013 VDDS_014 VDDS_015 VDDS_016 VDDS_017 VDDS_018 VDDS_019 VDDS_020 VDDS_021 VDDS_022 VDDS_023 VDDS_024 VDDS_025 VDDS_026 VDDS_027 VDDS_028 VDDS_029 VDDS_030 VDDS_031 VDDS_032 VDDS_033 VDDS_034 VDDS_035 VDDS_036 VDDS_037 VDDS_038 VDDS_039 VDDS_040 VDDS_041 VDDS_042 VDDS_043 VDDS_044 VDDS_045 VDDS_046 VDDS_047 VDDS_048 VDDS_049 VDDS_050 VDDS_051 VDDS_052 VDDS_053 VDDS_054 VDDS_055 VDDS_056
VDDS_SENSE
GNDS_SE NSE
N17E-G1_BGA2152~D
+1.35VSDGPU
Place under GPU
UG1G
19/23 VDD_2/2
AP21
VDD_145
AP22
VDD_146
AP23
VDD_147
AP30
VDD_148
AP31
VDD_149
AP32
VDD_150
AP33
VDD_151
AP34
D D
C C
B B
AR13 AR40 AT14 AT15 AT16 AT17 AT18 AT19 AT20 AT21 AT22 AT23 AT24 AT25 AT26 AT27 AT28 AT29 AT30 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38 AT39 AT42 AU43 AV19 AV20 AV21 AV22 AV23 AV30 AV31 AV32 AV33 AV34 AV42 AV43
AV44 AW13 AW40 AW42 AW43 AW44 AW45
AY14
AY18
AY22
AY26
AY27
AY31
AY35
AY39
AY43
AY45
BA43
BA44
BA45
BA46
BA47
BB38
BB39
VDD_152 VDD_153 VDD_154 VDD_155 VDD_156 VDD_157 VDD_158 VDD_159 VDD_160 VDD_161 VDD_162 VDD_163 VDD_164 VDD_165 VDD_166 VDD_167 VDD_168 VDD_169 VDD_170 VDD_171 VDD_172 VDD_173 VDD_174 VDD_175 VDD_176 VDD_177 VDD_178 VDD_179 VDD_180 VDD_181 VDD_182 VDD_183 VDD_184 VDD_185 VDD_186 VDD_187 VDD_188 VDD_189 VDD_190 VDD_191 VDD_192 VDD_193 VDD_194 VDD_195 VDD_196 VDD_197 VDD_198 VDD_199 VDD_200 VDD_201 VDD_202 VDD_203 VDD_204 VDD_205 VDD_206 VDD_207 VDD_208 VDD_209 VDD_210 VDD_211 VDD_212 VDD_213 VDD_214 VDD_215 VDD_216 VDD_217 VDD_218
VDD_219 VDD_220 VDD_221 VDD_222 VDD_223 VDD_224 VDD_225 VDD_226 VDD_227 VDD_228 VDD_229 VDD_230 VDD_231 VDD_232 VDD_233 VDD_234 VDD_235 VDD_236 VDD_237 VDD_238 VDD_239 VDD_240 VDD_241 VDD_242 VDD_243 VDD_244 VDD_245 VDD_246 VDD_247 VDD_248 VDD_249 VDD_250 VDD_251 VDD_252 VDD_253 VDD_254 VDD_255 VDD_321 VDD_322 VDD_323 VDD_324 VDD_325 VDD_326 VDD_327 VDD_328 VDD_329 VDD_330 VDD_331 VDD_332 VDD_333 VDD_334 VDD_335 VDD_336 VDD_337 VDD_338 VDD_339 VDD_340 VDD_341 VDD_342 VDD_343 VDD_344 VDD_345 VDD_346 VDD_347 VDD_348 VDD_349 VDD_350 VDD_351 VDD_352 VDD_353 VDD_354 VDD_355 VDD_356
BB45 BB46 BB47 BB48 BC38 BC39 BC40 BC41 BC45 BC47 BC49 BD39 BD41 BD46 BD47 BD48 BD49 BD50 BD51 BE41 BE42 BE43 BE46 BE47 BE48 BE49 BE50 BE51 BE52 BF42 BF44 BF45 BF47 BF49 BF51 BG43 BG44 U16 U17 U18 U19 U20 U21 U22 U23 U24 U25 U26 U27 U28 U29 U30 U31 U32 U33 U34 U35 U36 U37 U38 U39 V13 V40 W19 W20 W21 W22 W23 W30 W31 W32 W33 W34
AC14 AC15 AC16 AC17 AC18 AC24 AC25 AC26 AC27 AC28 AC29 AC35 AC36 AC37 AC38 AC39 AF14 AF15 AF16 AF17 AF18 AF24 AF25 AF26 AG27 AG28 AG29 AG35 AG36 AG37 AG38 AG39 AK14 AK15 AK16 AK17 AK18 AK24 AK25 AK26 AK27 AK28 AK29 AK35 AK36 AK37 AK38 AK39 AP14 AP15 AP16 AP17 AP18 AP24 AP25 AP26
BM45 BM44
+NVVDD2+NVVDD1 +NVVDD2 +1.35VSDGPU+NVVDD1 +1.35VSDGPU
NVVDD2_VCC_SENSE <67> NVVDD2_VSS_SENSE <67>
AA10 AA11 AA42
AA43 AC10 AC11 AC42 AC43 AD10 AD11 AD42 AD43
AF10
AF43 AG10 AG11 AG42 AG43
AJ10
AJ11
AJ42
AJ43
AK10
AK11
AK42
AK43 AM42 AM43 AN43 AR42 AR43
R42 R43 U10 U11 U43 V10 V42 V43 Y10 Y11 Y42 Y43
UG1H
20/23 FBVDDQ
FBVDDQ_01 FBVDDQ_02 FBVDDQ_03 FBVDDQ_04 FBVDDQ_05 FBVDDQ_06 FBVDDQ_07 FBVDDQ_08 FBVDDQ_09 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_76 FBVDDQ_77 FBVDDQ_78 FBVDDQ_79 FBVDDQ_80 FBVDDQ_81 FBVDDQ_82 FBVDDQ_83 FBVDDQ_84 FBVDDQ_85 FBVDDQ_86 FBVDDQ_87
@
FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43 FBVDDQ_44 FBVDDQ_45 FBVDDQ_46 FBVDDQ_47 FBVDDQ_48 FBVDDQ_49 FBVDDQ_50 FBVDDQ_51 FBVDDQ_52 FBVDDQ_53 FBVDDQ_54 FBVDDQ_55 FBVDDQ_56 FBVDDQ_57 FBVDDQ_58 FBVDDQ_59 FBVDDQ_60 FBVDDQ_61 FBVDDQ_62 FBVDDQ_63 FBVDDQ_64 FBVDDQ_65 FBVDDQ_66 FBVDDQ_67 FBVDDQ_68 FBVDDQ_69 FBVDDQ_70 FBVDDQ_71 FBVDDQ_72 FBVDDQ_73 FBVDDQ_74 FBVDDQ_75
FBVDDQ_SENSE
FB_VREF
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
N17E-G1_BGA2152~D
AT43 K12 K14 K15 K17 K18 K20 K21 K23 K24 K26 K27 K29 K30 K32 K33 K35 K36 K38 K39 K41 L14 L15 L18 L20 L21 L23 L24 L26 L27 L30 L32 L33 L35 L36 L39 M10 M43 P10 P11 P42 P43 R10 R11
E52
P45
R44
P44
R45
FBCAL_VDDQ
FBCAL_GND
FBCAL_TERM
FB_VDDQ_SENSE <62>
1 2
RG95 40.2_0402_1%
1 2
RG96 40.2_0402_1%
1 2
RG97 60.4_0402_1%
+1.35VSDGPU
1
1
1
1
CG6210U_0603_6.3V6M
CG6410U_0603_6.3V6M
CG6310U_0603_6.3V6M
2
2
2
BK45
VDD_SENSE
BL45
GND_SEN SE
N17E-G1_BGA2152~D
@
+1.35VSDGPU
1
1
1
CG9410U_0603_6.3V6M
A A
5
CG9510U_0603_6.3V6M
2
2
1
1
1
CG9610U_0603_6.3V6M
CG9822U_0603_6.3V6M
CG9922U_0603_6.3V6M
CG9710U_0603_6.3V6M
2
2
2
2
NVVDD1_VCC_SENSE <64> NVVDD1_VSS_SENSE <64>
1
1
CG10022U_0603_6.3V6 M
CG10122U_0603_6.3V6 M
2
2
4
1
1
CG10222U_0603_6.3V6 M
CG10322U_0603_6.3V6 M
2
2
1
1
1
CG10622U_0603_6.3V6 M
CG10422U_0603_6.3V6 M
CG10522U_0603_6.3V6 M
2
2
2
FBVDDQ
1
1
1
CG6510U_0603_6.3V6M
CG6610U_0603_6.3V6M
2
2
1
1
1
CG6810U_0603_6.3V6M
CG6710U_0603_6.3V6M
CG6910U_0603_6.3V6M
CG711U_0 402_6.3V4Z
CG701U_0 402_6.3V4Z
2
2
2
2
2
22uF 10u F 4.7uF 1uF 0.1uF470uF
113924
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
1
1
CG721U_0 402_6.3V4Z
CG731U_0 402_6.3V4Z
2
2
1
1
1
CG761U_0 402_6.3V4Z
CG751U_0 402_6.3V4Z
2
2
Deciphere d Date
Deciphere d Date
Deciphere d Date
1
CG771U_0 402_6.3V4Z
2
CG741U_0 402_6.3V4Z
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
1
1
1
CG801U_0 402_6.3V4Z
CG791U_0 402_6.3V4Z
CG781U_0 402_6.3V4Z
2
2
2
2
1
1
1
CG811U_0 402_6.3V4Z
CG821U_0 402_6.3V4Z
2
2
1
1
CG831U_0 402_6.3V4Z
CG851U_0 402_6.3V4Z
CG841U_0 402_6.3V4Z
2
2
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
1
1
CG881U_0 402_6.3V4Z
CG861U_0 402_6.3V4Z
CG871U_0 402_6.3V4Z
2
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N17E-G1(4/6) Power
N17E-G1(4/6) Power
N17E-G1(4/6) Power
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
1
1
1
CG901U_0 402_6.3V4Z
CG891U_0 402_6.3V4Z
2
2
1
CG911U_0 402_6.3V4Z
CG921U_0 402_6.3V4Z
CG931U_0 402_6.3V4Z
2
2
2
1.A
1.A
30 73Friday, March 31, 2017
30 73Friday, March 31, 2017
1
30 73Friday, March 31, 2017
1.A
of
of
of
Page 27
5
+NVVDD1 +NVVDD1
1U_0402_6.3V4Z
CG116
1
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CG122
CG123
1
1
2
2
AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 AA22 AA23 AA24 AA25 AA26 AA27 AA28 AA29 AA30 AA31 AA32 AA33 AA34 AA35 AA36 AA37 AA38 AA39 AB13 AB40 AC19 AC20 AC21 AC22 AC23 AC30 AC31 AC32 AC33 AC34 AE14 AE15 AE16 AE17 AE18 AE19 AE20 AE21 AE22 AE23 AE24 AE25 AE26 AE27 AE28 AE29 AE30 AE31 AE32 AE33 AE34 AE35 AE36 AE37 AE38 AE39 AF13 AF30 AF31 AF32 AF33 AF34 AF40 AG13 AG19 AG20 AG21 BG45 BG46 BG47 BG48 BG49 BG50 BG51 BG52 BH44 BH45 BH47 BH48 BH49 BH50 BH51 BH52 BJ44 BJ45 BJ46 BJ47 BJ48 BJ49 BJ50 BJ51 BJ52 BK47 BK48 BK49 BK50 BK51
UG1F
18/21 VDD_1/2
VDD_001 VDD_002 VDD_003 VDD_004 VDD_005 VDD_006 VDD_007 VDD_008 VDD_009 VDD_010 VDD_011 VDD_012 VDD_013 VDD_014 VDD_015 VDD_016 VDD_017 VDD_018 VDD_019 VDD_020 VDD_021 VDD_022 VDD_023 VDD_024 VDD_025 VDD_026 VDD_027 VDD_028 VDD_029 VDD_030 VDD_031 VDD_032 VDD_033 VDD_034 VDD_035 VDD_036 VDD_037 VDD_038 VDD_039 VDD_040 VDD_041 VDD_042 VDD_043 VDD_044 VDD_045 VDD_046 VDD_047 VDD_048 VDD_049 VDD_050 VDD_051 VDD_052 VDD_053 VDD_054 VDD_055 VDD_056 VDD_057 VDD_058 VDD_059 VDD_060 VDD_061 VDD_062 VDD_063 VDD_064 VDD_065 VDD_066 VDD_067 VDD_068 VDD_069 VDD_070 VDD_071 VDD_072 VDD_073 VDD_074 VDD_075 VDD_256 VDD_257 VDD_258 VDD_259 VDD_260 VDD_261 VDD_262 VDD_263 VDD_264 VDD_265 VDD_266 VDD_267 VDD_268 VDD_269 VDD_270 VDD_271 VDD_272 VDD_273 VDD_274 VDD_275 VDD_276 VDD_277 VDD_278 VDD_279 VDD_280 VDD_281 VDD_282 VDD_283 VDD_284 VDD_285
@
N17E-G1_BGA2152~D
1
2
0.1U_0201_10V6K
CG110
+1.8VSDGPU_AON
BA10 BB14 BC14
+1.8VSDGPU_MAIN
AM10 AM11 AN10 AN11 AR10 AR11 AT10 AT11 AV10 AV11 AW10 AW11
UG1I
21/23 NC/1V8
AT9
NC_1
BA6
NC_2
BA9
NC_3
BD14
NC_4
BE12
NC_5
BG6
NC_6
BH6
NC_7
BJ11
NC_8
BJ9
NC_9
BK44
D D
C C
NC_10
@
+1.8VSDGPU_AON
4.7U_0402_6.3V6M
1
2
N17E-G1_BGA2152~D
1U_0402_6.3V4Z
CG107
CG108
1
2
1V8_AON_1 1V8_AON_2 1V8_AON_3
VDD18_01 VDD18_02 VDD18_03 VDD18_04 VDD18_05 VDD18_06 VDD18_07 VDD18_08 VDD18_09 VDD18_10 VDD18_11 VDD18_12
0.1U_0201_10V6K
1
2
CG109
Under GPU
+1.8VSDGPU_MAIN
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
4.7U_0402_6.3V6M
CG111
1
1
2
+1.8VSDGPU_MAIN
0.1U_0201_10V6K
CG117
1
2
2
0.1U_0201_10V6K
1
2
B B
1U_0402_6.3V4Z
1U_0402_6.3V4Z
CG113
CG114
CG112
1
2
0.1U_0201_10V6K
CG118
CG119
1
2
CG115
1
1
2
2
0.1U_0201_10V6K
0.1U_0201_10V6K
CG120
CG121
1
1
2
2
Under GPU
A A
5
VDD_076 VDD_077 VDD_078 VDD_079 VDD_080 VDD_081 VDD_082 VDD_083 VDD_084 VDD_085 VDD_086 VDD_087 VDD_088 VDD_089 VDD_090 VDD_091 VDD_092 VDD_093 VDD_094 VDD_095 VDD_096 VDD_097 VDD_098 VDD_099 VDD_100 VDD_101 VDD_102 VDD_103 VDD_104 VDD_105 VDD_106 VDD_107 VDD_108 VDD_109 VDD_110 VDD_111 VDD_112 VDD_113 VDD_114 VDD_115 VDD_116 VDD_117 VDD_118 VDD_119 VDD_120 VDD_121 VDD_122 VDD_123 VDD_124 VDD_125 VDD_126 VDD_127 VDD_128 VDD_129 VDD_130 VDD_131 VDD_132 VDD_133 VDD_134 VDD_135 VDD_136 VDD_137 VDD_138 VDD_139 VDD_140 VDD_141 VDD_142 VDD_143 VDD_144 VDD_286 VDD_287 VDD_288 VDD_289 VDD_290 VDD_291 VDD_292 VDD_293 VDD_294 VDD_295 VDD_296 VDD_297 VDD_298 VDD_299 VDD_300 VDD_301 VDD_302 VDD_303 VDD_304 VDD_305 VDD_306 VDD_307 VDD_308 VDD_309 VDD_310 VDD_311 VDD_312 VDD_313 VDD_314 VDD_315 VDD_316 VDD_317 VDD_318 VDD_319 VDD_320
4
AG22 AG23 AG40 AH14 AH15 AH16 AH17 AH18 AH19 AH20 AH21 AH22 AH23 AH24 AH25 AH26 AH27 AH28 AH29 AH30 AH31 AH32 AH33 AH34 AH35 AH36 AH37 AH38 AH39 AK19 AK20 AK21 AK22 AK23 AK30 AK31 AK32 AK33 AK34 AL13 AL40 AM14 AM15 AM16 AM17 AM18 AM19 AM20 AM21 AM22 AM23 AM24 AM25 AM26 AM27 AM28 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AM37 AM38 AM39 AP19 AP20 BK52 BL46 BL47 BL48 BL49 BL50 BL51 BL52 BM47 BM48 BM49 BM50 BM51 N14 N18 N22 N26 N27 N31 N35 N39 P13 P40 R19 R20 R21 R22 R23 R30 R31 R32 R33 R34 U14 U15
4
AA49
AB10 AB14 AB15 AB16 AB17 AB18 AB19
AB20 AB21 AB22 AB23 AB24 AB25 AB26 AB27 AB28 AB29 AB30 AB31 AB32 AB33 AB34 AB35 AB36 AB37 AB38 AB39
AB43 AB45 AB47 AB49 AB51
AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AD39 AD44 AE10
AE43 AE45 AE47 AE49 AE51
AF19 AF20 AF21 AF22 AF23 AF27 AF28 AF29 AF35 AF36 AF37 AF38 AF39 AF45
AG14 AG15 AG16 AG17 AG18 AG24 AG25 AG26
AG30 AG31 AG32 AG33 AG34 AG44 AH10
AH43 AH45 AH47 AH49 AH51
A26 A29
A32 A50 A51
AA8
AB2
AB4
AB6 AB8
AE2 AE4
AE6 AE8
AF1
AF5
AG3
AH2 AH4
A2
A3
UG1K
16/23 GND_1/3
GND_001 GND_002 GND_003 GND_004 GND_005 GND_006 GND_007 GND_008 GND_009 GND_010 GND_011 GND_012 GND_013 GND_014 GND_015 GND_016 GND_017 GND_018 GND_019 GND_020 GND_021 GND_022 GND_023 GND_024 GND_025 GND_026 GND_027 GND_028 GND_029 GND_030 GND_031 GND_032 GND_033 GND_034 GND_035 GND_036 GND_037 GND_038 GND_039 GND_040 GND_041 GND_042 GND_043 GND_044 GND_045 GND_046 GND_047 GND_048 GND_049 GND_050 GND_051 GND_052 GND_053 GND_054 GND_055 GND_056 GND_057 GND_058 GND_059 GND_060 GND_061 GND_062 GND_063 GND_064 GND_065 GND_066 GND_067 GND_068 GND_069 GND_070 GND_071 GND_072 GND_073 GND_074 GND_075 GND_076 GND_077 GND_078 GND_079 GND_080 GND_081 GND_082 GND_083 GND_084 GND_085 GND_086 GND_087 GND_088 GND_089 GND_090 GND_091 GND_092 GND_093 GND_094 GND_095 GND_096 GND_097 GND_098 GND_099 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121
@
N17E-G1_BGA2152~D
3
AH6
GND_122
AH8
GND_123
AJ14
GND_124
AJ15
GND_125
AJ16
GND_126
AJ17
GND_127
AJ18
GND_128
AJ19
GND_129
AJ2
GND_130
AJ20
GND_131
AJ21
GND_132
AJ22
GND_133
AJ23
GND_134
AJ24
GND_135
AJ25
GND_136
AJ26
GND_137
AJ27
GND_138
AJ28
GND_139
AJ29
GND_140
AJ30
GND_141
AJ31
GND_142
AJ32
GND_143
AJ33
GND_144
AJ34
GND_145
AJ35
GND_146
AJ36
GND_147
AJ37
GND_148
AJ38
GND_149
AJ39
GND_150
AJ9
GND_151
AK1
GND_152
AK44
GND_153
AK47
GND_154
AL10
GND_155
AL14
GND_156
AL15
GND_157
AL16
GND_158
AL17
GND_159
AL18
GND_160
AL19
GND_161
AL2
GND_162
AL20
GND_163
AL21
GND_164
AL22
GND_165
AL23
GND_166
AL24
GND_167
AL25
GND_168
AL26
GND_169
AL27
GND_170
AL28
GND_171
AL29
GND_172
AL30
GND_173
AL31
GND_174
AL32
GND_175
AL33
GND_176
AL34
GND_177
AL35
GND_178
AL36
GND_179
AL37
GND_180
AL38
GND_181
AL39
GND_182
AL4
GND_183
AL43
GND_184
AL45
GND_185
AL47
GND_186
AL49
GND_187
AL51
GND_188
AL6
GND_189
AL8
GND_190
AM4
GND_191
AM9
GND_192
AN14
GND_193
AN15
GND_194
AN16
GND_195
AN17
GND_196
AN18
GND_197
AN19
GND_198
AN20
GND_199
AN21
GND_200
AN22
GND_201
AN23
GND_202
AN24
GND_203
AN25
GND_204
AN26
GND_205
AN27
GND_206
AN28
GND_207
AN29
GND_208
AN30
GND_209
AN31
GND_210
AN32
GND_211
AN33
GND_212
AN34
GND_213
AN35
GND_214
AN36
GND_215
AN37
GND_216
AN38
GND_217
AN39
GND_218
AN4
GND_219
AN5
GND_220
AN8
GND_221
AP10
GND_222
AP2
GND_223
AP4
GND_224
AP43
GND_225
AP45
GND_226
AP47
GND_227
AP49
GND_228
AP51
GND_229
AP6
GND_230
AP8
GND_231
AR14
GND_232
AR15
GND_233
AR16
GND_234
AR17
GND_235
AR18
GND_236
AR19
GND_237
BL37
GND_480
BD24
GND_H
BC24
GND_F
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL
THIS SHEET O F ENGINEERING DRAWING IS THE PRO PRIETARY PRO PERTY O F COMPAL ELECTRO NICS, IN C. AND C ONTAINS CONF IDENTIAL AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D
AND TRADE SECRET INFO RMATION. TH IS SHEET MAY NOT BE TRANSFERED F ROM THE CUSTODY OF THE COMPETEN T DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS , INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
MAY BE USE D BY OR DISC LOSED TO AN Y THIRD PARTY W ITHOUT PRIOR WRITTEN CON SENT OF C OMPAL ELECTRO NICS, INC .
3
UG1L
17/23 GND_2/3
AR20
GND_238
AR21
GND_239
AR22
GND_240
AR23
GND_241
AR24
GND_242
AR25
GND_243
AR26
GND_244
AR27
GND_245
AR28
GND_246
AR29
GND_247
AR30
GND_248
AR31
GND_249
AR32
GND_250
AR33
GND_251
AR34
GND_252
AR35
GND_253
AR36
GND_254
AR37
GND_255
AR38
GND_256
AR39
GND_257
AR4
GND_258
AR52
GND_259
AR9
GND_260
AT4
GND_261
AT5
GND_262
AT51
GND_263
AT52
GND_264
AT8
GND_265
AU10
GND_266
AU14
GND_267
AU15
GND_268
AU16
GND_269
AU17
GND_270
AU18
GND_271
AU19
GND_272
AU2
GND_273
AU20
GND_274
AU21
GND_275
AU22
GND_276
AU23
GND_277
AU24
GND_278
AU25
GND_279
AU26
GND_280
AU27
GND_281
AU28
GND_282
AU29
GND_283
AU30
GND_284
AU31
GND_285
AU32
GND_286
AU33
GND_287
AU34
GND_288
AU35
GND_289
AU36
GND_290
AU37
GND_291
AU38
GND_292
AU39
GND_293
AU4
GND_294
AU45
GND_295
AU47
GND_296
AU49
GND_297
AU51
GND_298
AU6
GND_299
AU8
GND_300
AV4
GND_301
AV45
GND_302
AV9
GND_303
AW14
GND_304
AW15
GND_305
AW16
GND_306
AW17
GND_307
AW18
GND_308
AW19
GND_309
AW20
GND_310
AW21
GND_311
AW22
GND_312
AW23
GND_313
AW24
GND_314
AW25
GND_315
AW26
GND_316
AW27
GND_317
AW28
GND_318
AW29
GND_319
AW30
GND_320
AW31
GND_321
AW32
GND_322
AW33
GND_323
AW34
GND_324
AW35
GND_325
AW36
GND_326
AW37
GND_327
AW38
GND_328
AW39
GND_329
AW4
GND_330
AW46
GND_331
AW5
GND_332
AW52
GND_333
AW8
GND_334
AY10
GND_335
AY2
GND_336
AY4
GND_337
AY47
GND_338
AY49
GND_339
AY51
GND_340
AY6
GND_341
AY8
GND_342
B1
GND_343
B10
GND_344
B13
GND_345
B16
GND_346
B19
GND_347
B2
GND_348
B22
GND_349
B25
GND_350
B28
GND_351
B31
GND_352
B34
GND_353
B37
GND_354
B40
GND_355
B43
GND_356
B46
GND_357
B48
GND_358
N17E-G1_BGA2152~D
@
Compal Secret Data
Compal Secret Data
2016/12/15 20 17/12/15
2016/12/15 20 17/12/15
2016/12/15 20 17/12/15
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
GND_361 GND_362 GND_363 GND_364 GND_365 GND_366 GND_367 GND_368 GND_369 GND_370 GND_371 GND_372 GND_373 GND_374 GND_375 GND_376 GND_377 GND_378 GND_379 GND_380 GND_381 GND_382 GND_383 GND_384 GND_385 GND_386 GND_387 GND_388 GND_389 GND_390 GND_391 GND_392 GND_393 GND_394 GND_395 GND_396 GND_397 GND_398 GND_399 GND_400 GND_401 GND_402 GND_403 GND_404 GND_405 GND_406 GND_407 GND_408 GND_409 GND_410 GND_411 GND_412 GND_413 GND_414 GND_415 GND_416 GND_417 GND_418 GND_419 GND_420 GND_421 GND_422 GND_423 GND_424 GND_425 GND_426 GND_427 GND_428 GND_429 GND_430 GND_431 GND_432 GND_433 GND_434 GND_435 GND_436 GND_437 GND_438 GND_439 GND_440 GND_441 GND_442 GND_443 GND_444 GND_445 GND_446 GND_447 GND_448 GND_449 GND_450 GND_451 GND_452 GND_453 GND_454 GND_455 GND_456 GND_457 GND_458 GND_459 GND_460 GND_461 GND_462 GND_463 GND_464 GND_465 GND_466 GND_467 GND_468 GND_469 GND_470 GND_471 GND_472 GND_473 GND_474 GND_475 GND_476 GND_477 GND_478 GND_479 GND_359 GND_360
B52 B7 BA48 BB49 BC13 BC16 BC19 BC2 BC22 BC25 BC28 BC31 BC34 BC37 BC4 BC51 BC6 BC8 BD26 BD29 BD32 BD35 BD38 BD52 BE10 BE13 BE15 BE16 BE18 BE19 BE21 BE22 BE24 BE25 BE27 BE28 BE30 BE31 BE33 BE34 BE36 BE37 BE39 BE40 BF2 BF4 BF41 BF6 BG10 BG13 BG16 BG19 BG22 BG25 BG28 BG31 BG34 BG37 BG40 BG42 BG7 BH15 BH18 BH2 BH21 BH24 BH27 BH30 BH33 BH36 BH39 BH42 BH5 BJ10 BJ12 BJ13 BJ14 BJ15 BJ16 BJ17 BJ18 BJ19 BJ20 BJ21 BJ22 BJ23 BJ24 BJ25 BJ26 BJ27 BJ28 BJ29 BJ30 BJ31 BJ32 BJ33 BJ34 BJ35 BJ36 BJ37 BJ38 BJ39 BJ40 BJ41 BJ42 BJ43 BJ7 BK1 BL1 BL10 BL13 BL16 BL19 BL2 BL22 BL25 BL28 BL31 BL34 B5 B51
2
2
GND_592 GND_593 GND_594 GND_595 GND_596 GND_597 GND_598 GND_599 GND_600 GND_601 GND_602 GND_603 GND_604 GND_605 GND_606 GND_607 GND_608 GND_609 GND_610 GND_611 GND_612 GND_613 GND_614 GND_615 GND_616 GND_617 GND_618 GND_619 GND_620 GND_621 GND_622 GND_623 GND_624 GND_625 GND_626 GND_627 GND_628 GND_629 GND_630 GND_631 GND_632 GND_633 GND_634 GND_635 GND_636 GND_637 GND_638 GND_639 GND_640 GND_641 GND_642 GND_643 GND_644 GND_645 GND_646 GND_647 GND_648 GND_649 GND_650 GND_651 GND_652 GND_653 GND_654 GND_655 GND_656 GND_657 GND_658 GND_659 GND_660 GND_661 GND_662 GND_663 GND_664 GND_665 GND_666 GND_667 GND_668 GND_669 GND_670 GND_671 GND_672 GND_673 GND_674 GND_675 GND_676 GND_677 GND_678 GND_679 GND_680 GND_681 GND_682 GND_683 GND_684 GND_685 GND_686 GND_687 GND_688 GND_689 GND_690 GND_691 GND_692 GND_693
1
N6 N8 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P51 R49 R52 T10 T14 T15 T16 T17 T18 T19 T2 T20 T21 T22 T23 T24 T25 T26 T27 T28 T29 T30 T31 T32 T33 T34 T35 T36 T37 T38 T39 T4 T43 T45 T47 T49 T51 T6 T8 U7 U9 V14 V15 V16 V17 V18 V19 V20 V21 V22 V23 V24 V25 V26 V27 V28 V29 V30 V31 V32 V33 V34 V35 V36 V37 V38 V39 V49 V52 W10 W2 W4 W43 W45
31 73Friday, March 31 , 2 017
31 73Friday, March 31 , 2 017
31 73Friday, March 31 , 2 017
of
of
1
of
UG1M
22/23 GND_3/3
BL43
GND_482
BL5
GND_483
BL7
GND_484
BM2
GND_485
BM3
GND_486
C1
GND_487
C29
GND_488
C33
GND_489
C5
GND_490
C51
GND_491
C52
GND_492
D10
GND_493
D12
GND_494
D13
GND_495
D16
GND_496
D19
GND_497
D22
GND_498
D24
GND_499
D25
GND_500
D28
GND_501
D30
GND_502
D31
GND_503
D34
GND_504
D37
GND_505
D4
GND_506
D40
GND_507
D43
GND_508
D46
GND_509
D49
GND_510
D7
GND_511
E2
GND_512
E4
GND_513
E48
GND_514
E5
GND_515
E51
GND_516
E8
GND_517
F10
GND_518
F13
GND_519
F16
GND_520
F17
GND_521
F19
GND_522
F21
GND_523
F22
GND_524
F25
GND_525
F28
GND_526
F31
GND_527
F34
GND_528
F35
GND_529
F37
GND_530
F40
GND_531
F43
GND_532
F44
GND_533
F46
GND_534
F52
GND_535
F7
GND_536
G2
GND_537
G38
GND_538
G4
GND_539
G47
GND_540
G49
GND_541
G51
GND_542
G6
GND_543
H1
GND_544
H10
GND_545
H13
GND_546
H16
GND_547
H19
GND_548
H22
GND_549
H25
GND_550
H28
GND_551
H31
GND_552
H34
GND_553
H37
GND_554
H40
GND_555
H43
GND_556
J1
GND_557
J12
GND_558
J17
GND_559
J20
GND_560
J38
GND_561
J49
GND_562
J52
GND_563
K13
GND_564
K16
GND_565
K19
GND_566
K2
GND_567
K22
GND_568
K25
GND_569
K28
GND_570
K31
GND_571
K34
GND_572
K37
GND_573
K4
GND_574
K40
GND_575
K45
GND_576
K47
GND_577
K49
GND_578
K51
GND_579
K6
GND_580
K8
GND_581
M52
GND_582
M6
GND_583
N10
GND_584
N2
GND_585
N4
GND_586
N43
GND_587
N45
GND_588
N47
GND_589
N49
GND_590
N51
GND_591
BL40
GND_481
N17E-G1_BGA2152~D
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Tit le
Tit le
Tit le
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
N17E-G1(5/6) Power,GND
N17E-G1(5/6) Power,GND
N17E-G1(5/6) Power,GND
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1.A
1.A
1.A
Page 28
5
4
3
2
1
GDDR5_A
FBA_EDC3<27> FBA_EDC2<27> FBA_EDC1<27> FBA_EDC0<27>
12
FBA_DBI3<27> FBA_DBI2<27> FBA_DBI1<27> FBA_DBI0<27>
FBA_CMD1<27>
FBA_CMD12<27> FBA_CMD14<27>
1 2
FBA_CMD13<27> FBA_CMD11<27>
FBA_CMD5<27> FBA_CMD8<27> FBA_CMD9<27> FBA_CMD4<27> FBA_CMD6<27>
+1.35VSDGPU
RG106 121_0402_1%
FBA_CMD7<27> FBA_CMD0<27> FBA_CMD10<27> FBA_CMD3<27> FBA_CMD15<27>
FBA_WCK23#<27> FBA_WCK23<27>
FBA_WCK01#<27> FBA_WCK01<27>
FBA_CMD2<27>
W=16mils
1
CG153
2
820P_0402_25V7
820P_0402_25V7
12
+FBA_VREFC
+1.35VSDGPU
CG124 0.01U_0402_16V7K
1 2
RG109 931_0402_1%
1
1
CG18010U_0402_6.3V4Z
CG17910U_0402_6.3V4Z
2
2
FBA_CLK0<2 7>
12
FBA_CLK0#<27>
+1.35VSDGPU
12
12
40.2_0402_ 1%
40.2_0402_ 1%
RG108 549_0402_1%
RG110
1.33K_0402_1%
RG99
RG100
+FBA_VREFC
1
CG152
2
D D
C C
1
D
2
MEM_VREF<25,33,34>
B B
+1.35VSDGPU
1
1
CG16422U_0603_6.3V6M
CG16522U_0603_6.3V6M
2
2
+1.35VSDGPU
Under VRAM
QG8 MESS1 38W- G_SOT 323- 3
G
S
3
1
1
1
CG16622U_0603_6.3V6M
CG17722U_0603_6.3V6M
CG17622U_0603_6.3V6M
2
2
2
UG13
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WCK23#
D4
WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
K4G80325FB-HC25 FBGA 170P
X76@
MF=1 MF=0
MF=0 MF= 1 MF=0MF=1
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
+1.35VSDGPU
1
CG12622U_0603_6.3V6M
2
+1.35VSDGPU
1
CG14310U_0402_6.3V4Z
2
+1.35VSDGPU
1
CG1401U_0402_6.3V4Z
2
FBA_D24 <27> FBA_D25 <27> FBA_D26 <27> FBA_D27 <27> FBA_D28 <27> FBA_D29 <27> FBA_D30 <27> FBA_D31 <27> FBA_D16 <27> FBA_D17 <27> FBA_D18 <27> FBA_D19 <27> FBA_D20 <27> FBA_D21 <27> FBA_D22 <27> FBA_D23 <27> FBA_D8 <27> FBA_D9 <27> FBA_D10 <27> FBA_D11 <27> FBA_D12 <27> FBA_D13 <27> FBA_D14 <27> FBA_D15 <27> FBA_D0 <27> FBA_D1 <27> FBA_D2 <27> FBA_D3 <27> FBA_D4 <27> FBA_D5 <27> FBA_D6 <27> FBA_D7 <27>
Near VRAM
1
1
1
CG12822U_0603_6.3V6M
CG12922U_0603_6.3V6M
CG12722U_0603_6.3V6M
2
2
2
1
1
1
CG14510U_0402_6.3V4Z
CG13110U_0402_6.3V4Z
CG14410U_0402_6.3V4Z
2
2
2
1
1
1
CG1471U_0402_6.3V4Z
CG1461U_0402_6.3V4Z
CG1411U_0402_6.3V4Z
2
2
2
1
1
CG13010U_0402_6.3V4Z
CG14222U_0603_6.3V6M
2
2
Under VRAMNear VRAM
1
1
CG1481U_0402_6.3V4Z
CG1491U_0402_6.3V4Z
2
2
FBA_CLK1<27>
40.2_0402_ 1%
12
CG125 0.01U_0402_16V7K
40.2_0402_ 1%
FBA_CLK1#<27>
1
CG17810U_0402_6.3V4Z
2
1
1
1
CG1501U_0402_6.3V4Z
1
CG1541U_0402_6.3V4Z
CG1511U_0402_6.3V4Z
CG1551U_0402_6.3V4Z
2
2
2
2
CG1561U_0402_6.3V4Z
RG98
RG101
1
2
12
1 2
1
1
CG1581U_0402_6.3V4Z
CG1571U_0402_6.3V4Z
2
2
FBA_EDC4<27> FBA_EDC5<27> FBA_EDC6<27> FBA_EDC7<27>
FBA_DBI4<27> FBA_DBI5<27> FBA_DBI6<27> FBA_DBI7<27>
FBA_CMD17<27>
FBA_CMD29<27> FBA_CMD27<27> FBA_CMD28<27> FBA_CMD30<27>
FBA_CMD25<27> FBA_CMD20<27> FBA_CMD21<27> FBA_CMD24<27> FBA_CMD22<27>
RG107 121_0402_1%
12
FBA_CMD23<27> FBA_CMD19<27> FBA_CMD31<27> FBA_CMD16<27> FBA_CMD26<27>
FBA_WCK45#<27> FBA_WCK45<27>
FBA_WCK67#<27> FBA_WCK67<27>
+FBA_VREFC
FBA_CMD18<27>
+1.35VSDGPU
1
1
1
CG1591U_0402_6.3V4Z
CG1601U_0402_6.3V4Z
2
2
1
1
CG1621U_0402_6.3V4Z
CG1631U_0402_6.3V4Z
CG1611U_0402_6.3V4Z
2
2
2
Under VRAM
UG12
MF=0 MF=1 MF= 0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WCK23#
D4
WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
K4G80325FB-HC25 FBGA 170P
X76@
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
FBA_D32 <27> FBA_D33 <27> FBA_D34 <27> FBA_D35 <27> FBA_D36 <27> FBA_D37 <27> FBA_D38 <27> FBA_D39 <27> FBA_D40 <27> FBA_D41 <27> FBA_D42 <27> FBA_D43 <27> FBA_D44 <27> FBA_D45 <27> FBA_D46 <27> FBA_D47 <27> FBA_D48 <27> FBA_D49 <27> FBA_D50 <27> FBA_D51 <27> FBA_D52 <27> FBA_D53 <27> FBA_D54 <27> FBA_D55 <27> FBA_D56 <27> FBA_D57 <27> FBA_D58 <27> FBA_D59 <27> FBA_D60 <27> FBA_D61 <27> FBA_D62 <27> FBA_D63 <27>
+1.35VSDGPU+1.35VSDGPU
18 x 1uF (0402 X6S)
1
1
1
CG16710U_0402_6.3V4Z
A A
CG18110U_0402_6.3V4Z
2
2
1
1
1
1
1
1
CG1701U_0402_6.3V4Z
CG16810U_0402_6.3V4Z
CG16910U_0402_6.3V4Z
CG1711U_0402_6.3V4Z
CG1731U_0402_6.3V4Z
CG1721U_0402_6.3V4Z
2
2
2
2
2
2
1
1
1
CG1741U_0402_6.3V4Z
CG1751U_0402_6.3V4Z
2
2
1
1
1
CG1331U_0402_6.3V4Z
CG1321U_0402_6.3V4Z
CG1341U_0402_6.3V4Z
CG1361U_0402_6.3V4Z
CG1351U_0402_6.3V4Z
2
2
2
2
2
1
1
1
CG1391U_0402_6.3V4Z
CG1371U_0402_6.3V4Z
CG1381U_0402_6.3V4Z
2
2
2
1
1
1
1
CG1841U_0402_6.3V4Z
CG1821U_0402_6.3V4Z
CG1851U_0402_6.3V4Z
CG1831U_0402_6.3V4Z
2
2
2
2
4 x 10uF (0402 X6S) Near VRAM
2 x 10uF (0402 X6S) 2 GND/PWR vias for each cap. 5 x 22uF (0603 X6S) 2 GND/PWR vias for each cap
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
N17E-GDDR5_A
N17E-GDDR5_A
N17E-GDDR5_A
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
1
32 73Friday, March 31, 2017
32 73Friday, March 31, 2017
32 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 29
5
4
3
2
1
GDDR5_B
FBB_EDC3<27> FBB_EDC2<27> FBB_EDC1<27> FBB_EDC0<27>
12
FBB_DBI3<27> FBB_DBI2<27> FBB_DBI1<27> FBB_DBI0<27>
FBB_CMD1<27>
FBB_CMD12<27> FBB_CMD14<27>
1 2
FBB_CMD13<27> FBB_CMD11<27>
FBB_CMD5<27> FBB_CMD8<27> FBB_CMD9<27> FBB_CMD4<27> FBB_CMD6<27>
+1.35VSDGPU
RG119 121_0402_1%
FBB_CMD7<27> FBB_CMD0<27> FBB_CMD10<27> FBB_CMD3<27> FBB_CMD15<27>
FBB_WCK23#<27> FBB_WCK23<27>
FBB_WCK01#<27> FBB_WCK01<27>
FBB_CMD2<27>
W=16mils
1
CG215
2
820P_0402_25V7
1
1
1
1
CG1981U_0402_6.3V4Z
CG2011U_0402_6.3V4Z
CG2001U_0402_6.3V4Z
CG1991U_0402_6.3V4Z
2
2
2
2
CG2021U_0402_6.3V4Z
12
1
2
+1.35VSDGPU
1
CG2031U_0402_6.3V4Z
2
CG186 0.01U_0402_16V7K
+1.35VSDGPU
RG122 931_0402_1%
Near VRAM
1
1
CG23922U_0603_6.3V6M
CG23822U_0603_6.3V6M
2
2
Under VRAM
1
1
CG23110U_0402_6.3V4Z
CG24110U_0402_6.3V4Z
2
2
FBB_CLK0<2 7>
RG111
40.2_0402_ 1%
12
RG113
40.2_0402_ 1%
FBB_CLK0#<27>
12
RG121 549_0402_1%
+FBB_VREFC
12
1
RG123
CG214
2
1.33K_0402_1% 820P_0402_25V7
1
1
1
CG24022U_0603_6.3V6M
CG24210U_0402_6.3V4Z
CG24310U_0402_6.3V4Z
2
2
2
1
1
1
CG1941U_0402_6.3V4Z
2
1
CG1951U_0402_6.3V4Z
CG1961U_0402_6.3V4Z
CG1971U_0402_6.3V4Z
2
2
2
D D
C C
1 2
1
D
2
MEM_VREF<25,32,34>
B B
A A
G
+1.35VSDGPU
+1.35VSDGPU
3
QG9 MESS1 38W- G_SOT 323- 3
S
1
1
CG22722U_0603_6.3V6M
CG22822U_0603_6.3V6M
2
2
1
1
CG23010U_0402_6.3V4Z
CG22910U_0402_6.3V4Z
2
2
5
1
CG2341U_0402_6.3V4Z
2
UG14
C2 C13 R13
R2
D2 D13 P13
P2
J12 J11
J3
H11 K10 K11 H10
K4 H5 H4
K5
J5
A5 U5
J1
J10 J13
J4 G3
G12
L3
L12
D5 D4
P5
P4
A10 U10
J14
J2
H1
K1
B5 G5
L5
T5
B10 D10 G10
L10
P10
T10 H14 K14
G1
L1
G4
L4 C5 R5
C10 R10 D11 G11
L11 P11 G14
L14
K4G80325FB-HC25 FBGA 170P
X76@
1
1
CG2361U_0402_6.3V4Z
CG2351U_0402_6.3V4Z
2
2
4
EDC0 EDC3 EDC1 EDC2 EDC2 EDC1 EDC3 EDC0
DBI0# DBI3# DBI1# DBI2# DBI2# DBI1# DBI3# DBI0#
CK CK# CKE#
BA0/A2 BA2/A4 BA1/A5 BA3/A3 BA2/A4 BA0/A2 BA3/A3 BA1/A5
A8/A7 A10/A0 A9/A1 A11/A6 A10/A0 A8/A7 A11/A6 A9/A1 A12/RFU/NC
VPP/NC VPP/NC
MF SEN ZQ
ABI# RAS# CAS# CS# WE# CAS# RAS# WE# CS#
WCK01# WCK23# WCK01 WCK23
WCK23# WCK01# WCK23 WCK01
VREFD VREFD VREFC
RESET#
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
170-BALL
SGRAM GDDR5
1
CG2371U_0402_6.3V4Z
2
MF=1 MF=0
MF=0 MF= 1 MF=0MF=1
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14
+1.35VSDGPU P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
FBB_D24 <27> FBB_D25 <27> FBB_D26 <27> FBB_D27 <27> FBB_D28 <27> FBB_D29 <27> FBB_D30 <27> FBB_D31 <27> FBB_D16 <27> FBB_D17 <27> FBB_D18 <27> FBB_D19 <27> FBB_D20 <27> FBB_D21 <27> FBB_D22 <27> FBB_D23 <27> FBB_D8 <27> FBB_D9 <27> FBB_D10 <27> FBB_D11 <27> FBB_D12 <27> FBB_D13 <27> FBB_D14 <27> FBB_D15 <27> FBB_D0 <27> FBB_D1 <27> FBB_D2 <27> FBB_D3 <27> FBB_D4 <27> FBB_D5 <27> FBB_D6 <27> FBB_D7 <27>
+1.35VSDGPU
1
1
1
CG18822U_0603_6.3V6M
CG19022U_0603_6.3V6M
CG18922U_0603_6.3V6M
2
2
2
1
1
1
CG20610U_0402_6.3V4Z
CG19110U_0402_6.3V4Z
CG20510U_0402_6.3V4Z
2
2
2
+1.35VSDGPU
1
1
1
CG2091U_0402_6.3V4Z
CG2101U_0402_6.3V4Z
CG2081U_0402_6.3V4Z
2
2
2
Under VRAM
CG187 0.01U_0402_16V7K
Near VRAM
1
1
1
CG19210U_0402_6.3V4Z
CG20422U_0603_6.3V6M
CG22622U_0603_6.3V6M
CG19310U_0402_6.3V4Z
2
2
2
1
CG20710U_0402_6.3V4Z
2
Under VRAM
1
1
1
CG2121U_0402_6.3V4Z
CG2161U_0402_6.3V4Z
CG2131U_0402_6.3V4Z
CG2111U_0402_6.3V4Z
2
2
2
FBB_EDC4<27> FBB_EDC5<27> FBB_EDC6<27>
FBB_CLK1<27>
RG112
40.2_0402_ 1%
12
RG114
40.2_0402_ 1%
FBB_CLK1#<27>
1
2
1
1
1
1
1
CG2201U_0402_6.3V4Z
CG2181U_0402_6.3V4Z
CG2171U_0402_6.3V4Z
CG2191U_0402_6.3V4Z
2
2
2
2
2
FBB_EDC7<27>
12
FBB_DBI4<27> FBB_DBI5<27> FBB_DBI6<27> FBB_DBI7<27>
FBB_CMD17<27>
FBB_CMD29<27> FBB_CMD27<27>
1 2
FBB_CMD28<27> FBB_CMD30<27>
FBB_CMD25<27> FBB_CMD20<27> FBB_CMD21<27> FBB_CMD24<27> FBB_CMD22<27>
RG120 121_0402_1%
FBB_CMD23<27> FBB_CMD19<27> FBB_CMD31<27> FBB_CMD16<27> FBB_CMD26<27>
FBB_WCK45#<27> FBB_WCK45<27>
FBB_WCK67#<27> FBB_WCK67<27>
FBB_CMD18<27>
1
1
1
CG2241U_0402_6.3V4Z
CG2221U_0402_6.3V4Z
CG2231U_0402_6.3V4Z
CG2211U_0402_6.3V4Z
2
2
2
12
+FBB_VREFC+FBB_VREFC
+1.35VSDGPU
1
2
1
1
1
CG2331U_0402_6.3V4Z
CG2251U_0402_6.3V4Z
CG2321U_0402_6.3V4Z
2
2
2
18 x 1uF (0402 X6S) 4 x 10uF (0402 X6S)
1
1
1
1
CG2461U_0402_6.3V4Z
CG2441U_0402_6.3V4Z
CG2451U_0402_6.3V4Z
CG2471U_0402_6.3V4Z
2
2
2
2
Near VRAM 2 x 10uF (0402 X6S) 2 GND/PWR vias for each cap. 5 x 22uF (0603 X6S) 2 GND/PWR vias for each cap
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
UG15
MF=0 MF=1 MF= 0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WCK23#
D4
WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
K4G80325FB-HC25 FBGA 170P
X76@
Deciphered Date
Deciphered Date
Deciphered Date
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
Title
Title
Title
Size
Size
Size
Date: Sheet
Date: Sheet
Date: Sheet
FBB_D32 <27> FBB_D33 <27> FBB_D34 <27> FBB_D35 <27> FBB_D36 <27> FBB_D37 <27> FBB_D38 <27> FBB_D39 <27> FBB_D40 <27> FBB_D41 <27> FBB_D42 <27> FBB_D43 <27> FBB_D44 <27> FBB_D45 <27> FBB_D46 <27> FBB_D47 <27> FBB_D48 <27> FBB_D49 <27> FBB_D50 <27> FBB_D51 <27> FBB_D52 <27> FBB_D53 <27> FBB_D54 <27> FBB_D55 <27> FBB_D56 <27> FBB_D57 <27> FBB_D58 <27> FBB_D59 <27> FBB_D60 <27> FBB_D61 <27> FBB_D62 <27> FBB_D63 <27>
+1.35VSDGPU+1.35VSDGPU
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
N17E-GDDR5_B
N17E-GDDR5_B
N17E-GDDR5_B
Document Number Rev
Document Number Rev
Document Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
1.A
1.A
1.A
of
of
of
33 73Friday, March 31, 2017
33 73Friday, March 31, 2017
33 73Friday, March 31, 2017
Page 30
5
4
3
2
1
GDDR5_C
FBC_EDC3<28> FBC_EDC2<28> FBC_EDC1<28> FBC_EDC0<28>
12
FBC_DBI3<28> FBC_DBI2<28> FBC_DBI1<28> FBC_DBI0<28>
FBC_CMD1<28>
FBC_CMD12<28> FBC_CMD14<28>
1 2
FBC_CMD13<28> FBC_CMD11<28>
FBC_CMD5<28> FBC_CMD8<28> FBC_CMD9<28> FBC_CMD4<28> FBC_CMD6<28>
+1.35VSDGPU
RG132 121_0402_1%
FBC_CMD7<28> FBC_CMD0<28> FBC_CMD10<28> FBC_CMD3<28> FBC_CMD15<28>
FBC_WCK23#<28> FBC_WCK23<2 8>
FBC_WCK01#<28> FBC_WCK01<2 8>
FBC_CMD2<28>
W=16mils
1
CG277
2
820P_0402_25V7
1
1
CG2631U_0402_6.3V4Z
2
1
1
CG2941U_0402_6.3V4Z
CG2961U_0402_6.3V4Z
CG2951U_0402_6.3V4Z
2
2
2
12
+1.35VSDGPU
1
1
CG2991U_0402_6.3V4Z
CG2971U_0402_6.3V4Z
CG2981U_0402_6.3V4Z
2
2
CG248 0.01U_0402_16V7K
RG135 931_0402_1%
1
1
1
CG29110U_0402_6.3V4Z
CG30222U_0603_6.3V6M
CG29210U_0402_6.3V4Z
2
2
2
1
1
CG2571U_0402_6.3V4Z
CG2581U_0402_6.3V4Z
2
2
FBC_CLK0<28>
12
FBC_CLK0#<28>
+1.35VSDGPU
12
12
1
CG2591U_0402_6.3V4Z
2
40.2_0402_ 1%
40.2_0402_ 1%
RG134 549_0402_1%
RG136
1.33K_0402_1%
1
CG2601U_0402_6.3V4Z
2
RG126
RG124
+FBC_VREFC
1
2
1
CG2611U_0402_6.3V4Z
2
CG276
820P_0402_25V7
1
CG2621U_0402_6.3V4Z
2
D D
C C
1 2
1
D
2
MEM_VREF<25,32,33>
B B
+1.35VSDGPU
CG28922U_0603_6.3V6M
+1.35VSDGPU
A A
1
CG29310U_0402_6.3V4Z
2
G
3
Near VRAM
1
1
1
CG30022U_0603_6.3V6M
CG29022U_0603_6.3V6M
2
2
2
Under VRAM
1
1
CG30310U_0402_6.3V4Z
CG30410U_0402_6.3V4Z
2
2
QG10 MESS1 38W- G_SOT 323- 3
S
1
CG30122U_0603_6.3V6M
2
1
1
CG2561U_0402_6.3V4Z
CG30510U_0402_6.3V4Z
2
2
1
2
C2 C13 R13
R2
D2 D13 P13
J12 J11
H11 K10 K11 H10
H5
H4
U5
J10 J13
G3 G12
L12
D5
D4
A10 U10
J14
H1
G5
B10 D10 G10
L10
P10
T10 H14 K14
G1
G4
C5
R5 C10 R10 D11 G11
L11 P11 G14
L14
1
1
CG3071U_0402_6.3V4Z
CG3061U_0402_6.3V4Z
2
2
UG16
EDC0 EDC3 EDC1 EDC2 EDC2 EDC1 EDC3 EDC0
DBI0# DBI3# DBI1# DBI2# DBI2# DBI1#
P2
DBI3# DBI0#
CK CK#
J3
CKE#
BA0/A2 BA2/A4 BA1/A5 BA3/A3 BA2/A4 BA0/A2 BA3/A3 BA1/A5
K4
A8/A7 A10/A0 A9/A1 A11/A6 A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC VPP/NC
J1
MF SEN ZQ
J4
ABI# RAS# CAS# CS# WE#
L3
CAS# RAS# WE# CS#
WCK01# WCK23# WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
VREFD VREFD VREFC
J2
RESET#
VSS
K1
VSS
B5
VSS VSS
L5
VSS
T5
VSS VSS VSS VSS VSS VSS VSS VSS VSS
VDD
L1
VDD VDD
L4
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
170-BALL
SGRAM GDDR5
K4G80325FB-HC25 FBGA 170P
X76@
1
CG3081U_0402_6.3V4Z
2
MF=1 MF=0
MF=0 MF= 1 MF=0MF=1
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
+1.35VSDGPU
1
CG25022U_0603_6.3V6M
2
+1.35VSDGPU
1
CG25510U_0402_6.3V4Z
2
+1.35VSDGPU
1
CG2641U_0402_6.3V4Z
2
FBC_D24 <28> FBC_D25 <28> FBC_D26 <28> FBC_D27 <28> FBC_D28 <28> FBC_D29 <28> FBC_D30 <28> FBC_D31 <28> FBC_D16 <28> FBC_D17 <28> FBC_D18 <28> FBC_D19 <28> FBC_D20 <28> FBC_D21 <28> FBC_D22 <28> FBC_D23 <28> FBC_D8 <28> FBC_D9 <28> FBC_D10 <28> FBC_D11 <28> FBC_D12 <28> FBC_D13 <28> FBC_D14 <28> FBC_D15 <28> FBC_D0 <28> FBC_D1 <28> FBC_D2 <28> FBC_D3 <28> FBC_D4 <28> FBC_D5 <28> FBC_D6 <28> FBC_D7 <28>
Near VRAM
1
1
1
CG26622U_0603_6.3V6M
CG25122U_0603_6.3V6M
CG25222U_0603_6.3V6M
2
2
2
1
1
1
CG26810U_0402_6.3V4Z
CG26710U_0402_6.3V4Z
CG26910U_0402_6.3V4Z
2
2
2
1
1
1
CG2651U_0402_6.3V4Z
CG2701U_0402_6.3V4Z
CG2711U_0402_6.3V4Z
2
2
2
FBC_CLK1<28>
12
CG249 0.01U_0402_16V7K
FBC_CLK1#<28>
1
1
1
CG25310U_0402_6.3V4Z
CG25410U_0402_6.3V4Z
CG28822U_0603_6.3V6M
2
2
2
Under VRAM
1
1
1
1
CG2721U_0402_6.3V4Z
CG2741U_0402_6.3V4Z
CG2781U_0402_6.3V4Z
CG2751U_0402_6.3V4Z
CG2731U_0402_6.3V4Z
2
2
2
2
40.2_0402_ 1%
40.2_0402_ 1%
1
2
FBC_EDC4<28> FBC_EDC5<28> FBC_EDC6<28> FBC_EDC7<28>
12
RG127
RG125
1
1
CG2801U_0402_6.3V4Z
CG2791U_0402_6.3V4Z
2
2
FBC_DBI4<28> FBC_DBI5<28> FBC_DBI6<28> FBC_DBI7<28>
FBC_CMD17<28>
FBC_CMD29<28> FBC_CMD27<28>
1 2
FBC_CMD28<28> FBC_CMD30<28>
FBC_CMD25<28> FBC_CMD20<28> FBC_CMD21<28> FBC_CMD24<28> FBC_CMD22<28>
RG133 121_0402_1%
FBC_CMD23<28> FBC_CMD19<28> FBC_CMD31<28> FBC_CMD16<28> FBC_CMD26<28>
FBC_WCK45#<28> FBC_WCK45<2 8>
FBC_WCK67#<28> FBC_WCK67<2 8>
FBC_CMD18<28>
1
CG2811U_0402_6.3V4Z
2
1
1
1
CG2841U_0402_6.3V4Z
CG2821U_0402_6.3V4Z
CG2831U_0402_6.3V4Z
2
2
2
1
CG2851U_0402_6.3V4Z
2
12
+FBC_VREFC+F BC_VREFC
+1.35VSDGPU
1
CG2861U_0402_6.3V4Z
2
1
CG2871U_0402_6.3V4Z
2
Under VRAM 18 x 1uF (0402 X6S)
1
CG3091U_0402_6.3V4Z
2
4 x 10uF (0402 X6S) Near VRAM
2 x 10uF (0402 X6S) 2 GND/PWR vias for each cap.
UG17
MF=0 MF=1 MF= 0MF=1
C2
EDC0 EDC3
C13
EDC1 EDC2
R13
EDC2 EDC1
R2
EDC3 EDC0
D2
DBI0# DBI3#
D13
DBI1# DBI2#
P13
DBI2# DBI1#
P2
DBI3# DBI0#
J12
CK
J11
CK#
J3
CKE#
H11
BA0/A2 BA2/A4
K10
BA1/A5 BA3/A3
K11
BA2/A4 BA0/A2
H10
BA3/A3 BA1/A5
K4
A8/A7 A10/A0
H5
A9/A1 A11/A6
H4
A10/A0 A8/A7
K5
A11/A6 A9/A1
J5
A12/RFU/NC
A5
VPP/NC
U5
VPP/NC
J1
MF
J10
SEN
J13
ZQ
J4
ABI#
G3
RAS# CAS#
G12
CS# WE#
L3
CAS# RAS#
L12
WE# CS#
D5
WCK01# WCK23#
D4
WCK01 WCK23
P5
WCK23# WCK01#
P4
WCK23 WCK01
A10
VREFD
U10
VREFD
J14
VREFC
J2
RESET#
H1
VSS
K1
VSS
B5
VSS
G5
VSS
L5
VSS
T5
VSS
B10
VSS
D10
VSS
G10
VSS
L10
VSS
P10
VSS
T10
VSS
H14
VSS
K14
VSS
G1
VDD
L1
VDD
G4
VDD
L4
VDD
C5
VDD
R5
VDD
C10
VDD
R10
VDD
D11
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VDD
170-BALL
SGRAM GDDR5
K4G80325FB-HC25 FBGA 170P
X76@
DQ24 DQ0 DQ25 DQ1 DQ26 DQ2 DQ27 DQ3 DQ28 DQ4 DQ29 DQ5 DQ30 DQ6 DQ31 DQ7 DQ16 DQ8 DQ17 DQ9
DQ18 DQ10 DQ19 DQ11 DQ20 DQ12 DQ21 DQ13 DQ22 DQ14 DQ23 DQ15 DQ8 DQ16 DQ9 DQ17 DQ10 DQ18 DQ11 DQ19 DQ12 DQ20 DQ13 DQ21 DQ14 DQ22 DQ15 DQ23 DQ0 DQ24 DQ1 DQ25 DQ2 DQ26 DQ3 DQ27 DQ4 DQ28 DQ5 DQ29 DQ6 DQ30 DQ7 DQ31
VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ
VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ
A4 A2 B4 B2 E4 E2 F4 F2 A11 A13 B11 B13 E11 E13 F11 F13 U11 U13 T11 T13 N11 N13 M11 M13 U4 U2 T4 T2 N4 N2 M4 M2
B1 D1 F1 M1 P1 T1 G2 L2 B3 D3 F3 H3 K3 M3 P3 T3 E5 N5 E10 N10 B12 D12 F12 H12 K12 M12 P12 T12 G13 L13 B14 D14 F14 M14 P14 T14
A1 C1 E1 N1 R1 U1 H2 K2 A3 C3 E3 N3 R3 U3 C4 R4 F5 M5 F10 M10 C11 R11 A12 C12 E12 N12 R12 U12 H13 K13 A14 C14 E14 N14 R14 U14
FBC_D32 <28> FBC_D33 <28> FBC_D34 <28> FBC_D35 <28> FBC_D36 <28> FBC_D37 <28> FBC_D38 <28> FBC_D39 <28> FBC_D40 <28> FBC_D41 <28> FBC_D42 <28> FBC_D43 <28> FBC_D44 <28> FBC_D45 <28> FBC_D46 <28> FBC_D47 <28> FBC_D48 <28> FBC_D49 <28> FBC_D50 <28> FBC_D51 <28> FBC_D52 <28> FBC_D53 <28> FBC_D54 <28> FBC_D55 <28> FBC_D56 <28> FBC_D57 <28> FBC_D58 <28> FBC_D59 <28> FBC_D60 <28> FBC_D61 <28> FBC_D62 <28> FBC_D63 <28>
+1.35VSDGPU+1.35VSDGPU
5 x 22uF (0603 X6S) 2 GND/PWR vias for each cap
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. T HIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL EL ECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
3
MAY BE USED BY OR DISCLOSED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
N17E-GDDR5_C
N17E-GDDR5_C
N17E-GDDR5_C
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
1
34 73Friday, March 31, 2017
34 73Friday, March 31, 2017
34 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 31
A
1 1
B
CSSN_B+<65>
CSSP_B+<65>
CSSN_NVVDD<65>
CSSP_NVVDD<65>
CSSN_NVVDDS<67>
CSSP_NVVDDS<67>
1 2
RG137 10_0402_1%
RG140 10_0402_1%
1 2
1 2
RG142 10_0402_1%
RG145 10_0402_1%
1 2
1 2
RG146 10_0402_1%
RG150 10_0402_1%
1 2
C
2
CG311
1
2
CG312
1
2
CG313
1
VIN1N
10U_0603_6.3V6 M
VIN1P
VIN2N VIN2P
VIN3N VIN3P
12
10U_0603_6.3V6 M
10U_0603_6.3V6 M
12
RG147
RG148
665K_0402_1%
665K_0402_1%
D
+3VSDGPU
12
RG139
RG138
1.8K_0402_1%
1.8K_0402_1%
I2CC_SC L<25>
12
I2CC_SD A<25>
RG149
665K_0402_1%
12
UG18
4
VS
11
IN-1
12
IN+1
14
IN-2
15
IN+2
1
IN-3
2
IN+3
6
SCL
7
SDA
INA3221 AIRGVR_V QFN16_4X 4
E
1
2
CG310
0.1U_0201_10V6 K
VPU
TC
PV
Critical
Warning
A0
GND
ThermalPad
16
13
10
9
RG143 0_0402_5%
8
5 3 17
1 2
12
RG144 10K_0402_1%
F
+3VSDGPU
12
RG141 10K_0402_1%
MESS138 W-G_SOT32 3-3
+1.8VSDGPU_AON
G
123
D
S
QG17
G
OC_WAR N# < 25>
H
2 2
DG8
GND
B
RG151
6
5
3
2
BAV70W_SOT323-3
1
CG315
0.1U_0201_10V6 K
2
+3VSDGPU
1
CG316
2
1
10U_0603_6.3V6 M
1V8_AON_EN
1
CG317
0.1U_0201_10V6 K
2
12
RG155 100K_0402_5%
+1.8V level
C
NVVDD2_EN<25,63,67>
QG18A
PJT138KA_SOT363-6
5
DGPU_PWR_EN<21,25>
1.35VSDGPU_PG<62>
3 3
+1.8VSDGPU_AON
5
DGPU_PWR_EN
1.8VSDGPU_MAIN _EN
CG314
1U_0402_6.3V6 K
4 4
1
2
1
2
+5VALW
3VSDGPU_EN_R
0.1U_0201_10V6 K
A
UG19
IN B
VCC
3VSDGPU_EN_1 3VSDGPU_EN_R
4
OUT Y
IN A
GND
NL17SZ08DFT2G_SC70-5
3
+3VS/+3VSDGPU
+3VS
CG319
UG20
1
VIN1
2
VIN2
7
VIN thermal
3
VBIAS
4
ON
1
AOZ1334DI-01_DFN8-7_3X3
2
10K_0402_5%
1 2
VOUT
+1.8VS to +1.8VSDGPU_AON & +1.8VSDGPU_MAIN
1.8VSDGPU_MAIN _EN<25>
+5VS
G
RG193 100K_0402_5%
1 2
NVVDD2_EN#
34
D
S
D
+1.0VSDGPU
1 2
61
G
2
+NVVDD2
12
13
2
G
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RG179
2.2K_0402_5%
0.1U_0201_10V6 K
RG192 20_0402_5%
D
QG18B
S
PJT138KA_SOT363-6
RG197 1_0603_5%
D
QG21 L2N7002WT1G_S C-70-3
S
SB00001GE00
+1.8VSDGPU_AON
12
+5VS
CG337
+1.8VS
1V8_AON_EN
1
2
+1.8VS
12
22U_0603_6.3V6 M
CG339
UG27
1
VIN1
2
VIN1
3
ON1
4
VBIAS
5
ON2
6
VIN2
7
VIN2
EM5209VF_DFN14_2X3
VOUT1 VOUT1
CT1
GND
CT2
VOUT2 VOUT2
GPAD
14 13
12
11
10
9 8
15
For Power down sequence
+5VS
RG195 100K_0402_5%
1 2
1.35VSDGPU_EN #
61
DMN65D8LDW-7_SOT363-6
1.35VSDGPU_EN<2 5,62>
+3.3V level
Compal Secret Data
Compal Secret Data
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
E
Compal Secret Data
QG19A
2
Deciphere d Date
Deciphere d Date
Deciphere d Date
F
CG335 220P_0402_50V7K
1 2
CG336 220P_0402_50V7K
1 2
10U_0603_6.3V6 M
1
2
+1.35VSDGPU
R40 20_0402_5%
1 2
34
QG19B DMN65D8LDW-7_SOT363-6
5
+1.8VSDGPU_MAIN+1.8VS
CG338
+1.8VSDGPU_AON
10U_0603_6.3V6 M
CG334
1
2
1
CG935
0.1U_0201_10V6 K
NVVDD1_EN<25,64>
@
PJT138KA_SOT363-6
2
RG196
100K_0402_5%
QG20A
5
0.1U_0201_10V6 K
+1.8V level
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
GPU power control
GPU power control
GPU power control
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
G
@
+5VS
PJT138KA_SOT363-6
1 2
NVVDD1_EN#
34
D
G
S
CG936
+1.8VSDGPU_AON+1.8VSDGPU_M AIN
1
2
+NVVDD1
12
RG194 1_0603_5%
QG20B
61
D
G
2
S
of
35 73Friday, March 31, 2017
of
35 73Friday, March 31, 2017
of
35 73Friday, March 31, 2017
H
1.A
1.A
1.A
VGA DC inferface
Page 32
A
LCD POWER CIRCUIT
CX2
1 1
1U_0402_6.3V6K
1
2
PCH_ENVDD<18>
12
RX1
100K_0402_5%
@
5
4
B
UX1
IN
EN
SY6288C20AAC_SOT23-5
OUT
GND
1
2
3
OC
W=6 0m il s
1
CX3
2
10U_0402_6.3V6M
1
CX4
0.1U_0201_10V6K
2
@
C
SM01000EJ00 3000ma 220ohm@100m hz DCR 0.04
+INVPWR_B++19VB_CPU+LCDVDD+3VS
W=6 0m il s W=6 0m il s
LX1
EMI@
HCB2012KF-221T30_080 5
1 2
1
CX5
68P_0402_50V8J
XESD@
2
1
CX6 1000P_0402_50V7K
EMI@
2
D
Place closed to JEDP1
+3VS
CX7
1
2
0.1U_0201_10V6K
+LCDVDD
@
CX8
E
1
2
1
CX1
2
0.1U_0201_10V6K
10U_0402_6.3V6M
RX3 0_0402_5%
1 2
PCH_EDP_HPD<19>
2 2
PCH_BKL_PWM<18>
BKOFF#<45>
PCH_BKL_PWM
BKOFF#
@
CX9 220P_0402_50V7 K
CX10 220P_0402_50V7 K
RX5 10K_0402_5%@
USB Touch Screen
+5VS
+3VS
1 2
3 3
RX6 0_0603_5%@
1 2
RX7 0_0603_5%
Camera
USB20_N9<17>
USB20_P9<17 >
USB20_P9
12
XESD@
1 2
XESD@
1 2
1 2
1 2
RX8 0_0402_5%@
1 2
RX9 0_0402_5%@
EDP_HPD
RX4
100K_0402_5%
+TS_PWR
USB20_N9_CAMERAUSB20_N9
USB20_P9_CAMERA
+TS_PWR
+3VS
DMIC_CLK_R
DMIC_DATA_R
2
DX1 YSLC05CH_SOT23-3
XESD@
W=6 0m il s
W=6 0m il s
PCH_BKL_PWM
BKOFF# EDP_HPD
EDP_AUXN_C EDP_AUXP_C
EDP_TXP0_C EDP_TXN0_C
EDP_TXP1_C EDP_TXN1_C
EDP_TXP2_C EDP_TXN2_C
EDP_TXP3_C EDP_TXN3_C
USB20_P8 USB20_N8
TS_EN
USB20_N9_CAMERA USB20_P9_CAMERA
DMIC_CLK_R DMIC_DATA_R
+INVPWR_B+
+LCDVDD
EDP_AUXN<7 > EDP_AUXP<7>
EDP_TXP0<7>
EDP_TXN0<7 >
EDP_TXP1<7>
EDP_TXN1<7 >
EDP_TXP2<7>
EDP_TXN2<7 >
EDP_TXP3<7>
EDP_TXN3<7 >
EDP_AUXN EDP_AUXP
EDP_TXP0 EDP_TXN0
EDP_TXP1 EDP_TXN1
EDP_TXP2 EDP_TXN2
EDP_TXP3 EDP_TXN3
Tou c h Screen
For Camera
1 2
CX20 0.1U_0201_1 0V6K
1 2
CX19 0.1U_0201_1 0V6K
1 2
CX11 0.1U_0201_1 0V6K
1 2
CX12 0.1U_0201_1 0V6K
1 2
CX13 0.1U_0201_1 0V6K
1 2
CX14 0.1U_0201_1 0V6K
1 2
CX15 0.1U_0201_1 0V6K
1 2
CX16 0.1U_0201_1 0V6K
1 2
CX17 0.1U_0201_1 0V6K
1 2
CX18 0.1U_0201_1 0V6K
USB20_P8<17> USB20_N8<17>
TS_EN<45 >
DMIC_CLK_R<46> DMIC_DATA_R<46 >
3
LED PANEL Conn.
JEDP1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
ACES_50398-04041-00 1
CONN@
SP010013I00
41
G1
42
G2
43
G3
44
G4
45
G5
1
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
eDP CONN.
eDP CONN.
eDP CONN.
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
36 73Friday, March 31, 2017
36 73Friday, March 31, 2017
36 73Friday, March 31, 2017
1.A
of
of
of
Page 33
A
1 2
GPU_HDMI_TXCP<26>
1 1
2 2
3 3
GPU_HDMI_TXCN<26>
GPU_HDMI_TX0P<26> GPU_HDMI_TX0N<26>
GPU_HDMI_TX1P<26> GPU_HDMI_TX1N<26>
GPU_HDMI_TX2P<26> GPU_HDMI_TX2N<26>
GPU_HDMI_C_TXCP HDMI_R_CK+
XEMI@
CY26
3.3P_0402_50V8
GPU_HDMI_C_TXCN
GPU_HDMI_C_TX0P HDMI_R_D0+
GPU_HDMI_C_TX0N HDMI_R_D0-
GPU_HDMI_C_TX1P HDMI_R_D1+
GPU_HDMI_C_TX1N
GPU_HDMI_C_TX2P HDMI_R_D2+
GPU_HDMI_C_TX2N HDMI_R_D2-
RY24
1M_0402_5%
HDMI_HPD_PCH<19,25 >
1 2
CY22 .1U_0402_16V7K CY24 .1U_0402_16V7K
CY16 .1U_0402_16V7K CY17 .1U_0402_16V7K
CY18 .1U_0402_16V7K CY19 .1U_0402_16V7K
CY20 .1U_0402_16V7K CY21 .1U_0402_16V7K
RY15 6.04_0402_1%
1 2
RY14 6.04_0402_1%
RY16 6.04_0402_1%
RY17 6.04_0402_1%
RY18 6.04_0402_1%
RY19 6.04_0402_1%
RY20 6.04_0402_1%
RY22 6.04_0402_1%
+3VS+3VS
QY2A DMN65D8LDW-7_SOT363 -6
2
61
1 2
1 2 1 2
1 2 1 2
1 2 1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
RY11 design guide rev2.0 use 20K pull down.
1 2
+1.8VSDGPU_AON
5
QY1A
4 4
GPU_HDMI_CTRLCLK<26>
GPU_HDMI_CTRLDAT<26>
PJT138KA_SOT363-6
34
SGD
QY1B
PJT138KA_SOT363-6
2
G
61
S
D
3ohm/10pF
A
HDMI_HPD
RY11
100K_0402_5%
HDMI_SCLK
HDMI_SDATA
B
B
GPU_HDMI_C_TXCP GPU_HDMI_C_TXCN
GPU_HDMI_C_TX0P GPU_HDMI_C_TX0N
GPU_HDMI_C_TX1P GPU_HDMI_C_TX1N
GPU_HDMI_C_TX2P GPU_HDMI_C_TX2N
HDMI_R_CK-
HDMI_R_D1-
GPU_HDMI_C_TXCN GPU_HDMI_C_TXCP GPU_HDMI_C_TX0N GPU_HDMI_C_TX0P
GPU_HDMI_C_TX1N GPU_HDMI_C_TX1P GPU_HDMI_C_TX2N GPU_HDMI_C_TX2P
+HDMI_5V_OUT
C
RPY2
1 8 2 7 3 6 4 5
499_0804_8P4R_1%
1 8 2 7 3 6 4 5
499_0804_8P4R_1%
HDMI_HPD
HDMI_SDATA
HDMI_GND
RPY3
+3VS
HDMI_R_CK- HDMI_R_CK-
HDMI_R_CK+ HDMI_R_CK+
HDMI_R_D0- HDMI_R_D0-
HDMI_R_D0+ HDMI_R_D0+
HDMI_R_D1- HDMI_R_D1-
HDMI_R_D1+ HDMI_R_D1+
HDMI_R_D2- HDMI_R_D2-
HDMI_R_D2+ HDMI_R_D2+
5
DY2
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
ESD@
DY3
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
ESD@
DY1
6
I/O4
5
VDD
4
I/O3
AZC099-04S.R7G_SOT23-6
ESD@
34
QY2B
DMN65D8LDW-7_SOT363 -6
9
10
8
9
7
7
6
6
9
10
8
9
7
7
6
6
3
I/O2
2
GND
1
I/O1
D
HDMI_SCLK
P/N: SC300 002900, S DIO( BR) AZC199-04 S.R7G SOT23- 6 ESD
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
E
W=4 0m il s
+5VS +HDMI_5V_OUT
UY2
3
1
IN
AP2330W-7_SC59 -3
+HDMI_5V_OUT
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
OUT
2
GND
HDMI_SDATA HDMI_SCLK GPU_HDMI_CTRLCLK GPU_HDMI_CTRLDAT
HDMI_HPD
HDMI_SDATA HDMI_SCLK
HDMI_R_CK-
HDMI_R_CK+ HDMI_R_D0-
HDMI_R_D0+ HDMI_R_D1-
HDMI_R_D1+ HDMI_R_D2-
HDMI_R_D2+
ZZZ2
HDMI_ROYALTY
ROYALTY HDMI W/LOGO+HDCP
RO0000003HM
45@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
CY23
0.1U_0201_10V6K
2
+HDMI_5V_OUT
RPY1
18 27 36 45
2.2K_0804_8P4R_5%
HDMI connector
JHDMI1
19
HP_DET
18
+5V
17
DDC/CEC_GND
16
SDA
15
SCL
14
Reserved
13
CEC
12
CK-
11
CK_shield
10
CK+
9
D0-
8
D0_shield
7
D0+
6
D1-
5
D1_shield
4
D1+
3 2 1
CCM_C100042GR019M298Z L
CONN@
HDMI CONN.
HDMI CONN.
HDMI CONN.
GND
D2-
GND
D2_shield
GND
D2+
GND
DC232003500
E
+1.8VSDGPU_AON
20 21 22 23
37 73Friday, March 31, 2017
37 73Friday, March 31, 2017
37 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 34
A
LAN-RTL8411B
RL2
@
0_0805_5%
1 2
1 1
60m il
CL14
1U_0402_6.3V6 K
2
1
UL1
@
5
IN
4
EN
SY6288C20AAC_SOT23-5
LAN_PWR_EN
OUT
GND
OC
From EC
High activ e. EN threshold voltage min:1.2V typ:1.6V max:2.0V Current limit threshold 1.5~2.8A
+3V_LAN Risin g time must >0.5ms and <100ms
+3VS
12
RL15 1K_0402_5%
SWR mode
1 2
1 2
RL18 15K_0402_5%
1 2
ISOLATEB
2 2
+3V_LAN
RL11 0_0402_5%SWR@
RL13 0_0402_5%LDO@
LDO mode
+3V_LAN
1 2
RL12 10 K_0402_5%@
YL1
3 3
CL18
15P_0402_50V8 J
25MHZ_20PF_XR CGB25M000F2P18R0
3
XTLI
3
1
2
1
NC
NC
2
4
P/N: SJ10000UP00 (S CRYSTAL 25MHZ 10PF XRCGB25M000F2P34R0)
TL1
LAN_TERMAL
1
TCT1
LAN_MIDI0+
LAN_MIDI1+ LAN_MIDI1-
LAN_MIDI2+ LAN_MIDI2-
LAN_MIDI3+
4 4
0.1U_0201_10V6 K
1
CL25
2
Place close to TCT pin
2
TD1+
3
TD1-
4
TCT2
5
TD2+
6
TD2-
7
TCT3
8
TD3+
9
TD3-
10
TCT4
11
TD4+
12
TD4-
GST5009- E
SP050006B10
A
MCT1 MX1+
MX1-
MCT2 MX2+
MX2-
MCT3 MX3+
MX3-
MCT4 MX4+
MX4-
+3V_LAN+3VALW
1
2
3
ENSWREG ENSWREG
XTLO_R
1
24 23 22
21 20 19
18 17 16
15 14 13
60m il
LAN_PWR_EN <45>
GPO
1
CL19 15P_0402_50V8 J
2
182736
45
RPL1 75_0804_8P4R_1 %
RJ45_GND
RJ45_MIDI0+ RJ45_MIDI0-LAN_MIDI0-
RJ45_MIDI1+ RJ45_MIDI1-
RJ45_MIDI2+ RJ45_MIDI2-
RJ45_MIDI3+ RJ45_MIDI3-LAN_MIDI3-
LAN_CLKREQ#<20>
PCIE_PRX_DTX_P4<17> PCIE_PRX_DTX_N4<17>
B
LDO mode
W=60mil
+REGOUT
1
2
RL1 0_0603_5%LDO@
SWR@
1 2
LL1
2.2UH_HPC252 012NF-2R2M_20%
Using for Switch mod e
CL1
0.1U_0201_10V6 K
The trace length fro m Lx to PIN48 (REGOUT)
LDO@
and from C to Lx must < 200mils.
11/27: P/N change to SH00000RT00 ( S COIL 2.2UH +-20% HPC252012NF-2R2M 1.3A)
reserve EC_PME# pull high 100K to +3VALW _EC
EC_PME#<18,45 >
+3V_LAN
PLT_RST_BUF#<18,40,43>
B
1 2
RL5 10 K_0402_5%
CLK_PCIE_LAN<20> CLK_PCIE_LAN#<20>
1 2
CL15 .1U_0402_16V7K
1 2
CL17 .1U_0402_16V7K
PCIE_PTX_C_DRX_P4<17> PCIE_PTX_C_DRX_N4<17>
RL14
1K_0402_5%
XTLO_R
1 2
RL16
2.49K_0402_1%
LAN_GPO<19>
for disable PHY reserve 0 ohm
RJ45_MIDI3-
RJ45_MIDI3+
RJ45_MIDI1-
RJ45_MIDI2-
RJ45_MIDI2+
RJ45_MIDI1+
RJ45_MIDI0-
RJ45_MIDI0+
C
12
IDC=1 200 mA
CL28
0.1U_0201_10V6 K
4.7U_0402_6.3V6 M CL2
1
1
2
SWR@
SWR@
2
CL3
0.1U_0201_10V6 K
0.1U_0201_10V6 K
1
1
2
2
W=60mil
300m A
CL5
0.1U_0201_10V6 K
CL6
CL4
0.1U_0201_10V6 K
1
1
2
2
1
2
CL7
0.1U_0201_10V6 K
+LAN_VDD
CL8
1U_0402_6.3V6 K
1
2
Place near Pin 20Place near Pin 3,8,33,46
PVT modify 01/06
UL2
Power Manaheme nt/Isolation
GPO
31 39
23 24
30 29
25 26 21 22
1 2 4 5 6 7 9
10
44 45
36 35 34 46
47
41 38 37 40
ISOLATEB PIN LANWAKEB
PCI-E xpre ss
REFCLK_P REFCLK_N
PERSTBPIN CLKREQBPIN
HSOP HSON HSIP HSIN
Transceiver Interface
MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3
CKXTAL1
Clock
CKXTAL2
Regulator and Reference
REG_OUT VDDREG ENSWREG_H AVDD10
RSET
LED0 LED1/GPO
LEDs
LED3 LED_CR
Card Reader
SD_D0/MS_D1
SD_D1
SD_CLK/MS_D0
SD_CMD/MS_D2
SD_D3/MS_D3
SD_D2/MS_CLK
SD_WP/MS_BS
SD_CD#
MS_CD#
AVDD33 AVDD33 DVDD33 DVDD33
DVDD10 AVDD10 AVDD10
EVDD10
Card_3V3
DV33/18
E_Pad
ISOLATEB LAN_PME#
12
RL30_0402_5% @
CLK_PCIE_LAN CLK_PCIE_LAN#
PLT_RST_BUF# LAN_CLKREQ#
PCIE_PRX_C_DTX_P4 PCIE_PRX_C_DTX_N4
LAN_MIDI0+ LAN_MIDI0­LAN_MIDI1+ LAN_MIDI1­LAN_MIDI2+ LAN_MIDI2­LAN_MIDI3+ LAN_MIDI3-
XTLI XTLO
+REGOUT
+3V_LAN
+LAN_VDD +CARD_3V3
12
LAN_RST
T45@
1 2
@
RL17 0_0402_5%
T46@ T47@
R2534, R2537, R2539, R2535, R2536 change to R-short
15 14
SD_CLK SD_CLK_R
16
SD_CMD SD_CMD_R
17 18 19
SD_WP
28
SD_CD#
42 43
48 11 12 32
33 3 8
20
13
+VDD33_18
27
0.1U_0201_10V6 K
CL20
49
D
+3V_LAN
1
2
Using for Switch mod e
The trace length from C to PIN34,35(V DDREG ) must < 200mils.
1 2
RL6 0_0402_5%@
1 2
RL7 0_0402_5%@
1 2
RL4 10_0402_1%
1 2
RL8 0_0402_5%@
1 2
RL9 0_0402_5%@
1 2
RL10 0_0402_5%@
+3V_LAN
1400mA
+LAN_VDD
300mA
800mA
4.7U_0402_6.3V6 M
CL21
1
1
@
2
2
W=60mil
1.4A
0.1U_0201_10V6 K
CL9
1
2
Card Uninsert
Card insert
1
CL22
0.1U_0201_10V6 K
2
CL10
4.7U_0402_6.3V6 M
SWR@
Place near Pin 27
LAN Connector
JRJ45
8
PR4-
7
PR4+
6
PR2-
5
PR3-
4
PR3+
3
PR2+
2
PR1-
1
PR1+
SINGA_2RJ1660-000111F
CONN@
DC234009H00
RTL8411 B-CGT_QF N48_6X 6
+3VS+3V_LAN
12
GND
11
GND
10
9
LANGND
Issued Da te
Issued Da te
Issued Da te
C
LANGND
B88069X9231T203_4P5X3P2-2
12
GND
GND
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
RL21
100K_0402_5%
SD_WP#
CL26 10P_0402_50V8 J
3
JP1
XEMI@
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
1 2
1 2
12
2
MESC5V02 BD03_SOT23 -3
DL1
ESD@
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
RL20 100K_0402_5%@
2
G
40m il40m il
RJ45_GND
Deciphere d Date
Deciphere d Date
Deciphere d Date
SD_WP
13
D
QL1 L2N7002WT1G_S C-70-3
S
SB00001GE00
@
JPL1 JUMP_43X118
+CARD_3V3
Close to Card Reader CONN
4.7U_0402_6.3V6 M CL23
1
2
D
E
0.1U_0201_10V6 K
0.1U_0201_10V6 K
CL11
1
2
0.1U_0201_10V6 K
CL12
CL13
1
1
2
2
Place near Pin 11,32,48
SD_D0_RSD_D0 SD_D1_RSD_D1
SD_D3_RSD_D3 SD_D2_RSD_D2
2
CL16 5P_0402_50V8C
1
XEMI@
close to pin17
Protect cotact
Write protect (Lock)
Open Open Open
Write Enable (Unlock)
Close
Card contact
Open Close
Card Reader Connector
JSD1
6
SD_CMD_R
0.1U_0201_10V6 K
SD_CLK_R
CL24
1
SD_D0_R SD_D1_R
2
SD_D2_R SD_D3_R
SD_WP# SD_CD#
RL19
SD_CLK_R
0_0402_5%
1 2
Close to JREAD1 for EMI
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VDD
3
CMD
7
CLK
5
VSS1
8
VSS2
9
DAT0
10
DAT1
1
DAT2
2
CD/DAT3
11
W/P
4
CD
TAITW_PSDATQ09GLBS1NN 4H1
CONN@
SP011611110
XEMI@
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
CL27
XEMI@
10P_0402_50V8 J
1 2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
LAN RTL8411H
LAN RTL8411H
LAN RTL8411H
E
GND GND
12 13
1.A
1.A
38 73Friday, March 31, 2017
38 73Friday, March 31, 2017
38 73Friday, March 31, 2017
1.A
of
of
of
Page 35
A
B
C
D
E
To USB/B FPC BTB CONN
HPOUT_L_1<46> HPOUT_R_1<46> SLEEVE<46> RING2<46> HP_PLUG#<46>
1 1
BATT_AMB_LED#<45>
BATT_BLUE_LED#<45>
PWR_SUSP_LED#<45>
2 2
GNDA
USB20_P5<17> USB20_N5<17>
USB20_P6<17> USB20_N6<17>
PWR_LED#<45>
USB_EN<45>
+5VALW
HPOUT_L_1 HPOUT_R_1
SLEEVE RING2
HP_PLUG#
USB20_P5 USB20_N5
USB20_P6 USB20_N6
BATT_AMB_LED# BATT_BLUE_LED# PWR_SUSP_LED# PWR_LED#
USB_EN
JIO2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
GND
28
GND
ACES_51522-02601-00 1
CONN@
SP01001AO00
GNDA
+5VALW
+3VALW
USB3_PRX_DTX_N5<17> USB3_PRX_DTX_P5<17 >
USB3_PTX_DRX_N5<17> USB3_PTX_DRX_P5<17 >
SUB_DET<21>
HPOUT_L_1 HPOUT_R_1
SLEEVE RING2
HP_PLUG#
USB20_P5 USB20_N5
USB20_P6 USB20_N6
BATT_AMB_LED# BATT_BLUE_LED# PWR_SUSP_LED# PWR_LED#
USB_EN
USB3_PRX_DTX_N5 USB3_PRX_DTX_P5
USB3_PTX_DRX_N5 USB3_PTX_DRX_P5
SUB_DET
JIO3
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
G1
37
37
G2
38
38
G3
39
39
G4
40
40
G5
ACES_50398-04041-00 1
CONN@
SP010013I00
To Hall sensor/B
+3VLP
JHS1
1
LID_SW#<4 5>
41 42 43 44 45
LID_SW#
1
2
2
3
3
4
4
5
GND
6
GND
ACES_51524-0040N-001
CONN@
SP010022M0 0
3 3
+3VS
4 4
A
+3VS
0.1U_0201_10V6K
1
TMS@
2
1 2
TMS@
CF11 2200P_0402_50V7 K
1 2
RF7 10K_0402_5 %TMS@
THERMAL SENSOR
Thermal sensor SMBus address
-->100-1_100xb : 0x4C
CF4
H_THERMDA
H_THERMDC
CPU_THERM#
(x=0)Write Address(0x98h) (x=1)Read Address(0x99h)
UF1
1
2
3
NCT7718W_MSOP8
TMS@
B
SA000067P00
VDD
SCLK
D+
SDATA
ALERT#
D-
THERM#4GND
THERMAL_ALERT#
EC_SMB_CK2
8
EC_SMB_DA2
7
THERMAL_ALERT#
6
5
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EC_SMB_CK2 <19,25,45>
EC_SMB_DA2 <19,25,45>
THERMAL_ALERT# <45>
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
C
+3VS
12
RF8
TMS@
10K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
FUN/B & LED/B
FUN/B & LED/B
FUN/B & LED/B
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
39 73Friday, March 31, 2017
39 73Friday, March 31, 2017
39 73Friday, March 31, 2017
1.A
of
of
of
Page 36
5
+3VS_SSD_NGFF+3VS
RM1
@
0_0805_5%
1 2
CM1
D D
4
10U_0603_6.3V6M
0.1U_0201_10V6K
1
CM2
2
1
2
+
CM3 150U_6.3V_M_D2
SGA00009000
2
1
3
+3VS_SSD_NGFF
2
1
M.2 SSD
JSSD1
1
GND
3
PCIE_PRX_DTX_N12<18> PCIE_PRX_DTX_P12<18>
PCIE_PTX_DRX_N12<18>
PCIE_PTX_DRX_P12<18>
PCIE_PRX_DTX_N11<18> PCIE_PRX_DTX_P11<18>
PCIE_PTX_DRX_N11<18>
PCIE_PTX_DRX_P11<18>
PCIE_PRX_DTX_N10<18> PCIE_PRX_DTX_P10<18>
PCIE_PTX_DRX_N10<18>
PCIE_PTX_DRX_P10<18>
PCIE_PRX_DTX_P9<18>
C C
PCIE_PRX_DTX_N9<18 >
PCIE_PTX_DRX_N9<18 >
PCIE_PTX_DRX_P9<18>
CLK_PCIE_NGFF#<20> CLK_PCIE_NGFF<20>
Pull high at PCH side
QM1
13
D
S
1 2
0_0402_5%
G
SATA_GP0<18>
B B
BSS138W-7-F_SOT323 -3
@
1 2
CM6 0.22U_0402_16V7K
1 2
CM4 0.22U_0402_16V7K
1 2
CM5 0.22U_0402_16V7K
1 2
CM7 0.22U_0402_16V7K
1 2
CM8 0.22U_0402_16V7K
1 2
CM9 0.22U_0402_16V7K
1 2
RM3 0_0402_5%@
1 2
RM5 0_0402_5%@
1 2
CM10 0. 22U_0402_16V7K
1 2
CM11 0. 22U_0402_16V7K
+3VS_SSD_NGFF
RM9
@
10K_0402_5%
1 2
RM10
@
SSD_DET#
2
SSD_DET# SATA Device 0 PCIE Device 1
PCIE_PRX_DTX_N12 PCIE_PRX_DTX_P12
PCIE_PTX_C_DRX_N12 PCIE_PTX_C_DRX_P12
PCIE_PRX_DTX_N11 PCIE_PRX_DTX_P11
PCIE_PTX_C_DRX_N11 PCIE_PTX_C_DRX_P11
PCIE_PRX_DTX_N10 PCIE_PRX_DTX_P10
PCIE_PTX_C_DRX_N10 PCIE_PTX_C_DRX_P10
PCIE_PRX_R_DTX_P9 PCIE_PRX_R_DTX_N9
PCIE_PTX_C_DRX_N9 PCIE_PTX_C_DRX_P9
SSD_DET#
GND
5
PERn3
7
PERp3
9
GND
11
PETn3
13
PETp3
15
GND
17
PERn2
19
PERp2
21
GND
23
PETn2
25
PETp2
27
GND
29
PERn1
31
PERp1
33
GND
35
PETn1
37
PETp1
39
GND
41
PERn0/SATA-B+
43
PERp0/SATA-B-
45
GND
47
PETn0/SATA-A-
49
PETp0/SATA-A+
51
GND
53
REFCLKN
55
REFCLKP
57
GND
59
NC
61
PEDET(NC-PCIE/GND-SATA)
63
GND
65
GND
67
GND
BELLW_80159-32 21
CONN@
SP070018L00
SUSCLK(32kHz)
3P3VAUX 3P3VAUX
DAS/DSS#
3P3VAUX 3P3VAUX 3P3VAUX 3P3VAUX
DEVSLP
PERST#
CLKREQ#
PEWake#
3P3VAUX 3P3VAUX 3P3VAUX
GND1 GND2
2 4 6
NC
8
NC
10 12 14 16 18 20
NC
22
NC
24
NC
26
NC
28
NC
30
NC
32
NC
34
NC
36
NC
38 40
NC
42
NC
44
NC
46
NC
48
NC
50 52 54 56
NC
58
NC
60 62 64 66
68 69
NGFF_SSD_RST#_R
Place close to JSSD pin 50
ESD request to reserve.
NGFF_SSD_RST#_R NGFF_CLKREQ#_R
SUSCLK_SSD
+3VS_SSD_NGFF
1 2
RM2 0_0402_5%@
1 2
RM4 0_0402_5%@
1 2
RM6 0_0402_5%@
1 2
RM7 0_0402_5%@
1 2
RM8 0_0402_5%@
ESD@
CM16 100P _0402_50V8J
12
SSD_DEVSLP0 <17>
PLT_RST_BUF# <18,38,43> NGFF_CLKREQ# <20 >
SUSCLK <19,43>
A A
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
2016/12/15 2017/12/15
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
mSATA-SSD
mSATA-SSD
mSATA-SSD
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
1.A
1.A
40 73Friday, March 31, 2017
40 73Friday, March 31, 2017
40 73Friday, March 31, 2017
1.A
of
of
of
Page 37
A
USB3.0
USB3_PTX_C_DRX_P2
USB3_PTX_DRX_P2<17>
USB3_PTX_DRX_N2<17>
1 1
USB3_PRX_DTX_P2<17>
USB3_PRX_DTX_N2<17>
USB_CB<45>
2 2
USB20_N2<17> USB20_P2<17>
+5VALW
1 2
CS2 .1U_0402_16V7K
1 2
CS3 .1U_0402_16V7K
RS93
USB20_N2 USB20_P2
.1U_0402_16V7K
USB20_N2 USB20_P2
USB3_PTX_C_DRX_N2
USB3_PRX_DTX_P2
USB3_PRX_DTX_N2
0_0402_5%
1 2
@
CHG@
CS89
1 2
RS96 0_0402_5%NCHG@
1 2
RS97 0_0402_5%NCHG@
1
2
RS86 0_ 0402_5%@
RS89 0_ 0402_5%@
RS90 0_ 0402_5%@
RS91 0_ 0402_5%@
US10
CHG@ 8 7 6 5
SLG55594AVTR_TDFN8_2X2
SA00006L600
CB TDM TDP VDD
CEN
SELCDP
Thermal Pad
USB20_N2_R USB20_P2_R
DM
DP
1 2
1 2
1 2
1 2
1 2 3 4 9
RS98 0_0402_5%NCHG@ RS99 0_0402_5%NCHG@
B
USB_CEN
U2DN2 U2DP2
1 2 1 2
USB3_PTX_L_DRX_P2
USB3_PTX_L_DRX_N2
USB3_PRX_L_DTX_P2
USB3_PRX_L_DTX_N2
+3VLP
12
CHG@
RS94 10K_0402_5%
1 2
RS95 10K_0402_5%
USB_CEN <45>
@
USB_SELCDP <45>
U2DN2 U2DP2
USB3_PTX_L_DRX_P2
USB3_PTX_L_DRX_N2
USB3_PRX_L_DTX_P2
USB3_PRX_L_DTX_N2
+USB3_VCCA
+5VALW
C
For ESD request
DS1
ESD@
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
SM070003Z00
LS1
EMI@
3 4
U2DP2
U2DN2
U2DN2_L
MCM1012B900F06BP_4P
DS2
ESD@
6
I/O4
I/O2
5
VDD
GND
4
I/O3
AZC099-04S.R7G_SOT23- 6
USB Host Charger
CB
0
1
1
I/O1
SELC DP
X
DCP(Dedicated Charging Port) autodetect with mouse/keyboa rd wakeup
0
S0 charging with SDP(Standard Downstream Port) only
1
S0 charging with CDP(Charging Downstream Port) or SDP o nly
USB3_PTX_L_DRX_P2
9
10
USB3_PTX_L_DRX_N2
8
9
USB3_PRX_L_DTX_P2
7
7
USB3_PRX_L_DTX_N2
6
6
U2DP2_L
U2DN2_L
12
U2DP2_L
3
2
1
D
+5VALW
CS1
EMI@
.1U_0402_16V7K
1 2
USB_CHARGE_2A<45>
USB_CHARGE_2A
US1
5
IN
4
EN
SY6288C20AAC_SOT23-5
SA000079400
+USB3_VCCA
GND
OUT
+USB3_VCCA
1
W=60mils
2
3
OC
1 2
RS3 0_0402_5%
E
@
1
CS4
0.1U_0201_10V6K
2
@
USB_OC1# <17>
W=100mils
2
1
EMI@
+
150U_D2_6.3VM_R17M
SGA00009000
CS5
USB3_PRX_L_DTX_N2 USB3_PRX_L_DTX_P2
USB3_PTX_L_DRX_N2 USB3_PTX_L_DRX_P2
2
CS6 .1U_0402_16V7K
1
U2DN2_L U2DP2_L
USB3.0 Conn.
JUSB1
1
VBUS
2
D-
3
D+
4
GND
5
SSRX-
6
SSRX+
7
GND
8
SSTX-
9
SSTX+
ACON_TARB5-9V1391
CONN@
DC23300NH00
GND GND GND GND
10 11 12 13
3 3
4 4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPER TY OF COMPAL ELECTRO NICS, INC. AN D CONTA INS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPER TY OF COMPAL ELECTRO NICS, INC. AN D CONTA INS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING I S THE PROPRIETARY PROPER TY OF COMPAL ELECTRO NICS, INC. AN D CONTA INS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION O F R&D DEPARTMENT EXCEPT AS AUTHO RIZED BY CO MPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY CO MPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHO RIZED BY CO MPAL E LECTRONICS, INC. NEITHER THIS SHEET NOR THE INFO RMATION IT CONTAINS MAY BE USE D BY OR DIS CLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USE D BY OR DIS CLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USE D BY OR DIS CLOSED TO ANY THIRD PA RTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Do cument Nu mber Rev
Size Do cument Nu mber Rev
Size Do cument Nu mber Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
USB3.0 Conn/USB Charger
USB3.0 Conn/USB Charger
USB3.0 Conn/USB Charger
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
41 73Friday, March 31, 2017
41 73Friday, March 31, 2017
41 73Friday, March 31, 2017
1.A
of
of
of
Page 38
5
USB3.0 (Port 3)
USB3_PTX_DRX_N3<17>
USB3_PTX_DRX_P3<17>
D D
CS59
CS58
USB3_PRX_DTX_P3<17>
USB3_PRX_DTX_N3<17>
1 2
.1U_04 02_16V7K
USB3_PTX_C_DRX_P3
.1U_04 02_16V7K
USB3_PRX_DTX_P3
USB3_PRX_DTX_N3
USB3_PTX_C_DRX_N3
1 2
1 2
RS64 0_0402_5%@
1 2
RS65 0_0402_5%@
1 2
RS74 0_0402_5%@
1 2
RS76 0_0402_5%@
USB3.0 (Port 4)
USB3_PTX_C_DRX_N4
1 2
USB3_PTX_DRX_N4<17>
USB3_PTX_DRX_P4<17>
C C
+3VALW_CC
CS61
CS60
USB3_PRX_DTX_P4<17>
USB3_PRX_DTX_N4<17>
1 2
RS13 100K_0402_5%
1 2
RS14 100K_0402_5%
1 2
RS16 100K_0402_5%
1 2
RS19 100K_0402_5%
1 2
RS17 100K_0402_5%
1 2
RS18 100K_0402_5%
1 2
RS20 100K_0402_5%
1 2
RS21 100K_0402_5%@
1 2
RS22 0_0402_5%@
1 2
.1U_04 02_16V7K
USB3_PTX_C_DRX_P4
.1U_04 02_16V7K
USB3_PRX_DTX_P4
USB3_PRX_DTX_N4
CC_FAULT#
CC_LD_DET#
CC_UFP#
CC_POL#
CC_AUDIO#
CC_DEBUG#
CC_CHG
CC_CHG_HI
CC_EN
1 2
RS82 0_0402_5%@
1 2
RS83 0_0402_5%@
1 2
RS84 0_0402_5%@
1 2
RS85 0_0402_5%@
JPS1
@
112
JUMP_43X118
10U_0402_6.3V 6M
120mi ls 3A
CS11
4
USB3_PTX_L_DRX_N3
USB3_PTX_L_DRX_P3
USB3_PRX_L_DTX_P3
USB3_PRX_L_DTX_N3
USB3_PTX_L_DRX_N4
USB3_PTX_L_DRX_P4
USB3_PRX_L_DTX_P4
USB3_PRX_L_DTX_N4
+5VALW_CC+5VALW
2
1
1
+
CS12 150U_D2_6.3VM _R17M
SGA00009000
2
2
1 2
RS10 0_0603_5%
+3VALW_CC+3VALW
@
10U_0402_6.3V6 M
.1U_04 02_16V7K
1
CS7
2
2
1
USB20_P3<17>
USB20_N3<17>
0.01U_0402_16V7 K
CS9
3
+5VALW_CC_VOUT
1
CS10
2
USB20_P3
USB20_N3
1
CS8 10U_0402_6.3V 6M
2
LS10
EMI@
3 4
MCM1012B 900F06BP _4P
SM070003Z00
12
USB20_P3_L
USB20_N3_L
2
+USB3_VCCC
1
For ESD request
DS3
USB3_PTX_L_DRX_P3 USB3_PTX_L_DRX_P3
USB3_PTX_L_DRX_N3 US B3_PTX_L_DRX_N3
CC1_VCONN CC1_VCONN
TBTA_SBU1 TBTA_SBU1
USB20_P3_L US B20_P3_L
USB20_N3_L USB20_N3_L
USB3_PRX_L_DTX_N4
USB3_PRX_L_DTX_P4 USB3_PRX_L_DTX_P4
USB3_PTX_L_DRX_P4 USB3_PTX_L_DRX_P4
CC2_VCONN CC2_VCONN
ESD@
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
DS6
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
DS4
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
DS5
1
1
2
2
4
4
5
5
3
3
8
L05ESDL5V0NA-4 SLP2510P8
ESD@
ESD@
ESD@
+USB3_VCCC
10
9
7
6
10
9
7
6
10
9
7
6
10
9
7
6
9
8
7
6
9
8
USB3_PRX_L_DTX_N4
7
6
9
8
USB3_PTX_L_DRX_N4USB3_PTX_L_DRX_N4
7
6
9
TBTA_SBU2TBTA_SBU2
8
USB3_PRX_L_DTX_N3USB3_PRX_L_DTX_N3
7
USB3_PRX_L_DTX_P3USB3_PRX_L_DTX_P3
6
@
JPS2
112
JUMP_43X118
30V 10mOhm
QS1 AON64 05L 1P DFN@
4
RS39
@
10K_0402_5%
QS2A DMN65D8LDW-7_SOT363-6
34
5
@
2
+USB3_VCCC
1 2 35
RS15
@
100K_0402_5%
@
QS2B DMN65D8LDW-7_SOT363-6
120mi ls 3A
12
12
RS12 1M_0402_5%@
10U_0805_25V6K
QS1 for leakage current to connector
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
USB3_PTX_L_DRX_P3 USB3_PTX_L_DRX_N3
12
2
CS13
3
12
DS19 MESC5V0 2BD03_SOT2 3-3
1
ESD@
0.47U_0402_25V6 K
CC1_VCONN
USB20_P3_L USB20_N3_L
TBTA_SBU1
12
USB3_PRX_L_DTX_N4 USB3_PRX_L_DTX_P4
CC1_VCONN & CC2_VCONN need 20miil trace width.
Compal Secret Data
Compal Secret Data
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
2
CS840.47U_0402_25V6 K
CS86
120mi ls 3A
CC_EN
CC_CHG_HI
US2
2
IN1
3
IN1
4
IN2
5
AUX
6
7 8
10
9
12
LD_DETb
EN
CHG CHG_HI
DEBUGb
REF
GND1 GND2
powerpad
TPS25810RVCR_QFN20_4X 3
FAULTb
AUDIOb
POLb UFPb
OUT OUT
CC1 CC2
14 15
1 20
11 13
16 17 18 19
21
120mi ls 3A
+5VALW_CC_VOUT
CC_FAULT# CC_LD_DET#
CC1_VCONN CC2_VCONN
CC_DEBUG# CC_AUDIO# CC_POL# CC_UFP#
+3VALW_CC
12
61
2
4
B B
TYPEC_3A_1P5A#<19>
EC_TYPEC_EN<45>
A A
1 2
RS38 0_0402_5%@
+5VALW_CC
+3VALW_CC
1 2
@
RS37 0_0402_5%
RS23 100K_0402_1%
1 2
5
CC_CHG CC_CHG_HI
CC_REF
JTYPEC1
A1
GND
A2
SSTXP1
A3
SSTXN1
A4
VBUS
A5
CC1
A6
DP1
A7
DN1
A8
SBU1
A9
VBUS
A10
SSRXN2
A11
SSRXP2
A12
GND
1
GND
2
GND
3
GND
4
GND
LOTES_AUSB024 9-P001A
CONN@
B12
GND
SSRXP1 SSRXN1
VBUS
SBU2
DN2 DP2
CC2
VBUS
SSTXN2 SSTXP2
GND
GND GND GND GND
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal&Electronics,&Inc.
CC+USB TYPE C
CC+USB TYPE C
CC+USB TYPE C
USB3_PRX_L_DTX_P3
B11
USB3_PRX_L_DTX_N3
B10
B9
CS87 0.47U_0402_25V6K
TBTA_SBU2
B8
USB20_N3_L
B7
USB20_P3_L
B6
CC2_VCONN
B5
B4
CS85 0.47U_0402_25V6K
USB3_PTX_L_DRX_N4
B3
USB3_PTX_L_DRX_P4
B2
B1
5 6 7 8
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1
1 2
1 2
42
42
42
73Friday, March 31, 2017
73Friday, March 31, 2017
73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 39
A
Wireless LAN
B
C
D
E
1 1
2 2
(link to PICE Port 3)
PCIE X1
(From PCH CLKOUT2)
PCIE CLK
3 3
60mil W=60 mi ls
+3VS +3VS_WLAN +3VALW +3VS_WLAN
NIOAC@
1 2
RM11 0_0805_5%
CM12
4.7U_0402_6.3V6M
USB2 Port.7
(For BT)
PCIE_PTX_C_DRX_P3<17>
PCIE_PTX_C_DRX_N3<17>
PCIE_PRX_DTX_P3<17>
PCIE_PRX_DTX_N3<17>
CLK_PCIE_WLAN<20> CLK_PCIE_WLAN#<20>
WLAN_CLKREQ#<20>
WLAN_PME#<45>
+3VS_WLAN
RM16 10 K_0402_5%
1
2
USB20_P7<17> USB20_N7<17>
1
CM14
0.1U_0201_10V6K
2
12
USB20_P7 USB20_N7
PCIE_PTX_C_DRX_P3 PCIE_PTX_C_DRX_N3
PCIE_PRX_DTX_P3 PCIE_PRX_DTX_N3
CLK_PCIE_WLAN CLK_PCIE_WLAN#
WLAN_CLKREQ# WLAN_PME#
JNGFF1
1
GND_1
3
USB_D+
5
USB_D-
7
GND_7
9
SDIO_CLK
11
SDIO_CMD
13
SDIO_DAT0
15
SDIO_DAT1
17
SDIO_DAT2
19
SDIO_DAT3
21
SDIO_WAKE
23
SDIO_RST
25
GND_33
27
PET_RX_P0
29
PET_RX_N0
31
GND_39
33
PER_TX_P0
35
PER_TX_N0
37
GND_45
39
REFCLK_P0
41
REFCLK_N0
43
GND_51
45
CLKREQ0#
47
PEWAKE0#
49
GND_57
51
RSVD/PCIE_RX_P1
53
RSVD/PCIE_RX_N1
55
GND_63
57
RSVD/PCIE_TX_P1
59
RSVD/PCIE_TX_N1
61
GND_69
63
RSVD_71
65
RSVD_73
67
GND_75
69
GND2
BELLW_80152-32 21
CONN@
SP070013E00
CM15
1U_0402_6.3V6K
1
2
KEY E
@
PCM_SYNC
UART_WAKE
UART_RTS UART_CTS
CLink_DATA
SUSCLK(32KHz)
W_DISABLE2# W_DISABLE1#
3.3VAUX_72
3.3VAUX_74
WLAN_ON<45>
3.3VAUX_2
3.3VAUX_4 LED1#
PCM_CLK
PCM_OUT
PCM_IN
LED2#
GND_18
UART_TX
UART_RX
CLink_RST
CLink_CLK
COEX3 COEX2 COEX1
PERST0#
I2C_DAT I2C_CLK
I2C_IRQ RSVD_64 RSVD_66 RSVD_68 RSVD_70
GND1
2 4 6 8 10 12 14 16 18 20 22
24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66
68
+3VS_WLAN
UM1
5
IN
4
EN
SY6288C20AAC_SOT23-5
IOAC@
UART_2_CRXD_DTXD
PH +3VS at SOC side, for win7 USB3 debug
UART_2_CTXD_DRXD
E51TXD_P80DATA_R E51RXD_P80CLK_R
SUSCLK_R WL_RST#_R BT_ON WL_OFF#
1
OUT
2
GND
3
OC
T52@
T53@
UART_2_CRXD_DTXD <21>
UART_2_CTXD_DRXD <21>
RM12 0_0402_5%@ RM13 0_0402_5%@
1 2
RM14 0_0402_5%@
1 2
RM15 0_0402_5%@
E51TXD_P80DATA_R
12 12
12
RM19
100K_0402_5%
E51TXD_P80DATA <45> E51RXD_P80CLK <45>
SUSCLK <19,40> PLT_RST_BUF# <18,38,40>
BT_ON <45> WL_OFF# <45>
NGFF WL+BT (KEY E)
4 4
Security Classification
Security Classification
Security Classification
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
C
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
M.2 Key E (WLAN)
M.2 Key E (WLAN)
M.2 Key E (WLAN)
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
43 73Friday, March 31, 2017
43 73Friday, March 31, 2017
43 73Friday, March 31, 2017
1.A
of
of
of
Page 40
A
B
C
D
E
SATA Re-Driver and cable HDD Conn.
A_EQ2
A_EQ1
B_EQ1
DEW
+3VS
CO1
1 1
SATA_PTX_C_DRX_P2
12
SATA_PTX_DRX_P2<18>
SATA_PTX_DRX_N2<18>
SATA_PRX_DTX_N2<18> SATA_PRX_DTX_P2<18 >
+3VS +3VS +5V S_HDD
1 2
RO6 4.7K_04 02_5%@
1 2
RO8 4.7K_04 02_5%@
1 2
RO10 4.7K_0402_5%@
1 2
RO11 4.7K_0402_5%@
1 2
RO12 4.7K_0402_5%
1 2
2 2
RO13 4.7K_0402_5%@
1 2
RO14 4.7K_0402_5%@
1 2
RO15 4.7K_0402_5%@
1 2
RO16 4.7K_0402_5%@
1 2
RO17 4.7K_0402_5%@
1 2
RO18 4.7K_0402_5%@
1 2
RO19 4.7K_0402_5%@
1 2
RO20 4.7K_0402_5%
CO4 0.01U_040 2_16V7K CO5 0.01U_040 2_16V7K
CO8 0.01U_040 2_16V7K CO9 0.01U_040 2_16V7K
SATA_PTX_C_DRX_N2
12
SATA_PRX_C_DTX_N2
12
SATA_PRX_C_DTX_P2 RDSATA_PRX_DTX_P2
12
A_DE
B_DE
B_EQ1
A_EQ1
A_EQ2
B_EQ2
DEW
A_DE
B_DE
B_EQ1
A_EQ1
A_EQ2
B_EQ2
+3VS
12
0.01U_0402_16V7K
1 2 3 4 5
21
RO7
4.99K_0402_1%
1 2
RO9
@
4.7K_0402_5%
20
17
19
16
DEW
VDD2
A_EQ218A_EQ1
B_EQ1 A_INP A_INN GND1 B_OUTN B_OUTP GND2
12
USE 8527 re-driv er SA00007JU10
REXT6EN7B_DE
A_OUTP A_OUTN
B_EQ2
B_INN B_INP
A_DE
VDD1
9
8
10
0.1U_0201_10V6K
1
A_DE
B_DE
CO10
2
UO1
PS8527CTQFN20GTR2A_TQ FN20_4X4
RDSATA_PTX_DRX_P2
15
RDSATA_PTX_DRX_N2
14
B_EQ2
13
RDSATA_PRX_DTX_N2
12 11
+3VS
RDSATA_PRX_DTX_P2 RDSATA_PRX_DTX_N2
RDSATA_PTX_DRX_N2 RDSATA_PTX_DRX_P2
G_INT2
+5VS
RO5 0_0402_5%
CO7 0.01U_0402_16V7K CO6 0.01U_0402_16V7K
CO3 0.01U_0402_16V7K CO2 0.01U_0402_16V7K
1
CO11
0.1U_0201_10V6K
2
@
RO4
@
0_0805_5%
1 2
1 2
@
1 2 1 2
1 2 1 2
12
CO12
10U_0603_6.3V6M
100mils
1
2
CO13
0.1U_0201_10V6K
@
+3VS
+5VS_HDD
G_INT2_R
RDSATA_PRX_C_DTX_P2 RDSATA_PRX_C_DTX_N2
RDSATA_PTX_C_DRX_N2 RDSATA_PTX_C_DRX_P2
Cable Type
JHDD2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
G1
22
G2
23
G3
24
G4
ACES_50406-02071-00 1
CONN@
SP010016L00
3 3
+3VS
12
RZ1 10K_0402_5%
GSEN@
D_CK_SCLK<15,16,19> D_CK_SDATA<15,16,19>
4 4
Security Classification
Security Classification
Security Classification
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
C
+3VS
1 2
RZ2 10K_0402_5%@
1 2
RZ3 10K_0402_5%GSEN@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
G-Sensor
+3VS
UZ1
8
CS
4
SCLSPC
6
SDA/SDI/SDO
7
SDO/SA0
16
ADC1
15
ADC2
13
ADC3
2
NC
3
NC
LIS3DHTR_LGA16_3X3
GSEN@
LIS3DH SA0 ->0, Address is 0011 000 (0x30h) SA0 ->1, Address is 0011 001 (0x32h)
D
1
Vdd_IO
14
Vdd
G_INT
11
INT1
G_INT2
9
INT2
10
RES
5
GND
12
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
HDD/ Re-Driver/ G-sensor
HDD/ Re-Driver/ G-sensor
HDD/ Re-Driver/ G-sensor
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
GSEN@
1 2
CZ1 10U_0603_6.3V6M
1 2
GSEN@
CZ2 0.1U_0201_10V6K
G_INT <21>
INT1/2 all High Active
1.A
1.A
44 73Friday, March 31, 2017
44 73Friday, March 31, 2017
44 73Friday, March 31, 2017
E
1.A
of
of
of
Page 41
A
+3VLP
JPB1
112
JUMP_43X39
@
For Power consumption Measurement
1 1
+3VLP_EC
1 2
RB4 47K_0402_5%@
For turn off internal LPC module of KB9032
XESD@
1 2
CB5 100P_0402_50V8J
1 2
CB6 100P_0402_50V8J
XEMI@
XEMI@
12
CB7 22P_0402_50V8 J
2 2
+3VLP_EC
1 2
RB10 2.2K_0402_5%
1 2
RB11 2.2K_0402_5%
SPOK_3V
RB72 0_0402_5%
SPOK_5V
RB73 0_0402_5%@
33_0402_5%
1 2
1 2
For a bnormal shutdown
1 2
3 3
DGPU_AC_DETECT SW_P ROCHOT#
VCOUT1_PROCHOT VCOUT1_PROCHOT
DMN65D8LDW-7_SOT363-6
4 4
DB2 RB751V-40_SOD323-2
1 2
DB3 RB751V-40_SOD323-2
1 2
DB4 RB751V-40_SOD323-2
61
2
QB1A
@
EC_PME#
PLT_RST#
AC_IN
CLK_LPC_R
12
RB6
EC_SMB_CK1 EC_SMB_DA1
SPOK_3V5V
EC_RSMRST#SPOK_3V5V
PCH_PWROK
EC_VCCST_PG_R
VCOUT1_PROCHOT
RB19 0_0402_5%
1 2
34
5
QB1B
@
DMN65D8LDW-7_SOT363-6
PU at CPU side
E51TXD_P80DATA<43>
PWR_SUSP_LED#<39>
2
SUSPWRDNACK<19> USB_CEN<41>
TPM_SERIRQ<17,47> LPC_FRAME#<17,47>
LPC_AD3<17,47 > LPC_AD2<17,47 > LPC_AD1<17,47 > LPC_AD0<17,47 >
CLK_LPC_R<17> PLT_RST#<18,25,47> EC_RST#<48>
EC_SCI#<21>
WLAN_ON<43>
KSI[0..7]<47>
KSO[0..17]<47>
EC_SMB_CK1<51,52 > EC_SMB_DA1<51,52 > EC_SMB_CK2<19,25,39> EC_SMB_DA2<19,25,39>
PM_SLP_S3#<19,49> ESPI_RST#<17>
SPOK_3V<53>
TP_EN<47>
TS_EN<36> WL_OFF#<43> AC_PRESENT<19>
GPU_OVE RT#<25>
FAN_S PEED1<48> FAN_S PEED2<48>
E51RXD_P80CLK<43>
PCH_PWROK<19,49>
NUM_LED#<47>
PBTN_OUT#<19>
PM_SLP_S4#<19,49>
B
+3VLP_EC
0.1U_0201_10V6 K
0.1U_0201_10V6 K
ESPI Bus Pin : 1~5.7.8.10.12.1 4 LPC Bus Pin : 3~5.7.8.10.12.13
CB1
1
2
SUSPWRDNACK USB_CEN
TPM_SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0
CLK_LPC_R PLT_RST# EC_RST# EC_SCI# WLAN_ON
KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2
PM_SLP_S3# ESPI_RST# SPOK_3V TP_EN TS_EN WL_OFF#
AC_PRESENT GPU_OVE RT# FAN_S PEED1 FAN_S PEED2
E51TXD_P80DATA
E51RXD_P80CLK
PWR_SUSP_LED#
NUM_LED#
PBTN_OUT#
PM_SLP_S4#
CB2
1
2
1 2 3 4 5 7 8
10
12 13 37 20 38
55 56 57 58 59 60 61 62 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 81 82
77 78 79 80
6 14 15 16 17 18 19 25 28 29 30 31 32 34 36
122 123
@
0_0402_5%
1 2
UB1
GATEA20 /GPIO00 KBRST#/GPIO01 SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1
LPC & MISC
LPC_AD0
CLK_PCI_EC PCIRST#/GPIO05 EC_RST# EC_SCI#/GPIO0E CLKRUN#/GPIO1D
KSI0/GPIO30 KSI1/GPIO31 KSI2/GPIO32 KSI3/GPIO33 KSI4/GPIO34 KSI5/GPIO35 KSI6/GPIO36 KSI7/GPIO37 KSO0/GPIO20 KSO1/GPIO21 KSO2/GPIO22 KSO3/GPIO23 KSO4/GPIO24 KSO5/GPIO25 KSO6/GPIO26 KSO7/GPIO27 KSO8/GPIO28 KSO9/GPIO29 KSO10/GPIO2A KSO11/GPIO2B KSO12/GPIO2C KSO13/GPIO2D KSO14/GPIO2E KSO15/GPIO2F KSO16/GPIO48 KSO17/GPIO49
EC_SMB_CLK1/GPIO44 EC_SMB_DAT1/GPIO45 EC_SMB_CLK2/GPIO46 EC_SMB_DAT2/GPIO47
PM_SLP_S3#/GPIO04 GPIO07 GPIO08 GPIO0A GPIO0B GPIO0C AC_PRESENT/GPIO0D PWM2/GPIO11 FAN_S PEED1/ GPIO14 FANFB 1/GPIO1 5 EC_TX/GPIO16 EC_RX/GPIO17 PCH_PWROK/GPIO18 SUSP_LED#/GPIO19 NUM_LED#/GPIO1A
PBTN_OUT#/GPIO5D PM_SLP_S4#/GPIO5E
CO-LAY with KB9032QA (SA000080J00)
C
LB1 FBMA-L11-160808-800LMT_0603
+3VLP_ECA
96
125
67
111
VCC
VCC
VCC0
AVCC
EC_VCCST_PG/GPIO0F
EC_FAN_PWM/GPIO12
VCIN1_BATT_TEMP/AD0/GPIO38 VCIN1_BATT_DROP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD_BID/AD3/GPIO3B
EN_DFAN1/DA1/GPIO3D
EC_MUTE#/PSCLK1/GPIO4A
USB_EN#/PSDAT1/GPIO4B
TP_DATA/GPIO4F
ENKBL/GPXIOA00
WOL_EN/GPX IOA01
ME_EN/GPX IOA02
VCIN0_PH1/GPXIOD00
RB2
+3VLP_LPC
Int. K/B Matrix
1 2
22
33
9
VCC
VCC
VCC_LPC
PWM Output
AD Input
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
EC_CIR_RX/AD6/GPIO40
SYS_PWROK/AD7/GPIO41
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
GPIO
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SM Bus
GPIO
GND
GND
11
24
2015/1/9 acer requ ire: reserved protact circuit when adaptor 107% hap pen
DPWROK_EC/GPIO59
EC_RSMRST#/GPXIOA03
VCIN1_ADP_PROCHOT/GPXIOA05
VCOUT1_PROCHOT#/GPXIOA06
VCOUT0_MAIN_PWR_ON/GPXIOA07
GND
35
BKOFF#/GPXIOA08
GPO
PCH_PWR_EN/GPXIOA10
PWR_VCCST_PG/GPXIOA11
VCIN1_AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF#/GP XIOD03
GPI
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
AGND
GND
GND
KB9022QD_LQFP128_14X14
69
94
20m il
113
CB9
ECAGND
LB2
FBMA-L11-160808-800LMT_0603
+3VLP_ECA
1
CB3
0.1U_0201_10V6 K
2
ECAGND
BEEP#/GPIO10
AC_OFF/GPIO13
AD4/GPIO42 AD5/GPIO43
DA0/GPIO3C
DA2/GPIO3E
DA3/GPIO3F
PSCLK2/GPIO4C PSDAT2/GPIO4D
TP_CLK/GPIO4E
MISO/GPIO5B
MOSI/GPIO5C SPICLK/GPIO58 SPICS#/GPIO5A
GPIO50
SYSON/GPIO56 VR_ON/GPIO57
GPXIOA04
GPXIOA09
GPXIOD0 6
PECI/GPXIOD07
V18R/VCC_IO2
1 2
100P_0402_50V8 J
21 23 26 27
63 64 65 66 75 76
68 70 71 72
83 84 85 86 87 88
97 98 99 109
119 120 126 128
73 74 89 90 91 92 93 95 121 127
100 101 102 103 104 105 106 107 108
110 112 114 115 116 117 118
124
BATT_TEMP
12
ECAGND <51>
EC_VCCST_PG_R BEEP#
FAN_PWM1 FAN_PWM2
BATT_TEMP USB_CB ADP_I AD_BID WLAN_PME# EC_PME#
LAN_PWR_EN EC_TP_INT# VR_PWRGD KBL_EN
EC_MUTE# USB_EN EC_TYPEC_EN USB_CHARGE_2A TP_CLK TP_DATA
ENBKL TP_PWR_EN
ME_EN VCIN0_PH
SPOK_5V BT_ON EC_CLR_CMOS FP_PWR_EN
GPU_AL ERT SYS_PWROK_R BATT_4S BATT_BLUE_LED# CAPS_LED# PWR_LED# BATT_AMB_LED# SYSON
VR_ON USB_SELCDP
EC_RSMRST# DGPU_AC_DETECT VCIN1_ADP_PROCHOT VCOUT1_PROCHOT
MAINPWON BKOFF#
THERMAL_ALERT# 3V_EN_R PM_SLP_S0#
AC_IN EC_ONPCH_PWROK
ON/OFFBTN # LID_SW#
SUSP# SW_PROCHOT#
EC_PECI
RB16 33_0402_1%
1 2
+3VLP_EC
EC_VCCST_PG_R <10,49>
LAN_PWR_EN <38>
EC_MUTE# <46> USB_EN <39>
TP_PWR_EN <47>
BT_ON <43>
FP_PWR_EN <48>
BATT_BLUE_LED# <39>
PWR_LED# <39> BATT_AMB_LED# <39>
DGPU_AC_DETECT <21,25>
THERMAL_ALERT# <39>
LID_SW# <39> SUSP# <14,49,52,54,56,57>
D
BEEP# <46>
FAN_PWM1 <48> FAN_PWM2 <48>
BATT_TEMP<51,52>
USB_CB <41> ADP_I <51,52 >
WLAN_PME# <43> EC_PME# <18,38>
EC_TP_INT# <18,47>
VR_PWRGD <58>
KBL_EN <47>
EC_TYPEC_EN <42> USB_CHARGE_2A <41> TP_CLK <47> TP_DATA <47>
ENBKL <18>
ME_EN <19 >
VCIN0_PH <51>
SPOK_5V <53>
GPU_AL ERT <25>
BATT_4S <52>
CAPS_LED# <47>
SYSON <14,49,54,56> VR_ON <49,57,58> USB_SELCDP <41>
EC_RSMRST# <19>
VCIN1_ADP_PROCHOT <51>
MAINPWON <48,51,53> BKOFF# <36>
PM_SLP_S0# <19>
AC_IN < 52> EC_ON <53>
ON/OFFB TN# <47>
H_PECI <10,18>
near SOC
CB8
.1U_04 02_16V7K
XESD@
H_PROCHOT#<10,52>
Board ID
RB3
200K_0402_1%
SD034200380
10K_0402_5%
SYS_PWROK_R
GPU_AL ERT
GPU_OVE RT#
LID_SW#
MAINPWON
1
2
RB1
100K_0402_1%
32P@
RB3
28P@
15K_0402_1%
Analog B oard ID d efinitio n, Please see page 3.
EC_CLR_CMOS
RB26
EC Internal PU
2
G
12
1 2
@
RB7 0_0402_5%
1 2
RB9 10K_0402_5%VGA@
1 2
RB12 10K_0402_5%@
1 2
RB13 100K_0402_1%
For Thermal Portect Shutdown
DB1 RB751V-40_SOD323-2
1 2
RB14
3V_EN_R
1 2
1K_0402_5%
+3VLP_EC
Ra
1 2
AD_BID
Rb
1 2
13
D
QB6 L2N7002WT1G_S C-70-3
S
SB00001GE00
3V_EN
RB15 1M_0402_5%
@
RB17
0_0402_5%
1 2
RB18
@
0_0402_5%
1 2
E
+3VS
+3VLP_EC
1 2
VR_HOT#
SW_PROCHOT#H_PROCHOT#
1
CB4
@
0.1U_0201_10V6 K
2
PCH_RTCRST# < 19>
SYS_PWROK <19,49>
3V_EN <53,55>
VR_HOT# <58>
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
EC ENE-KB9012A4/KB9022
EC ENE-KB9012A4/KB9022
EC ENE-KB9012A4/KB9022
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
45 73Friday, March 31, 2017
45 73Friday, March 31, 2017
45 73Friday, March 31, 2017
1.A
of
of
of
Page 42
A
2000mA 600ohm@100MHz DCR 0.1
+VDDA
1 1
LA1
HCB2012VF-601T20_2P
1 2
40m il
CA2
0.1U_0201_10V6 K
CA1
10U_0402_6.3V6 M
1
1
2
2
near Pin46near Pin41
1 2
near P in9
1 2
+3VS
+3VS
2 2
3 3
XEMI@
Reserved for RF
HP_PLUG#<39>
+3VS
GNDA
12
CA2710P_0402_50V8 J
EC_MUTE#<45>
HDA_RST_AUDIO#<19>
Close codec
RA12 200K_0402_1% RA13 100K_0402_1% RA17 20K_0402_5%@
DMIC_CLK
@
RA2 0_0402_5 %
1 2
@
RA4 0_0402_5 %
+MICBIAS
40m il
HDA_RST_AUDIO#
12 12 12
1
CA15 1U_0402_6.3V6 K
2
+3VS_DVDD
RA16 0_0402_5%@
+3VALW
GNDA
RA19 0_040 2_5%@
LINE1_L LINE1_R
RING2 SLEEVE
DMIC_DATA DMIC_CLK
1 2
GND
22K_0402_5%
BEEP#<45>
4 4
PCH_SPKR<19>
22K_0402_5%
CA7 0.1U_0201_10V6K
CA8 10U_0402_6.3V6M
20m il
near P in1
MONO_IN
SENSE_A
1 2
CA19
10U_0402_6.3V 6M
12
RA22
12
RA27
12
1 2
CA9
10U_0402_6.3V6 M
0.1U_0201_10V6 K
1
1
2
2
22
LINE1-L(PORT-C-L)
21
LINE1-R(PORT-C-R)
24
LINE2-L(PORT-E-L)
23
LINE2-R(PORT-E-R)
31
LINE1-VREFO-L
30
LINE1-VREFO-R
17
MIC2-L(PORT-F-L) /RING
18
MIC2-R(PORT-F-R) /SLEEVE
2
GPIO0/DMIC-DATA
3
GPIO1/DMI C-CLK
47
PDB
11
RESETB
12
PCBEEP
13
HP/LINE1 JD(JD1)
14
MIC2/LINE2 JD(JD2)
15
SPDIFO/FRONT JD(JD3)/GPIO3
37
CBP
35
CBN
36
CPVDD
20
VD33 STB
19
MIC CAP
4
DC DET
49
Thermal PAD
ALC255-CG_MQFN48_6X6
SA000082700
BEEP#_R
1
XESD@
CA26
100P_0402_50V8 J
2
0.1U_0201_10V6 K
1
2
+3VS_DVDDIO
+3VS_DVDD
CA10
UA1
RA24
4.7K_0402_5%
1 2
CA3
1
CA25
1U_0402_6.3V6 K
1 2
B
DVDD
+5VS_PVDD
9
DVDD-IO
+5VS_AVDD
41
PVDD1
MONO_IN
26
46
AVDD1
PVDD2
20m il
CA4
0.1U_0201_10V6 K
1
2
GNDA
near Pin26
+1.8VS_VDDA
GNDA
40
AVDD2
SPK-OUT-L­SPK-OUT-L+
SPK-OUT-R+
SPK-OUT-R-
HPOUT-L(PORT-I-L)
HPOUT-R(PORT-I-R)
SYNC BCLK
SDATA-OUT
SDATA-IN
SPDIF-OUT/GPIO2
MONO-OUT
MIC2-VRE FO
LDO3-CAP LDO2-CAP LDO1-CAP
VREF
CPVEE
AVSS1 AVSS2
CA5
0.1U_0201_10V6 K
CA6
10U_0402_6.3V6 M
1
1
2
2
CA11
0.1U_0201_10V6 K
1
2
Place near Pin40
43
SPKL-
42
SPKL+
45
SPKR+
44
SPKR-
HP_LEFT
32
HP_RIGHT
33
HDA_SYNC_R
10
HDA_BIT_CLK_R
6
HDA_SDOUT_R
5
HDA_SDIN0_AUDIO
8
48
16
+MIC2_VREFO
29
7 39 27
10m il
CODEC_VREF
28
34
CPVEE
25 38
GNDA
1 2
RA25 0_0402_5 %@
1 2
RA29 0_0402_5 %@
1 2
RA31 0_0402_5 %@
1 2
RA33 0_0402_5 %@
+VDDA
RA1
@
0_0603_5%
1 2
1 2
RA3 0_0402_5 %
CA12
10U_0402_6.3V6 M
1
2
HDA_BIT_CLK_R
RA10 33_0402_5%
CA14 10U_0402_6.3V6M CA16 10U_0402_6.3V6M CA17 10U_0402_6.3V6M RA14 100K_0402_5%
CA18 10U_0402_6.3V6M@
CA20 2.2U_0402_6.3V6M
CA21 0.1U_0201_10V6K@
CA22
1U_0402_6.3V6 K
1
2
C
HD Audio Codec
40m il
+5VS
JPA1
@
1 2
JUMP_43X39
(output = 300 mA)
+1.8VS
@
RA5 0_0402_5%
1 2
XEMI@
2
CA13 22P_0402_50V8 J
1
XEMI@
HDA_SYNC_R <19> HDA_BIT_CLK_R <19>
1 2
1 2 1 2 1 2
1 2
1 2
1 2
1 2
HDA_SDOUT_R <19>
HDA_SDIN0 <19>
GNDA
1 2
RA26 0_040 2_5%@
1 2
RA30 0_040 2_5%@
1 2
RA32 0_040 2_5%@
1 2
RA34 0_040 2_5%@
GND
GNDA
+VDDA
D
SPKR+ SPKR­SPKL+ SPKL-
1 2
LA2EMI@ PBY1 60808T-121Y-N_2P
1 2
LA3EMI@ PBY1 60808T-121Y-N_2P
1 2
LA4EMI@ PBY1 60808T-121Y-N_2P
1 2
LA5EMI@ PBY1 60808T-121Y-N_2P
MESC5V0 2BD03_SOT2 3-3
Digital MIC
MIC BOM upload by Audio Team
DMIC_DATA
PCH_DMIC_DATA0<19>
PCH_DMIC_CLK0<19>
PCH_DMIC_DATA0
PCH_DMIC_CLK0
DMIC_CLK
Headphone Out
+MIC2_VREFO
RA15 2.2K_0402_5%
RA18 2.2K_0402_5%
RA20 0_0603_5%@
HP_RIGHT HPOUT_R_1
RA21 0_0603_5%@
LINE1_L
LINE1_R
+MICBIAS
DA3
2
1
3
BAT54A-7-F_SOT23-3
40m il
2
3
2
3
DA1
XESD@
1
1
GND
GND
12
RA7 0_0402_5%
12
@
RA8 33_0402_5%
12
@
RA9 33_0402_5%
LA6 BLM15PX221SN1D_2PEMI@
1 2
1 2
1 2
1 2
CA23 4.7U_0402_6.3V6M
CA24 4.7U_0402_6.3V6M
4.7K_0402_5%
4.7K_0402_5%
1 2
1 2
RA23
RA28
12
HPOUT_L_1HP_LEFT
12
12
E
Int. Speaker Conn.
SPK_R+ SPK_R­SPK_L+ SPK_L-
MESC5V02 BD03_SOT23 -3
DA2
XESD@
DMIC_DATA_R
DMIC_CLK_R
TO IO/B
GND
SLEEVE
RING2
ACES_50278-00401-001
SP02000RR00
TO eDP cable
JSPK1
1
1
2
2
3
3
4
4
5
G1
6
G2
DMIC_DATA_R <36>
DMIC_CLK_R <36>
SLEEVE <39>
RING2 <39>
HPOUT_L_1 <39>
HPOUT_R_1 <39>
GNDAGND GND GNDA
GND
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
HD Audio Codec ALC255
HD Audio Codec ALC255
HD Audio Codec ALC255
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
46 73Friday, March 31, 2017
46 73Friday, March 31, 2017
46 73Friday, March 31, 2017
1.A
of
of
of
Page 43
A
ON/OFF BTN
R17 100K_0402_5%
SW1
@
EVQPLDA15_4 P
5
6
0.1U_0201_10V6K
1
2
1
TPM_BADD
R210_0402_5% @
LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3
CLK_LPC_TPM_R
12
ON/OFFBTN#
3
4
R20 0_0603_5%
1 2
C34
TPM@
near pin1
TPM@
10U_0603_6.3V6M
1
2
TPM@
SELECTION
AEh(write ), AFh(read )
U5
TPM@
29
XOR_OUT/SDA/GPIO0
CLK_LPC_TPM_R LPC_FRAME# PLT_RST# TPM_SERIRQ PM_CLKRUN#
30
SCL/GPIO1
3
GPX/GPIO2
6
GPIO3/BADD
24
LAD0/MISO
21
LAD1/MOSI
18
LAD2/SPI_IRQ#
15
LAD3
19
LCLK/SCLK
20
LFRAME#/SCS#
17
LRESET#/SPI_RST#/SRESET#
27
SERIRQ
13
CLKRUN#/GPIO4/SINT#
28
LPCPD#
4
PP
5
TEST
NPCT650LA0YX_Q FN32_5X5
VDD1 VDD2 VDD3
GND1 GND2 GND3 GND4
PGND
Reserved
P/N:SA00008ELC0 (S IC NPCT650ABBYX QFN 32P TPM2.0 FW 1.3.1.0)
XEMI@
R22 33_0402 _5%
1 2
XEMI@
C39 22P_0402_ 50V8J
1 2
1 1
2 2
TPM
+3VALW +3VALW_TPM +3VS +3VS_TPM
R19 0_0603_5%
1 2
ON/OFFBTN#<45>
Test Only
BOT
TPM@
+3VLP
1
2
10U_0603_6.3V6M
C33
1
2
TPM@
BADD
*
3 3
1 2
LPC_AD0<17,45> LPC_AD1<17,45> LPC_AD2<17,45> LPC_AD3<17,45>
CLK_LPC_TPM_R<17>
LPC_FRAME#<17, 45>
PLT_RST#<18,25,45>
TPM_SERIRQ<17,45>
PM_CLKRUN#<19>
SERIRQ PH 10K to +3VS at PCH side
CLKRUN# PH 10K to +3VS at PCH side
LPCPD# had internal PH
4 4
B
KB Conn.
JKB1
ON/OFFBTN#
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8
KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
GND
28
28
GND
29
29
30
30
31
31
32
32
ACES_505 96-03201- P01
CONN@
33 34
1 2
CAPS_LED#<45>
+5VS
NUM_LED#<4 5>
RK1 1K_ 0402_5% RK3 0_ 0402_5%@
1 2
RK4 0_ 0402_5%@
1 2 1 2
RK2 1K_ 0402_5%
PVT modify
Touch Pad
C38
0.1U_0201_10V6K
C37
0.1U_0201_10V6K
C36
0.1U_0201_10V6K
C35
1
2
1
VSB
8 14 22
2
NC1
7
NC2
10
NC3
11
NC4
25
NC5
26
NC6
31
NC7
9 16 23 32 33 12
TPM@
near pin8,1 4,22
1
1
2
2
TPM@
TPM@
+3VALW_TPM
+3VS_TPM
I2C_1_SCL<21>
C
KSI[0..7]
KSO[0..17]
ON/OFFBTN#
KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8
KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSI[0..7] <45>
KSO[0..17] <45>
JKB2
30
GND2
29
GND1
28
28
27
27
26
26
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_8520 1-2805
CONN@
SP01000GO00
4.7U_0402_6.3V6M
CK2
1
2
TP_PWR_EN follow SYSON behavior
DMN65D8LDW -7_SOT363-6
RK12 0_0402_5%
DMN65D8LDW -7_SOT363-6
I2C_1_SDA<21>
UK1
1
OUT
2
GND
3
OC
EN
SY6288C20 AAC_SOT23-5
TP_PW R_EN<45>
+3V_PTP +3V_PTP
QK1A
2
6 1
1 2
@
QK1B
3 4
1 2
RK13
IN
5
5
4
RK8
2.2K_0402_5%
0_0402_5%@
+3VAL W+3V _PTP
2
CK3
1U_0402_6.3V6K
1
12
12
KB BackLight
KBL_EN<45>
+3V_PTP
1 2
RK9
2.2K_0402_5%
I2C_1_SCL_R
I2C_1_SDA_R
D
+5VS
1 2
@
R18 0_04 02_5%
RK7 10K_0402_5%
EC_TP_INT#
U4
5
OUT
IN
GND
4
OC
EN
SY6288C20 AAC_SOT23-5
+3VAL W
+3VS
+5VS_BL
1
2
3
C32
0.1U_0201_10V6K
@
@
@
0.1U_0201_10V6K
EC PS2
PCH I2C
EC_TP_INT#<18,45>
TP_EN<45>
@
1
2
12
RK50_0402_5%
12
RK60_0402_5%
CK1
12
+3V_PTP
TP_CLK TP_DATA
I2C_1_SDA_R I2C_1_SCL_R EC_TP_INT# TP_EN
RK10
4.7K_0402_5%
TP_CLK TP_DATA
E
JBL1
1
1
2
2
3
3
4
4
5
GND
6
GND
ACES_515 24-0040N- 001
CONN@
SP010022M00
1 2 3 4 5 6 7 8 9
10
+3V_PTP
12
12
RK11
4.7K_0402_5%
JTP1
1 2 3 4 5 6 7 8 GND GND
ACES_515 24-00801- 001
CONN@
SP01001A910
TP_CLK <45> TP_D ATA <45 >
Security Class ification
Security Class ification
Security Class ification
Issued Date
Issued Date
Issued Date
THIS S HEET OF ENGINE ERING D RAWING IS THE P ROPRIETAR Y PRO PERT Y OF CO MPAL ELECTRONI CS, INC. AND CONT AINS CONFIDENTIAL
THIS S HEET OF ENGINE ERING D RAWING IS THE P ROPRIETAR Y PRO PERT Y OF CO MPAL ELECTRONI CS, INC. AND CONT AINS CONFIDENTIAL
THIS S HEET OF ENGINE ERING D RAWING IS THE P ROPRIETAR Y PRO PERT Y OF CO MPAL ELECTRONI CS, INC. AND CONT AINS CONFIDENTIAL AND TR ADE S ECRET INFORMATIO N. TH IS S HEET MAY NOT BE TRANS FERED FRO M THE CUSTODY OF THE CO MPETENT DIVISION OF R&D
AND TR ADE S ECRET INFORMATIO N. TH IS S HEET MAY NOT BE TRANS FERED FRO M THE CUSTODY OF THE CO MPETENT DIVISION OF R&D
AND TR ADE S ECRET INFORMATIO N. TH IS S HEET MAY NOT BE TRANS FERED FRO M THE CUSTODY OF THE CO MPETENT DIVISION OF R&D DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
DEPARTMENT E XCEPT AS AUTHORIZE D BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WITH OUT P RIOR WRITTEN CONSENT OF COMP AL EL ECTRONIC S, I NC.
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WITH OUT P RIOR WRITTEN CONSENT OF COMP AL EL ECTRONIC S, I NC.
A
B
MAY BE USED BY OR DISCLOSED TO AN Y THIRD PARTY WITH OUT P RIOR WRITTEN CONSENT OF COMP AL EL ECTRONIC S, I NC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Doc ument Num ber Rev
Size Doc ument Num ber Rev
Size Doc ument Num ber Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet of
Compal Electronics, Inc.
KB & TP & TPM Connector
KB & TP & TPM Connector
KB & TP & TPM Connector
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
E
1.A
1.A
47 73Fr iday, March 31, 2017
47 73Fr iday, March 31, 2017
47 73Fr iday, March 31, 2017
1.A
Page 44
+5VS
1 2
@
RF4 0_ 0603_5%
4.7U_0603_10V6 K
+3VS
12
RF3 10K_0402_5%
FAN_S PEED1<45>
+3VS
FAN_S PEED2<45>
1
CF7 1000P_0402_50V7 K
XEMI@
2
12
RF5 10K_0402_5%
1
CF10 1000P_0402_50V7 K
XEMI@
2
FAN_PWM1<45>
FAN_PWM2<45>
Reset Circuit
BI_GATE PH to +RTCVCC at PWR side
DMN65D8LDW-7_SOT363-6
BI_GATE<51>
BI_GATE
Reset Button
SW3
BI_GATE BI_GATE
1 2
3 4
SKRPABE010_4P
CF6
XEMI@
+5VS
1 2
@
RF6 0_0603_5%
4.7U_0603_10V6 K
CF8
40mil
+VCC_FAN1 +VCC_FAN2
1
1
CF5
2
1000P_0402_50V7 K
2
FAN Conn
+3VLP
1 2
1
2
JFAN1
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_50278-00401-001
CONN@
SP02000RR00
JFAN2
1
1
2
2
3
3
4
4
5
G1
6
G2
ACES_50278-00401-001
CONN@
SP02000RR00
R25 10K_0402_5%
BI_GATE#
2
C40
0.1U_0201_10V6 K
BI SW
SW2
3
4
ATE-2-V-TR_4P
H : 3.8mm
Release : Battery Off Push : Battery ON
1 2
R23 0_0402_5%
1 2
R24 0_0402_5%
61
Q1A DMN65D8LDW-7_SOT363-6
+VCC_FAN1
FAN_PWM1
+VCC_FAN2
FAN_PWM2
34
Q1B
5
1
2
@
@
1
2
40mil
1
CF9 1000P_0402_50V7 K
XEMI@
2
MAINPWON <45,51,53>
EC_RST# < 45>
BI_S <51>
Screw Hole
H2
@
H3
H1
@
H_6P4
H15
@
H_3P8
@
H_4P0
1
H17
@
H_3P0
1
@
H_3P8
H_3P8
1
1
1
H20
@
H18
@
H_2P7x2P0N
H_2P5
1
1
1
H5
@1H4
H_3P8
@
H_5P6
H6
@
H7
@
H_4P0
H_3P8
1
1
H22
@
H21
H_2P7x2P0N
1
1
Finger Print
FP@
1 2
RK14 0_0402_5%
+3VALW
1 2
RK15 0_0402_5%@
+5VALW
1U_0402_6.3V6 K
FP_PWR_EN<45>
USB20_N10<17>
USB20_P10<17>
USB20_P10_L USB20_N10_L
Secur ity Cla ssificat ion
Secur ity Cla ssificat ion
Secur ity Cla ssificat ion
Issued D ate
Issued D ate
Issued D ate
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL
THIS SH EET OF EN GINEER ING DRA WING I S THE PROP RIETAR Y P ROPERTY OF COMPAL EL ECTRONICS, I NC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT A S AUTHORIZED BY COMPAL ELE CTRONICS, INC. NEITHER THIS S HEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY O R DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2
FP@
CK4
1
FP_PWR_EN
LK1
3 4
MCM1012B 900F06BP _4P
FP@
+FP_VCC
JFP1
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
ACES_51522-00801-001
CONN@
SP01001AE00
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Da te
Deciphere d Da te
Deciphere d Da te
H8
@
H_3P8
H23
@
H_3P2
12
10
G2
9
G1
H9
@
@
H_3P8
H_4P0
1
1
H24
@
H_3P2
1
1
UK2
5
IN
4
EN
SY6288C20AAC_SOT23-5
FP@
USB20_N10_L
USB20_P10_L
H10
GND
1
OUT
H_3P0
H_2P0N
1
1
+FP_VCC
1
2
3
OC
H12
@
H11
@
H13
@
H_3P0
1
1
FP@
CK5
4.7U_0402_6.3V6M
2
+FP_VCC
USB20_P10_L
PIN
1 2 3 4 5 6 7 8
H14
@
H_3P0
1
6
5
4
FIDUCIAL_C40M80
FIDUCIAL_C40M80
DK1
FP@
I/O4
I/O2
VDD
GND
I/O3
AZC099-04S.R7G_SOT23-6
I/O1
FD1
1
FD3
1
3
2
1
@
@
USB20_N10_L
FD2
@
1
FIDUCIAL_C40M80
FD4
@
1
FIDUCIAL_C40M80
ETU801 FA577E-1200
+FP_VCC(5V) +FP_VCC(3V)
USBP USBN GND NC NC
D+ D­GND NC NC NC NC
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
FAN & FP & Screw Hole
FAN & FP & Screw Hole
FAN & FP & Screw Hole
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
48 73Friday, March 31, 2017
48 73Friday, March 31, 2017
48 73Friday, March 31, 2017
1.A
1.A
1.A
Page 45
A
B
C
D
E
System DC inferface
@
1 2
CQ2 0.1U_0201_10V6K
1 1
2 2
SUSP#
1 2
RQ1 0_040 2_5%
RQ2 0_040 2_5%
@
1 2
CQ4 0.1U_0201_10V6K
Place CQ7 close UQ1 pin 1&2 Place CQ8 close UQ1 pin 6&7
@
100K_0402_5%
SUSP
R32
10K_0402_5%
Q7A
12
@
DMN65D8LDW-7_SOT363-6
12
R27
@
2
2
CQ7 1U_0402_6.3V6 K
1
+3VALW
3VS_ON
+5VALW
5VS_ON
+5VALW
2
1
+0.6VS_VTT+5VALW
R28
@
100K_0402_5%
1 2
1 2
+0.6VS_VTT_R
61
34
Q7B
@
DMN65D8LDW-7_SOT363-6
5
1 2
3
4
5
6 7
CQ8 1U_0402_6.3V6 K
UQ1
VOUT1
VIN1
VOUT1
VIN1
CT1
ON1
GND
VBIAS
ON2
CT2
VIN2
VOUT2
VIN2
VOUT2
GPAD
EM5209VF_DFN14_2X3
SYSON<14, 45,54,56>SUSP#<14,45 ,52,54,56,57>
+3VS_OUT
14 13
12
1 2
CQ1 1000P_0402_50V7K
11
10
1 2
CQ3 1000P_0402_50V7K
9
+5VS_OUT
8
15
100K_0402_5%
SYSON#
DMN65D8LDW-7_SOT363-6
SYSON
+3VS_OUT +5VS_OUT+3VALW +5VALW
Q8B
@
5
@
112
JUMP_43X118
@
112
JUMP_43X118
2
CQ5
0.1U_0201_10V6 K
1
R30
@
1 2
34
JPQ1
2
JPQ2
2
+1.2V_VDDQ+5VALW
R29 100K_0402_5%
@
1 2
+1.2V_VDDQ_R
61
Q8A DMN65D8LDW-7_SOT363-6
2
+3VS
+5VS
2
CQ6
0.1U_0201_10V6 K
1
@
SYSON#SUSP
For Power ON/Off Sequence
R37
100K_0402_5%
2N7002KDW_S OT363-6
PM_SLP_S3#<19,45>
PM_SLP_S4#<19,45>
Q11A
2
G
100K_0402_5%
2N7002KDW_S OT363-6
2
+3VALW
R38
Q13A
G
S
12
61
D
+3VALW
12
61
D
S
PM_SLP_S3
PM_SLP_S4
G
2
S
5
G
S
G
5
S
G
2
S
5
G
S
5
G
S
Q10A 2N7002KDW_S OT363-6
61
D
D
D
D
D
D
EC_VCCST_PG_R <10,45>
MOW14, For tCPU28 200us(max) SLP_S3# to VCCST_PWRGD deassertion
Q10B 2N7002KDW_S OT363-6
34
VR_ON <45,57,58>
MOW14, For tPLT17 200us(max) SLP_S3# to IMVP VR_ON deassertion
Q11B 2N7002KDW_S OT363-6
34
SUSP#
MOW14, For tPLT18 200us(max)
Q12A 2N7002KDW_S OT363-6
61
Q12B 2N7002KDW_S OT363-6
34
Q13B 2N7002KDW_S OT363-6
34
SLP_S3# to VCCIO VR disable
@
SYS_PWROK <19,45>
@
PCH_PWROK <19,45>
SYSON
MOW14, For tPLT15 200us(max) SLP_S4# to VDDQ ramp down
P/N: SB00000ZU00 (S TR DMN65D8LDW-7 2N SOT363-6)
3 3
4 4
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/12/15 2017/12/15
2016/12/15 2017/12/15
2016/12/15 2017/12/15
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
DC Interface
DC Interface
DC Interface
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1.A
1.A
49 73Friday, March 31, 2017
49 73Friday, March 31, 2017
E
49 73Friday, March 31, 2017
1.A
of
of
of
Page 46
A
B
C
D
E
change PL101
、、、、
PL102 from
SM01000C000 to comm part
1 1
2 2
3 3
@
ACES_50290-00801-001
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
PJP101
99.9
12
PR103
4.7_1206_5%
12
PC101
0.1U_0603_25V7K
EMI@
PR101
@
0_0402_5%
1 2
HCB2012KF-121T50_0805
HCB2012KF-121T50_0805
PC102
12
EMI@
100P_0603_50V8
HCB2012KF-121T50_0805
+3VLP
PL101
EMI@
1 2
PL102
EMI@
1 2
PL103
EMI@
1 2
+CHGRTC
+19V_VIN+19V_ADPIN
SM01000P200
ACES_50290-*
PC104
12
EMI@
1000P_0603_50V7 K
12
PR102
4.7_1206_5%
12
EMI@
0.1U_0603_25V7K
PC105
4 4
A
Security Classification
Security Classification
Security Classification
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Issued Da te
Issued Da te
Issued Da te
THIS SHEET OF EN GINEERIN G DRAW ING IS THE P ROPRIETAR Y PROPE RTY OF COMPA L ELEC TRONICS, INC. AN D CONTAI NS CONFIDENTIAL
THIS SHEET OF EN GINEERIN G DRAW ING IS THE P ROPRIETAR Y PROPE RTY OF COMPA L ELEC TRONICS, INC. AN D CONTAI NS CONFIDENTIAL
THIS SHEET OF EN GINEERIN G DRAW ING IS THE P ROPRIETAR Y PROPE RTY OF COMPA L ELEC TRONICS, INC. AN D CONTAI NS CONFIDENTIAL AND TR ADE SEC RET INFO RMATION. TH IS SHEE T MAY NOT BE TRA NSFERED FROM THE CU STODY OF THE C OMPETENT DIVISIO N OF R&D
AND TR ADE SEC RET INFO RMATION. TH IS SHEE T MAY NOT BE TRA NSFERED FROM THE CU STODY OF THE C OMPETENT DIVISIO N OF R&D
AND TR ADE SEC RET INFO RMATION. TH IS SHEE T MAY NOT BE TRA NSFERED FROM THE CU STODY OF THE C OMPETENT DIVISIO N OF R&D DEPAR TMENT EX CEPT AS AUTHOR IZED B Y COMPAL ELEC TRONICS, INC. NEITH ER THIS SHEE T NOR THE INFO RMATION IT C ONTAINS
DEPAR TMENT EX CEPT AS AUTHOR IZED B Y COMPAL ELEC TRONICS, INC. NEITH ER THIS SHEE T NOR THE INFO RMATION IT C ONTAINS
DEPAR TMENT EX CEPT AS AUTHOR IZED B Y COMPAL ELEC TRONICS, INC. NEITH ER THIS SHEE T NOR THE INFO RMATION IT C ONTAINS MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTE N CONSEN T OF COMP AL ELECTR ONICS, IN C.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTE N CONSEN T OF COMP AL ELECTR ONICS, IN C.
MAY BE U SED BY OR DISCLOSED TO ANY THIRD PARTY WITHOU T PRIOR WRITTE N CONSEN T OF COMP AL ELECTR ONICS, IN C.
B
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
C
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Tit le
Tit le
Tit le
DCIN&
DCIN&
DCIN&
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
Custom
Custom
Custom
Date: Shee t
Date: Shee t
Date: Shee t
D
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
1.A
1.A
1.A
50 73Friday, March 31, 2017
50 73Friday, March 31, 2017
50 73Friday, March 31, 2017
of
of
of
E
Page 47
A
B
C
D
E
+3VLP
1 1
PR207 10 0_0402_1%
1 2
PR205 10 0_0402_1%
1 2
Battery Bot Side
PJP201
PIN1 GND PIN2 GND PIN3 SMD PIN4 SMC PIN5 TEMP PIN6 BI PIN7 Batt+ PIN8 Batt+
2 2
@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
GND
10
GND
CVILU_CI9908M2HR0-NH
EC_SMB_DA1-1 EC_SMB_CK1-1 BATT_TS BATT_B/I
PR202
200K_0402_1%
1 2
1 2
PR203 1K_0402_1%
+3VLP
BATT_TEMP <45,52>
+RTCVCC
12
PR212 100K_0402_5%
BI_GATE<48>
+12.6V_BATT+
PL201
EMI@
HCB2012KF-121T50_0805
1 2
PL202
EMI@
HCB2012KF-121T50_0805
1 2
change PL201, PL202 from SM01000C000 to comm part SM01000P200
3 3
12
PC201
EMI@
1000P_0402_50V7 K
+12.6V_BATT
12
PC202
0.01U_0402_25V7 K
EMI@
EC_SMB_DA1 <45,52>
EC_SMB_CK1 <45,52>
2016/09/26 Change thePQ201 from SB00000QO00 to SB00001GD00,
13
D
2
PQ201
G
LBSS139LT1G 1N SOT-23-3
S
12
PR217 0_0402_5%
BI_S <48>
@
MAINPWON<45,48,53>
2016/11/22 update
For KB9022 sense 5mΩ
180W PR206 10K ohm
10K_0402_1%
<45,47>
234W,0.82V
PR206
1 2
MAINPWON
RecoveryActive
12
PR213
100K_0402_1%
@
ADP_ I <45 ,52>
VCIN1_ADP_PROCHOT <45>
12
PC205
0.1U_0603_25V7 K
PU201
1
VCC
TMSNS1
2
GND
RHYST1
3
OT1
TMSNS2
4
RHYST2
OT2
G718TM1 U_SOT23- 8
@
26.7K_0402_1%
@
8
7
6
5
@
14K_0402_1%
(Common Part) SL200002H0 0
@
PR218
PR215
12
12
12
PH3 Near VGA.
When PR204=16.9K
For KB9022 OTP
92'C, 1V 56' C, 2VVCIN0_PH(V)
PH202(ohm ) 7.309 2K 26.11K
+3VLP_ECA
12
PR204
18.7K_0402_1%
3/27 thermal PH1 92'C ->89'C
@
10K_0402_1%
100K_0402_1%_N CP15WF104F03RC
PH203
@
PR216
RecoveryActive
12
@
PR214
21.5K_0402_1%
(Common Part)
12
SL200002H0 0
12
100K_0402_1%_N CP15WF104F03RC
@
PH202
VCIN0_PH <45>
12
PR208 20K_0402_1%
100K_0402_1%_N CP15WF104F03RC
T202@
T201@
PH201
12
PC203 must close to EC pin
PC203
@
0.1U_0402_25V 6
1 2
PH201 is Common Part SL200002H00
ECAGND<45>
T202 T201 must close to PH201
ADP_I=20*I(adapter)*0.01
4 4
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
I(adapter)=adapter(W)*130%/19
Compal Secret Data
Compal Secret Data
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
D
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
BATTERY&CONN/OTP
BATTERY&CONN/OTP
BATTERY&CONN/OTP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
E
51 73Friday, March 31, 2017
51 73Friday, March 31, 2017
51 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 48
A
PR302
1M_0402_1%
12
PQ303
TPCA8057 1N DFN5X6-8
+19V_VIN
1 1
ACFET MDU1512 SB00000SY00 Rds(on):4.2~5m Ohm Vgs=20V Vds=30V ID= 24.2A (Ta=70C)
5
12
PC301
1000P_0603_50V 7
1 2 3
4
PR301
1 2
4.7_0603_1%
+19V_VIN
12
PR311 422K_0402_1%
2 2
3 3
ACDET
12
12
PR313
66.5K_0402_1%
PSYS_MON<58>
H_PROCHOT#<10,45>
+19V_VIN
+19VB
PC315 2200P_0402_25V7 K
EC_SMB_DA1<45,51>
EC_SMB_CK1<45,51>
20160601 colay BQ24781
2
G
PR303
3M_0402_5%
ADP_I<45,51>
PR331
@
0_0402_5%
1 2
PR321
1 2
0_0402_5%
13
D
PQ301
L2N7002SWT1G_SOT323-3
S
12
+19V_P1
AON6366E 1N DFN5X6-8
12
PC303
0.047U_0603_25V 7M
PR308
4.02K_0402_1%
1 2
PR305
4.02K_0402_1%
PD301
S SCH DIO BAS40CW SOT-323
3
2
100P_0603_50V 8
@
100P_0603_50V 8
For 4S per cell 4.35V battery
ACDET
12
PR328
4S_BATT@
2M_0402_1%
12
PR330
@
0_0402_5%
13
4S_BATT@
PQ307
PR329
4S_BATT@
100K_0402_1%
BATT_4S<45>
4 4
1 2
4S_BATT@
SUSP#<14,45,49,54,56,57>
L2N7002SWT1G_SOT323-3
2
13
D
PQ308
2
G
S
A
LTC01 5EUBF S8TL_ UMT3 F
1 2 3
ACDRV_CHGR
CMSRC_CHGR
12
1
PR317 0_0402_5%@
PR315 0_0402_5%@
PC318
1 2
PC319
1 2
@
1 2
B
PQ304
5
4
PR312
10_1206_5%
PC314 1U_0603_25V6K
1 2
1 2
DCHG_I
PR334
0_0402_5%
BATT_TEMP<45,51>
B
+19V_P2
12
12
PR333
1 2
CMSRC_CHGR
EC_SMB_DA1_CHGR
EC_SMB_CK1_CHGR
ACPRN_CHGR
0_0402_5%
AC_IN<45>
C
PR335
0.01_1206_1%
0.1U_0603_25V 7K
@
0_0402_5%
ACDRV_CHGR
28
3
6
11
12
5
7
8
9
10
13
14
15
16
29
PC310
PR309
1
2
1
2
ACP
0.1U_0402_25V6
12
4
PU301
VCC
CMSRC
ACDET
SDA
SCL
ACOK
IADP
IDCHG
PMON
/PROCHOT
GND
NC
/BATPRES
/TB_STAT
PWPD
BQ24781RUYR_WQFN28_4X4
PR304
0.01_1206_1%
PC311
1 2
12
ACP_CHGR
2
ACP
ACDRV
4
3
4
3
ACN
PC312
1 2
0.01U_0402_25V 7K~N
12
PR310
@
0_0402_5%
PC313
@
1000P_0402_50V7 K
1 2
ACN_CHGR
+6V_CHG_R EGN
1
ACN
24
REGN
25
BTST
26
HIDRV
27
PHASE
23
LODRV
22
GND
21
ILIM
20
SRP
19
SRN
18
BATDRV
17
BATSRC
PJ301 JUMP_43X118@
112
PL302
EMI@
HCB2012KF-121T50_0805
1 2
PC304
1 2
@
10U_0805_25V6K
2016/03/13 SE158225K80 X1 down size SE00000WP00 S CER CAP 2.2U 25V K X5R 0603
PC316
2.2U_0603_25V7M
1 2
PR316
1 2
0_0603_5%
10_0402_1%
1 2
1 2
10_0402_1%
BST_CHGR_R
PR323
PR324
BST_CHGR
UG_CHGR
LX_CHGR
LG_CHGR
ILIM_CHGR
SRP_CHGR
SRN_CHGR
BATDRV_CHGR
BATSRC_CHGR
+6V_CHG_R EGN
12
PR325
Issued Date
Issued Date
Issued Date
10K_0402_1%
ACPRN_CHGR
12
PR327
12K_0402_1%
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
C
PR326
10K_0402_1%
1 2
Security Classification
Security Classification
Security Classification
THIS S HEET O F ENG INEERI NG DR AWING IS TH E PRO PRIETA RY PROPERTY OF COMPAL E LECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET O F ENG INEERI NG DR AWING IS TH E PRO PRIETA RY PROPERTY OF COMPAL E LECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET O F ENG INEERI NG DR AWING IS TH E PRO PRIETA RY PROPERTY OF COMPAL E LECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMP AL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAI NS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+19VB
2
12
12
PC305
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
PC306
10U_0805_25V6K
PR332 316K_0402_1%
1 2
68P_0402_50V8 J
@EMI@
PC317
0.047U_0603_25V7M
1 2
1 2
PR322 78.7K_0402_1%
1 2
PC324
0.1U_0402_25V6
1 2
12
12
PC325
0.1U_0402_25V 6
Deciphered Date
Deciphered Date
Deciphered Date
+19V_CHG
PC307
2200P_0402_50V7 K
EMI@
PC326
D
12
12
PC327
1 2
DH_CHGR_R
D
PC328
EMI@
EMI@
0.1U_0603_25V7 K
0.1U_0603_25V7 K
PC309 10U_0805_25V6 K
PQ305 AON7506_DFN33-8-5
5
4
123
PQ306
5
4
123
1 2
PC308 10U_0805_25V6 K
PR314 0_0603_5%
1 2
+3VLP
3.3*100/(316+100)=0.7 9 ICHG= 0.79 /(20*0.01)=3.95A
3.3*78.7/(316+78.7)=0. 66 ICHG= 0.66 /(20*0.01)=3.28A
0.1U_0402_25V 6
E
PQ302
AON6366E 1N DFN5X6-8
5
BATDRV_CHGR
BATSRC_CHGR
Choke 4.7uH SH00000YC00 (Common Part) (Size:6.6 x 7.3 x 3 mm) (DCR:28m~33m)
4.7UH_PCMB063T-4R7MS_8A_20%
PL301
1 2
12
PR319
4.7_1206_5%
EMI@
SNUB_CHGR
AON7506_DFN33-8-5
12
PC323
680P_0603_50V7 K
EMI@
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
charger
charger
charger
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
4
0.022U_0603_25 V7K
12
PR306
4.02K_0402_1%
1 2 3
PC302
1 2
+12.6V_BATT_CHG
12
PR307
10_0402_1%
4
3
SRN
E
+12.6V_BATT
12
PC320
10U_0805_25V6K
of
52 73Friday, March 31, 2017
of
52 73Friday, March 31, 2017
of
52 73Friday, March 31, 2017
PR318
0.01_1206_1%
1
2
SRP
H/L Side AON7506 SB000010A00 Rds(on):13~15.8mohm Vgs=20V Vds=30V ID= 10.5A (Ta=70C)
12
PC321
10U_0805_25V6K
1.A
1.A
1.A
Page 49
A
PL401
@EMI@
HCB2012KF-121T50_0805
1 1
+19VB
1 2
PJ403
@
112
JUMP_43X79
2
12
PC431
EMI@
12
PC403
0.1U_0402_25V 6
0.1U_0402_25V 6
@EMI@
+3VALWP
Check pull up resistor of SPOK at HW side
PR406
100K_0402_5%
SPOK_3V<45>
PL403
2 2
3 3
EC_ON<45>
MAINPWON<45,48,51>
+19VB
SPOK_5V<45>
@EMI@
HCB2012KF-121T50_0805
1 2
PJ404
@
2
112
JUMP_43X79
+3VLP
PR413
100K_0402_5%
PR410
2.2K_0402_5%
1 2
PR411
@
0_0402_5%
1 2
12
PC432
EMI@
0.1U_0402_25V 6
12
PR412
1M_0402_1%
+19VB_5V
12
12
PC414
10U_0805_25V6K
5V_EN
12
PC428
4.7U_0402_6.3V6 M
B
PU401
LX_3V
6
7
8
9
10
ENLDO_3V5V
12
PC417
0.1U_0402_25V 6
@EMI@
ENLDO_3V5V
SY8286BRAC_QFN20_3X3
5
LX
GND
GND
PG
NC
11
LX_5V
10
5V_EN
+19VB_3V
12
12
PC404
PC405
2200P_0402_50V7 K
EMI@
10U_0805_25V6K
12
3V_EN<45,55>
+19VB_5V BST_5V
12
12
PC415
PC416
10U_0805_25V6K
2200P_0402_50V7 K
EMI@
1
2
IN
IN3IN4IN
EN112EN2
FF13OUT14NC
15
3V_FB
PU402 SY8288CRAC_QFN20_3X3
5
6
LX
7
GND
8
GND
9
PG
NC
11
BST_3V
BS
20
LX
19
LX
18
GND
17
LDO
16
NC
21
GND
3.3V LDO 150mA~300mA
PC402 1000P_0402_25V8 J
1 2
2
1
IN
IN3IN4IN
EN112EN2
FF13OUT14LDO
15
1000P_0402_25V8 J
5V_FB
C
EN1 and EN2 do nt't floating
PR401
1 2
0_0603_5%
1K_0402_5%
1 2
BS
LX
LX
GND
VCC
NC
GND
1
PC427
4.7U_0402_6.3V6M
2
PC413
1 2
PC401
0.1U_0603_25V7 K
1 2
+3VLP
1
PC411
4.7U_0402_6.3V6M
2
PR403
PR408
1 2
0_0603_5%
20
LX_5V
19
18
17
16
21
PC419
1 2
4.7U_0402_6.3V6M
VL
5V LDO 150mA~300mA
PR407
1K_0402_5%
1 2
ENLDO_3V5V
Choke 1.5uH SH0 00016800 (Com mon Part) (Size:4.9 x 5.2 x 3 mm) (DCR:20m~25 m)
LX_3V
PR405
@EMI@
PC412
@EMI@
PC418
0.1U_0603_25V7 K
1 2
PL402
1 2
1.5UH_PCMB053T-1R5MS_6A_20%
12
4.7_1206_5%
3V_SN
12
680P_0603_50V7 K
12
PR409
@EMI@
5V_SN
12
PC426
@EMI@
12
PR404
150K_0402_1%
Choke 1.5uH SH0 00016700 (Com mon Part) (Size:7.3 x 6.6 x 3 mm) (DCR:14m~15 m)
PL404
1 2
1.5UH_9A_20%_7 X7X3_M
4.7_1206_5%
680P_0603_50V7 K
D
PR402 499K_0402_1%
1 2
+19VB
12
12
12
12
PC407
PC408
PC409
22U_0603_6.3V6 M
22U_0603_6.3V6 M
22U_0603_6.3V6 M
Vout is 3.234V~3.366V Ipeak=4.65A
Imax=3.25A Iocp=10A
12
12
PC420
22U_0603_6.3V6 M
Vout is 4.998V~5.202V Ipeak=9A
Imax=6.6A Iocp=10A
+3VALWP
12
12
PC429
PC410
22U_0603_6.3V6 M
PC430
@
@
22U_0603_6.3V6 M
22U_0603_6.3V6 M
+5VALWP
12
12
PC421
22U_0603_6.3V6 M
PC423
PC422
22U_0603_6.3V6 M
+3VALWP +3VALW
12
12
PC425
PC424
@
@
22U_0603_6.3V6 M
22U_0603_6.3V6 M
22U_0603_6.3V6 M
PJ401
@
112
JUMP_43X118
PJ402
@
112
JUMP_43X118
2
2
E
+5VALW+5VALWP
4 4
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Secur ity Cla ssifica tion
Issued Da te
Issued Da te
Issued Da te
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL
THIS SHEE T OF EN GINEE RING DRAW ING IS THE PROP RIETARY PROP ERTY OF COMPAL ELEC TRONICS, INC. AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS
DEPARTMENT EXCEP T AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NO R THE INFORMATION I T CONTAINS MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCL OSED TO ANY THIRD P ARTY WITHOUT PRIOR W RITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphere d Date
Deciphere d Date
Deciphere d Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
3.3VALWP/5VALWP
3.3VALWP/5VALWP
3.3VALWP/5VALWP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
D
Date: Sheet
53 73Friday, March 31, 2017
53 73Friday, March 31, 2017
53 73Friday, March 31, 2017
E
1.A
1.A
1.A
of
of
of
Page 50
A
1 1
PJ503
@
JUMP_43X79
2
112
+19VB
change PL501 from SM01000C000 to comm part SM01000P200
2 2
1 2
PL501
@EMI@
HCB2012KF-121T50_080 5
Choke 1uH SH00000YE00 (Common Part) (Size:6.86 x 6.47 x 3 mm) (DCR:6.2m~7.2m Ohm)
1UH_PCMC063T-1R0MN_11A_20 %
+1.2VP
PC52222 U_0603_6.3V6M
PC52322 U_0603_6.3V6M
PC52122 U_0603_6.3V6M
1
1
1
2
2
2
3 3
Mode Level +0.675VSP VTTREF_1.35V
4 4
S5 L off off S3 L off on S0 H on on
Note: S3 - sleep ; S5 - power off
A
PC52022 U_0603_6.3V6M
PC52422 U_0603_6.3V6M
PC52522 U_0603_6.3V6M
1
1
1
2
2
2
+19VB_1.2VP
+19VB_1.2VP
12
12
12
PC526
PC502
PC503
0.1U_0402_25V6
0.1U_0402_25V6
EMI@
@EMI@
EMI@
PL502
1 2
H/S AON7408 Rds(on) :typ:27m Ohm, max:34m Ohm Idsm(TA=25)=7.5A, Idsm(TA=70)=5.5A
L/S SI7716 Rds(on) :typ:13.5m Ohm, max:16.5m Ohm Idsm(TA=25)=16A, Idsm(TA=70)=9.5A
Choke: 7x7x3 Rdc=6.2mohm(Typ), 7.2moh m(Max)
Switching Frequency: 530kHz Imax=A, Iocp=A Iocp=10.63 ~12.7 6A OVP: 110%~120% VFB=0.607V, Vout=1.214V
2200P_0402_50V7K
PR504
@EMI@
4.7_1206_5%
PC518
@EMI@
680P_0402_50V7K
12
PC504
10U_0805_25V6K
LX_1.2VP
12
12
B
12
PC505
10U_0805_25V6K
5
0.1U_0603_25V7K
4
PQ503
123
AON7408L 1N DFN
PQ502
5
AON7506_DFN3X3-8-5
4
123
B
12
PC506
5.1_0603_5%
Issued D ate
Issued D ate
Issued D ate
1 2
1U_0402_10V6K
+5VALW +1.2VP
Security Classification
Security Classification
Security Classification
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PR505
C
Pin19 need pull separate from +1.35VP. If you have +1.35V and +0.675V sequence question, you can change from +1.35VP to +1.35VS.
PR502
BST_1.2VP_R
2.2_0603_5%
1 2
LG_1.2VP
IOCP
PR503
PC517
17.4K_0402_1%
1 2
12
CS_1.2VP
PC509
1U_0402_10V6K
1 2
VDD_1.2VP
PR511
2.2_0402_1%
+5VALW
+19VB_1.2VP
SYSON<14,45, 49,56>
SUSP#<14, 45,49,52 ,56,57>
SM_PG_CTRL<10>
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
C
BST_1.2VP
UG_1.2VP
LX_1.2VP
16
PU501
PHASE
15
LGATE
14
PGND
13
CS
RT8207PGQW_WQFN20_3X3
12
VDDP
11
VDD
12
PGOOD
10
Frequen cy
PR507
470K_0402_1%
1 2
PR501 0_0402_5%
1 2
PC501
@
0.1U_0402_10V7K
PR509
@
0_0402_5%
1 2
PR510 0_0402_5%
1 2
0.1U_0402_10V7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
17
UGATE
TON
9
TON_1. 2VP
@
18
8
EN_1.2VP
12
PC519
D
E
0.6Volt +/- 5% TDC 0.7A Peak Current 1A
+1.2VP
+0.6VSP
12
20
19
21
VTT
BOOT
S5
PAD
VTTGND
VTTSNS
GND
VTTREF
VDDQ
FB
6
FB_1.2VP
+0.6VSP
D
+1.2VP
1
2
3
4
5
VTTREF_1.2VP
6.19K_0402_1%
1 2
12
PR508 10K_0402_1%
PR506
Vout=0.75V* (1+Rup/Rdown)
=0.75*(1+(6.19/10)) =1.214V 1.2%
Vout=0.75V* (1+Rup/Rdown)
=0.75*(1+(8.2/10)) =1.365V 1.1%
JUMP_43X118
JUMP_43X39
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
VLDOIN
S3
7
EN_0.6VSP
12
12
PC507
PC508
10U_0603_6.3V6M
10U_0603_6.3V6M
12
PC516
0.033U_0402_16V7K
+1.2VP
PJ501
@
2
112
PJ502
@
2
112
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
DDR4
DDR4
DDR4
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
+1.2V_VDDQ
+0.6VS_VTT
E
1.A
1.A
54 73Friday, March 31, 2017
54 73Friday, March 31, 2017
54 73Friday, March 31, 2017
1.A
of
of
of
Page 51
A
+19VB_1VALW
PL601
1 1
+19VB
LDO_3V
12
PR607
0_0402_5%
ILMT_1VALW LDO_3V
12
PR609
@
0_0402_5%
The current limit is set to 6A, 8A or 12A when this pin is pull low, floating or pull high
2 2
@EMI@
HCB2012KF-121T50_0805
1 2
112
PJ602
@
JUMP_43X79
@
change PL601 SM01000C000 to comm part SM01000P200
2
12
12
PC616
PC604
EMI@
EMI@
0.1U_0603_25V7K 2200P_0402_50V7K
12
12
PC606
PC605
0.1U_0402_25V6 10U_0805_25V6K
@EMI@
EN_1VALW
ILMT_1VALW
+3VALW
EN_1VALW
12
12
1M_0402_1%
PR601
B
EN pin don't floating If have pull down resistor at HW side, pls delete PR702
+19VB_1VALW
PC601
@
0.22U_0402_10V6K
12
PR611
@
10K_0402_1%
1 2
PR603 10K_0402_1%
1 2
PU601
2
IN
3
IN
4
IN
5
IN
7
GND
8
GND
18
GND
11
EN
13
ILMT
15
BYP
SY8288RAC_QF N20_3X3
PC614 1U_0402_6.3V6K
PG
BS
LX
LX
LX
FB
VCC
NC
NC
NC
PAD
3V_EN <45,53>
+3VALW
9
1
LX_1VALW
6
19
20
FB_1VALW
14
17
10
12
16
21
0_0603_5%
PR606
1 2
12
PC613
2.2U_0402_6.3V6M
Pin 7 BYP is for CS. Common NB can delete +3VALW and PC15
C
PR605
@EMI@
4.7_1206_5%
PC603
0.1U_0603_25V7K
BST_1VALW_RBST_1VALW
1 2
Choke 1uH SH00000YE00 (Common Part) (Size:6.86 x 6.47 x 3 mm) (DCR:6.2m~7.2m Ohm)
1 2
1UH_11A_20%_ 7X7X3_M
1 2
FB = 0.6V
D
PC602
@EMI@
680P_0603_50V7K
SNUB_1VALW
1 2
PL602
12
12
Rup
PR608
12
PR610
Rdown
20K_0402_1%
Vout=0.6V* (1 +Rup/Rdown) =0.6*(1+(14/20)) Vout=1.02V
12
PC608
14K_0402_1%
330P_0402_50V7K
E
PJ601
@
JUMP_43X118
2
+1.0VALWP
12
12
PC610
PC609
22U_0603_6.3V6M
PC611
22U_0603_6.3V6M
22U_0603_6.3V6M
112
1
12
+
PC615
PC612
2
@
22U_0603_6.3V6M
220U_B2_4VM_R35M
+1.0VALW
+1.0VALWP
3 3
4 4
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
1V
1V
1V
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: She et
Date: She et
Date: She et
E
55 73Friday, March 31, 2017
55 73Friday, March 31, 2017
55 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 52
A
Current limit = 4.7A(min)
1 1
+3VS
PR7126
100K_0402_5%
12
VIN_1.0VSDGPUP
PC7127
22U_0603_6.3V6M
PU7105
PGND
1
FB
SGND
2
PG
3
IN
4
PGND
12
SY8003ADFC _DFN8_2X2
FB=0 .6 V
Note:I load( max)= 3A
B
PR7123 0_0402_5%
EN_1.8VS
12
PC7118
@
0.1U_0402_16V7K
12
12
PR7121
10K_0402_1%
1 2
PC7123
PR7122
20.5K_0402_1% 68P_0402_50V8J
12
PR7124
1M_0402_5%
9 8
7
EN
6
LX
5
NC
Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:2 0m~25 m)
LX_1.8V
1 2
1UH_2.8A_30%_4X4X2_F
12
PR7125
4.7_0603_5%
@EMI@
12
PC7124
680P_0402_50V7K
@EMI@
PL7103
Rup
FB_1.8V
Rdown
SUSP#
12
12
PC7119
22U_0603_6.3V6M
12
PC7125
C
SUSP# <14,45,49,52,54,57>
12
PC7126
22U_0603_6.3V6M
22U_0603_6.3V6M
@
+1.8VSP
D
E
PC7108
22U_0603_6.3V6M
PR7110 0_0402_5%
1 2
+3VALW
PC7107
@
0.1U_0402_16V7K
2
2
1
1
12
12
PJ7105
JUMP_43X79
@
EN_2.5V
VIN_2.5V
12
PR7113
1M_0402_5%
+5VALW
12
PC7210
1U_0402_6.3V6K
4 3 2 1
VDD VIN EN PGOOD
FB=0 .8 V
G9661MF11U_SO8PU7102
5
NC
6
VOUT
7
ADJ
8
GND
GND
9
+2.5VP +2.5V
+1.8VSP +1.8 VS
Note:I load( max)= 4A
12
PR7115
21.5K_0402_1%
FB_2.5V
PR7116
10K_0402_1%
+1.5 VS P: Imax=0.5A Ipeak=0.75A
12
Rup
12
Rdown Vout=0.8 V* (1+Rup/Rdo wn)
@
JUMP_43X79
@
JUMP_43X79
+2.5VP
12
12
PC7109
PC7110
PC7111
22U_0603_6.3V6M
22U_0603_6.3V6M
0.01U_0402_25V7K
@
Vout=0.8V* (1+(21.5/10)) = 2.52V (x1.008)
PJ7103
2
112
PJ7107
2
112
2 2
SYSON<14,45,49,54>
3 3
4 4
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
1.5VS/2.5V
1.5VS/2.5V
1.5VS/2.5V
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: She et
Date: She et
Date: She et
E
56 73Friday, March 31, 2017
56 73Friday, March 31, 2017
56 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 53
5
PL7201
@EMI@
D D
+19VB
HCB2012KF-121T50_0805
1 2
PJ7202
@
2
112
JUMP_43X79
+VCCIOP_B+
12
12
PC7217
PC7207
2200P_0402_50V7K
@EMI@
EMI@
0.1U_0402_25V6
12
PC7208
10U_0805_25V6K
+VCCIOP_EN
+VCCIOP_ILMT
+3VALW
PC7209
1U_0402_6.3V6K
+VCCIOP_LDO_3V
C C
12
@
0_0402_5%
+VCCIOP_ILMT
12
@
PR7217
0_0402_5%
PR7213
4
PU7201
2
IN
3
IN
4
IN
5
IN
7
GND
8
GND
18
GND
11
EN
13
ILMT
15
12
BYP
SY8288RAC_QF N20_3X3
Pin 7 BYP is for CS. Common NB can delete +3VALW and PC15
VR_ON<45,49,58>
SUSP#<14,45,49,52,54,56>
check delay time with HW
VR_ON
SUSP#
PG
BS
LX
LX
LX
FB
VCC
NC
NC
NC
PAD
9
1
6
19
20
14
17
10
12
16
21
@
0_0402_5%
1 2
1K_0402_5%
1 2
@
0_0603_5%
PR7202
+VCCIOP_BST +VC CIOP_BST_R
1 2
+VCCIOP_LX
+VCCIOP_FB
+VCCIOP_LDO_3V
12
PC7218
2.2U_0402_6.3V6M
PR7207
PR7208
+VCCIOP_EN
12
12
PR7201
PC7201
1M_0402_5%
0.1U_0402_25V6
3
PC7202
0.1U_0603_25V7K
1 2
PC7203
PL7202
SNB_+VCCI OP
PR7214
@
1K_0402_1%
PR7215
Rdown
20.5K_0402_1%
@EMI@
680P_0603_50V7K
1 2
12
PC7219
@
1 2
Rup
1 2
PR7218
12K_0402_1%
12
330P_0402_50V7K
PR7203
@EMI@
4.7_1206_5%
1 2
Choke 0.68uH SH00000Z300 (Common Part) (Size:4.85 x 4.7 x 2.8 mm) (DCR:1 1m~12 m)
0.68UH_7.9A_20%_5X5X3_M
1 2
FB = 0.6V
12
PR7212
VCCIO_SENS E_R
2
PJ7201
@
2
+1.0VS_V CCIOP +1.0VS_VCCIO
112
JUMP_43X118
1
Imax=3.85A, Ipeak=5.5A, Iocp:6.6A
+1.0VS_VCCIOP
12
12
12
12
PC7204
PC7205
10_0402_1%
PC7206
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
PR7209 0_0402_5%@
1 2
PR7210 0_0402_5%@
1 2
PC7211
12
22U_0603_6.3V6M
12
PC7212
22U_0603_6.3V6M
VCCIO_SENS E
VSSIO_SENSE
Note:Iload(max) =5.5A
PC7214
IOCP=7A~8A(typ)
@
22U_0603_6.3V6M
Vout=0.6V* (1 +Rup/Rdown) =0.6*(1+(12k/20.5k)) OVP=0.95V*115%=1. 0925V
Vout=0.951 V 2%
VCCIO_SENS E < 12>
VSSIO_SENSE <12>
B B
A A
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: She et
Date: She et
Date: She et
Compal Electronics, Inc.
C5PRH M/B LA-E921 P
C5PRH M/B LA-E921 P
C5PRH M/B LA-E921 P
Document Number Rev
Document Number Rev
Document Number Rev
1.0VS_VCCIO
1.0VS_VCCIO
1.0VS_VCCIO
1
57 73Friday, March 31, 2017
57 73Friday, March 31, 2017
57 73Friday, March 31, 2017
1.AC
1.AC
1.AC
of
of
of
Page 54
5
PR874
@
100_0402_1%
1 2
VSSSA_SENSE<12>
D D
VCCSA_SENSE<12>
+VCC_SA
+VCC_CORE
PR802
@
100_0402_1%
1 2
VCCSENSE<11>
VSSSENSE<11>
PC805
15P_0402_50V8J
1 2
PR809
3.3K_0402_1%
C C
H44e: PR160,PR162,PR165=127K H42: PR160,PR162,PR165=113K
SW1_3PH_A<59>
SW2_3PH_A<59>
SW3_3PH_A<59>
CSN1_3PH_A<59>
CSN2_3PH_A<59>
CSN3_3PH_A<59>
SW1_3PH_A
SW2_3PH_A
B B
SW3_3PH_A
1 2
Place close to IA choke PL803 (phase 1)
220K_0402_5%_ERTJ0EV224J
1 2
PR813 124K_0402_1%
1 2
PR814 124K_0402_1%
1 2
PR815 124K_0402_1%
1 2
PR816 10_0402_1%
1 2
PR817 10_0402_1%
1 2
PR818 10_0402_1%
PR819
1.65K_0402_1%
1 2
CSREF_3PH_A
PR820
1.65K_0402_1%
1 2
CSREF_3PH_A
PR821
1.65K_0402_1%
1 2
CSREF_3PH_A
PR805
@
100_0402_1%
1 2
PR807
49.9_0402_1%
1 2
PC806
2200P_0402_50V7K
1 2
12
PH801
2016/03/13 SL200000500->X1 ,Change to common part SL200002I00
CSP1_3PH_A
12
PC810
0.1U_0402_25V6
CSP2_3PH_A
12
PC811
0.1U_0402_25V6
CSP3_3PH_A
12
PC812
0.1U_0402_25V6
PC837
1000P_0402_50V7K
1 2
PR876
@
100_0402_1%
1 2
@
PR801
1 2
0_0402_5%
@
PR804
1 2
0_0402_5%
PC804
470P_0402_50V8J
1 2
PR808
604_0402_1%
1 2
12
PR811
12
75K_0402_1%
PC808
PC807
1 2
12
56P_0402_50V8
820P_0402_50V7K
PR812
165K_0402_1%
CSREF_3PH_A
1000P_0402_50V7K
619_0402_1%
1 2
1.5K_0402_1%
1 2
1000P_0402_50V7K
PC801
1000P_0402_50V7K
1 2
1K_0402_1%
1 2
2200P_0402_50V7K
CSCOMP_3PH_A CSSUM_3PH_A
1 2
1 2
1 2
PC836
PR873
PR875
PC838
PR803
PC802
PWM1_3PH_A/ICCMAX3A<59>
PWM2_3PH_A/ADDR<59>
PWM3_3PH_A/VBOOT<59>
4
VSN_1PH
VSP_1PH
VSP_3PH_A
VSN_3PH_A
H44e: PR806=22.6K H42: PR806=22.6K
PR806
23.2K_0402_1%
1 2
PC803
470P_0402_50V8J
1 2
PR810 13.7K_0402_1%H42 @
12
PC809
0.1U_0402_50V7K
+5VALW
Place close to IA MOS
100K_0402_1%_NCP15WF104F03RC
1 2
VRMP connect to 3A rail
1K_0402_1%
PC814
0.01U_0402_50V7K
1 2
1 2
PR826
2.2_0402_1%
100K_0402_1%_NCP15WF104F03RC
10_0402_1%
PC839
2200P_0402_25V7K
1 2
H44e: PR810=12.1K H42: PR810=13.7K
DIFFOUT_3PH_A
COMP_3PH_A
CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A
+19VB_CPU
12
PR825
12
PC815
1U_0402_10V6K
PH802
CPU spec: (SKL-H42 45W) VCC: 68A VCCGT: 54 A VCCSA: 11A
OCP Setting: VCC: 75A VCCGT: 61A
1 2
1 2
PC832
PC831
14K_0402_1%
1 2
12
PC834
VSN_1PH
VSP_1PH
53
TAB
PR870
12
52
51
VSP_1PH
15
VCCSA: 16.5A
12
IMON_1PH
CSP_1PH
CSN_1PH_R
ILIM_1PH
COMP_1PH
48
49
50
47
46
ILIM_1PH
CSP_1PH
VSN_1PH
CSN_1PH
IMON_1PH
COMP_1PH
PWM1_3PH_A/ICCMAX_3PH_A18PWM2_3PH_A/ADDR19PWM3_3PH_A/VBOOT20PWM3_3PH_B/ROSC_3PH21PWM2_3PH_B/ROSC_1PH22PWM1_3PH_B/ICCMAX_3PH_B23DRON
VCC16TTSENSE_3PH_A14VRMP
17
PR869
7.5K_0603_1%
1 2
PC830
PWM1_1PH/ICCMAX1
45
44
VR_RDY
PWM_1PH/ICCMAX_1PH
Place close to SA choke PL809
PR879
VSP_3PH_A VSN_3PH_A
FB_3PH_A
ILIM_3PH_A
0.1U_0402_25V6
PH805
1 2
12
PR872
1.5K_0402_1%
PC813
1 2
4700P_0402_25V7K
0.01U_0402_25V7K
1000P_0402_50V7K
15P_0402_50V8J
1
VSP_3PH_A
2
VSN_3PH_A
3
IMON_3PH_A
4
DIFFOUT_3PH_A
5
FB_3PH_A
6
COMP_3PH_A
7
ILIM_3PH_A
8
CSCOMP_3PH_A
9
CSSUM_3PH_A
10
CSREF_3PH_A
11
CSP1_3PH_A
12
CSP2_3PH_A
13
CSP3_3PH_A
TSENSE_3PH_A
PR871
12.4K_0402_1%
1 2
PC833
12
0.015U_0402_25V7K
1 2
PC835
DRON<59,60>
12
12
PR827
53.6K_0402_1%
PR828
3.92K_0402_1%
TSENSE_3PH_A TSENSE_3PH_B
12
PR823
0_0402_5%
Place close to
PR824
61.9K_0402_1%
GT MOS
100K_0402_1%_NCP15WF104F03RC
(Common Part) SL200002H0 0
12
12
12
470P_0402_50V7K
81205_ALERT
81205_SCLK
42
43
41
EN
SCLK
TTSENSE_1PH/PSYS24TTSENSE_3PH_B25CSP3_3PH_B
26
TSENSE_3PH_B
12
PH803
30.9K_0402_1%
37.4K_0402_1%
1 2
81205_SDIO
40
SDIO
ALRT#
IMON_3PH_B
DIFFOUT_3PH_B
COMP_3PH_B
CSCOMP_3PH_B
CSSUM_3PH_B
CSREF_3PH_B
CSP1_3PH_B CSP2_3PH_B
CSP3_3PH_B
PR829
24.9K_0402_1%
SW_1PH <60>CSN_1PH<60>
+3VS
12
10K_0402_5%
PR868
PR867
12
PR866 0_0402_5%@
PU801 NCP81205MNTXG_ QFN52_6X6
39
VRHOT#
38
VSP_3PH_B
37
VSN_3PH_B
36
DIFFOUT_3PH_B
35
FB_3PH_B
34
COMP_3PH_B
FB_3PH_B
33
ILIM_3PH_B
32
CSCOMP_3PH_B
ILIM_3PH_B
31
CSSUM_3PH_B
30
CSREF_3PH_B
29
CSP1_3PH_B
28
CSP2_3PH_B
27
PC816
0.1U_0402_25V6
1 2
12
12
PR830
PR831
97.6K_0402_1%
12
PR834
0_0402_5%
12
12
PR835
61.9K_0402_1%
3
PR800
PR858 100_0402_1%
1 2
97.6K_0402_1%
VR_PWRGD<45>
PWM1_1PH/ICCMAX1 <60>
VR_ON <45,49,57>
+1.0V_VCCST
PR859
@
1K_0402_1%
1 2
VR_HOT#<45>
1 2
PR848 16.2K_0402_1%
PR833 20K_0402_1%
1 2
1 2
PR832
43.2K_0402_1%
PWM1_3PH_B /ICCMAX3 B<59>
PWM2_3PH_B/DOSC1<59>
81205_SCLK
PR862 49.9_0402_1%
81205_ALERT
PR861 0_0402_5%@
81205_SDIO
PR860 10_0402_1%
PR853
1K_0402_1%
1 2
1 2
PC827
2200P_0402_50V7K
12
PC820
0.1U_0402_50V7K
PSYS_MON <52>
Prevention current imbalance
Prevention current imbalance
CSP1_3PH_B
@
1.65K_0402_1%
CSP2_3PH_B
@
1.65K_0402_1%
CSP3_3PH_B
PC822
1 2
1 2
1 2
1 2
PR852
24.9K_0402_1%
1 2
PC826
470P_0402_50V8J
1 2
1 2
PC821
680P_0402_50V7K
PR878
PR877
+5VALW
2
+1.0V_VCCST
12
12
12
12
PR863
100_0402_1%
PR857
@
PR856 0_0402_5%
PC828
2200P_0402_50V7K
PR854 0_0402_5%
12
56P_0402_50V8
12
12
12
H42@
1K_0402_1%
100_0402_1%
1 2
@
1 2
PR855
@
100_0402_1%
@
Place close to GT choke PL806
12
12
(phase 1)
PH804
220K_0402_5%_ERTJ0EV224J
PR847
75K_0402_1%
12
2016/03/13 SL200000500->X1 ,Change to common part SL200002I00
PR846
165K_0402_1%
PR839
1.65K_0402_1%
PC819
0.1U_0402_25V6
PC818
0.1U_0402_25V6
PR836
1 2
PR838
1.65K_0402_1%
1 2
12
12
PHASE DETECTION
PR864
100_0402_1%
@
12
12
CSREF_3PH_B
CSREF_3PH_B
PR865
+VCC_GT
PR851
49.9_0402_1%
1 2
45.3_0402_1%
VCCGT_SENSE <11 >
VSSGT_SENSE <1 1>
1 2
604_0402_1%
PC829
0.1U_0402_25V6
CPU_SVID_CLK<10>
CPU_SVID_ALERT#_R<10>
CPU_SVID_DA T <10>
PC825
470P_0402_50V8J
1 2
PR850
H44e: PR843,PR844,PR845=147K H42: PR843,PR844,PR845=74.1K
12
PR84586.6K_0402_1%
12
PR84486.6K_0402_1%
12
PR84210_0402_1%
12
PR84110_0402_1%
SW1_3PH_B
SW2_3PH_B
15P_0402_50V8J
1 2
PR849
3.3K_0402_1%
SW1_3PH_B <59>
SW2_3PH_B <59>
CSN1_3PH_B <59>
CSN2_3PH_B <59>
PC824
1 2
2200P_0402_50V7K
1 2
1
PC823
A A
Title
Title
Title
CPU_IC
CPU_IC
CPU_IC
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev C5PRH M/B LA-E921P 1. A
D
C5PRH M/B LA-E921P 1. A
D
C5PRH M/B LA-E921P 1. A
D
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
58 73Friday, March 31, 2017
58 73Friday, March 31, 2017
58 73Friday, March 31, 2017
of
of
of
Page 55
5
PR898
PR881
PC880
2.2U_0402_6.3V6M
0_0603_5%
1 2
PU802 NCP81 151 MNTB G_ DFN8_ 2X 2
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
9
8
7
6
5
PC881
0.22U_0603_25V7K
DRVH1_VCORE
BOOT1_VCORE
D D
PWM1_3PH_A/ICCMA X3A<58>
DRON<58,60>
+5VALW
12
0_0603_5%
DRVH1_VCORE- 1
1 2
AON6992 2N DFN5X6D
12
VSW1_VCORE
DRVL1_VCORE
1
PQ801
7
D2/S1
6
4
(Common Part) SF000007100 100U 25V M 6.3X6
12
2
D1
G1
S24S2
S23G2
5
PC844
10U_0805_25VAK
PC843
10U_0805_25VAK
12
@
VSW1_VCORE
12
EMI@
PR882
4.7_1206_5%
SNB1_VCORE
12
EMI@
PC882 680P_0603_50V7K
12
PC873 100U_25V_M
PC870
PC842
10U_0805_25VAK
10U_0805_25VAK
12
1
+
2
PL803
0.15UH_MMD06CZER15MG_37A_20%
134
2
+19VB_CPU
@
PC872 100U_25V_M
12
12
12
1
+
PC895
PC897
PC896
2
EMI@
EMI@
EMI@
0.1U_0603_25V7K
0.1U_0603_25V7K
Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%)
+VCC_CORE
CSN1_3PH_A <58>
SW1_3PH_A<58>
0.1U_0603_25V7K
PL800
EMI@
HCB2012 KF- 121 T50_ 080 5
1 2
PL801
EMI@
HCB2012 KF- 121 T50_ 080 5
1 2
PJ801 JUMP_43X118@
112
PWM1_3PH_B/ICCMA X3B<58>
3
+19VB
PR890
0_0603_5%
BOOT1_VCCGT
DRON
12
PC889
2.2U_0402_6.3V6M
1 2
PU805 NCP81 151 MNTB G_ DFN8_ 2X 2
1
BST
FLAG
2
PWM
DRVH
3
EN
SW
4
VCC
GND
DRVL
9
8
7
6
5
PC890
0.22U_0603_25V7K
DRVH1_VCCGT
VSW1_VCCGT
12
2
+5VALW
1 2
PR897 0_0603_5%
DRVL1_VCCGT
2
DRVH1_VCCGT-1
1
near choke
+19VB_CPU
+VCC_GT
CSN1_3PH_B <58>
SW1_3PH_B<58>
PC854
PC855
PC856
10U_0805_25V6K
12
12
2
1
PQ807
D1
G1
AON6992_PDFN56-8-7
7
D2/S1
VSW1_VCCGT
S24S2
S2
5
3G26
12
@EMI@
PR891
4.7_1206_5%
SNB1_GT
12
@EMI@
PC891 680P_0603_50V7K
PC853
10U_0805_25V6K
10U_0805_25V6K
10U_0805_25V6K
12
12
@
PL806
0.15UH_MMD06CZER15MG_37A_20%
134
2
Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%)
PC848
10U_0805_25VAK
12
12
PR884
0_0603_5%
BOOT2_VCORE
1 2
C C
PWM2_3PH_A/ADDR<58>
B B
PWM3_3PH_A/VBOOT<58>
A A
+5VALW
+5VALW
DRON
DRON
12
PC883
2.2U_0402_6.3V6M
BOOT3_VCORE
12
PC886
2.2U_0402_6.3V6M
1
2
3
4
1 2
1
2
3
4
5
PU803 NCP81 151 MNTB G_ DFN8_ 2X 2
BST
PWM
EN
VCC
PR887
0_0603_5%
PU804 NCP81 151 MNTB G_ DFN8_ 2X 2
BST
PWM
EN
VCC
PC884
0.22U_0603_25V7K
9
FLAG
DRVH2_VCORE
8
DRVH
7
SW
6
GND
DRVL
FLAG
DRVH
SW
GND
DRVL
5
9
8
7
6
5
PC887
0.22U_0603_25V7K
DRVH3_VCORE
DRVL2_VCORE
PR896
0_0603_5%
DRVH2_VCORE- 1
1 2
12
AON6992 2N DFN5X6D
VSW2_VCORE
PR895
0_0603_5%
DRVH3_VCORE- 1
1 2
AON6992 2N DFN5X6D
12
VSW3_VCORE
DRVL3_VCORE
2
1
D1
G1
PQ803
7
D2/S1
S24S2
5
6
1
G1
PQ805
7
D2/S1
5
6
@
S23G2
2
D1
S24S2
12
EMI@
PR885
4.7_1206_5%
SNB2_VCORE
12
EMI@
PC885 680P_0603_50V7K
PC852
10U_0805_25VAK
12
12
S23G2
12
EMI@
PR888
4.7_1206_5%
SNB3_VCORE
12
EMI@
PC888 680P_0603_50V7K
4
PC845
PC867
PC846
10U_0805_25VAK
10U_0805_25VAK
12
12
@
@
PL804
0.15UH_MMD06CZER15MG_37A_20%
134
2
PC850
PC851
PC849
10U_0805_25VAK
10U_0805_25VAK
12
12
@
@
PL805
0.15UH_MMD06CZER15MG_37A_20%
134
2
10U_0805_25VAK
Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%)
10U_0805_25VAK
Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%)
+19VB_CPU
+VCC_CORE
CSN2_3PH_A <58>
SW2_3PH_A<58>
+19VB_CPU
+VCC_CORE
CSN3_3PH_A <58>
SW3_3PH_A<58>
PR893
0_0603_5%
BOOT2_VCCGT
1 2
0.22U_0603_25V7K PU806 NCP81 151 MNTB G_ DFN8_ 2X 2
1
9
BST
FLAG
2
PWM2_3PH_B/DOSC1<58>
+5VALW
3
DRON
12
PC892
2.2U_0402_6.3V6M
For H-line 42:::: VCC_CORE (LL=1.8m) FSW = 600kHz DCR = 0.9m Ohm +/- 7%
I(max)=50A I(peak)=68A OCP=75A Vboot=0V TYP MAX H/S_AON6428 Rds(on) = 11.3m Ohm , 1 4.5m Ohm L/S_AON6794 Rds(on) = 2.8m Ohm , 3.5m Ohm
8
PWM
DRVH
3
7
EN
SW
4
6
VCC
GND
5
DRVL
DRVH2_VCCGT-1
PC893
DRVH2_VCCGT
VSW2_VCCGT
1 2
PR899 0_0603_5%
12
DRVL2_VCCGT
For H-line 42:::: VCC_GT (LL=2.65m) FSW = 600kHz DCR = 0.9m Ohm +/- 7%
I(max)=25A I(peak)=55A OCP=61A Vboot=0V
DaulMOS MDU5692S TYP MAX H/S Rds(on) = 6.7m Ohm , 8.5m Ohm L/S Rds(on) = 2.1m Ohm , 2.5m Ohm
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS S HEE T O F E NGINE ERING DR AWING IS THE P ROPR IETA RY P ROPE RTY OF C OMPA L ELE CTRON ICS, INC . AND C ONTAINS CONFIDENTIAL
THIS S HEE T O F E NGINE ERING DR AWING IS THE P ROPR IETA RY P ROPE RTY OF C OMPA L ELE CTRON ICS, INC . AND C ONTAINS CONFIDENTIAL
THIS S HEE T O F E NGINE ERING DR AWING IS THE P ROPR IETA RY P ROPE RTY OF C OMPA L ELE CTRON ICS, INC . AND C ONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MA Y NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MA Y NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N O F R& D
AND TRADE SECRET INFORMATION. THIS SHEET MA Y NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N O F R& D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCL OSED TO A NY THIRD P ARTY WITHOUT P RIOR WRITTEN CONSE NT OF COMPA L ELEC TRONICS, INC.
MAY BE USED BY OR DISCL OSED TO A NY THIRD P ARTY WITHOUT P RIOR WRITTEN CONSE NT OF COMPA L ELEC TRONICS, INC.
MAY BE USED BY OR DISCL OSED TO A NY THIRD P ARTY WITHOUT P RIOR WRITTEN CONSE NT OF COMPA L ELEC TRONICS, INC.
2
1
PQ809
D1
G1
AON6992_PDFN56-8-7
7
D2/S1
S24S2
S23G2
5
6
Compal Secret Data
Compal Secret Data
Compal Secret Data
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2
Decipher ed Date
Decipher ed Date
Decipher ed Date
PC859
PC860
10U_0805_25V6K
12
12
0.15UH_MMD06CZER15MG_37A_20%
12
@EMI@
PR894
4.7_1206_5%
SNB2_GT
12
@EMI@
PC894 680P_0603_50V7K
10U_0805_25V6K
12
134
2
PC857
PC858
@
10U_0805_25V6K
12
PL807
10U_0805_25V6K
Choke 0.15uH SH00000X700 (Size:6.59 x 6.6 x 3.0 mm) (DCR:0.9m +-7%)
+19VB_CPU
+VCC_GT
CSN2_3PH_B <58>
SW2_3PH_B<58>
near choke
Function Field : Drivers - 36.2 Rest of support elements - 36.3 Acoustic Noise B+ Bulk CAP - 37.2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
C5PRH M/B LA-E921 P
C5PRH M/B LA-E921 P
C5PRH M/B LA-E921 P
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
VCC/VCCGT
VCC/VCCGT
VCC/VCCGT
Date: She et
Date: She et
Date: She et
1
59 73Friday, March 31, 2017
59 73Friday, March 31, 2017
59 73Friday, March 31, 2017
1.ACustom
1.ACustom
1.ACustom
of
of
of
Page 56
5
4
3
2
1
PC841
PC847
12
12
PR8992
D D
PWM1_1PH/ICCMAX1<58>
DRON<58,59>
+5VALW
C C
0_0603_5%
1 2
BST_+VCC_SA
12
PC898
2.2U_0402_6.3V6M
BST_R_+VCC_SA
PU808 NCP81253MNTBG_DFN8_2X2
1
BST
2
PWM
3
EN
4
VCC
For H-line 42:::: VCC_SA (LL=10m) FSW = 600kHz DCR = 6.2m Ohm +/- 5%
I(max)= 10 A I(peak)=11 .1A OCP=16 .5A Vboo t= 1.0 5V
DaulMOS AON7934 TYP MAX H/S Rds(on) = 12.4m Ohm , 15.8m Ohm L/S Rds(on) = 9.1m Ohm , 11.6m Ohm
0.22U_0603_25V7K
DRVH
SW
GND
DRVL
PAD
9
PC899
1 2
8
SW_+VCC_SA
7
6
5
HG_+VCC_SA
LG_+VCC_SA
10U_0805_25V6K
Choke 0.47uH SH00001ED00 (Commom Part)
4
3
2
1
D1
D1
D1
G1
9
D2/S1
G2
8
10
D1
PQ811
S2
S2
S2
AON7934_DFN3X3A8-10
6
7
5
(Size:5.7 x 5.4 x 3.0 mm) (DCR:6.2m +-5%)
0.47UH_MMD05CZR47M_12A_20 %
SW_+VCC_SA
12
@EMI@
PR8991
4.7_1206_5%
SNB_SA
12
@EMI@
PC8991
680P_0603_50V7K
PC866
@
12
10U_0805_25V6K
PL809
1
2
PC865
@
12
10U_0805_25V6K
10U_0805_25V6K
4
3
+19VB_CPU
+VCC_SA
CSN_1PH<58>
SW_1PH <58>
B B
Function Field :
A A
Security Classification
Security Classification
Security Classification
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
2016/11/03 2017/06/14
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Drivers - 36.2 Rest of support elements - 36.3
Compal Electronics, Inc.
Compal Electronics, Inc.
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
VCCSA
VCCSA
VCCSA
60 73Friday, March 31, 2017
60 73Friday, March 31, 2017
60 73Friday, March 31, 2017
of
of
1
of
1.ACustom
1.ACustom
1.ACustom
Page 57
+VCC_CORE
5
Common part SGA0000BT00
1
1
+
+
PC868
2
2
+VCC_CORE
D D
220U_D2_2V_ Y
12
PC1001
Total VCORE Output Capacitor:
PC869
2 X 220uF 20 X 22uF_0603_X5R
220U_D2_2V_ Y
63 X 1uF_0201
12
12
PC1002
22U_0603_6.3 V6M
12
PC1003
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
PC1005
PC1004
22U_0603_6.3 V6M
12
12
PC1006
22U_0603_6.3 V6M
12
PC1007
22U_0603_6.3 V6M
22U_0603_6.3 V6M
4
Common part SGA0000BT00
+VCC_GT
12
12
PC1009
PC1008
22U_0603_6.3 V6M
PC1010
22U_0603_6.3 V6M
22U_0603_6.3 V6M
+VCC_GT
1
1
+
+
PC877
PC876
2
2
220U_D2_2V_ Y
@
12
12
12
PC1103
PC1102
PC1101
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
Total VCCGT Output Capacitor: 1 X 220uF 18 X 22uF_0603_X5R 68 X 1uF_0201
560U_D2_2V M_R4.5M
12
12
PC1104
22U_0603_6.3 V6M
22U_0603_6.3 V6M
3
2
1
+VCC_GT
12
12
PC1107
PC1106
PC1105
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
@
12
12
PC1108
22U_0603_6.3 V6M
12
PC1109
PC1110
22U_0603_6.3 V6M
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
12
12
PC1121
12
PC1122
PC1641
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
12
12
PC1643
PC1642
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1644
22U_0603_6.3 V6M
12
PC1645
PC1646
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
12
12
PC1648
PC1647
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
12
PC1011
12
PC1021
C C
B B
@
12
12
PC1034
PC1033
1U_0201_6.3V6M
12
12
PC1045
PC1044
1U_0201_6.3V6M
12
12
PC1056
PC1055
1U_0201_6.3V6M
12
PC1066
12
12
PC1012
22U_0603_6.3 V6M
12
PC1022
22U_0603_6.3 V6M
12
PC1035
1U_0201_6.3V6M
12
PC1046
1U_0201_6.3V6M
12
PC1057
1U_0201_6.3V6M
12
PC1067
1U_0201_6.3V6M
12
PC1013
PC1014
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1023
PC1024
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1037
PC1036
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1048
PC1047
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1058
PC1059
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1069
PC1068
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1015
22U_0603_6.3 V6M
12
PC1025
@
22U_0603_6.3 V6M
12
PC1038
1U_0201_6.3V6M
12
PC1049
1U_0201_6.3V6M
12
PC1060
1U_0201_6.3V6M
12
PC1070
1U_0201_6.3V6M
12
PC1016
PC1017
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1027
PC1026
@
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1039
PC1040
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1050
PC1051
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1062
PC1061
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1072
PC1071
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1018
22U_0603_6.3 V6M
12
PC1028
@
22U_0603_6.3 V6M
12
PC1041
1U_0201_6.3V6M
12
PC1052
1U_0201_6.3V6M
12
PC1063
1U_0201_6.3V6M
12
PC1073
1U_0201_6.3V6M
12
PC1019
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1029
@
22U_0603_6.3 V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
@
22U_0603_6.3 V6M
12
12
PC1042
1U_0201_6.3V6M
12
12
PC1053
1U_0201_6.3V6M
12
12
PC1064
1U_0201_6.3V6M
12
12
PC1074
1U_0201_6.3V6M
12
12
PC1111
PC1020
22U_0603_6.3 V6M
PC1030
22U_0603_6.3 V6M
PC1043
1U_0201_6.3V6M
PC1054
1U_0201_6.3V6M
PC1065
1U_0201_6.3V6M
PC1075
1U_0201_6.3V6M
PC1112
22U_0603_6.3 V6M
@
@
12
12
PC1124
PC1123
1U_0201_6.3V6M
12
12
PC1133
PC1134
1U_0201_6.3V6M
12
12
PC1144
PC1143
1U_0201_6.3V6M
12
12
PC1154
PC1153
1U_0201_6.3V6M
12
12
PC1164
PC1163
1U_0201_6.3V6M
12
12
PC1113
22U_0603_6.3 V6M
12
PC1125
1U_0201_6.3V6M
12
PC1135
1U_0201_6.3V6M
12
PC1145
1U_0201_6.3V6M
12
PC1155
1U_0201_6.3V6M
12
PC1165
1U_0201_6.3V6M
12
PC1114
PC1115
22U_0603_6.3 V6M
22U_0603_6.3 V6M
@
12
12
PC1127
PC1126
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1137
PC1136
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1147
PC1146
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1156
PC1157
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1166
PC1167
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1117
PC1116
22U_0603_6.3 V6M
22U_0603_6.3 V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
@
12
12
PC1129
PC1128
1U_0201_6.3V6M
12
12
PC1139
PC1138
1U_0201_6.3V6M
12
12
PC1149
PC1148
1U_0201_6.3V6M
12
12
PC1159
PC1158
1U_0201_6.3V6M
12
12
PC1169
PC1168
1U_0201_6.3V6M
12
12
PC1118
22U_0603_6.3 V6M
12
PC1130
1U_0201_6.3V6M
12
PC1140
1U_0201_6.3V6M
12
PC1150
1U_0201_6.3V6M
12
PC1160
1U_0201_6.3V6M
12
PC1170
1U_0201_6.3V6M
12
PC1119
PC1120
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
1U_0201_6.3V6M
12
1U_0201_6.3V6M
12
1U_0201_6.3V6M
12
1U_0201_6.3V6M
12
1U_0201_6.3V6M
22U_0603_6.3 V6M
12
PC1131
PC1132
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1141
PC1142
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1152
PC1151
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1162
PC1161
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1172
PC1171
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1649
@
12
22U_0603_6.3 V6M
+VCC_SA
12
12
PC1650
@
22U_0603_6.3 V6M
PC1652
PC1651
@
22U_0603_6.3 V6M
@
Total VCCSA Output Capacitor: 10(+2) X 22uF_0603 7 X 1uF_0201
12
12
12
12
PC1904
1U_0201_6.3V6M
12
12
PC1654
PC1653
@
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1192
PC1191
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1198
PC1197
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1905
PC1906
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1656
PC1655
@
@
22U_0603_6.3 V6M
PC1193
22U_0603_6.3 V6M
PC1199
22U_0603_6.3 V6M
PC1907
1U_0201_6.3V6M
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
12
PC1194
PC1195
22U_0603_6.3 V6M
12
PC1901
22U_0603_6.3 V6M
12
PC1908
1U_0201_6.3V6M
PC1196
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1903
PC1902
@
@
22U_0603_6.3 V6M
22U_0603_6.3 V6M
12
12
PC1910
PC1909
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1076
A A
12
PC1086
12
12
PC1078
PC1077
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1087
PC1088
1U_0201_6.3V6M
1U_0201_6.3V6M
5
12
12
PC1079
1U_0201_6.3V6M
12
PC1089
1U_0201_6.3V6M
12
PC1080
PC1081
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1090
PC1091
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1083
PC1082
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1092
PC1093
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1084
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1094
1U_0201_6.3V6M
1U_0201_6.3V6M
4
12
PC1085
1U_0201_6.3V6M
PC1095
1U_0201_6.3V6M
PC1173
12
12
PC1174
1U_0201_6.3V6M
12
PC1175
PC1176
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1183
PC1184
1U_0201_6.3V6M
12
12
PC1178
PC1177
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1186
PC1185
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1180
PC1179
1U_0201_6.3V6M
1U_0201_6.3V6M
12
12
PC1188
PC1187
1U_0201_6.3V6M
1U_0201_6.3V6M
Security Classif ication
Security Classif ication
Security Classif ication
Issued D ate
Issued D ate
Issued D ate
THIS S HEET O F E NGINEERING DRAW ING I S THE PR OPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET O F E NGINEERING DRAW ING I S THE PR OPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS S HEET O F E NGINEERING DRAW ING I S THE PR OPRIETARY PROPERTY OF CO MPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TR ADE S ECRET IN FORMATIO N. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE S ECRET IN FORMATIO N. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TR ADE S ECRET IN FORMATIO N. THIS SH EET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFO RMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET N OR THE INFO RMATION IT CONTAINS MAY BE USE D B Y O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USE D B Y O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USE D B Y O R DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
12
12
PC1182
PC1181
1U_0201_6.3V6M
12
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
12
PC1189
PC1190
1U_0201_6.3V6M
1U_0201_6.3V6M
Compal Secret Data
Compal Secret Data
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Titl e
Titl e
Titl e
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Compal Electronics, Inc.
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
CPU CAP
CPU CAP
CPU CAP
1
61 73Friday, March 31, 2017
61 73Friday, March 31, 2017
61 73Friday, March 31, 2017
1.ACustom
1.ACustom
1.ACustom
Page 58
A
1 1
PC1706
1.35VSDGPUP_TON_R
12
0.1U_0402_25V6 PR1702
+19VB_1.35VSDGPUP
+3VS
1.35VSDGPU_PG<35 >
+3VS
1.35VSDGPU_EN
2 2
PC1715
0.1U_0402_25V6
@
49.9_0402_1%
@
680P_0402_50V7K
12
PC1716
2200P_0402_50V7K
PR1721
PC1721
12
2.2_0402_1%
PR1705
10K_0402_5%
1 2
PR1710 1K_0402_1%
12
12
PR1722
P5@
30.9K_0402_1%
12
12
PR1707
@
1 2
0_0402_5%
12
12
12
R1
PR1712
10K_0402_1%
R2
PR1715
35.7K_0402_1%
P55@
Frequen cy
PR1703
383K_0402_1%
12
1.35VSDGPU_EN_R
PR1708
@
100K_0402_5%
1.35VSDGPUP_VREF
1.35VSDGPUP_VREF_SS
12
47P_0402_50V8J
12
12
1.35VSDGPUP_TON HGATE1_1.35VSDGPUP
12
0.1U_0402_25V6
1 2
@
PC1717
R3
PR1718
PC1015.2的GND 單獨 打 vi a下地
PR1723
P5@
68.1K_0402_1%
P55@
52.3K_0402_1%
3 3
3
5
PQ1703B
4
61
PQ1703A
DMN53D0LDW-7 2N SOT363-6
+3VALW
MEM_VDD_CTL<25>
PR1719
10K_0402_5%
PR1720
0_0402_5%
12
12
2
12
B
PU1701
9
TON
13
PGOOD
3
EN
4
PC1711
PSI
5
VID
8
VREF
7
REFIN
6
REFADJ
11
SS
21
GND
RT8812AGQW-GP
OPS
The GND trace need c lose to GPU pin E51 or F52. Differential with FB_VDDQ_SENSE.
C
+5VALW
PR1701
2.2_0603_5%
1 2
RT8812_PVCC
18
PVCC
FB_VDDQ_SENSE<30>
R1 R2 R3 Vout Hynix@ Samsung@
10 35.7 NA 1.55 0.8% 10 35.7 52.3 1.352 0.7%
Micron@
10 30.9 NA 1.5 0.7% 10 30.9 68.1 1.36 0.74%
12
UGATE1
BOOT1
PHASE1
LGATE1
UGATE2
BOOT2
PHASE2
LGATE2
VSNS
RGND
PC1701
2.2U_0603_16V6K
2
BST1_1.35VSDGPUP
1
LX1_1.35VSDGPUP
20
LGATE1_1.35VSDGPUP
19
HGATE2_1.35VSDGPUP
14
BST2_1.35VSDGPUP
15
LX2_1.35VSDGPUP
16
LGATE2_1.35VSDGPUP
17
FB_VDDQ_SENSE_R
12
10
PR1716
0_0402_5%
12
PR1706 2.2_0603_1%
PR1709
12
8.25K_0402_1%
PR1711 2.2_0603_1%
12
PR1717
0_0402_5%
BST1_1.35VSDGPUP_R
12
IOCP
BST2_1.35VSDGPUP_R
12
1 2
12
PC1718
0.1U_0402_25V6
PR1713 100_0402_5%
PC1707
0.22U_0603_25V7K
12
PC1714
0.22U_0603_25V7K
12
D
+19VB_1.35VSDGPUP
12
12
12
PC1703
PC1702
EMI@
0.1U_0402_25V6
EMI@
2200P_0402_50V7K
2
1
PQ1701
D1
G1
D2/S1
S24S2
S2
G2
5
3
6
2
1
PQ1702
D1
G1
D2/S1
S24S2
S2
G2
5
3
6
+1.35VSDGPUP Vout = 1.35V TDC = 16.9A Peak Current = 24.2A OCP=36.3A FSW=400kHz DaulMOS AON6992 TYP MAX
H/S Rds(on) = 6.8mohm ,8.6mohm L/S Rds(on) = 2.0mohm ,2.5mohm
Choke 1uH SH00000YE00 (Common Part) (Size:7.6 x 6.6 x 3 mm)
AON6992 2N DFN5X6D
(DCR:6.7m~7.4m)
7
12
PR1704
4.7_1206_5%
12
PC1708 680P_0402_50V7K
Choke 1uH SH00000YE00 (Common Part) (Size:7.6 x 6.6 x 3 mm)
AON6992 2N DFN5X6D
(DCR:6.7m~7.4m)
7
1UH_11A_20%_7X7X3_M
12
PR1714
4.7_1206_5%
12
PC1719 680P_0402_50V7K
1UH_11A_20%_7X7X3_M
1 2
EMI@
EMI@
PL1702
1 2
EMI@
EMI@
PL1701
10U_0805_25V6K
12
PC1704
PC1705
10U_0805_25V6K
10U_0805_25V6K
12
12
PC1713
PC1712
10U_0805_25V6K
E
PJ1701
@
JUMP_43X79
2
112
+1.35VSDGPU
1
+
PC1709
PC1710
2
220U_D2 SX_2VY_R9M
Common part SGA0000 BT 00
+19VB_GPU
1
+
2
220U_D2 SX_2VY_R9M
PC1720
0.1U_0402_25V6
DMN53D0LDW-7 2N SOT363-6
4 4
Security Classification
Security Classification
Security Classification
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
VRAM
VRAM
VRAM
Size Docu ment Numbe r Rev
Size Docu ment Numbe r Rev
Size Docu ment Numbe r Rev
A3
A3
A3
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: Sheet
Date: Sheet
Date: Sheet
62 73Friday, March 31, 2017
62 73Friday, March 31, 2017
62 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 59
A
1 1
VIN_1.0VSDGPUP
PJ1801
@
JUMP_43X79
+3VS
NVVDD2_EN<25,35,67>
2 2
112
0_0402_5%
B
PC1801
22U_0603_6.3V6M
1 2
PR1801
VIN_1.0VSDGPUP
12
PC1806
0.1U_0402_16V7K
2
1VSDGPU_PG<2 5>
PR1804
12
Note: When design Vin=5V, please stuff snubber to prevent Vin damage
+3VS
1VSDGPU_EN_ R
PR1805
1M_0402_1%
1 2
10K_0402_5%
12
PU1801
SY8032ABC_SO T23-6
4
IN
5
PG
GND
FB6EN
LX
3
2
1
LX_1.0VSDGPU P
C
Choke 1uH SH00000YG00 (Common Part) (Size:3.8 x 3.8 x 1.9 mm) (DCR:2 0m~25 m)
PL1801
1UH_2.8A_30%_4X4X2_F
1 2
12
EMI@
PR1802
4.7_0603_5%
SNUB_1.0VS DGPUP
12
EMI@
PC1807 680P_0402_50V7K
13.7K_0402_1%
FB_1.0VSDGPUP
Rdown
20K_0402_1%
PR1803
PR1806
Rup
12
PC1802
12
D
PJ1802
@
JUMP_43X79
2
+1.0VSDG PUP +1.0VSDG PU
112
Imax= 0.7A, Ipeak= 1.1A
+1.0VSDG PUP
12
68P_0402_50V8J
12
12
12
VFB=0.6V
PC1804
PC1803
22U_0603_6.3V6M
22U_0603_6.3V6M
Vout=0.6V* (1 +Rup/Rdown)
PC1805
=0.6V* (1+13.7/20)
@
22U_0603_6.3V6M
Vout=1.011 V
E
3 3
4 4
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2016/11/03 2017/06/14
2016/11/03 2017/06/14
2016/11/03 2017/06/14
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
D
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Compal&Electronics,&Inc.
Title
Title
Title
1.05VSDGPU
1.05VSDGPU
1.05VSDGPU
Size
Size
Size
Document Number Rev
Document Number Rev
Document Number Rev
C
C
C
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
C5PRH&M/B&LA-E921P
Date: She et
Date: She et
Date: She et
E
63 73Friday, March 31, 2017
63 73Friday, March 31, 2017
63 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 60
5
D D
PR1207 for OCP setting
Close to PU1201
0_0402_5%
NVVDD1_VCC_SENSE<3 0>
+NVVDD1
C C
NVVDD1_VSS_SENSE<30>
+3VALW
NVVDD1_EN<25,35>
+3VS
B B
+1.8VS
NVVDD1_PSI <25,67>
A A
1 2
1 2
1 2
PR1263
10K_0402_5%
PR1232
@
0_0402_5%
1 2
PR1233 0_040 2_5%@
12
@
PR1237 0_0402_5 %
PR1220
PR1222 100_0402_5%
PR1224
0_0402_5%
PR1228 100_0402_5%
PR1235 0_0402_5 %@
1 2
5
12
PC1210
1 2
@
0.1U_0402_25V6
PC1211
1 2
@
0.1U_0402_25V6
12
12
FBRTN
NVVDD1_PG<25>
+3VS
1 2
PC1213
@
0.1U_0402_25V6
61
2
5
PQ1201A
DMN53D0LDW-7 2N SOT363-6
PR1238
100K_0402_5%
1 2
NVVDD1_VID<25>
1 2
12
3
PR1230
PQ1201B
4
DMN53D0LDW-7 2N SOT363-6
@
1 2
4
PC1203
0.01U_0402_16V7K
1 2
PR1218
1 2
0_0402_5%
@
PR1262 0_0402_5%@
GPU_PROG3
GPU_PROG4
GPU_LPC
30K_0402_5%
@
0.1U_0402_25V6
NVVDD1_ENP
PC1212
1 2
PR1223 1K_0402_1%
GPU_PSI
PR1236
GPU_VID
12
12
REFADJ
R1
6.19K_0402_1%
4.32K_0402_1%
R2
20.5K_0402_1%
12
PR1240
0_0402_5%
PWMVID 的 RC BOM
PWMVID 的 RC BOM
PWMVID 的 RC BOMPWMVID 的 RC BOM 請 根 據GPU's config
請根據GPU's config
請根據GPU's config請根據GPU's config
設定
設定
設定設定
4
C
PC1215
4700P_0402_50V7K
PC1201
0.1U_0402_25V6
1 2
PR1201
10K_0402_5%
PR1214
0_0402_5%
1 2
PC1206
0.015U_0402_16V7K
@
0.1U_0402_25V6
PR1221
0_0402_5%
1 2
31
32
FBRTN
33
34
35
36
37
38
39
40
41
R3
PR1241
12
R4
R5
PR1258
12
FBRTN
+19VB_NVVDD
12
PR1206
12
PC1217
12
1 2
PC1208
FB
FBRTN
APL3
APL4
LPC
EN
PSI
PGOOD
VID
REFADJ
GND
12
PR1249
12
PR1256
PR1216
2.4K_0402_1%
91K_0402_1%
0.1U_0402_25V6@
1 2
12
PR1215
0_0402_5%
12
1 2
EAP
COMP
30
29
COMP
PIN 36 LOW動 作.
PIN 36 LOW動 作.
PIN 36 LOW動 作.PIN 36 LOW動 作.
REFIN1VREF2FSW3PWM84PWM75PWM66PWM57PWM48PWM39PWM2
REFIN
16.5K_0402_1%
309_0402_1%
1 2
PC1216
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
PR1205
0_0402_5%
@
PR1207
22.1K_0402_1%
PR1217
0_0402_5%
GPU_PROG5
SS
VINMON
25
28
26
27
SS
EAP
LLTH
IMON
VINMON
PU1201
UP9511PQGJ_VQFN40_5X5
GPU_PROG6
0.01U_0402_16V
3
NVVDD_ISUMP2<65> NVVDD_ISUMP3 <66>NVVDD_ISUMP1<65>
12
12
ISEN1
ISEN2
ISEN3
ISEN4
5VCC
PWM1
PR1239
0_0402_5%
12
1 2
PR1261 0_0402_5%
Deciphered Date
Deciphered Date
Deciphered Date
12
PR1204
20K_0402_1%
PR1210 1_0402_1 %
PR1211 1_0402_1%
PR1213 1_0402_1 %
NTC_La NTC_Lb
@ 1 2
470K_0402_5%_B25/50 4700K
Close to PL1301
PC1209
0.1U_0402_10V6K
PR1225 2.2K_040 2_1%
12
12
PR1202
PC1202
@
1 2
1 2
0.1U_0402_25V6
12
GPU_PROG1
3
@
1 2
0_0402_5%
GPU_PROG2
CSPSUM
CSNSUM
22
24
21
APL223APL1
CSPSUM
10
PWM2
PWM3
0_0402_5%
0_0402_5%
PR1259
PR1260
1 2
1 2
@
@
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
12
PR1203
20K_0402_1%
PR1208
PR1212 0_0402_5%@
PC1204 0.1U_04 02_25V6@
PC1205 0.1U_04 02_25V6@
PC1207 0.12U_0 402_10V6K
PR1219 1K_04 02_1%
CSNSUM
20K_0402_1%
NTC_La NTC_Lb
@
PR1209
1 2
0_0402_5%
1 2
1 2
1 2
1 2
20
ISEN1
19
ISEN2
18
ISEN3
17
ISEN4
16
ISEN5
15
ISEN6
14
ISEN7
13
ISEN8
12
5VCC
11
PWM1
PR1245
PR1250
0_0402_5%
12
0_0402_5%
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
12
12
12
PH1201
12
PR1226 2.2K_040 2_1%
12
PR1227 2K_0402_1 %
12
PR1264
100K_0402_5%
5VCC
PR1231 2.2_0 603_1%
1U_0402_6.3V6K
PC1214
12
GPU_PWM1 <65>
GPU_PWM2 <65>
GPU_PWM3 <66>
2
layout 上 :
layout 上 :
layout 上 :layout 上 : 請 將 Total DCR sensing 的componen t
請將 Total DCR sensing 的componen t
請將 Total DCR sensing 的componen t請將 Total DCR sensing 的componen t
放靠近Controlle r.
放靠近Controlle r.
放靠近Controlle r.放靠近Controlle r.
NVVDD_ISUMN1 <65>
NVVDD_ISUMN2 <65>
NVVDD_ISUMN3 <66>
layout 上 : 請 將 RSE N1 ~ 4
layout 上 : 請 將 RSE N1 ~ 4
layout 上 : 請 將 RSE N1 ~ 4layout 上 : 請 將 RSE N1 ~ 4 放靠近 C o n t r o l l e r.
放靠近 C o n t r o l l e r.
放靠近 C o n t r o l l e r.放靠近 C o n t r o l l e r.
GPU_PH1
GPU_PH2
GPU_PH3
12
5VCC
12
PR1242
1 2
43K_0402_5%
GPU_PROG1
PR1251
1 2
8.2K_0402_5%
For N17E-G1, TDP 60.2W
NVVDD1 TDC = 60A Peak Current = 127A OCP = 165A
Fsw=300kHz
+5VS
1 2
GPU_PROG2
1 2
請教AUTO
請教AUTO
請教AUTO請教AUTO PHASE的 設定
PHASE的 設定
PHASE的 設定PHASE的 設 定
+5VS
PR1247
PR1246
PR1252
Date: Sheet
Date: Sheet
Date: Sheet
PR1243
1 2
36K_0402_5%
GPU_PROG3
PR1253
1 2
@
8.2K_0402_5%
Title
Title
Title
PWR_VGA_UP9511P
PWR_VGA_UP9511P
PWR_VGA_UP9511P
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1 2
10K_0402_5%
10K_0402_5%
GPU_PROG4
PR1254
0_0402_5%
@
0_0402_5%
1 2
Cold Boot = 4-phase Warm Boot = 4-phase
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1
GPU_PROG6
12
PR1229
@
0_0402_5%
PR1234
1 2
33K_0402_5%
PR1244
1 2
@
GPU_PROG5
PR1255
1 2
@
1
PR1248
1 2
51K_0402_5%
10K_0402_5%
GPU_LPC
PR1257
0_0402_5%
@
0_0402_5%
1 2
1.A
1.A
64 73Friday, March 31, 2017
64 73Friday, March 31, 2017
64 73Friday, March 31, 2017
1.A
of
of
of
Page 61
1
+19VB
A A
GPU_PWM1<64>
+19VB_NVVDD
B B
+5VS
PR1303
0_0402_5%
@
1 2
+5VS
1U_0603_16V7
12
PR1306
0_0402_5%
1 2
@
12
12
PC1306
PC1307
0.1U_0402_25V6
EMI@
2200P_0402_50V7K
@EMI@
PL1303
EMI@
HCB2012KF-121T50_080 5
1 2
PL1304
EMI@
HCB2012KF-121T50_080 5
1 2
PR1305 1K_0402_1%
PC1302
12
12
PC1308
PC1309
10U_0805_25VAK
10U_0805_25VAK
@
PC1310
1 2
12
10U_0805_25VAK
12
PR1308
0_0402_5%
0.1U_0603_50V7K
12
PC1311
10U_0805_25VAK
PC1303
1 2
2
PR1301
1
2
0.005_2512_1%
12
PC1327
@
10U_0805_25VAK
+19VB_GPU
4
3
CSSN_B+<35>CSSP_B+<35> CSSN_NVVDD<35>CSSP_NVVDD <35>
12
PC1326
@
10U_0805_25VAK
PR1302
1
2
0.005_2512_1%
1 2 3 4 5 6 7 8
9 10 11 12 13 14
4
3
PU1301
PWM
CGND ZCD_EN# VCIN CGND BOOT NC PHASE VIN VIN PGND SW SW SW SW
SIC632CDT1GE3_POWERPAK31_5X 5
DSBL#
THWn
VDRV PGND
GL
GL SW SW SW SW SW SW SW
+19VB_NVVDD
28 27 26 25 24 23 22 21 20 19 18 17 16 15
3
PR1304
10K_0402_1%
1 2
PR1307
2.2_0603_1%
PC1304
1U_0603_16V7
12
+5VS
12
4
NVVDD (NVVDD1) Vboot=0.8V TDC=60A Peak Current=127A OCP=165A FSW=300kHz Dr.MOS SIC632 TYP MAX
H/S Rds(on) = 4.8mohm ,5.76mohm L/S Rds(on) = 1.3mohm ,1.56mohm
Choke 0.22uH SH00000QZ00
GPU_PH1
0.22UH_MMD-10DZ-R22MES1L__3 5A_20%
12
EMI@
PR1309
4.7_1206_5%
GPU_SNB1
12
EMI@
PC1312
680P_0603_50V7K
GPU_PH1
NVVDD_ISUMP1<64>
NVVDD_ISUMN1<64>
1
2
PL1301
5
4
3
+NVVDD1
+5VS
PR1310
0_0402_5%
@
1 2
C C
D D
GPU_PWM2<64>
+19VB_NVVDD
+5VS
PC1313
1U_0603_16V7
12
PR1313
0_0402_5%
1 2
@
12
12
PC1318
PC1319
0.1U_0402_25V6
@EMI@
1
PC1320
EMI@
2200P_0402_50V7K
PR1312 1K_0402_1%
12
PR1315
1 2
PC1314
0_0402_5%
1 2
0.1U_0603_50V7K
12
12
PC1321
@
10U_0805_25VAK
10U_0805_25VAK
12
12
PC1323
PC1322
10U_0805_25VAK
10U_0805_25VAK
2
PU1302
1
PWM
2 3 4 5 6 7 8
9 10 11 12 13 14
CGND ZCD_EN# VCIN CGND BOOT NC PHASE VIN VIN PGND SW SW SW SW
SIC632CDT1GE3_POWERPAK31_5X 5
GL
DSBL#
THWn
VDRV PGND
GL SW SW SW SW SW SW SW
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
28 27 26 25 24 23 22 21 20 19 18 17 16 15
3
+5VS
PR1311
1 2
10K_0402_1%
PR1314
2.2_0603_1%
12
PC1315
1U_0603_16V7
12
12
GPU_SNB2
12
Compal Secret Data
Compal Secret Data
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
EMI@
PR1316
4.7_1206_5%
EMI@
PC1324
680P_0603_50V7K
GPU_PH2
NVVDD_ISUMP2<64>
NVVDD_ISUMN2<64>
Choke 0.36uH SH00000R500 (Size:13.5 x 12.5 x 2.8 mm) (DCR:1.5 m~ 1. 8m )
0.22UH_MMD-10DZ-R22MES1L__3 5A_20%
GPU_PH2
4
1
2
PL1302
4
3
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PWR_+NVVDD1
PWR_+NVVDD1
PWR_+NVVDD1
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
5
+NVVDD1
65 73Friday, March 31, 2017
65 73Friday, March 31, 2017
65 73Friday, March 31, 2017
of
of
of
1.A
1.A
1.A
Page 62
5
4
3
2
1
D D
GPU_PWM3<64>
+19VB_NVVDD
C C
B B
+5VS
PR1352
10K_0402_1%
1 2
PR1355
2.2_0603_1%
PC1354
1U_0603_16V7
12
+5VS
12
12
EMI@
PR1357
4.7_1206_5%
GPU_SNB3
12
EMI@
PC1362
680P_0603_50V7K
GPU_PH3
PL1351
GPU_PH3
NVVDD_ISUMP3<64>
NVVDD_ISUMN3<64>
0.22UH_MMD-10DZ-R22MES1L__3 5A_20%
1
2
4
3
+NVVDD1
PR1351
0_0402_5%
@
1 2
PR1353 1K_0402_1%
+5VS
PC1352
1U_0603_16V7
12
PR1354
0_0402_5%
1 2
@
12
12
PC1356
0.1U_0402_25V6
@EMI@
12
PC1357
PC1358
PC1359
@
EMI@
10U_0805_25VAK
2200P_0402_50V7K
10U_0805_25VAK
12
PR1356
1 2
PC1353
0_0402_5%
1 2
0.1U_0603_50V7K
12
12
12
PC1361
PC1360
@
10U_0805_25VAK
10U_0805_25VAK
PU1351
1
PWM
2 3 4 5 6 7 8
9 10 11 12 13 14
CGND ZCD_EN# VCIN CGND BOOT NC PHASE VIN VIN PGND SW SW SW SW
SIC632CDT1GE3_POWERPAK31_5X 5
DSBL#
THWn
VDRV
PGND
GL
GL SW SW SW SW SW SW SW
28 27 26 25 24 23 22 21 20 19 18 17 16 15
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL
THIS SH EET OF ENGI NEERING D RAWIN G IS THE PROP RIETARY PRO PERTY OF COMPAL ELECTRO NICS, INC. AND CONTAI NS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRI TTEN CON SENT OF COMPAL EL ECTRONICS, INC.
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
2016/11/03 2017/0 1/06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PWR_+NVVDD1
PWR_+NVVDD1
PWR_+NVVDD1
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
1
1.A
1.A
66 73Friday, March 31, 2017
66 73Friday, March 31, 2017
66 73Friday, March 31, 2017
1.A
of
of
of
Page 63
1
2
3
4
5
A A
NVVDD2_EN<25,35,63>
20K_0402_1%
PR1409
NVVDD1_PSI
B B
C C
1 2
@
0_0402_5%
PR1406
+1.8VS
12
PR1412
1 2
10K_0402_1%
+3VS
PR1430
@
30K_0402_5%
1 2
PR1404 100K_0402_1%
NVVDD2_VID<25>
Avoid high dV/dt
12
PR1415
12
NVVDDS_HG1
NVVDD2_EN
NVVDD2_PSI_R
PR1411
1 2
0_0402_5%
R1R2R3 R4
12
PR1416
4.32K_0402_1%
6.19K_0402_1%
C
12
PC1414
+5VS
NVVDDS_LG1
NVVDDS_SW1
PC1408
12
0.22U_0603_25V7K
PR1405
2.2_0603_1%
1 2
NVVDDS_BST1
NVVDDS_VIDBUF
12
PR1417
16.5K_0402_1%
R5
12
PR1422
309_0402_1%
PR1424 20.5K_0402_1%
4700P_0402_50V7K
1 2
PR1401
2.2_0603_1%
1
2
3
4
5
12
12
1
2
PC1401
20
21
TPAD
PHASE1
BOOT1
UGATE1
EN
PSI
VID
REFADJ6REFIN7VREF8OCS/CB9FBRTN
1 2
PR1418
45.3K_0402_1%
PC1413
1500P_0402_50V7K
OCP & FS setting
PC1415
1 2
0.01U_0402_16V
PR1427
1 2
0_0603_5%
1 2
+19VB_GPU
@
PR1402
1
2
0.005_2512_1%
CSSP_NVVDDS<35> CSSN_NVVDDS<3 5>
PQ1401
S2
1
2
PQ1402
D1
G1
7
D2/S1
S24S2
S2
G2
5
3
6
AON6992_DF N5X6D-8-7
1
2
D1
G1
7
D2/S1
S24S2
G2
5
3
6
PR1429
100K_0402_5%
NVVDDS (NVVDD2) Vboot=0.8 V TDC=18A Peak Current= 30.7A OCP=40.2A FSW=300kH z DaulMOS AON6992 TYP MAX
H/S Rds(on) = 6.8mohm ,8.6mohm L/S Rds(on) = 2.0mohm ,2.5mohm
4
3
AON6992_DF N5X6D-8-7
+19VB_NVVDDS
12
12
PC1404
PC1405
0.1U_0402_25V6
@EMI@
PC1406
EMI@
10U_0805_25VAK
2200P_0402_50V7K
Choke 0.22uH SH000011H00 (Size:7*7*4 mm)
1 2
12
EMI@
PR1408
4.7_1206_5%
NVVDDS_SNB1
12
EMI@
PC1411
680P_0603_50V7K
12
12
12
PC1416
PC1407
10U_0805_25VAK
10U_0805_25VAK
PL1401
0.22UH_24A_+-20%_7X7X4_M
12
PC1417
10U_0805_25VAK
+NVVDD2
PR1431
@
4.7U_0402_6.3V6M 30K_0402_1%
1 2
18
PVCC
LGATE1
GND
NVVDDS_VREF
LGATE2
12
10
PHASE2
UGATE2
PR1419
BOOT2
PGOOD
COMP
84.5K_0402_1%
UP1666QQKF_WQFN20_3X3
15
14
13
NVVDDS_COMP
12
11
FB
PR1414
10K_0402_5%
@
PR1420
0_0402_5%
1 2
1 2
1 2
PU1401
16
17
19
Avoid high dV/dt
51.1K_0402_1%
@
PR1421
0_0402_5%
PR1410
1 2
1 2
+3VS
PR1407
10K_0402_5%
1 2
12
PC1410
0.1U_0603_16V@
PR1413
49.9_0603_1%
PC1412
47P_0402_50V8J
PC1409
12
1000P_0402_25V8J
12
@
@
NVVDD2_PG <25>
PR1423 100_0402_5%
12
PR1425 100_0402_5%
12
NVVDDS_HG1
NVVDDS_SW1
NVVDDS_LG1
+NVVDD2
NVVDD2_VCC_SENSE <30>
NVVDD2_VSS_SENSE <30>
Close to PU1201
D D
Security Cl assification
Security Cl assification
Security Cl assification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SE CRET INFOR MATION. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1
2
MAY B E US ED BY OR DISCLO SED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2016/11/03 2017/01/06
2016/11/03 2017/01/06
2016/11/03 2017/01/06
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
4
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size
Size
Size
Date: She et
Date: She et
Date: She et
Compal Electronics, Inc.
PWR_+NVVDD2
PWR_+NVVDD2
PWR_+NVVDD2
Document Number Rev
Document Number Rev
Document Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
5
67 73Friday, March 31, 2017
67 73Friday, March 31, 2017
67 73Friday, March 31, 2017
1.A
1.A
1.A
of
of
of
Page 64
5
4
3
2
1
+NVVDD1
D D
+NVVDD1
C C
B B
Common part SGA0000 BT 00
1
+
PC1588
2
220U_D2 SX_2VY_R9M
1U_0402_6.3V6K
PC1501
12
1U_0402_6.3V6K
PC1516
12
1U_0402_6.3V6K
PC1531
12
1U_0402_6.3V6K
PC1548
12
1
+
PC1589
2
1U_0402_6.3V6K
12
1U_0402_6.3V6K
12
1U_0402_6.3V6K
12
1U_0402_6.3V6K
12
1
1
+
+
PC1591
PC1590
2
2
220U_D2 SX_2VY_R9M
PC1502
12
PC1517
12
PC1532
12
PC1549
12
220U_D2 SX_2VY_R9M
220U_D2 SX_2VY_R9M
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1503
PC1504
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1519
PC1518
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1534
PC1533
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1550
PC1551
12
1
1
+
+
PC1594
2
SF000006S00 SF-OS CON Cap Common
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1505
12
12
12
12
PC1506
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1521
PC1520
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1535
PC1536
12
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1565
PC1566
12
PC1593
2
330U_2.5V_ESR17M_6 .3X4.5
330U_2.5V_ESR17M_6 .3X4.5
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1507
12
12
12
12
12
PC1508
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1522
PC1523
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1538
PC1537
12
12
12
12
PC1552
PC1546
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1568
PC1567
12
12
1
+
PC1592
2
220U_D2 SX_2VY_R9M
+NVVDD1 220uF X 4 560uF X 3 47uF_0805 X 2 22uF_0603 X 4
1U_0402_6.3V6K
PC1509
12
1U_0402_6.3V6K
PC1524
12
1U_0402_6.3V6K
PC1539
12
12
PC1553
22U_0603_6.3V6M
10U_0603_6.3V6M
PC1569
12
PC1511
PC1510
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1525
PC1526
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1540
PC1541
12
12
12
PC1554
PC1555
22U_0603_6.3V6M
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1571
PC1570
12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1513
PC1512
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1528
PC1527
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1544
PC1542
12
12
12
PC1547
PC1556
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1573
PC1572
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1515
PC1514
12
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1529
12
12
22U_0603_6.3V6M
12
PC1530
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1543
PC1545
12
12
PC1557
22U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1575
PC1574
12
10uF_0603X 23
4.7uF_0603 X 9 1uF_0402 X 49
+NVVDD1 220uF X 4 560uF X 3 47uF_0805 X 2 22uF_0603 X 4 10uF_0603X 11(unpop 5) 1uF_0402 X 49
+NVVDD1 220uF X 4 330uF X 2 560uF X 1 22uF_0603 X 8 10uF_0603X 11(unpop 5) 1uF_0402 X 49
+NVVDD2
Common part SGA0000 BT 00
+NVVDD2
1
+
PC1628
2
220U_D2 SX_2VY_R9M
1U_0402_6.3V6K
PC1601
12
1U_0402_6.3V6K
PC1610
12
10U_0603_6.3V6M
PC1619
12
+
+
2
12
12
12
PC1626
PC1627
2
220U_D2 SX_2VY_R9M
220U_D2 SX_2VY_R9M
+NVVDD2 220uF X 2 560uF X 1 47uF_0805 X 1 22uF_0603 X 2
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1602
12
1U_0402_6.3V6K
PC1611
12
10U_0603_6.3V6M
PC1620
12
PC1604
PC1603
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1612
PC1613
12
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1622
PC1621
12
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1605
12
12
12
PC1606
12
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1615
PC1614
12
22U_0603_6.3V6M
22U_0603_6.3V6M
PC1623
PC1624
12
@
@
1U_0402_6.3V6K
1U_0402_6.3V6K
PC1608
PC1607
12
12
1U_0402_6.3V6K
PC1616
12
22U_0603_6.3V6M
22U_0603_6.3V6M
PC1625
12
12
+NVVDD2 220uF X 2 560uF X 1 47uF_0805 X 1 22uF_0603 X 2 (unpop 2) 10uF_0603 X 4 1uF_0402 X 16
10uF_0603 X 4
1U_0402_6.3V6K
4.7uF_0603 X 2
PC1609
12
1uF_0402 X 16
PC1629
1
1
+NVVDD2
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1576
12
@
@
A A
10U_0603_6.3V6M
10U_0603_6.3V6M
PC1577
12
PC1578
12
@
@
5
10U_0603_6.3V6M
PC1579
12
PC1580
12
@
Security Classification
Security Classification
Security Classification
2016/11/03 2017/01/06
2016/11/03 2017/01/06
Issued D ate
Issued D ate
Issued D ate
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL
THIS SHEET OF EN GINEERI NG DR AWING IS TH E P ROPRIETAR Y PROP ERTY OF COMPAL ELECTRONICS, INC. A ND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISIO N OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEI THER THIS SHEET NOR THE INFORMA TION IT CONTAINS MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DIS CLOSED TO ANY THIRD PARTY WITHOUT PRIO R WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2016/11/03 2017/01/06
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
PWR_VGA DECOUPLING
PWR_VGA DECOUPLING
PWR_VGA DECOUPLING
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
C5PRH M/B LA-E921P
Date: Sheet
Date: Sheet
2
Date: Sheet
220uF X 2 560uF X 1 22uF_0603 X 4 (unpop 2) 10uF_0603 X 4 1uF_0402 X 16
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
68 73Friday, March 31, 2017
68 73Friday, March 31, 2017
68 73Friday, March 31, 2017
1
1.A
1.A
1.A
of
of
of
Loading...