ACER M170EN04-1 Specification

Product Specifications

17.0” SXGA Color TFT-LCD Module

Model Name: M170EN04

EC: -1

(u) Preliminary Specifications

( ) Final Specifications

Note: This Specification is subject to change without notice.

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i Contents ii Record of Revision

1.0 Handling Precautions

2.0 General Description

2.1 Display Characteristics

2.2 Functional Block Diagram

2.3 Optical Characteristics

2.4 Pixel format image

3.0 Electrical characteristics

3.1 Absolute Maximum Ratings

3.2 Connectors

3.3 Signal Pin

3.4 Signal Description

3.5 Signal Electrical Characteristics

3.6 Interface Timing

3.6.1 Timing Characteristics

3.6.2 Timing Definition

3.7 Power Consumption

3.8 Power ON/OFF Sequence

4.0 Backlight Characteristics

4.1 Signal for Lamp connector

4.2 Parameter guide line for CCFL Inverter

5.0 Vibration, shock and drop

5.1 Vibration and shock

5.2 Drop test

6.0 Environment

6.1 Temperature and humidity

6.1.1 Operating conditions

6.1.2 Shipping conditions

6.2 Atmospheric pressure

6.3 Thermal shock

7.0 Reliability

7.1 Failure criteria

7.2 Failure rate

7.2.1 Usage

7.2.2 Components de-rating

7.3 CCFL life

7.4 ON/OFF cycle

8.0 Safety

8.1 Sharp edge requirement

8.2 Material

8.2.1 Toxicity

8.2.2 Flammability

8.3 Capacitors

8.4 Hazardous voltage

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No Reproduction and Redistribution Allowed. 26

9.0 Other requirements

9.1 Smoke free design

9.2 National test lab requirement

10.0 Mechanical Characteristics

ii Record of Revision

Version and Date Page Old description New Description Remark

0.1. 2000/11/24 All First Edition for Customer All The first LVDS …. while

0.2. 2001/01/03 10

0.2. 2001/01/03 13

0.2. 2001/01/03 9 0,1…1278,1279 1, 2 ….. 1279, 1280 Spec change.

0.3.2001/2/15 5 Weight = 2200(typ) Weight = 2000 (typ) Spec change

0.3.2001/2/15 7

the second LVDS ….

odd pixels.

Viewing angle (U/D/L/R,CR>10) = (45/70/60/60)

The one LVDS … while the other LVDS…...odd

pixels.

O = “First Pixel Data” E = “Second Pixel Data”

Viewing angle (U/D/L/R, CR>10) = (70/70/75/75)

Spec. change

Add

Spec change.

1.0 Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.

2) Be sure to turn off power supply when inserting or disconnecting from input connector.

3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.

4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.

6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when

handling.

7) Do not open nor modify the Module Assembly.

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8) Do not press the reflector sheet at the back of the module to any directions.

9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface

Connector of the TFT-LCD module.

10) After installation of the TFT-LCD module into an enclosure (LCD monitor housing, for example), do not twist

nor bend the TFT -LCD module even momentary. At designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the TFT -LCD module from outside. Otherwise the TFT -LCD module may be damaged.

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2.0 General Description

This specification applies to the 17.0 inch Color TFT-LCD Module L170E3-1. The display supports the SXGA (1280(H) x 1024(V)) screen format and 16.7M colors (RGB 8-bits data).

All input signals are 2 Channel LVDS interface compatible. This module does not contain an inverter card for backlight.

2.1 Display Characteristics

The following items are characteristics summary on the table under 25 ℃ condition:

ITEMS Unit SPECIFICATIONS

Screen Diagonal [mm] 432(17.0") Active Area [mm] 337.920 (H) x 270.336(V) Pixels H x V 1280(x3) x 1024 Pixel Pitch [mm] 0.264 (per one triad) x 0.264 Pixel Arrangement R.G.B. Vertical Stripe Display Mode Normally White White Luminance [cd/m2] 250 (Typ) Contrast Ratio 400 : 1 (Typ) Optical Response Time [msec] 45 (Typ) Nominal Input Voltage VDD [Volt] +5.0 V Power Consumption (VDD line + CCFL line) Weight [Grams] 2000 (Typ) Physical Size [mm] 383.5(W) x 306(H) x 20.0(D) (Typ) Electrical Interface Even/Odd R/G/B data(8bits),3 sync signal,

Support Color 16.7M colors ( RGB 8-bit data ) Temperature Range Operating Storage (Shipping)

[Watt] 25W(Max) (w/o Inverter, All black pattern)

Clock

[oC] [oC]

0 to +50

-20 to +60

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2.2 Functional Block Diagram

D1

The following diagram shows the functional block of the 17.0 inches Color TFT-LCD Module:

Y PCB

ASIC(Leo 3)

G1

Y-Driver IC

LVDS

Connector

LVDS

Receiver

Timing

Controller

1280*(3)*1024

TFT-LCD

Pixels

+5V

G1024

D3840

4 CCFL

DC/DC

Converter

I/F + X PCB

Gamma

Correction

DC POWER

X-Driver IC

Inverter

JAE FI-X30S-HF JST BHR-04VS-1 Mating Type JAE FI-X30S-H Mating Type SM04(4.0)B-BHS-1-TB

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2.3 Optical Characteristics

The optical characteristics are measured under stable conditions at 25℃ (Room Temperature):

Item Unit Conditions Min. Typ. Max.

Viewing Angle [degree]

[degree] [degree] [degree] [degree] [degree] [degree] [degree]

Contrast ratio Response Time [msec] Raising Time - 30 -

[msec] Falling Time - 15 -

[msec] Raising + Falling - 45 Color / Chromaticity Red x TBD 0.63 TBD Coordinates (CIE) Red y TBD 0.33 TBD

Color Coordinates (CIE) White White x TBD 0.31 TBD

Horizontal (Right) CR = 10 (Left) Vertical (Up) CR = 10 (Down) Horizontal (Right) CR = 5 (Left) Vertical (Up) CR = 5 (Down)

Normal Direction

Green x TBD 0.30 TBD Green y TBD 0.60 TBD

Blue x TBD 0.15 TBD Blue y TBD 0.10 TBD

White y TBD 0.33 TBD

-

TBD 400 -

75/75 -

70 70

80/80 -

55 80

-

Luminance Uniformity (Note 1) [%] 80 85 White Luminance at CCFL 6.0mA(center point) Crosstalk ( in 75Hz) [%] TBD

[cd/m2] 200 250 -

Note 1 Measure points & Diagram

Display Length distance x = —————————————— 10

Display Width distance y = —————————————— 10

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Minimum Luminance in 5 Points (1-5) Uniformity = ——————————————————— Maximum Luminance in 5 Points (1-5)

This panel is compatible with TCO99 approbation in luminance uniformity <1.7, luminance contrast >0.5

LCD Display area = 337.9 x 270.4 mm

W/10

1

5

3

L/10

2

4

L/10

2.4 Pixel format image

Following figure shows the relationship of the input signals and LCD pixel format.

W/10

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R G B R G B R G B R G B R G B R G B

1

2

1279 1280

1st Line

1024th

R G B R G B

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3.0 Electrical characteristics

3.1 Absolute Maximum Ratings

Absolute maximum ratings of the module is as following:

Item Symbol Min Max Unit Conditions

Logic/LCD Drive Voltage VIN -0.3 +5.5 [Volt] Select LVDS data order SELLVDS NC NC [Volt] CCFL Inrush current ICFLL - 38 [mA] Note 1 CCFL Current ICFL - 7.6 [mA] rms Operating Temperature TOP 0 +50 [oC] Note 2 Operating Humidity HOP 8 95 [%RH] Note 2 Storage Temperature TST -20 +60 [oC] Note 2 Storage Humidity HST 8 95 [%RH] Note 2

Note 1 : Duration=50 msec.

Note 2 : Maximum Wet-Bulb should be 39℃ and No condensation.

3.2 Connectors

Physical interface is described as for the connector on module. These connectors are capable of accommodating the following signals and will be following components.

Connector Name / Designation Interface Connector / Interface card Manufacturer JAE or compatible Type Part Number FI-X30S-HF Mating Housing Part Number FI-X30S-H

Connector Name / Designation Lamp Connector / Backlight lamp

Manufacturer JST

Type Part Number BHR-04VS-1 Mating Type Part Number SM04(4.0)B-BHS-1-TB

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3.3 Signal Pin

Pin# Signal Name Pin# Signal Name

1 GND 2 RxO03 RxO0+ 4 RxO15 RxO1+ 6 RxO27 RxO2+ 8 GND

9 RxOC- 10 RxOC+ 11 RxO3- 12 RxO3+ 13 RxE0- 14 RxE0+ 15 GND 16 RxE117 RxE1+ 18 GND 19 RxE2- 20 RxE2+ 21 RxEC- 22 RxEC+ 23 RxE3- 24 RxE3+ 25 GND 26 NC 27 NC 28 NC 29 Power 30 Power 31 Power 32 GND

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3.4 Signal Description

The module using a pair of LVDS receiver SN75LVDS82(Texas Instruments) or compatible. LVDS is a differential signal technology for LCD interface and high speed data transfer device. Transmitter shall be SN75LVDS83(negative edge sampling) or compatible. The one LVDS port(RxExxx) transmits even pixels while the other LVDS port(RxOxxx) transmits odd pixels.

PIN # SIGNAL NAME DESCRIPTION

1 GND Power Ground 2 RxO0- Negative LVDS differential data input (Odd data) 3 RxO0+ Positive LVDS differential data input (Odd data) 4 RxO1- Negative LVDS differential data input (Odd data)

5 RxO1+ 6 RxO2- Negative LVDS differential data input (Odd data)

7 RxO2+ Positive LVDS differential data input (Odd data) 8 GND Power Ground

9 RxOC- Negative LVDS differential clock input (Odd clock) 10 RxOC+ Positive LVDS differential clock input (Odd clock) 11 RxO3- Negative LVDS differential data input (Odd data) 12 RxO3+ Positive LVDS differential data input (Odd data) 13 RxE0- Negative LVDS differential data input (Even clock) 14 RxE0+ Positive LVDS differential data input (Even data) 15 GND Power Ground 16 RxE1- Positive LVDS differential data input (Even data) 17 RxE1+ Negative LVDS differential data input (Even data) 18 GND Power Ground 19 RxE2- Negative LVDS differential data input (Even data,H-Sync,V-Sync,DSPTMG) 20 RxE2+ Positive LVDS differential data input (Even data,H-Sync,V-Sync,DSPTMG)) 21 RxEC- Negative LVDS differential clock input (Even clock) 22 RxEC+ Positive LVDS differential clock input (Even clock) 23 RxE3- Negative LVDS differential data input (Even data) 24 RxE3+ Positive LVDS differential data input (Even data) 25 GND Power Ground 26 NC 27 NC 28 NC 29 POWER Power 30 POWER Power 31 POWER Power 32 GND Power Ground

Positive LVDS differential data input (Odd data)

Note: Input signals of odd and even clock shall be the same timing.

LVDS DATA Name Description

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DSP Display Timing :When the signal is high, the pixel data shall be valid to be displayed V-S Vertical Sync :Both Positive and Negative polarity are acceptable H-S Horizontal Sync :Both Positive and Negative polarity are acceptable

TI LVDS X’mitter

SN75LVDS83

Module LVDS signal

(interface connector pin7)

Signal Name Low(open)

D0 Red0 D1 Red1 D2 Red2 D3 Red3 D4 Red4 D5 Red7 D6 Red5 D7 Green0 D8 Green1

D9 Green2 D10 Green6 D11 Green7 D12 Green3 D13 Green4 D14 Green5 D15 Blue0 D16 Blue6 D17 Blue7 D18 Blue1 D19 Blue2 D20 Blue3 D21 Blue4 D22 Blue5 D23 NA D24 H Sync D25 V Sync D26 Display Timing D27 Red6

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RxECLKIN+

RxECLKIN-

1 cycle

RxEIN0+

RxEIN0-

RxEIN1+

RxEIN1-

RxEIN2+

RxEIN2-

RxEIN3+

RxEIN3-

RxECLKIN+

RxECLKIN-

RxOIN0+

RxOIN0-

ER1 ER0 ER5EG0 ER4 ER3 ER2 ER1 ER0 EG0

EG2 EG2 EB1 EB0 EG5 EG4 EG3 EG2 EG1 EB1

EB3 EB2 DSP V-S H-S EB5 EB4 EB3 EB2 DSP

ER7 ER6 NA EB7 EB6 EG7 EG6 ER7 ER6 NA

1 cycle

OR1 OR0 OG0 OR5 OR4 OR3 OR2 OR1 OR0 OG0

RxOIN1+

RxOIN1-

RxOIN2+

RxOIN2-

RxOIN3+

RxOIN3-

Note: R/G/B data 7:MSB, R/G/B data 0:LSB

OG2 OG1 OB1 OB0 OG5 OG4 OG3 OG2 OG1 OB1

OB3 OB2 NA NA NA OB5 OB4 OB3 OB2 NA

OR7 OR6 NA OB7 OB6 OG7 OG6 OR7 OR6 NA

O = “First Pixel Data”

E = “Second Pixel Data”

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T

Input Clock

Input Data

3.5 Signal Electrical Characteristics

ThdTsu

Input signals shall be low or Hi-Z state when Vin is off It is recommended to refer the specifications of SN75LVDS82DGG(Texas Instruments) in detail.

Each signal characteristics are as follows ;

Parameter Condition Min Max Unit

Differential Input High

Vth

Vtl

Voltage(Vcm=+1.2V) 100

Differential Input Low Voltage(Vcm=+1.2V) -100

[mV]

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3.6 Interface Timings

Basically, interface timings described here is not actual input timing of LCD module but output timing of SN75LVDS82DGG (Texas Instruments) or equivalent.

3.6.1 Timing Characteristics

Signal Item Symbol MIN TYP MAX Unit DTCLK Freq. Fdck 50 67.5 70 MHz DTCLK Cycle Tck 14.2 14.8 20 ns +V-Sync Frame Rate 1/Tv 56.25 75 77 Hz +V-Sync Cycle Tv 13 13.33 17.78 ms +V-Sync Cycle Tv 1035 1066 2047 lines +V-Sync Active level Tva 3 3 lines +V-Sync V-back porch Tvb 7 38 63 lines +V-Sync V-front porch Tvf 1 1 lines +DSPTMG V-Line m - 1024 - lines +H-Sync Scan rate 1/Th - 80.06 - KHz +H-Sync Cycle Th 800 844 1023 Tck +H-Sync Active level Tha(*1) 4 56 Tck +H-Sync Back porch Thb(*1) 4 124 Tck +H-Sync Front porch Thf 4 24 Tck +DSPTMG Display Pixels n - 640 - Tck

Note: Typical value is refer to VESA STANDARD , (*1) Tha+Thb should be less than 1024 Tck.

3.6.2 Timing Definition

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1688dot

112dot

248dot

48dot

1H

38H

3H

DSPTMG

H-Sync

DSPTMG

1280dot

V-Sync

Note :1280X1024 at 75 Hz (VESA STANDARD), Horizontal line rate :13.02us, Dot clock :135MHz.

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3.7 Power Consumption

10ms

Input power specifications are as follows ;

Symbol Parameter Min Typ Max Units Condition

VDD Logic/LCD Drive

Voltage IDD VDD current 850 1100 [mA] PDD VDD Power 4.25 5.5 [Watt] Vin=5V ,All Black Pattern VDDrp Allowable

Logic/LCD Drive

Ripple Voltage VDDns Allowable

Logic/LCD Drive

Ripple Noise

4.75 5 5.25 [Volt]

100 [mV]

p-p

100 [mV]

p-p

3.8 Power ON/OFF Sequence

Vin power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when Vin is off.

min.

10%

90% 90%

Vin

10%

30 max, 1ms min.

10%

0 min.0 min.

Signal

10%

170ms

Lamp On

18

min.

10%

0 min.

10%

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No Reproduction and Redistribution Allowed. 26

4.0 Backlight Characteristics

Pin #

Signal Name

1

Lamp High Voltage

No Connection

Ground

rms

4.1 Signal for Lamp connector

2

3

4

4.2 Parameter guide line for CFL Inverter

Symbol Parameter Min Typ Max Units Condition

(L255) White Luminance 200 250 - [cd/m2 ] (Ta=25oC) ISCFL CCFL standard current 5.5 6.0 6.5 [mA] IRCFL CCFL operation range 3.0 6.0 7.0 [mA]

rms

ICFL CCFL Inrush current - 26 34 [mA] Note 1

fCFL CCFL Frequency 40 50 80 [KHz] (Ta=25oC)

ViCFL (0oC) ViCFL (25oC) VCFL CCFL Discharge Voltage

PCFL CCFL Power consumption 17.3 19.0 [Watt] (Ta=25oC)

Note 1: Duration=50 [msec] Note 2: CCFL Frequency should be carefully determined to avoid interference between inverter and TFT LCD Note 3: Calculator value for reference (ICFL×VCFL=PCFL) Note 4: CCFL inverter should be able to give out a power that has a generating capacity of over 1700 voltage. Lamp units need 1700 voltage minimum for ignition

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CCFL Ignition Voltage 1700 [Volt]

rms

CCFL Ignition Voltage 1200 [Volt]

rms

720 863 [Volt]

(Reference)

rms

(Ta=25oC) (Ta=25oC)

Note 2 (Ta=0oC)

Note 4 (Ta=25oC) Note 4 (Ta=25oC) Note 3

Note 3

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No Reproduction and Redistribution Allowed. 26

5.0 Vibration, Shock, and Drop

5.1 Vibration & Shock

Frequency: 10 - 200Hz Sweep: 30 Minutes each Axis (X, Y, Z) Acceleration: 1.5G(10~200Hz P- P) Test method:

Acceleration (G) 1.5

Frequency (Hz) 10~200~10

Active time(min) 30

5.2 Shock Test Spec:

Acceleration (G) –a 35 Active time -b 20 Wave form half-sin Times 1

Direction: ±X , ±Y, ±Z

5.3 Drop test

Package test: The drop height is 60 cm.

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6.0 Environment

The display module will meet the provision of this specification during operating condition or after storage or shipment condition specified below. Operation at 10% beyond the specified range will not cause physical damage to the unit.

6.1 Temperature and Humidity

6.1.1 Operating Conditions

The display module operates error free, when operated under the following conditions ; Temperature 0 0C to 50 0C Relative Humidity 8% to 95% Wet Bulb Temperature 39.0 0C

6.1.2 Shipping Conditions

The display module operates error free, after the following conditions ; Temperature -20 0C to 60 0C Relative Humidity 8% to 95% Wet Bulb Temperature 39.0 0C

6.2 Atmospheric Pressure

The display assembly is capable of being operated without affecting its operations over the pressure range as following specified;

Pressure Note

Maximum Pressure 1040hPa 0m = sea level

Minimum Pressure 674hPa 3048m = 10.000 feet

Note : Non-operation attitude limit of this display module = 30,000 feet. = 9145 m.

6.3 Thermal Shock

The display module will not sustain damage after being subjected to 100 cycles of rapid temperature change. A cycle of rapid temperature change consists of varying the temperature from -200C to 600C, and back again.

Thermal shock cycle -20 0C for 30min

60 0C for 30min

Power is not applied during the test. After temperature cycling, the unit is placed in normal room ambient for at least 4 hours before powering on.

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No Reproduction and Redistribution Allowed. 26

7.0 Reliability

This display module and the packaging of that will comply following standards.

7.1 Failure Criteria

The display assembly will be considered as failing unit when it no longer meets any of the requirements stated in this specification. Only as for maximum white luminance, following criteria is applicable.

Note : Maximum white Luminance shall be 75 cd/m2or more.

7.2 Failure Rate

The average failure rate of the display module (from first power-on cycle till 1,000 hours later) will not exceed 1.0%. The average failure rate of the display module from 1,000 hours until 16,000 hours will not exceed 0.7% per 1000 hours.

7.2.1 Usage

The assumed usage for the above criteria is:

220 power-on hours per month 500 power on/off cycles per month Maximum brightness setting Operation to be within office environment (250C typical)

7.2.2 Component De-rating

All the components used in this device will be checked the load condition to meet the failure rate criteria.

7.3 CCFL Life

The assumed CCFL Life will be longer than 30,000 hours, typical value is 50,000 hours under stable condition at 25 ± 5oC; Standard current at 6.0 ± 0.5mA. Definition of life: brightness becomes 50% or less than the minimum luminance value of CCFL.

7.4 ON/OFF Cycle

The display module will be capable of being operated over the following ON/OFF Cycles.

ON/OFF Value Cycles

+Vin and CCFL power 35,000 10 seconds on / 10 seconds off

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8.0 Safety

8.1 Sharp Edge Requirements

There will be no sharp edges or comers on the display assembly that could cause injury.

8.2 Materials

8.2.1 Toxicity

There will be no carcinogenic materials used anywhere in the display module. If toxic materials are used, they will be reviewed and approved by the responsible ADT Toxicologist.

8.2.2 Flammability

All components including electrical components that do not meet the flammability grade UL94-V1 in the module will complete the flammability rating exception approval process. The printed circuit board will be

made from material rated 94-V1 or better. The actual UL flammability rating will be printed on the printed circuit board.

8.3 Capacitors

If any polarized capacitors are used in the display assembly, provisions will be made to keep them from being inserted backwards.

8.4 Hazardous Voltages

Any point exceeding 42.4 volts meets the requirement of the limited current circuit. The current through a 2KΩ resistance is less than 0.7 x f (kHz) mA.

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9.0 Other requirements

6 Jun C Dec

9.1 National Test Lab Requirement

The display module will satisfy all requirements for compliance to

UL 1950, First Edition U.S.A. Information Technology Equipment CSA C22.2 No.950-M89 Canada, Information Technology Equipment EEC 950 International, Information Technology Equipment EN 60 950 International, Information Processing Equipment

(European Norm for IEC950)

9.2 Label

9.2.1 Product label

Serial number

Bar code of Serial number

ADT model No.

Model No: L170E3

EC.: -1

97V1491XXXYYMXXXXXXH

Acer Display Technology Inc.

9.2.2 Serial number and definition

97V1491XXX YY M XXXXXX H

Part number Year Month Serial Number Hsinchu plant

24

Year YY Year 00 2000 01 2001

No Reproduction and Redistribution Allowed. 26

02 2002 03 2003

Month M Month M Month 1 Jan 7 Jul 2 Feb 8 Aug 3 Mar 9 Sep 4 Apr A Oct 5 May B Nov

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10.0 Mechanical Characteristics

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ACER M170EN04-1 Specification

Specifications and Main Features

Frequently Asked Questions

User Manual