Acer LA-9531P Schematics
http://mycomp.su/x/
5
D D
C C
4
3
2
1
B B
Intel Ivy Bridge/Panther Point
AMD Seymour XT
2012-05-08 Rev 0.1
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Cover Page
Cover Page
Cover Page
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
Monday, July 16, 2012
Monday, July 16, 2012
Monday, July 16, 2012
1
1 50
1 50
1 50
0.1
0.1
0.1
http://mycomp.su/x/
5
4
3
2
1
Compal Confidential
Model Name : VBL30/31
File Name :LA-9351P
PCI-E X16
Mobile
IVY Bridge
Fan CONN
page 38
CPU Dual / Quad Core
D D
AMD Seymour XT
23mm *23mm
VRAM
page 13~18
page 27
Socket-rPGA989
37.5mm*37.5mm
page 5~10
DMI X4
FDI x8
CRT
page 28
LCD Conn.
page 29
C C
PCIE 2.5GT/s)
port 2 port 1
PCIeMini Card
WLAN & BT 2.0
USB port 8
PCIe port 2
B B
USB&Audio/B
page 32
page 32
HDMI Conn.
SPI ROM
RTL8111GS
RJ45
page 31
page 37
100MHz
PCIe port 1
page 31
Touch Pad
Intel
Panther Point
989pin FCBGA
page 19~26
LPC BUS
33MHz
ENE KB9012
page 36
Int.KBD
page 38
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 1066/1333
USB20
USB/B Right
page 32
USB30
SATA port
SATA HDD
HD Audio
page 35
204pin DDRIII-SO-DIMM X2
Int. Camera RTS5129 3IN1
USB 3.0 conn
page 33
page 30
SATA ODD
3.3V 24.576MHz/48Mhz
BANK 0, 1, 2, 3
page 28
page 30
HDA Codec
ALC259
MIC
Int.
page 34
page 34
MIC CONN
page 32
page 11,12
page 33
HP CONN
page 32
SPK CONN
page 34
Power/B
Touch Pad/B
page 38
page 38
RTC CKT.
page 30
A A
DC/DC Interface CKT.
page 39
Security Classification
Security Classification
Power Circuit DC/DC
page 40~50
5
4
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Compal Electronics, Inc.
Block Diagrams
Block Diagrams
Block Diagrams
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
2 50Monday, July 16, 2012
2 50Monday, July 16, 2012
2 50Monday, July 16, 2012
1
0.1
0.1
0.1
http://mycomp.su/x/
5
B+
Ipeak=5A, Imax=3.5A, Iocp min=7.9
N-CHANNEL
SI4800
D D
SY8033BDBC
4
SUSP
SUSP#
DESIGN CURRENT 5A
DESIGN CURRENT 4A
DESIGN CURRENT 2A
3
+5VALW
+5VS
+1.8VS
2
1
RT8205
Ipeak=5A, Imax=3.5A, Iocp min=7.7
WOL_EN#
P-CHANNEL
AO-3413
SUSP
N-CHANNEL
SI4800
P-CHANNEL
AO-3413
P-CHANNEL
AO-3413
C C
VR_ON
P-CHANNEL
AO-3413
NCP6132AMNR2G
DESIGN CURRENT 5A
DESIGN CURRENT 330mA
DESIGN CURRENT 4A
VGA_ENVDD
DESIGN CURRENT 1.5A
BT_PWR#
DESIGN CURRENT 180mA
PCIE_OK
DESIGN CURRENT 100mA
DESIGN CURRENT 52A
+3VALW
+3V_LAN
+3VS
+LCD_VDD
+BT_VCC
+3VS_DELAY
+CPU_CORE
DESIGN CURRENT 30A
DGPU_PWR_EN / SUSP#
APL5912
SUSP#
B B
TPS51212DSCR
SYSON
Ipeak=18A, Imax=12.6A, Iocp min=19.8
Ipeak=15A, Imax=10.5A, Iocp min=16.5
DESIGN CURRENT 26A
DESIGN CURRENT 18A
DESIGN CURRENT 15A
+GFX_CORE
+VGA_CORE
+1.05VS_VCCP
+1.5V
+1.5V_CPU
RT8209BGQW
CPU1.5V_S3_GATE / SUSP
RT8207MZQW
SUSP
SI4856ADY
SUSP#
A A
RT8209BGQW
5
4
DESIGN CURRENT 2A
DESIGN CURRENT 12A
DESIGN CURRENT 6A
+0.75VS
+1.5VS
+VCCSA
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Power Map
Power Map
Power Map
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
3 50Monday, July 16, 2012
3 50Monday, July 16, 2012
3 50Monday, July 16, 2012
1
of
of
of
0.1
0.1
0.1
http://mycomp.su/x/
Voltage Rails
5
4
3
2
1
+5VS
power
plane
D D
+B
State
S0
C C
B B
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery
don't exist
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SIGNAL
O
O
O
O
X
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
HIGH HIGH HIGH HIGH
LOW
LOW
LOW LOW LOW LOW
LOW
+5VALW
+3VALW
+1.5V
+1.5V_IO
O
O
O
X
O
X X
X
X X X
ON
HIGH
LOWLOWLOW
HIGHHIGHHIGH
HIGH
HIGH
ON
ON
ON
ON
+3VS
+1.5VS
+1.05VS_VTT
+CPU_CORE
+VGA_CORE
+VCC_GFXCORE_AXG
+1.8VS
+0.75VS
OO
X
X
ON
ON ON
ON
ON
OFF
ON
OFF
OFF
OFF
OFF
LOW
OFF
OFF
OFF
EC SM Bus1 address
Device
Smart Battery+3VALW
PCH SM Bus address
Power
Device Address
DDR DIMMA
+3VS
DDR DIMMB
+3VS
SMBUS Control Table
SOURCE
SMB_EC_CK1
SMB_EC_DA1
SMB_EC_CK2
SMB_EC_DA2
SMBCLK
SMBDATA
SML0CLK
SML0DATA
SML1CLK
SML1DATA
KB9012
+3VALW
KB9012
+3VALW
PCH
+3VALW
PCH
+3VALW
PCH
+3VALW
Address Address
0001 011x b
1001 000x b
1001 010x b
VGA BATT KB9012 SODIMM
X V
+3VALW
X
X
X
V
+3VS
X
X
X
EC SM Bus2 address
DevicePowerPower
VGA Internal thermal sensor
+3VS
WLAN
WWAN
X
X
X
V
+3VS
X
X
V
+3VS
X
X
XX
V
+3VS
X
1001 111Xb (0x9E)
Thermal
Sensor
X
X
X
XX
V
+3VS
PCH
+3VS
X
V
X
X
XX X
PCH X76 and PCBA table
config
@ Reserve
CONN@
KB9012@
Nuvton@
NOW8@
A A
WIN8@
UMA@
PX@
5
ME CONNECTOR
ENE EC
Nvuton EC
not Support Win8
Support Win8
UMA Sku
PX Sku
4
X76
PCH
PCB
(@/CONN@/DA2@/DA4@/DA8@/DAZ@/KB9012@/NOW8@/Nuvton@/PCH@/PX@/Rev01@/Rev02@/Rev03@/Rev04@/Rev10@/UMA@/WIN8@/X76@)
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
ZZZ
X76@
HYN 1G
ZZZ
X76@
SAM 1G
UH1
BD82HM70 QPXH C1 BGA 989P
PCH@
ZZZ
DAZ@
PCB LA-6732P REV10
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
DA8@
PCB LA-9351P REV01
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
ZZZ
PCB LS-6732P REV10
2
DA4@ZZZ
ZZZ
HYN 1G
ZZZ
SAM 1G
@
@
R359
@
10K_0402_5%
R360
@
10K_0402_5%
ZZZ
PCB LS-6731P REV10
R361
@ R462
10K_0402_5%
R361
@
10K_0402_5%
DA2@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
@
10K_0402_5%
R461
@
10K_0402_5%
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Notes List
Notes List
Notes List
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
1
of
4 50Monday, July 16, 2012
of
4 50Monday, July 16, 2012
of
4 50Monday, July 16, 2012
0.1
0.1
0.1
http://mycomp.su/x/
5
4
+1.05VS_VCCP
3
2
1
RC2
24.9_0402_1%
D D
DMI_PTX_CRX_N0<21>
DMI_PTX_CRX_N1<21>
DMI_PTX_CRX_N2<21>
DMI_PTX_CRX_N3<21>
DMI_PTX_CRX_P0<21>
DMI_PTX_CRX_P1<21>
DMI_PTX_CRX_P2<21>
DMI_PTX_CRX_P3<21>
DMI_CTX_PRX_N0<21>
DMI_CTX_PRX_N1<21>
DMI_CTX_PRX_N2<21>
DMI_CTX_PRX_N3<21>
DMI_CTX_PRX_P0<21>
DMI_CTX_PRX_P1<21>
DMI_CTX_PRX_P2<21>
DMI_CTX_PRX_P3<21>
FDI_CTX_PRX_N0<21>
FDI_CTX_PRX_N1<21>
FDI_CTX_PRX_N2<21>
FDI_CTX_PRX_N3<21>
FDI_CTX_PRX_N4<21>
FDI_CTX_PRX_N5<21>
C C
+1.05VS_VCCP
+1.05VS_VCCP
B B
FDI_CTX_PRX_N6<21>
FDI_CTX_PRX_N7<21>
FDI_CTX_PRX_P0<21>
FDI_CTX_PRX_P1<21>
FDI_CTX_PRX_P2<21>
FDI_CTX_PRX_P3<21>
FDI_CTX_PRX_P4<21>
FDI_CTX_PRX_P5<21>
FDI_CTX_PRX_P6<21>
FDI_CTX_PRX_P7<21>
FDI_FSYNC0<21>
FDI_FSYNC1<21>
FDI_INT<21>
FDI_LSYNC0<21>
FDI_LSYNC1<21>
RC4 24.9_0402_1%
10K_0402_5%
R88
@
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
EDP_COMP
EDP_HPD#
JCPU1A
B27
DMI_RX#[0]
B25
DMI_RX#[1]
A25
DMI_RX#[2]
B24
DMI_RX#[3]
B28
DMI_RX[0]
B26
DMI_RX[1]
A24
DMI_RX[2]
B23
DMI_RX[3]
G21
DMI_TX#[0]
E22
DMI_TX#[1]
F21
DMI_TX#[2]
D21
DMI_TX#[3]
G22
DMI_TX[0]
D22
DMI_TX[1]
F20
DMI_TX[2]
C21
DMI_TX[3]
A21
FDI0_TX#[0]
H19
FDI0_TX#[1]
E19
FDI0_TX#[2]
F18
FDI0_TX#[3]
B21
FDI1_TX#[0]
C20
FDI1_TX#[1]
D18
FDI1_TX#[2]
E17
FDI1_TX#[3]
A22
FDI0_TX[0]
G19
FDI0_TX[1]
E20
FDI0_TX[2]
G18
FDI0_TX[3]
B20
FDI1_TX[0]
C19
FDI1_TX[1]
D19
FDI1_TX[2]
F17
FDI1_TX[3]
J18
FDI0_FSYNC
J17
FDI1_FSYNC
H20
FDI_INT
J19
FDI0_LSYNC
H17
FDI1_LSYNC
A18
eDP_COMPIO
A17
eDP_ICOMPO
B16
eDP_HPD#
C15
eDP_AUX
D15
eDP_AUX#
C17
eDP_TX[0]
F16
eDP_TX[1]
C16
eDP_TX[2]
G15
eDP_TX[3]
C18
eDP_TX#[0]
E16
eDP_TX#[1]
D16
eDP_TX#[2]
F15
eDP_TX#[3]
TYCO_2013620-2_IVY BRIDGE
CONN@
J22
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PCI EXPRESS* - GRAPHICS
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
DMI
Intel(R) FDI
eDP
J21
H22
K33
PCIE_GTX_C_CRX_N0
M35
PCIE_GTX_C_CRX_N1
L34
PCIE_GTX_C_CRX_N2
J35
PCIE_GTX_C_CRX_N3
J32
PCIE_GTX_C_CRX_N4
H34
PCIE_GTX_C_CRX_N5
H31
PCIE_GTX_C_CRX_N6
G33
PCIE_GTX_C_CRX_N7
G30
PCIE_GTX_C_CRX_N8
F35
PCIE_GTX_C_CRX_N9
E34
PCIE_GTX_C_CRX_N10
E32
PCIE_GTX_C_CRX_N11
D33
PCIE_GTX_C_CRX_N12
D31
PCIE_GTX_C_CRX_N13
B33
PCIE_GTX_C_CRX_N14
C32
PCIE_GTX_C_CRX_N15
J33
PCIE_GTX_C_CRX_P0
L35
PCIE_GTX_C_CRX_P1
K34
PCIE_GTX_C_CRX_P2
H35
PCIE_GTX_C_CRX_P3
H32
PCIE_GTX_C_CRX_P4
G34
PCIE_GTX_C_CRX_P5
G31
PCIE_GTX_C_CRX_P6
F33
PCIE_GTX_C_CRX_P7
F30
PCIE_GTX_C_CRX_P8
E35
PCIE_GTX_C_CRX_P9
E33
PCIE_GTX_C_CRX_P10
F32
PCIE_GTX_C_CRX_P11
D34
PCIE_GTX_C_CRX_P12
E31
PCIE_GTX_C_CRX_P13
C33
PCIE_GTX_C_CRX_P14
B32
PCIE_GTX_C_CRX_P15
M29
PCIE_CTX_GRX_N0
M32
PCIE_CTX_GRX_N1
M31
PCIE_CTX_GRX_N2
L32
PCIE_CTX_GRX_N3
L29
PCIE_CTX_GRX_N4
K31
PCIE_CTX_GRX_N5
K28
PCIE_CTX_GRX_N6
J30
PCIE_CTX_GRX_N7
J28
PCIE_CTX_GRX_N8
H29
PCIE_CTX_GRX_N9
G27
PCIE_CTX_GRX_N10
E29
PCIE_CTX_GRX_N11
F27
PCIE_CTX_GRX_N12
D28
PCIE_CTX_GRX_N13
F26
PCIE_CTX_GRX_N14
E25
PCIE_CTX_GRX_N15
M28
PCIE_CTX_GRX_P0
M33
PCIE_CTX_GRX_P1
M30
PCIE_CTX_GRX_P2
L31
PCIE_CTX_GRX_P3
L28
PCIE_CTX_GRX_P4
K30
PCIE_CTX_GRX_P5
K27
PCIE_CTX_GRX_P6
J29
PCIE_CTX_GRX_P7
J27
PCIE_CTX_GRX_P8
H28
PCIE_CTX_GRX_P9
G28
PCIE_CTX_GRX_P10
E28
PCIE_CTX_GRX_P11
F28
PCIE_CTX_GRX_P12
D27
PCIE_CTX_GRX_P13
E26
PCIE_CTX_GRX_P14
D25
PCIE_CTX_GRX_P15
PEG_COMP
PEG_ICOMPI and RCOMPO signals should be shorted and routed
with - max length = 500 mils - typical impedance = 43 mohms
PEG_ICOMPO signals should be routed with - max length = 500 mils
- typical impedance = 14.5 mohms
PCIE_GTX_C_CRX_N[0..15] <13>
PCIE_GTX_C_CRX_P[0..15] <13>
1 2
C136 0.1U_0402_16V7KPX@
1 2
C222 0.1U_0402_16V7KPX@
1 2
C60 0.1U_0402_16V7KPX@
1 2
C67 0.1U_0402_16V7KPX@
1 2
C75 0.1U_0402_16V7KPX@
1 2
C118 0.1U_0402_16V7KPX@
1 2
C220 0.1U_0402_16V7KPX@
1 2
C59 0.1U_0402_16V7KPX@
1 2
C62 0.1U_0402_16V7KPX@
1 2
C70 0.1U_0402_16V7KPX@
1 2
C115 0.1U_0402_16V7KPX@
1 2
C197 0.1U_0402_16V7KPX@
1 2
C223 0.1U_0402_16V7KPX@
1 2
C61 0.1U_0402_16V7KPX@
1 2
C68 0.1U_0402_16V7KPX@
1 2
C88 0.1U_0402_16V7KPX@
1 2
C209 0.1U_0402_16V7KPX@
1 2
C224 0.1U_0402_16V7KPX@
1 2
C66 0.1U_0402_16V7KPX@
1 2
C69 0.1U_0402_16V7KPX@
1 2
C89 0.1U_0402_16V7KPX@
1 2
C135 0.1U_0402_16V7KPX@
1 2
C221 0.1U_0402_16V7KPX@
1 2
C71 0.1U_0402_16V7KPX@
1 2
C72 0.1U_0402_16V7KPX@
1 2
C74 0.1U_0402_16V7KPX@
1 2
C117 0.1U_0402_16V7KPX@
1 2
C214 0.1U_0402_16V7KPX@
1 2
C78 0.1U_0402_16V7KPX@
1 2
C79 0.1U_0402_16V7KPX@
1 2
C87 0.1U_0402_16V7KPX@
1 2
C111 0.1U_0402_16V7KPX@
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N[0..15] <13>
PCIE_CTX_C_GRX_P[0..15] <13>
JCPU1I
T35
VSS161
T34
VSS162
T33
VSS163
T32
VSS164
T31
VSS165
T30
VSS166
T29
VSS167
T28
VSS168
T27
VSS169
T26
VSS170
P9
VSS171
P8
VSS172
P6
VSS173
P5
VSS174
P3
VSS175
P2
VSS176
N35
VSS177
N34
VSS178
N33
VSS179
N32
VSS180
N31
VSS181
N30
VSS182
N29
VSS183
N28
VSS184
N27
VSS185
N26
VSS186
M34
VSS187
L33
VSS188
L30
VSS189
L27
VSS190
L9
VSS191
L8
VSS192
L6
VSS193
L5
VSS194
L4
VSS195
L3
VSS196
L2
VSS197
L1
VSS198
K35
VSS199
K32
VSS200
K29
VSS201
K26
VSS202
J34
VSS203
J31
VSS204
H33
VSS205
H30
VSS206
H27
VSS207
H24
VSS208
H21
VSS209
H18
VSS210
H15
VSS211
H13
VSS212
H10
VSS213
H9
VSS214
H8
VSS215
H7
VSS216
H6
VSS217
H5
VSS218
H4
VSS219
H3
VSS220
H2
VSS221
H1
VSS222
G35
VSS223
G32
VSS224
G29
VSS225
G26
VSS226
G23
VSS227
G20
VSS228
G17
VSS229
G11
VSS230
F34
VSS231
F31
VSS232
F29
VSS233
VSS
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
TYCO_2013620-2_IVY BRIDGE
CONN@
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
PROCESSOR(1/6) DMI,FDI,PEG
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
1
5 50Monday, July 16, 2012
5 50Monday, July 16, 2012
5 50Monday, July 16, 2012
of
of
of
0.1
0.1
0.1
http://mycomp.su/x/
5
4
3
2
1
SYS_PWROK<21>
RC11
200_0402_1%
+3VS
CLK_CPU_DMI <20>
CLK_CPU_DMI# <20>
+3V_PCH +3VS
R104
@
0_0402_5%
RC21 0_0402_5%
RUN_ON_CPU1.5VS3#<10>
PLT_RST#<22,31,32,36>
DDR3 Compensation Signals
SM_RCOMP_0 XDP_TDO_R
SM_RCOMP_1
SM_RCOMP_2
10K_0402_5%
D_PWG
+1.05VS_VCCP
RC13
SUSP<11,39>
+3VS
RC15
200_0402_1%
D D
DRAMPWROK<21>
C C
Processor Pullups
H_PROCHOT#
H_PWRGOOD
B B
A A
+1.05VS_VCCP
R47
62_0402_5%
R5010K_0402_5%
H_PECI<23,36>
H_PROCHOT#<36,40>
H_THERMTRIP#<23>
H_PM_SYNC<21>
H_PWRGOOD<23>
PM_SYS_PWRGD_BUF
H_SNB_IVB#<23>
T20 @
RC44
56_0402_5%
130_0402_1%
43_0402_1%
R58
R82
H_CATERR#
1 2
H_PROCHOT#_R
H_THERMTRIP#
PM_DRAM_PWRGD_R
BUF_CPU_RST#
H_PECI_R
JCPU1B
C26
PROC_SELECT#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
TYCO_2013620-2_IVY BRIDGE
CONN@
A28
BCLK
A27
BCLK#
A16
MISCTHERMALPWR MANAGEMENT
DPLL_REF_CLK
DPLL_REF_CLK#
A15
CLK_CPU_DPLL_R
CLK_CPU_DPLL#_R
CLOCKS
R8
TCK
TMS
TDO
TDI
H_DRAMRST#
AK1
SM_RCOMP_0
A5
SM_RCOMP_1
A4
SM_RCOMP_2
AP29
XDP_PRDY#_R
AP27
XDP_PREQ#_R
AR26
XDP_TCK_R
AR27
XDP_TMS_R
AP30
XDP_TRST#_R
AR28
XDP_TDI_R
AP26
XDP_TDO_R
AL35
XDP_DBRESET#_R
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
DDR3
JTAG & BPM
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
MISC
PRDY#
PREQ#
TRST#
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
@
T504 @
T505 @
R126 1K_0402_5%
R115 1K_0402_5%
H_DRAMRST# <7>
R138
1K_0402_5%
@
+3V_PCH
0.1U_0402_16V4Z
5
U5
1
B
4
Y
VCC
2
A
G
MC74VHC1G09DFT2G_SC70-5
3
RC17
@
0_0402_5%
RC16
@
0_0402_5%
+3VS
0.1U_0402_16V4Z
C84
5
1
U3
P
4
BUFO_CPU_RST# BUF_CPU_RST#
NC
A2Y
G
SN74LVC1G07DCKR_SC70-5
3
RC42140_0402_1%
RC4325.5_0402_1%
RC45200_0402_1%
2
G
+1.05VS_VCCP
+1.5V_CPU_VDDQ
@
R110
39_0402_1%
@
Q5
13
D
S
R64
75_0402_5%
R72
43_0402_1%
PM_SYS_PWRGD_BUF
SSM3K7002FU_SC70-3
CC33
PU/PD for JTAG signals
XDP_TMS_R
XDP_TDI_R
XDP_PREQ#_R
XDP_TCK_R
XDP_TRST#_R
R81
200_0402_1%
@
R73
0_0402_5%
+1.05VS_VCCP
R11451_0402_5%
R5951_0402_5%
R6051_0402_5% @
R7551_0402_5%
R11651_0402_5%
R7451_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Secret Data
Compal Secret Data
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
PROCESSOR(2/6) PM,XDP,CLK
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
1
6 50Monday, July 16, 2012
6 50Monday, July 16, 2012
6 50Monday, July 16, 2012
of
of
of
0.1
0.1
0.1
http://mycomp.su/x/
5
4
3
2
1
JCPU1C
DDR_A_D[0..63]<11>
D D
C C
B B
A A
DDR_A_BS0<11>
DDR_A_BS1<11>
DDR_A_BS2<11>
DDR_A_CAS#<11>
DDR_A_RAS#<11>
DDR_A_WE#<11>
H_DRAMRST#<6>
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
4.99K_0402_1%
5
R119
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
V6
AE8
AD9
AF9
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
TYCO_2013620-2_IVY BRIDGE
CONN@
@
R124 0_0402_5%
Q6
D
S
13
SSM3K7002FU_SC70-3
G
2
DRAMRST_CNTRL
C86
0.047U_0402_16V4Z
DDR SYSTEM MEMORY A
DDR3_DRAMRST#_RH_DRAMRST#
SA_CLK[0]
SA_CLK#[0]
SA_CKE[0]
SA_CLK[1]
SA_CLK#[1]
SA_CKE[1]
RSVD_TP[1]
RSVD_TP[2]
RSVD_TP[3]
RSVD_TP[4]
RSVD_TP[5]
RSVD_TP[6]
SA_CS#[0]
SA_CS#[1]
RSVD_TP[7]
RSVD_TP[8]
SA_ODT[0]
SA_ODT[1]
RSVD_TP[9]
RSVD_TP[10]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
+1.5V
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
DDR_A_DQS#0
G6
DDR_A_DQS#1
J3
DDR_A_DQS#2
M6
DDR_A_DQS#3
AL6
DDR_A_DQS#4
AM8
DDR_A_DQS#5
AR12
DDR_A_DQS#6
AM15
DDR_A_DQS#7
D4
DDR_A_DQS0
F6
DDR_A_DQS1
K3
DDR_A_DQS2
N6
DDR_A_DQS3
AL5
DDR_A_DQS4
AM9
DDR_A_DQS5
AR11
DDR_A_DQS6
AM14
DDR_A_DQS7
AD10
DDR_A_MA0
W1
DDR_A_MA1
W2
DDR_A_MA2
W7
DDR_A_MA3
V3
DDR_A_MA4
V2
DDR_A_MA5
W3
DDR_A_MA6
W6
DDR_A_MA7
V1
DDR_A_MA8
W5
DDR_A_MA9
AD8
DDR_A_MA10
V4
DDR_A_MA11
W4
DDR_A_MA12
AF8
DDR_A_MA13
V5
DDR_A_MA14
V7
DDR_A_MA15
R123
1K_0402_5%
R129 1K_0402_5%
R118 0_0402_5%
12
R83 0_0402_5%DS3@
4
DDRA_CLK0 <11>
DDRA_CLK0# <11>
DDRA_CKE0 <11>
DDRA_CLK1 <11>
DDRA_CLK1# <11>
DDRA_CKE1 <11>
DDRA_SCS0# <11>
DDRA_SCS1# <11>
DDRA_ODT0 <11>
DDRA_ODT1 <11>
DDR_A_DQS#[0..7] <11>
DDR_A_DQS[0..7] <11>
DDR_A_MA[0..15] <11>
SM_DRAMRST# <11,12>
DRAMRST_CNTRL_PCH <10,20>
DRAMRST_CNTRL_EC <36>
DS3
DDR_B_D[0..63]<12>
DDR_B_BS0<12>
DDR_B_BS1<12>
DDR_B_BS2<12>
DDR_B_CAS#<12>
DDR_B_RAS#<12>
DDR_B_WE#<12>
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
JCPU1D
C9
SB_DQ[0]
A7
SB_DQ[1]
D10
SB_DQ[2]
C8
SB_DQ[3]
A9
SB_DQ[4]
A8
SB_DQ[5]
D9
SB_DQ[6]
D8
SB_DQ[7]
G4
SB_DQ[8]
F4
SB_DQ[9]
F1
SB_DQ[10]
G1
SB_DQ[11]
G5
SB_DQ[12]
F5
SB_DQ[13]
F2
SB_DQ[14]
G2
SB_DQ[15]
J7
SB_DQ[16]
J8
SB_DQ[17]
K10
SB_DQ[18]
K9
SB_DQ[19]
J9
SB_DQ[20]
J10
SB_DQ[21]
K8
SB_DQ[22]
K7
SB_DQ[23]
M5
SB_DQ[24]
N4
SB_DQ[25]
N2
SB_DQ[26]
N1
SB_DQ[27]
M4
SB_DQ[28]
N5
SB_DQ[29]
M2
SB_DQ[30]
M1
SB_DQ[31]
AM5
SB_DQ[32]
AM6
SB_DQ[33]
AR3
SB_DQ[34]
AP3
SB_DQ[35]
AN3
SB_DQ[36]
AN2
SB_DQ[37]
AN1
SB_DQ[38]
AP2
SB_DQ[39]
AP5
SB_DQ[40]
AN9
SB_DQ[41]
AT5
SB_DQ[42]
AT6
SB_DQ[43]
AP6
SB_DQ[44]
AN8
SB_DQ[45]
AR6
SB_DQ[46]
AR5
SB_DQ[47]
AR9
SB_DQ[48]
AJ11
SB_DQ[49]
AT8
SB_DQ[50]
AT9
SB_DQ[51]
AH11
SB_DQ[52]
AR8
SB_DQ[53]
AJ12
SB_DQ[54]
AH12
SB_DQ[55]
AT11
SB_DQ[56]
AN14
SB_DQ[57]
AR14
SB_DQ[58]
AT14
SB_DQ[59]
AT12
SB_DQ[60]
AN15
SB_DQ[61]
AR15
SB_DQ[62]
AT15
SB_DQ[63]
AA9
SB_BS[0]
AA7
SB_BS[1]
R6
SB_BS[2]
AA10
SB_CAS#
AB8
SB_RAS#
AB9
SB_WE#
TYCO_2013620-2_IVY BRIDGE
CONN@
2
AE2
SB_CLK[0]
AD2
SB_CLK#[0]
R9
SB_CKE[0]
AE1
SB_CLK[1]
AD1
SB_CLK#[1]
R10
SB_CKE[1]
AB2
RSVD_TP[11]
AA2
RSVD_TP[12]
T9
RSVD_TP[13]
AA1
RSVD_TP[14]
AB1
RSVD_TP[15]
T10
RSVD_TP[16]
AD3
SB_CS#[0]
AE3
SB_CS#[1]
AD6
RSVD_TP[17]
AE6
RSVD_TP[18]
AE4
SB_ODT[0]
AD4
SB_ODT[1]
AD5
RSVD_TP[19]
AE5
RSVD_TP[20]
D7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
DDR SYSTEM MEMORY B
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_B_DQS#0
F3
DDR_B_DQS#1
K6
DDR_B_DQS#2
N3
DDR_B_DQS#3
AN5
DDR_B_DQS#4
AP9
DDR_B_DQS#5
AK12
DDR_B_DQS#6
AP15
DDR_B_DQS#7
C7
DDR_B_DQS0
G3
DDR_B_DQS1
J6
DDR_B_DQS2
M3
DDR_B_DQS3
AN6
DDR_B_DQS4
AP8
DDR_B_DQS5
AK11
DDR_B_DQS6
AP14
DDR_B_DQS7
AA8
DDR_B_MA0
T7
DDR_B_MA1
R7
DDR_B_MA2
T6
DDR_B_MA3
T2
DDR_B_MA4
T4
DDR_B_MA5
T3
DDR_B_MA6
R2
DDR_B_MA7
T5
DDR_B_MA8
R3
DDR_B_MA9
AB7
DDR_B_MA10
R1
DDR_B_MA11
T1
DDR_B_MA12
AB10
DDR_B_MA13
R5
DDR_B_MA14
R4
DDR_B_MA15
Compal Electronics, Inc.
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
PROCESSOR(3/6) DDRIII
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
1
DDRB_CLK0 <12>
DDRB_CLK0# <12>
DDRB_CKE0 <12>
DDRB_CLK1 <12>
DDRB_CLK1# <12>
DDRB_CKE1 <12>
DDRB_SCS0# <12>
DDRB_SCS1# <12>
DDRB_ODT0 <12>
DDRB_ODT1 <12>
DDR_B_DQS#[0..7] <12>
DDR_B_DQS[0..7] <12>
DDR_B_MA[0..15] <12>
of
of
of
7 50Monday, July 16, 2012
7 50Monday, July 16, 2012
7 50Monday, July 16, 2012
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5
4
3
2
1
CFG Straps for Processor
D D
JCPU1E
RSVD28
RSVD29
RSVD30
RSVD31
RSVD32
RSVD33
RSVD34
RSVD35
RSVD37
RSVD38
RSVD39
RSVD40
RSVD_NCTF1
RSVD_NCTF2
RSVD_NCTF3
RSVD_NCTF4
RSVD_NCTF5
RSVD_NCTF6
RSVD_NCTF7
RSVD_NCTF8
RSVD_NCTF9
RSVD51
RSVD52
BCLK_ITP
BCLK_ITP#
AH27
AH26
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AN35
AM35
AT2
AT1
AR1
B1
KEY
RESERVED
VCC_DIE_SENSE
VSS_DIE_SENSE
RSVD_NCTF10
RSVD_NCTF11
RSVD_NCTF12
RSVD_NCTF13
AK28
CFG[0]
AK29
CFG[1]
AL26
CFG[2]
AL27
CFG[3]
AK26
CFG[4]
AL29
CFG[5]
AL30
CFG[6]
AM31
CFG[7]
AM32
CFG[8]
AM30
CFG[9]
AM28
CFG[10]
AM26
CFG[11]
AN28
CFG[12]
AN31
CFG[13]
AN26
CFG[14]
AM27
CFG[15]
AK31
CFG[16]
AN29
CFG[17]
AJ31
VAXG_VAL_SENSE
AH31
VSSAXG_VAL_SENSE
AJ33
VCC_VAL_SENSE
AH33
VSS_VAL_SENSE
AJ26
RSVD5
F25
RSVD8
F24
RSVD9
F23
RSVD10
D24
RSVD11
G25
RSVD12
G24
RSVD13
E23
RSVD14
D23
RSVD15
C30
RSVD16
A31
RSVD17
B30
RSVD18
B29
RSVD19
D30
RSVD20
B31
RSVD21
A30
RSVD22
C29
RSVD23
J20
RSVD24
B18
RSVD25
J15
RSVD27
TYCO_2013620-2_IVY BRIDGE
CONN@
CFG
T0718 @
T0724 @
T0725 @
T0726 @
T0727 @
T0729 @
T0731 @
T0732 @
T0733 @
T0734 @
T0735 @
T0736 @
T0737 @
T0738 @
T0739 @
T0740 @
T0741 @
T0742 @
T0743 @
T0747 @
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
T1 @
T2 @
T3 @
T4 @
T5 @
T6 @
T7 @
T8 @
T9 @
T10 @
T11 @
T12 @
T13 @
T14 @
T15 @
T16 @
T17 @
T18 @
C C
B B
T0749@
T0750@
T0704@
T0705@
T0701@
T0702@
T0706@
T0707@
T0708@
T0709@
T0710@
T0711@
T0703@
T0712@
T0713@
T0714@
T0715@
T0716@
T0717@
T0719@
T0720@
T0721@
T0722@
T0723@
T0728@
T0730@
CLK_RES_ITP <20>
CLK_RES_ITP# <20>
T0744@
T0745@
T0746@
T0748@
PEG Static Lane Reversal - CFG2 is for the 16x
Display Port Presence Strap
PCIE Port Bifurcation Straps
CFG[6:5]
CFG2
RC51
1K_0402_1%
1:(Default) Normal Operation; Lane #
CFG2
definition matches socket pin map definition
0:Lane Reversed
CFG4
RC52
@
1K_0402_1%
1 : Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
CFG6
CFG5
RC53
@
RC54
@
1K_0402_1%
1K_0402_1%
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG7
RC56
@
1K_0402_1%
PEG DEFER TRAINING
1: (Default) PEG Train immediately
CFG7
following RESETB de assertion
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
0: PEG Wait for BIOS for training
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
PROCESSOR(4/6) RSVD,CFG
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
8 50Monday, July 16, 2012
8 50Monday, July 16, 2012
8 50Monday, July 16, 2012
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JCPU1H
AT35
VSS1
AT32
VSS2
AT29
VSS3
AT27
VSS4
AT25
VSS5
AT22
D D
C C
B B
A A
VSS6
AT19
VSS7
AT16
VSS8
AT13
VSS9
AT10
VSS10
AT7
VSS11
AT4
VSS12
AT3
VSS13
AR25
VSS14
AR22
VSS15
AR19
VSS16
AR16
VSS17
AR13
VSS18
AR10
VSS19
AR7
VSS20
AR4
VSS21
AR2
VSS22
AP34
VSS23
AP31
VSS24
AP28
VSS25
AP25
VSS26
AP22
VSS27
AP19
VSS28
AP16
VSS29
AP13
VSS30
AP10
VSS31
AP7
VSS32
AP4
VSS33
AP1
VSS34
AN30
VSS35
AN27
VSS36
AN25
VSS37
AN22
VSS38
AN19
VSS39
AN16
VSS40
AN13
VSS41
AN10
VSS42
AN7
VSS43
AN4
VSS44
AM29
VSS45
AM25
VSS46
AM22
VSS47
AM19
VSS48
AM16
VSS49
AM13
VSS50
AM10
VSS51
AM7
VSS52
AM4
VSS53
AM3
VSS54
AM2
VSS55
AM1
VSS56
AL34
VSS57
AL31
VSS58
AL28
VSS59
AL25
VSS60
AL22
VSS61
AL19
VSS62
AL16
VSS63
AL13
VSS64
AL10
VSS65
AL7
VSS66
AL4
VSS67
AL2
VSS68
AK33
VSS69
AK30
VSS70
AK27
VSS71
AK25
VSS72
AK22
VSS73
AK19
VSS74
AK16
VSS75
AK13
VSS76
AK10
VSS77
AK7
VSS78
AK4
VSS79
AJ25
VSS80
TYCO_2013620-2_IVY BRIDGE
CONN@
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
+CPU_CORE
97A
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
JCPU1F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
TYCO_2013620-2_IVY BRIDGE
CONN@
POWER
CORE SUPPLY
PEG AND DDR
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSS_SENSE_VCCIO
SENSE LINES SVID
VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8
VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24
VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39
VCCIO40
VIDALERT#
VIDSCLK
VIDSOUT
+1.05VS_VCCP
8.5A
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
+1.05VS_VCCP +1.05VS_VCCP
RC137
130_0402_1%
AJ29
H_CPU_SVIDALRT#
AJ30
H_CPU_SVIDCLK
AJ28
H_CPU_SVIDDAT
Place the PU
resistors close to CPU
AJ35
VCCSENSE_R VCCSENSE
AJ34
VSSSENSE_R
B10
A10
RC61 43_0402_1%
RC59 0_0402_5%
RC65 0_0402_5%
R51 0_0402_5%
R52 0_0402_5%
12
R158
10_0402_1%
RC60
75_0402_5%
VCCIO_SENSE <44>
Place the PU
resistors close to CPU
VR_SVID_ALRT# <47>
VR_SVID_CLK <47>
VR_SVID_DAT <47>
+CPU_CORE
R53
100_0402_1%
VSSSENSE
R54
100_0402_1%
Close to CPU
VCCIO_SENSE
1 2
R80
10_0402_5%
VCCSENSE <47>
VSSSENSE <47>
+1.05VS_VCCP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
Compal Secret Data
Compal Secret Data
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Title
Title
Title
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
PROCESSOR(5/6) PWR,BYPASS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
Date: Sheet of
Date: Sheet
Date: Sheet
1
of
of
9 50Monday, July 16, 2012
9 50Monday, July 16, 2012
9 50Monday, July 16, 2012
0.1
0.1
0.1
http://mycomp.su/x/
5
D D
R132
SUSP#<36,39,43,44,45,50>
CPU1.5V_S3_GATE<36>
@
0_0402_5%
0_0402_5%
R133
@
2
RC100
100K_0402_5%
4
R134
100K_0402_5%
RUN_ON_CPU1.5VS3#
61
Q208A
2N7002DW-7-F_SOT363-6
+VSB+3VALW
R135
100K_0402_5%
3
Q208B
5
2N7002DW-7-F_SOT363-6
4
3
+1.5V_CPU_VDDQ
Q7
+1.5V +1.5V_CPU_VDDQ
MDU1512RH_PPAK56-8-5
5
RUN_ON_CPU1.5VS3
4
0.1U_0603_50V7K
C196
R136
330K_0402_5%
2
1
2
3
R131
220_0402_5%
1 2
13
D
2
G
S
RUN_ON_CPU1.5VS3#
Q8
2N7002H 1N SOT23-3
RUN_ON_CPU1.5VS3# <6>
1
Close to CPU
VCC_AXG_SENSE
VSS_AXG_SENSE
VCC_AXG_SENSE <47>
VSS_AXG_SENSE <47 >
+V_SM_VREF_CNT
VREFDQ_DIMMA_CPU
VREFDQ_DIMMB_CPU
+1.5V_CPU_VDDQ
10A
6A
H_VCCSA_VID0 <46>
H_VCCSA_VID1 <46>
IVY Bridge drives VCCIO_SEL low
VCCP_PWRCTRL:0
Sandy Bridge is NC for A19
VCCP_PWRCTRL:1
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54
VCCPLL1
VCCPLL2
VCCPLL3
POWER
GRAPHICS
1.8V RAIL
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SA_DIMM_VREFDQ
SB_DIMM_VREFDQ
VREFMISC
DDR3 -1.5V RAILS
SA RAIL
VCCSA_SENSE
VCCSA_VID[0]
VCCSA_VID[1]
4
SM_VREF
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8
VCCIO_SEL
AK35
AK34
AL1
B4
D1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
A19
JCPU1G
33A
C C
+GFX_CORE
B B
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AH24
AH23
AH21
AH20
AH18
AH17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
+1.8VS
RC120
0_0805_5%
+1.8VS_VCCPLL
10U_0805_6.3V6M
1U_0402_6.3V6K
1
1
CC58
CC59
2
2
A A
5
1.5A
B6
1U_0402_6.3V6K
CC60
A6
A2
330U_D2_2V_Y
1
@
+
CC61
2
TYCO_2013620-2_IVY BRIDGE
CONN@
10U_0805_10VM
CC51
R78 100_0402_1%
R79 100_0402_1%
10U_0805_10VM
CC52
10U_0805_6.3V6M
CC168
RC112
@
10K_0402_5%
RC1140_0402_5% @
+GFX_CORE
+V_SM_VREF should
have 10 mil trace width
+1.5V_CPU_VDDQ
RC760_0402_5%
QC5
@
D
S
13
G
PMV45EN_SOT23-3
2
RUN_ON_CPU1.5VS3
10U_0805_6.3V6M
10U_0805_10VM
10U_0805_10VM
10U_0805_10VM
CC55
CC53
CC54
10U_0805_6.3V6M
10U_0805_6.3V6M
330U_D2_2V_Y
1
CC170
RC81
+3VS
VCCP_PWRCTRLH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SELH_VCCP_SEL
Issued Date
Issued Date
Issued Date
+
CC172
@
2
+VCCSA_SENSE <46>
3
CC169
@
0_0402_5%
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+V_SM_VREF
J2
@
1 2
PAD-OPEN 4x4m
330U_D2_2V_Y
1
CC56
+
CC57
2
1 2
+VCCSA
+VCCSA_SENSE
RC132 100_0402_5%
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
RC118
1K_0402_1%
RC119
1K_0402_1%
+1.5V
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Intel future processor compatibility design. --DG1.5 P113
RC77 0_0402_5%
@
RC79
3
VREFDQ_DIMMA_CPU
VREFDQ_DIMMB_CPU
2
2
RC121
@
+1.5V_CPU_VDDQ +1.5V
1
1K_0402_1%
@
RC78 0_0402_5%
@
2
RC122
1K_0402_1%@
1
@
C199 0.1U_0402_10V7K
C201 0.1U_0402_10V7K
C202 0.1U_0402_10V7K
C203 0.1U_0402_10V7K
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
0_0402_5%@
QC6
AP2302GN-HF_SOT23-3
DRAMRST_CNT
QC7
AP2302GN-HF_SOT23-3
DRAMRST_CNT
R120
0_0402_5%
@
RC80
3
0_0402_5%
@
Compal Electronics, Inc.
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
PROCESSOR(6/6) PWR,VSS
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
+V_DDR_REFA
RC83
@
0_0402_5%
DRAMRST_CNTRL_PCH <7,20>
+V_DDR_REFB
RC84
@
0_0402_5%
1
10 50Monday, July 16, 2012
10 50Monday, July 16, 2012
10 50Monday, July 16, 2012
+VREF_CA
+VREF_CB
of
of
of
0.1
0.1
0.1
http://mycomp.su/x/
5
+1.5V
R55
1K_0402_1%
+V_DDR_REFA
D D
C C
B B
A A
R57
1K_0402_1%
0.1U_0402_10V6K
CD50
DDRA_CKE0<7>
DDR_A_BS2<7>
DDRA_CLK0<7>
DDRA_CLK0#<7>
DDR_A_BS0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDRA_SCS1#<7>
+3VS
5
2.2U_0603_6.3V6K
0.1U_0402_10V6K
CD2
CD1
0.1U_0402_10V6K
2.2U_0603_6.3V6K
C160
+1.5V +1.5V
DDR3 SO-DIMM A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDRA_CKE0
DDR_A_BS2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDRA_CLK0
DDRA_CLK0#
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS# DDRA_ODT0
DDR_A_MA13
DDRA_SCS1#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
C161
R67
10K_0402_5%
R68
10K_0402_5%
4
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
JDDRL
@
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
VREF_CA
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1
FOX_AS0A626-U2RN-7F_204P
4
VSS3
DQS#0
DQS0
VSS6
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
VDD18
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
DQ4
DQ5
DQ6
DQ7
A15
A14
A11
CK1
BA1
S0#
NC2
3
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_DQS#[0..7]<7>
DDRA_CKE1 <7>
0.1U_0402_10V6K
C138
Issued Date
Issued Date
Issued Date
DDR_A_MA[0..15]<7>
RC82 0_0402_5%
@
RC85 0_0402_5%
@
+1.5V
R56
1K_0402_1%
2.2U_0603_6.3V6K
C139
R62
1K_0402_1%
+V1.05S_VCCP_PWRGOOD<44,46>
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
+VREF_CA
0.75VR_EN<45>
0.75VR_EN
R5535
100K_0402_5%
2N7002DW-T/R7_SOT363-6
SUSP<6,39>
Q5520A
SUSP
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
0.75VR_EN#
5
61
2
2
4
DDR_A_D4
6
DDR_A_D5
8
10
DDR_A_DQS#0
12
DDR_A_DQS0
14
16
DDR_A_D6
18
DDR_A_D7
20
22
DDR_A_D12
24
DDR_A_D13
26
28
30
SM_DRAMRST#
32
34
DDR_A_D14
36
DDR_A_D15
38
40
DDR_A_D20
42
DDR_A_D21
44
46
48
50
DDR_A_D22
52
DDR_A_D23
54
56
DDR_A_D28
58
DDR_A_D29
60
62
DDR_A_DQS#3
64
DDR_A_DQS3
66
68
DDR_A_D30
70
DDR_A_D31
72
74
DDRA_CKE1
76
78
DDR_A_MA15
80
DDR_A_MA14
82
84
DDR_A_MA11
86
A7
A6
A4
A2
A0
G2
DDR_A_MA7
88
90
DDR_A_MA6
92
DDR_A_MA4
94
96
DDR_A_MA2
98
DDR_A_MA0
100
102
DDRA_CLK1
104
DDRA_CLK1#
106
108
DDR_A_BS1
110
DDR_A_RAS#
112
114
DDRA_SCS0#
116
118
120
DDRA_ODT1
122
124
126
128
130
DDR_A_D36
132
DDR_A_D37
134
136
138
140
DDR_A_D38
142
DDR_A_D39
144
146
DDR_A_D44
148
DDR_A_D45
150
152
DDR_A_DQS#5
154
DDR_A_DQS5
156
158
DDR_A_D46
160
DDR_A_D47
162
164
DDR_A_D52
166
DDR_A_D53
168
170
172
174
DDR_A_D54
176
DDR_A_D55
178
180
DDR_A_D60
182
DDR_A_D61
184
186
DDR_A_DQS#7
188
DDR_A_DQS7
190
192
DDR_A_D62
194
DDR_A_D63
196
198
200
PM_SMBDATA
202
PM_SMBCLK
204
206
+0.75VS
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
SM_DRAMRST# <7,12>
DDRA_CLK1 <7>
DDRA_CLK1# <7>
DDR_A_BS1 <7>
DDR_A_RAS# <7>
DDRA_SCS0# <7>
DDRA_ODT0 <7>
DDRA_ODT1 <7>
PM_SMBDATA <12,20,32>
PM_SMBCLK <12,20,32>
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
+V_DDR_REFB+V_DDR_REFA
+VREF_CB+VREF_CA
+3VALW
R5536
100K_0402_5%
3
Q5520B
2N7002DW-T/R7_SOT363-6
4
2
+1.5V
1
Layout Note:
Place near JDDRL
10U_0603_6.3V6M
330U_B2_2.5VM_R15M
CD7
CD8
1
+
@
2
CD9
1
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
10U_0603_6.3V6M
10U_0603_6.3V6M
CD10
CD11
1
1
2
2
Layout Note: Place these 4 Caps near
Command and Control signals of JDDRL
+1.5V
0.1U_0402_10V6K
0.1U_0402_10V6K
CD17
Layout Note:
Place near JDDRL.203,204
+0.75VS
CD21
1U_0402_6.3V6K
1
1
2
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDRIII-DDRL
DDRIII-DDRL
DDRIII-DDRL
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
CD12
1
1
2
2
0.1U_0402_10V6K
CD19
CD18
CD22
1U_0402_6.3V6K
CD23
1U_0402_6.3V6K
1
2
1
10U_0603_6.3V6M
CD13
CD14
1
1
@
2
2
0.1U_0402_10V6K
CD20
CD24
1U_0402_6.3V6K
1
2
0.1
0.1
11 50Monday, July 16, 2012
11 50Monday, July 16, 2012
11 50Monday, July 16, 2012
0.1
of
of
of
http://mycomp.su/x/
5
+1.5V
R66
1K_0402_1%
+V_DDR_REFB
D D
C C
B B
A A
R65
1K_0402_1%
2.2U_0603_6.3V6K
DDRB_CKE0<7>
DDR_B_BS2<7>
DDRB_CLK0<7>
DDRB_CLK0#<7>
DDR_B_BS0<7>
DDR_B_WE#<7>
DDR_B_CAS#<7>
DDRB_SCS1#<7>
+3VS
5
0.1U_0402_10V6K
0.1U_0402_10V6K
C163
C162
2.2U_0603_6.3V6K
C185
DDR_B_D0
DDR_B_D1
C164
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDRB_CKE0
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDRB_CLK0
DDRB_CLK0#
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS# DDRB_ODT0
DDR_B_MA13
DDRB_SCS1#
DDR_B_D32
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
R76
10K_0402_5%
0.1U_0402_10V6K
C186
R77 10K_0402_5%
+1.5V +1.5V
3A@1.5V
3A@1.5V
3A@1.5V3A@1.5V
4
JDDRH
@
VREF_DQ1VSS1
3
VSS2
5
DQ0
7
DQ1
9
VSS4
11
DM0
13
VSS5
15
DQ2
17
DQ3
19
VSS7
21
DQ8
23
DQ9
25
VSS9
27
DQS#1
DQS129RESET#
VSS1131VSS12
33
DQ10
35
DQ11
VSS1337VSS14
39
DQ16
41
DQ17
VSS1543VSS16
45
DQS#2
47
DQS2
49
VSS18
51
DQ18
53
DQ19
55
VSS20
57
DQ24
59
DQ25
VSS2261DQS#3
63
DM3
VSS2365VSS24
67
DQ26
69
DQ27
VSS2571VSS26
73
CKE0
75
VDD1
77
NC1
79
BA2
81
VDD3
83
A12/BC#
85
A9
87
VDD5
89
A8
91
A5
93
VDD7
95
A3
97
A1
99
VDD9
101
CK0
103
CK0#
105
VDD11
107
A10/AP
109
BA0
111
VDD13
113
WE#
115
CAS#
117
VDD15
119
A13
121
S1#
123
VDD17
125
NCTEST
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
VREF_CA
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
G1
FOX_AS0A626-UARN-7F_204P
4
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
DQ14
DQ15
DQ20
DQ21
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS3
DQ30
DQ31
CKE1
VDD2
VDD4
VDD6
VDD8
VDD10
CK1
CK1#
VDD12
RAS#
VDD14
ODT0
VDD16
ODT1
NC2
VDD18
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
3
DDR_B_DQS#[0..7]<7>
2
4
DDR_B_D4
6
DDR_B_D5
8
10
DDR_B_DQS#0
12
DDR_B_DQS0
14
16
DDR_B_D6
18
DDR_B_D7
20
22
DDR_B_D12
24
DDR_B_D13
26
28
30
SM_DRAMRST#
32
34
DDR_B_D14
36
DDR_B_D15
38
40
DDR_B_D20
42
DDR_B_D21
44
46
48
50
DDR_B_D22
52
DDR_B_D23
54
56
DDR_B_D28
58
DDR_B_D29
60
62
DDR_B_DQS#3
64
DDR_B_DQS3
66
68
DDR_B_D30
70
DDR_B_D31
72
74
DDRB_CKE1
76
78
A15
A14
A11
A7
A6
A4
A2
A0
BA1
S0#
G2
DDR_B_MA15
80
DDR_B_MA14
82
84
DDR_B_MA11
86
DDR_B_MA7
88
90
DDR_B_MA6
92
DDR_B_MA4
94
96
DDR_B_MA2
98
DDR_B_MA0
100
102
DDRB_CLK1
104
DDRB_CLK1#
106
108
DDR_B_BS1
110
DDR_B_RAS#
112
114
DDRB_SCS0#
116
118
120
DDRB_ODT1
122
124
126
+VREF_CA
128
130
DDR_B_D36
132
DDR_B_D37
134
136
138
140
DDR_B_D38
142
DDR_B_D39
144
146
DDR_B_D44
148
DDR_B_D45
150
152
DDR_B_DQS#5
154
DDR_B_DQS5
156
158
DDR_B_D46
160
DDR_B_D47
162
164
DDR_B_D52
166
DDR_B_D53
168
170
172
174
DDR_B_D54
176
DDR_B_D55
178
180
DDR_B_D60
182
DDR_B_D61
184
186
DDR_B_DQS#7
188
DDR_B_DQS7
190
192
DDR_B_D62
194
DDR_B_D63
196
198
200
PM_SMBDATA
202
PM_SMBCLK
204
206
0.65A@0.75V
0.65A@0.75V
0.65A@0.75V0.65A@0.75V
SM_DRAMRST# <7,11>
DDRB_CKE1 <7>
DDRB_CLK1 <7>
DDRB_CLK1# <7>
DDR_B_BS1 <7>
DDR_B_RAS# <7>
DDRB_SCS0# <7>
DDRB_ODT0 <7>
DDRB_ODT1 <7>
0.1U_0402_10V6K
C167
PM_SMBDATA <11,20,32>
PM_SMBCLK <11,20,32>
+0.75VS
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
DDR_B_D[0..63]<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
+1.5V
R71
1K_0402_1%
2.2U_0603_6.3V6K
+VREF_CB
C168
R69
1K_0402_1%
Compal Secret Data
Compal Secret Data
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Layout Note:
Place near JDDRH
+1.5V
330U_B2_2.5VM_R15M
10U_0603_6.3V6M
CD31
CD34
1
+
@
2
2
CD35
1
@
@
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
CD37
CD36
1
1
2
2
Layout Note: Place these 4 Caps near
Command and Control signals of JDDRH
+1.5V
Layout Note:
Place near JDDRH.203 and 204
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
VBL30/31 LA-9351P M/B
1
10U_0603_6.3V6M
10U_0603_6.3V6M
CD38
CD39
1
2
0.1U_0402_10V6K
0.1U_0402_10V6K
CD32
CD29
+0.75VS
1U_0603_10V6K
1U_0603_10V6K
CD42
DDRIII-DDRH
DDRIII-DDRH
DDRIII-DDRH
1
10U_0603_6.3V6M
10U_0603_6.3V6M
CD40
1
2
0.1U_0402_10V6K
CD30
1U_0603_10V6K
CD43
CD44
12 50Monday, July 16, 2012
12 50Monday, July 16, 2012
12 50Monday, July 16, 2012
10U_0603_6.3V6M
CD41
1
1
2
2
0.1U_0402_10V6K
CD33
1U_0603_10V6K
CD45
0.1
0.1
0.1
of
of
of
http://mycomp.su/x/
5
PCIE_CTX_C_GRX_P[15..0]<5>
PCIE_CTX_C_GRX_N[15..0]<5>
PCIE_CTX_C_GRX_P[15..0]
PCIE_CTX_C_GRX_N[15..0]
UV1A
4
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
3
PCIE_GTX_C_CRX_P[0..15] <5>
PCIE_GTX_C_CRX_N[0..15] <5>
2
UV1F
1
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
D D
C C
B B
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
Y28
Y30
W31
W29
V28
V30
U31
U29
T28
T30
R31
R29
P28
P30
N31
N29
M28
M30
K30
L31
L29
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCI EXPRESS INTERFACE
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
AH30
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
1 2
C226 0.1U_0402_16V7KPX@
1 2
C47 0.1U_0402_16V7KPX@
1 2
C116 0.1U_0402_16V7KPX@
1 2
C213 0.1U_0402_16V7KPX@
1 2
C46 0.1U_0402_16V7KPX@
1 2
C48 0.1U_0402_16V7KPX@
1 2
C40 0.1U_0402_16V7KPX@
1 2
C45 0.1U_0402_16V7KPX@
1 2
C38 0.1U_0402_16V7KPX@
1 2
C39 0.1U_0402_16V7KPX@
1 2
C36 0.1U_0402_16V7KPX@
1 2
C37 0.1U_0402_16V7KPX@
1 2
C34 0.1U_0402_16V7KPX@
1 2
C35 0.1U_0402_16V7KPX@
1 2
C32 0.1U_0402_16V7KPX@
1 2
C33 0.1U_0402_16V7KPX@
1 2
C30 0.1U_0402_16V7KPX@
1 2
C31 0.1U_0402_16V7KPX@
1 2
C28 0.1U_0402_16V7KPX@
1 2
C29 0.1U_0402_16V7KPX@
1 2
C26 0.1U_0402_16V7KPX@
1 2
C27 0.1U_0402_16V7KPX@
1 2
C24 0.1U_0402_16V7KPX@
1 2
C25 0.1U_0402_16V7KPX@
1 2
C22 0.1U_0402_16V7KPX@
1 2
C23 0.1U_0402_16V7KPX@
1 2
C20 0.1U_0402_16V7KPX@
1 2
C21 0.1U_0402_16V7KPX@
1 2
C18 0.1U_0402_16V7KPX@
1 2
C19 0.1U_0402_16V7KPX@
1 2
C16 0.1U_0402_16V7KPX@
1 2
C17 0.1U_0402_16V7KPX@
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
LVDS CONTROL
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
LVTMDP
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
216-0774207-A11ROB_FCBGA631
PX@
LVDS
VARY_BL
DIGON
AB11
AB12
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
CLOCK
PX@
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
12
R767
N10
PWRGOOD
AL27
PERSTB
216-0774207-A11ROB_FCBGA631
PX@
PCIE LANE
CALIBRATION
PCIE_CALRP
PCIE_CALRN
4
Issued Date
Issued Date
Issued Date
1 2
1 2
R2981.27K_0402_1% PX@
R3012K_0402_1% PX@
+1.0VS_DGPU
Compal Secret Data
Compal Secret Data
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
3
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Y22
AA22
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet of
Compal Electronics, Inc.
SeymourXT-S3 PCIE/LVDS
SeymourXT-S3 PCIE/LVDS
SeymourXT-S3 PCIE/LVDS
13 50Monday, July 16, 2012
13 50Monday, July 16, 2012
13 50Monday, July 16, 2012
of
of
1
0.1
0.1
0.1
5
CLK_PCIE_VGA
CLK_PCIE_VGA#
0_0402_5%
@
12
R299
10K_0402_5%
PLTRST_VGA#
CLK_PCIE_VGA<20>
CLK_PCIE_VGA#<20>
VGA_PWROK<23,50>
A A
PLTRST_VGA#<22>
http://mycomp.su/x/
5
+1.8VS_DGPU
L8
BLM15BD121SN1D_0402
D D
+1.0VS_DGPU
BLM15BD121SN1D_0402
C C
+1.8VS_DGPU +DPLL_PVDD
B B
BLM15BD121SN1D_0402
+1.8VS_DGPU
A A
12
PX@
PX@
BLM15BD121SN1D_0402
BLM18AG121SN1D_0603
XTALIN
2
1
1
C304
@
2
10U_0603_6.3V6M
L17
12
1
C307
@
2
10U_0603_6.3V6M
+3VS_DGPU
1 2
R321 10K_0402_5%PX@
1 2
R322 10K_0402_5%PX@
1 2
R323 10K_0402_5%PX@
1 2
R324 10K_0402_5%PX@
L30
12
PX@
1
C323
PX@
2
10U_0603_6.3V6M
L49
12
PX@
PX@
C341
10P_0402_50V8J
1
C330
PX@
2
L29
12
1
PX@
C334
PX@
2
1 2
R337 10M_0402_5%
PX@
Y6
4
NC
1
OSC
27MHZ 16PF +-30PPM X3G027000FG1H-HX
PX@
SJ100009700
@
@
PX@
10U_0603_6.3V6M
10U_0603_6.3V6M
PX@
OSC
NC
+DPC_VDD18
1
C305
@
2
1U_0402_6.3V4Z
+DPC_VDD10
1
C346
@
2
1U_0402_6.3V4Z
+DPLL_PVDD
1
C324
PX@
2
1U_0402_6.3V4Z
+DPLL_VDDC
1
C331
PX@
2
1U_0402_6.3V4Z
+TSVDD
1
C335
PX@
2
1U_0402_6.3V4Z
3
2
5
+DPC_VDD18
1
C306
2
0.1U_0402_10V6K
+DPC_VDD10
1
C347
2
0.1U_0402_10V6K
1
C325
2
0.1U_0402_10V6K
1
C332
2
0.1U_0402_10V6K
1
C336
PX@
2
0.1U_0402_16V4Z
XTALOUT
GPIO24_TRSTB
GPIO25_TDI
GPIO27_TMS
GPIO26_TCK
+DPLL_VDDC+1.0VS_DGPU
+TSVDD
2
PX@
C350
10P_0402_50V8J
1
VRAM_ID2<17>
VRAM_ID1<17>
VRAM_ID0<17>
CH751H-40PT_SOD323-2
ACIN<21,36,41>
GPU_VID0<50>
GPU_VID1<50>
PEG_CLKREQ#<20>
+1.8VS_DGPU
C322 0.1U_0402_10V6K
+3VS_DGPU
+DPC_VDD18
+DPC_VDD18
+DPC_VDD10
D4
@
1 2
R326
PX@
1 2
R613
4.7K_0402_5%
@
PX@
12
R329 499_0402_1%
12
R335 249_0402_1%
PX@
12
PX@
+DPLL_PVDD
+DPLL_VDDC
+TSVDD
+TSVDD
+DPC_VDD18
+DPC_VDD18
+DPC_VDD10
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
VGA_SMB_DA2_R
VGA_SMB_CK2_R
21
GPU_GPIO5
GPU_GPIO8
GPU_GPIO9
GPU_GPIO11
GPU_GPIO12
GPU_GPIO13
1 2
R319 10K_0402_5%
PEG_CLKREQ#
T64
5.11K_0402_1%
+DPLL_PVDD
+DPLL_VDDC
PX@
R340 0_0402_5%
R333 0_0402_5%
PX@
@
1 2
R334 2.61K_0402_5%
4
UV1B
AF2
TXCAP_DPA3P
AF4
DPA
DPB
DPC
DAC1
DAC2
DDC/AUX
DDCDATA_AUX3N
DDCDATA_AUX5N
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
DPC_CALR
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
COMP
H2SYNC
V2SYNC
VDD2DI
VSS2DI
A2VDD
A2VDDQ
A2VSSQ
R2SET
DDC1CLK
DDC1DATA
AUX1P
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX3P
DDCCLK_AUX5P
DDC6CLK
DDC6DATA
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
V4
U5
W3
V2
Y4
W5
AA3
Y2
1 2
J8
R307
150_0402_1%
PX@
AM26
T55
R
AK26
RB
AL25
T56
G
AJ25
GB
AH24
T57
B
AG25
BB
AH26
VGA_HSYNC
AJ27
VGA_VSYNC
PX@
1 2
AD22
R318
499_0402_1%
AG24
+VGA_AVDD
AE22
AE23
+VDD1DI
AD23
AM12
R2
AK12
R2B
AL11
G2
AJ11
G2B
AK10
B2
AL9
B2B
AH12
C
AM10
Y
AJ9
AL13
T53
AJ13
T54
AD19
AC19
AE20
AE17
AE19
AG13
1 2
R330
715_0402_1%
@
AE6
AE5
AD2
AD4
AC11
AC13
AD13
AD11
AD20
AC20
AE16
AD16
AC1
T58
AC3
T59
Y11
DVCLK
AE9
DVCNTL_0
L9
DVCNTL_1
N9
AE8
AD9
AC10
AD7
AC8
AC7
AB9
AB8
AB7
AB4
AB2
VRAM_ID2
VRAM_ID1
VRAM_ID0
GPU_VID0
PX@
GPU_VID1
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
+VREFG_GPU
+VREFG_GPU
Y8
Y7
W6
V6
AC6
AC5
AA5
AA6
U1
W1
U3
Y6
AA1
R1
R3
U6
U10
T10
U8
U7
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
M4
T63
R6
W10
M2
P8
P7
T70 R549 10K_0402_5%@
N8
N7
L6
L5
L3
L1
K4
K7
TEST_EN
AF24
T65
AB13
W8
W9
W7
AD10
AC14
AB16
AC16
AF14
AE14
AD14
AM28
XTALIN
AK28
XTALOUT
12
AC22
12
AB22
T4
T2
R5
AD17
AC17
216-0774207-A11ROB_FCBGA631
PX@
4
DVO
DVCNTL_2
DVDATA_12
DVDATA_11
DVDATA_10
DVDATA_9
DVDATA_8
DVDATA_7
DVDATA_6
DVDATA_5
DVDATA_4
DVDATA_3
DVDATA_2
DVDATA_1
DVDATA_0
DPC_PVDD
DPC_PVSS
DPC_VDD18#1
DPC_VDD18#2
DPC_VDD10#1
DPC_VDD10#2
DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5
I2C
SCL
SDA
GENERAL PURPOSE I/O
GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN
TESTEN_LEGACY
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
HPD1
PX_EN
VREFG
PLL/CLOCK
DPLL_PVDD
DPLL_PVSS
DPLL_VDDC
XTALIN
XTALOUT
XO_IN
XO_IN2
THERMAL
DPLUS
DMINUS
TS_FDO
TSVDD
TSVSS
+VGA_AVDD
+VDD1DI
3
+VGA_AVDD
+VGA_AVDD
1
1
C397
C401
PX@
PX@
2
2
0.1U_0402_10V6K
+VDD1DI
+VDD1DI
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2012/06/01 2013/05/12
2012/06/01 2013/05/12
2012/06/01 2013/05/12
1
1
C396
C313
PX@
2
2
0.1U_0402_10V6K
Compal Secret Data
Compal Secret Data
Compal Secret Data
BLM15BD121SN1D_0402
1
C407
PX@
2
1U_0402_6.3V4Z
10U_0603_6.3V6M
BLM15BD121SN1D_0402
1
C315
PX@
PX@
2
1U_0402_6.3V4Z
10U_0603_6.3V6M
Deciphered Date
Deciphered Date
Deciphered Date
2
L14
1 2
PX@
L27
1 2
PX@
2
+1.8VS_DGPU
+1.8VS_DGPU
10K_0402_5%
VGA_SMB_CK2_R
VGA_SMB_DA2_R
0117 AMD request to stuff R320
GPU_GPIO0
R339 10K_0402_5%@
GPU_GPIO1
R338 10K_0402_5%
GPU_GPIO2
R325 10K_0402_5%PX@
GPU_GPIO5
R320 10K_0402_5%PX@
GPU_GPIO8
R313 10K_0402_5%@
GPU_GPIO9
R314 10K_0402_5%@
GPU_GPIO11
R315 10K_0402_5%PX@
GPU_GPIO12
R316 10K_0402_5%@
GPU_GPIO13
R317 10K_0402_5%@
R548 10K_0402_5%@
12
R328
10K_0402_5%
2
PX@
Q64A
PX@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
R327
+3VS_DGPU
12
PX@
VGA_HSYNC
VGA_VSYNC
2N7002DW-T/R7_SOT363-6
1
+3VS_DGPU
12
12
12
12
12
12
12
12
12
1 2
1 2
+3VS_DGPU
61
5
4
Q64B
2N7002DW-T/R7_SOT363-6
PX@
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SeymourXT-S3 Main Generic/MSIC
SeymourXT-S3 Main Generic/MSIC
SeymourXT-S3 Main Generic/MSIC
3
1
EC_SMB_CK2 <20,36>
EC_SMB_DA2 <20,36>
14 50Monday, July 16, 2012
14 50Monday, July 16, 2012
14 50Monday, July 16, 2012
0.1
0.1
0.1
http://mycomp.su/x/
5
+1.8VS_DGPU
PX@
MBK1608121YZF_0603
Change to 0 ohm
P/N
+1.0VS_DGPU
D D
MBK1608121YZF_0603
Change to 0 ohm
P/N
C C
B B
total:440mA@LVDS
L32
total:300mA@DP
12
total:240mA@LVDS
L31
PX@
total:220mA@DP
12
@
@
1
C375
2
10U_0603_6.3V6M
1
C356
2
10U_0603_6.3V6M
1
C386
@
2
1
C360
@
2
+DPEF_VDD18
+DPEF_VDD18
+DPEF_VDD18
1
C355
@
2
PX@
AG15
AG16
AG20
AG21
AG14
AH14
AM14
AM16
AM18
AF16
AG17
AF22
AG22
AF23
AG23
AM20
AM22
AM24
12
AF17
20mA
AG18
AF19
AG19
AF20
1U_0402_6.3V4Z
0.1U_0402_10V6K
+DPEF_VDD10
1
C363
@
2
1U_0402_6.3V4Z
0.1U_0402_10V6K
+DPEF_VDD18
+DPEF_VDD10
R463
150_0402_1%
+DPEF_VDD18
+DPEF_VDD18
4
UV1G
DP A/B POWERDP E/F POWER
DPE_VDD18#1
DPE_VDD18#2
DPE_VDD10#1
DPE_VDD10#2
DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5
DPF_VDD18#1
DPF_VDD18#2
DPF_VDD10#1
DPF_VDD10#2
DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5
DPEF_CALR
DPE_PVDD
DPE_PVSS
DPF_PVDD
DPF_PVSS
216-0774207-A11ROB_FCBGA631
PX@
DP PLL POWER
DPA_VDD18#1
DPA_VDD18#2
DPA_VDD10#1
DPA_VDD10#2
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
DPB_VDD18#1
DPB_VDD18#2
DPB_VDD10#1
DPB_VDD10#2
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
DPAB_CALR
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
130mA
AE11
AF11
110mA
AF6
AF7
AE1
AE3
AG1
AG6
AH5
130mA
AE13
AF13
110mA
AF8
AF9
AF10
AG9
AH8
AM6
AM8
AE10
20mA
AG8
AG7
20mA20mA
AG10
AG11
+DPAB_VDD18
+DPAB_VDD10
+DPAB_VDD18
+DPAB_VDD10
1 2
R464
150_0402_1%
PX@
+DPAB_VDD18
+DPAB_VDD18
3
total:300mA
1
1
C358
C357
@
@
@
2
2
1U_0402_6.3V4Z
0.1U_0402_10V6K
total:220mA
1
1
C364
C368
@
@
@
2
2
1U_0402_6.3V4Z
0.1U_0402_10V6K
+DPAB_VDD18
+DPAB_VDD10
+DPAB_VDD18
+DPAB_VDD18
PX@
L26
1
C359
MBK1608121YZF_0603
Change to 0 ohm
2
P/N
10U_0603_6.3V6M
PX@
L33
1 2
1
C367
MBK1608121YZF_0603
Change to 0 ohm
2
P/N
10U_0603_6.3V6M
+1.8VS_DGPU+DPAB_VDD18
12
+1.0VS_DGPU
2
1
Security Classification
Security Classification
Security Classification
2012/06/01 2013/05/12
2012/06/01 2013/05/12
Issued Date
Issued Date
A A
5
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
2012/06/01 2013/05/12
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
3
Compal Electronics, Inc.
SeymourXT-S3 DP PWR
SeymourXT-S3 DP PWR
SeymourXT-S3 DP PWR
15 50Monday, July 16, 2012
15 50Monday, July 16, 2012
15 50Monday, July 16, 2012
2
0.1
0.1
0.1
of
of
of
1
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