Acer LA-733B Schematics

A
1 1
2 2
B
C
D
E
Hurricane 1.6
N32N LA-733 REV. 4A SCHEMATIC DOCUMENT
3 3
4 4
A
uPGA2 COPPERMINE with Geyserville
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
Title
Size Document Number Rev
B
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-733
401138
E
147Tuesday, August 21, 2001
of
A
Compal confidential
Model Name : N32N Board Name : LA-733
B
C
D
Revision History Date:06/28/2000 Rev#: 2.0 description: MP-test for H1.5
Date:12/20/2000 Rev#: 3.0 description: C1-test for H1.6 Date:02/02/2001 Rev#: 4.0 description: C2-test for H1.6 Date:03/05/2001 Rev#: 4A description: C3-test for H1.6
E
HP Model Name : Hurricane 1.6
1 1
Gerserville
SPR CONN.
page 33
CRT CONN.
2 2
page 24
VGA Board CONN.
page 23
Tech.
page 6
14M_3V
AGP Bus
Dot-Matrix, Button Board, FDD, Touch-PAD CONN.
page 32
Coppermine (uPGA2) CPU
page 3,4,5
HD#(0..63)HA#(3..31)
440ZXM
page 7,8,9
MD(0..63)
AD(0..31)
144Pin S.O.Dimm Socket
page 11,12
MA(0..13)
HCLK_CPU
Y1
14.318MHZ
PCLK_MTXC HCLK_CPU
DCLKWR
CLK_SDRAM(0..3)
+3V
PCI BUS
DCLKO
Clock Generator Buffer
page 10
PCLK_PIIX4
+3V +3VS
14M_3V 14M_5V
PCLK_DOCK
PCLK_PCM
Audio CD-DJ
Mini PCI
3 3
Socket
page 31
CardBus TI1420 Solt1/2
page 15,16 page 17
ESS ES1988
IDE (HDD/CR-ROM)
EQ & Speaker AMP.
page 18,19
Super IO 37N869
page 27 page 25,26
RESET CKT
page 32
14M_5V
KeyBoard 87570
ISA BUS
OZ163
page 20
USB Port 0 and Port 1
page 28
DC-DC Interface & RTC
page 30
PIIX4M
page 13,14page 21,22
+3V / +3VS (5VS Tolerant)
SA(0..15)
SD(0..15)
CLK_48MHZ
14M_3V
PCLK_SIO
Screw Hole
page 39
page 28 page 28
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
FIR
page 28
A
SIOPIO
FDD
page 26
B
Touch Pad CONN.
page 34
BIOS
page 29 page 29
SMBus
page 25
KBD
page 29
PS/2
SUS_ON
Power CKT DC/DC MAX1632 MAX1711
page 34,36,37,38
SM Bus
C
Battery Charge
page 35
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
247Tuesday, August 21, 2001
E
of
TESTLO1 TESTHI RTTIMPEDP
+VCPU_IO
CPU_LO/HI#6
HD[0..63]9 HREQ#[0..4]7
HA[3..31]7
HADS#7
RS#[0..2]7
HTRDY#7
GT_INTR6 GT_NMI6
GT_STPCLK#6
GT_CPUINIT#6
HCLK
HD[0..63]
HREQ#[0..4]
HA[3..31]
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4
RS#0
SLP#
RS#1 RS#2
HTRDY#
HCLK
FLUSH# CPURST#
COPPERMINE SOCKET
DEFER#7 HIT#7 HITM#7
RS#[0..2]
HCLK7,10
CPURST#7
12
R64 1K
R282 33
1 2
C360 15PF
1 2
1 2
L7 LQG21N4R7K10
U7A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35#
REQ0# REQ1# REQ2# REQ3# REQ4# RP#
ADS# RS0#
RS1# RS2# RSP# TRDY#
BPM1# BPM0# BP3# BP2#
LINT0/INTR LINT1/NMI
STPCLK# SLP#
BCLK INIT#
FLUSH# RESET#
PICCLK PICD0 PICD1
10UF_10V_1206
AA12
AB15
BSEL0
BSEL1
Address Lines
Request Phase Request
Response Phase Signals
Debug Break Point
APIC
LO/HI# EDGCTRLP BSEL1 BSEL1 BSEL0
L3 K3 J2 L4 L1 K5 K1 J1 J3
K4 G1 H1
E4
F1
F4
F2
E1 C4 D3 D1
E2 D5 D4 C3 C1
B3
A3
B2 C2
A4
A5
B4 C5
T2
V4
V2 W3 W5 W2
AB2
AA2
W1
Y1 U2
W19 W21 Y21
AA21
AB18 AC19
AC11 AB12
M3
AA10
AC9
A6
AA18 AB21
Y20
12
C107
AA16
EDGECTRLP
Geyserville
R2L2M2
PLL1
GHI#
Analog
12
+
C552 .01UF
AB19
PLL2
RSVD
Coppermine
H-PBGA
495 Ball
Execution Control Signals
Snoop Phase Signals
Error Signals
DEFER#
HIT#
HITM#
AERR#
AP0#
AP1#
BERR#
BINIT#
U3V1Y4
AA1
AB1Y2E6
V21
IERR#
TESTLO2
Add CAP. by Charles at 6/22
AD19
AD17Y5N5
AD20H4AA17
TESTHI
TESTP1
TESTP2
TESTLO1
TESTLO2
RTTIMPEDP
CMOS Test Inputs
Arbitration Phase Signals
PC Compatibility Signals
Debug & Test Signals
IERR#
PRDY#
PREQ#
TRST#
TMS
TDI
TDO
TCK
AD9
W20
AB20
AA14
AD14
AD13
AC15
AA11
V20
AA3
T1
G4
DBSY#
DRDY#
TESTP3
TESTP4
Data Phase Signals
Data Phase Signals
Thermal Diode
SMI#
PWRGOOD
IGNNE#
FERR#
A20M#
AB10V5AC13
AC12
AD10
FERR_CPU#
TCK TDO TDI
TMS TRST# PREQ#
+VCPU_IO
12
C281 .1UF
C279 2200PF
1 2
R256
1 2
1K
Change value. by Charles at 6/22
+VCPU_IO
Q10
2SC2412K
2
R104
1 2
1K
+VCPU_IO
+3V
+3VS
R109 10K
1 2
+VCPU_IO
R276
1 2
1.5K R250
1 2
0
R89
1 2
56.2_1%
1 2
U25
1
NC
2
VCC
3
DXP
4
DXN
5
NC
6
ADD1
7
GND
8 9
GND NC
NE1617DS
RP25
81 72 63 54
8P4R-1.5K
BSEL0
CPURST#
R248
10K
SMBCLK
SMBDATA
ALERT
Change value. by Charles at 6/22
PREQ# IERR# FLUSH# SLP#
FERR# 13
DBSY# 7 DRDY# 7
T21
U21
R21
V18
P21
P20
U19
DEP0#
DEP1#
DEP2#
DEP3#
DEP4#
DEP5#
DEP6#
DEP7#
HD0
D10
D0# D1# D2# D3# D4# D5# D6# D7# D8#
D9# D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
BNR#
BPRI#
BREQ0#
LOCK#
THERMDA
THERMDC
AA15
AB16
THERMDC THERMDA
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
HD1
D11
HD2
HD3
HD4
B9
HD5
A9
HD6
C10
HD7
B11
HD8
C12
HD9
B13
HD10
A14
HD11
B12
HD12
E12
HD13
B16
HD14
A13
HD15
D13
HD16
D15
HD17
D12
HD18
B14
HD19
E14
HD20
C13
HD21
A19
HD22
B17
HD23
A18
HD24
C17
HD25
D17
HD26
C18
HD27
B19
HD28
D18
HD29
B20
HD30
A20
HD31
B21
HD32
D19
HD33
C21
HD34
E18
HD35
C20
HD36
F19
HD37
D20
HD38
D21
HD39
H18
HD40
F18
HD41
J18
HD42
F21
HD43
E20
HD44
H19
HD45
E21
HD46
J20
HD47
H21
HD48
L18
HD49
G20
HD50
P18
HD51
G21
HD52
K18
HD53
K21
HD54
M18
HD55
L21
HD56
R19
HD57
K19
HD58
T20
HD59
J21
HD60
L20
HD61
M19
HD62
U18
HD63
R18 T4
GT_A20M# 6 GT_IGNNE# 6
PWRGD_CPU 6 GT_SMI# 6
BNR# 7 BPRI# 7 BREQ0# 7 HLOCK# 7
+VCPU_IO
R85
1.5K
1 2
THERMDA
THERMDC
+3V
3 1
R75
56.2_1%
R249
110_1%
R77
1.5K R92
1K R95
1K
Signal name
TCK TMS TRST# TDO
RTTIMPEDP
EDGCTRLP
TESTHI
TESTLO1
TESTLO2
SMC 5,20,25,26,32,33,38 SMD 5,20,25,26,32,33,38
ATF# 26
+VCPU_IO
R275
1 2
@150 R80
1 2
@150 R277
1 2
@1K R82
1 2
@1K R273
1 2
1K RP2
5 4 6 3 7 2 8 1
8P4R-1K
Default Mode 1K PULL-DOWN 1K PULL-DOWN 1K PULL-DOWN 1K PULL-DOWN
X
TDI
TDO
TCK
TMS
TRST#
Software Debug Mode 150 PULL-UP TO +CPU_IOTDI 1K PULL-UP TO +CPU_IO 1K PULL-UP TO +CPU_IO
150 PULL-UP TO +CPU_IO
1 2
1 2
+VCPU_IO
1 2
1 2
1 2
16
NC
15
STBY
14 13
NC
12 11 10
ADD0
12
12
R255
R262
1K
10K
+3V
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
TCK TDI TMS
X
347Tuesday, August 21, 2001
of
A
+VCC_CORE
4 4
12
C331 .01UF
12
C318 .01UF
12
C93
3 3
.1UF
+VCC_CORE
12
C329
+
150UF_TPB_6.3V
+VCC_CORE
12
2 2
C98
+
220UF_TPB_4V
12
10UF_10V_1206
+VCC_CORE
12
1 1
C300
10UF_10V_1206
C309
12
12
12
C100
.1UF
C325
.1UF
C312 1000PF
12
C315
+
150UF_TPB_6.3V
12
C366
+
10UF_10V_1206
12
C316 .1UF
12
C302
.1UF
12
C339 .1UF
12
C354 10UF_10V_1206
12
C298
10UF_10V_1206
A
12
C310 .01UF
12
C303 .1UF
12
C108 .1UF
12
C357
+
150UF_TPB_6.3V
12
C103
+
10UF_10V_1206
12
C364
10UF_10V_1206
12
12
C311
1UF
12
C304
1UF
12
C305
1UF
+VCC_CORE
C361 10UF_10V_1206
12
12
12
12
C329, C315, C357, C94, C98, C109 Change from TPC to TPB for cost down
12
+
220UF_TPB_4V
12
10UF_10V_1206
C326
C317
.1UF
1000PF
+VCC_CORE
12
C333
C327
1000PF
1UF
+VCC_CORE
12
C319
C313
.1UF
1000PF
C109
C349
12
C94
+
220UF_TPB_4V
12
C350
10UF_10V_1206
Change value by Charles at 12/20
12
C332 .1UF
12
C85
.1UF
12
C328 .1UF
12
C92
.1UF
12
C343 1000PF
12
C334 1000PF
12
C299
10UF_10V_1206
B
12
C84
1UF
12
C65
.01UF
12
C341
1UF
12
C292 10UF_10V_1206
B
+VCC_CORE
M10 M12 M14 M16
COPPERMINE SOCKET
U7B
VCC
H10
VCC
H12
VCC
H14
VCC
H16
VCC
J7
VCC
J9
VCC
J11
VCC
J13
VCC
J15
VCC
K8
VCC
K10
VCC
K12
VCC
K14
VCC
K16
VCC
L7
VCC
L9
VCC
L11
VCC
L13
VCC
L15
VCC
M8
VCC VCC VCC VCC VCC
VCC
VCC
N11
VCC
N13
VCC
N15
VCC
P8
VCC
P10
VCC
P12
VCC
P14
VCC
P16
VCC
VCC
VCC
R11
VCC
R13
VCC
R15
VCC
T8
VCC
T10
VCC
T12
VCC
T14
VCC
T16
VCC
VCC
VCC
U11
VCC
U13
VCC
U15
VCC
VCCT
VCCT
M6
M17N6N17P1P6
+VCC_CORE
Change by Charles at 9/2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
VCMOSREF
VCLKREFVGTLREF
E5
E16
VREF
E17F5F17
VREF
VREF
VREF
U5
VREF
Y17
VREF
Y18
VREF
VREF
P2
CLKREF
AA9
AD18
CMOSREF
CMOSREF
A15
A16
A17
C14D8D14
NC1
NC2
NC3
NC4
Coppermine
H-PBGA
495 Ball
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
VCCT
P17R6R17T6T17U6U17V6V7V8V9
V10
V11
V12
V13
C
NC5
VCCT
V14
V15
D16
NC6
VCCT
V16
NC7
VCCT
E15G2G5
G18H3H5
NC8
NC9
NC10
NC11
VCCT
VCCT
VCCT
VCCT
V17W6W7W8W9
NC12
VCCT
W10
NC13
VCCT
W11
VCCT
W12
VCCT
W13
VCCT
NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24
VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT VCCT
J5 M4 M5 P3 P4 AA5 AA19 AC3 AC17 AC20 AD15
AD8 AD7 AD6 AC8 AC7 AC6 AB8 AB7 AB6 AA8 AA7 AA6 Y8 Y7 Y6 W17 W16 W15 W14 G17 G16 G15 G14 G13 G12 G11 G10 G9 G8 G7 G6 H6 H17 K6 K17 L6 L17 J6 J17
+VCPU_IO
12
R81 1K_1%
12
R79 2K_1%
D
D
VGTLREF
+VCPU_IO
+VCPU_IO
12
C338 1000PF
+VCPU_IO
12
C62 1UF
E
VGTLREF
12
12
C56
.1UF
C69
.1UF
+VCPU_IO
12
12
+VCLK
12
12
12
C75
1000PF
R279 1K_1%
R278 2K_1%
R96 2K_1%
R93 2K_1%
12
C57
.01UF
12
C73
.1UF
VCLKREF
12
12
C291
C70
1UF
.01UF
Change value by Charles at 6/24
VCMOSREFVCMOSREF
12
C79 .1UF
VCLKREF
12
C104 .1UF
Change value by Charles at 6/24
12
12
12
C344 .01UF
12
C288
1000PF
12
C287 .01UF
C91 .1UF
12
C67
1000PF
C68
.01UF
12
12
C282
C66 1UF
.1UF
+
C89 220U_TPB_4V
Change value by Charles at 6/24
12
12
C61
1000PF
12
C60 .01UF
12
C59 1UF
12
C63
1000PF
12
C64
.01UF
12
C553 1UF
12
C554 .1UF
12
C555
.1UF
C284
+
150UF_TPC_4V
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
E
12
12
C58
1000PF
C324 1000PF
447Tuesday, August 21, 2001
of
A
B
C
D
E
U7C
AD21
VSS
AD16
VSS
AD5
VSS
AD4
VSS
AD3
VSS
AD2
VSS
AD1
VSS
AC21
VSS
AC18
VSS
AC16
VSS
AC14
VSS
AC10
VSS
AC5
VSS
AC4
VSS
AC2
VSS
AC1
VSS
AB17
VSS
AB14
VSS
AB13
VSS
AB11
VSS
AB9
VSS
AB5
VSS
AB4
VSS
AB3
VSS
AA20
VSS
AA13
VSS
AA4
VSS
Y19
VSS
Y16
VSS
Y15
VSS
Y14
VSS
Y13
VSS
Y12
VSS
Y11
VSS
Y10
VSS
Y9
VSS
Y3
VSS
W18
VSS
W4
VSS
COPPERMINE SOCKET
A2A7A8
VSS
VSS
VSS
VSS
VSS
U20V3V19
A12
A21B1B5B6B7B8B10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B15
B18C9C11
C15
C16
VSS
VSS
VSS
VSS
VSS
VSS
Coppermine
H-PBGA
495 Ball
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R20T3T5T7T9
T11
T13
T15
T18
T19U8U10
U12
U14
U16
C19D2D6D7D9E3E7E8E9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R10
R12
R14
R16
VSS
VSS
P19R3R4R5R8
E10
E11
VSS
VSS
VSS
VSS
P13
P15
E13
E19F3F6F7F8F9F10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F11
F12
F13
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N8
N10
N12
N14
N16
N18
N19
N20P5P7P9P11
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
F14 F15 F16 F20 G3 G19 H2 H7 H9 H11 H13 H15 H20 J4 J8 J10 J12 J14 J16 J19 K2 K7 K9 K11 K13 K15 K20 L5 L8 L10 L12 L14 L16 L19 M7 M9 M11 M13 M15 M20 N2 N3 N4
R68 LN_0
1 2
1 2
R58
LN_0
VID[0..4]
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID4
4 4
3 3
R67
@0
VID0 VID1 VID2 VID3
VID4
1 2
1 2
R57
@0
RP1
1 8 2 7 3 6 4 5
L@8P4R-0
1 2
R69
L@0
SMC3,20,25,26,32,33,38
SCKP412,13
SMD3,20,25,26,32,33,38
+3V
2 2
SDAP412,13
RP65
1 8 2 7 3 6 4 5
L@8P4R-4.7K
1 2
R461 L@4.7K
Add by Charles at 3/27 to reserved for LA733L
VID[0..4] 36
2 3
4 5 6 7 8
9
10
U27
SDA Override#
I-0 I-1 I-2 I-3 I-4
Level GND
LN_FM3560
Non_Mux_Out
VCC3SCL ASEL
Mux_Sel
VR_HI/LO#6
201 19
18
WP
17 16
15
Y-0
14
Y-1
13
Y-2
12
Y-3
11
Y-4
ADDRESS: ASEL = LOW => 6E/6F
+3V
R59 LN_0
1 2
VID0 VID1 VID2 VID3 VID4
CPU_VID2 CPU_VID1 CPU_VID0
CPU_VID3
CPU_VID4
12
C286
LN_.1UF
12
R265 LN_0
13
D
Q5
2
G
LN_SI2302DS
S
VID4 VID3 VID2 VID1 VID0 +VCC_CORE
1 1
1.3V01110
1.35V01101
1.5V01010
1.55V10010
1.6V10000
1.65V00111
010 1 1.70V0
110 0 1.75V0
010 0 1.80V0
100 1 1.85V0
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
547Tuesday, August 21, 2001
E
of
A
B
C
D
E
PIIX4_SLP#13,14
U10 LN_AMI11686-001
20
NMI
16
INTR
22
INIT#
24
A20M#
21
IGNNE#
17
SMI#
23
STPCLK#
19
SUSSTAT1#
13
CPU_STP#
14
G_LO/HI#
15
VR_ON
29
VGATE
43
IGN_VGATE#
28
VR100/50#
44
PLL30/60#
41
CRESET#
26
CLK_IN
25
CLK_OUT
45
CLKEN#L
38
STB#
37
DIN
36
DOUT
GND
GND
618314227
A20M#
IGNNE#
CPU_STP# INTR SMI# CPUINIT#
NMI SUSTAT1#
V_GATE G_VR_POK STPCLK# GT_STPCLK#
GND
GND
GND
G_NMI G_INTR G_INIT#
G_A20M#
G_IGNNE#
G_SMI#
G_STPCLK#
G_SUSSTAT1#
G_CPU_STP#
RESERVED
CPUPWRGD
VRPWRGD
VRCHGNG#
VR_HI/LO#
LP_TRANS#
RESERVED RESERVED RESERVED
VCC3
VCC3
30
7
12
C367 LN_.01UF
R295 0
R293
0
RP27
L@16P8R-0
1 2
R448 L@0
1 2
R122 L@0
for without Geyserville
+3V
GT_SUSTAT1#
U13
1 2 3 4
@7SH08
1 2
R175 0
5
GHI#
1 2
1 4 8 48 2 5
3 11 47
46 10 9
32 12
33 34
35 39 40
+3V
12
C385
LN_.1UF
GT_A20M#
12
GT_IGNNE#
12
89 710 611 512 413 314 215 116
C161 @.1UF
GT_NMI GT_INTR GT_CPUINIT# R111
1 2
@0
GT_SMI#
GT_STPCLK# GT_SUSTAT1#
R115
1 2
LN_0
PWRGD_CPU G_VR_POK
VRCHGNG# VR_HI/LO#
R123
1 2
LN_10K
GT_CPU_STP# GT_INTR GT_SMI# GT_CPUINIT#
GT_NMI GT_SUSTAT1#
VGA_SUS_STAT# 23
R106
1 2
@0
GT_CPU_STP#
PWRGD_CPU 3 G_VR_POK 29
VRCHGNG# 13 VR_HI/LO# 5
2
G
GT_A20M# GT_IGNNE#
CPU_LO/HI#
13
D
Q12
S
LN_SI2302DS
GT_NMI 3 GT_INTR 3 GT_CPUINIT# 3 GT_A20M# 3 GT_IGNNE# 3 GT_SMI# 3
GT_STPCLK# 3 GT_SUSTAT1# 8 GT_CPU_STP# 10
CPU_LO/HI# 3
Add by Charles at 1/18
Change by Charles at 2/10
Change by Charles at 2/16
Change by Charles at 2/10
+VCPU_IO
Change by Charles at 2/16
CPU_STP# VRCHGNG#
without Geyserville, GHI#(CPU_LO/HI#) can OPEN
RP24
1 8 2 7 3 6 4 5
8P4R-1.5K
1 2
R100 L@1.5K
1 2
R87 1K
1 2
R86 680
1 2
R88 330
+3V
+3VS
+VCLK
+3VS
+3V
+3VS
+3V +3VS +3V
1 2
R296 LN_10K
1 2
R304 LN_10K
1 2
R289 1.5K
1 2
R300 4.7K
1 2
R99 10K
1 2
R301 LN_4.7K
1 2
R103 10K
1 2
R119 1K
1 2
R113 10K
1 2
R291 LN_10K
RP18
18 27 36 45
LN_8P4R-4.7K
D19
1 2
@RB717F
GT_NMI GT_INTR GT_IGNNE# GT_A20M#
CPU_LO/HI# GT_CPUINIT# GT_STPCLK# GT_SMI#
VR_HI/LO#
G_VR_POK
PWRGD_CPU
GT_CPU_STP#
GT_SUSTAT1#
CPUINIT# NMI INTR SMI#
STPCLK# VRCHGNG#
CRESET# GT_LO/HI# SUSTAT1#
GT_CPU_STP#
3
D20
L@RB751V
12
VR_POK
VR_POK 37
R117
12 LN_1K R121
12 LN_1K
PIIX4_NMI13 PIIX4_INTR13 PIIX4_INIT#13 PIIX4_A20M#13
1 1
PIIX4_IGNNE#13 PIIX4_SMI#13
PIIX4_STPCLK#13 SUS_STAT#13 CPU_STP#13
GT_LO/HI#13 VR_ON26,36,37
V_GATE36,37
CRESET#7
14.3M_GCL10
Add by Charles at 2/16
2 2
3 3
4 4
NMI INTR CPUINIT# A20M#
R294
1 2
IGNNE#
@0
1 2
SMI#
R292
@0 STPCLK# SUSTAT1# CPU_STP# GT_CPU_STP# GT_LO/HI#
V_GATE
Add by Charles at 3/21 for ATE testing
CRESET#
R298
1 2
12
@0
@14.318MHZ
1 2
LN_14.318MHZ
12
C379 LN_15PF
Y5
Y6
1 2
R447 LN_1K
12
LN_15PF
R108 @0
12
C378
Add by Charles at 1/18
Add by Charles at 3/22
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
A
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
647Tuesday, August 21, 2001
E
of
A
B
C
D
E
443ZXM-100_ A
+3V
12
12
12
12
12
C137
C134
C130
1 1
1000PF
12
1000PF
2 2
3 3
C154
.01UF
+3V
12
C157 .01UF
C131
.01UF
.1UF
12
12
C158
C159
.01UF
.1UF
PLACE THE TERMINATOR ON THE
12
C132 .1UF
12
12
C156 .1UF
HCLK3,10
STUB TO CPU
C135 1000PF
C155 1000PF
12
+
C146
10UF_10V_1206
12
+
C120
10UF_10V_1206
HCLK
R150
C148 15PF
RS#[0..2]3
HREQ#[0..4]3
12
33
12
HA[3..31]
CPURST#3
HADS#3 BNR#3 BPRI#3
DBSY#3
DEFER#3
DRDY#3
HIT#3
HITM#3 HLOCK#3 HTRDY#3 BREQ0#3
R329 = @10K (no load) 2/16
R329 @10K
1 2
+3V
CRESET#6
PCIRST#13,16,31
Add by Charles at 5/20
MMA[0..13] 12 HA[3..31] 3
HA3 HA4 HA5 HA6 HA7 HA8 HA9 HA10 HA11 HA12 HA13 HA14 HA15 HA16 HA17 HA18 HA19 HA20 HA21 HA22 HA23 HA24 HA25 HA26 HA27 HA28 HA29 HA30 HA31
RS#0 RS#1 RS#2
HREQ#1 HREQ#2 HREQ#3 HREQ#4
TESTIN#
CRESET#
G25 G23 G24 G26
G22
M25 M26
AE22 AE23
H22 H23 F26
F22 F23 F24 F25 E23 E26 E25 D25 D26 B25 C26 A25 C25 A24 D24 C23 B24 C24 A23 E22 D23
B23 K21 H24 H26
K23
K22 H25 B26
K26
K24 K25
N23
P22
+3V
V21
Y21F7F9
F18
F20G6G21J6J21
AA7
AA9
AA18
AA20
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
CPURST# ADS# BNR# BPRI#
L23
DBSY#
J26
DEFER# DRDY#
L24
HIT#
L22
HITM# HLOCK# HTRDY# BREQ0#
RS#0
L26
RS#1
L25
RS#2
J22
HREQ#0
J23
HREQ#1 HREQ#2 HREQ#3
J25
HREQ#4
HCLKIN TESTIN#
CRESET#
A3
PCIRST#
CRESVA CRESVB CRESVC
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
82443ZXM-100
492 BGA
HOST INTERFACE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A1
A14
A26C5C9
C18
C22E3E12
E15
E24F6F8
F19
F21H6H21J3J24
VDD
VDD
CKE2/CSA#6 CKE3/CSA#7
CKE4/CSB#6 CKE5/CSB#7
DRAM INTERFACE
CKE0/FENA
CKE1/GCKE
VSS
VSS
VSS
VSS
MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8
MAA9 MAA10 MAA11 MAA12 MAA13
MAB#0 MAB#1 MAB#2 MAB#3 MAB#4 MAB#5 MAB#6 MAB#7 MAB#8 MAB#9 MAB10
MAB#11 MAB#12 MAB#13
CSA#0 CSA#1 CSA#2 CSA#3 CSA#4 CSA#5
CSB#0 CSB#1 CSB#2 CSB#3 CSB#4 CSB#5
DQMA0 DQMA1 DQMA2 DQMA3 DQMA4 DQMA5 DQMA6 DQMA7
DQMB1 DQMB5
SRAS_A# SRAS_B# SCAS_A# SCAS_B#
WE_A# WE_B#
DCLKO
DCLKWR
DCLKRD
U31A 443ZXM-A
AF17 AB16 AE17 AC17 AF18 AE19 AF19 AC18 AC19 AE20 AD20 AF21 AC21 AF25
AD16 AC16 AD17 AB17 AE18 AD19 AB18 AB19 AF20 AC20 AB20 AE21 AD21 AF22
AB14 AF15 AE15 AC15 AD15 AE16 AE24 AD23
AE25 AD24 AD26 AC24 AC26 AB23 AC23 AF24
AD13 AC13 AC25 AB26 AE14 AC14 AA22 AA24
AE13 AD14
AC22 AF23
AF16 AA17 AF12 AB13
AE12 AC12
AB21 AD25 AB22
MMA0 MMA1 MMA2 MMA3 MMA4 MMA5 MMA6 MMA7 MMA8 MMA9 MMA10 MMA11 MMA12 MMA13
RAS0#_BX RAS1#_BX RAS2#_BX RAS3#_BX
CKE4_BX CKE5_BX
RCAS#0 RCAS#1 RCAS#2HREQ#0 RCAS#3 RCAS#4 RCAS#5 RCAS#6 RCAS#7
CKE2_BX CKE3_BX
W=5mils
DCLKO_R
W=5mils
R170
33
place closely to 443zx
1 2 12
C162 15PF
R193 47
1 2
R178 47
1 2
R194 47
1 2
R195 47
1 2 R186 33
1 2 1 2
R185 33
R197
1 2
R196 33
1 2
SRASA# 12 SCASA# 12
RMWEA# 12
1 2
DCLKRW 10
RCAS#[0..7] 11
33
W=5mils
Add by Charles at 5/20
CKE[2..5]
CKE2 11 CKE3 11
12
C163 22PF
CKE[2..5]11
PLACE THE RESISTOR ON THE 443ZX
R168
18
RRAS#2 11 RRAS#3 11 RRAS#4 11 RRAS#5 11
CKE4 11 CKE5 11
DCLKO 10
4 4
AB22 leave to be NC. 2/16
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
747Tuesday, August 21, 2001
E
of
A
443ZXM-100_ B
PX4_REQ1#13
GNT#417
+3VS
+3V
+5V
+3VS
10 9 8 7 6
+3VS
1 2
R128 10K
2 1
1 2
R143 1K
REQ#0 REQ#1 REQ#2 REQ#3
1 2
R129
RB751V
FRAME#13,14,31
DEVSEL#13,14,31
PHLD#13,14 PHLDA#13,14
10K
8
IRDY#13,14,31 TRDY#13,14,31
STOP#13,14,31
PAR13,14,31 SERR#13,14,31 PLOCK#14
U30C 74LVC08
+3VS POWER
12
REQ#0
31
R314 0
1 2
R322 0
1 2
R313 0
1 2
R130 0
1 2
TO DOCKING
REQ#131 REQ#213 REQ#315
GT_SUSTAT1#6
TO DOCKING
GNT#0
31
GNT#131 GNT#315 RSMRST#13,29
CLKRUN#13,14,23,27,31 PCLK_BX10
place closely to 443zx
C128
1UF
REQ#1
9
REQ#3
10
1 1
2 2
3 3
4 4
GNT#0 GNT#1 GNT#2 GNT#3
+3VS
RP4
1 2 3 4 5
10P8R_10K
B
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
FRAME#_BX DEVSEL#_BX IRDY#_BX TRDY#_BX
REQ#0 REQ#1 REQ#2 REQ#3 REQ#4
GNT#0 GNT#1 GNT#2 GNT#3 GNT#4
REFVCC5
W=5mils
12
12
R308 10
C393 15PF
AE3
AD4
AC4
F10 D10
E10
AF3
K6 K2 K4 K3 K5 J1
J2 H2 H1
J5 H3 H5 H4 G1 G2 G4 D1 D3 D2 C1
A2 C3
B3 D4
E5
A4 D5
B4
B5
A5
E6 C6
J4 G3
E4 C4
E2
F3
E1
F5
F4 G5
F1
F2
B6 D6
A6 C7
E7 D7
E8
E9
B2
+3V
L11
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13
PCI INTERFACE
AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
C/BE#0 C/BE#1 C/BE#2 C/BE#3
FRAME# DEVSEL# IRDY# TRDY# STOP# PAR SERR# PLOCK#
PHOLD# PHLDA# WSC#
PREQ0#/IOREQ# PREQ1# PREQ2# PERQ3# PERQ4# SUSTAT#
PGNT0#/IOGNT# PGNT1# PGNT2# PGNT3# PGNT4# BXPWROK CLKRUN# REFVCC5 PCLKIN
VSS
VSS
VSS
VSS
VSS
M13
L15
M11
L12M5N1
L14
L16
M12
M15
N11
N16
P11
P16
R12
R15
T11
VDD
L13
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
T13
T14
T16
VDD
VDD
VDD
82443ZXM-100
492 BGA
PCI ARB & PWR MGT
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M16
M22
N12
N13
N14
N15
P12
M14
P13
VSS
P14
P15
P26
T12
T15R5R11
C
N26P1AE1V6Y6
VDD
VDD_AGP
VDD_AGP
VDD_AGP
VSS
VSS
VSS
VSS
VSS
VSS
R13
R14
R16
R22
V3
+3V
U31B 443ZXM-A
GAD0
AB5
GAD0 GAD1 GAD2 GAD3
VDD_AGP
GAD4 GAD5 GAD6 GAD7 GAD8
GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GC/BE#0 GC/BE#1 GC/BE#2 GC/BE#3
GFRAME#
GDEVSEL#
GIRDY# GTRDY# GSTOP#
GPAR
GREQ# GGNT#
AGP INTERFACE
GCLKOUT
GCLKIN
PIPE#
SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
RBF#
ST0 ST1 ST2
GADSTB-A GADSTB-B
SB-STB
AGPREFV
VSS
VSS
VSS
V24
W6
W21
AE2 AD3 AD2 AD1 AC3 AC1 AB4 AB1 AA5 AA3 AA4 AA2 AA1 Y5 Y3 W1 V2 W2 U5 V1 U4 U3 U1 T3 T4 T2 T1 U6 R3 R4 R2
AB2 Y4 V4 U2
W3 W5 V5 W4 Y1 Y2
L5 L3
P5 N5
M3 K1 M2 M1 N2 P2 P4 P3 R1
M4 L4
L2 L1
AC2 T5 N3
GAD1 GAD2 GAD3 GAD4 GAD5 GAD6 GAD7 GAD8 GAD9 GAD10 GAD11 GAD12 GAD13 GAD14 GAD15 GAD16 GAD17 GAD18 GAD19 GAD20 GAD21 GAD22 GAD23 GAD24 GAD25 GAD26 GAD27 GAD28 GAD29 GAD30 GAD31
GREQ# GGNT#
GCLKOUT
PIPE# SBA0 SBA1 SBA2 SBA3 SBA4 SBA5 SBA6 SBA7
AGPREFV
12
12
C536 1000PF
** Place as close to 443BX as possible.
GC/BE#0 23 GC/BE#1 23 GC/BE#2 23 GC/BE#3 23
GFRAME# 23 GDEVSEL# 23 GIRDY# 23
GTRDY# 23
GSTOP# 23 GPAR 23
GREQ# 23 GGNT# 23
W=5mils
PIPE# 23
RBF# 23 ST0 23
ST1 23 ST2 23
AD_STBA 23 AD_STBB 23 SBSTB 23
W=20mils
C145 .01UF
SBA[0..7]
12
C537 1UF
W=10mils
1 2
R162
18
+3V
12
12
D
** Place as close to 443BX as possible.
12
C141
1000PF
12
C166
1000PF
12
C149
1000PF
R166 18
1 2
SBA[0..7] 23
C535
1 2
1UF
R152
3.48K_1%
R154
2.32K_1%
12
C138
.01UF
12
C167
.01UF
12
C143
.01UF
W=5mils
12
C160 22PF
Add by Charles at 5/20
Change value by Charles at 2/16
+3V
+3V
+3V
12
12
12
C151 .01UF
C153 .01UF
C152 .01UF
GCLKO 23
12
C150 .1UF
12
C403 .1UF
12
C139 .1UF
** Trace lengths of GCLKOUT & GCLKIN must be matched. Stub to teebshould be 1" MAX.
R165 8.2K
GTRDY#
1 2
R158 8.2K
GIRDY#
1 2
R161 8.2K
GDEVSEL#
1 2
R338 8.2K
GSTOP#
1 2
R340 8.2K
AD_STBA
1 2
R156 8.2K
AD_STBB
1 2
R335 8.2K
GFRAME#
1 2
R145 8.2K
GREQ#
1 2
R328 8.2K
GGNT#
1 2
R332 8.2K
SBSTB
1 2
R149 8.2K
RBF#
1 2
R331 8.2K
PIPE#
1 2
R337 100K
GPAR
1 2
E
12
12
C/BE#[0..3]
AD[0..31]
GAD[0..31]
C416 1000PF
C387 1000PF
+3V
C/BE#[0..3]13,31
AD[0..31]13,31
GAD[0..31]23
12
C384 .1UF
12
C147 .1UF
12
C412 .1UF
U30D 74LVC08
PX4_REQ2#13
A
11
+3VS POWER
REQ#0
12
REQ#4
13
REQ#4 17
B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
Tuesday, August 21, 2001
8
of
E
47
A
B
C
D
E
443ZXM-100_ C
MMD[0..63]12 MECC[0..7]12
1 1
2 2
3 3
MMD[0..63] MECC[0..7]
MMD0 MMD1 MMD2 MMD3 MMD4 MMD5 MMD6 MMD7 MMD8 MMD9 MMD10 MMD11 MMD12 MMD13 MMD14 MMD15 MMD16 MMD17 MMD18 MMD19 MMD20 MMD21 MMD22 MMD23 MMD24 MMD25 MMD26 MMD27 MMD28 MMD29 MMD30 MMD31 MMD32 MMD33 MMD34 MMD35 MMD36 MMD37 MMD38 MMD39 MMD40 MMD41 MMD42 MMD43 MMD44 MMD45 MMD46 MMD47 MMD48 MMD49 MMD50 MMD51 MMD52 MMD53 MMD54 MMD55 MMD56 MMD57 MMD58 MMD59 MMD60 MMD61 MMD62 MMD63
MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7
AF4
AE4
AF5 AD6 AE6 AB7 AC7
AF7 AB8 AB9 AC9 AE9
AB10 AC10 AF10 AD11
Y24
Y25
W23 W24 W26 W25
V26
U24
U23
T22
T23
T26
R24
R25
P23
N25 AC5 AE5 AB6 AC6
AF6 AD7 AE7 AC8 AD8
AF8 AE8
AF9
AD10 AE10 AB11 AC11
Y23
Y26
W22
V22
V23
V25
U22
U25
U26
T24
T25
U21
R23
R26
P24
P25
AE11 AA10 AA23 AA26 AF11 AD12 AA25
Y22
MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15 MD16 MD17 MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 MD32 MD33 MD34 MD35 MD36 MD37 MD38 MD39 MD40 MD41 MD42 MD43 MD44 MD45 MD46 MD47 MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55 MD56 MD57 MD58 MD59 MD60 MD61 MD62 MD63
MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6 MECC7
+3V
B1
N22
AF14
AF2
AE26
VDD
VDD
VDD
VDD
VDD
82443ZXM-100
492 BGA
MEMORY DATA BUS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB25
N24
AA6
AA8
AA19
AA21
AB3
AB12
AB15
AB24
AD5
AD9
AD18
AD22
AF1
HOST DATA BUS
VSS
VSS
AF13
AF26
C532
4.7UF_10V_0805
B22
HD#0
D22
HD#1
E21
HD#2
A22
HD#3
D21
HD#4
C21
HD#5
A21
HD#6
C20
HD#7
B21
HD#8
E20
HD#9
A20
HD#10
E19
HD#11
B20
HD#12
E18
HD#13
D20
HD#14
D19
HD#15
D18
HD#16
C19
HD#17
B19
HD#18
A18
HD#19
A19
HD#20
B18
HD#21
C17
HD#22
E17
HD#23
D17
HD#24
B17
HD#25
C16
HD#26
A17
HD#27
C15
HD#28
B16
HD#29
D16
HD#30
A16
HD#31
B15
HD#32
A15
HD#33
D14
HD#34
D15
HD#35
B13
HD#36
C14
HD#37
E14
HD#38
D13
HD#39
A13
HD#40
D12
HD#41
B12
HD#42
B14
HD#43
C13
HD#44
E13
HD#45
D11
HD#46
A12
HD#47
B11
HD#48
A11
HD#49
B7
HD#50
C12
HD#51
HD#52
B10
HD#53
A10
HD#54
A9
HD#55
A7
HD#56
E11
HD#57
HD#58
C11
HD#59
C10
HD#60
B8
HD#61
A8
HD#62
B9
HD#63
M23
GTLREFA
E16
GTLREFB
M24
VTTA
F17
VTTB
12
12
C541 .01UF
Add by Charles at 5/3
U31C 443ZXM-A
HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HD8 HD9 HD10 HD11 HD12 HD13 HD14 HD15 HD16 HD17 HD18 HD19 HD20 HD21 HD22 HD23 HD24 HD25 HD26 HD27 HD28 HD29 HD30 HD31 HD32 HD33 HD34 HD35 HD36 HD37 HD38 HD39 HD40 HD41 HD42 HD43 HD44 HD45 HD46 HD47 HD48 HD49 HD50 HD51 HD52 HD53 HD54 HD55 HD56 HD57 HD58 HD59 HD60 HD61 HD62 HD63
+VCPU_IO
12
C533
4.7UF_10V_0805
W=40mils
12
12
Add by Charles at 5/3
** Place as close to 443BX as possible.
C539 .01UF
C540 .01UF
12
C171
1000PF
HD[0..63]
12
VGTLREF_BX
C122 1UF
+3V
12
12
C133
C170
.01UF
.01UF
CAP. closeed to 443BX.
HD[0..63] 3
+VCPU_IO
12
R476 1K_1%
C142 1UF
12
R477 2K_1%
12
12
12
C144
C123
.1UF
.1UF
12
C538 1UF
Add by Charles at 5/3
4 4
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
947Tuesday, August 21, 2001
E
of
A
CLOCK GENERATOR & BUFFER
B
C
D
E
XOUT
XIN
+3VPCI
C372
4.7UF_10V_0805
U11
6
VDDPCI
9
VDDPCI
13
VDD
21
VDD
27
VDD
25
VDDCPU
1
XIN
2
XOUT
18
CPU_STP#
19
PCI_STP#
17
PWRDWN#
15
SEL100/66#
W48C111-17
12
C376 .01UF
CPUCLK0 CPUCLK1
PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5
PCICLKF
14.3M
48M
GND GND GND GND GND GND
12
C381 .1UF
26
24 23
5 7 8 10 11 4
16 3
12 14 20 22 28
R105 22
1 2
R101
1 2
R110
1 2
R114@22
1 2
R118 22
1 2
R116 33
1 2
R120 15
1 2
R124
1 2
R126
1 2
R136
1 2
R112 33
1 2
R127 15
1 2
Change value by Charles at 5/21
Reserved by Charles at 6/24
33 33
12
33
22 22
C121 @33PF
14MOSC 13
14.3M_SIO 27
14.3M_VGA 23
14.3M_GCL 6
HCLK 3,7
PCLK_BX 8 PCLK_MINI 31 PCLK_PCM 15 PCLK_AUD 17 PCLK_SIO 27 PCLK_PIIX4 13
48M 13
Add by Charles at 2/16
Change value by Charles for EA at 5/26
Add by Charles at 1/4
1 1
L30
1 2
+3VS
HB1M2012-121JT
C382
4.7UF_10V_0805
L28
HB1M2012-121JT
SUSA#13,25
1 2
C369
4.7UF_10V_0805
+3VS
12
R125
10K
21
RB751V
FSQ013
+3VS
+VCLK
2 2
12
C116
.01UF
PWRDWN#SUSA#
C114 .1UF
12
C370 1000PF
C113 10PF
1 2 R132 @0
1 2 R131
+3VS
VCLK_+3VS
12
C118 .01UF
CLK_CPUIO
Y1
1 2
14.318MHZ
1 2
@14.318MHZ
1 2
R107 2M
12
GT_CPU_STP#6
PCI_STP#13
FQS 0 : 66MHZ
10K
1 2
HB1M2012-121JT
12
C383 1000PF
Y2
12
C112 10PF
1 : 100MHZ
L29
3 3
+3V
4 4
L33
1 2
HB1M2012-121JT
C168
4.7UF_10V_0805
12
12
12
C417 .1UF
C415 .1UF
C421 .01UF
DCLKO7
Add by Charles at 5/20
12
C414 .01UF
R187
33
C169 22PF
12
12
12
C420 1000PF
CLK_SMD12
CLK_SMC12
SUSA#
+3V
VCLK_SDRAM
12
C418 1000PF
D11 RB751V
R345
1 2
10K
21
SDACLK
SCKCLK
1
5 24 28 10 19 13
9
14
15
20
17 12
4
8 21 25 16
U32
VDD VDD VDD VDD VDD VDD VDDIIC
BUF_IN
SDATA
SCLCOK
OE
GND GND GND GND GND GND VSSIC
W40S11-02
CLK_SDRAM0
CLK_SDRAM1
CLK_SDRAM2
CLK_SDRAM3
CLK_SDRAM4
CLK_SDRAM5
CLK_SDRAM6
CLK_SDRAM7
CLK_SDRAM8
CLK_SDRAM9
2
3
6
7
22
23
26
27
11
18
For EA requirment at 6/26.
R349
1 2
10 R347
1 2
10 R346
1 2
10
R348
1 2
10
R354
1 2
22
C419
15PF_5%
CLK_SDRAM2 11
CLK_SDRAM3 11
CLK_SDRAM4 11
CLK_SDRAM5 11
DCLKRW 7
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
Tuesday, August 21, 2001
E
of
10 47
A
B
SO-DIM 144 PINS RAM MODULE CONN.
C
D
E
+3V +3V
1 1
MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1 MA2
MD8 MD9 MD10 MD11
MD12 MD13 MD14
2 2
CLK_SDRAM310
S_RASA#12
RM_WEA#12
R384
33
C458 22PF
3 3
DIMM0_SMD12
SMECC0 SMECC1
RRAS#3 RRAS#2
SMECC2 SMECC3
RCAS#2 RCAS#3
MD15
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
MD24 MD25 MD26 MD27
MD28 MD29 MD30 MD31
1 3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143
JP28
VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65
RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC
SO-DIMM144(R)
DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
CE4# CE5#
VCC
DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
RESVD/DQ68 RESVD/DQ69
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
RESVD/DQ70 RESVD/DQ71
VCC DQ48 DQ49 DQ50 DQ51
DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0 A12/BA1
A13/A11
VCC
CE6#/RESVD CE7#/RESVD
DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS SCL
2
MD32
4
MD33
6
MD34
8
MD35
10 12
MD36
14
MD37
16
MD38
18
MD39
20 22
RCAS#4
24
RCAS#5
26 28
MA3
30
A3 A4 A5
A7
MA4
32
MA5
34 36
MD40
38
MD41
40
MD42
42
MD43
44 46
MD44
48
MD45
50
MD46
52
MD47
54 56
SMECC4
58
SMECC5
60
CKE3
62 64 66
CKE2
68
MA12
70
MA13
72 74 76
SMECC6
78
SMECC7
80 82
MD48
84
MD49
86
MD50
88
MD51
90 92
MD52
94
MD53
96
MD54
98
MD55
100 102
MA7
104
MA11
106 108
MA12
110
MA13
112 114
RCAS#6
116
RCAS#7
118 120
MD56
122
MD57
124
MD58
126
MD59
128 130
MD60
132
MD61
134
MD62
136
MD63
138 140 142 144
S_CASA# 12
CLK_SDRAM2 10
R385 33
C460 22PF
DIMM0_SMC 12
CLK_SDRAM410
S_RASA#12
RM_WEA#12
DIMM1_SMD12
R382
C444 22PF
RRAS#4 RRAS#5
33
+3V +3V
JP27
1 MD0 MD1 MD2 MD3
MD4 MD5 MD6 MD7
RCAS#0 RCAS#1
MA0 MA1 MA2
MD8 MD9 MD10 MD11
MD12 MD13 MD14 MD15
SMECC0 SMECC1
SMECC2 SMECC3
MD16 MD17 MD18 MD19
MD20 MD21 MD22 MD23
MA6 MA8
MA9 MA10
RCAS#2 RCAS#3
MD24 MD25 MD26 MD27
MD28 MD29 MD61 MD30 MD31
3
5
7
9
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143
VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS CE0# CE1# VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 DQ13 DQ14 DQ15 VSS RESVD/DQ64 RESVD/DQ65
RFU/CLK0 VCC RFU WE# RE0# RE1# OE#/RESVD VSS RESVD/DQ66 RESVD/DQ67 VCC DQ16 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10 VCC CE2#/RESVD CE3#/RESVD VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS SDA VCC
SO-DIMM144
RESVD/DQ68 RESVD/DQ69
RESVD/DQ70 RESVD/DQ71
CE6#/RESVD CE7#/RESVD
VSS DQ32 DQ33 DQ34 DQ35
VCC DQ36 DQ37 DQ38 DQ39
VSS
CE4# CE5#
VCC
VSS DQ40 DQ41 DQ42 DQ43
VCC DQ44 DQ45 DQ46 DQ47
VSS
RFU/CKE0
VCC
RFU
RFU/CKE1
RFU
RFU
RFU/CLK1
VSS
VCC DQ48 DQ49 DQ50 DQ51
VSS DQ52 DQ53 DQ54 DQ55
VCC
A11/BA0
VSS
A12/BA1
A13/A11
VCC
VSS DQ56 DQ57 DQ58 DQ59
VCC DQ60 DQ61 DQ62 DQ63
VSS
VCC
SCL
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30
A3
32
A4
34
A5
36 38 40 42 44 46 48 50 52 54 56 58 60
62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104
A7
106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144
MD32 MD33 MD34 MD35
MD36 MD37 MD38 MD39
RCAS#4 RCAS#5
MA3 MA4 MA5
MD40 MD41 MD42 MD43
MD44 MD45 MD46 MD47
SMECC4 SMECC5
CKE4
CKE5 MA12 MA13
SMECC6 SMECC7
MD48 MD49 MD50 MD51
MD52 MD53 MD54 MD55
MA7 MA11
MA12 MA13
RCAS#6 RCAS#7
MD56 MD57 MD58 MD59
MD60 MD62
MD63
S_CASA# 12
CLK_SDRAM5 10
R383 33
C445 22PF
DIMM1_SMC 12
DIMM0
DIMM1
4 4
A
RCAS#[0..7]7
MD[0..63]12 MA[0..13]12
RRAS#[2..5]7
CKE[2..5]7
SMECC[0..7]12
RCAS#[0..7] MMD[0..63] MA[0..13] RRAS#[2..5] CKE[2..5] SMECC[0..7]
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
11 47Tuesday, August 21, 2001
E
of
A
B
C
D
E
SO-DIM 144 PINS RAM MODULE CONN.
Charles add new Damping resistor for address bus and control signals at 6/21
MA0 MMA0 MA1 MA2
1 1
2 2
3 3
4 4
MA3 MA4 MA5
RP45
89
MMA1
710
MMA2
611
MMA3
512
MMA4
413
MMA5
314 215 116
16P8R-10
MD0 MD1 MD2 MD3 MD4 MMD28 MD5 MD6 MMD6 MD7
MD8 MD9 MD10 MD11 MD12 MD13 MD14 MD15
MD48 MD49 MD50 MD51 MD52 MD53 MD54 MD55
MD56 MD16 MD57 MD58 MD59 MD60 MD61 MD62 MD63
RP41
16P8R-10
RP44
16P8R-10
RP37
16P8R-10
RP34
16P8R-10
SMECC0 SMECC1 SMECC2 SMECC3 SMECC4 SMECC5
89 710 611 512 413 314 215 116
89 710 611 512 413 314 215 116
89 710 611 512 413 314 215 116
89 710 611 512 413 314 215 116
MA6 MA7 MA8 MA9 MA10 MA11 MA12 MA13
MMD0 MMD1 MMD2 MMD3 MMD4 MMD5
MMD7 MMD31
MMD8 MMD9 MMD10 MMD11 MMD12 MMD13 MMD14 MMD15 MD39
MMD48 MMD49 MMD50 MMD51 MMD52 MMD53 MMD54 MMD55
MMD56 MMD57 MMD58 MMD59 MMD60 MMD61 MMD62 MMD63
RP47
89 710 611 512 413 314 215 116
@16P8R-10
RP47 change to be no load. 2/16
RP46
16P8R-10
MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31
MD32 MD33 MMD33 MD34 MD35 MD36 MD37 MD38
MD40 MD41 MMD41 MD42 MMD42 MD43 MD44 MD45 MD46 MD47
MD17 MD18 MD19 MD20 MD21 MD22 MD23
MECC0 MECC1 MECC2 MECC3 MECC4 MECC5 MECC6SMECC6 MECC7SMECC7
RP32
16P8R-10
RP42
16P8R-10
RP43
16P8R-10
RP40
16P8R-10
MECC0 9 MECC1 9 MECC2 9 MECC3 9 MECC4 9 MECC5 9 MECC6 9 MECC7 9
MMA6
89
MMA7
710
MMA8
611
MMA9
512
MMA10
413
MMA11
314
MMA12
215
MMA13
116
MMD24
89
MMD25
710
MMD26
611
MMD27
512 413
MMD29
314
MMD30
215 116
MMD32
89 710
MMD34
611
MMD35
512
MMD36
413
MMD37
314
MMD38
215
MMD39
116
MMD40
89 710 611
MMD43
512
MMD44
413
MMD45
314
MMD46
215
MMD47
116
MMD16
89
MMD17
710
MMD18
611
MMD19
512
MMD20
413
MMD21
314
MMD22
215
MMD23
116
R352 10
R353 10
R351 10
12
12
12
12
C212 .1UF
C441 .1UF
C210 .1UF
C453 .1UF
R182
R183
@10K
RMWEA#
SRASA#
R184
10K
10K
R181
@10K R180
@10K R179
10K
12
12
12
12
MMA11
C450 .01UF
C440 .01UF
C211 .01UF
C213 .01UF
MMA12
MMA10
MMA9
MMA7
MMA6
RMWEA# 7
SRASA# 7
SCASA# 7S_CASA#11
12
C448 .01UF
12
C449 .01UF
12
C452 .01UF
12
C464 .01UF
INHIB13 ENDIM113 ENDIM213
SCKP45,13 SDAP45,13
+3V
C456 1000PF
C461 1000PF
C447 1000PF
C463 1000PF
12
+3V
12
+3V
12
+3V
12
C443
4.7UF_10V_0805
C454 1UF
C446 1UF
C451 1000PF
12
12
12
C465 1000PF
C455 1000PF
C462 1000PF
C442 1000PF
12
12
12
12
12
RM_WEA#11
S_RASA#11
RM_WEA#
S_RASA#
S_CASA# SCASA#
+3V
12
C439 .1UF
12
C459 .1UF
12
C457 .1UF
12
C207 .1UF
Placement near to 440ZXM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
+3V
12
C173 .1UF
U14
16
6
INH
10
A
9
B
3
X
13
Y
1
X0
5
X1
VCC
2
X2
4
X3
12
Y0
14
Y1
15
Y2
11
Y3
GND
GND
74HC4052
7
8
Pin Name
MMA12
MMA11
MMA10
MMA9
MMA7
MMA6
SM BUS
+3V
1
1
Function
Host Freq.
In-Order
MM Config
Host
TPAD
TPAD
Select
Queue Depth Enable
Quick Start
Select
AGP
Buffer
Mode
Select
1 2 3 4 5
T2
T1
Bus
SMECC[0..7]11
MMA[0..13]7
MMD[0..63]9
RP19
10P8R-10K
MA[0..13]11
MD[0..63]11
Low
66MHz
1 No Pipe­line
Stop Clock Mode
Enable
Normal Oper.
Desktop GTL+
10 9 8 7 6
MMA[0..13]
MA[0..13]
MMD[0..63]
MD[0..63]
High
100MHz
4 Max
Quick Start Mode
Disable
Tri­states certain Memory signal
Mobile Low Power GTL+
SMECC[0..7]
+3V
DIMM0_SMC 11 DIMM1_SMC 11
CLK_SMC 10
DIMM0_SMD 11 DIMM1_SMD 11
CLK_SMD 10
Int.Res.50K
Pulldown
Pullup
Pulldown
Pulldown
Pulldown
Pulldown
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
D
Date: Sheet
12 47Tuesday, August 21, 2001
E
of
CLKRUN# DEVSEL# FRAME# PIIX4_IDSEL IRDY# PAR
PHLD# PHLDA# SERR# STOP# TRDY#
EXTSMI#25
SUSA#10,25 SUSB#25 SUSC#25
VLB# PBTN# LID# SMBALT# PIIX4_RI#
SDAP45,12 SCKP45,12
ATF_INT#25 PCI_STP#10
FERR#3
PIIX4_NMI6
RC#25
GATEA2025
R151
R155 1K
RSTDRV21,27
IOR#14,25,27
IOW#14,25,27
IOCHRDY14,25,27
RTCX1
32.768KHZ
C164 12PF
PBTN#
MID0 MID1 MID2 MID3
PIRQA# PIRQB# PIRQC# PIRQD#
C/BE#0 C/BE#1 C/BE#2 C/BE#3
PIIX4_SLP#
TC27
MEMCS16#
REFRESH# IOCS16#
AEN25,27
LID#
A
SBHE#
12
2 1
2 1
2 1
2 1
A
AD[0..31]8,31
AD17
AD16
AD10
AD8
AD14
AD13
AD9
AD15
AD19
AD18
AD12
AD11
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD9
AD8
PCI
MASTER
* *
* *
*
*
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA10
SA8
SA14
SA18
SA15
SA12
SA17
SA11
SA9
SA13
SA16
25,29,32
AD5
AD4
AD2
AD7
AD3
AD6
AD1
AD0
A10D9C9B9A9D8E8B8A8D7C7B7A7D6E6E4C4B4A4D3E3C3B3E2C2B2A2D1E1C1B1M1N2P3N1P2P4
B10U11
AD1
AD2
AD3
AD4
AD5
AD6
AD7
*
*
*
*
*
*
*
*
PCI
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SA1
SA2
SA3
SA4
SA5
SA6
SA7
W11
Y11
T10
W10U9V9Y9T8W8U7V7Y7V6Y6T5W5U4V3W3U2T2W2Y2T1V1W16
SA2
SA7
SA3
SA4
SA6
SA5
EC_LID_SW# 26
LID_SW# 25,26,32
ON/OFF 25,29,32PBTN#14
ON/OFF_EC#
D10
D22
D50
W20
M17
M19
M20
W12
C10
B12 A12
E10 A11 B11 C11
V20 V19
U18 T17 T18 U19 U20 P16 N17 P18 T20 R19 H19
K16
K20 L18
K19 L17 L19 L20 P20 J18 N20
V10 Y12 V15 U15
U10
V12
E5 A5 A3 B5 B6 A1
A6 D5 C5
P1
W4 U3
T7
Y1 W7
Y3 W1
Y5
T4
T3
Y4
@RB751V
RB751V
RB751V
@RB751V
AD0SA0
CLKRUN# DEVSEL# FRAME# IDSEL IRDY# PAR PCIRST# PHOLD# PHLDA# SERR# STOP# TRDY# PCIREQ1# PCIREQ2# PCIREQ3# PCIREQ4#
EXTSMI# SUSA# SUSB#/GPO15 SUSC#/GPO16 SUS_ST1#/GPO20 SUS_ST2#/GPO21 BATLOW#/GPI9 PWRBTN# LID/GPI10 SMBALERT#/GPI11 RI#/GPI12 SMBDATA SMBCLK THRM#/GPI8 CPU_STP#/GPO17 PCI_STP#/GPO18 ZZ/GPO19 RSMRST#
C/BE0# C/BE1# C/BE2# C/BE3#
SLP# CPURST INIT FERR# IGNNE# INTR NMI SMI# STPCLK# RCIN# A20GATE A20M#
TC MEMCS16# MEMR# MEMW# SMEMR# SMEMW# SYSCLK BALE IOCHK#/GPI0 REFRESH# I0CS16# ZEROWS# SBHE# RSTDRV IOR# IOW# IOCHRDY AEN
T11
SA0
SA1
LIDSW#
RP28
8P4R_10K
PIRQA#14,15,23 PIRQB#14,15,23,31 PIRQC#14,17,23 PIRQD#14,31
1 2
R141 100 PCIRST# C126 @47PF
1 2
PX4_REQ1#8 PX4_REQ2#8
GGREQ#23
REQ#28
VLB#26
SMBALT#14
PIIX4_RI#14,26
PIIX4_SLP#6,14
+5VS
FSQ010
1 2
+5VS
R315 1K
1 2
+5VS
ZWS#14
1 2
+5VS
R153 1K
RTCX2
1 2
12
R172 22M
C165 12PF
LID#14
1 8 2 7 3 6 4 5
SUS_STAT#6
CPU_STP#6
RSMRST#8,29
PIIX4_INIT#6
PIIX4_IGNNE#6
PIIX4_INTR6 PIIX4_SMI#6
PIIX4_STPCLK#6
PIIX4_A20M#6 1K
1 2
MEMR#14,25
MEMW#14,25
X1
+3VS
1 1
AD18
2 2
3 3
4 4
AD[0..31]
AD20
AD21
AD19
AD20
B
AD24
AD25
AD22
AD23
AD21
AD22
AD23
AD24
ACIN_SYS#30
AD28
AD29
AD31
AD30
AD27
AD26
AD25
AD26
AD27
AD28
AD29
AD30
AD31
PM
CPU
ISA
SA19
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SD9
SD10
SD11
T16
Y17
SD6
SD7
SD5
B
V17
SD8
SD9
SD10
SD11
VLB#
STOP# 8,14,31 TRDY# 8,14,31 PCIRST# 7,16,31
V4
SD0
SD2
SD1
SD4
SD3
1 2
+3V
R173 10K STOP# TRDY# PCIRST#
Add by Charles at 4/20 that reserved for S/W
REQA#
REQB#
REQA#/GPI2
PC/PCI DMA
SD12
SD13
Y18
W18
Y19
SD13
SD12
SD14
REQC#
REQB#/GPI3
REQC#/GPI4
SD14
SD15
W19
SD15
GNTA#
GNTB#
GNTA#/GPO9
GNTB#/GPO10
DACK0#
U14W6Y10V5T15
DACK#0
C
SCI#25
GNTC#
PIRQA#
PIRQB#
SIRQ
PIRQC#
PIRQD#
J17
H18
K18
J19R3R4P5G1
SERIRQ/GPI7
GNTC#/GPO11
APICREQ#/GPI5
APICCS#/GPO13
APICACK#/GPO12
PIRQA#
PIRQB#
PIRQC#
PIRQD#
*
P19L2J3L5K3K4H1H4H5G3G4
GPI1
PID0
PID2
PID1
MID2
MID3
MID1
MID0
PID3
GPI13
GPI14
GPI15
GPI16
GPI17
GPI18
GPI19
VRCHGNG# 6
+3VS
ENDIM2
ENDIM1
FLASH#
INHIB
SHDRST
PHDRST
HDDPW#
SHDPW#
Y15
T14
T12
Y13
V13
W14
U13
GPO0
GPI20
GPI21
GPO1/LA17
GPO2/LA18
GPO7/LA23
GPO6/LA22
GPO5/LA21
GPO3/LA19
GPO4/LA20
+3V +3VS
R16
R15R6F15
N16
F4F3F2G5T19
VCC1
VCC2
GPO30
VCCSUS1
VCCSUS2
VCC3
GPO8
GPO29
GPO28
GPO27
E11F6T6
VCC4
VCC5
GPI/O PWR
MISC
IDE
*
DACK1#
DACK2#
DACK3#
DACK5#
DACK6#
DACK7#
DREQ0
DREQ1
DREQ2
DREQ3
DREQ5
DREQ6
DREQ7
IRQ0/GPO14
IRQ1
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8#/GPI6
IRQ9
IRQ10
IRQ11
IRQ12
IRQ14
IRQ15
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
V16
W17
W15U6V2U5Y16
U16
U17
H20
J20T9W9U8V8Y8Y20U1U12
DRQ5
DRQ2
DRQ6
DRQ7
DRQ3
DRQ1
DRQ0
DACK#3
DACK#1
DACK#2
IRQ4
IRQ1
IRQ0
IRQ3
Load R167 by Peter Liu 3/30
C/BE#[0..3]8,31
IRQ[0..15]14,22,25 SDD[0..15]22 PDD[0..15]22
DACK#[0..3]27
DRQ[0..7]14,27
SA[0..18]25,27 SD[0..15]14,25,27
C/BE#[0..3] IRQ[0..15] SDD[0..15] PDD[0..15] DACK#[0..3]
DRQ[0..7]
SA[0..19]
SD[0..15]
C
IRQ5
IRQ7
IRQ6
W13
IRQ9
IRQ8#
IRQ11
IRQ10
1 2
R167 1K
T13
V14
IRQ12
Y14
IRQ14
IRQ15
IRQ8# 25
F20
E18
E20
D18
D20
C20
B20
A20
A19
B19
PDD4
PDD1
PDD0
PDD2
PDD3
+3V
PID[0..3] CLKRUN# DEVSEL# FRAME# IRDY# PAR PCIRST# PHLD# PHLDA# SERR#
PDD5
PDD6
PDD7
PDD8
PDD9
D
P15R7G6
F14F5E16
E12E9K5
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
SDDO
C19
D19
D17
E19
E17
F19
E15
PDD12
PDD11
PDD10
SDD0
PDD15
PDD14
PDD13
PID[0..3] 23 CLKRUN# 8,14,23,27,31 DEVSEL# 8,14,31 FRAME# 8,14,31 IRDY# 8,14,31 PAR 8,14,31 PCIRST# 7,16,31 PHLD# 8,14 PHLDA# 8,14 SERR# 8,14,31
D
VCCP9
SDD1
B15
SDD1
SDD2
D14
SDD2
C14
J5
VSSUSB
VCCUSB
SDD3
SDD4
A14
C13
SDD4
SDD3
SDD5
SDD5
BIOSCS# 25
GPO25
GT_LO/HI# 6
SYS_VOL_UP# 17 SYS_VOL_DW# 17
W=5mils W=5mils W=5mils
+RTCVCC
SPWROFF# 29 OVCUR#0 28,33
OVCUR#1 28,33 USBP1+ 28 USBP1- 28 USBP0+ 28 USBP0- 28
PDIOR# 22 PDIOW# 22 PIORDY 21,22 PDDREQ 21,22 PDDACK# 22 PDCS1# 22 PDCS3# 22
SDIOR# 22 SDIOW# 22 SIORDY 20,22
SDDREQ 20,22 SDDACK# 22 SDCS1# 22 SDCS3# 22 PDA0 22 PDA1 22 PDA2 22 SDA0 22 SDA1 22 SDA2 22
+3VS
12
12
R177 @100K
1 2 1 2
R176 100K
E
FLASH# 26 SIRQ 14,15,27
INHIB 12 ENDIM1 12 ENDIM2 12 REQA# 14 REQB# 14 REQC# 14 GNTA# 14 GNTB# 14 GNTC# 14 PHDRST 21 SHDRST 21
+3V
1 2
R169 100K
14MOSC 10 PCLK_PIIX4 10 RTCCLK 15,16,23
+3V
SPKR 19
C388 1000PF
CONFIG2
E
2
1 2
3
D24
C413 1UF
1 2
J16J9J10
GND
VREF
SDD6
SDD7
SDD8
A13
C12
D12
SDD8
SDD7
SDD6
R342 1K
1
+3VS
RB425D
J11
J12K9K10
K11
K12
GND
GND
GND
GND
GND
GND
GND
GND GND GND GND GND GND GND GND GND GND GND
NC NC NC
BIOSCS# RTCALE/GPO25 RTCCS#/GPO24 KBCCS#/GPO26
XOE#/GPO23
XDIR#/GPO22
*
CONFIG1
*
CONFIG2
PCS0# PCS1#
MCCS#
CLK48
OSC
PCICLK
*
SUSCLK
*
TEST#
SPKR
*
RTCX1
*
RTCX2
VBAT
*
PWROK
OC0# OC1#
USBP1+
USBP1-
USBP0+
USBP0-
PDIOR#
PDIOW#
PIORDY
PDDREQ
PDDACK#
PDCS1# PDCS3#
SDIOR#
SDIOW#
SIORDY
SDDREQ
SDDACK#
SDCS1# SDCS3#
PDA0 PDA1 PDA2 SDA0 SDA1 SDA2
NC1 NC2 NC3
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
B13
D13
B14
E14
A15
C15
D15
SDD12
SDD15
SDD11
SDD13
SDD10
SDD14
SDD9
Title
Size Document Number Rev
B
Date: Sheet
+5VS
FLASH# SIRQ
INHIB ENDIM1 ENDIM2 REQA# REQB# REQC#
U12
GNTA# GNTB# GNTC# PHDRST
SHDRST L9 L10 L11 L12 M9 M10 M11 M12 D10 E7 E13 M5 R5 M16
M2 L1 K2 K1 M4 M3
CONFIG1
R17
CONFIG2
R18 L4 N5 N4
48M
L3
14MOSC
V11
CLK_PX
D11
W=5mils
P17
R174 10K V18
1 2
K17
RTCX1
N19
RTCX2
R20 L16 M18
J1 J2 F1 H2 G2 H3
F17 F16 G20 F18 G19 H17 H16
C16 B16 D16
SDDREQ
A16 A17 B18 C18 G16 G18 G17 C17 B17 A18 J4 N18 N3
C399 .1UF
PIIX4M
+3V
Compal Electronics, inc.
SCHEMATIC, M/B LA-733 401138
12
12
14MOSC 12
R148 10
12
C136 15PF
13 47Tuesday, August 21, 2001
R137 10
C124 15PF
CONFIG1
of
12
12
48M 10
CLK_PX
R330 10
C400 15PF
A
B
C
D
E
+3VS
12
C398 .1UF
1 1
2 2
3 3
DRQ713 DRQ613 DRQ513
4 4
DRQ013,27
ISA BUS Pull-up PCI BUS Pull-up
+5VS
+5VS
10
10
10
RP11
8P4R_4.7K
R312
1 2
10K RP31
8P4R_10K
R140 1K
1 2
R307 1K
1 2
RP30
1 2 3 4 5
10P8R_10K
RP8
6 7 8 9
10P8R_4.7K RP13
6 7 8 9
10P8R_4.7K
RP35
9 8 7 6
10P8R_4.7K
SD[0..15] SA[0..19]
45 36 27 18
45 36 27 18
ZWS# IOCHRDY
10 9 8 7 6
5 4 3 2 1
5 4 3 2 1
1 2 3 4 5
IOW# 13,25 MEMR# 13,25 MEMW#13,25,27 IOR# 13,25,27
IRQ5 13
IRQ11 13 IRQ12 13,25 IRQ14 13,22 IRQ15 13,22
SD5 SD0 SD1 SD6
SD11 SD12 SD13 SD14
ZWS# 13 IOCHRDY 13,25,27
+5VS
IRQ4 13 IRQ6 13 IRQ7 13 IRQ9 13
+5VS
+5VS
DRQ1 13,27 DRQ3 13,27 DRQ2 13,27
1 2 3 4 5
+3VS
+3VS
+3VS
1 8 2 7 3 6 4 5
+3V
+3VS
R302 10K
+3VS
RP9
10P8R_10K
NOTE: +3V 8.2K
RP29
1 8 2 7 3 6 4 5
8P4R_10K
1 2
R171 10K RP10
IRDY# DEVSEL# TRDY# FRAME#
8P4R_10K
RP39
45 36 27 18
8P4R_4.7K
R133 10K
1 2
R134 10K
1 2 1 2
RP7
1 8 2 7 3 6 4 5
8P4R_10K
10 9 8 7 6
PBTN# SMBALT#
PIIX4_RI#
+3VS
PERR#
PHLDA# STOP# SERR#
PERR#31
PHLDA#8,13
STOP#8,13,31 SERR#8,13,31
+5VS
IRQ013 IRQ113,25 IRQ1013 IRQ313
+5VS
+5VS
DRQ7 DRQ6 DRQ5 DRQ0
SD[0..15]13,25,27 SA[0..19]13,25,27
SD4 SD7 SD2
SD3
SD9 SD10 SD8 SD15
PIRQ#A PIRQ#B PHLD# CLKRUN#
PIRQC# 13,17,23 PIRQD# 13,31 PAR 8,13,31 PLOCK# 8
SIRQ 13,15,27
REQA# REQB# REQC# PIIX4_SLP#
+3VS
IRDY# 8,13,31 DEVSEL# 8,13,31 TRDY# 8,13,31 FRAME# 8,13,31
PBTN# 13 LID# 13 SMBALT# 13 PIIX4_RI# 13,26
GNTA# 13 GNTB# 13 GNTC# 13
PIRQA# 13,15,23 PIRQB# 13,15,23,31 PHLD# 8,13 CLKRUN# 8,13,23,27,31
REQA# 13 REQB# 13 REQC# 13 PIIX4_SLP# 6,13
+3VS
12
C396 .1UF
FOR PIIX4
12
C407
.1UF
12
C408
.1UF
12
12
C390
.1UF
C411 .1UF
C392
.1UF
+3VS
12
12
C397 1000PF
+3VS
12
12
12
12
C395
.01UF
12
C409
.01UF
.01UF
C394
.1UF
C402
C405
.01UF
+3V
12
C406
.01UF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M/B LA-733
B
401138
14
E
47Tuesday, August 21, 2001
of
Compal Electronics, inc.
S2_WP S2_A23
S1_D[0..15]16
S1_A[0..25]16
S2_D[0..15]16
S2_A[0..25]16
S_AD[0..31]17,31
S_C/BE#[0..3]17,31
+12VS
S_SERR#31
R84 22K
1 2 1 2
R83 22K
RTCCLK13,16,23
S1_D[0..15] S1_A[0..25] S2_D[0..15] S2_A[0..25] S_AD[0..31] S_C/BE#[0..3]
R55
1 2
100K
G
2
2N7002 Q9
13
D
S
S2_D0 S1_D0 S2_D1 S1_D1 S2_D2 S1_D2 S2_D3 S1_D3 S2_D4 S1_D4 S2_D5 S1_D5 S2_D6 S1_D6 S2_D7 S1_D7 S2_D8 S1_D8 S2_D9 S1_D9 S2_D10 S1_D10 S2_D11 S1_D11 S2_D12 S1_D12 S2_D13 S1_D13 S2_D14 S1_D14 S2_D15 S1_D15
S2_A0 S1_A0 S2_A1 S1_A1 S2_A2 S1_A2 S2_A3 S1_A3 S2_A4 S1_A4 S2_A5 S1_A5 S2_A6 S1_A6 S2_A7 S1_A7 S2_A8 S1_A8 S2_A9 S1_A9 S2_A10 S1_A10 S2_A11 S1_A11 S2_A12 S1_A12 S2_A13 S1_A13 S2_A14 S1_A14
R280
S2_A16 SB_A16 SA_A16 S1_A16
1 2
Placement near to PCMCIA controller
S2_BVD116 S2_BVD216 S2_CD1#16 S2_CD2#16 S2_RDY#16 S2_WAIT#16
S2_WP16
S2_INPACK#16
S2_CE1#16 S2_CE2#16 S2_WE#16
S2_IORD#16
S2_IOWR#16
S2_OE#16 S2_VS116
S2_VS216 S2_REG#16 S2_RST16
S2_A15 S1_A15 S2_A17 S1_A17
S2_A18 S1_A18
47
S2_A19 S1_A19 S2_A20 S1_A20 S2_A21 S1_A21 S2_A22 S1_A22 S2_A23 S1_A23 S2_A24 S1_A24 S2_A25 S1_A25
S2_BVD1 S1_BVD1 S2_BVD2 S1_BVD2 S2_CD1# S1_CD1# S2_CD2# S1_CD2# S2_RDY# S1_RDY# S2_WAIT# S1_WAIT# S2_WP S1_WP S2_INPACK# S1_INPACK#
S2_VS2 S2_RST
SLDATA16
DEV_RST#16,23
GNT#38
REQ#38 S_C/BE#317,31 S_C/BE#217,31 S_C/BE#117,31 S_C/BE#017,31
PCLK_PCM10
S_FRAME#17,31 S_DEVSEL#17,31
S_PCIRST#17,31
S_TRDY#17,31
S_IRDY#17,31 S_STOP#17,31 S_PERR#31
S_PAR17,31
76
B_D0/CAD27
78
B_D1/CAD29
80
B_D2/RSVD
17
B_D3/CAD0
19
B_D4/CAD1
21
B_D5/CAD3
24
B_D6/CAD5
26
B_D7/CAD7
77
B_D8/CAD28
79
B_D9/CAD30
81
B_D10/CAD31
18
B_D11/CAD2
20
B_D12/CAD4
23
B_D13/CAD6
25
B_D14/RSVD
27
B_D15/CAD8
67
B_A0/CAD26
66
B_A1/CAD25
65
B_A2/CAD24
62
B_A3/CAD23
60
B_A4/CAD22
59
B_A5/CAD21
57
B_A6/CAD20
54
B_A7/CAD18
39
B_A8/CC/BE1#
36
B_A9/CAD14
29
B_A10/CAD9
34
B_A11/CAD12
52
B_A12/CC/BE2#
41
B_A13/CPAR
43
B_A14/CPERR#
50
B_A15/CIRDY#
48
B_A16/CCLK
37
B_A17/CAD16
40
B_A18/RSVD
42
B_A19/CBLOCK#
45
B_A20/CSTOP#
47
B_A21/CDEVSEL#
49
B_A22/CTRDY#
51
B_A23/CFRAME#
53
B_A24/CAD17
55
B_A25/CAD19
72
B_BVD1/CSTSCHG
71 137
B_BVD2/CAUDIO A_BVD2/CAUDIO
16
B_CD1#/CCD1#
74
B_CD2#/CCD2#
69
B_READY/CINT#
70
B_WAIT#/CSERR#
73
B_WP/CCLKRUN#
61
B_INPACK/CREQ#
28
B_CE1#/CC/BE0#
30
B_CE2#/CAD10
46
B_WE#/CGNT#
33
B_IORD#/CAD13
35
B_IOWR#/CAD15
32
B_OE#/CAD11
68
B_VS1#/CVS1
56
B_VS2#/CVS2
63
B_REG#/CC/BE3#
58
B_RESET/CRST#
CBRST#
1 2
R458 10
1 2
R459 10
202
200
199
198
PAR
SERR#
PERR#
STOP#
195
IRDY#
196
166
TRDY#
RSTIN#
Slot
12 R244
33
C270
12
10PF
197
193
1805203
PCLK
FRAME#
DEVSEL#
169
192
162
168
151
152
175
GNT#
DATA
REQ#
C/BE0#
C/BE1#
C/BE2#
C/BE3#
G_RST#
PCI
Interface
B
CLOCK
149
150
LATCH
+3V
S
D
SPKOUT#
IRQ/DMA
SLATCH 16 PCM_SPK# 19
Add by Charles at 1/4Add by Charles at 3/27
Q7 2N7002
G
2
1 3
12
C43 .1UF
+3V_PCMCIA
178
1
148
VCCI
VCCP
VCCP
Power
31
64
7
VCC
VCC
VCC
Slot
A
SYSON_ALW 30
+3VALW
12
C271 .1UF
+3VALW
86
113
143
164
187
201
VCC
VCC
VCC
VCC
VCC
VCC
S1_VCC_R
S2_VCC_R
120
38
VCCA
VCCB
A_BVD1/CSTSCHG
A_INPACK/CREQ#
C77
.1UF
1 2
W=40mils
W=40mils
C74
1 2
.1UF
A_D0/CAD27 A_D1/CAD29
A_D2/RSVD
A_D3/CAD0 A_D4/CAD1 A_D5/CAD3 A_D6/CAD5
A_D7/CAD7 A_D8/CAD28 A_D9/CAD30
A_D10/CAD31
A_D11/CAD2 A_D12/CAD4 A_D13/CAD6
A_D14/RSVD
A_D15/CAD8 A_A0/CAD26
A_A1/CAD25 A_A2/CAD24 A_A3/CAD23 A_A4/CAD22 A_A5/CAD21 A_A6/CAD20 A_A7/CAD18
A_A8/CC/BE1#
A_A9/CAD14 A_A10/CAD9
A_A11/CAD12
A_A12/CC/BE2#
A_A13/CPAR
A_A14/CPERR#
A_A15/CIRDY#
A_A16/CCLK
A_A17/CAD16
A_A18/RSVD
A_A19/CBLOCK#
A_A20/CSTOP#
A_A21/CDEVSEL#
A_A22/TRDY#
A_A23/CFRAME#
A_A24/CAD17 A_A25/CAD19
A_CD1#/CCD1#
A_CD2#/CCD2#
A_READY/CINT#
A_WAIT#/CSERR#
A_WP/CCLKRUN#
A_CE1#/CC/BE0#
A_CE2#/CAD10
A_WE#/CGNT#
A_IORD#/CAD13
A_IOWR#/CAD15
A_OE#/CAD11 A_VS1#/CVS1 A_VS2#/CVS2
A_REG#/CC/BE3#
A_RESET/CRST#
R72 0_0805
1 2 1 2
R71 0_0805
U28
141 144 146 83 85 88 90 92 142 145 147 84 87 89 91 93
133 132 131 128 126 125 123 119 104 102 95 100 117 106 108 115 112 103 105 107 109 111 114 116 118 121
138 82
140 135 136 139 127
94 97 110 99 101 98
S1_VS1S2_VS1
134
S1_VS2
122 130
S1_RST
124
S2_VCC S1_VCC
GND
AD29
AD28
AD27
AD26
S2_VCC S2_VCC
AD4
AD10
AD9
AD8
AD7
AD6
AD5
AD3
AD2
AD1
AD0
1722346
8
91112
14
15
S_AD10
S_AD11
S_AD0
S_AD1
S_AD2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
S_AD9
S_AD4
S_AD5
S_AD7
S_AD8
S_AD6
S_AD3
AD17
AD15
AD14
AD13
AD12
AD11
208
S_AD12
AD18
AD16
165
179
183
184
185
186
188
19010204
205
206
189
191
S_AD15
S_AD21
S_AD18
S_AD23
S_AD22
S_AD20
S_AD19
S_AD17
S_AD14
S_AD13
S_AD16
S_AD25
S_AD24
AD31
AD30
INTA#/MFUNC0
IDSEL
INTB#/MFUNC1
SUSPEND#
173
174
176
177
170
171
154
182
155
156
157
PCM_INTB#
PCM_INTA#
12
S_AD26
S_AD27
R47
S_AD28
S_AD29
S_AD30
S_AD31
100
S_AD15
AD25
AD24
AD23
AD22
AD21
AD20
AD19
RIOUT#/PME#
DMAGNT#/MFUNC5
LOCK#/MFUNC4
IRQSER/MFUNC3
DMAREQ#/MFUNC2
CLKRUN#/MFUNC6
163
13
160
159
158
161
PCM_RI#
1 2
R460 10
Add by Charles at 3/27
GND
GND
GND
GND
GND
22
44
75
96
129
S_PME# 17,31 S_CLKRUN# 31
PCM_RI# 28 SIRQ 13,14,27
GND
GND
153
GND
GND
GND
167
181
194
D14 RB751V
GND
PCI1420
207
R48 22K
1 2
2 1
+3V
PCM_SUSP# 25
CARDBUS PCI1420
R281
1 2
47
Placement near to PCMCIA controller
+3VALW
S1_BVD1 16 S1_BVD2 16 S1_CD1# 16 S1_CD2# 16 S1_RDY# 16 S1_WAIT# 16 S1_WP 16 S1_INPACK# 16
S1_CE1# 16 S1_CE2# 16 S1_WE# 16 S1_IORD# 16 S1_IOWR# 16 S1_OE# 16 S1_VS1 16 S1_VS2 16 S1_REG# 16 S1_RST 16
+3V_PCMCIA
12
12
C42
C40
.1UF
.1UF
+3VALW +3VALW
12
C322 1000PF
PCM_INTA#
PCM_INTB#
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
12
12
C72 .1UF
C41 1000PF
S1_A23
S1_WP
R50 22K
12
+3VALW
12
C48 .1UF
12
C53 1000PF
12
12
12
R78 22K
1 2
1 2
R62 22K
+3V
R49 22K
D16
RB751V D15
@RB751V
C321 .1UF
C80 1000PF
21
21
S1_VCC
S1_VCC
PIRQA# 13,14,23
PIRQB# 13,14,23,31
15 47Tuesday, August 21, 2001
of
A
B
C
D
E
PCMCIA POWER CTRL.
SOCKETCARDBUS
1 1
JP4
A77
a68
A76
S1_CD2#15
S1_WP15
S1_BVD115
S1_BVD215
S1_REG#15
S1_INPACK#15
2 2
3 3
4 4
S1_WAIT#15
S1_RST15 S1_VS215
S1_VPP S2_VPP S1_VCC
S1_RDY#15
S1_WE#15
S1_IOWR#15
S1_IORD#15
S1_VS115 S1_OE#15
S1_CE2#15
S1_CE1#15
S1_CD1#15
S1_CD2# S1_WP
S1_D10 S1_D2 S1_D9 S1_D1 S1_D8 S1_D0 S1_BVD1
S1_A0 S1_BVD2 S1_A1 S1_REG# S1_A2 S1_INPACK# S1_A3
S1_WAIT# S1_A4 S1_RST S1_A5 S1_VS2 S1_A6 S1_A25
S1_A7 S1_A24 S1_A12 S1_A23 S1_A15 S1_A22
S1_A16
S1_A21 S1_RDY# S1_A20 S1_WE# S1_A19 S1_A14 S1_A18 S1_A13
S1_A17 S1_A8 S1_IOWR# S1_A9 S1_IORD#
S1_A11 S1_VS1 S1_OE# S1_CE2# S1_A10
S1_D15 S1_CE1# S1_D14 S1_D7 S1_D13 S1_D6
S1_D12 S2_D12 S1_D5 S1_D11
S1_D4
S1_CD1#
S1_D3
a34
A75
a67
A74
a33
A73
GND
A72
a66
A71
a32
A70
a65
A69
a31
A68
a64
A67
a30
A66
a63
A65
GND
A64
a29
A63
a62
A62
a28
A61
a61
A60
a27
A59
a60
A58
a26
A57
GND
A56
a59
A55
a25
A54
a58
A53
a24
A52
a57
A51
a23
A50
a56
A49
GND
A48
a22
A47
a55
A46
a21
A45
a54
A44
a20
A43
a53
A42
GND
A41
a19
A40
a52
A39
a18
A38
a51
A37
a17
A36
a50
A35
a16
A34
a49
A33
a15
A32
a48
A31
a14
A30
a47
A29
a13
A28
GND
A27
a46
A26
a12
A25
a45
A24
a11
A23
a44
A22
GND
A21
a10
A20
a43
A19
a9
A18
a42
A17
a8
A16
GND
A15
a41
A14
a7
A13
a40
A12
a6
A11
a39
A10
a5
A9
GND
A8
a38
A7
a4
A6
a37
A5
a3
A4
a36
A3
a2
A2
a35
A1
a1
787980
787980
b68 b34 b67 b33
GND
b66 b32 b65 b31 b64 b30 b63
GND
b29 b62 b28 b61 b27 b60 b26
GND
b59 b25 b58 b24 b57 b23 b56
GND
b22 b55 b21 b54 b20 b53
GND
b19 b52 b18 b51 b17 b50 b16 b49 b15 b48 b14 b47 b13
GND
b46 b12 b45 b11 b44
GND
b10 b43
b9
b42
b8
GND
b41
b7
b40
b6
b39
b5
GND
b38
b4
b37
b3
b36
b2
b35
b1
81
PCMC154PIN
81
B77 B76
S2_CD2#
B75
S2_WP
B74 B73
S2_D10
B72
S2_D2
B71
S2_D9
B70
S2_D1
B69
S2_D8
B68
S2_D0
B67
S2_BVD1
B66 B65
S2_A0
B64
S2_BVD2
B63
S2_A1
B62
S2_REG#
B61
S2_A2
B60
S2_INPACK#
B59
S2_A3
B58 B57
S2_WAIT#
B56
S2_A4
B55
S2_RST
B54
S2_A5
B53
S2_VS2
B52
S2_A6
B51
S2_A25
B50 B49
S2_A7
B48
S2_A24
B47
S2_A12
B46
S2_A23
B45
S2_A15
B44
S2_A22
B43 B42
S2_A16
B41 B40 B39 B38 B37
S2_A21
B36
S2_RDY#
B35
S2_A20
B34
S2_WE#
B33
S2_A19
B32
S2_A14
B31
S2_A18
B30
S2_A13
B29 B28
S2_A17
B27
S2_A8
B26
S2_IOWR#
B25
S2_A9
B24
S2_IORD#
B23 B22
S2_A11
B21
S2_VS1
B20
S2_OE#
B19
S2_CE2#
B18
S2_A10
B17 B16
S2_D15
B15
S2_CE1#
B14
S2_D14
B13
S2_D7
B12
S2_D13
B11
S2_D6
B10 B9 B8
S2_D5
B7
S2_D11
B6
S2_D4
B5
S2_CD1#
B4
S2_D3
B3 B2 B1
S2_CD2# 15 S2_WP 15
S2_BVD1 15
S2_BVD2 15 S2_REG# 15
S2_INPACK# 15
S2_WAIT# 15 S2_RST 15 S2_VS2 15
S2_VCC
S2_RDY# 15 S2_WE# 15
S2_IOWR# 15 S2_IORD# 15
S2_VS1 15 S2_OE# 15 S2_CE2# 15
S2_CE1# 15
S2_CD1# 15
S1_D[0..15]15 S1_A[0..25]15
S2_D[0..15]15 S2_A[0..25]15
S1_VCC
S2_VCC
S1_D[0..15]
S1_A[0..25] S2_D[0..15]
S2_A[0..25]
C337 .1UF
C340 .1UF
S1_CD1#
S1_CD2#
S2_CD1#
S2_CD2#
1000PF
1000PF
1000PF
C351
1 2
C353
1 2
C346
1 2
C345
1 2 1000PF
C352 .01UF
C294 .01UF
12
C355
4.7UF_10V_0805
12
C347
4.7UF_10V_0805
C83 C307 C330 C320 C301 C323 C296
1UF_25V_0805 .1UF .1UF
.1UF .1UF
.1UF .1UF
+3VALW
+3VALW
SLDATA15 SLATCH15 RTCCLK13,15,23
R270 @100K
+12VALW
+5VALW
U29
25
NC
7
12V
24
12V
1
5V
2
5V
30
5V
15
3.3V
16
3.3V
17
3.3V
3
DATA
5
LATCH
4
CLOCK
13
NC
19
STBY#
18 12
OC# GND
TPS2216AI
+3VALW
S1_VPP
S2_VPP
12 C71 .1UF
+3VALW POWER
C335
.01UF
C293
.01UF
14
2 3 7
RESET
RESET#
MODE
1
U5A 74LVC125
12
12
8
AVPP
9
AVCC
10
AVCC
11
AVCC
23
BVPP
20
BVCC
21
BVCC
22
BVCC
6 14
26
NC
27
NC
28
NC
29
DEV_RST#
R51
C356
4.7UF_25V_1206
C348
4.7UF_25V_1206
S1_VPP
S2_VPP
TPAD1
TP
PCMRST# 25
10K
+3VALW
12
C336
4.7UF_10V_0805
12
DEV_RST#
DEV_RST# 15,23PCIRST#7,13,31
S1_VPP S1_VCC
S2_VPP S2_VCC
C295
4.7UF_10V_0805
Compal Electronics, i nc .
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
16 47Tuesday, August 21, 2001
E
of
Reserved by Charles at 6/25
12
12
C32
C263
.1UF
.1UF
1 1
S_AD[0..31]15,31
S_C/BE#[0..3]15,31
2 2
Change by Charles at 2/16
3 3
CDROM_L20
CDROM_R20
A
12
12
R16 @24K
R18 @24K
C261 .1UF
12
C35 .01UF
S_AD[0..31] S_C/BE#[0..3]
C225 10PF
Y4
49.152 MHz
C226 33PF
C221 1500PF
R14 6.8K
C232 1000PF
12
12
NPO
NPO
NPO
1000PF
C269 .1UF
Place component's to Es1988
MOD_SPK31 MOD_MIC31
CD_AGND20,21
DOCK_LIN_L33
DOCK_LIN_R33
12
C268 .01UF
12
R20
6.8K R5
6.8K
C242
10UF_10V_1206
12
12
Change by Charles at 2/25
+3VS
12
12
C262 .01UF
Y3
@49.152 MHz
R220 0
L12
LK1608-1R0K
12
R15 6.8K R17
12 0 R2
12 0
R19
6.8K
12
6.8K
12
C238
CD_L_R
CD_R_R
C39
+
4.7UF_10V_0805
12
12
CD_GNA CD_L_R
CD_R_R 12 12
C25 .1UF
10UF_10V_1206
R26 1M
C245
MONO_IN19
RIGHT_EQ18,20
LEFT_EQ18,20
12
26
C12 1UF
MICIN19
C13 1UF
C17 1UF
1 2
1 2
1 2
B
Add by Charles at 3/1
MUTE19
MD_SYNC31 MD_BITCLK31
MD_SDATAO31
AUTO_GAIN_CONTROL
SYS_VOL_UP#13 SYS_VOL_DW#13
Add by Charles at 12/1
1 2
C255 1UF
1 2
C16 1UF
1 2
C14 1UF
1 2
C15 1UF
1 2
C18 1UF
1 2
C31 1UF
1 2
C34 1UF
C28 .1UF
AGND
C
63
474849
GPIO13 / GD5
GPIO14 / GD6
AD12
AD11
S_AD12
S_AD13
S_AD11
R240 @4.7K
1 2
GPIO10 / SCLK2
GPIO11 / SDO2 / VauxD
GPIO12 / PCGNT# / GTO# / GS0
AD15
AD14
AD13
22232425262728
S_AD14
S_AD15
AVDD
12
56
606162
GPIO8 / SDI2
GPIO9 / SDFS2
AD17
AD16
11
S_AD18
S_AD17
S_AD16
C258 .1UF
GPIO6 / ISDATA / R0#
GPIO5 / ISLR / GS0 / GT0#
GPIO7 / MC97_DI / PCREQ# / VOLUP#
AD20
AD19
AD18
S_AD20
S_AD19
12
4.7UF_10V_0805
5950515253
85
84
GPIO2 / TXD
GPIO1 / RXD
GPIO3 / SRESET2
GPIO4 / ISCLK / SIRQ#
PME# / SPDIFO / VOLDN#
AD23
AD22
AD21
AD25
AD24
45678910
100
S_AD24
S_AD25
S_AD21
S_AD23
S_AD22
C257
39
CLKRUN# / ECS
SPDIFO / R0# / IDSEL
AD30
AD29
AD28
AD27
AD26
S_AD29
S_AD27
S_AD28
S_AD30
S_AD26
+5VALW
1 2
12
C264 .1UF
R423 22
12
AD1
AD0
38
S_AD1
S_AD0
12
46
GD4
AD3
AD2
S_AD2
S_AD3
S_AD4
C265
4.7UF_10V_0805
57
OSCI OSCO
64
PC_BEEP
65 83
PHONE AVDD2
81
MONO_OUT
69
MIC
67
CD_GND
66
CD_L
68
CD_R
70
LINE_IN_L
71
LINE_IN_R
79
LINE_OUT_L
80
LINE_OUT_R
75
AFILT1
76
AFILT2
77
VCM
78
VREFADC
73
AVSS1
82
AVSS2
89
GND
40
GND
21
GND
3
GND
C266 .01UF
44
GD3 / ECLK / VOLDN#
AD4
S_AD5
435845
GD1 / EDOUT
GD2 / EDIN / VOLUP#
AD6
AD5
S_AD6
12
42
GD0
AD7
31323334353637
S_AD7
L16 @HB1M2012-601JT
Delete for D3 cold
GPIO15 / GD7
AD10
AD9
AD8
29
S_AD9
S_AD8
S_AD10
12
C259 .01UF
Add by Charles at 1/4
PCICLK
DEVSEL#
FRAME#
AD31
93949596979899
S_AD31
R40
10K
VCC VCC VCC
AVDD1
VREF
REQ# GNT#
INT#
RST#
C/BE3# C/BE2# C/BE1# C/BE0#
PAR
STOP# TRDY#
IRDY# VAUX
D13 AS2431L
12
ES1988
90 41 12
72
74
92 91
88 87
86 1
13 20 30
54 2 19 18 17 16 15 14 55
R455 10 R456 10
R457 10
D
+5VAU
+3VS
PCLK_AUD
R243 100
L18
12
HB-1M2012-121JT
R242
2.4K 1 2
R245 100K
2
1 3
MD_SDATAI 31 MD_RST# 31
AVDD_AC97
AUD_VREF
Add by Charles at 3/27
12 12
12
S_AD19
12
+3VALW
Place closely to Es1988
PCLK_AUD
12
R44 10
12
C38 15PF
12
+5VALW
1
12
C272
3
.1UF
Change by Charles at 2/16
REQ#4 8 GNT#4 8
PCLK_AUD 10 PIRQC# 13,14,23
S_PCIRST# 15,31 S_C/BE#3 15,31
S_C/BE#2 15,31 S_C/BE#1 15,31 S_C/BE#0 15,31
S_PME# 15,31 S_PAR 15,31
S_STOP# 15,31 S_DEVSEL# 15,31 S_TRDY# 15,31 S_IRDY# 15,31 S_FRAME# 15,31
Change value by Charles at 2/10
2
Q2
2N7002
1 2
R54 442_1%
EN_CDPLAY# 20
1 2
R258
5.11K_0.5%
+3VALW
12
C244 1UF
AVDD
+12VALW
3
+
2
-
C275
12
68PF R251
1 2
5.11K_0.5% R259
1 2
0
+12VS
HB1M2012-121JT
12
C243 .1UF
C267
1 2
.1UF
84
U24A
LM358
C276
220PF
R46
1 2
100K
L15
1 2
12
C251 .1UF
AUD_VREF
E
2
1
R257
5.1K
12
C273 .1UF
2
AVDD_AC97
12
4.7UF_10V_0805
12
C11 1UF
12
12
C231
+5VALW
1 3
R481 33
1 3
1 3
12
Q28 SI2306DS
Add
12
discharge CKT at 6/27 by Charles
Q66
2N7002
+5VAMP
Q3 SI2304DS
AVDD
2
4 4
A
L17
0_0805
1 2
L13
0_0805
1 2
L3 0_0805
12
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
17 47Tuesday, August 21, 2001
E
of
A
Change power source by Charles at
LMV801
1 4 6 11 13 15 98
1 4 6 11 13 15 98
Change power source by Charles at 2/2
+5VAMP
OUT1_R OUT2_R OUT3_R OUT4_R OUT5_R
EQ_IN_R
2N7002
2/2
+5VAMP
OUT1_L OUT2_L OUT3_L OUT4_L OUT5_L
EQ_IN_L
+5VCD
2
Q55
C23 .1UF
216
5VGND
L1
1 2
HB1M2012-601JT
C26
4.7UF_10V_0805
216
OUT1
5VGND
OUT2 OUT3 OUT4 OUT5 OUT6
SUM_OUTREF
L2
1 2
HB1M2012-601JT
C27
4.7UF_10V_0805
OUT1 OUT2 OUT3 OUT4 OUT5 OUT6
SUM_OUTREF
LMV801
HPS19
+5VEQL
1 1
C19 1UF
+5VEQR
3 5
7 10 12 14
3
IN1
5
IN2
7
IN3
10
IN4
12
IN5
14
IN6
C24 .1UF
U21
IN1 IN2 IN3 IN4 IN5 IN6
EQ_L_INPUT1 EQ_L_INPUT2
+5VEQL
EQ_L_INPUT3
22K
22K
2 2
+5VEQR
R215
22K
1 2
3 3
R216
22K
1 2
Add by Charles at 5/20
EQ_L_INPUT4 EQ_L_INPUT5
1 2
C543 .01UF
1 2
Add by Charles at 5/20
EQ_R_INPUT1 EQ_R_INPUT2 EQ_R_INPUT3 EQ_R_INPUT4 EQ_R_INPUT5
C544 .01UF
C236 1UF
Add by Charles at 4/19
B
Add by Charles at 3/22
C517
12
R465 10K
HPS_PLUG
1
Q54
3
2N7002
HPS_DIS
LEFT_EQ
RIGHT_EQ
1UF
Add by Charles at 3/22
C518
1UF
LEFT_EQ17,20
RIGHT_EQ17,20
+5VCD
12
R466 10K
2 1 3
C21 1500PF
1 2
R30
L_EQ
1 2
HPS_PLUG
HPS_DIS
EQ_IN_L
C235 1500PF
1 2
140K_1%
RIGHT_EQ RIGHT
C527
.1UF
EQ_IN_R
140K_1%
R31
140K_1%
1 2
R42
1 2
@0
14
1 2 7
13
U49A 74HCT4066
14 11 10
7
12
U49B 74HCT4066
R464
1 2
@0
1 2
R230
1 2
R231
140K_1%
1 2
R241
1 2
@0
+5VCD
14
4 3 7
U49C
5
74HCT4066
14
8 9 7
U49D
6
74HCT4066
R467
1 2
@0
1 2
C237
1500PF
C22
1500PF
LEFTLEFT_EQ
C
EQ_L_INPUT1
R28
560K_1%
1 2
OUT1_L
536HZ +6dB Q=1.41
LEFT 19
Add by Charles at 4/19
EQ_R_INPUT1
R233
560K_1%
1 2
OUT1_RR_EQ
536HZ +6dB Q=1.41
RIGHT 19
EQ_L_INPUT2
1 2
R21
R10
75K_1%
C228 470PF
R222
C224 82PF
R219
200K_1%
1 2
1 2
75K_1%
1 2
1 2
200K_1%
1 2
1 2
75K_1%
1 2
1 2
470PF
R27
1 2
82PF
R218
C230
1 2
470PF
R223
C227
1 2
82PF
R214
1 2
220K_1%
1 2
R_EQ OUT2_R
1 2
220K_1%
R_EQ
1 2
75K_1%
R24
220K_1%
1 2
OUT2_LL_EQ
2230HZ
-6dB Q=0.72
EQ_L_INPUT4
R11
300K_1%
1 2
OUT4_LL_EQ
18299HZ +6dB Q=1.41
EQ_R_INPUT2
R226
220K_1%
1 2
2230HZ
-6dB Q=0.72
EQ_R_INPUT4
R221
300K_1%
1 2
OUT4_R R_EQ OUT5_R
18299HZ +6dB Q=1.41
D
1 2
R22
C222 330PF
C229 220PF
R225
1 2
1 2
1 2
R213
200K_1%
1 2
1 2
R227
39K_1%
1 2
1 2
R12
200K_1%
1 2
1 2
1 2
R232
39K_1%
1 2
330PF
C10
220PF
C223
330PF
C234
220PF
1 2
200K_1%
1 2
127K_1%
R_EQ OUT3_R
1 2
200K_1%
1 2
127K_1%
Change value by Charles at 5/2 6
EQ_L_INPUT3
R13
200K_1%
1 2
OUT3_LL_EQ
3410HZ
-6dB Q=0.707
EQ_L_INPUT5
R25
300K_1%
1 2
OUT5_LL_EQ
7646HZ +1.45dB Q=1.59
EQ_R_INPUT3
R217
200K_1%
1 2
3410HZ
-6dB Q=0.707
EQ_R_INPUT5
R229
300K_1%
1 2
7646HZ +1.45dB Q=1.59
E
4 4
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
18 47Tuesday, August 21, 2001
E
of
A
+5VAMPP
C260
C29
.1UF
.1UF
1 1
RIGHT18
LEFT18
+5VALW
Control by headphone out
LINE_OUT_PLUG32,33
+5VALW
12
R41
Control by SPR
INTSPKOFF#33
2 2
3 3
4 4
100K
3 4
U6B 74HCT14
+5VALW POWER
7 14
R444
0
MUTE17
EC_MUTE26
BEEP#26
U5B 74LVC125
5 6
12 12
R438
@0
+3VALW
12
R267 100K_1%
4
R266 10K_1%
1 2
Change value by Charles at 5/3
PCM_SPK#15
Change value by Charles at 5/3
SPKR13
A
12
RIGHT
LEFT
R238 820K
12
R473 @10K
R34 0
12
R39 0
12
12
+5VALW
14 12
13
7
1 2
.1UF
12
1 2
.1UF
12
C285
.22UF
5 6
3 4
U46D
74HCT32
+5VALW POWER
HPS18
+5VAMP
+5VALW
C526
5 1
2 3
U48 NC7ST32_SC70
R471
+5VALW POWER
10K
Add by Charles at 3/21 (Only for reserved)
+3VALW AVDD
C280
147
U26A
74LVC14
1 2
+3VALW POWER+3VALW POWER
714
U26C
74LVC14
+3VALW POWER
714
U26B
74LVC14
+3VALW POWER
1 2
C30 2.2UF_16V_0805
1 2
C36 2.2UF_16V_0805
12
R37
R35
@10K
@10K
HPS
11
R33
1 2
@100K
D49
@RB751V
4
C289 1UF
1 2
C306
1 2
1UF
C290
1 2
1UF
+5VAMP
D46 RB751V
21
Add pullup to pin 4 by Charles at 6/22
21
MUTE_AUD
1 2
1 2
1 2
12
12
R268 560
R272
560
R269
560
R482 100K
R36
100K
17
RLINEIN
15
LLINEIN
4
HPS
5
MODE
2
12
R271 10K
INTMICOFF#33
+5VS
12
R239 10K
12
1 3
2 1
B
1 2
8
18
13
VDD3
VDD2
R_UP/DOWN#
L_UP/DOWN#
GND3
GND2
GND1 VDD1
201110
1 3
+5VS
R157
10K
R237 10K
Q26 2SC2411EK
D18 RB751V
B
Add by Charles at 5/20 for PO-PO sound
L14 HB1M2012-601JT
+
C247
4.7UF_10V_0805
VDD4
GND4
ROUT+
ROUT-
LOUT+
LOUT-
GAINSEL
SVR
TDA8552TS
12
C248
12
1UF
12
12
19
2
9
6
7
14
16
R144
100K
22K
2
22K
C241
1UF_16V_0805 R235 @10K
EC_MUTE26
+5VAMP
C256
4.7UF_10V_0805
INTSPK_R+
INTSPK_R­INTSPK_L+
INTSPL_L-
R45
30dB/20dB#
C249 .1UF
2
12
13
Q63 SI2304DS
Q65
SI2304DS
0
Q16
SI2304DS
1 3
2
Q15 DTC124EK
MONO_IN 17
2N7002
+
2
1 3
1 3
2
12
100K
2 1
C33
2.2UF_16V_0805
MICEXT_MIC
R147
1 2
100K
1
Q13
3
2N7002
Q61
2
1 3
1 3
+5VALW POWER
R445
R43 @100K D48
RB751V
+12VS
3 1
R480
1 2
2
100K
SI2304DS
Q64 SI2304DS
2
12
+5VAMP
12
U6A
74HCT14
+5VALW POWER
DOCK_MIC 33
MICIN17
+12VALW
+
C253 150UF_TPB_6.3VQ62
SPKR- 32
+
C254 150UF_TPB_6.3V
SPKL- 32
4
14 56
U37B 74HCT125
7
+5VALW
C76
1 2
.1UF
147
12
AUD_VREF
MICIN
C
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
3 2
U22B
7
1 2
1 2
SPKR+ 32 LINEOUT_R 32,33
SPKL+ 32 LINEOUT_L 32,33
EXT_MIC
AVDD
84
@TDA1308
+
-
AVDD
84
5
+
6
-
R23
0
@15PF
AVDD
12
12
C278 1UF
HB1M1608-601JT
HB1M1608-601JT
U22A
1
MUTE_AUD
Add by Charles at 1/4 for PC99
R246 18K_1%
R260 100K
L20
1 2 1 2
L19
1 2
2
12
12
R247 18K_1%
12
2
C240 @.1UF
AVDD
12
12
12
1
Q6 2SC2411EK
3
R53
2.2K
C277 330PF
1 2
C239 @.1UF
Modify by Charles at 2/16
R29 @0
Q58 SI2304DS
2
1 2 1 3
13
R470
Q59 2N7002
1 2
+12VS
100K
Title
Size Document Number Rev
B
Date: Sheet
Modify by Charles at 2/16
5 4 3
6 2 1
12
FOXCONN JA6033L-101
C50
1 2
330PF
JOPEN9
2MM
AVDD
1
2
3
R234 @0
C20
0
1 2
12
+
C246
4.7UF_10V_0805
Compal Electronics, inc.
SCHEMATIC, M/B LA-733 401138
LINEOUTR
LINEOUTL
DIS_ADJVOL 26
ADJVOL_UP/DW# 26
HPS
INT_MIC32
@TDA1308
C
MIC
JP24
Q1 2SC2411EK
R32
2.2K
MIC
D
7
8
D
19 47Tuesday, August 21, 2001
of
RP49 1 8 2 7 3 6 4 5
8P4R-10K
D28 RB751V
2 1
D30 RB751V
2 1
D29 RB751V
2 1
D27 RB751V
2 1
C427 10PF
OSC1
C428 10PF
ISCDROM CD_IRQ CDASPN MODE1
PLAY#
REV#
FRD#
STOPCD#
X2
8MHZ
R361 1M
OSC2
Change value by Charles at 2/17
C429
1UF
R359 100K
+5VALW
1UF_16V_0805
+5VCD
1UF_16V_0805
1 2
D25
+12VALW
C466
C469
21
1N4148 SMD3,5,25,26,32,33,38
SMC3,5,25,26,32,33,38
+5VALW
R394
100K
Change value by Charles at 6/22
+5VCD
+
C467
4.7UF_10V_0805 16V
+
C468
4.7UF_10V_0805
+5VCD
Q44 2N7002
PLAYBTN# 26,32
REVBTN# 26,32
FRDBTN# 26,32
STOPBTN# 26,32
SIDERST#21
Q34 2N7002
1 3
2
13
U35
8
D
7
D
6
D
5
D
SI4800
+5VCD
DM_ON
Q33 2N7002
1 3
EN_CDPLAY#
2
S S S
G
R391
33
2
+5VCD
1 2 3 4
S_DA022 S_DA122 S_DA222
S_DCS1#22 S_DCS3#22
S_DIOR#22 S_DIOW#22
SIORDY13,22
IRQ_1522 SDDREQ13,22 S_DDACK#22
+5VCD
12
C472
.1UF
13
2N7002
R360
10K
D26
RB751V
+5VCD
2
Q42
CDD[0..15]
SDD_[0..15]
1 2
R369 33
21
+12VALW
12
13
SDD_0 SDD_1 SDD_2 SDD_3 SDD_4 SDD_5 SDD_6 SDD_7 SDD_8 SDD_9 SDD_10 SDD_11 SDD_12 SDD_13 SDD_14 SDD_15
S_DA0 S_DA1 S_DA2
S_DCS1# S_DCS3#
S_DIOR# S_DIOW#
IRQ_15
S_DDACK#
PLAY# FRD# REV# STOPCD#
INTN
1 2
R368 10K
1 2
R367 10K
EN_CDPLAY# 17
R393 100K
EN_CDPLAY#
2
Q43
2N7002
OSC1 OSC2
Modify by Charles at 1/4
+5VALW POWER
CDD[0..15] 21
SDD_[0..15] 22
76
HDD0
78
HDD1
81
HDD2
83
HDD3
86
HDD4
90
HDD5
95
HDD6
97
HDD7
2
HDD8
4
HDD9
8
HDD10
11
HDD11
15
HDD12
18
HDD13
20
HDD14
22
HDD15
68
HDA0
70
HDA1
66
HDA2
63
HCS0
61
HCS1
99
HDIOR#
6
HDIOW#
72
HIOCS16#
93
HIORDY
74
HINTRQ
12
HDMARQ
88
HDMACK#
24
HRESET#
59
HDASPN
48
HSYNC
53
HBIT_CLK
55
HDATA_OUT
50
HDATA_IN
46
HACRSTN
28
PAV_EN
36
PLAY/PAUSE
35
FFORWARD
34
REWIND
37
STOP/EJECT
29
PCSYSTEM_OFF
25
INTN
30
RESET#
26
SDATA
27
SCLK
31
OSCI
32
OSCO
U6F
74HCT14
DM_ON
INT_CD_L2
INT_CD_R2
S_DCS3# S_DCS1# S_DA2 S_DA0 S_DA1 S_DIOW# S_DIOR# S_DDACK#
1 3
+5VCD
C37
14
.1UF
1 2 7
DM_ON
14 11 10
7
DM_ON
14
4 3 7
DM_ON#
14
8 9 7
DM_ON#
RP54 1 2 3 4 5 6 7 8 9
@16P8R_0
RP50
16 15 14 13 12 11 10
@16P8R_0
Q4
2N7002
2
13
12
5
74HCT4066
U23D
6
74HCT4066
RP52 1 2 3 4 5 6 7 8 9
@16P8R_33
16 15 14 13 12 11 10
1 2 3 4 5 6 7 89
R379
1 2
R376
1 2
R377
1 2
1 2
U23A 74HCT4066
U23B 74HCT4066
U23C
16 15 14 13 12 11 10
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
@0
@0
@0
R370
Input to ES1988
CD_SCS3# CD_SCS1# CD_SBA2 CD_SBA0 CD_SBA1 CD_SIOW# CD_SIOR# CD_DACK#
CD_SIORDYSIORDY
CD_IRQIRQ_15
CD_DREQSDDREQ
CD_RSTDRV#SIDERST#
@33
R436
12
@10K R437
12
@10K
CDROM_L 17
CDROM_R 17
CDD0 CDD1 CDD2 CDD3
+5VCD
CDD11 CDD10 CDD9 CDD8
+5VCD
Modify by Charles at 2/25
LEFT_EQ 17,18
Input to EQ
RIGHT_EQ 17,18
CD_SCS3# 21 CD_SCS1# 21 CD_SBA2 21 CD_SBA0 21 CD_SBA1 21 CD_SIOW# 21 CD_SIOR# 21 CD_DACK# 21
RP53
1 2 3 4 5
10P8R_4.7K
RP51
1 2 3 4 5
10P8R_4.7K
10 9 8 7 6
10 9 8 7 6
+5VCD
+5VCD
CDD4 CDD5 CDD6 CDD7
CDD12 CDD13 CDD14 CDD15
R426 @10K
C502
1UF
R427 @10K
R428 @10K C503
1UF R429 @10K
CD_SIORDY
+5VCD
GPIO_0 GPIO_1 INTN
+5VCD
CD_AGND17,21
12
INT_CD_L2
12
12
INT_CD_R2
12
SDD_0 SDD_1 SDD_2 SDD_3 SDD_4 SDD_5 SDD_6 SDD_7
SDD_8 SDD_9 SDD_10 SDD_11 SDD_12 SDD_13 SDD_14 SDD_15
SIDERST#21 CD_RSTDRV# 21
+5VCD_1
1 2
C435
C430 .1UF
CDD0 CDD1 CDD2 CDD3 CDD4 CDD5 CDD6 CDD7 CDD8
CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
CDA0 CDA1 CDA2
CCS0 CCS1
CDIOR#
CDIOW#
CIOCS16#
CIORDY
CHINTRQ
CDMARQ
CRESET#
CDASPN
SSYNC
SBIT_CLK
SDATA_IN
SACRSTN
PWR_CTL
ISCDROM
MODE0 MODE1
PAVMODE
CSN
INCN
UDN
CD_PLAY 26
U33 OZ163
94458
VDD
VDD
VDD
CHDMACK#
SDATA_OUT
GPIO[1]/VOL_UP
GPIO[0]/VOL_DN
GND
GND
GND
GND
GND
1633658592
CD_PLAY_ON#26,32
714
CDPLAY
1312
C432
.1UF
.1UF
CDD0
77
CDD1
79
CDD2
82
CDD3
84
CDD4
87
CDD5
91
CDD6
96
CDD7
98
CDD8
1
CDD9
3
CDD10
7
CDD11
10
CDD12
14
CDD13
17
CDD14
19
CDD15
21
CD_SBA0
69
CD_SBA1
71
CD_SBA2
67
CD_SCS1#
64
CD_SCS3#
62
CD_SIOR#
100
CD_SIOW#
5
CIOCS16#
73
CD_SIORDY
94
CD_IRQ
75
CD_DREQ
13
CD_DACK#
89
CD_RSTDRV#
23
CDASPN
60 47
52
Change by Charles
54 49
at 5/20
45
1 2
R364
1 2
51
R362 @10K
ISCDROM
80
GPIO_1
39
GPIO_0
40
R366 10K
1 2
56
MODE1
57
1 2
38
R363 10K 41 42 43
+5VCD
L41 HB1M2012-601JT
INT_CD_L21
INT_CD_R21
+5VCD
10K
+5VCD
Modify by Charles at 2/2
714
11 10
U6E 74HCT14
+5VALW POWER
CD_SBA0 21 CD_SBA1 21 CD_SBA2 21
CD_SCS1# 21 CD_SCS3# 21
CD_SIOR# 21 CD_SIOW# 21
CD_SIORDY 21
CD_IRQ 21 CD_DREQ 21 CD_DACK# 21
CD_RSTDRV# 21
+5VCD
PLAY# REV# FRD# STOPCD#
+5VCD
DM_ONCD_PLAY_ON#
Modify by Charles at 2/25
R433
12
20K R432
12
33K R434
12
33K R435
12
20K
1 2
CD_DREQ
1 2
R375 5.6K
RP48
1 2 3 4 5
10P8R_10K
CIOCS16#
1 2 R374 47K
+5VCD
DM_ON#
13
2
R358 10K
R355
+5VAMP
INT_CD_L1
INT_CD_R1
+5VAMP
1K
10 9 8 7 6
Q32 2N7002
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
20 47Tuesday, August 21, 2001
of
A
B
C
D
E
IDE,CD-ROM & FDD Module CONN.
+5VS
12
12
C380
+
R310
1000PF
Place component's closely IDE CONN.
+5VS
12
R321
100K
PHDD# 26
470
P_DA2 22 P_DCS3# 22
1 1
PDD_[0..15]22
CDD[0..15]20
Modify by Charles at 2/29
2 2
PDD_[0..15]
CDD[0..15]
PDDREQ13,22 P_DIOW#22 P_DIOR#22 PIORDY13,22
P_DDACK#22
IRQ_1422
+5VS
P_DCS1#22
HDDLED#32
P_DA122 P_DA022
1 2
R299 10K
R138 10K
1 2
PIDERST# PDD_7 PDD_6 PDD_5 PDD_4 PDD_3 PDD_2 PDD_1 PDD_0
1 2
1 2
R320 33
R309 33
DASP#
+5VS
JP12
1 2
12
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
41 42
41 42
43 44
43 44
HDD CONN
PDD_8 PDD_9 PDD_10 PDD_11 PDD_12 PDD_13 PDD_14 PDD_15
PCSEL
1 2
+5VS
C373
10UF_10V_1206
12
1UF_25V_0805
Add by Charles at 2/16
+5VCD
Place component's
3 3
closely CD-ROM conn.
1 2
R189
Add by Charles at 2/16
CD_RSTDRV#20
Modify by Charles at 2/29
CD_SIOW#20
CD_SIORDY20
CD_IRQ20 CD_SBA120 CD_SBA020 CD_SCS1#20
CDLED#26,32
4 4
CDLED#
10K
1 2
INT_CD_L20
R288 0
CD_RSTDRV#
1 2 R191 10K
CD_SIOW#
CD_SIORDY
CD_IRQ CD_SBA1 CD_SBA0
CDLED#
CDD7 CDD6 CDD5 CDD4 CDD3 CDD2 CDD1 CDD0
1 2 R378 0
+5VCD +5VCD +5VCD
SEC_CSEL
R190
470
1 2
JP16
12 34 56 78 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
CD-ROM CONN.
Place component's closely to route trace middle.
R356
1 2
0
CD_AGND 17,20
CDD8 CDD9 CDD10 CDD11 CDD12 CDD13 CDD14 CDD15
1 2
R380 33 CD_DACK# PDIAG#
CD_SBA2 CD_SCS3#
W=80mils
1 2
C422
INT_CD_R 20
Modify by Charles at 2/29
CD_DREQ
CD_SIOR#
CD_DACK# 20
R357
1 2
.1UF
100K
CD_SBA2 20 CD_SCS3# 20
+5VCD +5VCD
Change by Charles at 2/25
CD_DREQ 20 CD_SIOR# 20
+5VCD
Modify by Charles at 2/17
C377
12
C374
.1UF
+5VCD
12
12
C172
C424
+
1000PF
10UF_10V_1206
Place component's closely CD-ROM CONN.
PHDRST13
RSTDRV13,27
SHDRST13
W=80mils
RSTDRV
12
C425
1UF_25V_0805
1 2
RSTDRV
RB425D
+5VCD
1 2
12
C423
.1UF
+5VS
D21
RB425D
3
R135
1 2
100K
2
22K
R303
1 2
100K
3
2
22K
PIDERST#
13
Q11
22K
22K
DTC124EK
SIDERST#CD_SCS1#
13
DTC124EK
SIDERST# 20
Q30
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
21 47Tuesday, August 21, 2001
E
of
A
Place them close PIIX4M
PDD12 PDD4 PDD14 PDD1
1 1
2 2
PDD13 PDD2 PDD15 PDD0
PDD8 PDD7 PDD9 PDD6 PDD10 PDD5 PDD3 PDD11
PDCS3#13 PDCS1#13 PDA213 PDA013
PDA113 P_DA1 21
PDIOW#13 PDIOR#13
PDDACK#13
RP16
1 2 3 4 5 6 7 8 9
16P8R-33
RP15
1 2 3 4 5 6 7 8 9
16P8R-33
RP17
4 5 3 6 2 7 1 8
8P4R-33 R336
1 2
33
RP38
1 8 2 7 3 6 4 5
8P4R-22
PDD_12
16
PDD_4
15
PDD_14
14
PDD_1
13
PDD_13
12
PDD_2
11
PDD_15
10
PDD_0
PDD_8
16
PDD_7
15
PDD_9
14
PDD_6
13
PDD_10
12
PDD_5
11
PDD_3
10
PDD_11
P_DCS3# 21
P_DA2 P_DA0
P_DA1
P_DCS1# 21 P_DA2 21 P_DA0 21
P_DIOW# 21 P_DIOR# 21
P_DDACK# 21
B
IDE Series Resistor
Modify by Charles at 2/29
IRQ1413,14
+5VS
1 2
R306 33
1 2
R311 10K
1 2
R327 5.6K
IRQ_14 21
PIORDY 13,21
PDDREQ 13,21
C
SDD[0..15]13 PDD[0..15]13
SDD_[0..15]20 PDD_[0..15]21
SDCS3#13 SDCS1#13 SDA213 SDA013
SDA113
SDIOW#13 SDIOR#13
SDDACK#13
SDD[0..15] PDD[0..15]
SDD_[0..15] PDD_[0..15]
SDD0 SDD1 SDD2 SDD3 SDD4 SDD5 SDD6
SDD8 SDD10
SDD11 SDD13
SDD14 SDD_14 SDD15
SDDACK#
RP12
1
16
2
15
3
14
4
13
5
12
6
11
7
10
89 16P8R-33 RP33
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8 9
16P8R-33
RP14
1 8 2 7 3 6 4 5
8P4R-33
R163 33
1 2
RP36 1 8 2 7 3 6 4 5
8P4R-22
S_DCS3# S_DCS1# S_DA2 S_DA0
S_DA1
S_DIOW# S_DIOR#
S_DDACK#
SDD_0 SDD_1 SDD_2 SDD_3 SDD_4 SDD_5 SDD_6 SDD_7SDD7
SDD_8 SDD_9SDD9 SDD_10 SDD_11 SDD_12SDD12 SDD_13
SDD_15
D
S_DCS3# 20 S_DCS1# 20 S_DA2 20 S_DA0 20
S_DA1 20
S_DIOW# 20 S_DIOR# 20
S_DDACK# 20
Modify by Charles at 2/29
IRQ1513,14
+5VS
1 2
R333 33
1 2
R341 10K
1 2
R159
5.6K
SDDREQ
E
IRQ_15 20
SIORDY 13,20
SDDREQ 13,20
+5VS
3 3
+5VS
C44
1 2
.1UF
84
3
+
1
2
-
U4A LMC6482IM
4 4
4 5
U30B 74LVC08
+3VS POWER
6
5
+
6
-
84
7
U24B LM358
+12VALW POWER
+5VS
+3VALW
+3VALW
.1UF
C508
1 2
.1UF
C510
1 2
+3V
.1UF
C511
1 2
+3V
.1UF
C513
1 2
.1UF
C515
1 2
.1UF
For PCI Bus
+3VS
+3VS
+3VS
+3VS
+3V
+3VS
+5VS
For HDD IDE Bus
+5VS
+3VS
For CD-ROM IDE Bus
+3VS
C505
1 2
C506
1 2
.1UF
C509
1 2
.1UF
C512
1 2
C514
1 2
C516
1 2
.1UF
.1UF
.1UF
+3V
+3V
+3V
+3V
+5VCD+5VS
+3VS
For AGP Bus
C507
1 2
.1UF
+3V
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
22 47Tuesday, August 21, 2001
E
of
A
B
C
D
E
1 1
JP14
2
M_SEN#24,25,33
CRTGND24,33
G24,33
R24,33 B24,33
CRTGND24,33 HSYNC24,33 VSYNC24,33 DDC_DATA24,33 DDC_CLK24,33
TV_GND24,33
COMPS24,33
TV_GND24,33
2 2
3 3
PME#26,31
VGA_SUS_STAT#6
VGASUSP#25
SUSP30 CLKRUN#8,13,14,27,31 DEV_RST#15,16
PIRQC#13,14,17
PIRQB#13,14,15,31 PIRQA#13,14,15
DAC_CONTR25
AGP_BUSY#
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59
CONT-60P
4 6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60
PID0 13 PID1 13 PID2 13 PID3 13
DDC_MD2 33
+5V
+3V
ENVEE 26 BKOFF# 25 DISPOFF# 32
+12VS +3VS
+5VS
GPAR8
GFRAME#8
GIRDY#8
+3V
Add by Charles at
12
5/3
C534 10UF_10V_1206
+3VS
C365
U30A 74LVC08
GGREQ#13
3
+3VS POWER
14 1
2 7
1 2
.1UF AGP_BUSY# GREQ#
GREQ# 8
GTRDY#8
GDEVSEL#8
GREQ#8 GGNT#8
GSTOP#8
SBSTB8
RBF#8
GC/BE#38
AD_STBB8
GC/BE#28
GREQ#
SBA5 SBA6 SBA4 SBA7
ST1 ST0
ST18
RBF# GAD30
GAD24 GAD29 GC/BE#3 GAD26
GAD31 GAD27 GAD28
GAD23 GAD17 GAD20 GAD16 GC/BE#2 GC/BE#1
GAD18 GAD22 GAD21
GAD[0..31]8
ST[0..2]8
SBA[0..7]8
JP15
79 80 77
78
75
76
73
74
71
72
69
70
67
68
65
66
63
64
61
62 59 60 57 58 55 56 53 54 51 52 49 50 47 48 45 46 43 44 41 42 39 40 37 38 35 36 33 34 31 32 29 30 27 28 25 26 23 24 21 22 19 20 17 18 15 16 13 14 11 12 910 78 56 34 12
CONT-80P
GAD[0..31] ST[0..2] SBA[0..7]
GCLKO SBA3
SBA0 SBA1 SBA2
ST2 GAD1GAD25 GAD4 GAD2 GAD3 GC/BE#0 GAD0
GAD7 GAD5 GAD6
GAD8 GAD13 GAD12 GAD10
GAD15 GAD11 GAD14 GAD9GAD19
PIPE# 8
RTCCLK 13,15,16
14.3M_VGA 10 GCLKO 8
ST0 8 ST2 8
GC/BE#0 8
AD_STBA 8
GC/BE#1 8
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
23 47Tuesday, August 21, 2001
E
of
A
1 1
B
C
D
E
+5VALW
Modify by Charles at 2/25 for monitor sense
2 2
R23,33
G23,33
B23,33
CRTGND23,33
3 3
Add and change value by Charles at 5/3
L8
COMPS23,33
TV_GND23,33
4 4
1 2
FCM1608C-121T
12
R94 75
Modify by Charles at 1/4
R290 75
C531
1 2
27PF
L6
1 2
FCM1608C-121T
C106
330PF
1 2
DAC_GND
12
D45
DAN217
12
R139 75
HSYNC23,33
VSYNC23,33
+12VS
1 2
C105
C371
68PF
330PF
2
1
12
12
12
R142 75
1 2
R146 100K
JP6 RCA JACK
1
2
Add by Charles at 3/27 for EMI testing
1 2
3
M_SEN#
C129 10PF
2N7002
Q14
JOPEN6
2MM
+5VALW
12
S
G
R425 100K
12
2
C125
10PF
D
13
2N7002
CRT Connector
M_SEN# 23,25,33
L9
1 2
FCM2012C-800_0805
L10
1 2
FCM2012C-800_0805
L11
1 2
FCM2012C-800_0805
12
C375
10PF
FCM1608C-121T
D
S
13
G
Q18
2
12
12
R305
10K
BT_WAKE_UP25
BT_USB1_D-28
+3VALW
2
12
C117
10PF
1 2
DAN217
DAN217
1
3
2
12
C119
10PF
L31
0603
10K
BT_DET26
0603
CRTVDD
12
.1UF
C491
L32
12
C389
68PF
1 2
FCM1608C-121T
R164
BT_RST#26
BLUETOOTH CONN.
1
JP20
12 34 56 78 910
13 15 16 171918
AXN420C530P
+5VS
CRTVDD
DAN217
1
2
12
C401
68PF
121411
20
C127 10PF
3
BT_ON# 26 BT_PRE# 25BT_USB1_D+28
TO_USB1_D+ 28 TO_USB1_D- 28
+5VALW
Pin modify by Charles at 3/21 option for bluetooth
3
12
D23
2 1
RB420D
C410 .1UF
DDC_MD2
JOPEN7
1 2
2MM
Add by Charles at 4/19 for EMI
12
C140
100PF
C386 220PF
W=40mils
12
C404 220PF
R297
2.2K
DDCC
12
R334
2.2K
2N7002
Q17
11
12
13
14 10
15
DDCD
D
1 3
2
6 1
7 2
8 3
9 4
5
G
JP11 CRT-15P
18
1 3
S
19
D
G
2
12
12
12
S
Q31 2N7002
R160 100K
CRTVDD
1 2
DDC_DATA 23,33
DDC_CLK 23,33
+12VS
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
Date: Sheet
401138
24 47Tuesday, August 21, 2001
E
of
A
KBA[0..18]26
ADB[0..7]26
SA[0..18]13,27
SD[0..7]13,14,27
KSO[0..15]29
KSI[0..7]29
1 1
12
C480
.1UF
2 2
IRQ113,14
IRQ8#13 IRQ1213,14
EC_HPOWON29
3 3
R410 10K
GATEA2013
RC#13
CRY1
1 2
4 4
12
32.768KHZ
C476
10PF
+5VALW
+5VS
R401
22M
X3
R407 100K
1 2
R414 10K 1 2
EC_HPOWON
+RTCVCC
1 2
R411
10K
D40
1 2
2 1
RB751V
D41
2 1
RB751V
CRY2
KBA[0..18] ADB[0..7] SA[0..18] SD[0..7]
KSO[0..15]
KSI[0..7]
FBM-11-160808-700T
C479
1000PF
RING#28
SMC3,5,20,26,32,33,38 SMD3,5,20,26,32,33,38
ON/OFF13,29,32
12
C478 .1UF
Mode
Device are enabled o reset
Devices are disabled on reset
CRY1 CRY2
SA18
KBA18
CLK_SMB DAT_SMB
G20 RCL#
12
1 2 12
A
12
C477
.1UF
KSI0 KBA0
36 KSI1 KBA1 KSI2 KBA2 KSI3 KBA3 KSI4 KBA4 KSI5 KBA5 KSI6 KBA6 KSI7 KBA7
KSO0 KBA9 KSO1 KBA10 KSO2 KBA11 KSO3 KBA12 KSO4 KBA13 KSO5 KBA14 KSO6 KBA15 KSO7 KBA16 KSO8 KBA17 KSO9 KSO10 ADB0 KSO11 ADB1 KSO12 ADB2 KSO13 ADB3 KSO14 ADB4 KSO15 ADB5
KBSIN0
35
KBSIN1
34
KBSIN2
33
KBSIN3
32
KBSIN4
31
KBSIN5
30
KBSIN6
29
KBSIN7
56
KBSOUT0
55
KBSOUT1
54
KBSOUT2
53
KBSOUT3
52
KBSOUT4
51
KBSOUT5
50
KBSOUT6
49
KBSOUT7
48
KBSOUT8
47
KBSOUT9
42
KBSOUT10
41
KBSOUT11
40
KBSOUT12
39
KBSOUT13
38
KBSOUT14
37
KBSOUT15
156
IRQ1
155
IRQ8#
154
IRQ11
153
IRQ12
79
PFAIL#
165
HPWRON
28
VBAT
G20
RCL#
INVT_PWM32
PCM_SUSP#15
SCROLLED#32
R400
NUMLED#32 CAPSLED#32
51K
EC_ACT#32
C474
33PF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
W=40mils
L40
+5VALW
12
C475 1000PF
242666
109
1602367
108
VCC
VCC
GND
GND
Environment ENV0 ENV1
IRE
IRD
Development
SHBM#(Shared/Non-Shared BIOS Memory)
1
0
HDEN#(Host Device Enable)
32KX1
32KX2
252712
VCC
GND
GND
GND
(P136)
Non Shared Memories
Shared Memories
(P111)
PE0/HA18
PE1/A18
PB0/RING
PB1/SCL
PB2/SDA
13671727374757677786162
SCROLLED# NUMLED# CAPSLED#
EC_ACT#
B
51VCC
12
C494
.1UF
L39
FBM-11-160808-700T
12
C493
SA0
SA1
1000PF
ECAGND
1619192
VCC
AVCC
PB3/TA
PB4/TB
PB5/GA20
166
80
AVREF
PB6/HRSTO
167
HA0
AGND
(P104) (P103)
00
01
PB7/SWIN
PC0
PC1
PC2
PC3/EXINT0
63706958605759
646568
B
HA1
PC4/EXTINT11
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
SA10
SA11
SA12
SA13
SA14
SA15
SA16
168
169
170
171
172
173
174345678910111516171819202122157
HA2
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16/PA3
HRMS#(Host Reset Mode Select)
Mode HRMS#
(P105)
Reset host when shared memory access can not be completed
01
PC6/PSCLK3
PC7/PSDAT3
PC5/EXINT15
Extend access until completed
FXBUSEN#(FX Bus Interface Enable)
Mode FXBUSEN#
FX Bus Interface Enabled
ISA Bus Compatible Mode
HDEN#
1
0
PSCLK1
PSCLK2
PSDAT1
PSDAT2
PD0/AD0
PD1/AD1
81
82838485869394
R419 10K
1 2
+5VALW
TRIS(TRI-STATE)
0
1
PD2/AD2
PD3/AD3
PD4/AD4
SA17
HA17/PA4
PD5/AD5
PD6/AD6
PD7/AD7
BATT_TEMP EXT_DATA EXT_CLK KBD_DATA KBD_CLK PS2_DATA PS2_CLK
SD0
SD1
HD0
HD1
(P130)
DA0
959697
SD2
SD3
SD4
HD2
HD3
HD4
DA1
DA2
DA3
98
LI/NIMH# BT_PRE#
FIR_PRE#
SD5
SD6
HD5
2N7002
SD7
HD6
HD7
PH0/BST0
104
Q49
1 3
PH1/BST1
103
C
2
G
D
S
1 3
Q48 2N7002
162
163
13
158
HIOR#
HMEMCS#/PA0
HMEMRD#/PA1
HMEMWR#/PA2
HAEN/FXASTB#
(P102)
Normally
TriState
PH3/PFS#
PH2/BST2
PH5/ISE#
PH4/PLI#
101
10299100
570SCI# ECSMI#
TRIS ENV1 ENV0
DAC_BRIG 32 DAC_CONTR 23 EN_DFAN 30 TRICKLE 35
LI/NIMH# 35,38 BT_PRE# 24 BT_WAKE_UP 24 FIR_PRE# 28 M_SEN# 23,24,33
BATT_TEMP 38 EXT_DATA 29,33 EXT_CLK 29,33 KBD_DATA 29,33 KBD_CLK 29,33 PS2_DATA 32 PS2_CLK 32
C
D
159
14
HIOW#
HIOCHRDY
2
Add resistor by Charles at 5/3
G
S
2
G
Q47 2N7002
1 3
D
S
2434445468788
NCNCNCNCNCNCNC
1
0
1
0
PG0/SELIO#
NC
NC
134
133
132
131 1
90
89
51ON 29 ACOFF 35
Add by Charles at 2/10
Add by Charles at 2/25
LI/NIMH#
BATT_TEMP
R405 100K
1 2
R472 10K
1 2
A10 A11
A12 A13/BE0 A14/BE1 A15/PG1 A16/PA5 A17/PA6
RD# SEL0# WR0#
PG2/CLK
PG3/SEL1#
PG4/WR1#
PF0/D8
PF1/D9 PF2/D10 PF3/D11 PF4/D12 PF5/D13 PF6/D14 PF7/D15
HMR
NCNCNCNCNC NC
NC
175
176
+12VS +5VS
BIOSCS# 13
MEMR# 13,14
MEMW# 13,14 AEN 13,27
IOR# 13,14,27 IOW# 13,14,27 IOCHRDY 13,14,27
U41
PC87570-176PIN
114
A0
115
A1
116
A2
117
A3
118
A4
119
A5
120
A6
121
A7
KBA8
122
A8
123
A9
124 125 126 127 128 129 130 135
137
138
139
140
141
142
ADB6
143
ADB7
144
HDEN#
111
HRMS#
105 112
SELIO#
110
VGASUSP#_1
107
PCMRST#
106
ATFOUT#
113
1 2
R479 L@10K
145 146 147 148 149
SYSON
150
ACIN
151
BKOFF#
152
1 2
164
13
Q56
2N7002
2
R468 10K
13
Add by Charles at 4/19
C496 .01UF
1 2
C495 .01UF
1 2
ECAGND
D
SYSON
FRD# 26 FSEL# 26 FWR# 26
R469
1 2
100K
2
Q57
2N7002
D
SELIO# 26 PCMRST# 16
+5VALW
SUSA# 10,13 SUSB# 13 SUSC# 13
ACIN 30,38 BKOFF# 23
51RST 29
+5VALW
GATE_RST#
SYSON
1 2
R420 LN_10K
26
E
5 6
U6C
74HCT14
+5VALW POWER
7 14
U5D
13
74LVC125
ECSMI# EXTSMI#
12 11
+3VALW POWER
VGASUSP#_1
ATFOUT#
570SCI#
R479 for 733C R420 for 733
ENV1 KBA15 KBA16 KBA17
1 2
R416 DN_10K
1 2
R488 @10K
+5VS
VGASUSP#_1 EXT_DATA
EXT_CLK
Modify by Charles at 2/16 option for bluetooth and FIR
+5VALW
+5VALW
HDEN# BKOFF# SELIO# G20 CLK_SMB RCL# DAT_SMB
10
9 8 7 6
10
9 8 7 6
+5VALW
RP57
RP56 1 8 2 7 3 6 4 5
RP58
D38
RB751V
D36
RB751V
D35
RB751V
10
9 8 7 6
1 2 3 4 5
10P8R_10K
PCMRST# BT_PRE#
FIR_PRE#
8P4R_10K
1 2 3 4 5
10P8R_10K
SYSON# 30
+3V
21
21
21
RP59
KBD_DATA KBD_CLK PS2_DATA PS2_CLK
EC_ACT#
+5VALW
R66
1 2
R406
10K
1 2
+3VS
1 2
+3V
12
1 2 3 4 5
10P8R_10K
+5VS
LID_SW# 13,26,32
8.2K
R396
10K
R395 10K
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
25 47Tuesday, August 21, 2001
E
+3V
EXTSMI# 13
VGASUSP# 23
ATF_INT# 13
SCI# 13
HRMS# ECSMI# KBA18 ENV0
of
A
INPUT
+5VALW
+5VALW
12
R487
U45B 74HCT32
+5VALW POWER
+5VCD
12
R350 @100K
DJ_ON/OFF# VOL_UP# VOL_DW#
6
U34
NC A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS
29F040
@100K
CC
6
+5VALW +5VALW
12
R408 100K
DD
11
VCC
WE*
A17 A14 A13
A8
A9 A11 OE* A10 CE*
DQ7 DQ6 DQ5 DQ4 DQ3
Add by Charles at
1 1
2 2
3 3
4 4
12/1
PLAYBTN#20,32
AUTO_GAIN_CONTROL17
STOPBTN#20,32
SELIO#25
Delete by Charles at 5/21
DOT_PRES#32
CDLED#21,32
CONA#33 PHDD#21
LID_SW#13,25,32
PME#23,31
LCD_MODE#32
TPAD_ON/OFF#32
KBA5 SELIO#
A
REVBTN#20,32 FRDBTN#20,32
ENVEE23
KBA2 SELIO#
USER_BTN1#32 USER_BTN2#32 USER_BTN3#32
USER_BTN4#32 SUSPBTN#32,33 DJ_ON/OFF#32 VOL_UP#32 VOL_DW#32
.1UF
ATF#3
KBA1
SELIO#
C498
12
KBA18 KBA16 KBA15 KBA12 KBA7 KBA6 KBA5 KBA4 KBA3 KBA2 KBA1 KBA0 ADB0 ADB1 ADB2
14 12
13
+5VALW
14
4 5
7
CONA# COVER#
PME_51#
+5VALW
7
PLAYBTN#
REVBTN# FRDBTN#
STOPBTN#
+5VALW
14
4 5
7
U45D
74HCT32
+5VALW POWER
U46B 74HCT32
+5VALW POWER
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16
B
12
R409
@100K
12
R339
100K
4.7UF_10V_0805 C438
+5VALW
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
+5VALW
20
2 18
1A1 1Y1
4 16
1A2 1Y2
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
+5VALW
1 2
20
2 18
1A1 1Y1
4 16
1A2 1Y2
VCC
6 14
1A3 1Y3
8 12
1A4 1Y4
11 9
2A1 2Y1
13 7
2A2 2Y2
15 5
2A3 2Y3
17 3
2A4 2Y4
1
1G
19
2G
10
C437
12
+
1 2
.1UF
32
FWE#
31
KBA17
30
KBA14
29
KBA13
28
KBA8
27
KBA9
26
KBA11
25 24
KBA10
23 22
ADB7
21
ADB6
20
ADB5
19
ADB4
18
ADB3
17
B
20
VCC
GND
10
U43
VCC
GND
10
C483
.1UF
U38
GND
74HCT244
+5VALW
C
C487
1 2
.1UF
U44
ADB0 ADB1
ADB1 ADB2
ADB2 ADB3 MMO_ON ADB3 ADB4 ADB5 ADB6 ADB7
74HCT244
C486
.1UF
1 2
74HCT244
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
8
U46C 74HCT32
+5VALW POWER
FRD# 25 FSEL# 25
ADB0
ADB1
ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
+5VALW
MMO_ON
VLBA#
PX4_RIA# SUSP#
PLAYBTN# REVBTN# DJ_ON/OFF# FRDBTN#
+5VALW
Add by Charles at 2/10
+5VALW
12
R418 100K
14 9
10 7
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
1 3
D
FWR# 25
R404
1 2
2
G
Q46 2N7002
S
+3V
100K
RP55
1 2 3 4 5
10P8R_10K
R421
1 2
D43
RB751V D39
@RB751V
R474
1 2
D37
RB751V
FLASH# 13
ADB[0..7]25
KBA[0..18]25
10K
21
21
Add resistor by Charles at 5/3
0
21
+5VALW
10 9
VOL_UP#
8
VOL_DW#STOPBTN#
7
CONA#
6
+12VS
C
ADB[0..7] KBA[0..18]
+5VALW
C497
1 2
.1UF KBA3 SELIO#
VR_ON 6,36,37
VLB# 13
GATE_RST#
PIIX4_RI# 13,14 SUSP# 28,30,34
14
+5VALW
13
KBA4 SELIO# LARST#
KBA6 SELIO#
C481
1 2
.1UF
SMC3,5,20,25,32,33,38 SMD3,5,20,25,32,33,38
1 2
7
+5VALW POWER
+5VALW
14
9
10
7
+5VALW
14
1 2
7
+5VALW
12
U45A
74HCT32
R403
1 2
20K
U45C 74HCT32
+5VALW POWER
U46A 74HCT32
+5VALW POWER
U36
8
VCC
7
WC
6
SCL
5
SDA
R397 1K
D
OUTPUT
+5VALW
3
8
NM24C16
ADB0
ADB4 ADB5 ADB6 ADB7
AA
1UF_25V_0805
3
GND
3
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
1 2 3 4
D
CLK
1
CLR
3
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CLK
1
CLR
3
4 5
D1 Q1
7 6
D2 Q2
8 9
D3 Q3
13 12
D4 Q4
14 15
D5 Q5
17 16
D6 Q6
18 19
D7 Q7
11
CLK
1
CLR
+5VALW
12
R399 1K
12
R398 1K
LARST#
C482
1 2
ADB0 ADB1 ADB2 PX4_RIA# ADB3 ADB4 ADB5 ADB6 ADB7
BB
ADB0 ADB1 ADB2 ADB3 ADB4 ADB5 ADB6 ADB7
LARST#
A0 A1 A2
E
C473
.1UF
1 2
20
U42
Q0
VCC
GND
10
+5VALW
20
VCC
10
+5VALW
20
2
74HCT273
1 2
U39
Q0
GND
74HCT273
U40
Q0
VCC
GND
10
C485
.1UF
2
C484
1 2
.1UF
2
74HCT273
VLBA#
ON/OFF_EC# BT_RST# 24 BT_DET 24
FSTCHG 35 BT_ON# 24 EN_WOL# 31 PULSEBTN 29
EC_LID_SW# 13 EC_MUTE 19
CD_PLAY 20
CD_PLAY_ON# 20,32 BEEP# 19
Change by Charles at 3/1
TPAD_LED# 32 BACKLED# 32 DIS_ADJVOL 19 ADJVOL_UP/DW# 19 DOT_CLK 32 DOT_DATA 32 DOT_CS# 32 DOT_A0 32
Add by Charles at
24
4/20 that reserved for S/W
Compal Electronics, inc.
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M/B LA-733
B
401138
E
26 47Tuesday, August 21, 2001
of
A
B
C
D
E
SUPER I/O 37N869
R205
SD[0..7] SA[0..15]
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7
SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10
DRQ313,14
DRQ213,14
DACK#313 DACK#213
SIRQ13,14,15
CLKRUN#8,13,14,23,31
10
TRACK0#32
DSKCHG#32
RSTDRV13,21
IOCHRDY13,14,25
AEN13,25
TC13
IOR#13,14,25
IOW#13,14,25
DRQ013,14
+5VS
3MODE#32
INDEX#32
MTR0#32 DRV0#32
FDDIR#32
STEP#32 WDATA#32 WGATE#32
WP#32 RDATA#32 HDSEL#32
DRQ113,14
INDEX# MTR0#
DRV0# FDDIR#
STEP# WDATA# WGATE# TRACK0# WP# RDATA# HDSEL# DSKCHG#
SA11 SA12
CLKRUN#
R201
1 2
10K
DRQ2
SA14 SA13
U15
46
47
48
49
51
52
53
54
26
A0
27
A1
28
A2
29
A3
30
A4
31
A5
32
A6
39
A7
40
A8
41
A9
95
A10
97
PDRQ(DRQ_C)
50
FDRQ(DRQ_B)
94
PDACK#(DACK_C#)
34
FDACK#(DACK_B#)
35
A11
36
A12
37
SIRQ
92
CLKRUN#
38
CLK33
55
RESET
98
IOCHRDY
44
AEN
33
TC
42
IOR#
43
IOW#
18
CLK14
19
DRQ_A
99
DRVDEN0
10
INDEX#
100
MTR0#
3
A14
2
DS0#
1
A13
5
DIR#
6
STEP#
7
WDATA#
8
WGATE#
11
TRK0#
12
WRTPRT#
14
RDATA#
9
HDSEL#
15
DSKCHG#
17
DRQ_D
16
DRVDEN1
FDC37N869
STROBE# AUTOFD#
ERROR#
INIT#
SLCTIN#
ACK# BUSY
SLCT
IRQIN
VCC VCC
DTR2#
CTS2# RTS2#
DSR2#
TXD2/IRTX
RXD2/IRRX
DCD2#
RI2#
DTR1#
CTS1# RTS1#
DSR1#
TXD1 RXD1
DCD1#
RI1#
IRMODE
DACK_D#
IRRX2 IRTX2
DACK_A#
PWRGD/GAMECS#
PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7
VSS VSS VSS VSS
A15
75 74 73 72 71 60 59 58
PE
57
LPD0
69
LPD1
68
LPD2
67
LPD3
66
LPD4
64
LPD5
63
LPD6
62
LPD7
61
R202 10K 1 2
+3VS 96 13 70
C181
4.7UF_10V_0805
4 45 65 93
91
CTS#2
90 89
DSR#2
88 87 86
DCD#2
85
RI#2
84
81 80 79 78 77 76 83 82
IRMODE
21
DACK#1
22
IRRX
23
IRTX
24
SA15
25 20 56
R204 @820 1 2
R203 47K 1 2
R206 1K
1 2
DTRA# 28 CTSA# 28 RTSA# 28 DSRA# 28 TXDA 28 RXDA 28 DCDA# 28 RIA# 28
IRMODE 28 DACK#1 13 IRRX 28 IRTX 28
DACK#0 13
12
LPTSTB# 28,33 LPTAFD# 28,33 LPTERR# 28,33 LPTINIT# 28,33 LPTSLCTIN# 28,33 LPTACK# 28,33 LPTBUSY 28,33 LPTPE 28,33 LPTSLCT 28,33
LPD[0..7]
12
C175 .1UF
Selecting 3F0 HEX
+3VS
Change by Charles at 2/10
1 2
C182 .1UF
12
C180 .1UF
Selecting 370 HEX
R209
1K
LPD[0..7] 28,33
+3VS
PCLK_SIO10
Change value by Charles at 2/10
R199
1 2
33
SD[0..7]13,14,25
SA[0..15]13,25
C176 15PF
4 4
+3VS
RP21 1 8 2 7 3 6 4 5
3 3
Place closely to
2 2
1 1
super I/O
CTS#2 DSR#2 DCD#2 RI#2
8P4R-4.7K
14.3M_SIO10
C174
1 2
22PF
Change by Charles at 1/4
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
27 47Tuesday, August 21, 2001
E
of
A
SERIAL / PARALLEL PORT
FIR_PRE#25
FIR / USB CONNECTOR
1 1
+5VS FOR INCREASING LED'S LIGHT AND THE COMMUNICATION DISTANCE
FIR Module
1 2
JOPEN11
2MM
12
C115
10UF_10V_1206
C111,C525,C556 MUST PLACE AS
2 2
3 3
4 4
CLOSE TO IR AS POSSIBLE
Q60 SI2306DS
W=80mils
S
+5VS
G
R478 100K
+12VS
Modify by Charles for USB leakage at 5/21
+5VS_USB
OVCUR#013,33
12
+
D
W=40mils
13
POLYSWITCH_0.75A
2
OVCUR#1
13,33
1 2
F2
POLYSWITCH_0.75A
C556 22U_10V_1206
W=40mils W=40mils
12
1 2
JOPEN10
2MM
+3VS
T = 20milT = 20mil
C525
C111
100PF
.1UF
F1
C81 1000PF
C391
1000PF
12
USB_VCCB
W=40mils
12
R76 470K
12
R73 560K
FBM-11-451616-800T
L5
1 2
4516
12
R63
470K
12
R70
560K
Modify by Charles at 2/16 option for bluetooth
TO_USB1_D-24 TO_USB1_D+24
USB1_D-_1
USB1_D+_1 USBP1_D-33 USBP1_D+33
12
C342
.1UF
The component's most place cloely PIIX4.
USBP1+13 USBP1-13 USBP0+13 USBP0-13
A
182736
2
LED_C
4
RXD
6
VCC
8
GND
TFDU6101E
FBM-11-451616-800T
L24
1 2
R316 @0
1 2
R323 @0
1 2
R317 0
1 2
R324 0
1 2
USB_ASB
+
C88
150UF_10V_E
RP6
45
8P4R_33 CP5 8P4C_33PF
+5VS
18 27 36 45
B
Change by Charles at 5/20
R102
1 2
@10K R98
1 2
10K
Change by Charles at 12/12 to met FIR specification
R446
5.6_1206
T = 20mil
1
LED_A
TXD
MODE
SD
T = 12mil
3
T = 12mil
5
T = 12mil
7
USB_ASAUSB_VCCA
W=40mils
12
USBP1_D­USBP1_D+
L22
1 2
FBM-11-451616-800T
C297
1 2
.1UF
USB0_D­USB0_D+
USB1_D+ USB1_D-_1 USB1_D­USB0_D+ USB0_D-
182736
45
B
+
C314 .1UF
1 2 1 2
FBM-11-451616-800T
RP5 8P4R_15K
C86
150UF_10V_E
L21
FCM2012C-800T06
1 2 1 2
L23
FCM2012C-800T06
L25
FCM2012C-800T06
L26
FCM2012C-800T06
L4
Modify by Charles at 2/16 option for bluetooth
R326 @0
1 2
R319 @0
1 2
R325 0
1 2
R318 0
1 2
+5VALW
IRTXOUT IRMODE IRRX
12
USB0_D+ 33 USB0_D- 33
C
SERIAL
+3VALW
12
R365
PCM_RI#15
RING#25
IRTX 27 IRMODE 27 IRRX 27
from cardbus
U37D
74HCT125
+5VALW POWER
PCM_RI#
7
13
2N7002
D31
RB751V
1211 14
Q35
100K
21
13
D
2
G
S
Resistor Location
Bluetooth
NO Bluetooth
JP2
1
VCC
2
D0-
3
D0+
4
VSS
9
G1
12
C51
.1UF
USB1_D+_1
5 6 7 8 13
BT_USB1_D+ 24 BT_USB1_D- 24
10
VCC
G2
11
D1-
G3
12
D1+
G4
VSS G5
Molex-67300
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
R316, R323, R326, R319
R317, R324, R325, R318
LPTINIT#27,33
LPTSLCTIN#27,33
LPTSLCTIN#_1 LPTERR#
AFD#/3M#
+5V_PRN
Guide Pins
+5V_PRN
C
R198 33
1 2
R192 33
1 2
RP23
1 2 3 4 5
10P8R_2.7K
RP20
FD0
1
FD1
2
FD2
3
FD3
4 5
10P8R_2.7K
10 11 12 13 14 15 16
RP22
16P8R_68
LPD3 LPD2 LPD1 LPD0 LPD7 FD7 LPD6 LPD5 LPD4
DTRA#27 RTSA#27
TXDA27
CTSA#27
RXDA27 DCDA#27 DSRA#27
SUSP#26,30,34
RIA#27
FD3
89
FD2
7
FD1
6
FD0
5 4
FD6
3
FD5
2
FD4
1
C183
1 2
.1UF
1 2
C188
.47UF_16V_0805
LPTINIT#_1
LPTSLCTIN#_1
+5V_PRN
10
LPTACK#LPTINIT#_1
9
LPTBUSY
8
LPTPE
7
LPTSLCT
6
+5V_PRN
10 9 8 7 6
28
24
1
2 14 13 12 19
RIA# RI1#
18 17 16 15
RIA0
20
SUSP#
23 22
LPTSTB#27,33
FD7 FD6 FD5 FD4
12
C184 .1UF
C1+
C1­C2+
C2­TIN1 TIN2 TIN3 ROUT1 ROUT2 ROUT3 ROUT4 ROUT5 ROUTB2
FORCEON FORCEOFF#
U16 MAX3243
+5VS
D
+5VALW
26
LPD[0..7]27,33
LPTAFD#27,33
LPTERR#27,33
LPTACK#27,33
LPTBUSY27,33
LPTPE27,33
LPTSLCT27,33
D
VCC
TOUT1 TOUT2 TOUT3
RIN1 RIN2 RIN3 RIN4 RIN5
INVLD#
GND
3
V-
9 10 11 4 5 6 7 8
21 25
27
V+
PARALLEL
D32
2 1
RB420D
LPTSTB#
1 2 AFD#/3M# R188 33
1 2
FD0 LPTERR# FD1 LPTINIT#_1 FD2 LPTSLCTIN#_1 FD3
FD4 FD5 FD6 FD7 LPTACK# LPTBUSY LPTPE LPTSLCT
E
(1)
.47UF_16V_0805
1 2
1 2
C433
.47UF_16V_0805
DTR1# RTS1# TXD1 CTS1#
RXD1 DCD1# DSR1#
LPD[0..7]
+5V_PRN
w=10mils
R343 33
DCD1# DSR1# RXD1 RTS1# TXD1 CTS1# DTR1# RI1#
C185
DTR1# 33 RTS1# 33 TXD1 33 CTS1# 33 RI1# 33 RXD1 33 DCD1# 33 DSR1# 33
RI1# DTR1# CTS1# TXD1
RTS1# RXD1 DSR1# DCD1#
12
R344
2.7K
JP17 LPTCN-25
w=10mils
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
28
29
C431
4.7UF_10V_0805
AFD#/3M# LPTERR# LPTINIT#_1 LPTSLCTIN#_1
LPTACK# LPTBUSY LPTPE LPTSLCT
8P4C_220PF 1 8 2 7 3 6 4 5
1 8 2 7 3 6 4 5
FD0 FD1 FD2 FD3
FD4 FD5 FD6 FD7
1
(6)
6
(2)
2
(7)
7
(3)
3
(8)
8
(4)
4
(9)
9
(5)
5
CP6
8P4C_220PF
CP7
+5V_PRN
12
1 8 2 7 3 6 4 5
8P4C_220PF
1 8 2 7 3 6 4 5
CP2
1 8 2 7 3 6 4 5
CP3
1 8 2 7 3 6 4 5
CP1
CP4
8P4C_220PF
8P4C_220PF
8P4C_220PF
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
E
JP18 COM-DB9
12
13
12
C426 .1UF
28 47Tuesday, August 21, 2001
of
A
B
C
D
E
+3V
12
R254
R253
1 2
1 1
2 2
330K
Change by Charles at 2/10
47K
12
C47 .1UF
+3VS
12
12
R283 113K
R284 100K
714
9 8
U26D 74LVC14
+3VALW POWER +3VALW POWER
G_VR_POK6
12
12
C359
C101
.01UF
.1UF
714
11 10
Add by charles at 2/10
R274
1 2
330K
1 2
5 3
U26E 74LVC14
+5V
C102
.1UF
MR# PFI
12
12
RSMRST#
R212 47K
C308 .1UF
+3VS
12
13 12
RST#
VCCGND
PFO#
MAX6342
714
U26F 74LVC14
+3VALW POWER
6
4
RSMRST# 8,13
10
9 8
+3VALW POWER
+5VALW
1
14
2 3
7 U5C 74LVC125
SPWROFF#
U37A 74HCT125
+5ALWV POWER
12
R74 10K
EC_HPOWON 25
SPWROFF# 13
INT_KBD CONN.
KSI1 KSI6 KSI4 KSO0 KSI3 KSO1 KSO2 KSO7 KSO6 KSO12 KSO14 KSO10
KSO[0..15]25
KSI[0..7]25
JP1
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
INT_KB_CONN.
2 4 6
8 10 12 14 16 18 20 22 24
KSO[0..15]
KSI[0..7]
CP8
KSI1
1 8
KSI7
2 7
KSI7
2
KSO9
4
KSI5
6
KSI2
8
KSO5
10
KSI0
12
KSO4
14
KSO8
16
KSO3
18
KSO13
20
KSO11
22
KSO15
24
KSI6
3 6
KSI5
4 5
8P4C_33PF
CP9
KSO9
1 8
KSO0
2 7
KSO1
3 6
KSO5
4 5
8P4C_33PF
CP10
KSI4
1 8
KSI2
2 7
KSI3
3 6
KSI0
4 5
8P4C_33PF
CP11
KSO2
1 8
KSO4
2 7
KSO7
3 6
KSO8
4 5
8P4C_33PF
CP12
KSO6
1 8
KSO3
2 7
KSO12
3 6
KSO13
4 5
8P4C_33PF
CP13
KSO14
1 8
KSO11
2 7
KSO10
3 6
KSO15
4 5
8P4C_33PF
Add by Charles at 2/22 for EMI
R91
1 2
2.2M
Change by
3 3
+5VALW
12
R415
D44
+5VALW
12
1 2
13
D
S
R417
4.7K
R422 33K
2
G
@2N7002
Q51
3
DAN202U
2
DTC124EK
ON/OFFBTN#33
PULSEBTN26
4 4
Change by Charles at 5/21 for notebook can't keep power when dock SPR and unplug AC-IN.
13
D
2
G
S
Q52 2N7002
51ON25
A
100K 1 2
13
Q53
C
22K
B
E
22K
Charles at 2/25
ON/OFF 13,25,32 51ON# 32,35
12
C492
1000PF
WHEN R=0,Vbe=1.35V WHEN R=33K,Vbe=0.8V
B
12
2 1
D42
RLZ20A
SW1
1 2 3 4
RESET BTN
L38
EXT_CLK25,33
Reset Button
+5VALW
D12
1N4148
R228
1 2
0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
10K
2 1
2
10K
C233
12
1UF_25V_0805
1 2
R224
4.7K
C
+5VS
31
Q24 DTA114EK
51RST
F3
POLYSWITCH_1.1A
51RST 25
EXT_DATA25,33
W=40mils W=40mils
1 2
L34
FBM-11-451616-800T
4516
KBD_DATA25,33 KBD_CLK25,33
1 2
FCM1608C-121T
1 2
L37
FCM1608C-121T
KB_ASKB_VCC
12
C215
1000PF
L36
1 2
FCM1608C-121T
1 2
L35
FCM1608C-121T
0603
D
12
PS2 CONN.
3
1
2
12
C220
4.7UF_10V_0805
220PF
1
2
3
Q45 @SMO5
C214
Q23 @SMO5
12
C218 220PF
12
C217 220PF
JP19
KBD/PS2_6
4 2
8
1
7 563
C216 220PF
12
C219 220PF
8 7
12
Compal Electronics, inc.
Title
Size Document Number Rev
Date: Sheet
SCHEMATIC, M/B LA-733
B
401138
29 47Tuesday, August 21, 2001
E
of
A
Q36 2N7002
+3V
1
S
2
S
3
S G
2
SYSON_ALW
4
12
R371 33
G
C436
.1UF_25V_0805
Q38
13
D
2N7002
S
R371 change to be 33 ohm by Peter Liu at 4/5
13
D
S
R381
1 2
100K
2
G
Change by Charles at 1/4
+12VALW
SYSON#
+3VALW
U20
8
D
7
D
6
D
5
D
12
SI4800
C202
4.7UF_10V_0805
1 1
SYSON#25
SYSON#
+3VALW TO +3V Transfer
+3VALW
U17
8
D
7
D
6
D
5
D
12
C195
4.7UF_10V_0805
2 2
3 3
SI4800
SUSP SUSP
+3VALW TO +3VS Transfer
C179
1 2
.1UF_25V_0805
R208
1 2
100K
Q39 2N7002
SUSP#
S S S G
R373 33
2
G
+12VALW
4 6 5
1 2 3 4
Q20 SI3861
S
+3VS
12
13
D
S
+12VALW
G
1 12
+5VS_GATE
12
.1UF_25V_0805
12
C177
1UF_25V_0805
D
2 3
R200 51K
C434
12
100K
1 2
R372
13
D
2
G
2N7002
S
+12VS
C178
1UF_25V_0805
+12VALW
Q37
Change by Charles at 1/4
+12VALW TO +12VS Transfer
Change by Charles at 1/4
C201
+5VS
12
+5VS
12
4.7UF_10V_0805
C208 1UF
+5VALW
U19
D D D D
SI4800
Q22 2N7002
1
S
2
S
3
S
+5VS_GATE SYSON_ALW
4
G
R211 33
13
D
2
G
S
8 7 6 5
12
C199
4.7UF_10V_0805
4 4
SUSP SYSON#
12
C209 1UF
12
C192 1UF
+3VALW
12
C196 1UF
12
C204 1UF
B
12
+
4.7UF_10V_0805
12
+
4.7UF_10V_0805
+3VS
12
C186
4.7UF_10V_0805
12
+
4.7UF_10V_0805
C200
C206
C187
+3VALW
12
C198 1UF
12
C203
+
4.7UF_10V_0805
+3V
12
C205
4.7UF_10V_0805
12
C189
+
4.7UF_10V_0805
C
ACIN25,38
EN_DFAN25
+5VS
U18
D D D D
SI4800
Q21 2N7002
SYSON_ALW15
1
S
2
S
3
S
4
G
R210 33
13
2
G
+5V
D
S
12
C194 1UF
+5VALW +5V
8 7 6 5
12
C190
4.7UF_10V_0805
R56
1M
R61 100K
12
C191
4.7UF_10V_0805
+3VS
12
R402
4.7K
ACIN_SYS# 13
13
D
2
Q50
G
2N7002
S
SUSP SUSP#
2
G
RESET & SUSPEND CKT
R52
1 2
@0
Reserved resistor by Charles at 5/3
R252
3M
-
6
+
5
8 4 R60 100K
@10UF_10V_1206
Reserved resistor by
Charles at 5/3
12
C197 1UF
C45
1 2
R263
1UF
10M
C274
10UF_10V_1206
7
U4B LMC6482IM
C542
R475 @0
12
+
C193
4.7UF_10V_0805
+12VS
12
R261
3.48K_1% 1 2
21
2
12
D
+12VS
12
13
D
S
FMMT619
D17
1N4148
Q29
3
2SA1036K
1
R207
Q8
1 2
1K
Q19 2N7002
FAN-1 Connector
2
2 1
+RTCVCC
W=30mils
J1
SUSP#26,28,34
+5VS
1
3
1SS355
2 1
JP3
1
12
2
FAN_CON_2P
BATT1
-+
RTCBATT
D34
21
RB751V
Q40
31
CBE
2SA1037K
2
1 2
R389
C470 .1UF
Q41
2SC2412K
R392
1 2
100
10K
1 3
12
2
1 2
W=30milsW=30mils
1 2
12
R390
33K
12
10K
C471
.1UF
R387
0_0805
R388
E
9 8
U6D
74HCT14
+5VALW POWER
7 14
RTCVREF
12
D33
21
W=30mils
RB751V
+3V
RTC BATT CONNECTOR
W=30mils
R386
200_0805
SUSP 23
+5VALW TO +5VS Transfer
A
+5V TO +5VS Transfer
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, inc.
SCHEMATIC, M/B LA-733
B
401138
30 47Friday, August 31, 2001
E
of
A
1 1
VID4<4>
VID3<4> VID2<4> VID1<4>
VID0<4>
VR_ON<22,2 6>
+5VALWP
2 2
V_GATE<15>
PC167
1UF_0805_25V
PC168
220PF
PC169
0.22UF_0805_16V
12
PR215
215K_1%
0
1 2
PR214
B
12
PU12
MAX1711
10K_1%
1 2
1 2
SKIP
LX
DH
BST
PGND
VCC
FBS
PR217
SUSP#<22,24,26,33 >
16
17
18
19
20
2
SHDN
12
PGOOD
15
VDD
5
CC
9
REF
6 11
ILIM GNDS
10 8
GND TON
PR216 1M_1%
PR212
0
21 23 24 22 14 13 1 7 3 4
VCCORE
12
LXCORE
DHCORE
BSTCORE
DLCORE
PR213 100K
BSTCORE1
2.2
PR223
1 2
PR226 2.2
Add the rsistor for EMI at 2/6
PR219
20
PC171
PR218
0
0.22UF_0805_16V
C
+5VALWP
21
12
12
PD42
PC170
12
578
RB751V
0.1UF_0805_25V
578
3 6
+5VALWP
3 6
241
241
PQ109 IRF7811A
PQ111 @SI4404DY @FDS7764A
PC172
2200PF
D
MB+
Add those capacitor for EMI at 2/6
578
3 6
241
578
3 6
PQ110 IRF7811A
241
12
PC188
0.1UF_0805_25V
PQ112 SI4404DY FDS7764A
12
PC185
PC184
0.1UF_0805_25V
578
3 6
241
12
0.1UF_0805_25V
PQ113 SI4404DY FDS7764A
12
PC186
PC187
0.1UF_0805_25V
12
FBCORE
12
12
PC176
4.7UF_1210_25V
0.1UF_0805_25V
PL7 @1UH
1 2
PL8
0.7UH/22A_LPI 1 2
PD43
EC31QS04
12
PC177
PC178
4.7UF_1210_25V
12
PC179
4.7UF_1210_25V
4.7UF_1210_25V
0.002_2512_1% 12
PR221
PR220
0
12
220PF
PC183
E
PL6
FBM-L11-322513-201LMAT
12
12
PC180
0.1UF_0805_25V
12
@0
PR225
PD44
EC10QS04
1 2
12
B+
CPU_COREP
12
+
PC173
220UF_D_4V
12
+
PC174
220UF_D_4V
3 3
4
3
PU14
S-816A25
VIN
ON/OFF#
PQ114
2SB1132
SOT-89
3 2
1 1
EXT
VSS
2
VOUT
+3VALWP
PC181
22UF_1206_1 0V
4 4
VR_ON<22,24,26,33>
A
1 2
0
PR224
+2.5VP
+
PC182 22UF_B_6.3V
5
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
401138
Tuesday, August 21, 2001
Date: Sheet of
E
4736
A
Change value by
12
Charles at 5/17
Q27 SI2304DS
D
S
1 3
G
2
1 2
13
D
Q25
2
G
S
R236
100K
2N7002
+3VAUX
12
C97
1UF_25V_0805
+12VALW
GND
+3VALW
C252
1UF_25V_0805
1 1
EN_WOL#26
IDSEL : AD27
TIP RING
2 2
Add by Charles at 12/1
12
R264
10
12
C283
3 3
4 4
15PF
Change by Charles at 2/25
MD_BITCLK
12
R424
10
12
C501
15PF
S_AD[0..31]15,17
S_C/BE#[0..3]15,17
AD[0..31]8,13
C/BE#[0..3]8,13
Add by Charles at 3/27
PIRQD#13,14
+3VS
REQ#08 GNT#0 8
PCLK_MINI10
REQ#18
S_AD26
1 2
MD_SYNC17 MD_SDATAI17 MD_BITCLK17
MOD_SPK
MOD_MIC17
S_AD[0..31] S_C/BE#[0..3] AD[0..31] C/BE#[0..3]
A
LED1_GRNP LED1_GRNN R449 10
PIRQD#
1 2
W=40mils
REQ#0 GNT#0
R483
1 2
10
PCLK_MINI
R451 10
REQ#1
1 2
S_AD31 S_AD29
S_AD27
R485
S_AD25 S_C/BE#3
S_AD23
100
S_AD21 S_AD19
S_AD17 S_C/BE#2 S_AD16 S_IRDY#
S_CLKRUN# S_SERR#
S_PERR# S_C/BE#1 S_AD14
S_AD12 S_AD10
S_AD8 S_AD7
S_AD5 S_AD3
+5VS
W=30mils
S_AD1
MD_BITCLK
1 2
R90
0
W=30mils W=40mils
+5VS
B
the channel width 50 mils
MINI_GNDAAUDIO
JP25
KEY KEY
3 4
34
5 6
56
7 8
78
9 10
910
11 12
11 12
13 14
13 14
15 16
15 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26
27 28
27 28
29 30
29 30
31 32
31 32
33 34
33 34
35 36
35 36
37 38
37 38
39 40
39 40
41 42
41 42
43 44
43 44
45 46
45 46
47 48
47 48
49 50
49 50
51 52
51 52
53 54
53 54
55 56
55 56
57 58
57 58
59 60
59 60
61 62
61 62
63 64
63 64
65 66
65 66
67 68
67 68
69 70
69 70
71 72
71 72
73 74
73 74
75 76
75 76
77 78
77 78
79 80
79 80
81 82
81 82
83 84
83 84
85 86
85 86
87 88
87 88
89 90
89 90
91 92
91 92
93 94
93 94
95 96
95 96
97 98
97 98
99 100
99 100
101 102
101 102
103 104
103 104
105 106
105 106
107 108
107 108
109 110
109 110
111 112
111 112
113 114
113 114
115 116
115 116
117 118
117 118
119 120
119 120
121 122
121 122
123 124
123 124
127 128
127 128
Mini-PCI SLOT
B
W=40mils
LAN_TX+33 LAN_TX-33
LAN_RX+33 LAN_RX-33
LAN RESERVEDLAN RESERVED
LED2_YELP LED2_YELN
1 2 1 2
1 2
1 2
AC_SDATAO
W=30mils
R450 10 R484 10 S_PCIRST#
W=40mils
R452 10
S_PME# R486 10 S_AD30
S_AD28PCLK_MINI S_AD26 S_AD24
MINI_IDSEL
S_AD22 S_AD20 S_PAR S_AD18
S_FRAME# S_TRDY# S_STOP#
S_DEVSEL# S_AD15
S_AD13 S_AD11
S_AD9 S_C/BE#0
S_AD6 S_AD4 S_AD2 S_AD0
AC_RST#AC_CLK24
MOD_SPK
+3VAUX
1 2 3 4 5 6
MOD_RING MOD_TIP
JP21
1 2 3 4 5 6
HEADER 6
TX+ TX-
RX+ RX-
12
C529 1000PF_1206_2KV
Add by Charles at 4/19 for EMI
C
JP22
1 2
12
C528
HEADER 2
1000PF_1206_2KV
12
C90 1000PF
MOD_RING
VH1
DSSA-P3100SB
MOD_TIP
12
C49 .1UF
12
C99 .1UF
12
12
12
C96
+
4.7UF_10V_0805
+5VS
D
TX+ TX­RX+
R413
75
RX-
R412
75
12
C488
1000PF_2KV_1206
1 2 3 4 5 6 7 8
9 10 11 12
+3VS
+5VS
PIRQB#
+3VAUX
GNT#1
Add by Charles at 3/27
R65
1 2
100
MD_SDATAO 17
1 2
R462 @0
1 2
R463 0
+3VS
13,14,15,23
PIRQB#
GNT#1 8
Add by Charles at 12/1
S_AD27
MD_RST# 17
S_PCIRST#
MOD_SPK 17
Add R462,R463 by Peter Liu 3/30
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
12
C55 1000PF
12
C52 1000PF
12
C82
+
4.7UF_10V_0805
12
C95 .1UF
AD15 AD13 AD11 AD9 AD6 AD4 AD2 AD0
AD30
8 9
AD28
7
AD26
6
AD24
5
AD22
4
AD20
3
AD18
2
AD16
1
12
C78 .1UF
12
C54 .1UF
RP66
16P8R-33
12
C87 .1UF
RP63
8 9 7 6 5 4 3 2 1
16P8R-33
S_AD30 S_AD28
10
S_AD26
11
S_AD24
12
S_AD22
13
S_AD20
14
S_AD18
15
S_AD16
16
12
+
4.7UF_10V_0805
+3VAUX
12
C250
+
4.7UF_10V_0805
S_AD15 S_AD13
10
S_AD11
11
S_AD9
12
S_AD6
13
S_AD4
14
S_AD2
15
S_AD0
16
C46
CLKRUN#8,13,14,23,27
C/BE#08,13
D
E
JP23
TX+ TX­RX+ N/C N/C RX­N/C N/C
N/C RING TIP N/C
RJ-45 & RJ-11
IRDY#8,13,14
SERR#8,13,14
PERR#14
C/BE#18,13
C/BE#28,13
C/BE#38,13
PAR8,13,14
FRAME#8,13,14
TRDY#8,13,14
STOP#8,13,14
DEVSEL#8,13,14
CATHODE1
CATHODE2
13
GND
LED1_GRNN
15
LED1_GRNP
16
ANODE1
LED2_YELN
17
LED2_YELP
18
ANODE2
14
GND
RP60
1 2 3
AD31
4
AD29
5
AD27
6
AD25
7
AD23
8 9
16P8R-33
RP61
8 9
CLKRUN#
7 6 5
AD1
4
AD3
3
AD5
2
AD7
1
16P8R-33
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9
1 2
R453 33
1 2
R454 33
RP62
16P8R-33
RP64
16P8R-33
AD21 AD19 AD17 S_AD17
AD14 AD12 AD10 AD8
PAR FRAME# TRDY# STOP# DEVSEL# C/BE#0 S_C/BE#0
PCIRST#S_PCIRST# PME#S_PME#
16 15 14
S_AD31
13
S_AD29
12
S_AD27
11
S_AD25
10
S_AD23
S_IRDY# S_CLKRUN#
10
S_SERR#
11
S_PERR#
12
S_AD1
13
S_AD3
14
S_AD5
15
S_AD7
16
S_AD21
16
S_AD19
15 14
S_C/BE#1
13
S_AD14
12
S_AD12
11
S_AD10
10
S_AD8
S_C/BE#2
16
S_C/BE#3
15
S_PAR
14
S_FRAME#
13
S_TRDY#
12
S_STOP#
11
S_DEVSEL#
10
12
12
C490 .1UF
C489 .1UF
PCIRST# 7,13,16S_PCIRST#15,17 PME# 23,26S_PME#15,17
S_C/BE#2 15,17 S_C/BE#3 15,17 S_PAR 15,17 S_FRAME# 15,17 S_TRDY# 15,17 S_STOP# 15,17 S_DEVSEL# 15,17 S_C/BE#0 15,17
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
E
S_IRDY# 15,17 S_CLKRUN# 15 S_SERR# 15 S_PERR# 15
Add by Charles at 3/27
S_C/BE#1 15,17
31 47Tuesday, August 21, 2001
of
A
B
C
D
E
+5VS
JP5
1 1
2 2
INDEX#27 DRV0#27
DSKCHG#27
MTR0#27
FDDIR#27
3MODE#27
STEP#27 WDATA#27 WGATE#27 TRACK0#27
WP#27 RDATA#27 HDSEL#27
INDEX#
DRV0#
DSKCHG#
MTR0#
FDDIR# 3MODE# STEP#
WDATA# WGATE#
TRACK0#
WP#
RDATA#
HDSEL#
1 27
127
3 4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
232449
24 25
25
26
26
FDD_CONN
+5VS
INDEX#
282
282
29
29303 31
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
50 51 52
DRV0#
30 31
DSKCHG#
32 33 34 35
MTR0#
36 37
FDDIR#
38
3MODE#
39
STEP#
40 41
WDATA#
42 43
WGATE#
44 45
TRACK0#
46 47
WP#
48 49
RDATA#
50 51
HDSEL#
52
STEP# MTR0#
+5VS
TRACK0# DSKCHG# INDEX# WP#
+5VS
RP3
1 8 2 7 3 6 4 5
8P4R_1K
RP26
6 7 8 9
10
10P8R_1K
1 2
R285 1K
+5VS
DRV0#
5
WDATA#FDDIR#
4
WGATE#
3
RDATA#
2
HDSEL#
1
10
14
9 8
7
+5VS
DRV0# 27
U37C 74HCT125
FDDLED#
+5VALW POWER
Add by Charles at 1/4
TPAD_ON/OFF#26
TPAD_LED#26
PS2_DATA25 PS2_CLK25
12
Add by Charles at 2/22 for EMI
SPKR+19 SPKR-19
SPKL+19 SPKL-19
Modify by Charles at 1/17
LINE_OUT_PLUG19,33
LINEOUT_R19,33 LINEOUT_L19,33
Add by Charles at 1/4
C499 @22PF
12
C500 @22PF
+5VS
1 2 3 4 5 6 7 8
HEADER 8
12
C545 220PF
12
C549 220PF
Add by Charles at 5/20 for EMI
12
12
JP7
1 2 3 4 5 6 7 8
C546 220PF
C550 220PF
12
12
C547 220PF
C551 220PF
12
C548 220PF
1 2 3 4
HEADER 4
Add by Charles at 5/20 for EMI
1 2 3 4 5 6
HEADER 6
1 2
JOPEN8
2MM
JP8
1 2 3 4
JP9
1 2 3 4 5 6
3 3
+5VALW
INVPWR
JP10
1
1
2
Change by Charles at 2/25
SCROLLED#25 NUMLED#25
CAPSLED#25 CDLED#21,26
4 4
HDDLED#21
INT_MIC19
DISPOFF#23
DAC_BRIG25
INVT_PWM25
A
FDDLED#
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
HEADER 40
+5VS
+5VCD
C530 .1UF
1 2
SMC SMD
Change by Charles at 2/25
ON/OFF 13,25,29 SUSPBTN# 26,33 USER_BTN1# 26 USER_BTN2# 26 USER_BTN3# 26 USER_BTN4# 26 LID_SW# 13,25,26 EC_ACT# 25
51ON# 29,35
B
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
Add by Charles at 4/19 for EMI
Change by Charles at 2/10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
VOL_DW#26
VOL_UP#26
EC_ACT#25
51ON#29,35
LCD_MODE#26
DJ_ON/OFF#26
PLAYBTN#20,26
FRDBTN#20,26
REVBTN#20,26
STOPBTN#20,26
SMC3,5,20,25,26,33,38 SMD3,5,20,25,26,33,38
+5VALW
CD_PLAY_ON#20,26
BACKLED#26
DOT_CLK26
DOT_DATA26
DOT_CS#26
DOT_A026
DOT_PRES#26
C
VOL_DW# VOL_UP# EC_ACT# 51ON# LCD_MODE# DJ_ON/OFF# PLAYBTN# FRDBTN# REVBTN# STOPBTN# SMC SMD
CD_PLAY_ON# BACKLED#
DOT_CLK DOT_DATA DOT_CS# DOT_A0 DOT_PRES#
Change by Charles at 2/22
JP13
1
1
48
2
2
47
3
3
46
4
4
45
5
5
44
6
6
43
7
7
42
8 41
841
9
40
9
10
39
10
11
38
11
12
37
12
13
36
13
14
35
14
15
34
15
16
33
16
17
32
17
18
31
18
19
30
19
20
29
20
21
21
28
22
22
27
23
23
26
24
24
25
HEADER 24
VOL_DW#
48
VOL_UP#
47
EC_ACT#
46
51ON#
45
LCD_MODE#
44
DJ_ON/OFF#
43
PLAYBTN#
42
FRDBTN# REVBTN#
40
STOPBTN#
39
SMC
38
SMD
37 36 35 34
CD_PLAY_ON#
33
BACKLED#
32 31 30
DOT_CLK
29
DOT_DATA
28
DOT_CS#
27
DOT_A0
26
DOT_PRES#
25
D
+5VALW
Change by Charles at
5/3
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
32 47Tuesday, August 21, 2001
E
of
A
B
C
D
E
DOCKING 100 PIN
JP26
1
1
1 1
2 2
3 3
KBD_DATA25,29
KBD_CLK25,29
EXT_CLK25,29
EXT_DATA25,29
LAN_TX+31 LAN_TX-31
LAN_RX+31 LAN_RX-31
DCD1#28
DSR1#28
TXD128 RXD128
LPTSTB#27,28
LPTAFD#27,28 LPTERR#27,28 LPTINIT#27,28
LPTSLCTIN#27,28
COMPS23,24 TV_GND23,24
CRTGND23,24
INTSPKOFF#19
LINE_OUT_PLUG19,32
INTMICOFF#19
LINEOUT_L19,32
LINEOUT_R19,32
DOCK_LIN_L17 DOCK_LIN_R17
DOCK_MIC19
LPD1 LPD5
LPD7
R23,24 G23,24
B23,24
3 5 7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99
DOCKING 100
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
70
70
72
72
74
74
76
76
78
78
80
80
82
82
84
84
86
86
88
88
90
90
92
92
94
94
96
96
98
98
100
100
101
102
103
104
101
102
103
104
LPD0LPD3 LPD2 LPD4 LPD6
CONA#
VIN
SMD 3,5,20,25,26,32,38 SMC 3,5,20,25,26,32,38 SUSPBTN# 26,32
DTR1# 28 CTS1# 28 RTS1# 28 RI1# 28
ON/OFFBTN# 29
LPTSLCT 27,28 LPTPE 27,28 LPTBUSY 27,28 LPTACK# 27,28
+5VS
VSYNC 23,24 HSYNC 23,24 M_SEN# 23,24,25 DDC_MD2 23 DDC_CLK 23,24 DDC_DATA 23,24
+5VALW
OVCUR#0 13,28 OVCUR#1 13,28
USB0_D+ 28 USB0_D- 28
USBP1_D+ 28 USBP1_D- 28 CONA# 26
Modify by Charles at 2/16
LPD[0..7]27,28
LPD[0..7]
4 4
Compal Electronics, inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
A
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
C
D
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
33 47Tuesday, August 21, 2001
E
of
A
P6
1 1
PC8
0.1UF_0805_25V
2 2
+3VALWP
12
PD7
RB051L-40
3 3
PC9
4.7UF_1210_25V
PZD1 @RLZ4.3B
21
+5VP
47UF_D_6.3V
+
PC24
PZD3
RLZ3.6B
PC10
4.7UF_1210_25V
25V
0.015_2512
+
PC166
47UF_D_6.3V
21
PR5
PC31 1000PF
50V
47UF_D_6.3V
876
12
DDD
PD35
@BYS10-45
SSG
S
134
2
PL3
10UH_SPC-1207P-100
1 2
SUSP#26,28,30
+
+
PC25
47UF_D_6.3V
PR8 120K 5%
PC26
5
D
PQ1 FDS6690S
PC18 @1000PF
PR123 @1M
PR125 0
+5VP
PR131
@0
876
DDD
SSG
S
134
2
B+
5
PQ2
D
SI4800
0.1UF_0805_25V
PR129 0
P5
B
PC13
PR132 10K
PR7 47K 5%
PC5
0.1UF_0805_25V
+
PC4
4.7UF_C_35V
25
BST3
27
DH3
26
LX3
24
DL3
1
CSH3
2
CSL3
3
FB3
10
SKIP#
23
SHDN#
7
TIME/ON5
28
RUN/ON3
PR6 100K
PC30
0.047UF 16V
B+
22
MAX1632
1 2
PR1 10_1206
V+
PU1
PD1
RB751V
VL
PC7
0.1UF_0805_25V
21
VL
GND
8
12OUT
VDD
BST5
DH5
PGND
CSH5
CSL5
SEQ
REF SYNC RST#
LX5 DL5
FB5
VREF
4 5 18 16 17 19 20 14 13 12 15 9 6 11
C
PD2
RB751V
12
PC6
4.7UF_1206_16V
4.7UF_1206_10V
PC29
PC1
4.7UF_1206_25V
PC14
0.1UF_0805_25V
PR130
PQ3 SI4800
0
876
5
DDD
D
SSG
S
134
2
+12VALWP
B+
4.7UF_1210_25V
PC19
4.7UF_1210_25V
PR124 @1M
PR126 0
1UH_BLM3216
1 2
PC11 1UF_0805_25V
PC20
D
PL1
PC12
470PF_0805_100V
PR3
22_1206
P7 P8
PC21
0.1UF_0805_25V
PQ4 FDS6690S
PC23 @1000PF
4
1
876
DDD
SSG
S
134
2
+
PC2
2.2UF_1206_25V 25V
12
PD4
EC11FS2
PT1
5
12
D
PC27 47UF_D_6.3V
2
10UH_SDT-1205P-100-120
3
P9
PR4
0.015_2512 1W
PD5 @BYS10-45
PC28
+
47UF_D_6.3V
PZD2 @RLZ6.2C
21
12
E
+5VALWP
PD8 RB051L-40
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
A
B
C
INC.
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
34 47Tuesday, August 21, 2001
E
of
A
ADAPTER CURRENT 2.9A
P1
VIN
PR12 10K
1 1
2 2
3 3
PQ5
8
D
7
D
6
D
5
D
SI4835
ACOFF25
S S S G
PQ9
2N7002
P2
1 2 3 4
PR11 200K
PR18 150K
1 3
100K
2
100K
PR163
@0
8 7 6 5
PACIN 36,38
0.02_2512
PR174
1.2K_0.5%
2
PQ7
1
D
S
2
D
S
3
D
S
4
D
G
SI4435
PR22
47K
2
PD11 1SS355
1 2
13
PQ14 DTC115EK
TRICKLE25
B
1
PQ100
3
2N7002
B+
PC33 @100P
VIN
PR26 47K
PR170
10K_1%
PR183
16.9K 1%
PC164
0.1UF_0805_25V
2
PQ6 1 2 3 4
S
S
S
G
SI4435
1
PQ107
3
2N7002
8
D
7
D
6
D
5
D
OVP# 38
PC149
0.1UF
PC41
PC40
4.7UF_1210_25V
4.7UF_1210_25V
PR168
30.1K_1%
PR172
24.9K_1%
PR177
10K_1%
PR165
PR169
10K
PC148
2200PF_0805_50V
PR9
1W
PC42
4.7UF_1210_25V
10K
PC142 4700PF_0805_50V
PR171
PR175
10K
C
PQ13
1
S
2
S
3
S
4
G
FDS4435
PC43
0.1UF_0805_25V
10K
D D D D
PU10
1
-INC2
2
OUTC2
3
+INE2
4
-INE2
5
FB2
6
VREF
7
FB1
8
-INE1
9
+INE1
10
OUTC1
11
OUTD
12
-INC1
MB3878
P3
PL4
8 7
1 2 6 5
22UH_SPC-1207P-220
2
PD13 EA60QC04
1
3
PR205
4.7
+INC2
GND
CS
VCC(o)
OUT
VH
VCC
RT
-INE3
FB3
CTL
+INC1
24
23
22
21
20
19
Add by CT at 5/3
18
17
16
15
14
13
P4
Modify by CT at 2/25
B+
PR1840PR185
@0
0.1UF
PR173
68K
PR176
324K_1%
PR27
0.02_2512 1W
PC140 2200PF
PC165
0.1UF_0805_25V
PC146
1500PF
D
PC141
E
VMB
PC37
+
FSTCHG26
PC102
4.7UF_1210_25V
33UF_EC_25V
TRICKLE 25
PD40
PD41
1SS355
1SS355
1 2
1 2
PR191 47K
PC38
4.7UF_1210_25V
PC39
4.7UF_1210_25V
CV:LI-ION 13.241V
NI-MH 16.202V
CC: 2.87A LI-ION FAST
CC: 2A NI-MH FAST CC: 0.273A LI-ION TRICKLE CC: 0.265A NI-MH TRICKLE
CHGRTCP
2
PR45
200_0805
PC52
1UF_0805_25V
2 1
PZD6 RLZ16B
PU6
S-81235SG
1
1
2
PD16
VMB
CHGRTCP
51ON#29,32
4 4
RB751V
2 1
2 1
PZD4 RLZ6.2C
1 2
PR62 22K
PR60 100K
12
12
PC54
0.22UF_1206_25V
PQ24
TP0610T
PD18
RLS4148
2
13
P1
21
1 2
PR58 47_1206
VS
1 2
12
PC55
0.1UF_0805_25V
PR59 10K
PR61 150K
PC56
0.1UF
12
12
2 1
PZD5 RLZ5.1B
+5VP
NIMH/LI#38
2N7002
PC147
0.1UF
PR178
69.8K_0.5%
PQ101
PR179
RTCVREF
150K_0.5%
3
PC51 10UF_1206_10V
3
PR180
13
215K_0.5%
PR181
2
100K
13
100K
100K
PQ102
DTC115EK
2
+5VP
LI/NIMH# 25,38
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R& D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
A
B
C
INC.
D
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
35 47Tuesday, August 21, 2001
E
of
A
B
C
D
E
PR96
5.1K
+5VALWP
PC136
0.1UF_0805_25V
PD38
1 2
PQ46
2SA1036K
RB751V
PR158
2.2K
PC137 1000PF
6
52
D
PR157
47K
1
2
3
2SC2411K
SI3443DV
PQ45
PQ99
DD
D
GS
1
3 4
PD30
RB051L-40
2 1
PL9
2.2UH_SPC1002
1 2
CPU_IOP
+
PC139 47UF_D_6.3V
+VCLK
+VCPU_IO
+5VALW
+3VALW
+VCC_CORE
80mil
+2.5VP
CPU_IOP
+5VALWP
+3VALWP
CPU_COREP
PR98 @1M
JOPEN2
1 2
2MM JOPEN1
1 2
2MM JOPEN4
1 2
3MM JOPEN3
1 2
3MM
VREF
+5VALWP
Change value by
13
VREF
100K_1%
Charles at 2/2
PC72
0.047UF
PQ30 DTC115EK
PR160
1 1
PR93 100K
+5VALWP
100K
2
100K
13
PQ31
VR_ON6,26,36
100K
2
DTC115EK
100K
PR100
2 2
200K_1%
PR101
200K_1%
PR92 200K_0.5%
PR94 300K_0.5%
PR159
5.6M
84
5
+
6
-
PC76
0.047UF_1206_16V
PU7B LM393
7
+5VS
PR154
PD3
1 2
RB751V
10K
PU7A
84
LM393
3
+
2
1
-
PR99 @1M_1%
PC138
@1000PF
25V
+3VS
PR162
10K
VR_POK 6
V_GATE 6,36
PR102 220K
12
RB751V
PD27
3 3
CUT POWER PLANE
JOPEN5
+12VALWP +12VALW
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS,
A
B
C
INC.
D
1 2
2MM
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
37 47Tuesday, August 21, 2001
E
of
A
B
C
D
E
+5VALWP
PR127 100K
PD20
PD22
@BAS40-04
1
PD23
@BAS40-04
VMB
PR63
6.49K_1%
PR64 1K
PC101
0.01UF
PC100 1000PF
PR69 200
1
1
PR71 200
1 1
LI/NIMH#25,35
LI/NIMH#
PD31
+5VALWP
3
PR128 1K_1%
3
1
+5VALWP
2
@BAS40-04
Add by CT at 2/25
PR186
@470
PR187 @10K
PC150 @100PF
PR188 @11K_1%
PR189
2 2
@100K
VREF
PC152 @0.1UF
+5VALWP
52
1
+
3
-
PU11 @MAX4490
4
+5VALWP
PQ108
@SI3443DV
1
34
D
GS
D
DD
6
5 2
PR190
INVPWR
PC153 @10UF_1206_10V
+
PC151 @47UF_D_6.3V
0_0805
SMC3,5,20,25,26,32,33
SMD3,5,20,25,26,32,33
+5VALWP
BATT_TEMP25 +5VALWP
2
@BAS40-04
3
2
3
2
PR67 1K
PF1 7A
PCN1
1
B/I
TS
SLD SLC
2 3 4 5 6 789
BATT CONN.
VIN
PCN2
1
3
3
2
DC JACK
3 3
PD24
BYS10-45
1
12
2
PC61
1000PF
PC62
0.01UF_0805_25V
2
1
3
PT2 JBT0385-100805-4
4
PC63
1000PF
PC64
0.01UF_0805_25V
P1
PR211 22
PR88 10K
VIN
PC163
0.1UF_25V_0805
PR79
100K_1%
PR86
32.4K_1%
22K
PC69
0.22UF_0805_16V
A
PR89
PC68
4 4
1000PF
3 2
PR91 100K
PR80
1M_1%
PU4A
84
LM393
+
1
-
PD26
RTCVREF
RLZ5.1B
21
PR81
10K
PR90 10K
B
OVP#35
ACIN 25,30
PACIN 35,36
PR82
PR87 @100K
C
@324K_1%
1
2
3
PQ25 @2N7002
Change by James for NIMH battrey issue.
LI/NIMH#
PR229 @0
PR228 @0
PC189 @1UF_0805
PR227
@2.2K_0805
@0.47UF_0805
1
2
3
PQ115 @2N7002
P1
PD25
PR73 @39K
7
PC66 @1UF_1206
@1SS355
84
+
-
PC67 @1000P
PU4B LM393
5 6
12
PR75
0
PR83
@100K_1%
VREF
PC65
@1UF_0805_16V
25V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANS FERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R &D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRON ICS, INC.
D
PC190
VMB
PR72 @1.2M_1%
0
PR84
VMB
12
PD45 @1SS355
PR74
PR230 @470
PC191 @1000PF
1
2
3
PQ116 @2N7002
LI-ION OVP 14.55V NI-MH OVP 17.55V
@1M_1%
PR76 @1M
PQ26
1
PR85
@1M
NIMH/LI#
2
3
NIMH/LI# 35
@2N7002
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
38 47Wednesday, August 29, 2001
E
of
A
B
C
D
E
1
For HDD
H13 HOLE_HDD_D3.5
1
H17 HOLEA
1
H14
H16
HOLED
HOLED
1
H11 HOLE_HDD_D3.5
1
1
H10 HOLED
1
1
FD12
FD17
FMARK
H12 HOLEA
1
FMARK
1
1
PIIX4M TI1420
FD11
H15 HOLED
1
1
FD19 FMARK
1
FMARK
1
FD16 FMARK
1
FD4 FMARK
1
FD1 FMARK
1
FD8
FMARK
1
FD21 FMARK
1
440ZXM
FD20 FMARK
1
HOLEA : Hole 3mm +0mm -0.05mm, With ring 8mm PTH HOLEB : Hole 3mm+/- 0.05mm, With ring 8mm, NPTH HOLEC : Hole 4.5mm, NPTH HOLED : Hole 5.2mm, with ring 8mm PTH
1 1
1
1
1
1
1
H18 HOLEC
1
1
H19 HOLEC_1
1
For Tooling For Boss
2 2
FD15
FD9 FMARK
1
FMARK
1
FD3 FMARK
1
FD14 FMARK
1
FD7 FMARK
1
FD5 FMARK
1
FD6 FMARK
1
FD13 FMARK
1
SMC37N869 NS87570
FD10
FD2 FMARK
1
FMARK
1
FD18 FMARK
1
FD22 FMARK
1
ESS 1988 OZ163
3 3
4 4
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
A
B
C
D
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
39 47Tuesday, August 21, 2001
E
of
5
4
3
2
1
P.I.R. (1) LIST
Revision History
D D
Date: 2000/01/14 REV#: 0.2 Description: A1-TEST TO A2-TEST
1. PAGE 5 - R388, RP2, R71, R59 delete placement, U38 pin 18 connect to ground, Q2 changed value to SI2302DS.
2. PAGE 6 - R346, R350, R347 delete placement and Y3 and Y4 both pin 2 direct connection U9 pin 25. L27, C371, C373 delete placement and U9 pin 7 and 30 direct connection +3V power.
3. PAGE 6 - R336, R357, R345, R112 delete placement and RP56 pin 16 change connection signal from "VGA_SUS_STAT#" to "SUSTAT1#", RP56 pin 1 signal short to "VGA_SUS_STAT#" signal, Q59 (SI2302DS), R452 (10K) add for Intel's Geyserville issue.
4. PAGE 6 - "VR_HI/LO#" signal add R443 (10K) pullhigh to +3V power, "GT_SUSTAT1#" signal add R444 (10K) pullhigh to +3V power, R353 and R107 delete placement, "SUSTAT1#" siganl add R445 (10K) pullhigh to +3V power.
5. PAGE 6 - R119 delete placement and RP19 pin 1 change signal from "IGNNE#" to "CPUINIT#", "PWRGD_CPU" signal of R356 serial D45 (RB751V) to "VR_POK" signal.
6. PAGE 6 - U9 pin 29 change signal from "VR_POK" to "V_GATE", U9 pin 32 change signal from "V_GOOD" to "VR_POK".
7. PAGE 7 - R175 and R177 delete placement, R189 change connection signal from "RRAS#4" to "RRAS#2", R176 change connection signal from "RRAS#5" to RRAS#3", R190 change connection signal from "RRAS#2" to "RRAS#4", R191 change connection signal from "RRAS#3" to "RRAS#5".
C C
8. PAGE 7 - R192 pin 1 change connection U34 pin AC22, R184 pin 1 change connection U34 pin AF23.
9. PAGE 9 - R83 and R338 delete placement, U34 pin M24 and pin F17 change power source from "+VCC_CORE" to "+VCPU_IO".
10. PAGE 10 - Signal "PCLK_SIO" add R427 (22) connection to U10 pin 11.
11. PAGE 11 - JP23 pin 61 change signal to "CLK_SDRAM3", JP23 pin 74 change signal to "CLK_SDRAM2", JP23 pin 69 change signal to "RRAS#3", JP23 pin 71 change signal to "RRAS#2", JP23 pin 62 change signal to "CKE3", JP23 pin 68 change signal to "CKE2".
12. PAGE 13 - U11 pin P16 change signal to "LID#".
13. PAGE 15 - U37 pin 148 used a 2N7002 to gatting leakage by "SYS_ALW" signal.
14. PAGE 17 - R398, R403, C494, R44, U42 delete placement, C465, C466, C467 change power source from +8VS to +5VS and serial L44 (HB1M2012-601JT) to AVDD power, U3 pin 39 add R44 (10K) pullhigh to +3VS power, R1, R2, R3 changed value to 20K, R16, R17, R18 changed value to 24K.
15. PAGE 18 - R8, R7, R425, R426 change value to 22K, C22, C23, C503, C500 change value to 470PF, C6, C10, C510, C508 change value to 8200PF, C1, C4, C515, C514 change value to 4700PF, C2, C3, C513, C509 change value to 150PF, C7, C11, C507, C502 change value to 68PF.
16. PAGE 19 - Audio AMP. changed to TDA8552, JP1 pin 3 add bais CKT (R429, R430, R428, C517), C9 delete placement and U43 pin 7 connect signal "MICIN", Gatting internal MIC CKT changed to new one.
17. PAGE 20 - R258, R263, R267 delete placement, U32 pin 93 connect signal "SIORDY", U32 pin 12 connect signal "IRQ_15", U32 pin 12 connect signal "SDDREQ", Q39 change value to 2N7002 and gate by "CD_PLAY_ON#", Q32, Q31 change value to 2N7002, U30 changed value to SI4800, R455 (100K), Q60(2N7002) add part to control U30.
18. PAGE 21 - JP11 pin 44 change to no connection, JP11pin 21 serial R431 (82), JP11 pin 27 serial R432 (82), JP15 pin 27 serial R258 (82), JP15 pin 22 serial
B B
R267 (82).
19. PAGE 22 - R322 and R160 both changed value to 5.6K.
20. PAGE 24 - C109 pin 2 change connection to L9 pin 2, JP6 pin 2 change connection to C109 pin 1 and signal "TV_GND".
21. PAGE 25 - U24 pin 94 changed to no connection.
22. PAGE 26 - U25 pin 2 and pin5 changed to no connection, U25 pin 9 connect signal "CD_PLAY", U25 pin 16 change connection signal "CD_PLAY_ON#".
23. PAGE 27 - Super I/O change to SMC37N869 CKT.
24. PAGE 28 - R278 and R207 delete placement.
25. PAGE 29 - U35 pin 4 change connection signal "VR_POK", U39 pin 13 add pullhigh R448(10K) to +3V power.
26. PAGE 30 - U18, U15, U17, U16 changed value to SI4800, Q11 changed value to SI3861, C202, C204, C203, C183, C184, C196 changed value to 4.7UF, C210, C208, C294, R264, C182, C185, C299, R270, C309, C209, C207, C278, R255, C199, C195, C297, R265 delete placement.
27. PAGE 30 - R266, Q35, R47, Q1, C198, C190, R211, R209, Q14, Q16, C197, C194, C218, C215, R213, R212, Q17, Q18, C217, C216 delete placement.
28. PAGE 32 - Delete battery status LED CKT, signal "DRV0#" add level-shift CKT, JP12 changed pin difinition, JP9 pin 21 and pin 22 change to no connection, JP9 pin 13 and pin 15 connect to "AGND", JP9 pin 14 change connection to signal "INT_MIC", JP9 pin 12 change connection to signal "HDDLED#" and add JP29 to support headphone board.
29. PAGE 33 - JP25 delete placement, JP26 pin 15, pin 17, pin 21, pin 23 direct connection to JP22 in page 31.
29. PAGE 17 - AVDD power supply change by MOS.
A A
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
3
2
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
40 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (2) LIST
3
02/25/2000
1. Issue A2C008 : Can't mute completely (Page 20)
- add resistor divider R1(20K-serial), R16 (24K-to AGND) on INT_CD_L
- add resistor divider R3(20K-serial), R18 (24K-to AGND) on INT_CD_R
- add C502 (1UF_0603) to decouple the small signal of INT_CD_L
- add C503 (1UF_0603) to decouple the small signal of INT_CD_R
- add R426,R427 (both @10K) on INT_CD_L small signal voltage divider to be 2.5V (reserved)
- add R428,R429 (both @10K) on INT_CD_R small signal voltage divider to be 2.5V (reserved)
- add R436,R437 (both @10K) on LEFT_EQ and RIGHT_EQ for noise improvement (reserved)
- add R432,R433 (@24K,@20K) on CDROM_L for noise improvement (reserved)
- add R434,R435 (@24K,@20K) on CDROM_R for noise improvement (reserved)
2. Correct CD-ROM CD_AGND pin assignment (page 21)
- change JP16 pin4 connection from CD_AGND to GND
3. No load D20(level shift gate for VR_POK) for Geyservelli inside (page 6)
4. Add amplify mute AMP_MUTE for reservation only (page 17,19)
- add Q54 (@FDV301), R430(@100K), R431(@10K)
- AMP_MUTE was inverse from the output of ESS1988 pin63
- AMP_MUTE was connected to TDA8552TS pin5
5. Add M_SEN# for CRT monitor detection (page24,25)
- add D45(DAN217), R425(100K), C371(68PF)
- M_SEN# was coming from JP11 pin11
- M_SEN# was going to EC pin83
6. Exchange IR module pin11 and pin13 (page 28)
- pin11 will be GND
7. Add CP8,9,10,11,12,13 (@8P4C_22PF) on keyboard signals for reserve(page 29)
8. Change MAX708 to be MAX6342 for cost improvement (page 29)
9. Delete three beads HB1M1608-121JT on Mini-PCI connector pin28,19,123 (pass through) (page 31)
10. MD_BITCLK improvement for EMI (page 17,31)
- add R423(22 ohm) serial on MD_BITCLK(nearby ESS1988)
- add R424(10 ohm), C501(15PF) AC termination on MD_BITCLK (nearby Mini-PCI CN)
11. Internal PS2 signals add two decouple CAPs for EMI improvement
- C499(@22PF) on PS2_CLK - C500(@22PF) on PS2_DATA
12. Dot-Matrix connector change from 30 pins 0.5 pitch to 24 pins 1.0 pitch (page 32)
13. Switch Board change pin definition for Inverter Power (page 32)
- JP10 pin3,4,5,6 change from +5VS to be INVPWR - JP10 pin21,22 change from NC to be +5VS
02/29/2000
1. Modify the references of some components for easy layout
- R433 <=> R1 => R433=20K,R1=0 ohm
- R432 <=> R16 => R432=24K,R16=@24k
- R435 <=> R3 => R435=20K,R3=0 ohm
- R434 <=> R18 => R434=24K,R18=@24K
2. Scheme correct (page 6)
- D19 pin3 change net from GCL_CPUSTP# to CPU_CPU_STP#
- D20 pin1 add a output module VR_POK for external connection
3. A2H001 & A2C045 (CD-ROM copy compare fail & low performance)
- IRQ14 damping R306 change from 82 ohm to 33 ohm
- IRQ15 damping R333 change from 82 ohm to 33 ohm
- PIORDY damping R309 change from 82 ohm to 33 ohm
- PIORDY pull high R311 change from 1K ohm to 10K ohm
- SIORDY damping R378 change from 82 ohm to 0 ohm
- SIORDY pull high R341 change from 1K ohm to 10K ohm
- PDDREQ damping R320 change from 82 ohm to 33 ohm
- CD_DREQ damping R380 change from 82 ohm to 33 ohm
03/01/2000
1. Add MUTE function for amplify (page 17,19,26)
- add "MUTE" signal on U3 pin63
- add "EC_MUTE" signal on U39 pin5
- add U47 (NC7ST32-SC70) to "OR" "MUTE & "EC_MUTE" (U47 pin1 = "MUTE", pin2 = "EC_MUTE" , pin4 connect to U2(Amplify) pin5)
- add C504(0.1UF) for U47 power decoupling
- add R438(0 ohm) serial on "EC_MUTE" for reserve only
- no load R36 to be @0 ohm (original pull down on U2 pin5
2. Add some CAPs for noise cross reference (help for EMI & signal quality)
- for PCI BUS on +3VS,+5VS : C505,C508 (0.1UF) ; on +3VS,+3V : C510,C511 (0.1UF) ; on +3VS,+3VALW : C513 (0.1UF) on +3V,+3VALW : C515 (0.1UF)
- for CD-ROM IDE BUS on +3V,+5VS : C512 (0.1UF) ; on +3VS,+3V : C514 (0.1UF) ; on +5VS,+5VCD : C516 (0.1UF)
- for HDD IDE BUS on +3VS,+3V : C506 (0.1UF) ; on +5VS,+3V : C509 (0.1UF)
- for AGP BUS on +3V,+3VS : C507 (0.1UF)
03/08/2000
1. Improve EQ quality (page 18)
- R31,R231 change from 120K to 12K - R28,R233 change from 1M to 180K
- R27,R223 change from 120K to 20K - R24,R226 change from 1M to 270K
- R213,R12 change from 120K to 16K - R13,R217 change from 1M to 240K
- R218,R214 change from 120K to 24K - R11,R221 change from 1M to 330K
- R227,R232 change from 120K to 1.5K - R25,R229 change from 1M to 24K
- C21,C22,C235,C237 change from 470PF to 3300PF - C6,C9,C228,C230 change from 8200PF to 330PF
- C1,C4,C222,C223 change from 4700PF to 5600PF - C2,C3,C224,C227 change from 150PF to 180PF
2
- C7,C10,C229,C234 change from 68PF to 0.22UF
1
Revision History Date: 2000/02/14 REV#: 0.3 Description: A2-TEST TO B-TEST
D D
1. PAGE 6 - Q12 (GCL_SI2302DS) swap pin 1, 3.
2. PAGE 6 - U10 (GCL_AMI11686-001) pin 32 and R304 (10K) changed connection net to "G_VR_POK", R304 changed pull-high power source from +3V to +3VS.
3. PAGE 10 - R127 changed value from 22 to 10 Ohm, C121 (33PF) change to reserved in PCB.
4. PAGE 17 - R44 changed value form 33 to 10 Ohm, C38 changed value from 22 to 15PF.
5. PAGE 17 - Audio has one clean power source changed to two, one (+5VAMP) for AMP. and EQ, other (AVDD) for CODEC.
6. PAGE 18 - R8, R215, U1 and U21 changed power source from +5VCD to +5VAMP.
7. PAGE 19 - U2 changed power source from +5VCD to +5VAMP.
8. PAGE 19 - Q6 pin 3 add a serial resistor (2.2K) to connect JP1 pin 3 and 2.
9. PAGE 20 - Q42, Q43 and Q32 swap pin 1 and 3, U33 (OZ163) pin 56 change 1K pull-down ground to 10K pull-high +5VCD of R366.
10. PAGE 25 -U41 (87570) add "FIR_PRE#" signal at pin 84, RP56 (8P4R_10K) add "FIR_PRE#" signal at pin 5 and "BT_PRE#" signal at pin 7.
11. PAGE 26 - "PLAYBTN#", "REVBTN#", FRDBTN#, STOPBTN#, "DJ_ON/OFF#", VOL_UP#, VOL_DW# and "CONA#" signals add RP55 pull-high array.
12. PAGE 27 - R205 change value from 33 to 10 ohm, C176 change value from 10 to 15PF.
13. PAGE 27 - U15 pin 81 changed to connect to "DTRA#" signal, pin 80 changed to connect to "CTSA#" signal, pin 79 changed to connect to "RTSA#" signal, pin 78 changed to connect to "DSRA#" signal, pin 77 changed to connect to "TXDA", pin 76 changed connect to "RXDA" signal, pin 83 changed to connect to "DCDA#" signal.
14. PAGE 29 - U8 pin 11 changed to connect to "FIR_PRE#" signal.
15. PAGE 29 - U8 (MAX708) pin 1 changed to connect to "G_VR_POK" signal, R283 changed value from 240K to 113K and pin 1 changed to connect to +3VS power, , U8 (MAX708) pin 5 serial a resistor (2.2M) to R283 pin 2.
16. PAGE 29 - U26F (74LVC14) pin 13 add one +5V RC delay CKT.
17. PAGE 32 - JP12 pin 17 changed power source from +5VS to +5VALW, JP12 pin 17 changed signal from NC to "DOT_PRES#", JP9 pin 25 changed signal from "ON/OFFBTN#" to "ON/OFF" (Old components' references).
C C
18. PAGE 33 - JP26 pin 80 and 82 changed power source from +5V to +5VALW.
02/18/2000
1. SpeedStep Workarond for CPU_STP# timming (page 6)
- add D19 (@RB717), pin1 connect CPU_STP#, pin2 connectVRCHGNG#, pin3 connectGCL_CPUSTP#
2. Remove CPU_LO/HI# pull high (CPU had internal pull high) (page 6)
- no load R100 (@GCL_1.5K)
3. Reserve 14.318MHz from Clock generator to Geyserville control logic (page 6,10)
- add R298 (@GCL_0) serial on the trace 14.3M_GCL
- U11 pin26 add a serial R114 (@22) on 14.3M_GCL
4. Remove North Bridge TESTIN# pull high (according to updated RDDP) (page 7)
- no load R329 (@10K)
5. No connection DCLKRD input of the North Bridge (arrording to RDDP) (page 6)
- let U31 pin AB22 to be NC
6. Change AGPREF to meet RDDP (page 8)
- R152 change value from 1K_1% to be 3.48K_1%
- R154 change value from 2K_1% to be 2.32K_1%
7. Redundance ECC serial resistors remove (page 12)
- no load RP47 (@16P8R-10)
8. Improve PIIX4 32KHz crystal RC value for more reliable (page 13)
- R172 change value from 1M to be 22M
B B
- C164,C165 change value from 22PF to be 12PF
9. MIC circuit improve (page 19)
- add a serial R53 (2.2K) on Q6 pin3 - connect JP24 pin2,3 together
- no load U22,C8,C239,C240,R234 - change R23 from 27K to be 0 ohm
- change R29 from 10K to be 0 ohm - change C20 from 1UF to be 0 ohm
- change R32 from 2K to be 2.2K - add Q1 (2S2411EK) just like Q56 but only pin3 connect to R32 pin1
10. For layout space improve (page 20)
- C429 change value from 10UF_10V_1206 to be 1UF_0603
- R359 change from 10K to be 100K
11. CD_AGND improvement (page 21)
- add R356 (0_0603 ohm) between CD_AGND & GND (at the middle of the trace)
- add R288 (0_0603 ohm) between CD_AGND & GND (close CD-ROM module)
12. Modify BlueTooth connector definition
- pin 1 : NC -> BT_DET
- pin 3 : NC -> BT_WAKE_UP
- pin 7 : NC -> BT_USB1_D+
- pin 9 : NC -> BT_USB_D-
- pin 13 : NC -> BT_RST#
A A
- add R317,R324,R318,R325 (0 ohm) & R316,R323,R319,R326 (@0) for USB1 signals switching (BlueTooth or non-BlueTooth)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
- pin 6 : GND -> BT_ON#
- pin 8 : NC -> BT_PRE#
- pin 10 : BT_PRE# -> GND
- pin 12: BT_WAKE_UP -> TO_USB1_D+
- pin 14 : NC -> TO_USB1_D-
- pin 16 : BT_ON# -> GND
- pin 18 : BT_RST# -> NC
- pin 20 : BT_DET -> NC
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
401138
Date: Sheet of
4
41 47Tuesday, August 21, 2001
4C
5
4
3
2
1
P.I.R. (3) LIST
Revision History
D D
Date: 2000/03/23 REV#: 0.4 Description: B1-TEST TO B2-TEST
03/23/2000
1. Correct ON/OFF button signal for PIIX4 (page 13)
- D9 pin1 change connection from ON/OFFBTN# to ON/OFF
2. Correct DM_ON signal for OZ163 direct CD-PLAY function (page 20)
- change D26 pin1 from CD_PLAY_ON# to DM_ON
3. Correct Bluetooth power supply (page 24)
- JP20 pin15,17,19 change connection from +3VS to +3VALW
- JP20 pin18,20 change connection from N.C. to +5VALW for USB hub on Bluetooth module
4. Add a option resistor for G_VR_POK for 733L while Geyservilli ASIC was no load (page 6)
- add R448 L@0, pin1 connect V_GATE, pin2 connect G_VR_POK
5. For Factory ATE testing (page 6)
C C
- change R117,R121 from LN_0 to LN_1K
- add R447 LN_1K on U10 pin43
03/30/2000
2. MODEM can't work was caused by the mal-reset of MD_RST# (page 31)
- add R462 @0 for MD_RST#
- add R463 0 for PCIRST# (default)
3. CMOS data lost (caused by +5VALW undershoot too big while unplug the AC) (page 34)
- change PD8 from BYS10-45 to RB051L40 (the same as PD30)
4. IRQ8 need to pullhigh (because BIOS change the programming method) (page 13)
- load R167 1K
04/05/2000
1. Speed up the +3V discharge time (page 30)
- R371 change from 470 ohm to 33 ohm
6. Improvement for Issue A2C008 (page 20)
- change R432,R434 from 24K to 33K
- add C517,C518 1UF_0603 serial in front of the EQ for LEFT_EQ & RIGHT_EQ respectively
7. Improve the reserved "MUTE" function (page 19)
- add R445 100K
- add D46,D48,D49 RB751V
- add R444 @0
- add C526 @.1UF
- add U48 @NC7ST32
- no load R43,R33 to be @100K
- no load R235 to be @10K
03/28/2000
B B
1. Reserve Pull high for VID[0..4] (page 5)
- add RP65 @8P4R-4.7K & R461 @4.7K
2. Improve PCI signal quality (add damping resistors)
- for miniPCI : add RP60,RP61,RP62,RP63,RP64,Rp66 16P8R-33 ohm (page 31)
- for miniPCI : R453,R454 33 ohm & R450R452,R449,R451 10 ohm (page 31)
- for PCI1420 : R458,R459,R460 10 ohm (page 15)
- for ESS1988 : R455,R456,R451 10 ohm (page 17)
3. Add pad junction for TV_GND for EMI request (page 24)
- add JOPEN6 2MM for TV_GND
03/30/2000
1. FIR module change from HP3600 to VISHAY TFDS6101E (page 28)
- change R286 from LN_2.2_1206 to @LN_3.3_1206 (change to be on load)
- change R97 from LN_560 to LN_0_0805
A A
- delete R287 (original @0)
- change R102 from original LN_0 to 100K
- change C111 from LN_220PF to LN_0.1UF
- delete C368 (original LN_0.47UF_16V_0805)
- change U9 from LN_HSDL_3600 to LN_TFDS6101E
- add R446 LN_3.3_1206
- add C525 LN_100PF
5
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
4
3
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Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
42 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (4) LIST
D D
C C
Revision History Date: 2000/04/20 REV#: 0.5 Description: B2-TEST TO B3-TEST
04/20/2000
1. Correct MOS switch (74HCT4066) for switching headphone or Int. speaker (page 18)
- Add Q55 and Q54(2N7002) to use "HPS" signal to switching L-R channel.
- Add R466 (10K) and R465 (10K) pullhigh +5VCD
- Add one MOS switch (74HCT4066) to switching L-R channel.
- Add R464 (@0) and R464 (@0) only for reserved, that can bypass MOS switch.
2. Add MOS to gatting MIC signal (page 19).
- Add Q58(SI2304DS) and Q59(2N7002) to disconnect MIC. signal.
- Add R470(100K) pullhigh resistor.
- Add R471(10K) pulldown resistor.
- Add R473(@10K) pulldown resistor.
- Load R444(0), C526(.1UF) and U48(NC7ST32) for control "MUTE_AUD" signal
- No load R29(0).
3. Add JOPEN for EMI (page 24)
05/03/2000
17. Add more damping capicator in +VCPU_IO and VGTLREF_BX. (page 9)
- add C541, C539, C540 (.01UF).
- add C538 (1UF).
- add R476 (1K).
- add R477 (2K).
- change value C532, C533 (4.7UF).
- change value C122, C142 (1UF).
18. Add more damping capicator in +3V. (page 23)
- add C534 (10UF).
19. Modify and reserved for FAN control function. (page 30)
- add C542 (@10UF).
- direct to connect Q29 pin 2, U4 pin7 and C274 pin 2.
- remove R52 (0) and the resistor reserved for connect "EN_DFAN" signal and Q29 pin 2.
4. Add pullhigh resistor for "BIOSCS#" signal (page 25)
- add R472 (10K).
5. Add a diod to reserved for S/W (page 13)
- add D50 (@RB751V).
6. Add capicator on JP22 (RJ11) for EMI request. (page 31)
- add C529 and C529 (1000PF_2KV_1206).
7. Add capicator on JP10 "+5VCD" power pin for EMI request. (page 32)
- add C530(0.1UF).
8. Change EQ RC value. (page 18)
9. Add damping capicator C532 and C533 (1UF) on U31 power pin VTTA(M24) and VTTB(F17) for WIN98 Multi-task will be halt. (page 9)
- add C532, C533(1UF).
B B
10. Diconnect MIC Jack (JP24) pin 3 and pin 2 for EXT. MIC can't record voice. (page 19)
11. Add capicator and change value for TV-OUT quility. (page 24)
- add C531(27PF).
- change C106 and C105 value (330PF).
12. Add CKT for gatting ME-OFF reset. (page 25)
- add Q56 and Q57(2N7002).
- add R468 (10K).
- add R469 (100K).
- add R474 (0).
13. Add resistor reserved for FAN control function. (page 30)
- add R475(@0).
14. Add +5VALW power pin at LCD status board connector (JP13) pin 15 and 34. (page 32)
15. Add ATE and function testing point.
A A
16. Change RC value for beep sound is very loud. (page 19)
- change value R266(10K_1%).
- change value C285(.22UF).
- "PCM_SPK#" signal change to connect U26 pin 5 and C306 pin 1 change to connect U26 pin 6.
5
4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
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Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
43 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (5) LIST
D D
Revision History Date: 2000/06/15 REV#: 1.0 Description: B3-TEST TO C-TEST
05/20/2000
1. Fix high pitch noise issue (page 18)
- Add C543 and C544 (0.01UF).
2. Fix PO-PO sound noise when power on (page 19).
- Add Q62, Q63, Q64, Q65 (SI2304DS).
- Add Q61(2N7002).
- Add R480(100K).
3. Fix USB power leakage (page 28)
- Add Q60(SI2306DS).
- Add R478(100K).
4. Fix CD-direct play will into sleep mode after 2 second (page 20)
- Delete R362 (10K).
C C
- Add R364 (10K).
5. Fix 733 and 733C can't identify M/B (page 25)
- Add R479 (@10K).
6. For EMI change (page 32).
- Add C545, C546, C547, C548, C549, C550, C551 (220PF).
7. BOM change for EMI.
- C121 (@33PF --> 33PF) and R127 (10 --> 15 Ohm) for "48M" (page 10).
- C148 (@15PF --> 15PF) and R150 (@10 --> 33 Ohm) for "HCLK" (page 7).
- C163 (@22PF --> 22PF) for "DCLKO" (page 7).
- C160 (@22PF --> 22PF) for "GCLKO" (page 8).
- C169 (@10PF --> 22PF) and R187 (@33 --> 33 Ohm) for "DCLKO" (page 10).
- C444, C445, C460, C458 (@15PF --> 22PF) for SDRAM_CLK (page 11).
- R384, R385, R382, R383 (@33 --> 33 Ohm) for SDRAM_CLK (page 11).
8. Change value for FIR setting. (page 28)
B B
- R98 (0 --> 10K).
- R102 (100K --> @10K).
9. Delete double pullup in "CDLED#" signal (The signal already had R189 pullup in page 21). (page 26)
- R350 (100K --> @100K).
10. Fix unplug AC-IN in SPR then system shut down. (page 29)
- Q51 (2N7002 --> @2N7002).
11. Fix "GCLKO" signal waveform quility on the EA report. (page 8)
- R162 (10 --> 22).
12. Fix "PCLK_MINI" signal waveform quility on the EA report. (page 10)
- R120 (33 --> 15).
06/08/2000
13. Fix IR noise. (page 28)
- C110 (10UF_10V_1206 --> @10UF_10V_1206).
A A
06/15/2000
14. Fix "CLK_SDRAM2"~"CLK_SDRAM5" signal waveform quility on the EA report. (page 10)
- R346, R347, R348, R349 ( 22 --> 15 Ohm ).
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
4
3
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Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
44 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (6) LIST
D D
Revision History Date: 2000/06/26 REV#: 2.0 Description: C-TEST TO MP-TEST
05/20/2000
11/03/2000 ( Modify for N3 2 N- 733B )
1. Fix winstone99 will be hang issue (page 4)
- Add C553(1UF), C554(1000PF) and C555(.01UF) for "CPU_IO" power.
- Change value C338, C288, C67, C63, C61 and C324 from 0.1UF to 1000PF for "CPU_IO" power.
- Change value C344, C287, C68, C64 and C60 from 0.1UF to 0.01UF for "CPU_IO" power.
- Change value C62, C59 and C66 from 0.1UF to 1UF for "CPU_IO" power.
2. Fix noise sound when plug-in headphone (page 17).
- Add Q66(2N7002).
- Add R481(33).
3. Fix T.P mouse move cause audio noise (page 17)
- Delete L17, L13 and L3 (0_0805).
4. Fix U2 pin 4 floting problem (page 19)
C C
- Add R482 (100K).
- Change C427,C428 from "10PF" to "BN_10PF".
- Change C115 from "10UF_10V_1206" to "BN_10UF_10V_1206".
- Change C111,C430,C432,C435 from ".1UF" to "BN_.1UF".
- Change C525 from "100PF" to "BN_100PF".
- Change D25 from "1N4148" to "BN_1N4148".
- Change D26,D27,D28,D29,D30 from "RB751V" to "BN_RB751V".
- Change U33 from "OZ163" to "BN_OZ163".
- Change U9 from "TFDU6101E" to "BN_TFDU6101E".
- Change JP13 from "HEADER24" to "BN_HEADER24".
- Change JP26 from "DOCKING 100" to "BN_DOCKING 100".
- Change Q33,Q34,Q44 from "2N7002" to "BN_2N7002".
5. Fix +5VCD discharge slowly problem (page 20)
- Change R391 value from 470 to 33 Ohm.
6. Fix EA problem (page 10)
- Change value R346, R347, R348 and R349 from 22 to 10 Ohm for memory clock.
- Delete C121 (33PF) for 48M clock.
11/03/2000 ( Modify for N3 2 N- 733B )
1. BOM modified for N32N-733B (page 20,28,32,33)
- Change RP49 from "8P4R-10K" to "BN_8P4R-10K".
- Change RP48 from "10P8R_10K" to "BN_10P8R_10K".
- Change RP51,RP53 from "10P8R_4.7K" to "BN_10P8R_4.7K".
- Change RP52 from "@16P8R_33" to "B@16P8R_33".
- Change RP54,RP50 from "@16P8R_0" to "B@16P8R_0".
B B
- Change R361 from "1M" to "BN_1M".
- Change R359,R394 from "100K" to "BN_100K".
- Change R361 from "1M" to "BN_1M".
- Change R360,R363,R364,R366,R367,R368,R98 from "10K" to "BN_10K".
- Change R102 from "@10K" to "B@10K".
- Change R355 from "1K" to "BN_1K".
- Change R375 from "5.6K" to "BN_5.6K".
- Change R374 from "47K" to "BN_47K".
- Change R97 from "0_0805" to "BN_0_0805".
- Change R446 from "3.3_1206" to "BN_3.3_1206".
- Change R369 from "33" to "BN_33".
- Change R370 from "@33" to "B@33".
- Change R379,R376,R377 from "@0" to "B@0".
- Change L41 from "HB1M2012-601JT" to "BN_HB1M2012-601JT".
A A
- Change X2 from "8MHZ" to "BN_8MHZ".
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
5
4
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Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
45 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (7) LIST
Revision History
D D
Date: 2000/12/20 REV#: 3.0 Description: C2-TEST for H1.6/MP-TEST for H1.5
12/20/2000
1. Fix C0-step after CPU (page 4)
- Change U7 P1 pin power source from "+VCPU_IO" to "+VCC_CORE".
2. Mini-PCI add 4 signal for 802.11b combo module (page 31)
- Add R483(10) for "REQ#0" signal on pin 21 of Mini-PCI connector (JP25) .
- Add R485(100) for "S_AD26" signal for IDSEL on pin 43 of Mini-PCI connector (JP25) .
- Add R484(10) for "GNT#0" signal on pin 22 of Mini-PCI connector (JP25) .
- Add R486(10) for "PME#" signal for 802.11b device on pin 36 of Mini PCI connector (JP25) .
3. Fix Microphone feedback sound issue
- Add new signal (AUTO_GAIN_CONTROL) output from U3 (ESS1988) pin 49 (Page 17) that connect U44 pin 4 (Page 26).
4. Cap ac i to r ch a ng e va l u e t o me t I n te l 1GHz CPU requirement (page 4)
C C
- C299, C300 change value from 1UF to 10UF.
- C292, C354 change value from 0.1UF to 10UF.
- C309, C350, C364, C361 change value from 0.01UF to 10UF.
- C298, C349 change value from 1000PF to 10UF.
12/26/2000 Power Change List For Hurricane 1. 6
1. Use MAX1711 instead of AD3421 (Control PWM IC) and AD3410 (Driver) in CPU-CORE circuitry. (page 36)
2. One MOSFET (FDS7764A) is reserved for 21.1A peak current in 1GHz Intel CPU. (page 36)
3. PU1 4 i s a dd e d fo r 2 . 5V C L K _V C C (T h e L i n ea r r e gu l a to r is included in AD3421 for original LA733 design). (page 36)
Date: 2000/02/02 REV#: 4.0 Description: MP-TEST
02/02/2001
B B
1. Fix 1GHz CPU voltage transient issue (page 4)
- C555, C319, C326 and C303 change value from 0.01UF to 0.1UF.
- C554 and C325 change value from 1000PF to 0.1UF.
2. Del R97 (0 ohm_0805) because of PCB trace connected. (page 28)
02/02/2001 Power Change List For Hurricane 1. 6
1. PR92 change value from 174K to 200K for "CPU_IO" voltage down from 1.58V to 1.5V. (page 37)
2. PR215 change value from 150K to 215K for current limit protection. (page 36)
3. Add PR226 (2.2 Ohm) for EMI requirement. (page 36)
4. Add PC184, PC185, PC186, PC187 and PC188 6 pcs capaciator those value all are 0.1UF_0805_25V for EMI requirement. (page 36)
5. Add one circuit for EMI requirement. (page 38)
- Add PQ116 (2N7002).
- Add PC190 (0.47UF_0805) and PC191 (1000PF).
A A
- Add PD45 (ISSS355).
- Add PR230 (470 Ohm).
- Reserved PR229 (0 Ohm), PR228 (0 Ohm) and PR227 (2.2K_0805).
- Reserved PQ115 (2N7002).
- Reserved PC189 (1UF_0805).
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
4
3
2
Compal Electronics, inc.
Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
46 47Tuesday, August 21, 2001
1
of
5
4
3
2
1
P.I.R. (8) LIST
Revision History
D D
Date: 2001/03/05 REV#: 4A Description: C3-TEST for H1.6/MP-TEST for H1.5
03/05/2001
1. Modify the Res.'s value to meet U36 NM24C16 2nd source's SPEC (Page 26) .
- R397,R398,R399 change value from 100K ohm to 1K ohm .
2. Modify the FIR related C.K.T. to fix the nun-work issue (Page 28) .
- Cut the connection between C115.2,C111.2,C525.2,U9.8 and GND signal .
- Connect C115.2,C111.2,C525.2,U9.8 to JOPEN11.1 .
- Connect JOPEN11.2 to JOPEN10.1 .
- Connect JOPEN10.2 to GND signal near C98 side .
3. Make a table to show the H1.5/H1.6 ID selection (Page 25) .
- Remove R416(10K ohm),R479(10K ohm) and add R420(10K ohm) when selected for H1.6 Celeron .
- Remove R416(10K ohm),R420(10K ohm) and add R479(10K ohm) when selected for H1.6 PIII .
C C
- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
- Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron .
4. Add three resistors for EMI solution (Page 17) .
- Add L17,L13,L3 (0 ohm 0805) to fix the EMI issue .
03/09/2001
1. Add R488 10K ohm Res. for platform ID (Page 25) .
- C3-test (REV:4A) M/B lose it . It will be put into REV:4B M/B and rework on REV:4A .
03/19/2001
1. Return the making table for showing the H1.5/H1.6 ID selection action (Page 25) .
- Add R416(10K ohm),R479(10K ohm) and remove R420(10K ohm) when selected for H1.6 Celeron .
- Add R416(10K ohm),R420(10K ohm) and remove R479(10K ohm) when selected for H1.6 PIII .
- Remove R479(10K ohm) and add R420(10K ohm),R416(10K ohm) when selected for H1.5 PIII .
- Remove R420(10K ohm) and add R479(10K ohm),R416(10K ohm) when selected for H1.5 Celeron .
B B
2. Cancel R488 10K ohm Res. rework for platform ID (Page 25) .
- C3-test cancel the R488(10K ohm) rework for platform ID selection action but still reserve that to connect GND on REV:4B PCB for future .
3. Change PR181 from 22uF_6.3V Tan. Cap. to 22uF_10V Ceramic Cap. for ME (Page 36) .
03/21/2001
1. Add CAP to fix FIR issue (Page 28) .
- Add C556(22U_10V_1206) to close C111 ASAP on REV:4B PCB . Put C556 to close C111 on REV:4A PCB by rework this time .
A A
Compal Electronics, inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.
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Title
SCHEMATIC, M/B LA-733
Size Document Number Rev
B
401138
Date: Sheet
47 47Tuesday, August 21, 2001
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