Acer LA-5651P Schematic BTN

5

4

COMPAL CONFIDENTIAL

3

2

1

MODEL NAME:
PCB NAME:

D D

COMPAL P/N:
REVISION:
DATE:

C C

2009/10/28

FD1FD1

1

H1

H_2P5H1H_2P5

1

6/26 Update hole
8/10 Update hole

ZZZ1

ZZZ1

DA4@

DA4@

PCB

PCB

DA20000IF10

DA20000IF10

NAV60

LS-5659P BTN/B

DA20000IF10

1.0

H2

H_1P6NH2H_1P6N

1

FD4FD4

FD3FD3

1

1

H3

H4

H_5P5NH3H_5P5N

H4

H_2P1X1P6N

H_2P1X1P6N

1

1

FD2FD2

1

CONN@

CONN@

ACES_85201-0605

ACES_85201-0605

1
2
3
4
5
6

JP1

JP1

Hot bar

To M/B Conn.

+5VS

2

@

@

C2

C2

100P_0402_50V8J

100P_0402_50V8J

1

TP_DATA

2

@

@

C3

C3

100P_0402_50V8J

100P_0402_50V8J

1

+5VS

C1

C1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Close JP1

To TP/B Conn.

+5VS
TP_CLK
TP_DATATP_CLK
LEFT_BTN#
RIGHT_BTN#
GND

JP2

JP2

1

1

2

2

3

3

4

4

5

5

7

6

6

8

ACES_85201-0605

ACES_85201-0605

CONN@

CONN@

Hot bar

7
8

ZZZ2

ZZZ2

B B

FFC

FFC

NBX0000LG00

NBX0000LG00

ZZZ3

ZZZ3

FFC

FFC

NBX0000LI00

NBX0000LI00

A A

45@

45@

LEFT_BTN#

SW1 is left bottom, SW2 is right bottom on layout status.

45@

45@

LEFT_BTN# RIGHT_BTN#

5

4

SW1

SW1
EVQPLHA15_4P

EVQPLHA15_4P

3

4

5

1

2

6

6/26 Update SW1

、、、、

SW2

3

SW2

SW2
EVQPLHA15_4P

EVQPLHA15_4P

3

4

5

1

2

6

2

RIGHT_BTN#

2

3

D1

D1
PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BTN/B

BTN/B

Custom

Custom

Custom

BTN/B

NAV60 LS-5659P

NAV60 LS-5659P

NAV60 LS-5659P

1

0.1

0.1

1 1Wednesday, October 28, 2009

1 1Wednesday, October 28, 2009

1 1Wednesday, October 28, 2009

0.1