Acer LA-2251 Schematics

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LA-2251

1 1

2 2

Compal confidential

Schematics Document

DT TRANSPORT or Prescott uFCPGA
with Sis661FX+Sis963L core logic

3 3

4 4

A

B

2004-05-17

REV:1.0

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Title

Size Document Number Rev

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

LA-2251

E

1.0

of

147Monday, May 17, 2004

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B

C

D

E

Compal confidential

File Name :LA-2251

1 1

CRT Conn.

page 17

W/O EXT VGA CHIP

LVDS Encoder

LCD Conn

page 17

SiS 302ELV

Fan Control

page 16

DVL

page 7

1.8V

Intel Northwood/Prescott Processor

uFCBGA-479/uFCPGA-478 CPU

page 4,5,6

H_A#(3..31)

FSB

533/800MHz

H_D#(0..63)

SiS 661FX

BGA 839 pin

page 8,9,10,11

Thermal Sensor
ADM1032AR

page 7

Memory BUS(DDR)

2.5V 200MHz DDR-266/333/400

USB1.1

MIAN CLOCK
GENERATOR
ICS952013CF

DDR-SO-DIMM X2

BANK 0, 1, 2, 3

BT/USB KEY

page 14,15

page 29

page 12

DDR CLOCK
BUFFER
ICS93722

page 13

USB2.0

3.3V 48MHz

2 2

RJ45 CONN

page 25

Mini PCI
socket

page 26

IDSEL:AD17/AD21
(PIRQB#,GNT#1/4,REQ#1/4)

3 3

TRANSFOMOR
H0013

3.3V 33 MHz

IEEE 1394
VIA-VT6301S

page 24

IDSEL:AD16
(PIRQA#,GNT#0,REQ#0)

PCI BUS

LAN`S PHY
RTL8201CL

page 25page 25

CardBus Controller

ENE CB1410

Slot 0

page 23

IDSEL:AD20
(PIRQA#,GNT#2,REQ#2)

page 23

RTC CKT.

page 18

Power OK CKT.

page 35

Power On/Off CKT.

page 32

Touch Pad

EC I/O Buffer

4 4

DC/DC Interface CKT.

page 36

ENE KB910
LPC K/B CTRL

page 32

page 34

page 33

Int.KBD

BIOS

page 32

page 34

MuTIOL

1.8V 133MHz 4x

SiS 963L

BGA 371 pin

page 18,19,20,21

LPC BUS

3.3V 33MHz

3.3V 24.576MHz

AC-LINK

3.3V

Primary IDE

ATA-133

Secondary IDE

ATA-133

PARALLEL

USB conn x3

Audio Codec
ALC250

MDC & BT Conn.

Mini-PCI solt

HDD
Connector

CDROM
Connector

VIA VT1211

Super I/O

page 31

page 29

page 27

page 29

page 26

page 22

page 22

page 30

AMP & Audio Jack

page 28

RJ11 CONN

page 29

FDD

page 31

Power Circuit DC/DC

page 37,38,39,40,41,42,43,44,45

A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Block Diagram

LA-2251

E

1.0

of

247Monday, May 17, 2004

Voltage Rails

A

Power Plane

VIN
B+
+CPU_CORE Core voltage for CPU
+1.2V
+1.25VS
+1.8VALW 1.8V always on power rail ON*ON*ON
+1.8VS 1.8V switched power rail for SIS M661FX NB. OFF

+3VS OFF

+5VS
+12VALW
RTCVCC

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Description

Adapter power supply (19V)
AC or battery power rail for power circuit.

The voltage(1.2V) for Processor VID select

1.25V switched power rail for DDR Vtt

2.5V system power rail for DDR ON+2.5V ON OFF

3.3V switched power rail

5V switched power rail OFF
12V always on power rail
RTC power

S3

S0-S1

N/AONN/A

N/A

N/A

N/A
ON

OFF
OFF

ON

OFF

OFF

ON

ON+3VALW ON3.3V always on power rail
ON OFF

ON

ON

OFF

ON

ON

ON
ON

ON

S5

N/A
OFF
OFF
OFF

OFFON OFF2.5V switched power rail for DDR Clock Buffer+2.5VS
ON*

ON*+5VALW 5V always on power rail

ON*
ON

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build
FIR@ : means just build when FIR Module build in .

External PCI Devices

1 1

NB Internal VGA
AGP BUS
SOUTHBRIDGE
USB
AC97
ATA 100
ETHERNET
1394
LAN
CARD BUS
Wireless LAN(MINI PCI)

Note: PLACE CLOSE TO M661FX,

L

USE 10/10 WIDTH/SPACE

IDSEL # PIRQREQ/GNT #DEVICE

N/A
AGP_DEVSEL
AD13 (INT.)
AD14 (INT.)
AD13 (INT.)
AD13 (INT.)
AD15 (INT.)
AD16
AD19
AD20
AD17/AD21

N/A
N/A
N/A
N/A
N/A
N/A
N/A
0
3
2
1/4

A

A
N/A
E/F/H

C

A

D

A

D

A

B

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0
1
2
3
4
5
6
7 NC

100K +/- 5%Ra

Rb V min

0

8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

Board ID

0
1
2
3
4

PCB Revision

0.1

0.2

0.3

0.4

1.0

5
6
7

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Notes List

LA-2251

of

347Monday, May 17, 2004

1.0

5

4

+CPU_CORE

3

2

1

D D

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

C C

H_REQ#[0..4]8

H_ADS#8

R48

62_0402_5%@

+CPU_CORE
+CPU_CORE

B B

R49

1 2

1 2

H_BR0#8

H_BPRI#8

H_BNR#8

H_LOCK#8

CK_BCLK12

CK_BCLK#12

H_HIT#8

H_HITM#8

H_DEFER#8

51_0402_5%

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_IERR#

CK_BCLK
CK_BCLK#

AF22
AF23

A10

A12

A14

A16

A18

A20

AA10

AA12

AA14

AA16

AA18

AA8

AB11

AB13

AB15

AB17

AB19

AB7

AB9

AC10

AC12

AC14

AC16

AC18

AC8

AD11

AD13

AD15

AD17

AD19

AD7

AD9

AE10

AE12

AE14

AE16

AE18

AE20

AE6

AE8

AF11

AF13

AF15

AF17

AF19

AF2

AF21

AF5

AF7

AF9

B11

B13

B15

B17

B19

C10

C12

C14

C16

C18

C20

D11

D13

D15

D17

D19

D9

VCC_65C8VCC_66

VCC_84

VCC_85

F9

F11

VCC_67

VCC_68

VCC_69

VCC_70

VCC_77

VCC_78

VCC_79E8VCC_80

E18

E20

+CPU_CORE

1 2

E10

VCC_71D7VCC_72

VCC_73

VCC_74

VCC_75

VCC_76

AMP_3-1565030-1_Prescott

E12

E14

E16

D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

12

R50
47K_0402_5%

3 1

H_D#[0..63] 8H_A#[3..31]8

2

B

+5VS+5VS

12

R51
47K_0402_5%

1

C

Q9
2SC2411K_SC59

E

3

H_BOOTSELECT 43

CHECK WITH Power Team

H_D#0

B21

D#0

H_D#1

B22

D#1

H_D#2

A23

D#2

H_D#3

A25

D#3

H_D#4

C21

D#4

H_D#5

D22

D#5

H_D#6

B24

D#6

H_D#7

C23

D#7

H_D#8

C24

D#8

H_D#9

B25

D#9

H_D#10

G22

H_D#11

H21

H_D#12

C26

H_D#13

D23

H_D#14

J21

H_D#15

D25

H_D#16

H22

H_D#17

E24

H_D#18

G23

H_D#19

F23

H_D#20

F24

H_D#21

E25

H_D#22

F26

H_D#23

D26

H_D#24

L21

H_D#25

G26

H_D#26

H24

H_D#27

M21

H_D#28

L22

H_D#29

J24

H_D#30

K23

H_D#31

H25

H_D#32

M23

H_D#33

N22

H_D#34

P21

H_D#35

M24

H_D#36

N23

H_D#37

M26

H_D#38

N26

H_D#39

N25

H_D#40

R21

H_D#41

P24

H_D#42

R25

H_D#43

R24

H_D#44

T26

H_D#45

T25

H_D#46

T22

H_D#47

T23

H_D#48

U26

H_D#49

U24

H_D#50

U23

H_D#51

V25

H_D#52

U21

H_D#53

V22

H_D#54

V24

H_D#55

W26

H_D#56

Y26

H_D#57

W25

H_D#58

Y23

H_D#59

Y24

H_D#60

Y21

H_D#61

AA25

H_D#62

AA22

H_D#63

AA24

2

Q10

MMBT3904_SOT23

JP25A

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6A8VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56B7VCC_57B9VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

AD4

VSS_54

AD8

VSS_55

AD1

12

BOOTSELECT

VCC_81

F13

R53
100K_0402_5%

VCC_64

VCC_82

VCC_83

F15

F17

F19

R52 22K_0402_5%

K2

A#3

K4

A#4

L6

A#5

K1

A#6

L3

A#7

M6

A#8

L2

A#9

M3

A#10

M4

A#11

N1

A#12

M1

A#13

N2

A#14

N4

A#15

N5

A#16

T1

A#17

R2

A#18

P3

A#19

P4

A#20

R3

A#21

T2

A#22

U1

A#23

P6

A#24

U3

A#25

T4

A#26

V2

A#27

R6

A#28

W1

A#29

T5

A#30

U4

A#31

V3

A#32

W2

A#33

Y1

A#34

AB1

A#35

J1

REQ#0

K5

REQ#1

J4

REQ#2

J3

REQ#3

H3

REQ#4

G1

ADS#

AC1

AP#0

V5

AP#1

AA3

BINIT#

AC3

IERR#

H6

BR0#

D2

BPRI#

G2

BNR#

G4

LOCK#

BCLK0
BCLK1

F3

HIT#

E3

HITM#

E2

DEFER#

VSS_0H1VSS_1H4VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12A3VSS_13A9VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

A11

A13

A15

A17

A19

A21

A24

H23

H26

A26

AA1

AA4

AA11

AA13

AA15

AA17

AA19

AA23

AA26

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

AA7

AA9

AB10

AB12

AB14

AB16

Prescott

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

AB3

AB6

AB8

AB18

AB20

AB21

AB24

AC11

AC13

AC15

AC17

AC19

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

AC2

AC5

AC7

AC9

AC22

AC25

AD10

AD12

AD14

AD16

AD18

AD21

AD23

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Prescott Processor in uFCPGA478

LA-2251

1

447Monday, May 17, 2004

1.0

of

5

+CPU_CORE

56_0402_5%

R18

R20

R21

D D

R22

R23

C C

B B

+CPU_CORE

+CPU_CORE

A A

H_FERR#

1 2

56_0402_5%

H_THERMTRIP#

1 2

62_0402_5%

H_PROCHOT#

1 2

51_0402_5%

H_PWRGOOD

1 2

56_0402_5%

H_RESET#

1 2

+CPU_CORE

L1 LQG21F4R7N00_0805

1 2

1 2

L2 LQG21F4R7N00_0805

PLL Layout note :

1.Place cap within 600 mils of
the VCCA and VSSA pins.

2.H_VCCIOPLL,HVCCA,HVSSA trace wide
12 mils(min)

R36

54.9_0603_1%

ITP_TDO

1 2

If CPU is P4 , Change the resistor
R546 value to 75_0603_1%

R38

54.9_0603_1%

ITP_DBRESET#

1 2

Close to the ITP

R39

47_0402_5%

If CPU is P4 , Change the resistor
R550 value to 39_0402_5%

1 2

150_0402_5%

If CPU is P4 , Change the resistor
R556 value to 27.4_0402_5%

R45 47_0402_5%

ITP_TMS

12

R43

ITP_TDI

ITP_TCK

12

Place near SB200 (U6)

Place near CPU

R22-->62ohm for Prescott C-step Processor

+CPU_CORE

Note: Please change to 10uH, DC current
of 100mA parts and close to cap

33U_D2_8M_R35

C71

H_RS#[0..2]8

H_TRDY#8

H_A20M#18

H_FERR#18

H_IGNNE#18

H_PWRGOOD8

H_STPCLK#18

H_INIT#18

H_RESET#8

H_DBSY#8

H_DRDY#8

BSEL012
BSEL112

H_THERMDA7
H_THERMDC7

H_THERMTRIP#7,18

R29 56_0402_5%

1 2

R30 56_0402_5%

1 2
1 8
2 7
3 6
4 5

RP2 56_0804_8P4R_5%

1

1

C72

+

+

2

2

33U_D2_8M_R35

H_SMI#18

H_INTR18

H_NMI18

H_VCCA

VCCSENSE43

VSSSENSE43

+1.2V

H_VSSA

R31

CK_ITP12

CK_ITP#12

R32

51.1_0402_1%

If CPU is P4 , Change the
resistor R32,R33 value to

51.1_0603_1%,or prescott

61.9_0603_1%

Close to the CPU

R47

1 2

680_0603_5%

Between the CPU and ITP

ITP_TRST#

5

H_RS#0
H_RS#1
H_RS#2

H_FERR#

H_PWRGOOD

H_RESET#

H_THERMDA
H_THERMDC

H_THERMTRIP#

ITP_BPM#0
ITP_BPM#1
ITP_BPM#2
ITP_BPM#3
ITP_BPM#4
ITP_BPM#5

ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#

1 2

0_0402_5%

12

12

CPUCLK_STP#12,18,43

4

CK_ITP
CK_ITP#

COMP0
COMP1

R33

51.1_0402_1%

4

AB23

AB25

AD20
AE23

AD22

AC26
AD26

AB2

AD6
AD5

AC6
AB5
AC4

AA5
AB4

AF3

F1
G5
F4

J6

C6
B6
B2
B5

Y4
D1

E5

W5

H5
H2

B3
C4

A2

Y6

D4
C1
D5
F7
E6

A5
A4

L24

P1

JP25B

RS#0
RS#1
RS#2
RSP#
TRDY#

A20M#
FERR#
IGNNE#
SMI#
PWRGOOD
STPCLK#

LINT0
LINT1
INIT#
RESET#

DBSY#
DRDY#
BSEL0
BSEL1

THERMDA
THERMDC

THERMTRIP#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5

TCK
TDI
TDO
TMS
TRST#

VCCIOPLL
VCCA

VCCSENSE
VSSSENSE
VCCVIDLB

VSSA

ITP_CLK0
ITP_CLK1

COMP0
COMP1

R539

1 2

12K_0402_5%

AE11

AE13

AE15

AE17

VSS_57

VSS_58

VSS_59

VSS_129F8VSS_130

VSS_131

G21

G24

R40

4.7K_0402_5%

2

AE19

AE22

AE24

VSS_60

VSS_61

VSS_62

VSS_132G3VSS_133G6VSS_134J2VSS_135

J22

+3VS

12

3 1

AE7

AE9

AF1

AF10

AF12

VSS_63

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_136

VSS_137J5VSS_138

VSS_139

VSS_140K3VSS_141K6VSS_142L1VSS_143

J25

K21

K24

VID_PWRGD42,43

Q45
MMBT3904_SOT23

AF14

AF16

VSS_70

VSS_71

2

AF18

AF20

AF6

AF8

B10

VSS_72

VSS_73

VSS_75

VSS_76

VSS_144

VSS_145L4VSS_146M2VSS_147

L23

L26

M22

R37

4.7K_0402_5%

Q8
MMBT3904_SOT23

3 1

B12

B14

VSS_77

VSS_78

VSS_79

VSS_148

VSS_149M5VSS_150

M25

+3VS

CPU_STP#

B16

N21

12

B18

VSS_80

N24

B20

B23

VSS_81

VSS_82

VSS_151

VSS_152N3VSS_153N6VSS_154P2VSS_155

VSS_83

B26

VSS_84

P22

+3VS

2

3

C11

VSS_85B4VSS_86B8VSS_87

VSS_156

P25

12

R35

4.7K_0402_5%

1

O

3

C13

C15

C17

C19

C22

C25

D10

D12

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92C2VSS_93

VSS_94

VSS_95C5VSS_96C7VSS_97C9VSS_98

Prescott

VSS_157P5VSS_158R1VSS_159

VSS_160

VSS_161R4VSS_162

VSS_163

VSS_164T3VSS_165T6VSS_166U2VSS_167

VSS_168

T21

T24

R23

R26

U22

U25

H_VID_PWRGD

13

D

2

G

Q6

Q7

G3I

DTC124EK_SC59

S

2N7002 1N_SOT23

+CPU_CORE

R_A

R_B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D14

D16

D18

D20

D21

D24

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106D3VSS_107D6VSS_108D8VSS_109E1VSS_110

VSS_169U5VSS_170V1VSS_171

VSS_172

VSS_173V4VSS_174

VSS_175

VSS_176W3VSS_177W6VSS_178Y2VSS_179

V23

V26

W21

W24

GTL Reference Voltage

Layout note :

12

R44

49.9_0402_1%

12

R46
100_0402_1%

E11

E13

E15

E17

E19

E23

E26

F10

F12

F14

F16

F18

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117E4VSS_118E7VSS_119E9VSS_120

VSS_121

VSS_122

VSS_123

VID0

VID1

VID2

VID3

VSS_180

VSS_181

Y5

Y22

Y25

2

C74

0.1U_0402_10V6K

1

VID4

VIDPWRGD

VID5

AE5

AE4

AE3

AE2

AE1

AD2

AD3

VID0
VID1
VID2
VID3
VID4
VID5

1. +CPU_GTLREF Trace wide
12mils(min),Space 15mils

2. Place R_A and R_B near CPU.

3. Place decoupling cap 220PF near CPU.

+CPU_GTLREF

1

C75
220P_0402_25V8K

2

2

F22

F25

F5

VSS_124

VSS_125F2VSS_126

VSS_127

OPTIMIZED/COMPAT#

AF4

1

2

2

R19 0_0402_5%@

1 2

AF26

VSS_128

SKTOCC#

DP#0
DP#1
DP#2
DP#3

GTLREF0
GTLREF1
GTLREF2
GTLREF3

TESTHI0
TESTHI1
TESTHI2
TESTHI3
TESTHI4
TESTHI5
TESTHI6
TESTHI7
TESTHI8

TESTHI9
TESTHI10
TESTHI11
TESTHI12

DSTBN#0
DSTBN#1
DSTBN#2
DSTBN#3

DSTBP#0
DSTBP#1
DSTBP#2
DSTBP#3

ADSTB#0
ADSTB#1

DBI#0
DBI#1
DBI#2
DBI#3

DBR#

PROCHOT#

MCERR#

SLP#

NC1
NC2
NC3
NC4
NC5

VCCVID

AMP_3-1565030-1_Prescott

+1.2V

C73

0.1U_0402_10V6K

R34 2.43K_0603_1%

1 2

H_VID_PWRGD

J26
K25

+CPU_GTLREF

K26
L25

AA21
AA6
F20
F6

R24 0_0402_5%

AE26

AD24

H_TESTHI0_1

AA2
AC21
AC20

H_TESTHI2_7

AC24
AC23
AA20
AB22

H_TESTHI8

U6

H_TESTHI9

W4

H_TESTHI10

Y3

H_TESTHI11

A6

H_DPSLP#

AD25

H_TESTHI12

E22
K22
R22
W22

F21
J23
P23
W23

L5
R5

E21
G25
P26
V21

ITP_DBRESET#

AE25

H_PROCHOT#

C3
V6
AB26

A22
A7
AF25
AF24
AE21

1

1 2

R25 56_0402_5%

1 2

R573 56_0402_5%

1 2

RP1 56_0804_8P4R_5%

1 8
2 7
3 6
4 5

R27 56_0402_5%

1 2

R28 56_0402_5%

1 2

H_DSTBN#0 8
H_DSTBN#1 8
H_DSTBN#2 8
H_DSTBN#3 8

H_DSTBP#0 8
H_DSTBP#1 8
H_DSTBP#2 8
H_DSTBP#3 8

H_ADSTB#0 8
H_ADSTB#1 8

H_DINV#0 8
H_DINV#1 8
H_DINV#2 8
H_DINV#3 8

H_PROCHOT# 18
H_CPUSLP# 18

+1.2V

VID543
VID443
VID343

VID243
VID143
VID043

Title

Size Document Number Rev

Date: Sheet

+CPU_CORE

CPU_STP#

VID5

R41 1K_0402_5%

1 2

VID4

R42 1K_0402_5%

1 2

VID3
VID2
VID1
VID0

18
27
36
45

RP3 1K_1206_8P4R_5%

Compal Electronics, Inc.

Prescott Processor in uFCPGA478

LA-2251

1

547Monday, May 17, 2004

CPU_GHI# 18

+3VS

of

1.0

5

4

3

2

1

+CPU_CORE

1

C23
22U_1206_16V4Z

2

D D

+CPU_CORE

1

C34
22U_1206_16V4Z

2

+CPU_CORE

1

C44
22U_1206_16V4Z

2

C C

+CPU_CORE

1

C46
22U_1206_16V4Z

2

1

C24
22U_1206_16V4Z

2

1

C35
22U_1206_16V4Z

2

1

C45
22U_1206_16V4Z

2

1

C47
22U_1206_16V4Z

2

1

C25
22U_1206_16V4Z

2

1

C36
22U_1206_16V4Z

2

1

C48
22U_1206_16V4Z

2

Place 11 North of Socket(Stuff 6)

1

C26
22U_1206_16V4Z

2

1

C27
22U_1206_16V4Z

2

1

2

Place 12 Inside Socket(Stuff all)

1

C37
22U_1206_16V4Z

2

1

C38
22U_1206_16V4Z

2

1

2

Place 9 South of Socket(Unstuff all)

1

C49
22U_1206_16V4Z

2

1

C50
22U_1206_16V4Z

2

1

2

C28
22U_1206_16V4Z

C39
22U_1206_16V4Z

C51
22U_1206_16V4Z

1

C29
22U_1206_16V4Z

2

1

C40
22U_1206_16V4Z

2

1

C52
22U_1206_16V4Z

2

1

C30
22U_1206_16V4Z

2

1

C41
22U_1206_16V4Z

2

1

C53
22U_1206_16V4Z

2

1

C31
22U_1206_16V4Z

2

1

C42
22U_1206_16V4Z

2

1

C54
22U_1206_16V4Z

2

1

C32
22U_1206_16V4Z

2

1

C43
22U_1206_16V4Z

2

1

C33
22U_1206_16V4Z

2

B B

+CPU_CORE

1

C55

+

470U_D2_2.5VM

2

+CPU_CORE

1

C66

+

470U_D2_2.5VM

2

A A

1

C56

+

470U_D2_2.5VM

2

1

C67

+

470U_D2_2.5VM

2

5

1

C57

+

470U_D2_2.5VM

2

1

C68

+

330U_D2E_2.5VM@

2

1

C58

+

330U_D2E_2.5VM@

2

1

C69

+

470U_D2_2.5VM

2

1

C59

+

470U_D2_2.5VM

2

1

C70

+

470U_D2_2.5VM

2

4

3

Place Inside Socket around the edge

+CPU_CORE

1

C60

0.22U_0603_10V7K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C61

0.22U_0603_10V7K

2

1

C62

0.22U_0603_10V7K

2

1

C63

0.22U_0603_10V7K

2

2

1

C64

0.22U_0603_10V7K

2

1

C65

0.22U_0603_10V7K

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CPU Decoupling

LA-2251

1

1.0

of

647Monday, May 17, 2004

5

4

3

2

1

Thermal Sensor ADM1032AR

+3VALW

W=15mil

12

R535
0_0402_5%

D D

12

R9

10K_0402_5%@

1

C11

2200P_0402_25V7K

C C

2

+CPU_CORE

2

C10

1

0.1U_0402_16V4Z

W=15mil

1

H_THERMDA

2

H_THERMDC

3

THERM#

R10 300_0402_5%

1 2

H_THERMTRIP#

Note: PLACE C10 CLOSE TO U1.1

L

U1

VDD
D+

ALERT#

D­THERM#4GND

ADM1032AR_SOP8

Address:1001_100X

SCLK

SDATA

H_THERMDA
H_THERMDC

8
7
6
5

C12 1U_0603_10V4Z@

Q3

CBE

2SC2411K_SC59

123

1 2

H_THERMDA 5
H_THERMDC 5

EC_SMC_2 33
EC_SMD_2 33

MAINPWON 37,38,40H_THERMTRIP#5,18

FAN CONN.1FAN CONN. 2

Fan Control circuit Fan Control circuit

+5VS+12VALW

2

C13

0.1U_0402_16V4Z

EN_FAN233

B B

R16

13K_0603_1%

1 2

1

5

U2

1

P

+

3

-

G

LM321MF_SOT23-5

2

C17

1 2

2200P_0603_16V7K@

1 2

R14 7.32K_0603_1%

D3

RB751V_SOD323

6

2

1

D

Q4

G

FAN2_ON FAN1_ON

3

4

O

2 1

S

SI3456DV-T1_TSOP6

4 5

0.001U_0402_50V7M@

FAN2_VOUT

FANSPEED233

1

C19
10U_0805_10V4Z

2

1

C15

2

C21

0.001U_0402_50V7M

+3VS

12

1

2

R12
10K_0402_5%

JP27

1
2
3

MOLEX_53398-0390

EN_FAN133

13K_0603_1%

0.1U_0402_16V4Z

R17

C14

1 2

2

1

5

U3

1

P

+

O

3

-

G

LM321MF_SOT23-5

2

C18

1 2

2200P_0603_16V7K@

1 2

R15 7.32K_0603_1%

D4

RB751V_SOD323

4

2 1

3

1

G

+5VS+12VALW

6

2

D

S

4 5

FAN1_VOUT

1

C20
10U_0805_10V4Z

2

Q5

SI3456DV-T1_TSOP6

0.001U_0402_50V7M@

FANSPEED133

0.001U_0402_50V7M

+3VS

1

12

C16

R13
10K_0402_5%

2

C22

1

2

JP28

1
2
3

MOLEX_53398-0390

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CPU Thermal Sensor&FAN CTRL

LA-2251

1

747Monday, May 17, 2004

1.0

of

5

4

3

2

1

ZCLK0

10_0402_5%@

ZDREQ
ZUREQ

ZSTB#0
ZSTB0

ZSTB#1
ZSTB1

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16

ZVREF

ZCMP_P
ZCMP_N

Z4XAVDD
Z4XAVSS

ZAD[0..16]

R498

12

U18D

AL6

ZCLK

AK5

ZDREQ

AL4

ZUREQ

AJ3

ZSTB0#

AJ2

ZSTB0

AF2

ZSTB1#

AE3

ZSTB1

AH5

ZAD0

AK2

ZAD1

AJ4

ZAD2

AJ6

ZAD3

AH2

ZAD4

AH4

ZAD5

AG3

ZAD6

AG6

ZAD7

AF4

ZAD8

AG2

ZAD9

AF5

ZAD10

AG4

ZAD11

AD2

ZAD12

AE6

ZAD13

AE2

ZAD14

AE4

ZAD15

AL3

ZAD16

AK4

ZVREF

AD4

ZCOMP_P

AD5

ZCOMP_N

AN1

Z1XAVDD

AM2

Z1XAVSS

AL2

Z4XAVDD

AL1

Z4XAVSS

D4

NC_0

D5

NC_1

AM5

NC_2

E11

NC_3

F11

NC_4

F13

NC_5

AL33

NC_6

AM34

NC_7

A9

NC_8

SISM661FX_BGA839

M661FX

MuTIOL

POWER

AUX_IVDD

AUX3.3

IVDD_0
IVDD_1
IVDD_2
IVDD_3
IVDD_4
IVDD_5
IVDD_6
IVDD_7
IVDD_8

IVDD_9
IVDD_10
IVDD_11
IVDD_12
IVDD_13
IVDD_14
IVDD_15
IVDD_16
IVDD_17
IVDD_18
IVDD_19
IVDD_20
IVDD_21
IVDD_22
IVDD_23
IVDD_24
IVDD_25
IVDD_26
IVDD_27
IVDD_28
IVDD_29
IVDD_30
IVDD_31

PVDD_0
PVDD_1
PVDD_2
PVDD_3
PVDD_4
PVDD_5
PVDD_6
PVDD_7
PVDD_8

VDDZ_0
VDDZ_1
VDDZ_2
VDDZ_3
VDDZ_4
VDDZ_5
VDDZ_6
VDDZ_7
VDDZ_8
VDDZ_9

VDDZ_10
VDDZ_11
VDDZ_12

VDD3.3_0
VDD3.3_1
VDD3.3_2

AB12
AC12

N13
N14
N16
N18
N19
N21
N23
N24
P13
P24
T24
V24
W13
Y24
AA24
AB13
AC24
AD13
AD15
AD17
AD19
AD21
AD23
AD24
R13
U13
AA13
B16
C16
D16
E16
F15

N22
N20
R24
T13
U24
V13
W24
Y13
N15

AH3
AJ1
AK3
AM3
W11
W12
Y11
Y12
AA12
AD3
AE1
AF3
AG1

L17
M17
N17

+1.8VALW

+3VALW

+1.8VS

+1.8VS

+1.8VS

+3VS

+3VS

661 solder side

+1.8VS

+1.8VS

661 solder side

VDD3.3

C338 0.1U_0402_16V7K

1 2

C339 0.1U_0402_16V7K

1 2

C340 0.1U_0402_16V7K@

1 2

C341 0.1U_0402_16V7K@

1 2

IVDD

C342 0.1U_0402_16V7K

1 2

C343 0.1U_0402_16V7K

1 2

C344 0.1U_0402_16V7K

1 2

C628 10U_0805_10V4Z

1 2

C346 0.1U_0402_16V7K

1 2

C347 0.1U_0402_16V7K

1 2

C348 0.1U_0402_16V7K

1 2

C349 0.1U_0402_16V7K

1 2

C351 0.1U_0402_16V7K

1 2

PVDD/VDDZ

C352 0.1U_0402_16V7K

1 2

C629 10U_0805_10V4Z

1 2

C630 1U_0603_10V4Z

1 2

C353 0.1U_0402_16V7K

1 2

C354 0.1U_0402_16V7K

1 2

C355 0.1U_0402_16V7K

1 2

U18A

AA34

HA3#

Y32

HA4#

AA31

HA5#

AA35

HA6#

AB33

HA7#

AB32

HA8#

AB35

HA9#

AC34

HA10#

AC31

HA11#

AD35

HA12#

AC35

HA13#

AD33

HA14#

AD32

HA15#

AC33

HA16#

AG34

HA17#

AF33

HA18#

AE34

HA19#

AE33

HA20#

AE35

HA21#

AF35

HA22#

AH35

HA23#

AE31

HA24#

AG35

HA25#

AH32

HA26#

AJ34

HA27#

AF32

HA28#

AJ35

HA29#

AG33

HA30#

AH33

HA31#

Y35

HREQ0#

W33

HREQ1#

W31

HREQ2#

Y33

HREQ3#

W35

HREQ4#

AG31

HASTB1#

AA33

HASTB0#

AJ31

CPUCLK

AJ33

CPUCLK#

V35

ADS#

V33

BNR#

U31

BREQ0#

R34

BPRI#

F22

CPUPWRGD

U33

DBSY#

T35

DEFER#

R36

DPWR#

W34

DRDY#

U34

HIT#

R35

HITM#

T33

HLOCK#

V32

HTRDY#

U35

RS#0

T32

RS#1

R33

RS#2

AA26

HVREF0

W26

HVREF1

U26

HVREF2

R26

HVREF3

L20

HVREF4

B22

HCOMPVREF_N

D22

HCOMP_P

C22

HCOMP_N

B23

CPURST#

SISM661FX_BGA839

M661FX

HOST

HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#

HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#

HDSTBP0#
HDSTBP1#
HDSTBP2#

HDSTBP3#
HDSTBN0#
HDSTBN1#
HDSTBN2#
HDSTBN3#

DBI0#
DBI1#
DBI2#
DBI3#

P35
N35
N34
L34
P33
P32
M33
M35
L35
K35
L33
L31
K33
N33
K32
J35
H33
G35
J31
J33
F35
H35
G34
J34
F32
E35
D34
E33
F33
C35
G31
D35
D33
D31
E31
B34
D32
B35
B33
C33
D29
C32
B31
B30
C30
B29
F28
E29
B28
C28
D28
B27
E27
D26
D27
B26
B25
C26
F24
D25
D23
B24
E23
C24

M32
H32
D30
E25
N31
G33
F30
D24
R31
E34
B32
F26

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2

H_DSTBN#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

+1.8VS

H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5

1 2

14_0402_1%

1 2

100_0402_1%

H_DINV#[0..3]
H_D#[0..63]

H_A#[3..31]
H_REQ#[0..4]

HNCOMP

Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP

HPCOMP

Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP

H_ADSTB#15
H_ADSTB#05

CLK_NB_BCLK12

CLK_NB_BCLK#12

H_ADS#4

H_BNR#4

H_BR0#4

H_BPRI#4

H_DBSY#5

H_DEFER#4

H_DRDY#5

H_HIT#4

H_HITM#4

H_LOCK#4

H_TRDY#5

H_RS#05
H_RS#15
H_RS#25

H_RESET#5

H_DINV#[0..3]5

H_D#[0..63]4

D D

C C

B B

H_A#[3..31]4

H_REQ#[0..4]4

+CPU_CORE

R199

R200

H_A#3
H_A#4
H_A#5

H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#1
H_ADSTB#0

CLK_NB_BCLK
CLK_NB_BCLK#

H_ADS#
H_BNR#
H_BR0#
H_BPRI#
H_PWRGOOD_NB
H_DBSY#
H_DEFER#

H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#
H_RS#0
H_RS#1
H_RS#2

HVREF
HNCVREF
HPCOMP

HNCOMP

H_RESET#

12

R201
150_0402_1%

12

R203
51_0402_5%

C677

12

15P_0402_50V8J@

ZAD[0..16]18

ZCLK012

ZDREQ18
ZUREQ18

ZSTB#018

ZSTB018

ZSTB#118

ZSTB118

1

C345

0.1U_0402_16V7K

2

1

C350

0.1U_0402_16V7K

2

+CPU_CORE +CPU_CORE+3VALW

12

R532

470_0402_5%@

H_PWRGOOD_SB18

A A

H_PWRGOOD5

5

12

R533

1K_0402_5%@

Reserve for Prescott C-step Processor

2

G

1 3

Q44

D

S

2N7002_SOT23@

R534 0_0402_5%

1 2

H_PWRGOOD_NB

4

12

R205
75_0402_1%

12

R208
150_0402_1%

1

C356

0.01U_0402_16V7K

2

1

C361

2

0.01U_0402_16V7K

place this capacitor
under 660FX solder side

HVREF

1

C362

0.1U_0402_16V7K

2

12

R206
150_0402_1%

12

R209
75_0402_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C357

0.01U_0402_16V7K

2

1

C363

0.01U_0402_16V7K

2

HNCVREF

+1.8VS

1

2

+3VS

1

2

L23

1 2

0_0603_5%
C358
10U_0805_10V4Z

L24

1 2

0_0603_5%
C364

4.7U_0805_10V4Z

1

C359

2

0.1U_0402_16V7K

1

C365

2

0.1U_0402_16V7K

2

R204 56_0402_5%

1 2

1

C360

0.01U_0402_16V7K

2

R207 56_0402_5%

1 2

Z4XAVDD

1

C366

0.01U_0402_16V7K

2

Z4XAVSS

Title

Size Document Number Rev

Date: Sheet

ZCMP_N

ZCMP_P

Compal Electronics, Inc.

M661FX-1 (HOST/HyperZip/Powers)

LA-2251

1

1.0

of

847Monday, May 17, 2004

5

4

3

2

1

RSYNC

C369

C372

L28

1 2

0_0603_5%

LSYNC
CSYNC VB

RSYNC
LSYNC
CSYNC

ENTEST
PM_PWRGD
EC_RSMRST#

VVBWN

VCOMP

DACAVDD

DACAVSS

+3VS

1

C383

4.7U_0805_10V4Z

2

D D

VAD[0..11]16
VBD[0..11]16

VBCTL[0..1]16

VAD[0..11]
VBD[0..11]
VBCTL[0..1]

C30~C34 is noise issue(Optional Use)

VAD10
VAD11

12

R528

1

C697

2

VAVSYNC
VAHSYNC

VBD11
VBD10

VBCTL0
VBCTL1
VBHSYNC
VBVSYNC

12

AGCLK
BGCLK

BCAD

BHCLK

CLK_AGP_66M

10_0402_5%@

15P_0402_50V8J@

VADE

VBDE

VADE16
VAVSYNC16
VAHSYNC16

VBDE16

VBHSYNC16
VBVSYNC16

C C

B B

A A

C718

15P_0402_50V8J

VAGCLK16
VBGCLK16

VBHCLK16

CLK_AGP_66M12

VBCLK16

R566

12

12_0402_5%

R216

1 2

10_0402_5%

R217

1 2

10_0402_5%

R218

R221

1 2

0_0402_5%

1 2

0_0402_5%

VBCAD16

VBD7
VBD6
VBD5
VBD4
VBD3
VBD2
VBD1
VBD0
VAD6
VAD5
VAD4
VAD7
VAD8
VAD9

VBD8
VBD9
VAD1
VAD0
VAD2
VAD3

U18C

Y5

AAD0/VBD7

W4

AAD1/VBD6

V2

AAD2/VBD5

W6

AAD3/VBD4

V4

AAD4/VBD3

U2

AAD5/VBD2

V5

AAD6/VBD1

U4

AAD7/VBD0

R2

AAD8/VAD6

T4

AAD9/VAD5

R3

AAD10/VAD4

T5

AAD11/VAD7

P2

AAD12/VAD8

R4

AAD13/VAD9

N2

AAD14/VAD10

R6

AAD15/VAD11

L3

AAD16/VADE

L4

AAD17/VAVSYNC

K2

AAD18/VAHSYNC

L6

AAD19/VBD11

J2

AAD20/VBD10

J3

AAD21/VBD8

K4

AAD22/VBD9

J4

AAD23/VAD1

J6

AAD24/VAD0

H4

AAD25/VAD2

G3

AAD26/VAD3

H5

AAD27/VBDE

F2

AAD28/VBCTL0

G4

AAD29/VBCTL1

E2

AAD30/VBHSYNC

G6

AAD31/VBVSYNC

B3

SBA0/VBCLK

E6

SBA1

B2

SBA2

E4

SBA3

F5

SBA4

D2

SBA5

F4

SBA6

E3

SBA7

C2

SB_STB

D3

SB_STB#

T2

AD_STB0/VAGCLK

U3

AD_STB0#/VAGCLKN

G2

AD_STB1/VBGCLK

H2

AD_STB1#/VBGCLKN

U6

AC/BE0#

P4

AC/BE1#

M5

AC/BE2#

K5

AC/BE3#

C6

AREQ#/VBCAD

E8

AGNT#

N6

AFRAME#

M4

AIRDY#

N4

ATRDY#

L2

ADEVSEL#

P5

ASERR#

M2

ASTOP#

N3

APAR

D7

RBF#/VBHCLK

B4

WBF#/AGPIO2

C7

GC_DET#

B6

ST0

F7

ST1

B5

ST2

C4

ADBIHI/PIPE#

D6

ADBILO

D8

AGPCLK

SISM661FX_BGA839

M661FX

VGAMISC

LVDS/AGP

AGP3.0 = 50 ohm

50_1%

43.75_1%

R224

1 2

49.9_0402_1%

R225

1 2

43.2_0402_1%

AGPRCOMN

AGPRCOMP

VOSCI

ROUT
GOUT
BOUT

HSYNC
VSYNC

VGPIO0
VGPIO1

INTA#

CSYNC
RSYNC

LSYNC

VCOMP

VRSET

VVBWN

DACAVDD1

DACAVSS1

DACAVDD2

DACAVSS2

DCLKAVDD

DCLKAVSS
ECLKAVDD

ECLKAVSS

PCIRST#

PWROK

AUXOK

TRAP1

TRAP0
TESTMODE2
TESTMODE1
TESTMODE0

DLLEN#
ENTEST

A1XAVDD
A1XAVSS

A4XAVDD
A4XAVSS

C1XAVDD
C1XAVSS

C4XAVDD
C4XAVSS

AGPCOMP_N
AGPCOMP_P

AGPVREF

AGPVSSREF

+1.8VS

A15
B12

B13
A13

A11
B11

E13
C11

C10
D12

E12
D11

E15
D15
E14

D13
C12

D14
C13

B15
C15

B14
C14

AN2
AM4

AN3
F9

D10
C9
B9
B10
E10
D9

B8
C8

A7
B7

AK34
AL36

AK35
AJ36

Y2
W2

W3
Y4

R499

10_0402_5%@

CSYNC
RSYNC
LSYNC

VCOMP
VRSET
VVBWN

DACAVDD
DACAVSS

DACAVDD
DACAVSS

DCLKAVDD
DCLKAVSS

ECLKAVDD

ECLKAVSS

NB_RST#
PM_PWRGD

EC_RSMRST#

ENTEST

A4XAVDD
A4XAVSS

C4XAVDD
C4XAVSS

AGPRCOMN
AGPRCOMP

AVREFGC

1 2

C678

1 2

15P_0402_50V8J@

REFCLK0 12,16
CRT_R 17

CRT_G 17
CRT_B 17

CRT_HSYNC 17
CRT_VSYNC 17

3VDDCCL 17
3VDDCDA 17

PCI_PIRQA# 16,20,23,24

NB_RST# 16,20
PM_PWRGD 18,35

EC_RSMRST# 18,25,33

AVREFGC

C387

0.1U_0402_16V7K

DCLKAVDD

DCLKAVSS

ECLKAVDD

ECLKAVSS

300_0402_1%

1

300_0402_1%

2

1

C367

2

0.01U_0402_16V7K

1

C370

2

0.01U_0402_16V7K

+1.8VS

12

R222

12

R223

0.1U_0402_16V7K

L25

1 2

0_0603_5%

1

C368

0.1U_0402_16V7K

2

L26

1 2

0_0603_5%

1

C371

0.1U_0402_16V7K

2

C381

A4XAVSS

+3VS

1

2

4.7U_0805_10V4Z

+3VS

1

2

4.7U_0805_10V4Z

1

1

C382

2

2

0.01U_0402_16V7K

panel link

C375

1 2

0.1U_0402_16V7K

C376

1 2

0.1U_0402_16V7K

0.1U_0402_16V7K

VGA

1
1
1

R210 4.7K_0402_5%

1 2

R211 4.7K_0402_5%@

1 2

R212 4.7K_0402_5%@

1 2

R213 4.7K_0402_5%

1 2

C373 0.1U_0402_16V4Z@

1 2

C374 0.1U_0402_16V4Z

1 2

VRSET

L27

1 2

0_0603_5%

1

1

C378

C377

1U_0603_10V4Z

2

2

C4XAVDDA4XAVDD

1

1

C385

2

2

0.01U_0402_16V7K

C4XAVSS

0.1U_0402_16V7K

C384

+1.8VS

1

C379
10U_0805_10V4Z

2

L29

1 2

0_0603_5%

0
0
0

+3VS

+3VS

1

2

12

R214
130_0402_5%

130 1%

C386

4.7U_0805_10V4Z

Enable Disable

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

M661FX-1 (LVDS/AGP/VGA/MISC)

LA-2251

947Monday, May 17, 2004

1

1.0

of

5

4

3

2

1

Note: PLACE CLOSE TO DIMM0,and between NB chip and DIMM0

L

RP48

DDRA_DQ3

1 4

DDRA_DQ4

2 3

DDRA_DQ1

D D

C C

?

B B

A A

DDRA_DQ0

DDRA_DQ6
DDRA_DQ7

DDRA_DQ5
DDRA_DQ2

R241 10_0402_5%

DDRA_DM0

R243 10_0402_5%

DDRA_DQ8
DDRA_DQ13

DDRA_DQ9
DDRA_DQ12

DDRA_DQ10
DDRA_DQ15

DDRA_DQ14
DDRA_DQ11

DDRA_DQS1

R227 10_0402_5%

DDRA_DM1

R228 10_0402_5%

DDRA_DQ20
DDRA_DQ17

DDRA_DQ18
DDRA_DQ21

DDRA_DQ16
DDRA_DQ22

DDRA_DQ19
DDRA_DQ23

DDRA_DM2

R249 10_0402_5%

DDRA_DQS2

R253 10_0402_5%

DDRA_DQ30
DDRA_DQ28

DDRA_DQ31
DDRA_DQ25

DDRA_DQ29
DDRA_DQ24

DDRA_DQ27
DDRA_DQ26

R257 10_0402_5%

R260 10_0402_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

DDRA_SDQ3
DDRA_SDQ4

10_0404_4P2R_5%

RP51

DDRA_SDQ1
DDRA_SDQ0

10_0404_4P2R_5%

RP53

10_0404_4P2R_5%

RP55

DDRA_SDQ5
DDRA_SDQ2

10_0404_4P2R_5%

DDRA_SDQS0DDRA_DQS0

12

DDRA_SDM0

12

RP36

DDRA_SDQ8
DDRA_SDQ13

10_0404_4P2R_5%

RP39

DDRA_SDQ9
DDRA_SDQ12

10_0404_4P2R_5%

RP42

DDRA_SDQ10
DDRA_SDQ15

10_0404_4P2R_5%

RP45

DDRA_SDQ14
DDRA_SDQ11

10_0404_4P2R_5%

DDRA_SDQS1

12

DDRA_SDM1

12

RP57

DDRA_SDQ20
DDRA_SDQ17

10_0404_4P2R_5%

RP59

DDRA_SDQ18
DDRA_SDQ21

10_0404_4P2R_5%

RP61

DDRA_SDQ16
DDRA_SDQ22

10_0404_4P2R_5%

RP63

DDRA_SDQ19
DDRA_SDQ23

10_0404_4P2R_5%

DDRA_SDM2

12

DDRA_SDQS2

12

RP65

DDRA_SDQ30
DDRA_SDQ28

10_0404_4P2R_5%

RP67

DDRA_SDQ31
DDRA_SDQ25

10_0404_4P2R_5%

RP69

DDRA_SDQ29
DDRA_SDQ24

10_0404_4P2R_5%

RP71

DDRA_SDQ27
DDRA_SDQ26

10_0404_4P2R_5%

DDRA_SDQS3DDRA_DQS3

12

DDRA_SDM3DDRA_DM3

12

DDRA_SDQ6
DDRA_SDQ7

DDRA_DQ32
DDRA_DQ36

DDRA_DQ33
DDRA_DQ37

DDRA_DQ34

DDRA_DQ35
DDRA_DQ39

DDRA_DQS4

DDRA_DM4

DDRA_DQ45
DDRA_DQ40

DDRA_DQ42
DDRA_DQ41

DDRA_DQ43
DDRA_DQ44

DDRA_DQ46

DDRA_DQS5

DDRA_DM5

DDRA_DQ54 DDRA_SDQ54

DDRA_DQ49 DDRA_SDQ49

DDRA_DQ50 DDRA_SDQ50
DDRA_DQ55

DDRA_DQ51
DDRA_DQ52

DDRA_DQS6

DDRA_DM6 DDRA_SDM6

DDRA_DQ56 DDRA_SDQ56

DDRA_DQ62
DDRA_DQ61 DDRA_SDQ61

DDRA_DQ63
DDRA_DQ60 DDRA_SDQ60

DDRA_DQ59
DDRA_DQ57

DDRA_DQS7

DDRA_DM7

RP35

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R226 10_0402_5%

R229 10_0402_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R242 10_0402_5%

R244 10_0402_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R258 10_0402_5%

R261 10_0402_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R250 10_0402_5%

R254 10_0402_5%

DDRA_SDQ32
DDRA_SDQ36

10_0404_4P2R_5%

RP38

DDRA_SDQ33
DDRA_SDQ37

10_0404_4P2R_5%

RP41

DDRA_SDQ38DDRA_DQ38
DDRA_SDQ34

10_0404_4P2R_5%

RP44

DDRA_SDQ35
DDRA_SDQ39

10_0404_4P2R_5%

DDRA_SDQS4

12

DDRA_SDM4

12

RP49

DDRA_SDQ45
DDRA_SDQ40

10_0404_4P2R_5%

RP52

DDRA_SDQ42
DDRA_SDQ41

10_0404_4P2R_5%

RP54

DDRA_SDQ43
DDRA_SDQ44

10_0404_4P2R_5%

RP56

DDRA_SDQ47DDRA_DQ47
DDRA_SDQ46

10_0404_4P2R_5%

DDRA_SDQS5

12

DDRA_SDM5

12

RP66

DDRA_SDQ48DDRA_DQ48

10_0404_4P2R_5%

RP68

DDRA_SDQ53DDRA_DQ53

10_0404_4P2R_5%

RP70

DDRA_SDQ55

10_0404_4P2R_5%

RP72

DDRA_SDQ51
DDRA_SDQ52

10_0404_4P2R_5%

DDRA_SDQS6

12

12

RP58

DDRA_SDQ58DDRA_DQ58

10_0404_4P2R_5%

RP60

DDRA_SDQ62

10_0404_4P2R_5%

RP62

DDRA_SDQ63

10_0404_4P2R_5%

RP64

DDRA_SDQ59
DDRA_SDQ57

10_0404_4P2R_5%

DDRA_SDQS7

12

DDRA_SDM7

12

DDRA_SDM[0..7]

DDRA_SDQ[0..63]

DDRA_SDQS[0..7]

DDRA_SMA[0..15]

DDRA_DQ0
DDRA_DQ1
DDRA_DQ2
DDRA_DQ3
DDRA_DQ4
DDRA_DQ5
DDRA_DQ6
DDRA_DQ7
DDRA_DQ8
DDRA_DQ9
DDRA_DQ10
DDRA_DQ11
DDRA_DQ12
DDRA_DQ13
DDRA_DQ14
DDRA_DQ15
DDRA_DQ16
DDRA_DQ17
DDRA_DQ18
DDRA_DQ19
DDRA_DQ20
DDRA_DQ21
DDRA_DQ22
DDRA_DQ23
DDRA_DQ24
DDRA_DQ25
DDRA_DQ26
DDRA_DQ27
DDRA_DQ28
DDRA_DQ29
DDRA_DQ30
DDRA_DQ31
DDRA_DQ32
DDRA_DQ33
DDRA_DQ34
DDRA_DQ35
DDRA_DQ36
DDRA_DQ37
DDRA_DQ38
DDRA_DQ39
DDRA_DQ40
DDRA_DQ41
DDRA_DQ42
DDRA_DQ43
DDRA_DQ44
DDRA_DQ45
DDRA_DQ46
DDRA_DQ47
DDRA_DQ48
DDRA_DQ49
DDRA_DQ50
DDRA_DQ51
DDRA_DQ52
DDRA_DQ53
DDRA_DQ54
DDRA_DQ55
DDRA_DQ56
DDRA_DQ57
DDRA_DQ58
DDRA_DQ59
DDRA_DQ60
DDRA_DQ61
DDRA_DQ62
DDRA_DQ63

DDRA_DM0
DDRA_DM1
DDRA_DM2
DDRA_DM3
DDRA_DM4
DDRA_DM5
DDRA_DM6
DDRA_DM7

DDRA_SDM[0..7] 14,15

DDRA_SDQ[0..63] 14,15

DDRA_SDQS[0..7] 14,15

DDRA_SMA[0..15] 14,15

U18B

AN35

MD0

AP36

MD1

AK33

MD2

AM33

MD3

AN34

MD4

AK32

MD5

AR34

MD6

AN33

MD7

AM32

MD8

AL31

MD9

AR31

MD10

AL30

MD11

AN32

MD12

AR33

MD13

AN31

MD14

AM31

MD15

AP30

MD16

AR30

MD17

AM29

MD18

AL27

MD19

AN30

MD20

AN29

MD21

AL28

MD22

AN28

MD23

AP26

MD24

AN25

MD25

AR24

MD26

AL24

MD27

AL25

MD28

AR26

MD29

AM25

MD30

AN24

MD31

AN21

MD32

AP20

MD33

AN20

MD34

AL18

MD35

AM21

MD36

AR21

MD37

AL19

MD38

AM19

MD39

AL15

MD40

AL14

MD41

AN15

MD42

AR15

MD43

AN16

MD44

AM15

MD45

AN14

MD46

AL13

MD47

AM13

MD48

AL12

MD49

AL11

MD50

AR12

MD51

AP14

MD52

AR14

MD53

AN13

MD54

AP12

MD55

AL10

MD56

AR11

MD57

AM9

MD58

AR9

MD59

AM11

MD60

AN11

MD61

AP10

MD62

AN9

MD63

AR35

DQM0

AR32

DQM1

AL29

DQM2

AP24

DQM3

AL20

DQM4

AP16

DQM5

AN12

DQM6

AN10

DQM7

SISM661FX_BGA839

40 ohms

DDRCOMN

40 ohms

DDRCOMP

M661FX

MEMORY

R259

1 2

40.2_0402_1%

R264

1 2

40.2_0402_1%

DQS0/CSB0#
DQS1/CSB1#
DQS2/CSB2#
DQS3/CSB3#
DQS4/CSB4#
DQS5/CSB5#
DQS6/CSB6#
DQS7/CSB7#

FWDSDCLKO

DDRCOMP_P

DDRCOMP_N

+2.5V

MA10
MA11
MA12
MA13
MA14

TEST1

SRAS#
SCAS#

SWE#

CS0#
CS1#
CS2#
CS3#
CS4#
CS5#

CKE0
CKE1
CKE2
CKE3
CKE4
CKE5

S3AUXSW#

DRAMTEST

DLLAVDD

DLLAVSS
DDRAVDD
DDRAVSS

TRAP2

DDRVREFA
DDRVREFB

DDRVREFB

AR23

MA0

AN23

MA1

AN22

MA2

AM23

MA3

AL23

MA4

AL26

MA5

AN26

MA6

AN27

MA7

AR27

MA8

AR28

MA9

AP22
AN18
AR22
AP28
AM27
AT14

AP34
AP32
AR29
AR25
AR20
AR16
AR13
AR10

AL17
AR19
AN19

AM17
AL16
AN17
AR17
AP18
AR18

AP4
AT3
AR3
AP3
AR2
AN4

AP2

AL21
AL22

AL35
AL34
AM35
AN36

AP1

AF16
AF23

AR8
AP8

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C391

2

1

C396

2

Note: PLACE CLOSE TO DIMM0,and between NB chip and DIMM0

L

DDRA_ADD0
DDRA_ADD1
DDRA_ADD2
DDRA_ADD3
DDRA_ADD4
DDRA_ADD5
DDRA_ADD6
DDRA_ADD7
DDRA_ADD8
DDRA_ADD9
DDRA_ADD10
DDRA_ADD13
DDRA_ADD14
DDRA_ADD11
DDRA_ADD12
DDRA_ADD15

DDRA_DQS0
DDRA_DQS1
DDRA_DQS2
DDRA_DQS3
DDRA_DQS4
DDRA_DQS5
DDRA_DQS6
DDRA_DQS7

DDRA_RAS#
DDRA_CAS#
DDRA_WE#

DDRA_CS#0
DDRA_CS#1
DDRA_CS#2
DDRA_CS#3

DDRA_CKE0
DDRA_CKE1
DDRA_CKE2
DDRA_CKE3

R245 4.7K_0402_5%

S3AUXSW#

ADCLKO

DLLAVDD
DLLAVSS
DDRAVDD
DDRAVSS

DDRVREFA
DDRVREFB

DDRCOMP
DDRCOMN

1 2

R246

1 2

22_0402_5%

+2.5V +2.5V

12

R255
150_0402_1%

12

R262
150_0402_1%

DDRA_RAS# DDR_RAS#
DDRA_WE#

DDRA_CS#0 DDR_CS#0
DDRA_CS#1
DDRA_CS#2
DDRA_CS#3 DDR_CS#3

S3AUXSW# 33

FWDSDCLKO

1

C398

2

0.01U_0402_16V7K

DDRVREFA

0.01U_0402_16V7K

RP34

0_0404_4P2R_5%

RP37

0_0404_4P2R_5%

RP40

0_0404_4P2R_5%

RP43

0_0404_4P2R_5%

RP46

0_0404_4P2R_5%

RP47

0_0404_4P2R_5%

RP50

0_0404_4P2R_5%

RP102

0_0404_4P2R_5%

12

R256
150_0402_1%

12

R263
150_0402_1%

DDRA_SMA13
DDRA_SMA10

DDRA_SMA1
DDRA_SMA3

DDRA_SMA0
DDRA_SMA2

DDRA_SMA5
DDRA_SMA7

DDRA_SMA4
DDRA_SMA6

DDRA_SMA8
DDRA_SMA11

DDRA_SMA9
DDRA_SMA12

DDRA_SMA15DDRA_ADD15

DLLAVDD

0.1U_0402_16V7K

DLLAVSS

DDRAVDD

0.1U_0402_16V7K

DDRAVSS

DDRA_ADD13
DDRA_ADD10

DDRA_ADD1
DDRA_ADD3

DDRA_ADD0
DDRA_ADD2

DDRA_ADD5
DDRA_ADD7

DDRA_ADD4
DDRA_ADD6

DDRA_ADD8
DDRA_ADD11

DDRA_ADD9
DDRA_ADD12

DDRA_ADD14 DDRA_SMA14

10P_0402_50V8J@

1

2

1

2

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

R230 0_0402_5%

1 2

R231 0_0402_5%

1 2

R232 0_0402_5%

1 2

R233 0_0402_5%

1 2

R234 0_0402_5%

1 2

R235 0_0402_5%

1 2

R236 0_0402_5%

1 2

R237 0_0402_5%

1 2

R238 0_0402_5%

1 2

R239 0_0402_5%

1 2

R240 0_0402_5%

1 2

+3VALW

FWDSDCLKO 13

C392

C397

DDR_CAS#DDRA_CAS#
DDR_WE#
DDR_CKE0DDRA_CKE0
DDR_CKE1DDRA_CKE1
DDR_CKE2DDRA_CKE2
DDR_CKE3DDRA_CKE3

DDR_CS#1
DDR_CS#2

C388

C393

1

2

0.01U_0402_16V7K

1

2

0.01U_0402_16V7K

DDR_RAS# 14,15
DDR_CAS# 14,15
DDR_WE# 14,15
DDR_CKE0 14,15
DDR_CKE1 14,15
DDR_CKE2 14,15
DDR_CKE3 14,15
DDR_CS#0 14,15
DDR_CS#1 14,15
DDR_CS#2 14,15
DDR_CS#3 14,15

L30

1 2

0_0603_5%

1

C389

2

L31

1 2

0_0603_5%

1

C394

2

+3VS

1

C390
10U_0805_10V4Z

2

+3VS

1

C395
10U_0805_10V4Z

2

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

M661FX-2 (MEMORY for DDR)

LA-2251

10 47Monday, May 17, 2004

1

1.0

of

5

+2.5V

D D

C C

+CPU_CORE

B B

U18E

AL7

VDDM_0

AL8

VDDM_1

AL9

VDDM_2

AM6

VDDM_3

AM7

VDDM_4

AM8

VDDM_5

AN5

VDDM_6

AN6

VDDM_7

AN7

VDDM_8

AN8

VDDM_9

AP5

VDDM_10

AP6

VDDM_11

AP7

VDDM_12

AR4

VDDM_13

AR5

VDDM_14

AR6

VDDM_15

AR7

VDDM_16

AT4

VDDM_17

AT5

VDDM_18

AT6

VDDM_19

AT7

VDDM_20

AB25

VDDM_21

AC25

VDDM_22

AD12

VDDM_23

AD25

VDDM_24

AE11

VDDM_25

AE12

VDDM_26

AE13

VDDM_27

AE14

VDDM_28

AE15

VDDM_29

AE16

VDDM_30

AE17

VDDM_31

AE18

VDDM_32

AE19

VDDM_33

AE20

VDDM_34

AE21

VDDM_35

AE22

VDDM_36

AE23

VDDM_37

AE24

VDDM_38

AE25

VDDM_39

AE26

VDDM_40

AF11

VDDM_41

AF12

VDDM_42

AF25

VDDM_43

AF26

VDDM_44

AD22

PVDDM_0

AD20

PVDDM_1

AD18

PVDDM_2

AD16

PVDDM_3

AD14

PVDDM_4

AC13

PVDDM_5

AB24

PVDDM_6

A17

VTT_0

A18

VTT_1

A19

VTT_2

A20

VTT_3

A21

VTT_4

B17

VTT_5

B18

VTT_6

B19

VTT_7

B20

VTT_8

B21

VTT_9

C17

VTT_10

C18

VTT_11

C19

VTT_12

C20

VTT_13

C21

VTT_14

SISM661FX_BGA839

M661FX

POWER

VDDQ_0
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8

VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33

VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49

AA1
AA2
AA3
AA4
AA5
AA6
AB1
AB2
AB3
AB4
AB5
AB6
AC1
AC2
AC3
AC4
AC5
AC6
L11
L12
L13
M11
M12
M13
M14
M15
M16
N11
N12
P12
R12
T12
U12
V12

D17
D18
D19
D20
D21
E17
E18
E19
E20
E21
F17
F18
F19
F20
F21
L25
L26
M18
M19
M20
M21
M22
M23
M24
M25
M26
N25
P25
R25
T25
U25
V25
W25
Y25
AA25

+1.8VS

+CPU_CORE

4

change to
DPWR# for 660

U18F

A3

VSS_0

A5

VSS_1

C1

VSS_2

C3

VSS_3

C5

VSS_4

E1

VSS_5

E5

VSS_6

E7

VSS_7

E9

VSS_8

F3

VSS_9

G1

VSS_10

G5

VSS_11

H3

VSS_12

J1

VSS_13

J5

VSS_14

K3

VSS_15

L1

VSS_16

L5

VSS_17

M3

VSS_18

N1

VSS_19

N5

VSS_20

P3

VSS_21

R1

VSS_22

R5

VSS_23

T3

VSS_24

U1

VSS_25

U5

VSS_26

V3

VSS_27

W1

VSS_28

W5

VSS_29

Y3

VSS_30

AE5

VSS_31

AG5

VSS_32

AJ5

VSS_33

AL5

VSS_34

A22

VSS_35

A24

VSS_36

A26

VSS_37

A28

VSS_38

A30

VSS_39

A32

VSS_40

A34

VSS_41

C23

VSS_42

C25

VSS_43

C27

VSS_44

C29

VSS_45

C31

VSS_46

C34

VSS_47

C36

VSS_48

E22

VSS_49

E24

VSS_50

E26

VSS_51

E28

VSS_52

E30

VSS_53

E32

VSS_54

E36

VSS_55

F34

VSS_56

G32

VSS_57

G36

VSS_58

H34

VSS_59

J32

VSS_60

J36

VSS_61

K34

VSS_62

L32

VSS_63

L36

VSS_64

M34

VSS_65

N32

VSS_66

N36

VSS_67

P34

VSS_68

R32

VSS_69

T34

VSS_70

U32

VSS_71

U36

VSS_72

V34

VSS_73

SISM661FX_BGA839

3

M661FX

GROUND

VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146

P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
T14
T15
T16
T17
T18
T19
T20
T21
T22
T23
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
V14
V15
V16
V17
V18
V19
V20
V21
V22
V23
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W32
W36
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
Y34

2

U18G

AA14
AA15
AA16
AA17
AA18
AA19
AA20
AA21
AA22
AA23
AA32
AA36
AB34
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC32
AC36
AD34
AE32
AE36
AF34
AG32
AG36

+1.8VS

C603 0.1U_0402_16V7K

1 2

C605 0.1U_0402_16V7K

1 2

C607 0.1U_0402_16V7K

1 2

C609 0.1U_0402_16V7K

1 2

Note: Place these capacitors under M661FX solder side

L

M661FX

VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187

SISM661FX_BGA839

VDDQ

GROUND

C602 0.1U_0402_16V7K

1 2

C604 0.1U_0402_16V7K

1 2

C606 0.1U_0402_16V7K

1 2

C608 0.1U_0402_16V7K

1 2

C610 0.1U_0402_16V7K

1 2

VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228

1

AH34
AJ32
AM10
AM12
AM14
AM16
AM18
AM20
AM22
AM24
AM26
AM28
AM30
AP9
AP11
AP13
AP15
AP17
AP19
AP21
AP23
AP25
AP27
AP29
AP31
AP33
AP35
AT8
AT10
AT12
AT16
AT18
AT20
AT22
AT24
AT26
AT28
AT30
AT32
AT34
AL32

change to
MA15 for
660

+3VALW

C631

10U_0805_10V4Z

C637

1U_0603_10V4Z

C618

0.1U_0402_16V7K

A A

5

1 2

1 2

1 2

AUX3.3

+3VALW

661 solder side

C615

1 2

0.1U_0402_16V7K

C619

1 2

0.1U_0402_16V7K

+CPU_CORE

C635

1 2

10U_0805_10V4Z

C641

1 2

10U_0805_10V4Z

+2.5V +3VALW

C660

1 2

0.1U_0402_16V7K

C659

1 2

0.1U_0402_16V7K

Note: Place these capacitors

L

between the +2.5V and +3VALW
Power Plane .

4

C613

1 2

0.1U_0402_16V7K

C642

1 2

1U_0603_10V4Z

C622

1 2

0.1U_0402_16V7K

C658

1 2

0.1U_0402_16V7K

C657

1 2

0.1U_0402_16V7K

+1.8VALW

C636

1 2

10U_0805_10V4Z

C617

1 2

0.1U_0402_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+2.5V

C632

10U_0805_10V4Z

C638

10U_0805_10V4Z

C643

10U_0805_10V4Z

C644

10U_0805_10V4Z

C730

220P_0402_50V7K

1 2

1 2

1 2

1 2

1 2

VDDM

C633

1 2

1U_0603_10V4Z

C639

1 2

1U_0603_10V4Z

C620

1 2

0.1U_0402_16V7K

C623

1 2

0.1U_0402_16V7K

C731

1 2

220P_0402_50V7K

2

C634

1 2

1U_0603_10V4Z

C640

1 2

1U_0603_10V4Z

C621

1 2

0.1U_0402_16V7K

C624

1 2

0.1U_0402_16V7K

C732

1 2

220P_0402_50V7K

Title

Size Document Number Rev

Date: Sheet

+2.5V

C611 0.1U_0402_16V7K

1 2

C612 0.1U_0402_16V7K

1 2

C614 0.1U_0402_16V7K

1 2

C616 0.1U_0402_16V7K

1 2

Note: Place these capacitors

L

under M661FX solder side

Compal Electronics, Inc.

M661FX-4 (Powers)

LA-2251

1

1.0

of

11 47Monday, May 17, 2004

5

4

3

2

1

+3VS

12

D D

C C

L34
HB-1M2012-121JT03_0805

Width=40 mils

0.1U_0402_10V6K

1

C407

2

10U_0805_10V4Z

C408

+3V_CLK

1

C409

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C410

2

SMB_CK_CLK113,14,18
SMB_CK_DAT113,14,18

PCICLK_STOP#18

CPUCLK_STP#5,18,43

VCORE_PWRGD35,43

0.1U_0402_10V6K

1

1

C412

C411

2

2

0.1U_0402_10V6K

+3VS

+3VS

C421 10P_0402_50V8K

1 2

14.31818MHZ_20P_6X1430004201
C422 10P_0402_50V8K

1 2

1

C413

2

0.1U_0402_10V6K

R493 10K_0402_5%

1 2

D26 RB751V_SOD323

R541 0_0402_5%@

1 2

R527 10K_0402_5%

1 2

R283

1 2

475_0402_1%

Main Clock Generator

1: (ICS:ICS952013)

0.1U_0402_10V6K

1

1

C414

2

21

Y2

2

0.1U_0402_10V6K

CLK_IREF

XTALIN_CLK

12

XTALOUT_CLK

1

2

C415

1

11

U21

VDDZ

VDDREF

35

SCLK

34

SDATA

12

PCI_STOP#

45

CPU_STOP#

33

PD#/VTT_PWRGD

38

IREF

6

XIN

7

XOUT

VSSREF5VSSZ8VSSPCI18VSSPCI24VSS4825VSSAGP32VSSCPU

19

VDDPCI13VDDPCI

29

28

VDD48

VDDAGP

+3V_VDD

42

36

48

VDDA

VDDSD

VDDCPU

CPUCLK0

CPUCLK#0

CPUCLK1

CPUCLK#1

SDCLK

AGPCLK0
AGPCLK1

ZCLK0
ZCLK1

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4

PCICLK5
PCICLK_F0/FS3
PCICLK_F1/FS4

REF0/FS0
REF1/FS1
REF2/FS2

12_48M/MULTISEL
24_48M/MULTISEL

VSSA

VSSSD

37

41

46

VSSA

L35

C419

10U_0805_10V4Z

1 2
1 2

1 2
1 2

1 2
1 2

1 2

1 2
1 2

1 2
1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2
1 2

12

+3VS

CHB2012U121_0805

1

C418

0.1U_0402_10V6K

CLK_BCLK
CLK_BCLK#

CLK_BCLK CK_BCLK

40
39

CLK_NB

44

CLK_NB# CLK_NB_BCLK#

43
47
31

30

R_ZCLK0

9

R_ZCLK1

10

PCI_MINI

16

PCI_PCM

17

PCI_1394 CLK_PCI_1394

20
21

PCI_SIO CLK_PCI_SIO

22
23

FS3

14

PCI_EC

15

FS0

2

FS1

3

FS2

4

R_CLK_USB_48M

27
26

ICS952013CF_SSOP48

2

R485 0_0402_5%@
R486 0_0402_5%@

R267 33_0402_1%
R268 33_0402_1%

R269 33_0402_1%
R270 33_0402_1%

R271 22_0402_1%

R272 22_0402_1%
R273 22_0402_1%

R276 33_0402_1%
R277 33_0402_1%
R542 33_0402_1%

R279 33_0402_1%
R274 33_0402_1%

R275 33_0402_1%
R280 33_0402_1%

R281 33_0402_1%
R282 33_0402_1%

R284 22_0402_1%
R285 22_0402_1%
R286 10K_0402_5%

1

2

+3V_VDD

1

C420

0.1U_0402_10V6K

2

VSSA

CK_BCLK#CLK_BCLK#
CLK_NB_BCLK

CLK_AGP_66MAGP_66M

ZCLK0
ZCLK1

CLK_PCI_MINI
CLK_PCI_PCM

CLK_PCI_SB
CLK_PCI_EC

REFCLK0
REFCLK1
CLK_14M_CODEC

CLK_USB_48M
CLK_LPC_48MMULTISEL

CK_ITP 5
CK_ITP# 5

CK_BCLK 4
CK_BCLK# 4

CLK_NB_BCLK 8
CLK_NB_BCLK# 8

CLK_AGP_66M 9

ZCLK0 8
ZCLK1 18

CLK_PCI_MINI 26
CLK_PCI_PCM 23

CLK_PCI_1394 24

CLK_PCI_SIO 30
CLK_PCI_SB 20

CLK_PCI_EC 33
REFCLK0 9,16

REFCLK1 18

CLK_14M_CODEC 27

CLK_USB_48M 19

CLK_LPC_48M 30

Place near to the Clock Outputs

CLK_AGP_66M
ZCLK0
ZCLK1
CLK_PCI_SB
CLK_PCI_EC
CLK_PCI_MINI
CLK_PCI_PCM
CLK_PCI_1394
CLK_PCI_SIO
REFCLK0
REFCLK1
CLK_USB_48M
CLK_LPC_48M

Place near to the Clock Outputs

CK_BCLK
CK_BCLK#

CLK_NB_BCLK
CLK_NB_BCLK#

R_CLK_USB_48M

C661 10P_0402_50V8K

1 2

C662 10P_0402_50V8K@

1 2

C663 10P_0402_50V8K@

1 2

C664 10P_0402_50V8K

1 2

C665 10P_0402_50V8K

1 2

C666 10P_0402_50V8K

1 2

C667 10P_0402_50V8K

1 2

C700 10P_0402_50V8K

1 2

C668 10P_0402_50V8K

1 2

C669 10P_0402_50V8K

1 2

C670 10P_0402_50V8K

1 2

C671 10P_0402_50V8K

1 2

C672 10P_0402_50V8K

1 2

R287 49.9_0402_1%

1 2

R288 49.9_0402_1%

1 2

R289 49.9_0402_1%

1 2

R290 49.9_0402_1%

1 2

R529 10K_0402_5%

1 2

B B

12

12

R293
10K_0402_5%

FS2
FS3

12

R294

4.7K_0402_5%

12

R295

4.7K_0402_5%

FS3 FS2

0 0
0 1
1 0

Title

Size Document Number Rev

2

Date: Sheet

CPU ZCLK AGP PCI

100 133 66 33
133 133 66 33
200 133 66 33

Compal Electronics, Inc.

Clock Generator

LA-2251

1

1.0

of

12 47Monday, May 17, 2004

+3V_CLK

12

R291

10K_0402_5%

FS0

BSEL15
BSEL05

A A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D15 RB751V_SOD323
D16 RB751V_SOD323

3

R292

10K_0402_5%

21
21

5

4

3

2

1

Clock Buffer (DDR)

1:(ICS:ICS93722)

D D

C C

+2.5VS C

L32

1 2

HB-1M2012-121JT03_0805

C399

10U_0805_10V4Z

L33

1 2

HB-1M2012-121JT03_0805

4.7U_0805_10V4Z

0.1U_0402_16V7K

1

1

C400

2

2

0.1U_0402_16V7K

D+2.5VS

0.1U_0402_16V7K

1

C403

2

FWDSDCLKO10

0.01U_0402_16V7K

1

C401

2

1

C404

2

0.01U_0402_16V7K

SMB_CK_CLK112,14,18
SMB_CK_DAT112,14,18

12

1

2

1

2

1

2

R500

C679

C402

C405

1

2

1

2

10_0402_5%@

15P_0402_50V8J@

C728
220P_0402_50V7K

C729
220P_0402_50V7K

SMB_CK_CLK1
SMB_CK_DAT1

FWDSDCLKO

U20

3

VDD2.5_0

12

VDD2.5_1

23

VDD2.5_2

10

VDDA

7

SCLK

22

SDATA

8

CLK_INT

20

FB_INT

9

N/C_0

18

N/C_1

21

N/C_2

ICS93722_SSOP28

CLK0

CLK#0

CLK1

CLK#1

CLK2

CLK#2

CLK3

CLK#3

CLK4

CLK#4

CLK5

CLK#5

FB_OUT

GND3
GND2
GND1
GND0

DDRA_CLK0

2

DDRA_CLK0#

1

DDRA_CLK1

4

DDRA_CLK1#

5
13

14

DDRA_CLK3

17

DDRA_CLK3#

16

DDRA_CLK4

24

DDRA_CLK4#

25
26

27

19
28

15
11
6

R265

FB_OUTFB_IN

1 2

22_0402_5%

DDRA_CLK0 14
DDRA_CLK0# 14

DDRA_CLK1 14
DDRA_CLK1# 14

DDRA_CLK3 14
DDRA_CLK3# 14

DDRA_CLK4 14
DDRA_CLK4# 14

FB_IN

1

C406
10P_0402_50V8K

2

B B

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR Clock Buffer

LA-2251

1

1.0

of

13 47Monday, May 17, 2004

5

4

3

2

1

R54
1K_0603_1%

R55
1K_0603_1%

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]
DDRA_SMA[0..15]
DDRA_SDM[0..7]

+2.5V

JP10

1

VREF

3

DDRA_SDQ2
DDRA_SDQ0

DDRA_SDQS0
DDRA_SDQ4

DDRA_SDQ7
DDRA_SDQ13

DDRA_SDQ12
DDRA_SDQS1

DDRA_SDQ15

DDRA_CLK013

DDRA_CLK0#13

DDR_CKE110,15

DDR_WE#10,15

DDR_CS#010,15

SMB_CK_DAT112,13,18

SMB_CK_CLK112,13,18

DDRA_SDQ11

DDRA_SDQ22
DDRA_SDQ17

DDRA_SDQS2
DDRA_SDQ21

DDRA_SDQ23
DDRA_SDQ28

DDRA_SDQ24
DDRA_SDQS3

DDRA_SDQ25
DDRA_SDQ26

DDRA_SMA12
DDRA_SMA9

DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SMA13
DDR_WE#
DDR_CS#0

DDRA_SDQ37
DDRA_SDQ36

DDRA_SDQS4
DDRA_SDQ34

DDRA_SDQ39
DDRA_SDQ40

DDRA_SDQ44
DDRA_SDQS5

DDRA_SDQ41
DDRA_SDQ46

DDRA_SDQ48
DDRA_SDQ49

DDRA_SDQS6
DDRA_SDQ52

DDRA_SDQ55
DDRA_SDQ61

DDRA_SDQ57
DDRA_SDQS7

DDRA_SDQ60
DDRA_SDQ58

SMB_CK_DAT1
SMB_CK_CLK1

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP_1565918-1

DIMM0

REVERSE

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

2
4

VSS

6

DQ4

8

DQ5

10

VDD

12

DM0

14

DQ6

16

VSS

18

DQ7

20
22

VDD

24
26

DM1

28

VSS

30
32
34

VDD

36

VDD

38

VSS

40

VSS

42
44
46

VDD

48

DM2

50
52

VSS

54
56
58

VDD

60
62

DM3

64

VSS

66
68
70

VDD

72

CB4

74

CB5

76

VSS

78

DM8

80

CB6

82

VDD

84

CB7

86
88

VSS

90

VSS

92

VDD

94

VDD

96
98
100

A11

102

A8

104

VSS

106

A6

108

A4

110

A2

112

A0

114

VDD

116

BA1

118
120
122

S1#

124

DU

126

VSS

128
130
132

VDD

134

DM4

136
138

VSS

140
142
144

VDD

146
148

DM5

150

VSS

152
154
156

VDD

158
160

CK1

162

VSS

164
166
168

VDD

170

DM6

172
174

VSS

176
178
180

VDD

182
184

DM7

186

VSS

188
190
192

VDD

194

SA0

196

SA1

198

SA2

200

DU

+2.5V

DDRA_SDQ5
DDRA_SDQ1

DDRA_SDM0
DDRA_SDQ3

DDRA_SDQ6
DDRA_SDQ8

DDRA_SDQ9
DDRA_SDM1

DDRA_SDQ10
DDRA_SDQ14

DDRA_SDQ16
DDRA_SDQ20

DDRA_SDM2
DDRA_SDQ18

DDRA_SDQ19
DDRA_SDQ30

DDRA_SDQ29
DDRA_SDM3

DDRA_SDQ31
DDRA_SDQ27

DDRA_SMA11
DDRA_SMA8

DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SMA14
DDR_RAS#
DDR_CAS#
DDR_CS#1

DDRA_SDQ33
DDRA_SDQ32

DDRA_SDM4
DDRA_SDQ38

DDRA_SDQ35
DDRA_SDQ45

DDRA_SDQ43
DDRA_SDM5

DDRA_SDQ42
DDRA_SDQ47

DDRA_SDQ54
DDRA_SDQ53

DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ50
DDRA_SDQ62

DDRA_SDQ59
DDRA_SDM7

DDRA_SDQ63
DDRA_SDQ56

0.1U_0402_16V4Z

DDR_CKE0 10,15

DDR_RAS# 10,15
DDR_CAS# 10,15
DDR_CS#1 10,15DDR_CS#3 10,15

DDRA_CLK1# 13
DDRA_CLK1 13

+2.5V

2

C77

0.1U_0402_16V4Z

C80

1

DDRA_VREF

2

2

C81

0.1U_0402_16V4Z

1

1

DDRA_VREF trace width of
20mils and space 20mils(min)

DDRA_SDQ[0..63]10,15
DDRA_SDQS[0..7]10,15

DDRA_SMA[0..15]10,15

DDRA_SDM[0..7]10,15

DDRA_VREF

C79

0.1U_0402_16V4Z

+2.5V+2.5V

12

12

D D

DDRA_CLK313

DDRA_CLK3#13

C C

DDR_CKE310,15

DDR_CS#210,15

B B

A A

+2.5V

JP29

1

VREF

3

DDRA_SDQ5
DDRA_SDQ1

DDRA_SDQS0
DDRA_SDQ3

DDRA_SDQ6
DDRA_SDQ8

DDRA_SDQ9
DDRA_SDQS1

DDRA_SDQ10
DDRA_SDQ14

DDRA_SDQ16
DDRA_SDQ20

DDRA_SDQS2
DDRA_SDQ18

DDRA_SDQ19
DDRA_SDQ30

DDRA_SDQ29
DDRA_SDQS3

DDRA_SDQ31
DDRA_SDQ27

DDRA_SMA12
DDRA_SMA9

DDRA_SMA7
DDRA_SMA5
DDRA_SMA3
DDRA_SMA1

DDRA_SMA10
DDRA_SMA13
DDR_WE#
DDR_CS#2
DDRA_SMA15 DDRA_SMA15

DDRA_SDQ33
DDRA_SDQ32

DDRA_SDQS4
DDRA_SDQ38

DDRA_SDQ35
DDRA_SDQ45

DDRA_SDQ43
DDRA_SDQS5

DDRA_SDQ42
DDRA_SDQ47

DDRA_SDQ54
DDRA_SDQ53

DDRA_SDQS6 DDRA_SDM6
DDRA_SDQ51

DDRA_SDQ50
DDRA_SDQ62

DDRA_SDQ59
DDRA_SDQS7

DDRA_SDQ63
DDRA_SDQ56

SMB_CK_DAT1
SMB_CK_CLK1

+3VS

VSS

5

DQ0

7

DQ1

9

VDD

11

DQS0

13

DQ2

15

VSS

17

DQ3

19

DQ8

21

VDD

23

DQ9

25

DQS1

27

VSS

29

DQ10

31

DQ11

33

VDD

35

CK0

37

CK0#

39

VSS

41

DQ16

43

DQ17

45

VDD

47

DQS2

49

DQ18

51

VSS

53

DQ19

55

DQ24

57

VDD

59

DQ25

61

DQS3

63

VSS

65

DQ26

67

DQ27

69

VDD

71

CB0

73

CB1

75

VSS

77

DQS8

79

CB2

81

VDD

83

CB3

85

DU

87

VSS

89

CK2

91

CK2#

93

VDD

95

CKE1

97

DU/A13

99

A12

101

A9

103

VSS

105

A7

107

A5

109

A3

111

A1

113

VDD

115

A10/AP

117

BA0

119

WE#

121

S0#

123

DU

125

VSS

127

DQ32

129

DQ33

131

VDD

133

DQS4

135

DQ34

137

VSS

139

DQ35

141

DQ40

143

VDD

145

DQ41

147

DQS5

149

VSS

151

DQ42

153

DQ43

155

VDD

157

VDD

159

VSS

161

VSS

163

DQ48

165

DQ49

167

VDD

169

DQS6

171

DQ50

173

VSS

175

DQ51

177

DQ56

179

VDD

181

DQ57

183

DQS7

185

VSS

187

DQ58

189

DQ59

191

VDD

193

SDA

195

SCL

197

VDD_SPD

199

VDD_ID

AMP_1565917-1

DIMM1

STANDARD

VREF

DQ12
DQ13

DQ14
DQ15

DQ20
DQ21

DQ22
DQ23

DQ28
DQ29

DQ30
DQ31

DU/RESET#

CKE0

DU/BA2

RAS#
CAS#

DQ36
DQ37

DQ38
DQ39

DQ44
DQ45

DQ46
DQ47

CK1#

DQ52
DQ53

DQ54
DQ55

DQ60
DQ61

DQ62
DQ63

2
4

VSS

6

DQ4

8

DQ5

10

VDD

12

DM0

14

DQ6

16

VSS

18

DQ7

20
22

VDD

24
26

DM1

28

VSS

30
32
34

VDD

36

VDD

38

VSS

40

VSS

42
44
46

VDD

48

DM2

50
52

VSS

54
56
58

VDD

60
62

DM3

64

VSS

66
68
70

VDD

72

CB4

74

CB5

76

VSS

78

DM8

80

CB6

82

VDD

84

CB7

86
88

VSS

90

VSS

92

VDD

94

VDD

96
98
100

A11

102

A8

104

VSS

106

A6

108

A4

110

A2

112

A0

114

VDD

116

BA1

118
120
122

S1#

124

DU

126

VSS

128
130
132

VDD

134

DM4

136
138

VSS

140
142
144

VDD

146
148

DM5

150

VSS

152
154
156

VDD

158
160

CK1

162

VSS

164
166
168

VDD

170

DM6

172
174

VSS

176
178
180

VDD

182
184

DM7

186

VSS

188
190
192

VDD

194

SA0

196

SA1

198

SA2

200

DU

+2.5V

DDRA_SDQ2
DDRA_SDQ0

DDRA_SDM0
DDRA_SDQ4

DDRA_SDQ7
DDRA_SDQ13

DDRA_SDQ12
DDRA_SDM1

DDRA_SDQ15
DDRA_SDQ11

DDRA_SDQ22
DDRA_SDQ17

DDRA_SDM2
DDRA_SDQ21

DDRA_SDQ23
DDRA_SDQ28

DDRA_SDQ24
DDRA_SDM3

DDRA_SDQ25
DDRA_SDQ26

DDRA_SMA11
DDRA_SMA8

DDRA_SMA6
DDRA_SMA4
DDRA_SMA2
DDRA_SMA0

DDRA_SMA14
DDR_RAS#
DDR_CAS#
DDR_CS#3

DDRA_SDQ37
DDRA_SDQ36

DDRA_SDM4
DDRA_SDQ34

DDRA_SDQ39
DDRA_SDQ40

DDRA_SDQ44
DDRA_SDM5

DDRA_SDQ41
DDRA_SDQ46

DDRA_SDQ48
DDRA_SDQ49

DDRA_SDQ52
DDRA_SDQ55

DDRA_SDQ61
DDRA_SDQ57

DDRA_SDM7
DDRA_SDQ60

DDRA_SDQ58

+3VS

2

C76

0.1U_0402_16V4Z

C78

0.1U_0402_16V4Z

DDR_CKE2 10,15

DDRA_CLK4# 13
DDRA_CLK4 13

1

2

2

1

1

DDRA_VREF trace width of

L L

20mils and space 20mils(min)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR-SODIMM SLOT1

LA-2251

1

14 47Monday, May 17, 2004

1.0

of

5

DDR Termination resistors & Decoupling caps

4

3

2

1

+1.25VS

DDRA_SMA12
DDRA_SMA9

DDRA_SDQ[0..63]10,14

D D

C C

B B

DDRA_SDQS[0..7]10,14

DDRA_SMA[0..15]10,14

DDRA_SDM[0..7]10,14

DDRA_SDQ[0..63]
DDRA_SDQS[0..7]
DDRA_SMA[0..15]
DDRA_SDM[0..7]

DDR_CAS#10,14

DDR_CS#010,14

DDR_RAS#10,14

DDR_CKE310,14

DDR_CKE110,14

DDR_CKE210,14

DDR_CKE010,14

DDR_WE#10,14

DDR_CS#110,14

DDR_CS#210,14

DDR_CS#310,14

DDRA_SMA7
DDRA_SMA11

DDRA_SMA8
DDRA_SMA6
DDRA_SMA4
DDRA_SMA5

DDRA_SMA3
DDRA_SMA1
DDRA_SMA10
DDRA_SMA2

DDRA_SMA0
DDRA_SMA14
DDRA_SMA13
DDRA_SMA15

DDR_CAS#

DDR_CS#0

DDR_RAS#

DDR_CKE3

DDR_CKE1

DDR_CKE2

DDR_CKE0

DDR_WE#

DDR_CS#1

DDR_CS#2

DDR_CS#3

RP14

33_0804_8P4R_5%

RP7

33_0804_8P4R_5%

RP17

33_0804_8P4R_5%

RP4

33_0804_8P4R_5%

1 2

R56 33_0402_5%

1 2

R57 47_0402_5%

1 2

R58 33_0402_5%

1 2

R59 33_0402_5%

1 2

R60 33_0402_5%

1 2

R61 33_0402_5%

1 2

R62 33_0402_5%

1 2

R63 33_0402_5%

1 2

R64 47_0402_5%

1 2

R65 47_0402_5%

1 2

R66 47_0402_5%

18
27
36
45

18
27
36
45

+1.25VS

18
27
36
45

18
27
36
45

C82 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C85 0.1U_0402_16V4Z

C88 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C91 0.1U_0402_16V4Z

C104 0.1U_0402_16V4Z

1 2
1 2

C105 0.1U_0402_16V4Z

C110 0.1U_0402_16V4Z

1 2
1 2

C111 0.1U_0402_16V4Z

+1.25VS

C120 0.1U_0402_16V4Z

1 2

1 2

C125 0.1U_0402_16V4Z

C130 0.1U_0402_16V4Z

1 2

1 2

C135 0.1U_0402_16V4Z

C136 0.1U_0402_16V4Z

1 2

1 2

C137 0.1U_0402_16V4Z

+2.5V

+2.5V

1

C98

22U_1206_10V4Z

2

+2.5V

+2.5V

+2.5V

+1.25VS

1

C99
22U_1206_10V4Z

2

DDRA_SDQ2
DDRA_SDQ5
DDRA_SDQ0
DDRA_SDQ1

DDRA_SDQS0
DDRA_SDM0
DDRA_SDQ4
DDRA_SDQ3

DDRA_SDQ7
DDRA_SDQ6
DDRA_SDQ13
DDRA_SDQ8

DDRA_SDQ12
DDRA_SDQ9
DDRA_SDQS1
DDRA_SDM1

DDRA_SDQ15
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ14

DDRA_SDQ22
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ20

DDRA_SDQS2
DDRA_SDM2
DDRA_SDQ21
DDRA_SDQ18

DDRA_SDQ23
DDRA_SDQ19
DDRA_SDQ28
DDRA_SDQ30

DDRA_SDQ24
DDRA_SDQ29
DDRA_SDQS3
DDRA_SDM3

DDRA_SDQ25
DDRA_SDQ31
DDRA_SDQ26
DDRA_SDQ27

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

33_0804_8P4R_5%

+1.25VS +1.25VS

RP5

RP8

RP10

RP15

RP12

RP18

RP20

RP22

RP24

RP26

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

18
27
36
45

C83 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C86 0.1U_0402_16V4Z

C89 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C92 0.1U_0402_16V4Z

C94 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C96 0.1U_0402_16V4Z

C100 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C102 0.1U_0402_16V4Z

C106 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C108 0.1U_0402_16V4Z

C112 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C114 0.1U_0402_16V4Z

C116 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C118 0.1U_0402_16V4Z

C121 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C123 0.1U_0402_16V4Z

C126 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C128 0.1U_0402_16V4Z

C131 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C133 0.1U_0402_16V4Z

DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ37
DDRA_SDQ36

DDRA_SDQ38
DDRA_SDQS4
DDRA_SDQ34
DDRA_SDM4

DDRA_SDQ40
DDRA_SDQ35
DDRA_SDQ45
DDRA_SDQ39

DDRA_SDM5
DDRA_SDQS5
DDRA_SDQ43
DDRA_SDQ44

DDRA_SDQ46
DDRA_SDQ41
DDRA_SDQ47
DDRA_SDQ42

DDRA_SDQ53
DDRA_SDQ49
DDRA_SDQ54
DDRA_SDQ48

DDRA_SDQ51
DDRA_SDQ52
DDRA_SDM6
DDRA_SDQS6

DDRA_SDQ62
DDRA_SDQ61
DDRA_SDQ50
DDRA_SDQ55

DDRA_SDM7
DDRA_SDQ57
DDRA_SDQS7
DDRA_SDQ59

DDRA_SDQ58
DDRA_SDQ60
DDRA_SDQ56
DDRA_SDQ63

RP9

18
27
36
45

33_0804_8P4R_5%

RP6

18
27
36
45

33_0804_8P4R_5%

RP11

18
27
36
45

33_0804_8P4R_5%

RP13

18
27
36
45

33_0804_8P4R_5%

RP16

18
27
36
45

33_0804_8P4R_5%

RP19

18
27
36
45

33_0804_8P4R_5%

RP21

18
27
36
45

33_0804_8P4R_5%

RP25

18
27
36
45

33_0804_8P4R_5%

RP23

18
27
36
45

33_0804_8P4R_5%

RP27

18
27
36
45

33_0804_8P4R_5%

C84 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C87 0.1U_0402_16V4Z

C90 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C93 0.1U_0402_16V4Z

C95 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C97 0.1U_0402_16V4Z

C101 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C103 0.1U_0402_16V4Z

C107 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C109 0.1U_0402_16V4Z

C113 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C115 0.1U_0402_16V4Z

C117 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C119 0.1U_0402_16V4Z

C122 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C124 0.1U_0402_16V4Z

C127 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C129 0.1U_0402_16V4Z

C132 0.1U_0402_16V4Z

1 2

+2.5V

1 2

C134 0.1U_0402_16V4Z

System Memory Decoupling caps

+2.5V

1

C138

0.1U_0402_16V4Z

2

+2.5V

1

C151

0.1U_0402_16V4Z

2

+2.5V

A A

+2.5V

1

C164
22U_1206_10V4Z

2

1

C173

0.1U_0402_16V4Z

2

5

1

C139

0.1U_0402_16V4Z

2

1

C152

0.1U_0402_16V4Z

2

1

C165

0.1U_0402_16V4Z

2

1

C174

0.1U_0402_16V4Z

2

1

C140

0.1U_0402_16V4Z

2

1

C153

0.1U_0402_16V4Z

2

1

C166

0.1U_0402_16V4Z

2

1

C175

0.1U_0402_16V4Z

2

1

C141

0.1U_0402_16V4Z

2

1

C154

0.1U_0402_16V4Z

2

1

C167

0.1U_0402_16V4Z

2

1

C176

0.1U_0402_16V4Z

2

1

C142
1000P_0402_50V7K

2

1

C155
1000P_0402_50V7K

2

1

C168

0.1U_0402_16V4Z

2

1

C177

0.1U_0402_16V4Z

2

1

C143

0.1U_0402_16V4Z

2

1

C156

0.1U_0402_16V4Z

2

1

C169
1000P_0402_50V7K

2

1

C178
1000P_0402_50V7K

2

4

1

C144

0.1U_0402_16V4Z

2

1

C157

0.1U_0402_16V4Z

2

1

C170

0.1U_0402_16V4Z

2

1

C179

0.1U_0402_16V4Z

2

1

C145

0.1U_0402_16V4Z

2

1

C158

0.1U_0402_16V4Z

2

1

C171
10U_0805_10V4Z

2

1

C180

0.1U_0402_16V4Z

2

1

C146

0.1U_0402_16V4Z

2

1

C159

0.1U_0402_16V4Z

2

1

C172
22U_1206_10V4Z

2

1

C147
1000P_0402_50V7K

2

1

C160
1000P_0402_50V7K

2

3

1

C148

0.1U_0402_16V4Z

2

1

C161

0.1U_0402_16V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

C149

0.1U_0402_16V4Z

2

1

C162

0.1U_0402_16V4Z

2

1

C150

+

100U_D2_10VM

@

2

1

C163

+

100U_D2_10VM

@

2

Title

Size Document Number Rev

2

Date: Sheet

Compal Electronics, Inc.

DDR Termination Resistors

LA-2251

1

15 47Monday, May 17, 2004

1.0

of

5

4

3

2

1

LVDD1

1

C427

0.1U_0402_16V7K

2

LGND

LVDD2

1

C432

0.1U_0402_16V7K

2

LGND

LVDD3

1

C438

0.1U_0402_16V7K

2

LGND

V2COMP

DACVDD

1

C444

0.1U_0402_16V7K

2

+1.8VS

L47

1 2

HB-1M2012-601JT03_0805

1U_0603_10V6K

+3VS

L49

1 2

HB-1M2012-601JT03_0805

+3VS

L51

1 2

HB-1M2012-601JT03_0805

C428

C433

1U_0603_10V6K

C440

1U_0603_10V6K

VDDV

1

1

C429

0.1U_0402_16V7K

2

2

TVPLL_VDD

1

1

C434

0.1U_0402_16V7K

2

2

TVPLLGND

LPLL_VDD

1

1

C442

0.1U_0402_16V7K

2

2

LPLLGND

R525

2.2K_0402_5%

+3VS

L46

1 2

HB-1M2012-601JT03_0805

1U_0603_10V6K

+3VS

L48

1 2

HB-1M2012-601JT03_0805

1U_0603_10V6K

+3VS

L50

1 2

HB-1M2012-601JT03_0805

1U_0603_10V6K

+3VS

L52

1 2

HB-1M2012-601JT03_0805

1U_0603_10V6K

+3VS

12

12

R526

2.2K_0402_5%

C425

C430

C435

C439

C441

0.1U_0402_16V7K

1

1

2

2

0.1U_0402_16V7K

1

1

2

2

0.1U_0402_16V7K

1

1

2

2

0.1U_0402_16V7K

1 2

1

1

2

2

0.1U_0402_16V7K

C426

C431

C437

C443

+5VS

V5V

1

2

VBCLK 9

1

C424

0.1U_0402_16V7K

2

1

C436

2

1U_0603_10V6K@

NB_I2CDATA
NB_I2CCLK

C423

D_VDD

D_VDD

D_VDD

D_VDD

D_VDD

D_VDD

LVDD3

LVDD2

LVDD1

103

110

DVDD055DVDD164DVDD391DVDD274DVDD4

DVDD5

LAVDD07LAVDD113LAVDD220LAVDD326LAVDD4

Digital Video
Link

DVSS058DVSS161DVSS275DVSS392DVSS4

DVSS5

105

109

302LV

LAVSS04LAVSS110LAVSS223LAVSS329LAVSS435DACVSS039DACVSS148LVDSPLLVSS03LVDSPLLVSS1

12

PCI_PIRQA#9,20,23,24

VBD[0..11]9

VAD[0..11]9

VAHSYNC9
VAVSYNC9

VAGCLK9

R567

10_0402_5%@

VBHSYNC9

VBVSYNC9

VBGCLK9

R568 10_0402_5%@

12

VBDE9

VBHCLK9

VBCAD9

VADE9
VBCTL09
VBCTL19

C680

12

15P_0402_50V8J@

REFCLK09,12

NB_RST#9,20

D D

C719

15P_0402_50V8J@

C C

15P_0402_50V8J@

C720

B B

12

PCI_PIRQA#

12

VBD[0..11]

VAD[0..11]

VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6
VAD7
VAD8
VAD9
VAD10
VAD11

VAGCLK

VBD0
VBD1
VBD2
VBD3
VBD4
VBD5
VBD6
VBD7
VBD8
VBD9
VBD10
VBD11

VBGCLK

VBHCLK
VBCAD

R501

12

10_0402_5%@

R538

1 2

0_0402_5%

85
86
87
88
89
90
94
95
96
97
98
99

101
102

93

68
69
70
71
72
73
77
78
79
80
81
82

66
65
76

63
108
107
104

67

62

52

53
121
122
123
112
113
114
115

U22

VAD0
VAD1
VAD2
VAD3
VAD4
VAD5
VAD6
VAD7
VAD8
VAD9
VAD10
VAD11

VAHSYNC
VAVSYNC
VAGCLK

VBD0
VBD1
VBD2
VBD3
VBD4
VBD5
VBD6
VBD7
VBD8
VBD9
VBD10
VBD11

VBHSYNC
VBVSYNC
VBGCLK

VBDE
VBHCLK
VBCAD
VADE
VBCTL0
VBCTL1

VBRCLK
VBOSCO
LCDSENSE
INTERRUPN
EXTRSTN
GPIOA
GPIOB
GPIOC
GPIOD

DACVDD

LPLL_VDD

DACVDD

LVDD2

19

32

47

DACVDD037DACVDD1

LVDSPLLVDD01LVDSPLLVDD1

LVDS

16

TVPLL_VDD

54

PLL1VDD

DAC

VDDV

60

OVDD/

PLL1VSS

51

V5V

VREF2

118

111

VDD5V

OVDD35V

V2RSET

V2COM

IOCOMP

IOCS

RESERVED/DACB1
RESERVED/DACB2
RESERVED/DACB3

EXTSWING

LX0N/LDC0*

LX0P/LDC0

LX1N/LDC1*

LX1P/LDC1

LX2N/LDC2*

LX2P/LDC2

LX3N/LDC3*

LX3P/LDC3

LXC1N/LL1C*

LXC1P/LL1C

RESERVED/LDC4*

RESERVED/LDC4

RESERVED/LDC5*

RESERVED/LDC5

RESERVED/LDC6*

RESERVED/LDC6

RESERVED?LDC7*

RESERVED/LDC7
RESERVED/LL2C*

RESERVED/LL2C

DDCDATA

DDCCLK

ENAVDD/GPIOG

ENABKL/GPIOH

RESERVED/LPLLCA

RESERVED/BOC/VS

VBCLK/P-OUT
DVDD/RESERVED0
DVDD/RESERVED1

AS/RESERVED

TSCLKI

TVCLKO
PFTEST1
PFTEST2

PFTESTO
V2HSYNC
V2VSYNC

OVSS

SIS302ELV_LQFP128

100

38
40

41
43

IOY

45

IOC

49
42

44
46

36
34

33
31
30
28
27
22
21
25
24

18
17
15
14
12
11
9
8
6
5

116
117

127
128

2
50
59
83
84
106

56
57
124
125
126
119
120

1U_0603_10V6K

R298 147_0402_5%

1 2

V2COMP

VSWING
TXA0-_NB

TXA0+_NB
TXA1-_NB
TXA1+_NB
TXA2-_NB
TXA2+_NB

TXACLK-_NB
TXACLK+_NB

TXB0-_NB
TXB0+_NB
TXB1-_NB
TXB1+_NB
TXB2-_NB
TXB2+_NB

TXBCLK-_NB
TXBCLK+_NB

NB_I2CDATA
NB_I2CCLK

ENAVDD
ENABLT#

C445 100P_0402_25V8K@

BCLK

1 2

4.7K_0402_5%

R299 6.2K_0402_5%
R300 2K_0402_5%@

TXA0-_NB 17
TXA0+_NB 17
TXA1-_NB 17
TXA1+_NB 17
TXA2-_NB 17
TXA2+_NB 17

TXACLK-_NB 17
TXACLK+_NB 17

TXB0-_NB 17
TXB0+_NB 17
TXB1-_NB 17
TXB1+_NB 17
TXB2-_NB 17
TXB2+_NB 17

TXBCLK-_NB 17
TXBCLK+_NB 17

NB_I2CDATA 17
NB_I2CCLK 17

ENAVDD 17
ENABLT# 17,33

1 2

VBCLK

R215

1 2

10_0402_5%

R301

1 2
1 2

+3VS

LGND

LGND

LGND

LGND

+1.8VS

12

R384

4.7K_0402_5%

VBCAD D_VDD

A A

5

+3VS

12

R302
0_0402_5%

VREF2

1

C447

0.1U_0402_16V7K

2

LGND

+3VS

L53

1 2

HB-1M2012-601JT03_0805

4

TVPLLGND

LGND

LPLLGND

1

C446

2

10U_0805_10V4Z

0.1U_0402_16V7K

1

C448

2

1

C449

0.1U_0402_16V7K

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LVDS/TV ENCODER

LA-2251

1

of

16 47Monday, May 17, 2004

1.0

5

LCD CONN

LCDVDD_C LCDVDD_C

NB_I2CDATA16

D D

TXACLK-_NB16
TXACLK+_NB16

L18 colsely to LCD CONN.

C C

B B

A A

+3VS

TXA0-_NB16
TXA0+_NB16

TXA1-_NB16
TXA1+_NB16

TXA2+_NB16

B+

TXA0-_NB TXB0+_NB
TXA0+_NB

TXA1-_NB
TXA1+_NB

TXA2+_NB
TXACLK-_NB

TXACLK+_NB

1 2

0_0603_5%

L18

1 2

0_0805_5%

5

JP6

1

21

2

22

3

23

4

24
25
26
27
28
29
30
31
32
33
34
35
36
37

L60

38
39
40

JST_BM40B-SRDS-G

error PCB_FootPrint

C221 0.1U_0402_25V4K@
C220 0.001U_0402_50V7M

5
6
7
8

9
10
11
12
13
14
15
16

L59 0_0603_5%

17

L61 0_0603_5%

18
19
20

1 2
1 2

TXB0-_NB

TXB1-_NB
TXB1+_NB

TXB2-_NB
TXB2+_NBTXA2-_NB

TXBCLK-_NB
TXBCLK+_NB

1 2
1 2

1 2

0_0805_5%

L62

CRT_HSYNC9

CRT_VSYNC9

4

NB_I2CCLK 16
TXB0-_NB 16

TXB0+_NB 16
TXB1-_NB 16

TXB1+_NB 16
TXB2-_NB 16

TXB2+_NB 16TXA2-_NB16
TXBCLK-_NB 16

TXBCLK+_NB 16

INVT_PWM
DAC_BRIGDISPOFF#

CRT_HSYNC

CRT_VSYNC

4

10U_1206_25V6M@

1

C214

2

INVT_PWM 33
DAC_BRIG 33

+5VS

SN74AHCT126PWR_TSSOP14

L3

1 2

0_0805_5%

1

C215

68P_0402_50V8J@

2

LCDVDD

The cap.'s colsely to LCD CONN.

ENAVDD16

check D9....'s pcb footprint pin1/pin2

M_SEN#33

CRT_R9

CRT_G9

CRT_B9

14

1

U7A

P

OE

A2Y

G

7

14

13

U7D

P

OE

A12Y

G

SN74AHCT126PWR_TSSOP14

7

M_SEN#
CRT_R

CRT_G CRTL_G

CRT_B

R94

75_0402_5%

1 2

10P_0402_50V8K

3

+5VS

R102

1 2

1K_0402_5%

11

3

BKOFF#33

ENABLT#16,33

D7 RB751V_SOD323

21

ENABLT#

2

G

+3VS

12

R88

4.7K_0402_5%

DISPOFF#

13

D

S

2

Q12

2N7002_SOT23@

+3VS to LCDVDD Transfer

U40

8

D1

7

D2

6

D3

5

1

D4

C216

SI4800 1N_SO8

2

1

C217

2

+5VS

21

RB411D_SOT23

C230

12

R92
100K_0402_5%

2N7002_SOT23

SFI0603-120E100MP_0603@

D9

21

22P_0402_25V8K

L10
CHB1608B121_0603

L11
CHB1608B121_0603

+12VALW

12

R89
100K_0402_5%

13

D

2

G

S

Q15

D10

21

1

C227

2

1 2

1 2

4.7U_0805_10V4Z

12

R91

1M_0402_5%

SFI0603-120E100MP_0603@

1

C228

2

22P_0402_25V8K

CRTL_HSYNCRFL

CRTL_VSYNCRFL

2

0.047U_0402_16V4Z

D11

22P_0402_25V8K

LCDVDD

+12VALW

12

R90

1K_0402_1%

13

D

2.7K_0402_5%@

ENAVDD

R93

2N7002_SOT23

12

Q14

2

3

2

G

S

Q16

I

O

G

DTC124EK_SC59

SFI0603-120E100MP_0603@

1

CRT CONNECTOR

L4

1 2

1

C224

2

75_0402_5%

FCM2012C-800_0805

L6

1 2

FCM2012C-800_0805
L7

1 2

FCM2012C-800_0805

1

R96

C225
10P_0402_50V8K

2

1 2

CRT_HSYNCRFL

CRT_VSYNCRFL

10P_0402_50V8K

1

R95

C223

2

1 2

75_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

CRTL_R

CRTL_B

1

C226
22P_0402_25V8K

2

1

LCDVDD+3VS

0.1U_0402_16V4Z

1

S1

2

S2

3

S3

4

G

C218

1

2

1

C219

4.7U_0805_10V4Z

2

The cap.'s colsely to LCD CONN.

SI4800DY: N CHANNEL
VGS: 4.5V, RDS: 33 mOHM
VGS: 10V, RDS: 18.5mOHM
Id(MAX): 9A
VGS(MAX): +-25V

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

R_CRT_VCC

D8

2 1

1

2

C231

22P_0402_25V8K

F1

1.1A_6VDC_FUSE
C222

0.1U_0402_16V4Z

220P_0402_50V8K

1

C229

1

2

2

220P_0402_50V8K

Title

Size Document Number Rev
Custom

Date: Sheet

1

2

C238

220P_0402_50V8K

Compal Electronics, Inc.

LCD/Inverter BD & CRT CONN.

SI2301DS: P CHANNEL
VGS: -4.5V, RDS: 130 mOHM
VGS: -2.5V, RDS: 190mOHM
Id(MAX): 2.3A
VGS(MAX): +-8V

CRT_VCC

21

1

2

CRT_VCC

D

1 3

2

1

2

C239

3VDDCDA9

3VDDCCL9

LA-2251

JP20

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_7849S-15G2T-HC

Q17

S

2N7002_SOT23

G

Q18

D

S

1 3

2N7002_SOT23

G

2

R100

2.2K_0402_5%

1

12

3VDDCDA
3VDDCCL

17 47Monday, May 17, 2004

3VDDCDA

3VDDCCL

12

R101

2.2K_0402_5%

of

+5VS

1.0

+CPU_CORE

RP86

1 8
2 7
3 6
4 5

56_0804_8P4R_5%

+CPU_CORE

RP87

1 8
2 7
3 6

D D

C C

B B

A A

4 5

56_0804_8P4R_5%

L

Note: Put closed to CPU Socket Side

1

C518

15P_0402_50V8J

2

Analog Power supplies of Transzip function for 96X Chip.

+3VS +3VS

1 2

0_0603_5%

1

C647

2

10U_0805_10V4Z

5

12

C519

C682 15P_0402_50V8J@

12

R393
150_0402_1%

12

R398
51_0402_5%

1

C527

2

5

+CPU_CORE

1

2

ZAD[0..16]

12

1

C528

0.01U_0402_16V7K

2

H_INIT#
H_A20M#
H_SMI#
H_INTR

H_NMI
H_IGNNE#

H_STPCLK#

R373 10M_0603_5%

1 2

32.768KHz_12.5P_CM155

Y4

20P_0402_50V8J

ZAD[0..16]8

+1.8VS

R410

0.1U_0402_16V7K

R503

1 2

1

2

H_CPUSLP#

T18

P16
R17
R16
Y20
U18
T17

W20

V19

C2
D2
D3

D1

M18

N19

M17
M16
M20

L16

L20

L18
K18
K19
K17
K16
H20

J18
H19
H18
P20

M19

N20

J20
K20

V20

N16
N17

R19
N18

P18
R18

U20
U19

T20
T19

R20

R411

0_0603_5%

U28A

SIS963L_BGA371

0.1U_0402_16V7K

R370 56_0402_5%

1 2

12

H_INIT#
H_A20M#
H_SMI#
H_INTR
H_NMI
H_IGNNE#
H_FERR#
H_STPCLK#
H_CPUSLP#

CRY1
CRY2
RTC_PWROK

PM_PWRGD

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16

ZSTB0
ZSTB#0

ZSTB1
ZSTB#1

12

10_0402_5%@

ZCLK1

ZUREQ
ZDREQ

SVDDZCMP
SZCMP_N

SVSSZCMP
SZCMP_P

SZ1XAVDD
SZ1XAVSS

SZ4XAVDD
SZ4XAVSS

SZVREF

C648

10U_0805_10V4Z

H_INIT#5

H_A20M#5

H_SMI#5
H_INTR5

H_NMI5

H_IGNNE#5

H_FERR#5
H_STPCLK#5
H_CPUSLP#5

R374

120K_0402_5%

PM_PWRGD9,35

ZSTB08

ZSTB#08

ZSTB18

ZSTB#18

ZCLK112

ZUREQ8
ZDREQ8

1

C625

0.1U_0402_16V7K

2

1

C626

0.1U_0402_16V7K

2

SZ1XAVDD

SZ1XAVSS SVSSZCMP

INIT#
A20M#
SMI#
INTR
NMI
IGNNE#
FERR#
STPCLK#
CPUSLP#

OSC32KHI
OSC32KHO
BATOK

PWROK

ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
ZAD15
ZAD16

ZSTB0
ZSTB0#

ZSTB1
ZSTB1#

ZCLK

ZUREQ
ZDREQ

VDDZCMP
ZCMP_N

VSSZCMP
ZCMP_P

Z1XAVDD
Z1XAVSS

Z4XAVDD
Z4XAVSS

ZVREF

1

2

4

SIS963L

1

C529

2

4

CPU I/FMuTIOL

GPIO4/GPIOCLKRUN#

RTC

GPIOMISC PM

C530

0.01U_0402_16V7K

SZ4XAVSS

ACPILED

AUXOK

PWRBRN#

PME#

PSON#

GPIO2/THERM#

GPIO3/EXTSMI#
GPIO7/GPWAK#

GPIO8/RING

GPIO9/AC_SDIN2

GPIO10/AC_SDIN3

GPIO11/STP_PCI#
GPIO12/CPUSTP#

GPIO13/DPRSLPVR

GPIO14/AGPSTOP#

GPIO15/VR_HILO#

GPIO16/LO_HI#

GPIO17/VGATEM#

GPIO18/RTC32KHZ

APICD0/THERM2#

APICD1/GPIOFF#

APICCK/LDTREQ#

GPIO0/SPDIF
GPIO1/LDRQ1#
GPIO5/PREQ5#
GPIO6/PGNT5#

GPIO19
GPIO20

GPIO21/EESK

GPIO22/EEDI

GPIO23/EEDO
GPIO24/EECS

OSCI

ENTEST

SPK

IPBRST#/NC
TDFRAME/NC
RDFRAME/NC

IPB_RDCLK/NC

IPB_TDCLK/NC

IPB_OUT0/PLLENN

IPB_OUT1/ZCLKSEL

IPB_IN0/NC
IPB_IN1/NC

10U_0805_10V4Z

C646

A15
A3

A14
B14
D14

T4
T6
W1
C4
C14
E6
B3

F5
D4
B1
E5
E13
A16
D13

B15
V18

W19
Y19

V2
T8
U5
U4
A1
B2

F20
D20
E20
C20

W3
G5
V3

B11
D10
A11
E10
D9
B10
A10
C10
C9

+1.8VS

EC_RSMRST#
PWRBTN_OUT#

PME#_SB
PSON#

THERM#_SB
SMI#
PCI_CLKRUN#
EC_SCI#
EC_SWI#
LID_OUT#

PCICLK_STOP#
CPUCLK_STP#
DPRSLPVR
EC_FLASH#
PM_GMUXSEL
CPU_GHI#

R378 0_0402_5%@

1 2

R379 0_0402_5%@

1 2

APICCK

EC_ACIN
PGNT5#
SMB_CK_CLK1
SMB_CK_DAT1

LAN_EECLK
LAN_EEDI
LAN_EEDO
LAN_EECS

R502

10_0402_5%@

REFCLK1
SNETEST
SB_SPKR

R409

1 2

0_0603_5%

1

2

3

EC_RSMRST# 9,25,33
PWRBTN_OUT# 33

PME#_SB 33
PSON# 33 EC_THERM# 33

PCI_CLKRUN# 23,26,33
EC_SCI# 33
EC_SWI# 33
LID_OUT# 33
H_PWRGOOD_SB 8

PCICLK_STOP# 12
CPUCLK_STP# 5,12,43
DPRSLPVR 43
EC_FLASH# 34

CPU_GHI# 5

R578 0_0402_5%

1 2

IDERST_HD# 22
IDERST_CD# 22

SMB_CK_CLK1 12,13,14
SMB_CK_DAT1 12,13,14

C681

1 2

15P_0402_50V8J@

EC_ACIN

CHGRTC

I

0.01U_0402_16V7K

1

C525

2

0.1U_0402_16V7K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

REFCLK1 12
SB_SPKR 27

D24 RB751V_SOD323

2 1

W=30mils

RB751V_SOD323

W=30mils

21

D22

RB751V_SOD323

1

C526

2

3

RB751V_SOD323

D19

2 1

D20

2 1

RB751V_SOD323

Reserve for Prescott C-step Processor

0: Max performace
1: Batt Perormace

H_PROCHOT# 5
H_THERMTRIP# 5,7

D25

+3VALW

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

W=30mils

+RTCVCC

D21

2 1
12

R399
470_0402_5%

12

R412

1 2

56_0402_5%

R414

1 2

56_0402_5%

C521

K

0.1U_0402_16V7K

J

BATT1
ML1220T13RE

2 1

RB751V_SOD323

R386

5.6K_0402_5%
U29

1 2

4

DO

3

DI

2

SK

1

CS

AT93C46-10SI-2.7_SO8

+RTCVCC

W=30mils

1

2

SVDDZCMP
SZCMP_NSZ4XAVDD

SZCMP_P

EC_SMI# 33

EC_PROCHOT# 33

1

C645

2

22U_1206_16V4Z

PM_BATLOW# 33

5

GND

6

NC

7

NC

8

VCC

ACIN 33,37

MMBT3906_SOT23~D@

Q26

1

C

B

E

3

W=30mils

R396

51K_0402_5%@

R403

10K_0402_5%@

+3VALW

1

2

0.1U_0402_10V6K

R392

2

1 2

10K_0402_5%

+3VALW

12

12

2

+3VALW

C520

1

C

Q27

2

B

E

PMBT3904_SOT23@

3

RTC_PWROK

10U_0805_10V4Z

2

+3VS

C522

RP88

1 8
2 7
3 6
4 5

R376 10K_0402_5%

1 2

R387 10K_0402_5%

1 2

R388 10K_0402_5%

1 2

R389 10K_0402_5%

1 2

R540 1K_0402_5%

1 2

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

Close Pin A3

1 2

C517 0.1U_0402_10V6K

1 2

R372 4.7K_0402_5%

SNETEST
RTC_PWROK
DPRSLPVR

1 2

10K_0402_5%

1

2

THERM#_SB
PGNT5#
EC_ACIN
SMI#

10K_0804_8P4R_5%@

RP98

RP99

EC_RSMRST#

PM_GMUXSEL

R400 0_0402_5%

1 2

R401 0_0402_5%@

1 2

R402 4.7K_0402_5%

1 2

3

2

1

R408

C523

0.1U_0402_16V7K

Note:

L

Decoupling
Capacitor Place
close to 963L

Title

Size Document Number Rev

Date: Sheet

1

SB_SPKR
APICCK
SMB_CK_DAT1
SMB_CK_CLK1

CPUCLK_STP#

EC_SWI#
LID_OUT#
PWRBTN_OUT#

EC_SCI#
PME#_SB
EC_FLASH#
PSON#

If no use SIS RTC function

D23
1N4148_SOT23

1U_0603_10V4Z

1

1

C524

2

2

+RTCVCC

1 2
12

short J1
to clear
CMOS

L

J2
JOPEN

R413
0_0402_5%

Note: PLACE
CLOSE TO DDR
SLOT(BOT
SIDE)

Compal Electronics, Inc.

963L-1 (HOST/MuTIOL/RTC/GPIO/MISC)

LA-2251

18 47Monday, May 17, 2004

1

1.0

of

5

+3VALW

R440 10K_0402_5%

1 2

R441 10K_0402_5%@

1 2

R443 10K_0402_5%

1 2

R444 10K_0402_5%@

D D

1 2

R495 10K_0402_5%

1 2

R496 10K_0402_5%@

1 2

OVCUR#0 CLK_USB_48M
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

12

R442
12_0402_5%

1

C545
10P_0402_50V8K

2

4

3

2

1

U28B

USBCLK48M

UV0+
UV0­UV1+
UV1­UV2+
UV2­UV3+
UV3­UV4+
UV4­UV5+
UV5-

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#

OSC12MHI
OSC12MHO
USBREF

USBREFAVDD
USBPVDD
USBPVSS

LAD0
LAD1
LAD2
LAD3

LFRAME#
LDRQ#

SIRQ

AC_SDIN0
AC_SDIN1

AC_SDOUT
AC_SYNC

AC_RESET#

AC_BIT_CLK

SIS963L

MAC I/FIEEE 1394

AC'97 LPC USB I/F

SIS963L_BGA371

OSC25MHI

OSC25MHO

TXCLK

TXEN

TXD0
TXD1
TXD2
TXD3

RXCLK

RXDV
RXER

RXD0
RXD1
RXD2
RXD3

COL
CRS
MDC

MDIO

MIIAVDD
MIIAVSS

CTL0
CTL1

SCLK

LINKON

LREQ

LPS

MAC_X1

A8

MAC_X2

A9

A6
B6
E8

D7
C6
B4

A7

C7
C8

D8
A5
B5
A4

B7
E9
C5
E7

B9

MIIAVSS

B8

RSVD0

A12

D0

RSVD1

B12

D1

RSVD2

C12

D2

RSVD3

D12

D3

RSVD4

E12

D4

RSVD5

A13

D5

RSVD6

B13

D6

RSVD7

C13

D7

RSVD9

D11

RSVD10

C11

RSVD8

E11

RSVD12

C19

RSVD11

A19
A20

TXCLK 25
TXEN 25
TXD0 25

TXD1 25
TXD2 25
TXD3 25

RXCLK 25

RXDV 25
RXER 25

RXD0 25
RXD1 25
RXD2 25
RXD3 25

COL 25
CRS 25
MDC 25
MDIO 25

+MIIAVDD

1 2

412_0402_1%

CLK_USB_48M

OVCUR#0
OVCUR#1
OVCUR#2
OVCUR#3
OVCUR#4
OVCUR#5

OSC_12M_HI

OSC_12M_HO
USBREF

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LFRAME#
LPC_DRQ#0

SIRQ

CLK_USB_48M12

USB20P0+29

USB20P0-29

USB20P1+29

USB20P1-29

USB20P2+29

USB20P2-29

USB20P3+29

USB20P3-29

USB20P4+29

USB20P4-29

USB20P5+29

USB20P5-29

C C

R447

1 2

10M_0402_5%

12MHZ_16P_DSX840GA

1 2

Y7

1

C552

10P_0402_50V8K

B B

+3VALW +USBPVDD

R450

12

0_0805_5%

1

C554
10U_0805_10V4Z

2

15P_0402_50V8J

2

1

C555
1U_0603_10V4Z

2

C553

1

2

OVCUR#129
OVCUR#329
OVCUR#529

R497

1

+USBPVDD

2

LPC_AD030,33
LPC_AD130,33
LPC_AD230,33
LPC_AD330,33

LPC_FRAME#30,33

LPC_DRQ#030

SIRQ23,30,33

AC97_SDIN027
AC97_SDIN129

AC97_SDOUT27,29

AC97_SYNC27,29

AC97_RST#27,29

AC97_BITCLK27,29

C556

0.1U_0402_16V7K

V4

B18
C18
D18
D19
E14
D15
E18
F18
E16
E15
G18
G19

G20
G17

J16
H16
H17
G16

B16
A17
F16

B20
A18
C15

V5
T7
U6

W5

W4

U7
V6

A2
D5

W2

T5
D6

Y1

12

R530

10_0402_5%@

1

C698

15P_0402_50V8J@

2

R446

1 2

10M_0402_5%@

Y6

25MHZ_20P_1BX25000CK1A

1

C547
15P_0402_50V8J

2

Analog power of MII

+3VALW

L45

1 2

CHB1608U301_0603

1

C549
10U_0805_10V4Z

2

12

MAC_X1MAC_X2

1

C548
20P_0402_50V8J

2

1

C550

0.01U_0402_16V7K

2

+MIIAVDD

1

2

C551

0.1U_0402_10V6K

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

963L-2 (USB/LPC/AC97/1394/MAC)

LA-2251

19 47Monday, May 17, 2004

1

1.0

of

5

+3VS

RP93

PCI_REQ#2

1 8

PCI_REQ#3

D D

C C

B B

A A

2 7

PCI_REQ#4

3 6

PCI_REQ#1

4 5

4.7K_0804_8P4R_5%

RP94

1 8
2 7
3 6
4 5

8.2K_0804_8P4R_5%

RP95

PCI_REQ#0

1 8

PCI_FRAME#

2 7
3 6

PCI_TRDY#

4 5

4.7K_0804_8P4R_5%

RP96

1 8

PCI_SERR#

2 7

PCI_DEVSEL#

3 6

PCI_LOCK#

4 5

4.7K_0804_8P4R_5%

RP97

1 8
2 7
3 6
4 5

4.7K_0804_8P4R_5%

R451

1 2

4.7K_0402_5%
R452

1 2

4.7K_0402_5%

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_IRDY#

PCI_STOP#

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

PCI_GNT#4

PCI_PAR

5

PCI_AD[0..31]23,24,26

PCI_CBE#[0..3]23,24,26

4

U28C

PCI_AD[0..31]

PCI_CBE#[0..3]

PCI_REQ#024
PCI_REQ#126
PCI_REQ#223
PCI_REQ#3
PCI_REQ#426

PCI_GNT#024
PCI_GNT#126
PCI_GNT#223
PCI_GNT#3
PCI_GNT#426

PCI_PIRQA#9,16,23,24
PCI_PIRQB#26
PCI_PIRQC#
PCI_PIRQD#

PCI_FRAME#23,24,26

PCI_IRDY#23,24,26

PCI_TRDY#23,24,26

PCI_STOP#23,24,26

PCI_SERR#23,26

PCI_PAR23,24,26

PCI_DEVSEL#23,24,26

CLK_PCI_SB12

4

PCI_AD0

V1

PCI_AD1

U3

PCI_AD2

R5

PCI_AD3

T3

PCI_AD4

U2

PCI_AD5

U1

PCI_AD6

T2

PCI_AD7

P5

PCI_AD8

T1

PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#

PCI_SERR#
PCI_PAR
PCI_DEVSEL#
PCI_LOCK#

CLK_PCI_SB
PCIRST#

12

R505

10_0402_5%@

1

C683

15P_0402_50V8J@

2

R1
R3
R2

P4
P3
P2

N5

L2
L5
L4
L1
K1
L3
K2
K5
J1
J2
K4

J3
H1
H2

J4

J5

R4

P1
M4

K3

F3
H5

E1

F2

F1
H4

G3
G2
G1
H3

E3

F4

E2
G4

M3
M1
M2
N4

M5
N3
N1
N2

Y2
C3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PREQ0#
PREQ1#
PREQ2#
PREQ3#
PREQ4#

PGNT0#
PGNT1#
PGNT2#
PGNT3#
PGNT4#

INTA#
INTB#
INTC#
INTD#

FRAME#
IRDY#
TRDY#
STOP#

SERR#
PAR
DEVSEL#
PLOCK#

PCICLK
PCIRST#

PCIRST#

SIS963L

1 2

3

IDESAA0

W11

IDSAA0
IDSAA1

IDSAA2
IDECSA0#
IDECSA1#

ICHRDYA

IDREQA

IIRQA

CBLIDA

IIORA#

IIOWA#

IDACKA#

IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8

IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15

PCI I/F

IDE I/F

IDSAB0
IDSAB1

IDSAB2
IDECSB0#
IDECSB1#

ICHRDYB

IDREQB

IIRQB

CBLIDB

IIORB#

IIOWB#

IDACKB#

IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8

IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15

SIS963L_BGA371

R219

33_0402_5%

10K_0402_5%

12

R220

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

1

2

3

IDESAA1

U11

IDESAA2

T11

IDECS#A1

V12

IDECS#A3

T12

IDEIORDYA

W10

IDEREQA

V10

IDEIRQA

Y11
U12

IDEIOR#A

V11

IDEIOW#A

Y9

IDEDACK#A

Y10

IDEDA0

U10

IDEDA1

V9

IDEDA2

W8

IDEDA3

T9

IDEDA4

Y7

IDEDA5

V7

IDEDA6

Y6

IDEDA7

Y5

IDEDA8

W6

IDEDA9

U8

IDEDA10

W7

IDEDA11

V8

IDEDA12

U9

IDEDA13

Y8

IDEDA14

T10

IDEDA15

W9

IDESAB0

V17

IDESAB1

T15

IDESAB2

Y18

IDECS#B1

W18

IDECS#B3

U16

IDEIORDYB

W17

IDEREQB

Y17

IDEIRQB

T16
U17

IDEIOR#B

T14

IDEIOW#B

W16

IDEDACK#B

V16

IDEDB0

Y16

IDEDB1

V15

IDEDB2

U14

IDEDB3

W14

IDEDB4

V13

IDEDB5

T13

IDEDB6

Y13

IDEDB7

Y12

IDEDB8

W12

IDEDB9

W13

IDEDB10

U13

IDEDB11

Y14

IDEDB12

V14

IDEDB13

W15

IDEDB14

Y15

IDEDB15

U15

R559 0_0402_5%

1 2

14

U24A

P

1

O2I

G

R560
1K_0402_5%

C717

10P_0402_50V8K@

SN74LVC14APWLE_TSSOP14@

7

IDESAA0 22
IDESAA1 22
IDESAA2 22
IDECS#A1 22
IDECS#A3 22

IDEIORDYA 22
IDEREQA 22
IDEIRQA 22

IDEIOR#A 22
IDEIOW#A 22
IDEDACK#A 22

IDEDA[0..15] 22

IDESAB0 22
IDESAB1 22
IDESAB2 22
IDECS#B1 22
IDECS#B3 22

IDEIORDYB 22
IDEREQB 22
IDEIRQB 22

IDEIOR#B 22
IDEIOW#B 22
IDEDACK#B 22

IDEDB[0..15] 22

+3VALW

14

P

3

G

7

+5VS +5VS

R561

1 2

10K_0402_5%

14

4

U7B

P

OE

6

A5Y

G

SN74AHCT126PWR_TSSOP14

7

2

U24B

O4I

SN74LVC14APWLE_TSSOP14@

R562 300_0402_5%

2

13

R346 10_0402_5%
R571 10_0402_5%

+3VALW

5

1 2

+3VALW

14

P

G

U24F
SN74LVC14APWLE_TSSOP14@

7

1 2
1 2

14

U24C

P

O6I

G

SN74LVC14APWLE_TSSOP14@

7

1

C452

1 2

0.1U_0402_16V4Z@

O12I

Title

Size Document Number Rev

Date: Sheet

+3VALW

14

P

11

O10I

G

U24E
SN74LVC14APWLE_TSSOP14@

7

C380

1 2

0.1U_0402_10V6K@

14

U24D

P

9

PCI_RST#

O8I

G

SN74LVC14APWLE_TSSOP14 @

7

Compal Electronics, Inc.

963L-3 (PCI/IDE)

LA-2251

LPC_RST# 30,33
NB_RST# 9,16

PCI_RST# 22,23,24,26,30

R565

1 2

620_0402_5%

1

20 47Monday, May 17, 2004

1.0

of

5

4

3

2

1

+IDEAVDD +1.8VS

R453

1 2

0_0603_5%

1

C557

0.01U_0402_16V7K

2

IDEAVSS

H10
H11
H12
H13

K10
K11

M10
M11

N10
N11
N12
N13

K12
K13

M12
M13
P17

F19
E19
B19
B17

J10
J11
J12

L10
L11

M8
M9

J13
J17

L12
L13
L17

H8
H9

J8
J9

K8
K9

L8
L9

N8
N9

Y4

E4

U28D

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28

VSSZ0
VSSZ1
VSSZ2
VSSZ3
VSSZ4
VSSZ5
VSSZ6
VSSZ7
VSSZ8
VSSZ9

USBVSS_0
USBVSS_1
USBVSS_2
USBVSS_3

IDEAVSS

RTCVSS

SIS963L

POWER

GROUND

OVDD_AUX_0
OVDD_AUX_1
OVDD_AUX_2
OVDD_AUX_3
OVDD_AUX_4

SIS963L_BGA371

IDEAVDD

VDDZ_0
VDDZ_1
VDDZ_2
VDDZ_3
VDDZ_4
VDDZ_5
VDDZ_6

PVDDZ
IVDD_0
IVDD_1
IVDD_2
IVDD_3
IVDD_4
IVDD_5
IVDD_6

VTT_0
VTT_1

OVDD_0
OVDD_1
OVDD_2
OVDD_3
OVDD_4
OVDD_5
OVDD_6
OVDD_7

PVDD_0
PVDD_1
PVDD_2
PVDD_3

IVDD_AUX_0
IVDD_AUX_1

IVDD_AUX_2
IVDD_AUX_3

PVDD_AUX_0
PVDD_AUX_1

RTCVDD

USBVDD_0
USBVDD_1
USBVDD_2
USBVDD_3

Y3
G15

J15
J19
L15
L19
N15
P19
K15
G6
H15
L6
M15
R6
R10
R14

P15
R15

H6
K6
M6
P6
R7
R9
R11
R13

J6
N6
R8
R12

F9
F12

C16
C17

F7
F10
F11
F14
F15

F8
F13

C1

D16
D17
E17
F17

+IDEAVDD
+1.8VS

+CPU_CORE

+3VS

+1.8VALW

+3VALW

+RTCVCC

+USBVDD

D D

C C

IDEAVSS

RTCVSS

B B

1

C558

0.1U_0402_16V7K

2

+1.8VS

+1.8VS

+CPU_CORE

+3VS

+3VS

+3VS

+VDD

1

C559

0.1U_0402_16V7K

2

Under Chip Solder pin

+VDD

1

C564

0.1U_0402_16V7K

2

VTT

1

C569

0.1U_0402_16V7K

2

+OPVDD

1

C573

0.1U_0402_16V7K

2

+OPVDD

1

C578

0.1U_0402_16V7K

2

Under Chip Solder pin

1

C581

0.1U_0402_16V7K

2

1

2

1

2

1

2

+OPVDD

C560

0.1U_0402_16V7K

C565

0.1U_0402_16V7K

1

C570

0.1U_0402_16V7K

2

C574
1U_0603_10V4Z

1

C579

0.1U_0402_16V7K

2

1

C582

0.1U_0402_16V7K

2

1

C561

0.1U_0402_16V7K

2

1

C566

0.1U_0402_16V7K

2

1

C571

0.1U_0402_16V7K

2

1

C575
1U_0603_10V4Z

2

1

C580

0.1U_0402_16V7K

2

1

C583

0.1U_0402_16V7K

2

1

C562
1U_0603_10V4Z

2

1

C567

0.1U_0402_16V7K

2

1

C576
10U_0805_10V4Z

2

1

C572
1U_0603_10V4Z

2

1

2

1

C584

0.1U_0402_16V7K

2

1

C563
10U_0805_10V4Z

2

1

C568

0.1U_0402_16V7K

2

C577
10U_0805_10V4Z

+3VALW

+OPVDD_AUX

1

C585

0.1U_0402_16V7K

A A

5

2

4

1

2

Under Chip Solder pin

C586

0.1U_0402_16V7K

1

2

C587

0.1U_0402_16V7K

1

C588
1U_0603_10V4Z

2

1

C589
10U_0805_10V4Z

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

+USBVDD +3VALW

1

C593

0.1U_0402_16V7K

2

1

C594
1U_0603_10V4Z

2

2

0_0805_5%

1

C595
10U_0805_10V4Z

2

R459

+1.8VALW

12

Title

Size Document Number Rev

Date: Sheet

+IVDD_AUX

1

C590

0.1U_0402_16V7K

2

1

C591
1U_0603_10V4Z

2

1

C592
10U_0805_10V4Z

2

Compal Electronics, Inc.

963L-3 (POWER)

LA-2251

1

1.0

of

21 47Monday, May 17, 2004

5

+5VS

4

Placea caps. near HDD CONN.

3

2

1

1

C240
1000P_0402_50V7K

2

D D

IDEDA[0..15]20

C C

IDEDA[0..15]

HD_IDERST#

IDEIORDYA20

IDEDACK#A20

1 2

+5VS

R109 100K_0402_5%

+5VS

R105
33_0402_5%

IDEREQA20

IDEIOW#A20

IDEIOR#A20

IDEIRQA20
IDESAA120
IDESAA020

IDECS#A120

R104

5.6K_0402_5%

1 2

1 2

+5VS

1

C241
10U_0805_10V4Z

2

IDEDA7
IDEDA6
IDEDA5
IDEDA4
IDEDA3
IDEDA2
IDEDA1
IDEDA0

IDEREQA

IDEIORDYA
IDEIRQA

IDESAA1
IDESAA0
IDECS#A1
HDD_LED#

1

C242
10U_0805_10V4Z

2

JP30

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44

SUYIN_200006FA044S500ZT

error PCB_FootPrint

1

C243
1U_0603_10V4Z

2

IDEDA8
IDEDA9
IDEDA10
IDEDA11
IDEDA12
IDEDA13
IDEDA14
IDEDA15

PCSEL

IDESAA2
IDECS#A3

W=100mils

1

C245

2

10U_0805_10V4Z

1

C246

2

1U_0603_10V4Z

1

C247

2

0.1U_0402_16V4Z

C248

1

2

1

C244

0.1U_0402_16V4Z

2

R107 470_0402_5%

1 2

R108 100K_0402_5%@

1 2

IDESAA2 20
IDECS#A3 20

+5VS

1000P_0402_50V7K

+5VS

+3VS

12

R103
10K_0402_5%

IDERST_HD#18

PCI_RST#20,23,24,26,30

IDERST_CD#18

CR_LED#29

R484

10K_0402_5%

PCI_RST#

+3VS

12

R106
10K_0402_5%

PCI_RST#

HDD_LED#
CD_LED#

+3VS

12

+5VS

14

U8A

1

P

I0

O

2

I1

G

7

74HCT08PW_TSSOP14

U8B

4

I0

O

5

I1

74HCT08PW_TSSOP14

U8C

9

I0

O

10

I1

74HCT08PW_TSSOP14

U8D

12

I0

O

13

I1

74HCT08PW_TSSOP14

1

C696

0.1U_0402_10V6K

2

HD_IDERST#

3

SD_IDERST#

6

8

11

ACT_LED# 32

Placea caps. near CDROM CONN.

+5VS for CD trace to CONN W=100mils

C249 0.1U_0402_16V4Z

B B

INT_CD_L27
CD_AGND27

12

R110

5.6K_0402_5%

IDEDB[0..15]20

A A

5

IDEDB[0..15]

R112 100K_0402_5%

+5VS

1 2

IDEIOW#B20

IDEIORDYB20

IDEIRQB20
IDESAB120
IDESAB020

IDECS#B120

R113 470_0402_5%

1 2

C250 10U_0805_10V4Z

12

INT_CD_L INT_CD_R

SD_IDERST# IDEDB8
IDEDB7
IDEDB6
IDEDB5
IDEDB4 IDEDB12
IDEDB3
IDEDB2
IDEDB1
IDEDB0

IDEIOW#B
IDEIORDYB
IDEIRQB
IDESAB1
IDESAB0
IDECS#B1 IDECS#B3
CD_LED#

+5VS

SD_CSEL

12

JP26

1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

EXIT0 EXIT1

CD-ROM

2'nd HDD
NONE

4

00

01
11

C251

0.1U_0402_16V4Z

1 2

R572 0_0402_5%@

1 2

IDEDB9
IDEDB10
IDEDB11

IDEDB13
IDEDB14
IDEDB15
SD_DREQ
SD_SIOR#

IDEDACK#B

IDESAB2

1 2

R114 100K_0402_5%@

INT_CD_R 27

Pin4 of CD_ROM connector is NC if use Pioneer ODD(DVD Dual DVR-K12TBC/DVR-K13TBC) . 4/8

+5VS

IDEREQB 20
IDEIOR#B 20

IDEDACK#B 20

IDESAB2 20
IDECS#B3 20

+5VS
+5VS
+5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R111
100K_0402_5%

1 2

+5VS

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

HDD & CDROM Connector

LA-2251

1

of

22 47Monday, May 17, 2004

1.0

A

CARDBUS CB1410

1

C189
1000P_0402_50V7K@

2

1

C183

0.1U_0402_16V4Z

2

1

C194
1000P_0402_50V7K@

2

R68

1 2

100K_0402_5%

Q11

2N7002_SOT23

CLK_PCI_PCM12

+3VALW

D5

2 1

R570

+3VS

PCI_AD[0..31]
PCI_CBE#[0..3]

G

S

R69

1 2

10_0402_5%@

R82

22K_0402_5%
RB751V_SOD323

1 2

0_0402_5%@

1 2

10K_0402_5%@

1

C190
1000P_0402_50V7K@

2

1

C191

0.1U_0402_16V4Z

2

2

13

D

12

R84

PCI_DEVSEL#20,24,26

PCI_FRAME#20,24,26

PCI_CBE#320,24,26
PCI_CBE#220,24,26

PCI_CBE#020,24,26

PCI_IRDY#20,24,26
PCI_TRDY#20,24,26

PCI_STOP#20,24,26
PCI_PERR#24,26
PCI_SERR#20,26

PCI_GNT#220

PCM_SUSP#33

1

2

PCI_CBE#120,24,26

PCI_RST#20,22,24,26,30

PCI_PAR20,24,26

PCM_PME#26,33,34

PCI_AD20

PCM_RI#33

C192

0.1U_0402_16V4Z

SIRQ19,30,33

G_RST33

1 1

2 2

3 3

4 4

PCI_AD[0..31]20,24,26

PCI_CBE#[0..3]20,24,26

+PWR_PCM+PWR_PCM

1

C181

4.7U_0805_10V4Z

2

+PWR_PCM +PWR_PCM

1

C182

0.1U_0402_16V4Z

2

+PWR_PCM

1

C193
1000P_0402_50V7K@

2

+5VS

PCI_REQ#220

C184 15P_0402_50V8D@

1 2

PCI_PIRQA#9,16,20,24

PCI_CLKRUN#18,26,33

+PWR_PCM

R83

100_0402_5%

10_0402_5%

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

PCM_INTA#

PCM_RI#

G_RST

R67

12

R86

12

B

R569

+3VS

0_0805_5%

C187

0.1U_0402_16V4Z

VPPD0
VPPD1
VCCD0#
VCCD1#

U4

3

AD31

4

AD30

5

AD29

7

AD28

8

AD27

9

AD26

10

AD25

11

AD24

15

AD23

16

AD22

17

AD21

19

AD20

23

AD19

24

AD18

25

AD17

26

AD16

38

AD15

39

AD14

40

AD13

41

AD12

43

AD11

45

AD10

46

AD9

47

AD8

49

AD7

51

AD6

52

AD5

53

AD4

54

AD3

55

AD2

56

AD1

57

AD0

12

C/BE3#

27

C/BE2#

37

C/BE1#

48

C/BE0#

20

RST#

28

FRAME#

29

IRDY#

31

TRDY#

32

DEVSEL#

33

STOP#

34

PERR#

35

SERR#

36

PAR

1

REQ#

2

GNT#

21

PCLK

59

RI_OUT#/PME#

70

SUSPEND#

13

IDSEL

60

MFUNC0

61

MFUNC1

64

MFUNC2

65

MFUNC3

67

MFUNC4

68

MFUNC5

69

MFUNC6

66

VCC/GRST#

12

0_0805_5%@

CB_+3VALW

12

1

1

C186

2

2

0.1U_0402_16V4Z

74

72

VPPD071VPPD1

VCCD0#73VCCD1#

PQFP 144

22.2 X 22.2 X 1.60

GND1

GND2

6

22

C

W=10mils

S1_VCC

1

C188

0.1U_0402_16V4Z

2

+PWR_PCM

18

44

90

126

VCCP1

VCCP0

VCCSK1

VCCSK0

GND3

GND4

GND5

GND6

GND7

GND8

42

58

78

94

114

130

138

VCC1

122

VCC2

RSVD/D14

84

14

30

50

86

102

VCC6

VCC5

VCC4

VCC3

CAD15/IOWR#

CAD13/IORD#

CC/BE3#/REG#

CC/BE2#/A12
CC/BE0#/CE1#
CRST#/RESET

CFRAME#/A23

CDEVSEL#/A21

CPERR#/A14

CSERR#/WAIT#

CREQ#/INPACK#

CSTSCHG/BVD1

CCLKRUN#/WP

CBLOCK#/A19
CINT#/READY

CAUDIO/BVD2

CCD2#/CD2#

CCD1#/CD1#

RSVD/A18

RSVD/D2

CB1410B0_LQFP144

100

143

S1_D2
S1_A18
S1_D14

63

VCCI

VCC7

CAD31/D10

CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6

CAD19/A25

CAD18/A7
CAD17/A24
CAD16/A17

CAD14/A9
CAD12/A11

CAD11/OE#

CAD10/CE2#

CAD9/A10

CAD8/D15

CAD7/D7

CAD6/D13

CAD5/D6

CAD4/D12

CAD3/D5

CAD2/D11

CAD1/D4
CAD0/D3

CC/BE1#/A8

CIRDY#/A15

CTRDY#/A22
CSTOP#/A20

CPAR/A13

CGNT#/WE#

CCLK/A16

SPKOUT

CVS2/VS2#
CVS1/VS1#

S1_VCC

1

C185

0.1U_0402_16V4Z

2

(2A,80mils ,Via NO.= 4)

JOPEN1

112

JUMP_43X79
JOPEN2

112

JUMP_43X79@

S1_D10

144

S1_D9

142

S1_D1

141

S1_D8

140

S1_D0

139

S1_A0

129

S1_A1

128

S1_A2

127

S1_A3

124

S1_A4

121

S1_A5

120

S1_A6

118

S1_A25

116

S1_A7

115

S1_A24

113

S1_A17

98

S1_IOWR#

96

S1_A9

97

S1_IORD#

93

S1_A11

95

S1_OE#

92

S1_CE2#

91

S1_A10

89

S1_D15

87

S1_D7

85

S1_D13

82

S1_D6

83

S1_D12

80

S1_D5

81

S1_D11

77

S1_D4

79

S1_D3

76

S1_REG#

125

S1_A12

112

S1_A8

99

S1_CE1#

88

S1_RST

119

S1_A23

111

S1_A15

110

S1_A22

109

S1_A21

107

S1_A20

105

S1_A14

104

S1_WAIT#

133

S1_A13

101

S1_INPACK#

123

S1_WE#

106

SA_A16

108
135

136
103
132
62

134
137

75
117
131

R76 47_0402_5%

Placement near to PCMCIA controller

S1_BVD1
S1_WP

S1_A19
S1_RDY#

S1_BVD2
S1_CD2#

S1_CD1#
S1_VS2
S1_VS1

2

+3VALW+PWR_PCM

2

+3VS+PWR_PCM

1 2

S1_VCC

1

2

PCM_SPK# 27

C210

C209

0.1U_0402_16V4Z

4.7U_0805_10V4Z

C208

4.7U_0805_10V4Z

S1_A23
S1_RST
S1_OE#
S1_CE1#
S1_CE2#

S1_CD1#
S1_CD2#

S1_A16

1

2

S1_VPP

1

2

R70 22K_0402_5%

1 2

R71 47K_0402_5%

1 2

R72 47K_0402_5%

1 2

R73 43K_0402_5%

1 2

R74 43K_0402_5%

1 2

C197 10P_0402_50V8K

1 2

C198 10P_0402_50V8K

1 2

D

PCMCIA POWER CTRL.

S1_VCC

S1_VPP

U5

9

12V

5

5V

6

5V

3

3.3V

4

3.3V
GND

7

S1_D3
S1_CD1#

S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19

S1_WE#

S1_A20

S1_RDY#

S1_A21

S1_A16

S1_A22

S1_A15

S1_A23
S1_A12

S1_A24

S1_A7

S1_A25

S1_A6

S1_VS2

S1_A5

S1_RST

S1_A4

S1_WAIT#

S1_A3

S1_INPACK#

S1_A2

S1_REG#

S1_A1

S1_BVD2

S1_A0

S1_BVD1

S1_D0

S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#

VCC
VCC
VCC

VPP

VCCD0
VCCD1
VPPD0
VPPD1

OC

SHDN

CP2211C1_SSOP16

16

G_RST

13
12
11

10

1
2
15
14

8

JP15

1

35

2

36

3

37

4

38

5

39

6

40

7

41

8

42

9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68

SANTA_130606-1_LT

C200 2.2U_0805_16V4Z

1 2

C201 4.7U_0805_10V4Z

1 2

C202 4.7U_0805_10V4Z

1 2

C205 4.7U_0805_10V4Z

1 2

C206 4.7U_0805_10V4Z

1 2

S1_VCC

+12VALW

+5VALW

+3VALW

S1_VPP

VCCD0#
VCCD1#
VPPD0
VPPD1

G_RST 33

GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
DATA9
DATA2
DATA10
WP
CD2#
GND
GND

E

S1_VCC

1

C199

4.7U_0805_10V4Z

2

S1_VPP

1

C699

0.1U_0402_16V4Z

2

GND
GND

69
70

CARDBUS SOCKET

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

CardBus Controller CB1410/CardBus Socket/Power Switch

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LA-2251

E

1.0

of

23 47Monday, May 17, 2004

5

4

3

2

1

R543

1

C708

2

0.1U_0402_16V7K

12

JP23

4

4

3

3

2

2

1

1

FOX_UV31413-T1

+3VS

1

C709

2

D D

R553

C714

U38

25

AD0

24

AD1

20

AD2

19

AD3

18

AD4

16

AD5

15

AD6

14

AD7

11

AD8

10

AD9

9

AD10

8

AD11

7

AD12

4

AD13

3

AD14

2

AD15

117

AD16

116

AD17

115

AD18

114

AD19

113

AD20

109

AD21

107

AD22

106

AD23

103

AD24

102

AD25

101

AD26

98

AD27

97

AD28

96

AD29

95

AD30

94

AD31

12

CBE0#

1

CBE1#

119

CBE2#

104

CBE3#

105

IDSEL

120

FRAME#

121

IRDY#

123

TRDY#

124

DEVSEL#

125

STOP#

127

PERR#

128

PAR

93

REQ#

92

GNT#

88

INTA#

89

PCIRST#

90

PCICLK

NC45NC48NC49NC50NC37NC51NC52NC53NC54NC40NC39NC35NC74NC75NC76NC77NC78NC64NC81NC82NC83NC84NC85I2CEN43CARDEN

10_0402_5%@

15P_0402_50V8D@

NC41NC

42

PCI_AD[0..31]20,23,26

PCI_CBE#[0..3]20,23,26

C C

B B

PCI_AD[0..31]
PCI_CBE#[0..3]

PCI_CBE#020,23,26
PCI_CBE#120,23,26
PCI_CBE#220,23,26
PCI_CBE#320,23,26

PCI_AD16

R548 100_0402_5%

PCI_FRAME#20,23,26

PCI_IRDY#20,23,26

PCI_TRDY#20,23,26

PCI_DEVSEL#20,23,26

PCI_STOP#20,23,26

PCI_PERR#23,26

PCI_PAR20,23,26
PCI_REQ#020
PCI_GNT#020

PCI_PIRQA#9,16,20,23

PCI_RST#20,22,23,26,30

CLK_PCI_139412

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

12

12

1

2

+3VS

46

110

122

111

21

30

PVD36PVD

VCC99VCC

VCC

VCC5VCC17VCC32VCC

VCC

VCC

Power

IEEE 1394

VT6301S

PCI Bus

NC

+3VS

R554

4.7K_0402_5%

1

C706

2

0.1U_0402_16V7K

+3VS

8
7

EECK_1394

6

EEDI_1394

5

0.1U_0402_16V7K

1

C707

2

510_0402_5%

0.1U_0402_16V7K

1

C701

100

108

118

126

112

31

GND91GND

GND

GND

GND

GND47GND

OSC

XI

57

44

12

38

GND6GND13GND23GND33GND

GND22GND

EEPROM
I/F

PM & Test

EECS
EEDO

EEDI/SDA

EECK/SCL

PME#

XCPS
XREXT
TPB0M

TPB0P

TPA0M

TPA0P

TPBIAS0

PHYRESET#

XO

VT6301S-CD_LQFP128

58

1394 Differential Pairs

1394_XO

24.576MHz_16P_3XG-24576-43E1

1394_XI

R555

1

C715
10P_0402_50V8K

2

PVA
PVA
PVA
PVA
PVA
PVA

GND
GND
GND
GND
GND
GND

Y11

1 2

1M_0402_1%

59
62
72
73
86
87

61
65
66
79
80
56

26
27
28
29

34
60
63
67

68
69
70
71

55

+3VS_1394

1 2

EEDI_1394
EECK_1394

1394_XREXT
XTPB0-

XTPB0+
XTPA0­XTPA0+
XTPBIAS0

12

4.7K_0402_5%@

R576

1 2

0_0805_5%

FCM2012C800_0805

R577

R549

6.34K_0402_1%

1

C713

0.1U_0402_16V7K

2

1

C716
10P_0402_50V8K

2

+3VS

12

+3VS

R544

1K_0402_5%@

R547

1K_0402_5%

1

C711
47P_0402_50V8J

2

+3VS

12

12

2

0.1U_0402_16V7K

+3VS_1394

0.1U_0402_16V7K

1

C735

2

0.1U_0402_16V7K

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

270P_0402_50V7K

1

2

Place close to 1394 chip

C712

1

1

C702

2

2

0.1U_0402_16V7K

1

C737

C736

2

0.1U_0402_16V7K

12

R545

54.9_0402_1%

12

R550

54.9_0402_1%

1

2

0.1U_0402_16V7K

C703

1

C738

0.1U_0402_16V7K

2

0.1U_0402_16V7K

1

1

C705

C704

2

2

0.1U_0402_16V7K

U39

1

A0

2

A1

3

A2

4

GND

AT24C02N-10SI-2.7_SO8

12

R546

54.9_0402_1%

12

R551

54.9_0402_1%

12

R552

5.1K_0402_1%

VCC

WP

SCL

SDA

1

C710

0.33U_0603_10V7K

2

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

IEEE1394 Controller & PHY-VIA VT6301S

LA-2251

1

of

24 47Monday, May 17, 2004

1.0

5

+3VALW

1

1

C598

0.1U_0402_16V4Z

D D

C C

B B

A A

Note: Place as close to

L

U30.14/48(LAN Chip)

Y5

LAN_X1 LAN_X2

1 2

25MHZ_20P_1BX25000CK1A

1

C535
27P_0402_50V8J

2

C546

0.1U_0402_16V4Z

2

2

1

C536
27P_0402_50V8J

2

0_0402_5%

LAN_TD+
LAN_TD-

C539 0.1U_0402_16V4Z

1 2

C540 0.1U_0402_16V4Z

1 2

LAN_RD-

49.9_0603_1%

Note: Place as close to

L

U30(LAN Chip)

R432

R434

12

12

1.5K_0402_5%

MDC19

MDIO19
TXD019
TXD119
TXD219
TXD319
TXEN19

TXCLK19

RXDV19

RXD019

RXD119

RXD219

RXD319

RXCLK19

COL19

CRS19

RXER19

PWFBOUT

12

R433

0_0402_5%

12

1

C541

0.1U_0402_16V4Z

2

4

+3VALW

R487

MII

LAN_X1
LAN_X2

PHYAD0
PHYAD1
PHYAD2
PHYAD3
PHYAD4

U31

1
3
2
4
5
7
6

0.5u_TS6121C

R435

49.9_0603_1%

12

TD+
TD­CT
NC
NC
CT
RD+
RD-8RX-

3

+3VALW

U30

25

MDC

26

MDI/O

6

TXD0

5

TXD1

4

TXD2

3

TXD3

2

TXEN

7

TXC

22

RXDV

21

RXD0

20

RXD1

19

RXD2

18

RXD3

16

RXC

1

COL

23

CRS

24

RXER/FXEN

44

MII/SNIB

46

X1

47

X2

9

PHYAD0/LED0

10

PHYAD1/LED1

12

PHYAD2/LED2

13

PHYAD3/LED3

15

PHYAD4/LED4

RTL8201CL_LQFP48

DVDD33
DVDD33

AVDD33

PWFBOUT

PWRGND

PWFBIN

TPRX-

TPRX+

MII I/F

TPTX-

TPTX+
RTSET

ISOLATE

RPTR

SPEED

DUPLEX

CLK

ANE

LDPS

Network I/F

RESETB

NC

DGND
DGND
DGND

AGND
AGND

PHY/LED

14
48

36

PWFBOUT

32

PWFBIN

8

LAN_RD-

30

LAN_RD+

31

LAN_TD-

33

LAN_TD+

34

RTSET

28

ISOLATE

43

RPTR

40

SPEED

39

DUPLEX

38

ANE

37

LDPS

41

RESET#

42
27
11

17
45

29
35

Close to pin36

49.9_0603_1%

L

Keep Out 40mil

16

TX+

14

TX-

15

CT

13

NC

12

NC

10

CT

11

RX+

9

R436

75_0402_5%

LAYOUT NOTICE: This area do not
connect to power plan include Vcc and

RJ45_TX+
RJ45_TX-

RJ45_RX+LAN_RD+
RJ45_RX-

12

12

R437
75_0402_5%

RJ45_GND

RJ45_RX-

RJ45_RX+
RJ45_TX­RJ45_TX+

75_0402_5%

RJ45_GND

R438

1 2

1 2

R439
75_0402_5%

+3VALW

L44

1 2

LQG21N4R7K10_0805

1

C534

0.1U_0402_16V4Z

2

12

12

R423

Note: Place as close to
U30(LAN Chip)

R424

49.9_0603_1%

1

C537

0.1U_0402_16V4Z

2

ISOLATE 33

C542

1 2

1000P_0402_50V7K

0.1U_0402_16V4Z@

8
7
6
5
4
3
2
1

JP21

PR4­PR4+
PR2­PR3­PR3+
PR2+
PR1­PR1+

TYCO_E-040227-1628

1

C543

2

EC_RSMRST#9,18,33

SHLD4
SHLD3

SHLD2
SHLD1

LANGND

1

C544

4.7U_0805_10V4Z

2

2

12
11

10
9

Close to pin32 Close to pin8

L43

1 2

LQG21N4R7K10_0805

1

1

C531

22U_1206_16V4Z

R488 33_0402_5%

RESET#

Termination plane should be copled
to chassis ground and also depends
on safety concern

C532

0.1U_0402_16V4Z

2

2

ISOLATE

1 2

R491 5.1K_0402_5%@

MII

1 2

R420 5.1K_0402_5%

SPEED

1 2

R421 5.1K_0402_5%

DUPLEX

1 2

R422 5.1K_0402_5%

ANE

1 2

R425 5.1K_0402_5%

LDPS

1 2

1 2

R427

+3VALW

R426 5.1K_0402_5%

1 2

0_0402_5%

ISOLATE
RPTR
RTSET

Note: Change 2K to 6.2K if
use IC+ chip

1

C538

2

1 2

R429 5.1K_0402_5%@

1 2

R430 5.1K_0402_5%

1 2

R431 2K_0402_1%

R415 5.1K_0402_5%
R416 5.1K_0402_5%
R417 5.1K_0402_5%
R418 5.1K_0402_5%
R419 5.1K_0402_5%

1 2

0.1U_0402_16V4Z@

R428

5.1K_0402_5%@

1

PWFBINPWFBOUT

1

C533

0.1U_0402_16V4Z

2

+3VALW

PHYAD0

12

PHYAD1

12

PHYAD2

12

PHYAD3

12

PHYAD4

12

GND in any layer

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

LAN-PHY RTL8201CL

LA-2251

1

1.0

of

25 47Monday, May 17, 2004

A

B

C

D

E

1 1

WL_ON32,33

+3VS

1

C253

0.1U_0402_16V4Z

2 2

3 3

2

1000P_0402_50V7K@

12

R121

1

C259

2

C254

CLK_PCI_MINI

10_0402_5%@

15P_0402_50V8D@

1

1

C255

2

2

0.1U_0402_16V4Z

PCI_PIRQB#20

PCI_REQ#420

CLK_PCI_MINI12

PCI_REQ#120

PCI_AD3120,23,24
PCI_AD2920,23,24

PCI_AD2720,23,24
PCI_AD2520,23,24

PCI_CBE#320,23,24

PCI_AD2320,23,24
PCI_AD2120,23,24

PCI_AD1920,23,24
PCI_AD1720,23,24

PCI_CBE#220,23,24

PCI_IRDY#20,23,24

PCI_CLKRUN#18,23,33

PCI_SERR#20,23

PCI_PERR#23,24

PCI_CBE#120,23,24

PCI_AD1420,23,24
PCI_AD1220,23,24

PCI_AD1020,23,24

PCI_AD820,23,24
PCI_AD720,23,24

PCI_AD520,23,24
PCI_AD320,23,24
PCI_AD120,23,24

IDSEL : AD21

+5VS

+5VS

LAN RESERVED LAN RESERVED

WL_ON

R115 0_0402_5%

+3VS_MINI_L

W=40mils

CLK_PCI_MINI

PCI_AD21

R119

100_0402_5%

W=30mils

TIP

1 2

1 2

W=30mils

Note: Pin127,129 need be connected to GND

L

KEY KEY

101
103
105
107
109
111
113
115
117
119
121
123

127

Mini-PCI SLOT

JP8

112
334

556
778
9910
111112
131314
151516
171718
191920
212122
232324
252526
272728
292930
313132
333334
353536
373738
393940
414142
434344
454546
474748
494950
515152
535354
555556
575758
595960
616162
636364
656566
676768
696970
717172
737374
757576
777778
797980
818182
838384
858586
878788
898990
919192
939394
959596
979798
9999100
101
103
105
107
109
111
113
115
117
119
121
123

127

RING

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102

102

104

104

106

106

108

108

110

110

112

112

114

114

116

116

118

118

120

120

122

122

124

124

129

129

W=30mils

R117 0_0402_5%

1 2

W=40mils

W=40mils

1 2

R579 0_0402_5%@

1 2

R120 100_0402_5%

W=40mils

+3VS_MINI_R

MDM_PME#
WLAN_PME#

PCI_AD17
PCI_AD22

PCI_AD18

+5VS
PCI_PIRQB# 20
PCI_GNT#4 20
+3VALW
PCI_RST# 20,22,23,24,30

PCI_GNT#1 20
MDM_PME# 23,33,34

WLAN_PME# 23,33,34
PCI_AD30 20,23,24

PCI_AD28 20,23,24
PCI_AD26 20,23,24
PCI_AD24 20,23,24

IDSEL : AD17

PCI_AD22 20,23,24
PCI_AD20 20,23,24
PCI_PAR 20,23,24
PCI_AD18 20,23,24
PCI_AD16 20,23,24

PCI_FRAME# 20,23,24
PCI_TRDY# 20,23,24
PCI_STOP# 20,23,24

PCI_DEVSEL# 20,23,24
PCI_AD15 20,23,24

PCI_AD13 20,23,24
PCI_AD11 20,23,24

PCI_AD9 20,23,24
PCI_CBE#0 20,23,24

PCI_AD6 20,23,24
PCI_AD4 20,23,24
PCI_AD2 20,23,24
PCI_AD0 20,23,24

+3VALW

+3VALW

1

C252
1U_0603_10V4Z

2

0.1U_0402_16V4Z

1

C256

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

C260

C268

1

C257

2

1000P_0402_50V7K@

+5VS

1

C261

2

0.1U_0402_16V4Z

+3VS_MINI_L

1

C264

4.7U_0805_10V4Z

2

+3VALW

1

C269

2

0.1U_0402_16V4Z

+3VS

1

C258

0.1U_0402_16V4Z

2

1

1

C262
1000P_0402_50V7K@

2

2

+3VS

+3VS_MINI_R

1

C265

4.7U_0805_10V4Z

2

1000P_0402_50V7K@

1

1

C270

2

2

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Mini PCI Slot

LA-2251

26 47Monday, May 17, 2004

E

1.0

of

5

4

3

2

1

+5VS

+VDDA

12

R307

+5VS

C462

R304

R316

1

2

LINEL_IN_C
LINER_IN_CLINEINR_R
CDL_P
CDR_P
CD_AGNDRC
MICIN

MD_SPKRC
MONO_IN

12

12

D D

100K_0402_5%@

C454 1U_0603_10V4Z

BEEP#33

PCM_SPK#23

SB_SPKR18

C C

R320 6.8K_0402_5%

1 2

R319 6.8K_0402_5%

1 2

R324 6.8K_0402_5%

INT_CD_L22

INT_CD_R22

B B

A A

+AUD_VREF

MICIN_IN32

MD_SPK29

0.1U_0402_16V4Z

2

C491

1

CD_AGND22

1 2

R326 6.8K_0402_5%

1 2

R327 6.8K_0402_5%

1 2

R329 6.8K_0402_5%

1 2

R330 2.2K_0402_5%

1 2

C483 1U_0603_10V4Z@

12

R334 1K_0402_5%@
R335 20K_0402_5%

R336 33K_0402_5%

1 2

R338

1 2

6.8K_0402_5%

12

R341
0_0402_5%

1 2

C459 1U_0603_10V4Z

1 2

C460 1U_0603_10V4Z

1 2

LINE_OUT_PLUG28,32,33

For ALC250 disable HW EQ when Headphone plug.

12
12

+3VS

AC97_RST#19,29
AC97_SYNC19,29
AC97_SDOUT19,29

CD_AGNDR

12

R342

6.8K_0402_5%

No-Stuff

5

R309 560_0402_5%

1 2

R313 560_0402_5%

1 2

R315 560_0402_5%

1 2

10K_0402_5%@

L36 0_0805_5%

1 2

10U_0805_10V4Z

C467 0.1U_0402_16V4Z@

12

C733 0.1U_0402_16V4Z@

12

C734 0.1U_0402_16V4Z@

12

R318

HP_SENSE

1 2

0_0402_5%

C472 0.1U_0402_16V4Z@

1 2

LINEINL_R

CDL
CDR
CD_AGNDR

MD_MONR MD_MONRC
MD_SPKR

Ra

Ra

Stuff

4

C475 1U_0603_10V4Z

1 2

C477 1U_0603_10V4Z

1 2

C479 1U_0603_10V4Z

1 2

C480 1U_0603_10V4Z

1 2

C481 0.1U_0402_16V4Z

1 2

C482 1U_0603_10V4Z

1 2

C484 1U_0603_10V4Z@

1 2

C485 0.1U_0402_16V4Z

1 2

R531 47K_0402_5%

1 2

R337 0_0402_5%

1 2

EAPD28

12

R343
0_0402_5%

MODE

14.318MHz External

24.576MHz Crystal
or External Colck

10K_0402_5%

1

2

R312 0_0402_5%

38

AVDD125AVDD2

LINE_OUT_L
LINE_OUT_R

MONO_OUT/VREFOUT3

C456
10U_0805_10V4Z

MONO_IN_R

12

12

VDDC

9

DVDD11DVDD2

HP_OUT_L

HP_OUT_R

BIT_CLK

SDATA_IN

XTL_IN

XTL_OUT

AFILT1
AFILT2

VREFOUT

VREF

DCVOL

NC

VREFOUT2

VAUX

SCK
SDA

NC
AVSS1
AVSS2

C

2

B

E

12

D17
1SS355_SOD323

AVDD_AC97

1

C463

0.1U_0402_16V4Z

2

U26

14

AUX_L

15

AUX_R

16

JD2

17

JD1

23

LINE_IN_L

24

LINE_IN_R

18

CD_L

20

CD_R

19

CD_GND

21

MIC1

22

MIC2

13

PHONE

12

PC_BEEP

11

RESET#

10

SYNC

5

SDATA_OUT

45

NC

46

XTLSEL

47

SPDIFI/EAPD

48

SPDIFO

4

DVSS1

7

DVSS2

ALC250_LQFP48

12

R311
10K_0402_5%

1

Q25
2SC2411K_SC59

3

R345 Pin45 FREQ. SEL

X

X

ON

X

24.576MHZ

X

14.318MHZ

ON

48MHZ

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

C458

1 2

1U_0603_10V4Z

Close to AC97 CODEC

R314

2.4K_0402_5%

1

C464

0.1U_0402_16V4Z

2

C466 1000P_0402_50V7K
C468 1000P_0402_50V7K

LINEL

C469 4.7U_0805_10V4Z

35

LINER

C470 4.7U_0805_10V4Z

36

MDMIC

C471 1U_0603_10V4Z

37

C473 1000P_0402_50V7K

39

LINEL_HP

41

LINER_HP

R323 22_0402_5%

6

R325 22_0402_5%

8
2

3

C486 1000P_0402_50V7K

29

C489 1000P_0402_50V7K

30

+AUD_VREF

28

AUD_VREFGND

27
32

C494 1U_0603_10V4Z
C495 1U_0603_10V4Z

31

C496 1U_0603_10V4Z

33

R340 0_0402_5%

34

1 2
43
44

40
26
42

C450

10U_0805_10V4Z

MONO_IN

R317 0_0805_5%

1 2

1

C465
10U_0805_10V4Z

2

1 2
1 2
1 2
1 2
1 2
1 2

C474 4.7U_0805_10V4Z

1 2
1 2

1 2
1 2
1 2

C476 4.7U_0805_10V4Z

1M_0402_5%@

XTL_OUT

12
12

1

1

C451

2

2

0.1U_0402_16V4Z

1 2
1 2

12

R331

1U_0603_10V4Z

+VDDA

10K_0402_5%

C492

12

12

+3VS+VDDA

1

2

R339

R536

24.576MHZ_16P_1BX24576EE1B@

C487

0_0402_5%@

2

4
2

8

LEFT
RIGHT

Y3

22P_0402_50V8J@

1

2

U23

VIN

SENSE or ADJ

DELAY
ERROR7CNOISE
SD

SI9182DH-AD_MSOP8

LEFT 28
RIGHT 28

MD_MIC 29

L_HP 28
R_HP 28
AC97_BITCLK 19,29

AC97_SDIN0 19

12

+AUD_VREF

1

C493

0.1U_0402_16V4Z

2

AUD_VREFGND

0.1U_0402_16V4Z

VOUT

GND

5
6
1
3

1

2

C455

0.1U_0402_16V4Z

+VDDA

12

R306
150K_0603_1%

12

R310
51K_0603_1%

1

C453
10U_0805_10V4Z

2

+VDDA

AC97 Codec

C478 15P_0402_50V8D@

1 2

0_0402_5%

1

C488

22P_0402_50V8J@

2

C497

Title

Size Document Number Rev

Date: Sheet

R328

12

CLK_14M_CODECXTL_IN

12

R332

10_0402_5%@

1

C490

15P_0402_50V8J@

2

1

1

C498

10U_0805_10V4Z@

2

2

Compal Electronics, Inc.

AC97 CODEC-ALC250

LA-2251

CLK_14M_CODEC 12

L37

1 2

0_0805_5%@

L38

1 2

0_0805_5%@

L39

1 2

0_0805_5%@

L40

1 2

0_0805_5%@

L41

1 2

0_0805_5%

DGND AGND

27 47Monday, May 17, 2004

1

GNDA

1.0

of

A

B

C

D

E

+5VAMP +5VS

L58 0_0805_5%@

1 2

+5VAMP +5VS

L12 0_1206_5%

1 2

3

11

7

22
21
14
24

LEFT_C

C2760.47U_0603_16V7K

RIGHT_C

C2790.47U_0603_16V7K

LHP_C

C2810.47U_0603_16V7K

RHP_C

C286

10K_0402_5%

R580

9

10

4

16

12

U9

PVDD

SHUTDOWN#

PVDD

SE/BTL#

VDD

BYPASS

HP/LINE#
VOLUME
LOUT+
ROUT+
LLINEIN
RLINEIN5SEDIFF
LHPIN
RHPIN

FADE#

TPA6011A4_TSSOP24

+5VAMP

4/29

LOUT-

ROUT-

SEMAX

PGND
PGND
AGND

LIN

RIN

15

LINE_OUT_PLUG

23
17
12
2
8
6

19
20

1
13
18

1U_0603_10V4Z

C271

1 2

VOLUME

R137

1.3K_0402_5%

1

2

1 2

R138

4.7U_0805_10V4Z

1

C272

2

22U_1206_10V4Z

C2740.1U_0402_16V4Z

LEFT_R
RIGHT_R

LHP_R

1.3K_0402_5%

1 2

R139

1.3K_0402_5%

1 2

1

C273

2

1 2
1 2
1 2

RHP_R

1 2

0.47U_0603_16V7K

1 1

+5VAMP

2

C277

0.1U_0402_16V4Z

1

12

R134
1K_0402_5%

R135

1 2

1.6K_0402_5%

2 2

MSB333

MSB233

MSB133

MSB033

12

R140

1K_0402_1%@

1

O

Q20

DTC124EK_SC59@

G

3I2

R141

2K_0402_1%@

I

2

LINE_OUT_PLUG27,32,33

12

4.3K_0402_5%@

1

O

Q21

DTC124EK_SC59@

G

3

R142

I

2

+5VS

12

INTSPK_L+32

INTSPK_R+32

12

1

O

3

R127
100K_0402_5%

LINE_OUT_PLUG

LEFT27

RIGHT27

L_HP27

R_HP27

Q22

DTC124EK_SC59@

G

INTSPK_L+
INTSPK_R+

8K_0402_5%@

R143

0.1U_0402_16V4Z

C2750.47U_0603_16V7K

1 2

C2780.47U_0603_16V7K

1 2

C2800.47U_0603_16V7K

1 2

C2850.47U_0603_16V7K

1 2

VOLUME

12

1

O

I

2

R136

1.3K_0402_5%

1 2

Q23

DTC124EK_SC59@

G

3

+5VAMP

12

R124

SHUTDOWN#

2N7002_SOT23

1

2

22P_0603_50V8J

100K_0402_5%

13

D

Q19

S

R128 100K_0402_5%

1 2

INTSPK_L­INTSPK_R-LINE_OUT_PLUG

1

C283

C282

2

R125 0_0402_5%@

1 2

2

G

R126 0_0402_5%

1 2

INTSPK_L- 32
INTSPK_R- 32

1

C284
22P_0603_50V8J

2

+5VS

R130

10K_0402_5%

R132

10K_0402_5%@

EAPD 27
EC_MUTEO 33

+5VAMP +5VAMP

12

12

12

12

R131

0_0402_5%@

R133
0_0402_5%

3 3

00 0
0001
0010
0011
0100
0101
011
0111
1000
1001
1010
1011
1100
1101

4 4

1110
1111

A

MSB0MSB3

MSB1MSB2

0

0

4.7225

4.47

4.34

4.0485

3.86

0

BTL SEVo (dB)

20
20
20
20
20
20

(dB)

14
14
14
14
14

143.719

3.56
14
12
10
8
6

83.4

63.272

43.1659

23.05

02.938

2.84

2.76

2.67

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

AMP & Audio Jack

LA-2251

28 47Monday, May 17, 2004

E

1.0

of

MDC Note
Pin 1 is NC for Pctel and connexant MDC modem
Pin 2 is NC for Pctel and connexant MDC modem

+3VALW

1

C292

4.7U_0805_10V4Z

2

BlueTooth Interface

L13
L14

0_0603_5%

0_0603_5%

12
12

+3VALW

USBP0+
USBP0-

BT_ON#

USB20P0+19

USB20P0-19

USB20P0+
USB20P0-

1000P_0402_50V7K

2

C293

0.1U_0402_16V4Z

1

+3VALW

Bluetooth Connector

JP16

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

ACES_87213-1000@

C289

AC97_SDOUT19,27

0_0603_5%

AC97_RST#19,27

1

2

MD_MIC27

R150

1 2

1 2

1

C290

0.1U_0402_16V4Z

2

R144

+3VALW

0_0603_5%

MDC Conn.

JP14

1

MONO_OUT/PC_BEEP

3

GND

5

AUXA_RIGHT

7

AUXA_LEFT

9

CD_GND

11

CD_RIGHT

13

CD_LEFT

15

GND

17

+3.3Vaux/BT_VCC

19

GND

21

+3.3Vmain

23

AC97_SDATA_OUT

25

AC97_RESET#

27

GND

29

AC97_MSTRCLK

ACES_88018-3010

R575 0_0402_5%@

1 2

C300

12

0.1U_0402_16V4Z

R156

4.7K_0402_1%

1 2

1

C287

2

1000P_0402_50V7K@

AUDIO_PWRDN/DETECH

RESERVED/PRIMARY_DN

RESERVED/+5VD/WAKEUP

U10

5

IN

3

SET

AATI4610AIGV-T1_SOT23-5

1

OUT

4

ON#

2

GND

SYSON#36

0.1U_0402_16V4Z@

1

C288

2

MONO_PHONE

RESERVED/BT_ON#

+5Vmain

RESERVED/USB+

RESERVED/USB-

RESERVED/GND

AC97_SYNC
AC97_SDATA_IN1
AC97_SDATA_IN0

AC97_BITCLK

+USB_VCCA+5VALW

SYSON#

R159

20K_0402_5%

GND

GND

+5VMDC

1 2

R145 0_0805_5%@

C291 1000P_0402_50V7K@

BT_DETACH

2
4

BT_ON#

6
8
10

USBBlue+ USB20P4+

12
14

R149 10K_0402_5%

16
18
20
22

R151 22_0402_5%

24

R152 22_0402_5%@

26
28
30

12

R155
10K_0402_5%

12

1

C302
1000P_0402_50V7K

2

12

BT_DETACH 33
MD_SPK 27
BT_ON# 32,33

R147 0_0603_5%

1 2

R148 0_0603_5%

1 2

1 2

12
12

R153

10_0402_5%@

1 2

1

C296

22P_0402_25V8K

@

2

1

C301

0.47U_0603_16V7K

2

1 2

R157 0_0402_5%

1 2

R158 0_0402_5%

+5VALW

BT_WAKE_UP

OVCUR#3 19
OVCUR#5 19

+3VS

R146
100K_0402_5%

1 2

USB20P4-USBBlue-

BT_WAKE_UP 33
AC97_SYNC 19,27

AC97_SDIN1 19

AC97_BITCLK 19,27

MDC_DET# 30

USB20P4+ 19
USB20P4- 19

+3VALW

RJ11 CONN.

MOD_TIP

MOD_RING

C294

1

1
2

2

1

2

@

DSSA-P3100SB

220P_1808_3KV8K@

VH1

MOD_RING
MOD_TIP

USB CONNECTOR 1

150U_D2_6.3VM

USB20P3-

R154 0_0402_5%

USB20P3-19

USB20P3+19

USB20P3+

1 2

R160 0_0402_5%

1 2

C297

JP22

1

TIP

2

RING

3

3

4

4

5

GND

6

GND

ALLTOP_C10121-10204

1

C295

220P_1808_3KV8K

@

2

W=40mils

1

+

C298

2

0.1U_0402_16V4Z

JP4

2
1

JST_SM02B-SRSS

+USB_VCCA

1

1

C299

1000P_0402_50V7K@

2

2

USBP3­USBP3+

JP18

1
2
3
4

SUYIN_2551A-04G5T-A

SWITCH BOARD CONN.

+5VS

NUMLED#33

CAPSLED#33

JP3

1

6

1

6

2

7

2

7

3

8

3

8

4

9

4

9

5

10

5

10

SUYIN_80060AR-010G2T-G

USER_BTN0# 33
USER_BTN1# 33
BT/WL_ON/OFF# 32,33SCROLLED#33

C303

0.1U_0402_16V4Z

R162

4.7K_0402_1%

L

U11

12

5

3

AATI4610AIGV-T1_SOT23-5

1 2

IN

SET

OUT
ON#

GND

1
4
2

Note: PLACE CLOSE TO EACH USB PORT

5 IN 1 CONN

+VCC_CARDREADER+VCC_CARDREADER

JP32

0_0603_5%

USB20P2+19

USB20P2-19
CR_LED#22

L19
L20

0_0603_5%

12
12

L_USB2_D+
L_USB2_D­CR_LED#

1 7
2 8
3 9
4

10

5

11

6

12

ACES_85203-0602

L_USB2_D+
L_USB2_D­CR_LED#

JOPEN3

112

JUMP_43X79
JOPEN4

112

JUMP_43X79@

2

+5VS+VCC_CARDREADER

2

+3VALW+VCC_CARDREADER

SYSON#

R166

20K_0402_5%

+USB_VCCB+5VALW

12

R161
10K_0402_5%

12

1

C308
1000P_0402_50V7K

2

1

C305

0.47U_0603_16V7K

2

OVCUR#1 19

USB CONNECTOR 2

USB20P5-19

USB20P5+19

Note: PLACE CLOSE TO EACH USB PORT

L

USB CONNECTOR 3

USB20P1-19

USB20P1+19

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1

2

1

2

USBP5+USB20P5+

USBP1­USBP1+USB20P1+

1

C307

2

1

C311

2

+USB_VCCA

1000P_0402_50V7K@

+USB_VCCB

1000P_0402_50V7K@

SUYIN_2551A-04G5T-A

1
2
3
4

SUYIN_2537A-04G5T

29 47Monday, May 17, 2004

W=40mils

1

+

C304

150U_D2_6.3VM

USB20P5- USBP5-

R163 0_0402_5%

1 2

R167 0_0402_5%

1 2

C306

2

0.1U_0402_16V4Z

W=40mils

1

+

C309

150U_D2_6.3VM

USB20P1-

R168 0_0402_5%

1 2

R170 0_0402_5%

1 2

Title

Size Document Number Rev

Date: Sheet

C310

2

0.1U_0402_16V4Z

Compal Electronics, Inc.

MDC , Bluetooth & USB CONN.

LA-2251

JP17

JP11

of

1
2
3
4

VCC
D­D+
GND

1.0

5

4

3

2

1

+3VS

C499

0.1U_0402_10V6K

D D

+3VS

+3VS

C C

CLK_PCI_SIO CLK_LPC_48M

B B

RTS1#

A A

Base address 1:2Eh/2Fh
Base address 0:4Eh/4Fh 1:Test Mode

0.1U_0402_10V6K

1

1

1

2

C501

C500

2

2

0.1U_0402_10V6K

1 2

R345 100K_0402_5%

1 8
2 7
3 6
4 5

RP77 4.7K_0804_8P4R_5%

1 8
2 7
3 6

4 5

RP78 4.7K_0804_8P4R_5%
R348

R350

W

SOUT2

For Winbond 48M strapping

12

R357

R360
10K_0402_1%

1 2

12

4.7K_0402_5%

12

4.7K_0402_5%

12

R352

33_0402_5%@

1

C505

15P_0402_50V8J@

2

R356

1 2

4.7K_0402_5%

12

R358

10K_0402_5%@

DTR1# SOUT1

10K_0402_5%@

R361

2.2K_0402_5%

1 2

0:Normal Opreation

1

C502

0.1U_0402_10V6K

2

LPC_DRQ#019

FDD_DET#

CTS1#
DSR1#
DCD1#
RI1#

CTS2#
DSR2#
DCD2#
RI2#

SIN1
SIN2

12

R353

10_0402_5%@

1

C506

10P_0402_50V8J@

2

+3VS

+3VS+3VS+3VS

12

R359

10K_0402_5%@

R362
10K_0402_1%

1 2

0: Enable ROM I/F as GPIO
1:Enable Flash Rom

4.7K_0402_5%@

R354

10K_0402_5%

R355

@

FIR@10K_0402_5%

R344

+3VS

+3VS

12

12

12

CLK_PCI_SIO12

LPC_FRAME#19,33

LPC_AD019,33
LPC_AD119,33
LPC_AD219,33
LPC_AD319,33

+3VS

R351 4.7K_0402_5%

MDC_DET#29

FDD_DET#31

SIRQ19,23,33

1 2

R349

LPC_RST#
CLK_PCI_SIO
SIRQ

LFRAME#
LPC_AD0

LPC_AD1
LPC_AD2
LPC_AD3

1 2

10K_0402_5%@

FIR_DET#
FDD_DET#

+3VS

10U_0805_10V4Z

105

5

75

U27

28

LRESET#

19

PCICLK

21

SERIRQ

20

LDRQ#

27

LFRAME#

26

LAD0

25

LAD1

24

LAD2

23

LAD3

128

JAB1/GP10

127

JBB11/GP11

126

JACX/GP12

125

JBCX/GP13

124

JBCY/GP14

123

JACY/GP15

122

JBB2/GP16

121

JAB2/GP17

106

VREF

103

UIC1

104

UIC2

107

UIC3

108

UIC4

109

UIC5

110

DTDN

111

DTDP

113

FANIO2/GP21

114

FANIO1/DTEST

115

FANOUT2/GP20

116

FANOUT1

117

OVTEMP#

118

BEEP

94

XD0/GP30

93

XD1/GP31

92

XD2/GP32

91

XD3/GP33

89

XD4/GP34

88

XD5/GP35

87

XD6/GP36

86

XD7/GP37

85

XA0/GP40

84

XA1/GP41

83

XA2/GP42

82

XA3/GP43

81

XA4/GP44

80

XA5/GP45

79

XA6/GP46

78

XA7/GP47

77

XA8/GP50

76

XA9/GP51

74

XA10/GP52

73

XA11/GP53

72

XA12/GP54

71

XA13/GP55

70

XA14/GP56

69

XA15/GP57

68

XA16/GP60

67

XA17/GP61

66

XA18/GP62

Note: Place close to MiniPCI Socket

L

+5VS

SIN1
DSR1# RTS1#
CTS1# DTR1#
RI1#

22

VCC

VCC45VCC

VCC

VCCA

LPC

FDD

GAME PORT

OVOLT/MSO/DSEL1

HARDWARE MONITOR

PARALLEL PART

DRVDEN0/AUTOFD#

GP71/SMBDT/DCD2#

GP72/SMBCK/SOUT2

GP74/VID1/DTR2#
GP75/VID2/RTS2#

GP76/VID3/DSR2#

GP77/VID4/CTS2#

SERIAL POART 2

GP70/SCLK/ITMOFF/RI2#

GP22/ITMOFF//OVOLT/PLED

GP23/ATEST/OVFAN/COPEN

OVFAN/MSI/WDTO

GNDD18GNDD60GNDD90GNDA

GNDD

99

112

JP5

1 2
3 4
5 6
7 8
9 10

ACES_85201-1005@

S/W Debug Prepared

STEP#/SLCTIN#

Super I/O strapping for VT1211

5

4

+3VS

1

1

C503

2

INDEX#

MTRA#
DRVB#
DRVA#
MTRB#

DIR#

STEP#

WDATA#

WGATE#

TRK0#

WPT#

RDATA#

HDSEL#

DSKCHG#

DSEL0#

INDEX#PD0

TRK00#/PD1

WRTPRT#/PD2

RDATA#/PD3

DSKCHG#/PD4

PD5
PD6
PD7

WGATE#/SLCT

WDATA#/PE

MTR1#/BUSY

DS1#/ACK#

HDSEL#/ERR#

DIR#/PINIT#

STB#
IRRX

IRTX

IR

GP24/IRRX1

DCD1#

DSR1#

SIN1

RTS1#

SOUT1

CTS1#
DTR1#

SERIAL POART 1

RI1#

GP73/VID0/SIN2

CLKIN

SMI#

GP25/MEMW#

GP26/MEMR#

GP27/ROMCS#

VT1211_LQFP128

SOUT1

DCD1#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2
3
4
6
7
8
9
10
11
12
13
14
15
16
1
120

42
41
40
39
38
37
36
35

29
30
31
32
33
34
43
44
46

64
65
100

53
48
51
49
52
47
50
54

62
61
59
58
57
56
55
63

102
101
119

17
98
97
96
95

C504

0.1U_0402_10V6K

2

INDEX#

TRACK0#
WP#
RDATA#

DSKCHG#

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTSLCTIN#
LPTINIT#
LPTAFD#
LPTSTB#

DCD1#
DSR1#
SIN1
RTS1#
SOUT1
CTS1#
DTR1#
RI1#

DCD2#
SOUT2
SIN2

DSR2#
CTS2#
RI2#

CLK_LPC_48M

INDEX# 31
MTR0# 31

DRV0# 31
FDDIR# 31

STEP# 31
WDATA# 31
WGATE# 31
TRACK0# 31
WP# 31
RDATA# 31
HDSEL# 31
DSKCHG# 31
3MODE# 31

LPD0 31
LPD1 31
LPD2 31
LPD3 31
LPD4 31
LPD5 31
LPD6 31
LPD7 31

LPTSLCT 31
LPTPE 31
LPTBUSY 31
LPTACK# 31
LPTERR# 31
LPTSLCTIN# 31

LPTINIT# 31

LPTAFD# 31
LPTSTB# 31

CLK_LPC_48M 12

CF1

1

1

CF9

1

1

FM2

1

1

H4

H12

HOLEC

HOLEC

1

1

H31

H22

HOLEKB

HOLEJ

1

2

R347 0_0402_5%@

1 2

CF3

CF2

1

1

CF10

CF11

1

1

FM6

FM5

1

H3
HOLEB

1

H5

H9

HOLEC

HOLEC

1

1

H16

H34

HOLEE

HOLEE

1

1

H37
HOLEL

1

1

Title

Size Document Number Rev

Date: Sheet

CF4

CF12

1

1

1

FM1

H14
HOLEC

1

H27
HOLEE

1

LPC_RST#

1

1

1

H2
HOLED

H15
HOLEC

H23
HOLEE

CF7

CF6

1

1

CF15

CF14

1

1

FM4

FM3

1

H1
HOLEE

1

1

H8
HOLEC

1

1

H20

H26

HOLEE

HOLEE

1

1

PAD1

EMI_CLIP

CF5

CF13

Compal Electronics, Inc.

LPC SUPER I/O VIA VT1211

LA-2251

CF8

CF16

H21
HOLEF

1

1

EMI_CLIP

1

H17
HOLEC

H13
HOLEE

1

1

1

PAD2

EMI_CLIP

1

LPC_RST# 20,33PCI_RST#20,22,23,24,26

H6
HOLEC

1

H10
HOLEE

1

PAD3

EMI_CLIP

1

30 47Monday, May 17, 2004

H7
HOLEC

1

H39
HOLEE

1

of

H24
HOLEI

PAD4

1

H11
HOLEC

1

H40
HOLEE

1

1

1.0

5

4

3

2

1

Parallel Port

1

1

C508

0.1U_0402_10V6K

2

2

LPTSTB#30

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

LPTSTB#

LPTAFD#

LPTINIT#
LPTSLCTIN#

LPD[0..7]30

RP79

FD0
FD1
FD2
FD3

2.7K_1206_8P4R_5%
RP80

FD4
FD5
FD6
FD7

2.7K_1206_8P4R_5%
RP81

SLCTIN#
PRNINIT#
LPTERR#
AFD/3M#

2.7K_1206_8P4R_5%
RP82

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

2.7K_1206_8P4R_5%
RP85

FD3
FD2
FD1
FD0

68_0804_8P4R_5%
RP101

FD7
FD6
FD5
FD4

68_0804_8P4R_5%

D18

+5VS

1SS355_SOD323

R364 33_0402_5%

1 2

R365

12

33_0402_5%

R366 33_0402_5%

1 2

R367 33_0402_5%

1 2

LPD[0..7]

LPTACK#30

LPTBUSY30

LPTPE30

LPTSLCT30

+5V_PRN

w=10mils

12

12

R363

2.7K_0402_5%

w=10mils

AFD/3M#
FD0
LPTERR#
FD1
PRNINIT#
FD2
SLCTIN#
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

AFD/3M#
LPTERR#
PRNINIT#
SLCTIN#

220P_1206_8P4C_50V8K

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

220P_1206_8P4C_50V8K

FD3
FD2
FD1
FD0

220P_1206_8P4C_50V8K

FD7
FD6
FD5
FD4

220P_1206_8P4C_50V8K

C513

PWRPRN

1 2

47P_0402_50V8J

JP1

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

SUYIN_7313S-25G2T-AA

CP10

2
3
4 5

CP11

2
3
4 5

CP12

2
3
4 5

CP13

2
3
4 5

10U_0805_10V4Z

FDD_DET#30

81
7
6

81
7
6

81
7
6

81
7
6

C507

4.7U_0805_10V4Z

LPTAFD#30

LPTERR#30

LPTINIT#30

LPTSLCTIN#30

+5V_PRN

+5V_PRN

LPD3
LPD2
LPD1
LPD0

LPD7
LPD6
LPD5
LPD4

+5V_PRN

D D

C C

B B

FDD CONN.

+5VS

+5VS trace to CONN W=100mils

1

2

0.1U_0402_16V4Z

JP31

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

ACES_85203-2602

WDATA#
WGATE#
HDSEL#
FDDIR#

STEP#
MTR0#
DRV0#

C511

52

26

52

51

25

51

50

24

50

49

23

49

48

22

48

47

21

47

46

20

46

45

19

45

44

18

44

43

17

43

42

16

42

41

15

41

40

14

40

39

13

39

38

12

38

37

11

37

36

10

36

35

9

35

34

8

34

33

7

33

32

6

32

31

5

31

30

4

30

29

3

29

28

2

28

27

1

27

DSKCHG#30

FDDIR#30

3MODE#30

WDATA#30
WGATE#30

TRACK0#30

RDATA#30
HDSEL#30

1

C509

2

INDEX#30

DRV0#30

MTR0#30

STEP#30

WP#30

1

C510

2

1U_0603_10V4Z

Note: Place caps. near FDD CONN.

L

+5VS

C514

12

0.1U_0402_16V4Z

INDEX#
DRV0#
DISKCHG#

MTR0#
FDDIR#

3MODE#
STEP#
FDD_DET#
WDATA#

WGATE#
TRACK0#
WP#
RDATA#
HDSEL#

+5VS

RP84

1 8
2 7
3 6
4 5

1K_1206_8P4R_5%@

+5VS

RP100

1 8
2 7
3 6
4 5

1K_1206_8P4R_5%@

C512

+5VS

DSKCHG#
INDEX#
WP#
TRACK0#

RDATA#

DISKCHG#

FDD_DET#

1

1000P_0402_50V7K

2

C515

1 2

0.1U_0402_16V4Z

INDEX#

DRV0#

MTR0#

FDDIR#

3MODE#

STEP#
WDATA#
WGATE#

TRACK0#

WP#
RDATA#
HDSEL#

RP83

1 8
2 7
3 6
4 5

1K_1206_8P4R_5%

1 2

R368 1K_0402_5%

EMI Requirement

INDEX#
DRV0#
DSKCHG#
MTR0#

220P_1206_8P4C_50V8K

FDDIR#
3MODE#
STEP#
WDATA#

220P_1206_8P4C_50V8K

WGATE#
TRACK0#
WP#
RDATA#

220P_1206_8P4C_50V8K

HDSEL#

220P_0402_50V9J

+5VS

CP7

2
3
4 5

CP8

2
3
4 5

CP9

2
3
4 5

C516

1 2

81
7
6

81
7
6

81
7
6

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

Parallel port and FDD Conn.

LA-2251

1

1.0

of

31 47Monday, May 17, 2004

5

4

3

2

1

INT_KBD CONN.

KSI[0..7]
KSO[0..15]

D D

C C

MAIL_LED#33

+3VALW

10K_0402_5%@

BT/WL_ON/OFF#29,33

+3VALW
+3VALW

Q1

2

DTA114YKA_SC59@

10K

47K

R5

13

+3VALW

12

R4

330_0402_5%@

1 2

BT/WL_ON/OFF#

R6 0_0402_5%@

R7 100K_0402_5%

1 2

R8 100K_0402_5%

1 2

KSI[0..7] 33
KSO[0..15] 33

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

LED+

12

JP12

30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

ACES_85201-3005

Note: NEED CLOSEST JP18 ADD BY EMI REQUEST

L

KSO3
KSO2
KSO1
KSO0

KSO7
KSO6
KSO5
KSO4

KSI7
KSI6
KSI5
KSI4

KSI3
KSI2
KSI1
KSI0

KSO11
KSO10
KSO9
KSO8

KSO15
KSO14
KSO13
KSO12

2
3
4 5

100P_1206_8P4C_50V8@

2
3
4 5

100P_1206_8P4C_50V8@

2
3
4 5

100P_1206_8P4C_50V8@

2
3
4 5

100P_1206_8P4C_50V8@

2
3
4 5

100P_1206_8P4C_50V8@

2
3
4 5

100P_1206_8P4C_50V8@

CP1

81
7
6

CP2

81
7
6

CP3

81
7
6

CP4

81
7
6

CP5

81
7
6

CP6

81
7
6

Power BTN

D1

ON/OFFBTN#

1

DAN202U_SC70

+3VALW

12

R2
100K_0402_5%

EC_ON

EC_ON33

1 2

R3 0_0402_5%

Q2

DTC124EK_SC59

SW1

3

4

MPU-101-81_4P

R1 100K_0402_5%

1 2
3
2

1

O

G

I

3

2

1

2

1000P_0402_50V7K

1

TVS2

SF10402ML080C_0402@

2

ON/OFF#

1

2

C1

LID_SW# 33

+3VALW

ON/OFF# 33

EC_PWR_ON# 37

12

D2
RLZ20A_LL34

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

ON/OFFBTN#

1

SF10402ML080C_0402@

TVS1

2

SW2

3

4

EVQQWP02W_4P

1

2

Touch Pad & Status LED Conn.

2

2

JP9

1

R506 0_0402_5%

2
3

ACES_85201-2002

+5VS

3

4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

1

C4

2

L

Note: NEED CLOSEST JP9 ADD BY EMI REQUEST

C687 100P_0402_50V8J@

B B

A A

5

4

1 2

C689 100P_0402_50V8J@

1 2

C691 100P_0402_50V8J@

1 2

C692 100P_0402_50V8J@

1 2

C693 100P_0402_50V8J@

1 2

C695 100P_0402_50V8J@

1 2

PMLED_0#
BATLED_0#
ACT_LED#
BT_ON#
LINE_OUT_PLUG
MICIN_IN

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

R507 0_0402_5%

1 2

R516 0_0402_5%

1 2

R517 0_0402_5%

1 2

R511 0_0402_5%

1 2

R513 0_0402_5%

1 2

R515 0_0402_5%

1 2

R518 0_0402_5%

1 2

R519 0_0402_5%

1 2

R520 0_0402_5%

1 2

R521 0_0402_5%

1 2

R522 0_0402_5%

1 2

R524 0_0402_5%

1 2

L

Note: NEED CLOSEST JP9
ADD BY EMI REQUEST

0.1U_0402_16V4Z@

+5VS

TP_DATA
TP_CLK

BT_ON#
PMLED_0#
BATLED_0#
ACT_LED#

LINE_OUT_PLUG

MICIN_IN

2

+5VALW

C2

22P_0402_25V8K@

MICIN_IN 27

C3

22P_0402_25V8K@

1

1

TP_DATA 33
TP_CLK 33

BT_ON# 29,33
PMLED_0# 33
BATLED_0# 33
ACT_LED# 22

LINE_OUT_PLUG 27,28,33

33P_0402_50V8J@

33P_0402_50V8J@

1

C6

1

2

C7

1

2

2

33P_0402_50V8J@

Title

Size Document Number Rev

Date: Sheet

WL_ON 26,33

1

C5

220P_0402_50V8K@

2

INTSPK_L+ 28
INTSPK_L- 28
INTSPK_R+ 28
INTSPK_R- 28

C8

1

C9

33P_0402_50V8J@

2

Compal Electronics, Inc.

KBD,ON/OFF,T/P & LED

LA-2251

1

1.0

of

32 47Monday, May 17, 2004

A

+3VALW

4.7U_0805_10V4Z

+3VALW

1 1

2 2

PS2_DATA

PS2_CLK
KBD_DATA
KBD_CLK

TP_DATA
TP_CLK

GA20

KBRST#

FSEL#

SELIO#

FRD#

EC_TINIT#

EC_SMD_2 ADB3
EC_SMC_2

3 3

4 4

EC_SMD_1
EC_SMC_1

+3VALW

1 2

R184 20K_0402_5%

M_SEN#

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.1U_0402_16V4Z

1

1

C316

C315

2

2

0.1U_0402_16V4Z

L21

1 2

MURATA BLM11A20PT_0603

L22

MURATA BLM11A20PT_0603

12

1

2

R185 10K_0402_5%

0.1U_0402_16V4Z

1 2

CLK_PCI_EC

R175

10_0402_5%@

C326

15P_0402_50V8D@

RP28

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RP29

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RP30

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

RP31

1 8
2 7
3 6
4 5

10K_0804_8P4R_5%

LID_SW#

1 2

C322

+3VALW

A

C317

2

1

+5VS

+3VALW

+5VALW

+3VS

12

R187
10K_0402_5%

1

2

ECAGND

+3VALW

1

C318

0.01U_0402_16V7K

2

EC_AVCC

1

C323
1000P_0402_50V7K

2

+3VALW

EC_RST#

1

C325

0.1U_0603_16V7K

2

C328

10P_0402_50V8K

RING# 23PCM_RI#23

R556 4.7K_0402_5%
R557 4.7K_0402_5%
R558 4.7K_0402_5%

R173

1 2

47K_0402_5%

J1

JOPEN

R181 20M_0603_5%@

1 2

Y1

R182

1 4

1

2

32.768KHZ_12.5P_MC-206

2 3

12
12
12

1

2

1 2

KSI[0..7]32

KSO[0..15]32

1 2

C329
10P_0402_50V8K

SYSON
SUSP#
EC_RSMRST#

B

+3VALW
+3VALW

4.7U_0805_10V4Z

SIRQ19,23,30

USER_BTN0#29

LPC_FRAME#19,30

LPC_AD019,30
LPC_AD119,30
LPC_AD219,30
LPC_AD319,30

CLK_PCI_EC12

EC_MUTEO28

TP_CLK32
TP_DATA32
LID_SW#32

MSB328

0_0402_5%

EC_SMI#18

MSB028
MSB128

EC_SWI#18

MSB228

SYSON36,41

SUSP#36
VR_ON42

ISOLATE25

EC_RSMRST#9,18,25

PCM_SUSP#23

ENABLT#16,17

BKOFF#17

FSEL#34

B

C319

KSI[0..7]
KSO[0..15]

1

2

CLK_PCI_EC
EC_RST#

GA20
KBRST#

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

CRY1
CRY2

EC_SMI#

SYSON
SUSP#

EC_RSMRST#

FSEL#

1

2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

C320

0.1U_0402_16V4Z
U12

7

SERIRQ

8

LDRQ#

9

LFRAME#

15

LAD0

14

LAD1

13

LAD2

10

LAD3

18

LCLK

19

RESET1#

22

SMI#

23

PWUREQ#

31

IOPD3/ECSCI#

5

GA20/IOPB5

6

KBRST/IOPB6

71

KBSIN0

72

KBSIN1

73

KBSIN2

74

KBSIN3

77

KBSIN4

78

KBSIN5

79

KBSIN6

80

KBSIN7

49

KBSOUT0

50

KBSOUT1

51

KBSOUT2

52

KBSOUT3

53

KBSOUT4

56

KBSOUT5

57

KBSOUT6

58

KBSOUT7

59

KBSOUT8

60

KBSOUT9

61

KBSOUT10

64

KBSOUT11

65

KBSOUT12

66

KBSOUT13

67

KBSOUT14

68

KBSOUT15

105

TINT#

106

TCK

107

TDO

108

TDI

109

TMS

110

PSCLK1/IOPF0

111

PSDAT1/IOPF1

114

PSCLK2/IOPF2

115

PSDAT2/IOPF3

116

PSCLK3/IOPF4

117

PSDAT3/IOPF5

118

PSCLK4/IOPF6

119

PSDAT4/IOPF7

158

32KX1/32KCLKIN

160

32KX2

62

IOPJ2/BST0

63

IOPJ3/BST1

69

IOPJ4/BST2

70

IOPJ5/PFS

75

IOPJ6/PLI

76

IOPJ7/BRKL_RSTO

148

IOPM0/D8

149

IOPM1/D9

155

IOPM2/D10

156

IOPM3/D11

3

IOPM4/D12

4

IOPM5/D13

27

IOPM6/D14

28

IOPM7/D15

173

SEL0#

174

SEL1#

47

CLK

ENE_KB910Q_B0_LQFP176

EC_SCI#18

16

VDD

VCC134VCC245VCC3

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND117GND235GND346GND4

1U_0603_10V4Z@

123

136

157

VCC4

PORTB

PORTD-1

GND5

GND6

122

159

167

137

ECAGND
KB910_NC1
KB910_NC2
EC_SCI#

EC_AVCC

166

95

VCC5

VCC6

AVCC

AD Input

DA output

PWM
or PORTA

IOPB7/RING/PFAIL/RESET2

PORTC

IOPD2/EXWINT24/RESET2

PORTE

IOPE7/CLKRUN/EXWINT46

PORTH

PORTI

PORTJ-1

PORTD-2

PORTK

PORTL

AGND

GND7

96

12

C

For KB910 Rev:B3

R473

1 2

0_0402_5%@

R474

161

VBAT

AD0
AD1
AD2
AD3

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD
IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC0
IOPC1/SCL2
IOPC2/SDA2

IOPC3/TA1

IOPC4/TB1/EXWINT22

IOPC5/TA2

IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPE4/SWIN

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPH0/A0/ENV0

IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13_BE0
IOPK6/A14_BE1

IOPK7/A15_CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1#

NC212NC320NC421NC585NC686NC791NC892NC997NC10

NC1

11

C330

C

98

BT_WAKE_UP

R574 100K_0402_5%

1 2

1 2

0_0402_5%

81
82
83
84
87
88
89
90
93

BT/WL_ON/OFF#

94
99

100
101
102

32
33
36
37
38
39
40
43

KSO16

153

KSO17

154

MAIL_LED#

162

EC_SMC_1

163

EC_SMD_1

164

LPC_RST#

165
168

EC_SMC_2

169

EC_SMD_2

170
171

PME_EC#

172

EC_THERM#

175
176
1

26
29
30

2
44
24

1 2

25

R179 0_0402_5%@

KBA0

124

KBA1

125

KBA2

126

KBA3

127

KBA4

128

KBA5

131

KBA6

132

KBA7

133

ADB0

138

ADB1

139

ADB2

140
141

ADB4

144

ADB5

145

ADB6

146

ADB7

147

FRD#

150

FWR#

151

SELIO#

152
41

42
54
55

KBA8

143

KBA9

142

KBA10

135

KBA11

134

KBA12

130

KBA13

129

KBA14

121

KBA15

120

KBA16

113

KBA17

112

KBA18

104

KBA19

103
48

+RTCVCC+3VALW

For KB910 Rev:B0

1

C627

0.1U_0402_16V4Z

2

AD_BID0
ADP_IR

BATLED_0# 32
EC_PROCHOT# 18
PMLED_0# 32
BT_ON# 29,32
BT_DETACH 29

BT_WAKE_UP 29

BATT_TEMPA 38

BATT_OVP 39
ALI/MH# 38

LINE_OUT_PLUG 27,28,32

USER_BTN1# 29
BT/WL_ON/OFF# 29,32

DAC_BRIG 17
EN_FAN1 7
EN_FAN2 7
IREF 39

INVT_PWM 17
BEEP# 27
PME#_SB 18
ACOFF 39
PM_BATLOW# 18
EC_ON 32
LID_OUT# 18

MAIL_LED# 32
EC_SMC_1 34,38
EC_SMD_1 34,38
LPC_RST# 20,30

PWRBTN_OUT# 18
EC_SMC_2 7
EC_SMD_2 7
FANSPEED1 7
PME_EC# 23,26,34
EC_THERM# 18
FANSPEED2 7
WL_ON 26,32

ACIN 18,37

RING# 23
S3AUXSW# 10

ON/OFF# 32
PSON# 18
M_SEN# 17
PCI_CLKRUN# 18,23,26

FRD# 34
FWR# 34

SCROLLED# 29
G_RST 23
CAPSLED# 29
NUMLED# 29

FSTCHG 39

C321

1 2

EEPROM/BATTERY

THERMAL/DOCKING

ADB[0..7]
KBA[0..19]

S3AUXSW#
PSON#
SLP_S3#
SLP_S5#

D

ECAGND

0.01U_0402_16V7K
R172

1 2

1

10K_0402_5%

C324

0.22U_0603_16V7K

2

S0 S3 S5
1 0 1
0 1 1
1 0 0
1 1 0

D

ADB[0..7] 34
KBA[0..19] 34

E

ADP_I 39

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the
signals for clip-on ISE use

+3VALW

KBA1
KBA4

KBA5

LPC_RST#
KB910_NC2
KB910_NC1

Note: Place close to MiniPCI Socket

L

+5VALW

EC_TCK
EC_TDI EC_TMS

KSO17

Title

Size Document Number Rev

Date: Sheet

R202 10K_0402_5%@

1 2

R194 10K_0402_5%

1 2

R178 10K_0402_5%

(SHBM)

Analog Board ID definition,
Please see page 3.

Ra

Rb

1 2

R174 4.7K_0402_5%

1 2

R475 4.7K_0402_5%

1 2

R476 4.7K_0402_5%

1 2

+3VALW

12

R180
100K_0402_5%

AD_BID0

R183
0_0402_5%

JP7

1 2
3 4
5 6
7 8
9 10

ACES_85201-1005@

1

C327

0.1U_0402_16V4Z

2

EC_TINIT#
EC_TDO

KSO16
MAIL_LED#

12

EC DEBUG port

Compal Electronics, Inc.

KBD EC CTRL-ENE KB910

LA-2251

33 47Monday, May 17, 2004

E

of

1.0

ADB[0..7]33

KBA[0..19]33

ADB[0..7]
KBA[0..19]

VCC_FLASH

U15

KBA18

1

A18

KBA16

2

A16

KBA15

3

A15

KBA12

4

A12

KBA7

5

A7

KBA6

6

A6

KBA5

7

A5

KBA4

8

A4

KBA3

9

A3

KBA2

10

A2

KBA1

11

A1

KBA0

12

A0

ADB0

13

DQ0

ADB1

14

DQ1

ADB2 FWE#

15

DQ2

16

VSS

512K8-90_PLCC32

Use P/N:SA390400110

VDD
WE#

A17
A14
A13

A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3

32

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

C334

4.7U_0805_10V4Z

31
30
29
28
27

A8

26

A9

25
24
23
22
21
20
19
18
17

1

2

R190

2

C335

0.1U_0402_16V4Z

1

1 2

0_0603_5%

+3VALW

SN74LVC32APWLE_TSSOP14

U6D

11

+3VALW

O

R192

100K_0402_5%

14

12

P

A

13

B

G

7

0.1U_0402_16V4Z

+3VALW +5VS

12

1 3

D

Q24 2N7002_SOT23

+3VALW

1

C461

2

12

R193
100K_0402_5%

2

G

S

+3VALW

14

1

A

2

B

7

SN74LVC32APWLE_TSSOP14

EC_FLASH# 18

FWR# 33

P

3

O

G

U6A

+3VALW

14

4

P

A

6

O

5

B

G

U6B

7

SN74LVC32APWLE_TSSOP14

+3VALW

14

U6C

9

P

A

8

O

10

B

G

7

SN74LVC32APWLE_TSSOP14

PCM_PME#23,26,33
MINI_PME#23,26,33
MDM_PME#23,26,33

WLAN_PME#23,26,33

+3VALW

12

R191

4.7K_0402_5%

PME_EC# 23,26,33

1 2

R196 100K_0402_5%@

+3VALW

1

2

C336

+5VALW

0.1U_0402_16V4Z@

0.1U_0402_16V4Z

EC_SMC_133,38

+3VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC_SMD_133,38

C337

1

2

U17

8

VCC

7

WC

6

SCL

5

SDA

12

R198
100K_0402_5%

Title

Size Document Number Rev

Date: Sheet

GND

AT24C164-10SC_SO8

Compal Electronics, Inc.

+5VALW

12

1

A0

2

A1

3

A2

4

12

BIOS & EC I/O Port

LA-2251

R195
100K_0402_5%

R197
100K_0402_5%

1.0

of

34 47Monday, May 17, 2004

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

FSEL#33

FRD#33

FSEL#
FRD#
FWE#

U16

21

A0

20

A1

19

A2

18

A3

17

A4

16

A5

15

A6

14

A7

8

A8

7

A9

36

A10

6

A11

5

A12

4

A13

3

A14

2

A15

1

A16

READY/BUSY#

40

A17

13

A18

37

A19

22

CE#

24

OE#

9

WE#

SST39VF080-70_TSOP40@

VCC0
VCC1

GND0
GND1

RP#

NC0
NC1

31
30

ADB0

25

D0
D1
D2
D3
D4
D5
D6
D7

NC

ADB1

26

ADB2

27

ADB3

28

ADB4

32

ADB5

33

ADB6

34

ADB7

35

RESET#

10
11
12
29
38

23
39

5

D D

4

3

2

1

+3VS

1

VCORE_PWRGD12,43

R460

1 2

VS

56K_0402_5%@

5

MR#

3

PFI

12

R461

8.2K_0402_5%@

U32

6

RST#

VCC

4

PFO#

GND

MAX6342RUT-T_SOT23-6@

2

12

R462

4.7K_0402_5%@

PM_PWRGD 9,18

+3VS

+5VS

C C

B B

1

U41

VCC

RESET#

GND

MAX809SEUR-T_SOT23

2

14

10

U7C

P

3

OE

A9Y

G

SN74AHCT126PWR_TSSOP14

7

R563 300_0402_5%

8

1 2

12

R564
620_0402_5%

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

RESET & PS2 Connector

LA-2251

1

1.0

of

35 47Monday, May 17, 2004

5

4

3

2

1

+1.8VS+1.8VALW

U33

8

S1

D1

7

S2

D2

6

S3

D3

5

G

D4

SI4800 1N_SO8

D D

1

C650
10U_0805_10V4Z

2

0.1U_0402_16V7K

+1.8VALW to +1.8VS Transfer

1

2

RUNON

0.1U_0402_16V7K

C649

22U_1206_16V4Z

1
2
3
4

C597

1

2

1

2

C596

12

R463
470_0402_5%

13

D

Q28

2

G

2N7002 1N_SOT23

S

SUSP

SUSP

2N7002 1N_SOT23

+12VALW

2

G

+2.5V to +2.5VS Transfer

+2.5VS+2.5V

U36

S1

D1

S2

D2

S3

D3

G

D4

SI4800 1N_SO8

1
2

1
3
4

C652
1U_0603_10V4Z

2

12

R480
470_0402_5%

13

D

Q40

2

G

2N7002 1N_SOT23

S

SUSPRUNON

8
7
6

C C

5

1

C651
1U_0603_10V4Z

2

1.8VALW/+1.5VS Power direct provide

+5VALW to +5VS Transfer

12

R468
100K_0402_5%

1M_0402_5%

13

D

Q34

R470

S

1

+

CE5
100U_D_16VM

2

12

+3VALW +3VS

1

C600

0.01U_0402_16V7K

2

4.7U_0805_10V4Z

U35

8

D1

7

D2

6

D3

5

D4

SI4800 1N_SO8

1

C656
10U_0805_10V4Z

2

+5VALW

S1
S2
S3

G

U34

S1

D1

S2

D2

S3

D3

G

D4

SI4800 1N_SO8

RUNON

+5VALW

1

2

1
2
3
4

0.1U_0402_16V7K

1

+

CE4
100U_D_16VM

2

C654

8
7
6
5

+5VALW

+3VALW to +3VS Transfer

1

C655

2

22U_1206_16V4Z

RUNON

0.1U_0402_16V7K

1
2
3
4

+5VS

1

C599

2

1

2

22U_1206_16V4Z

1

C653

2

12

C601

R471
470_0402_5%

13

D

Q36

2N7002 1N_SOT23

S

G

2

12

R469
470_0402_5%

13

D

Q35

2

G

2N7002 1N_SOT23

S

SUSP

SUSP

+5VALW

12

R477
10K_0402_5%

SYSON

SYSON#

SUSP

2

G

2

G

+5VALW

13

D

Q37
2N7002 1N_SOT23

S

12

R465
10K_0402_5%

13

D

Q31

2N7002 1N_SOT23

S

SYSON#29

SYSON33,41

SUSP42

SUSP#33

C727 0.1U_0402_16V7K@

+1.8VS +2.5V

B B

Discharge circuit

+1.25VS

12

R478
470_0402_5%

13

D

Q38

2

G

2N7002 1N_SOT23

S

A A

5

SYSON#SUSP

+2.5V

12

R483

470_0402_5%@

13

D

Q43

2

G

2N7002 1N_SOT23@

S

4

+1.8VS +2.5V
+1.8VS +3VS
+1.8VS +5VS

+2.5V +3VS
+2.5V +5VS

+3VS +5VS

+3VALW +5VS

+2.5V +5VS
+2.5V +3VALW

+1.8VS +3VS

1 2

C721 0.1U_0402_16V7K@

1 2

C722 0.1U_0402_16V7K@

1 2

C723 0.1U_0402_16V7K@

1 2

C724 0.1U_0402_16V7K@

1 2

C725 0.1U_0402_16V7K@

1 2

C726 0.1U_0402_16V7K@

1 2

C673 0.1U_0603_50V4Z

1 2

C674 0.1U_0603_50V4Z

1 2

C675 0.1U_0603_50V4Z

1 2

C676 0.1U_0603_50V4Z

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DC/DC Circuits

LA-2251

1

of

36 47Monday, May 17, 2004

1.0

A

PCN1

1

4

1 1

3

SINGA_2DC-S107B200

1

23

2

12

EC10QS04

PD1

1000P_0402_50V7K

12

PC1

C8B BPH 853025_2P

1 2

PL1

12

PC2

100P_0402_50V8J

B

12

PC3

1000P_0402_50V7K

VIN

12

PC4
100P_0402_50V8J

12

PC5

1000P_0402_50V7K

VIN

12

PR3

84.5K_0402_1%

22K_0402_5%

12

PR6

20K_0402_1%

PR5

1 2

12

PC6

0.1U_0402_16V4Z

C

PR1

1 2

VS

8

3

+

2

-

4

PR8

10K_0402_5%

1M_0402_1%

PU1A

P

1

O

G

LM393M_SO8

12

RTCVREF

3.3V

PD2

RLZ4.3B_LL34

VS

12

PR2

5.6K_0402_5%

12

D

1 2

1K_0402_5%

12

PR7
10K_0402_1%

PR4

PACIN

ACIN 18,33

PACIN 39,40

Vin Detector

VIN

PD3

D

13

2

1N4148_SOD80

1 2
12

PR10
33_1206_5%

12

PC7

0.1U_0603_50V4Z

12

PR19
200_0402_5%

12

PC9
1U_0805_25V4Z

VS

VIN

N2

PD7
RLZ16B_LL34

2 1

MAINPWON7,38,40

ACON39

1N4148_SOD80

VL

PD5

12

PR17

1 2

10K_0402_5%

PD6

2
3

RB715F_SOT323

1

PD4

CHGRTCP

EC_PWR_ON#32

PR20

1 2

200_0402_5%

BATT+

2 2

CHGRTC

3 3

PR12

1 2

200_0402_5%

2 1

RB751V

PR13

100K_0402_5%

PR16

1 2

22K_0402_5%

PR21

1 2

200_0402_5%

RTCVREF

12

3.3V

12

PC11

10U_1206_16V4Z

N1

TP0610T_SOT23

12

PC8

0.22U_1206_25V7M

PU2
S-81233SGUP-T1_SOT89

3

3

PQ1

S

G

2

2

1

1

N3

PR9

1 2

1K_1206_5%

PR11

1 2

1K_1206_5%

PR14

1 2

1K_1206_5%

6.0V

7

O

PC12

12

LM393M_SO8

1000P_0402_50V7K

PR18

1M_0402_1%
PU1B

8

5

P

+

6

-

G

4

0.1U_0402_16V4Z

12

12

PC13

10K_0402_5%

RTCVREF

3.3V

12

PR23

1 2

PR24
215K_0402_1%

High 17.58
Low 14.11

12

PR15
499K_0402_1%

12

PR22
499K_0402_1%

B+

12

PC10

1000P_0402_50V7K

13

D

+2.5VP

+1.25VSP

+1.2VP

4 4

+12VALWP

+1.8VALWP

PJP1

112

JUMP_43X118
PJP3

112

JUMP_43X79
PJP5

112

JUMP_43X79
PJP6

112

JUMP_43X39

PJP7

112

JUMP_43X118

+2.5V

2

2

2

(8A,320mils ,Via NO.=16)

(2A,80mils ,Via NO.= 4)

+1.25VS

(150mA,40mils ,Via NO.= 2)

+1.2V

+5VALWP

(7A,280mils ,Via NO.= 14)

+3VALWP

(5A,200mils ,Via NO.= 10)

2

2

(120mA,20mils ,Via NO.= 1)

+12VALW

(4.5A,180mils ,Via NO.= 10)

+1.8VALW

DUMMY_GND

DUMMY_GND

(7A,280mils ,Via NO.= 14)

A

PJP2

2

112

JUMP_43X118

PJP4

112

JUMP_43X118

PJP11

112

JUMP_43X118
PJP12

112

JUMP_43X118

B

+5VALW

2

+3VALW

2

2

(7A,280mils ,Via NO.= 14)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Precharge detector

15.34 15.90 16.48

13.13 13.71 14.20

C

PQ2

2N7002_SOT23

2

G

S

Title

Size Document Number Rev

Date: Sheet

PR25

47K_0402_5%

13

PQ3

100K

100K

DTC115EKA_SOT23

2

PACIN

12

+5VALWP

Compal Electronics, Inc.

DCIN & DETECTOR

LA-2251

D

1.0

of

37 47Monday, May 17, 2004

A

CHANGE CONNECTER

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 84 degree C
Recovery at 45 degree C

1 1

2 2

PCN2

1
2
3
4
5
6
7
8
9

SUYIN_250145MR009GX14ZR

ALI/NIMH#

AB/I

TS_A
EC_SMDA
EC_SMCA

PR30

100_0402_5%

12

PR31

12

100_0402_5%

12

1K_0402_5%

12

PR38
1K_0402_5%

12

PR27

1K_0402_5%

PR33

PR28

1 2

47K_0402_5%

1

PR36

1 2

25.5K_0402_1%

PD10

3

12

3

+

2

-

PU3A LM393M_SO8

PR35

100K_0402_1%

12

PR37
100K_0402_1%

VS

1 2

8

47K_0402_1%

P

G

4

VMB

PL2

1 2

+3VALWP

3

C8B BPH 853025_2P

12

PC15
1000P_0402_50V7K

12

PC16

0.01U_0603_50V7K

BATT+

VL

PH1

12

10KB_0603_1%_TH11-3H103FT

0.1U_0603_50V4Z
PR32

1 2

16.9K_0402_1%

PC14

TM_REF1

2

PD8

BAS40-04_SOT23@

+3VALWP

ALI/MH# 33

PC17

0.22U_0805_16V7K

12

PR34

12

12

3.32K_0402_1%
PC18

1000P_0402_50V7K

PR29

O

12

VL

PR26
47K_0402_1%

1 2

1

VL

PD9

12

1SS355_SOD323

2

13

PQ4
DTC115EKA_SC59

MAINPWON 7,37,40

1

2

BAS40-04_SOT23@

1

PD11

BAS40-04_SOT23@

3 3

+5VALWP

4 4

3

1

PD12

2

2

3

BAS40-04_SOT23@

BATT_TEMPA 33
EC_SMD_1 33,34
EC_SMC_1 33,34

PH2 near main Battery CONN :

BAT. thermal protection at 78 degree C
Recovery at 45 degree C

VLVL

PH2

12

@

10KB_0603_1%_TH11-3H103FT

PR40 47K_0402_1%@

1 2

PR41

1 2

16.9K_0603_1%@

TM_REF2

@

3.92K_0402_1%

12

12

PC19

0.22U_0805_16V7K@

PR42

12

PC20

1000P_0402_50V7K@

8

5

P

+

6

-

G

PU3B LM393M_SO8

4

PR43

12

100K_0402_1%@
PR44
100K_0402_1%

@

7

O

12

PR39

47K_0402_1%@

1 2

PD13

12

1SS355_SOD323@

VL

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

BATTERY CONN / OTP

LA-2251

D

38 47Monday, May 17, 2004

1.0

of

A

B

C

D

P2

PQ5

S

D

S

D

S

D

G

D

SI4825DY_SO8

47K

47K

1 3

PR53

3K_0402_5%

1
2
3
4

2

IREF33

12

12

PC83

0.1U_0603_25V7K

12

13

D

G

S

VIN

2

G

12

PR46
47K_0402_1%

DTA144EUA_SC70

2

13

D

PQ44

S

SN7002N_SOT23

PACIN37,40

ACON37

1 1

2 2

8
7
6
5

PQ42

2

13

PQ43
DTC115EUA_SC70
PD14 1SS355_SOD323

ACOFF#

1 2

PACIN

1 2

ACON

IREF=1.31*Icharge
IREF=0.73~3.3V

1
2
3
4

PR47
200K_0402_1%

PR50

150K_0402_1%

PC26
PQ10
2N7002_SOT23

0.1U_0402_16V4Z

PR59

1 2

205K_0603_1%

PQ6

S

D

S

D

S

D

G

D

SI4825DY_SO8

12

8
7
6
5

12

PR55
10K_0402_1%

100K_0402_1%

ADP_I33

12

PR63

P3 B+

12

PR54

29.4K_0402_1%

PC29

0.1U_0402_16V4Z

12

12

+3VALWP

12

PR64
47K_0402_5%

2

13

3 3

FSTCHG33

2

PQ12

DTC115EKA_SC59

CS

13

PQ11

DTC115EKA_SC59

VMB

Iadp=0~4.2A

1 2

4700P_0402_25V8K

PC30

1 2

1000P_0402_50V7K

PC33

0.1U_0402_16V4Z

PR45

0.015_2512_1%

PR52

10K_0402_1%

PC27

1 2

1 2

PR61

10K_0402_1%

12

12

PR56

4.7K_0402_5%

PR57

1K_0402_5%

12

1

2

3

4

5

6

7

8

9

10

11

12

PR65

150K_0603_0.1%

PU4

-INC2

+INC2

OUTC2

GND

+INE2

CS

-INE2

VCC(o)

FB2

OUT

VREF

VH

FB1

VCC

-INE1

RT

+INE1

-INE3

OUTC1

FB3

OUTD

CTL

-INC1

+INC1

MB3887_SSOP24

12

JUMP_43X118

24

23

22

21

20

19

0.1U_0603_25V4Z

18

17

16

15

47K_0402_5%

14

13

PJP9

112

CS

PC28

1 2

PR58

1 2

68K_0402_5%

PR62

1 2

ACON

2

12

4.7U_1206_25V6K

12

PR51
0_0402_5%

1 2

1 2

0.1U_0805_25V7K

1 2

0.1U_0805_25V7K

PC32

1 2

1500P_0402_50V7K

4.2V

PC21

PC24 0.022U_0402_16V7K

PC25

PC31

12

PC22

4.7U_1206_25V6K

PR66

300K_0603_0.1%

12

PC23

4.7U_1206_25V6K

N18

12

B++

36

241

PQ8
SI4835DY_SO8

578

LXCHRG

22UH_SPC-1204P-220_2.9A_20%

1 2

PL4

12

PD15

RB051L-40_SOD106

PQ7

ACOFF#

1
2
3
4

PR48

10K_0402_5%

1 2

13

PQ9
DTC115EKA_SC59

S

D

S

D

S

D

G

D

SI4825DY_SO8

PR49 47K_0402_5%

1 2

2

8
7
6
5

CC=0.5~2.7A
CV=12.6V(9 CELLS LI-ION)

4.7U_1206_25V6K

12

PC34

PC35

4.7U_1206_25V6K

1 2

0.02_2512_1%

PR60

12

PD34
RLZ22B_LL34

PD35
1SS355_SOD323

PD36

1 2

1 2

1SS355_SOD323

12

PC36

VIN

12

4.7U_1206_25V6K

ACOFF 33

BATT+

12

PR67

PR70

340K_0603_1%

12

PR68
499K_0402_1%

12

PC38

12

0.01U_0603_50V7K

B

PR45

PR52

PR54

PR56

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0.01_2512_1% 0.015_2512_1%

100K_0402_1% 10K_0402_1%

33.2K_0402_1% 29.4K_0402_1%

10K_0402_1% 4.7K_0402_1%

C

OVP voltage : LI

4S3P : 18V--> BATT_OVP= 2.0V
3S4P/3S3P : 13.5V--> BATT_OVP= 1.5V

+5VALWP

(BAT_OVP=0.1111 *VMB)

PU5A

8

3

P

+

1

BATT_OVP33

4 4

12

PC37

0.1U_0402_16V4Z@

A

12

PR69

2.2K_0402_5%

0

2

-

G

4

LM358A_SO8

105K_0603_0.5%

90W

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CHARGER

LA-2251

D

39 47Monday, May 17, 2004

of

1.0

5

1 2

PQ13

SI4800DY-T1_SO8

PDH31

PQ15
SI4810DY_SO8

PDL3

1.27K_0402_1%

12

PR76

620_0402_5%

PC56

100P_0402_50V8J

PR89

1 2

47K_0402_5%

2

PC42

B+++

12

12

PC43

4.7U_1206_25V6K

5

D8D7D6D

S1S2S3G

4

PJP10

B+

112

D D

JUMP_43X118

4.7U_1206_25V6K

5

D8D7D6D

12

2 1

PC50

47P_0402_50V8J

PR77

PD19

EP10QY03

10K_0402_1%

1M_0402_1%

PL6

10U_SPC-1204P-100_4.5A_20%

C C

B B

+3VALWP

1

1

+

+

PC54

2

150U_D2E_6.3VM_R18@

PC55

2

150U_D2E_6.3VM_R18

+3.3V Ipeak = 6.66A ~ 10A +5V Ipeak = 6.66A ~ 10A

12

1 2

PR81

PR83

S1S2S3G

4

PR75

1 2

1.27K_0402_1%

PR78

1 2

0_0402_5%

12

1 2

3.57K_0402_1%

PACIN37,39

1 2

VS

PC41

0.1U_0805_25V7K

PR72 0_0402_5%

1 2

PLX3

PC52

0.47U_0603_16V7K

12

1 2

PR84

1 2

10K_0402_1%

PR86

270K_0402_5%

12

PC62

0.047U_0603_25V7M

4

BST31

PR162

1 2

PDH3

12

PC58

680P_0402_50V7K

PD18

1SS355_SOD323

12

PC48

0.1U_0603_50V4Z

PU6

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

PR87

47K_0402_1%

12

PC63

0.047U_0603_25V7M

VS

1 2

22

12

VL

21

V+

GND

MAX1632_SSOP28

8

VL

MAINPWON 7,37,38

2

3

1

12

PC47

4.7U_1206_16V4Z

12OUT

VL

VDD

BST5

DH5

LX5
DL5

PGND

CSH5

CSL5

FB5
SEQ
REF

SYNC
RST#

PD17

DAP202U_SOT323

4
5
18
16
17
19
20
14
13
12
15
9
6
11

3

BST51

+12VALWP

12

PC49

4.7U_1206_16V4Z

1 2

0_0402_5%

PR163

12

PC57

4.7U_1206_16V4Z

POK 41

2.5VREF

PC44

1 2

0.1U_0603_50V4Z

PDH5

PLX5

698_0402_1%

10.5K_0402_1%

4.7U_1206_25V6K

12

PR80

PR85

2

12

PC45

PR74

1 2

0_0402_5%

PDL5

12

12

12

PR88
10K_0402_1%

N4

B+++

PC46

12

SI4800DY-T1_SO8

4.7U_1206_25V6K

SI4810DY_SO8

PC53

0.47U_0603_16V7K

12

PC60
100P_0402_50V8J

PDH51

PC40
470P_0805_100V7K

1 2

PR71

22_1206_5%

5

PQ14

4

5

PQ16

4

PR82 0_0402_5%

1 2

1

3 2

PC39

4.7U_1210_25V6K

1 2

12

PD16

EC11FS2_SOD106

FLYBACKSNB

12

1 4

PT1

SPC_SDT-1405P-100

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

PC59

150U_D2E_6.3VM_R18@

12

47P_0402_50V8J

12

PC51

12

PR79
2M_0402_5%

150U_D2E_6.3VM_R18

1

+

2

PR73

1.54K_0402_1%

CSH5

1

PC61

+

2

PD20

EP10QY03

2 1

+5VALWP

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

5V/3.3V/12V

LA-2251

40 47Monday, May 17, 2004

1

1.0

of

A

1 1

B

C

D

PL7

1 2

12

PC67

4.7U_1206_25V6K

1 2

PL9

SYSON 33,36

HCB4532K-800T90_1812

12

PC68

4.7U_1206_25V6K

12

PR95

15K_0402_1%

12

9.53K_0402_1%

PR99

1

+

2

220U_D2_4VM

12

PC64

4.7U_1206_25V6K

DH1.8

PR96

0_0402_5%

12

PC66
1U_0805_25V4Z

BST1.8A

12

1

PD21

5

4

D8D7D6D

S1S2S3G

D8D7D6D

S1S2S3G

5

PQ18
SI4800DY-T1_SO8

4

0.1U_0603_25V4Z

DL1.8

PC73 ESR=18m

2 2

+1.8VALWP

1

EP10QY03

2 1

+

2

220U_D2_4VM

PD22

3 3

2.2UH_PLFC1235P-2R2A_6A_30%

12

PC72

PR94

8.66K_0402_1%

12

PR98
10K_0402_1%

PL8

12

SI4810DY_SO8

PQ19

PC69

12

POK40

2

3

DAP202U_SOT323

PR92

1 2

0_0402_5%

12

PR90
0_0805_1%

1U_0805_25V4Z

25

BST1

26

DH1

27

LX1

24

DL1

28

CS1

1

OUT1

2

FB1

11

ON1

0.22U_0805_16V7K

1845-1_VCC

PC70

12

22

4

V+

VCC

PU7

MAX1845EEI_QSOP28

SKIP

GND

OVP

6

8

23

PC75

PR91

20_0402_5%

1 2

9

VDD

UVP

BST2

DH2

LX2
DL2
CS2

OUT2

FB2

ON2

PGOOD

TON

ILIM2
ILIM1

REF

PR100

10

5.62K_0402_1%

PR101

12

29.4K_0402_1%

100K_0402_1%

+5VALWP

21
19

18
17
20
16

15
14
12

7
5

13
3

12
12

0_0402_5%

1 2

BST2.5A

DH2.5

PR102

PR93

12

12

BST2.5B

12

PC65

4.7U_1206_16V4Z

SI4800DY-T1_SO8

PC71

0.1U_0603_50V4Z

12

DL2.5

PR103

100K_0402_1%

LX2.5

0_0402_5%

PQ17

PR97

5

D8D7D6D

S1S2S3G

4

4.4U_SPC-1405P-4R4_+40-20%

5

PQ20

D8D7D6D

S1S2S3G

SI4810DY_SO8

4

12

PC73

B+

+2.5VP

220U_D2_4VM@

1

+

PC74

2

PD23

EP10QY03

2 1

+1.8V Ipeak =

+2.5V Ipeak = 12.06A ~ 22.41A

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

DDR/2.5V/1.8V

LA-2251

D

41 47Monday, May 17, 2004

1.0

of

A

B

C

D

1 1

10U_1206_25V6K

SUSP36

2 2

PC80

+2.5VS

12

1 2

PR166

0_0402_5%@

PU8

VIN1VCNTL

3

VREF

2

GND

9

TP

APL5331_SO8

1

+

2

12

PR164

1K_0402_1%

12

PC78

0.1U_0603_25V7K
150U_D2_6.3VM

@

12

PC79

PQ40

2N7002_SOT23@

13

D

2

G

S

PR165

1K_0402_1%

6
8

NC

5

NC

7

NC

VOUT

+3VALWP

12

PC77
1U_0603_16V6K

4

+1.25VSP

12

PC76

10U_1206_25V6K

VID_PWRGD5,43

+3VALWP

PR105

0_0603_5%

12

VR_ON33

12

PC84

4.7U_1206_16V6K

12

PR106 0_0402_5%

PU9

1

IN

4

PG

3

EN

MIC5258_SOT23-5

PR107
100K_0402_1%

OUT

GND

5

2

+1.2VP

12

PC85

4.7U_1206_16V6K

1 2

3 3

4 4

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

1.25V/1.2V

LA-2251

D

42 47Monday, May 17, 2004

1.0

of

+5VS_CORE

12

12

LXS

DLS

PR167

@

1 2

@

1 2

4

1 2

S0

5

1 2

S1

18
3

36

V+

26

1 2

27
28

29
30

35

33
34

32
31

40

39
38

37

PC108

PR168

0_0402_5%@

30.1K_0402_1%
PR114

1 2

CORE_REF44

VID_PWRGD5,42

+5VS_CORE

VSSSENSE5

1 2

100_0402_1%@

FB

0.022U_0603_50V4Z

12

12

0_0402_5%

PR128

PC105

PR137

PR124

1 2

10_0603_1%

12

PC98

VCCSENSE5

12

PR136

1.5K_0402_1%

CORE_REF

100K_0402_1%

PC95

1U_0603_10V6K

12

PR131
0_0402_5%

1000P_0402_50V7K

PR117

1.74K_0402_1%@

12

12

OAIN+

OAIN-

CORE_REF

PR121

80.6K_0402_1%

12

470P_0402_50V8J

PR132

1 2

PC106

1 2

PC89

PC99

12

100P_0603_50V8G

12

VCORE_PWRGD12,35

100P_0603_50V8G

PR116
0_0402_5%@

12

0.22U_0603_10V7K

0_0402_5%

PC111

12

270P_0402_50V7K

12

VID55
VID45
VID35
VID25
VID15
VID05

PR135

PC109

100P_0402_50V8K

PR139

1 2

20K_0402_5%

PC94

PU10

1

TIME

2

TON

6

SHDN#

8

REF

9

ILIM

10

VCC

12

CCV

11

GND

13

GNDS

14

CCI

15

FB

17

OAIN+

16

OAIN-

19

D5

20

D4

21

D3

22

D2

23

D1

24

D0

25

VROK

7

OFS

1 2

MAX1546

SKIP

SUS

BSTM

LXM

DHM

DLM
VDD

BSTS

DHS

PGND

CSP

CSN

CMN

CMP

12

PR140

CORE_REF

1 2

150K_0402_1%

0_0402_5%

PR104

0_0402_5%

PR171

0_0402_5%@

PR170

0_0402_5%

PR169

0_0402_5%

PR118

0_0603_5%

0_0603_5%

PR126

2

1 2

12

100P_0603_50V8G

12

PC107

100P_0603_50V8G

12

CORE_REF

1 2

PC90

1

PD26

CHP202U_SC70

PC100

0.1U_0402_10V6K

DLS44

CM-

CM+

DPRSLPVR18

SKIP# 44

12

PC87
470P_0402_50V7K_A34

BSTM

0.1U_0402_10V6K

DLM44

+5VS_CORE

2.2U_0805_10V6M

12

PC96

3

BSTM

12

PC101

4700P_0402_25V7K

CS+ 44

CS- 4,5,6,7,8,11,18,21,44

+5VS_CORE

12

PR111
100K_0402_5%

1

C

E3B

2

MMBT3904_SOT23

PR120

1 2

0_0603_5%

5

PQ27

4

PR134

1 2

0_0603_5%

PQ25

D8D7D6D

S1S3G

S

2

IRF7832_SO8

5

S

4

2

IRF7832_SO8

D8D7D6D

S1S3G

PQ31

PIR POWER 92.04.18

CORE_REF

PQ26
SI7392DP_SO8

D8D7D6D

S1S3G

PQ28

PQ32

D8D7D6D

S1S3G

S

12

@

1

D

S3G

PR119

1 2

100K_0402_1%

12

PD24

EC31QS04

1 2

12

PD27

EC31QS04

100K_0402_5%

SKIP#

PIR POWER 92.04.16

PR109

1 2

100k_0402_5%

5

3

241

5

S

4

2

IRF7832_SO8

5

PQ30
SI7392DP_SO8

3

241

5

4

2

IRF7832_SO8

PR112

PR172

1 2

100K_0402_1%

PQ22

2

2N7002_SOT23

0.56UH_ETQP4LR56WFC_21A_20%

12

CM+ 44 CM- 44

PR133

100K_0402_1%

0.56UH_ETQP4LR56WFC_21A_20%

+5VS_CORE

2

PC91

OAIN+

PL11

PR123

1K_0402_1%

PC97

1 2

0.47U_1206_16V7K

+CPU_B+

OAIN+

PL12

1 2

12

PR138
1K_0402_1%

PC110

1 2

0.47U_1206_16V7K

12

PR108
100K_0402_5%

1

D

G

12

4.7U_1206_25V6K

12

12

PC102

PQ23

S

2N7002_SOT23

3

+CPU_B+

CPU_ISEN+

1 2

12

H_BOOTSELECT4

PR125

5.1_0402_1%

PR127

1 2

12

33_0402_1%

PR129

499_0402_1%

OAIN+

4.7U_1206_25V6K

2

G

2

G

12

PC92

PR122

0.0015_2512_1%

2

G

1 3

D

PQ29

2N7002_SOT23

12

PC103

13

D

PQ21
2N7002_SOT23

S

PR110

1 2

715_0402_1%

13

D

PQ24
2N7002_SOT23

S

PR115

1 2

715_0402_1%

CPU_ISEN-

PC88

4.7U_1206_25V6K

12

PD25

S

12

PR130
499_0402_1%

OAIN-

4.7U_1206_25V6K

+CPU_CORE

12

4.7U_1206_25V6K

EC31QS04

12

PC104

4.7U_1206_25V6K

1.5K_0402_1%

12

PR113

12

1

+

PC93
100U_25V_M

2

+CPU_CORE

FB

OAIN-

OAIN+

PC86
1000P_0402_50V7K

+CPU_CORE

PL10

1 2

C8B BPH 853025_2P

B+

PJP8

+5VS +5VS_CORE

112

JUMP_43X39

2

PIR POWER 92.04.16

D

PQ33

S

(120mA,20mils ,Via NO.= 1)

PR141
100K_0402_1%

PR142

1 2

1 2

9.31K_0402_1%

13

2

G

2N7002_SOT23

FB

CPUCLK_STP# 5,12,18

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

CPU_CORE(1)

LA-2251

43 47Monday, May 17, 2004

of

1.0

CORE_REF43

100K_0402_1%

PC133

100P_0603_50V8J

+CPU_CORE

12

PC122

100P_0603_50V8J

PR160

12

+5VS_CORE

0_0402_5%

12

1 2

PR150

PC118

2200P_0603_50V7K

100K_0402_1%

12

PR151

29.4K_0402_1%

+5VS_CORE

PR157

0_0402_5%

+CPU_CORE

1SS355_SOD323

12

2200P_0603_50V7K

12

PR161

29.4K_0402_1%

12

PC115

2.2U_0805_10V4Z
PR147

1 2

PD291SS355_SOD323

1 2

1 2

DLS43

PR152

1 2

0_0402_5%

12

12

PR153

PC125

2.2U_0805_10V4Z

1 2

12

1 2

0.22U_0603_16V7K

1 2

1 2

PC129

12

10_0603_1%
PR143

1 2

12

0_0402_5%
PC117

0.22U_0603_16V7K

PR149
20K_0402_1%

10_0603_1%

PR156
0_0402_5%
PC128

PD32

1 2

PR159
20K_0402_1%

DLM43

PD28

1SS355_SOD323

11

VDD

18

LIMIT

12

VCC

PR146

7

POL

3

TON

6

COMP

19

ILIM

8

GND

PD31

12

1SS355_SOD323

11

VDD

18

LIMIT

12

VCC

7

POL

3

TON

6

COMP

19

ILIM

8

GND

+CPU_B+

12

5

PQ38

3

5

3

241

241

PQ34
SI7392DP_SO8

5

D8D7D6D

S1S3G

S

4

2

IRF7832_SO8

PQ37
SI7392DP_SO8

5

D8D7D6D

PQ39

S1S3G

S

4

2

IRF7832_SO8

PQ35

0.56UH_ETQP4LR56WFC_21A_20%

12

12

PD30

EC31QS04

12

PD33

EC31QS04

PR148

1K_0402_1%

0.47U_1206_16V7K

0.56UH_ETQP4LR56WFC_21A_20%

12

PR158

1K_0402_1%

0.47U_1206_16V7K

1 2

PL13

PC120

1 2

PL14

PC131

1 2

20

PU11

17

V+

TRIG

BST

DH

LX
DL

PGND

CS+

CS-

CM+

CM-

DD/

13

20

PU12

V+

TRIG

BST

DH

LX
DL

PGND

CS+

CS-

CM+

CM-

DD/

13

16
14
15
10
9
5
4
1
2

MAX1980

SKIP#

17
16
14
15
10
9
5
4
1
2

MAX1980

SKIP# 43

PR144

1 2

0_0603_5%

PR154

1 2

0_0603_5%

12

PC116

0.22U_0603_16V7K

12

PC119
1000P_0603_16V7K

12

PC121
1000P_0603_16V7K

12

PC127

0.22U_0603_16V7K

12

PC130
1000P_0603_16V7K

12

PC132
1000P_0603_16V7K

PR145

1 2

0_0603_5%

PQ36

IRF7832_SO8

PR155

1 2

0_0603_5%

D8D7D6D

S1S3G

S

2

D8D7D6D

S1S3G

S

2

IRF7832_SO8

5

4

5

4

PC123

12

12

PC112

4.7U_1206_25V6K

12

4.7U_1206_25V6K

12

PC113

4.7U_1206_25V6K

CM+ 43
CM- 43

12

PC124

4.7U_1206_25V6K

CS+ 43
CS- 4,5,6,7,8,11,18,21,43

12

PC114

+CPU_B+

12

PC126

4.7U_1206_25V6K

4.7U_1206_25V6K

+CPU_CORE

+CPU_CORE

PD28,PC115,PR143,PR144,PC116PR146,PR147,PC117,PD29,PR149,PC118

POP120W

PR150,PR151,PC122,PU11,PC119,PC121,PQ34,PQ36,PQ35,PD30,PL13,PR148,PC120

PD28,PC115,PR143,PR144,PC116PR146,PR147,PC117,PD29,PR149,PC118

UNPOP

90W

PR150,PR151,PC122,PU11,PC119,PC121,PQ34,PQ36,PQ35,PD30,PL13,PR148,PC120

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

+CPU_CORE(2)

LA-2251

44 47Monday, May 17, 2004

of

1.0

5

4

Version Change List ( P. I. R. List ) for Power Circuit

3

2

1

Item DescriptionDate

D D

1 0.2

2

343

41

Title

Wrong net Modify control signal for 2.5VSP & 1.8VALWP

For C3,C443 12/23/2003
function

12/23/2003 Compal

12/25/2003

Owner

Compal

Compal

Add 0 0402 5% Location is PR104,PR167,PR168,PR169,PR170,PR171.Add 100k 0402 5% Location PR172

Add PU13,PR173,PR174,PR175,PC81,PR176,PR177,PR179,PQ41,PR178,PC82 for monitor CPU POWER

Power

4 39,40

41,43

5 39 02/26/2004 CompalPower Add component for charger

C C

6 41 Power 04/12/2004 Compal Add PL7 avoid B+ noise interference

For EMI cost
down

02/13/2004 Compal Del PL3,PL5,PL7,PL10 and add jump on it's location

使背對背快速

TURN OFF

7 43 Power 04/12/2004 Compal Add PL10 avoid B+ noise interference

8 43 Power Compal Delete PU13,PR174,PR173,PR175,PC81,PR176,PR177,PQ41,PR178,PR179,PC82 for EC measure V_CORE power function

9 43 Power 04/12/2004

04/12/2004

Compal Change PR110,PR115 from 1K to 715 and change PR113,PR136 from 2.7k to 1.5k for modify load line from 2.5m to 1.5m

Rev.Page#

0.2

0.2

0.2

0.2

0.2

0.2

0.2

0.2

Request

B B

A A

Title

Size Document Number Rev

5

4

3

2

Date: Sheet

Compal Electronics, Inc.
Changed-List History-1

LA-2251

1

45 47Monday, May 17, 2004

1.0

of

1

2

3

4

5

DFY30 from Pre-DB Step to DB-Step LA-2251 REV:0.0 -> 0.1 Modify <92.12.08.~93.02.05. >

1. Pull High 2.2Kohm_0402 from NB_I2CDATA/NB_I2CCLK to +3VS for panel I2C
sense function . <Page 16> 92.12.25.

-Add R525,R526(2.2Kohm_0402) and related net . (Modify CKT,BOM&Layout)

2. Add Prescott C-step Processor reserve schematic . <Page 8,18> 92.12.30.

-Reserve R532(@470ohm_0402),R533(@1Kohm_0402),Q44(@2N7002),add R534(0ohm_0402) and

1 1

related net . (Modify CKT,BOM&Layout)

3. Update ICS952013 CLK GEN. U21 CIS library . <Page 12> 92.12.31.

-Update U21(ICS952013) . (Modify CKT&Layout)

4. Remove ISOLATE function selection resistors for cost down . <Page 25> 92.12.31.

-Remove R49,R429(from 5.1K_0402_5% to @5.1K_0402_5%) . (Modify CKT&BOM)

5. Modify Prescott C-step Processor reserve schematic . <Page 18> 92.12.31.

-Modify net (H_PWRGOOD_SB and EC_ACIN) connection with U28 . (Modify CKT&Layout)

6. Add Pull High schematic for KBC ENE-KB910 . <Page 33> 92.12.31.

-Reserve R202(@10K_0402) for KBA1 . (Modify CKT&Layout)

-Add R194(10K_0402) for KBA4 . (Modify CKT,BOM&Layout)

7. Modify Material for CIS/BOM match . <Page 12> 92.12.31.

-Change C407.C419(from SE077106M00(1206) to SE053106Z00(0805)) . (Modify CKT&BOM)

8. Modify SB GPIO connection and PH/PL states . <Page 18> 93.01.02.

-Add R387,R388,R389(10Kohm_0402);Del R375(51Kohm_0402),R376,R382,R383(10Kohm_0402) .
(Modify CKT,BOM&Layout)

9. Add RC temination for Thermal IC ADM1032 recommend . <Page 7> 93.01.05.

2 2

-Add R535(0ohm_0402) between +3VALW and U1.1 . (Modify CKT,BOM&Layout)

10. Change AATI4610's enable pin from SYSON to SYSON# . <Page 29> 93.01.05.

-Change U10.4 and U11.4's net from SYSON to SYSON# . (Modify CKT&Layout)

11. Change BIOS IC's P/N and wait CIS updated . <Page 34> 93.01.05.

-Change U15's P/N from SA390400100 to SA390400110 . (Modify CKT&BOM)

12. Remove Modem related EMI/Safety reserve material for cost down . <Page 29> 93.01.05.

-Remove VH1(@DSSA-P3100SB),C294,C295(@220P_1808_3KV8K) . (Modify CKT&BOM)

13. Change SI2306 to SI4800 for Cost Down . <Page 36> 93.01.07.

BOM Release .

-Del Q30(SI2306DS),Add U36(SI4800) and modify related net connection . (Modify CKT,BOM&Layout)

14. Change U25F to U24F for Cost Down . <Page 27> 93.01.07.

-Del U25 , Change U25F to U24F(74LVC14) and modify related net connection . (Modify CKT,BOM&Layout)

15. Correct LCDVDD/B+ EMI solution . <Page 17> 93.01.08. Net-In 8nd .

-Change L3(from FBM-L11-*_0805 to 0ohm_0805),Add L18(FBM-L11-*_0805) between B+ and JP2.1,remove
C215(@68P_0402),Remove Q12(@2N7002) . (Modify CKT,BOM&Layout)

16. Modify the CPU related schematic for Cost Down . <Page 5> 93.01.08.

-Del R26(56ohm_0402) and change the net(H_TESTHI2_7) to RP1.1 PH . (Modify CKT,BOM&Layout)

3 3

17. Correct the NET Name for EC define clear . <Page 10,12,18,33> 93.01.08.

-Change the NET from SLP_S3# to S3AUXSW# . (Modify CKT&Layout)

-Change the D26.1&U28.F5's NET from PCI_STOP# to PCICLK_STOP# . (Modify CKT&Layout)

-Change the NET from SLP_S5# to PSON# . (Modify CKT&Layout)

18. Change PCIPIRQ connection . <Page 26> 93.01.08.

-Change R115.1 from PCI_PIRQC# to PCI_PIRQB,R117.2 from PCI_PIRQD# to PCI_PIRQB . (Modify
CKT&Layout)

19. Modify AC97_Codec related schematic . <Page 27> 93.01.08.

-Add R537(0ohm_0402) between U24.12 and C454.1,add R536(10Kohm_0402) between U23.4 and U23.8 .
(Modify CKT,BOM&Layout)

20. Short all Jopen Pad Named JSH? for GerberOut Prepared . <Page 8,9,18> 93.01.08.

-Short JSH1~9(JOPEN) . (Modify CKT&Layout)

21. Remove some parts abot EMI related for cost down . <Page 23,26,27,29,> 93.01.12.

-Remove R69,R121,R153(@10ohm_0402),C184,C259,C478(@15P_0402),C296(@22P_0402) . (Modify
CKT&BOM)

22. Remove some parts abot EE related for cost down . <Page 29,> 93.01.12.

4 4

-Remove C299,C307,C311(@1000P_0402_50V) . (Modify CKT&BOM)

23. Remove some parts abot USB related for Function Trial . <Page 19> 93.01.12.

-Remove R440,R441,R444(@10K_0402) . (Modify CKT&BOM)

24. Modify Material P/N for BOM correction . <Page 8,9,10,18,19,21> 93.01.12.

-Modify C356,C357,C360,C361,C363,C366,C367,C370,C382,C385,C389,C391,C392,C394,C396,C397,
C402,C405,C526,C528,C530,C550,C557,C600(from P/N:SE076103Z00 to SE076103K00) . (Modify
CKT&BOM)

1

2

25. Modify Material P/N for Purchase Dept. Recommend . <Page 25> 93.01.12.

-Modify C542(from P/N:SE068102K00 to SE074102K00) . (Modify CKT&BOM)

26. Remove some material EMI related for Cost Down . <Page 7,17,23,26,27,32,> 93.01.13.

-Remove C15,C16(@0.001U_0402_50V),C189,C190,C193,C194,C254,C257,C262,C267,C270(@1000P_0402_50V),
C2,C3(@22P_0402_25V),C4(@0.1U_0402_16V),C5(@220P_0402_50V),C6,C7,C8,C9(@33P_0402_50V),CP1~CP6
(@100P_1206_8P4C_50V8) . (Modify CKT&BOM)

-Change L18(from KC FBM-L11-201209-221LMAT_0805 to 0ohm_0805),L36(from HB-1M2012-121JT03_0805
to 0ohm_0805 ) . (Modify CKT,BOM&Layout)

27. Modify Material P/N for BOM items simplify (Cost is the same) . <Page 25> 93.01.14.

-Modify C531(22U_1206_16V from P/N:SE021226Z10 to SE021226Z00) . (Modify CKT&BOM)

A-TEST SMT BUILT

DFY30 from DB-Step to Pre SI-Step LA-2251 REV:0.1 -> 0.2 Modify <93.02.06.~93.03.08. >

28. Modify "CPUCLK_STP#" related schematic for Risk fixed and Cost Down . <Page 5,12,18> 93.02.16.

-Add Q45(SB339040100) , R539(SD028120200) , R540(SD028100100) and R541(SD028000000);del D27(SC1B751V005)
& R278(SD028100200) and modify the related schematic . (Modify CKT,BOM&Layout)

29. Modify "PWRBTN_OUT#" related schematic for Cost Down . <Page 18> 93.02.16.

-Modify "PWRBTN_OUT#" related schematic and del R381(SD028100200) . (Modify CKT,BOM&Layout)

30. Change "FANSPEED1" and "FANSPEED2" pull high power source from +5VS to +3VS for power saving .
<Page 7> 93.02.16.

-Change R12.1 and R13.1's connection from +5VS to +3VS . (Modify CKT&Layout)

31. LCD Connector combined with Inverter Connector for cost down . <Page 17> 93.02.16.

-Modify the related schematic and del JP2 . (Modify CKT,BOM&Layout)

32. Remove TV-OUT function . <Page 17> 93.02.16.

-Modify the related schematic and del D12,D13,D14,L5,L8,L9,C232C233,C234,C235,C236,C237,R97,R98,R99,JP19 .
(Modify CKT,BOM&Layout)

33. Modify PCMCIA spec from 2 slots to 1 slot . <Page 23> 93.02.16.

-Change U4 CB1420 to CB1410 and U5 CP2216 to CP2211 , del R85,D6,R75,C195,C196,R77~R81,C211,C212,C213,
C204,C203,C207,R87 , add C699 . (Modify CKT,BOM&Layout)

34. Change SI2302 to SI4800 for Cost Down . <Page 17> 93.02.16.

-Change Q13(P/N: SB523020005) to U40(P/N: SB548000100) and modify the related schematic (Modify CKT,BOM&Layout)

35. Add IEEE1394 function and related schematic/material . <Page 24> 93.02.16.

-Add C701,C702,C703,C704,C705,C706,C707,C708,C709,C713,C710,C711,C712,C714,C715,C716,JP23,R543,R547,
R544,R545,R546,R550,R551,R548,R549,R552,R553,R554,R555,U38,U39,X1 and modify the related schematic .
(Modify CKT,BOM&Layout)

36. Change JP9 from P/N: SP010019210 to SP010009910 for cost down . <Page 32> 93.02.16.

-Change JP9 from P/N: SP010019210 to SP010009910 , del R508,R509,R510,R523,C684,C685,C686,C694 and modify
the related schematic . (Modify CKT,BOM&Layout)

37. Modify BIOS pin definition and remove BIOS beffer IC for cost down plan . <Page 33,34> 93.02.16.

-Del U13,U14,RP33,C331,RP32,R186,R189,C333,C332,R188 and modify the related schematic .
(Modify CKT,BOM&Layout)

38. LED function re-defined for cost down plan . <Page 32,33> 93.02.20.

-Del C688,C690,R512,R514, and modify the related schematic . (Modify CKT,BOM&Layout)

39. Issue BEEP# from EC pin directly for cost down plan . <Page 27> 93.02.22.

-Move U6,U24 location ; Del R305,R308,R303(@),R537,C457 and modify the related schematic .
(Modify CKT,BOM&Layout)

40. Add EMI request schematic for Inverter related reserved . <Page 17> 93.02.22.

-Add L59,L60,L61,L62(close to JP6) and modify the related schematic . (Modify CKT,BOM&Layout)

41. Add pull down design for "SYSON","SUSP#","EC_RSMRST#" floating risk . <Page 33> 93.02.22.

-Add R556,R557,R558(close to U12) and modify the related schematic . (Modify CKT,BOM&Layout)

42. Modify the "PCI_RST#" related schematic for Cost Down verified and prepared . <Page 20> 93.02.23.

-Add R559,R560,C717,R561,R562,R565; (Remove U24,C380,C452(@)) and modify the related schematic .
(Modify CKT,BOM&Layout)

43. Change Reset IC from MAX6342RUT to MAX809SEUR for Cost Down . <Page 35> 93.02.23.

-Add U41,R563,R564 ; (Remove U32,R460,R461,R462(@)) and modify the related schematic . (Modify CKT,BOM&Layout)

----PLEASE SEE NEXT PAGE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

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Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

H/W2 EE Dept. PIR SHEET(1)

LA-2251

46 47Monday, May 17, 2004

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DFY30 from DB-Step to Pre SI-Step LA-2251 REV:0.1 -> 0.2 Modify <93.02.06.~93.03.09. >

44. Reserve EMI request design for LVDS clock related signal . <Page 9,16> 93.02.23.

-Add R566(@),C718(@),R567(@),R568(@),C719(@),C720(@),move R215 (close to U22) and modify
the related schematic . (Modify CKT&Layout)

45. Create +PWR_PCM for U4(CB1410) core power +3VALW and +3VS power source option .
<Page 23> 93.02.25.

1 1

-Modify the related schematic to change +3VALW to +PWR_PCM . (Modify CKT&Layout)

46. Reserve +3VS power source option for U4(CB1410) pin18&44 . <Page 23> 93.02.25.

-Add R569(@),R570(@)(close to U4) and modify the related schematic . (Modify CKT&Layout)

47. Reserve some CAPs for Power Plane through mode risk improved . <Page 36> 93.02.25.

-Add C721~C726(@) and modify the related schematic . (Modify CKT&Layout)

48. Cancel VGA_GND for EMI request . <Page 16,17> 93.03.02.

-Del L54,L55,L56,L57 and modify the related schematic . (Modify CKT,BOM&Layout)

49. Remove MiniPCI Modem function . <Page 26> 93.03.02.

-Del R123 , C266(@),C267(@),R122(@),C263(@) and modify the related schematic .
(Modify CKT,BOM&Layout)

50. Remove MiniPCI Modem function . <Page 27> 93.03.03.

-Del R333, Remove R334,C484(Close to Pin22) and modify the related schematic .
(Modify CKT,BOM&Layout)

51. Modify Pull High Resistor Value from 100K to 10K for standard design . <Page 12> 93.03.03.

-Modify R527 from 100Kohm to 10Kohm . (Modify CKT&BOM)

52. Remove some parts because remove ACER keyboard function . <Page 32> 93.03.03.

2 2

-Remove Q1,R4,R5,R6 . (Modify CKT&BOM)

53. Add the Pull High Resistor to enable the VGA tuned function for SIS request . <Page 09> 93.03.03.

-Add R210 (P/N: SD028470100/ S RES 1/16W 4.7K +-5% 0402) . (Modify CKT&BOM)

54. Modify the resistor's value to 1Mohm for SI4800 design . <Page 17> 93.03.03.

-Change R91(P/N: SD028150300 to SD028100400) . (Modify CKT&BOM)

55. Modify NB_RST# related and change LPC_RST# resistor value for signal quality improved .
<Page 20> 93.03.09.

-Change R346(0ohm->10ohm) ; Add R571(10ohm) . (Modify CKT,BOM&Layout)

56. Change SIS302ELV pin60 level latch power source from +3VS to +1.8VS(same as SIS661FX U18.W3
power source) for SIS Design Change . <Page 16> 93.03.09.

-Change L47.1's power source from +3VS to +1.8VS . (Modify CKT&Layout)

57. Modify PCI_RST# related and change PCI_RST# resistor value for signal rising time risk fixed .
<Page 20> 93.03.18.

-Change R562(1Kohm->300ohm);R565(2Kohm->620ohm);Remove C717(10PF_0402).(Modify CKT&BOM)

58. Modify PM_PWRGD related and change PM_PWRGD resistor value for signal rising time risk fixed .
<Page 35> 93.03.18.

3 3

-Change R563(1Kohm->300ohm) ; R564(2Kohm->620ohm) . (Modify CKT&BOM)

59. Pull Down BT_WAKE_UP signal . <Page 33> 93.03.19.

-Add C330(100K_0603ohm,SD0131003T1) . (Modify CKT&BOM)

60. Change Material to meet Layout Size . <Page 30> 93.03.19.

-Change C503(10U_1206->10U_0805)(SE054106Z10->SE054106Z10) . (Modify CKT&BOM)

61. Disconnect CPUCLK_STP# to CLK GEN . <Page 12> 93.03.19.

-Remove R541(@0ohm) . (Modify CKT&BOM)

62. Update PCMCIA SOCKET JP15 Library . <Page 23> 93.03.22.

-Update JP15 CIS library . (Modify CKT&Layout)

63. Correct H_FERR# have double Pull High problem . <Page 05> 93.04.05.

BOM Release .

69. Modify Audio Codec pins connection related to fix the noise issue . <Page 27> 93.04.12.

-Remove C467(@0.1UF_0402) . (Modify CKT&BOM)

-Reserve C733,C734(@0.1UF_0402) . (Modify CKT&Layout)

70. Modify JP32 power source pins connection for new CardReader Board cost down and SB chip power issue fixed .
<Page 29> 93.04.12.

-Change JP32.1&JP32.7 from +5VS to +3VALW ; JP32.2&JP32.8 from +5VS to +3VS . (Modify CKT&Layout)

71. Modify the USB ports definition and related connection for SB USB power source issue improved . <Page 19,29>

93.04.12.

-Change USB ports from P0 to P3 ; P3 to P5 ; P5 to P4 ; P4 to P0 . (Modify CKT&Layout)

-Remove OVCUR#5 R496(@10K_0402) , Add OVCUR#0 R440(10K_0402) . (Modify CKT&BOM)

72. Add BT_WAKE_UP Pull Down resistor . <Page 33>93.04.12.

-Add R574(100Kohm_0402) . (Modify CKT,BOM&Layout)

73. Add some material to BOM for EMI request . <Page 9,13,19>93.04.15.

-Add C406,C545(10PF_0402) . (Modify CKT&BOM)

-Add R566,R442(12ohm_0402) . (Modify CKT&BOM)

-Add C718(15PF_0402) . (Modify CKT&BOM)

74. Modify H_PROCHOT# connection and add EC_PROCHOT# pin for Throttling function control by EC .
<Page 5,18,33>93.04.19.

-Add R21 (62ohm_0402)(Because SB Int. PH disconnection) . (Modify CKT&BOM)

-Remove R378(0_0402) ; Add R578(0_0402) to connect CPU and EC CTRL(U12.92) . (Modify CKT,BOM&Layout)

75. Correct H_FERR# have double Pull High problem . <Page 18> 93.04.19.

-Del RP87.6(H_FERR# connection) . (Modify CKT&Layout)

76. Modify IEEE1394 related schematic for the Vendor VIA recommend . <Page 24> 93.04.19.

-Add R576(0ohm_0805) . (Modify CKT,BOM&Layout)

-Add C735,C736,C737,C738(0.1UF_0402) . (Modify CKT,BOM&Layout)

-Remove R544(1Kohm_0402) . (Modify CKT&BOM)

-Connect R550.2,R551.2,R552.1&C712.1 . (Modify CKT&Layout)

77. Disconnect JP8.36(WLAN_PME#) for normal design . <Page 26> 93.04.19.

-Reserve R579(@0ohm_0402) . (Modify CKT&Layout)

78. Change VBCAD's Pull-High Power Source from +3VS to +1.8VS for the vendor SIS recommend . <Page 16> 93.04.19.

-Change R384.1's connection from +3VS to +1.8VS . (Modify CKT&Layout)

79. Modify JP32 power source pins connection for new CardReader Board cost down and SB chip power issue fixed
option . <Page 29> 93.04.19.

-Change JP32.1/2/7/8 from +5VS only to+5VS(JOPEN3)/+3VALW(JOPEN4) option . (Modify CKT,BOM&Layout)

80. Disconnect MDC Connector JP14.29 for power consumption save . <Page 29> 93.04.19.

-Reserve R575(@0_0402) between JP14.29 and GND . (Modify CKT&Layout)

81. Modify LPC_RST# and NB_RST# related resistor value to fix signal quality issue . <Page 20> 93.03.18.

-Change R346(0ohm_0402->10ohm_0402) ; Add R571(10ohm_0402) . (Modify CKT,BOM&Layout)

DFY30 from PV-Step to Pre MV-Step LA-2251 REV:0.3 -> 1.0 Modify <93.04.19.~93.05.27. >

82. Modify Audio AMP LIN/RIN CAPs' value to improve audio noise issue . <Page 28> 93.04.29.

-Change C283,C284 from 0.47UF_0603 to 22PF_0603 . (Modify CKT&BOM)

83. Modify Audio AMP FADE# pin define to improve audio noise issue . <Page 28> 93.04.29.

-Change U9.16(FADE#)'s connection from AGND to +5VAMP by 10Kohm resistor(R580_0402) . (Modify CKT,BOM&Layout)

84. Change EC_SMD_2/EC_SMC_2's pull high power source from +3VALW to +5VALW because ENE_KB910
SMBUS1/2 use the same power level . <Page 33> 93.05.05.

-Change RP31.7/RP31.8 from +3VALW to +5VALW . (Modify CKT&Layout)

85. Modify SI102221K05 to SI102221K10 for material shortage issue . <Page 31> 93.05.13.

-Change CP7,CP8,CP9 from SI102221K05 to SI102221K10 . (Modify CKT&BOM)

-Remove R18(56ohm) . (Modify CKT&BOM)

64. Modify JP26 pin4 connection for Pioneer ODD(DVD Dual DVR-K12TBC/DVR-K13TBC) used .
<Page 22> 93.04.08.

-Reserve R572(@0ohm_0402) . (Modify CKT,BOM&Layout)

65. Add Decoupling Capacitor 220PF close to DDR Clock Buffer for EMI request . <Page 13> 93.04.10.

-Add C728,C729(220PF_0402) close to U20 . (Modify CKT,BOM&Layout)

4 4

66. Add Decoupling Capacitor 220PF close to NB M661FX VDDM for EMI request . <Page 11> 93.04.10.

-Add C730,C731,C732(220PF_0402) close to U18 . (Modify CKT,BOM&Layout)

67. Modify H_TESTHI2_7 Pull-High Resistor connection for Layout placement issue . <Page 05> 93.04.10.

-Add R573(56ohm_0402) close to JP25 . (Modify CKT,BOM&Layout)

68. Del H19 for PCB space free . <Page 30> 93.04.10.

-Del H19 . (Modify CKT&Layout)

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2

----PLEASE SEE NEXT PAGE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

4

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

H/W2 EE Dept. PIR SHEET(2)

LA-2251

47 47Monday, May 17, 2004

5

of

1.0