Acer HM42 Schematics

5

4

3

2

1

Project code: 91.4GW01.001(HM42-CP)

HM42-CP Block

HM42-CP Block HM42-CP Block

PCB P/N : 48.4GW01.011

X3 27Mhz

REVISION : -1 09920

Diagram

DiagramDiagram

Clock Generator

D D

ICS9LRS3197AKLFT

3

DDRIII 800/1066

DDRIII

X2

800/1066

Slot 0

Slot 1

20

21

DDRII Channel A

DDR II Channel B

14.318Mhz

Intel CPU

Arrandale

FDIx8

4,5,..,9,10

DMIx4

PCI EXPRESS GRAPHIC

X16

N11P-GE1

N11M-GE1

Nvida

22

91.4GY01.001(JE40-CP)

91.4GZ01.001(SJV41-CP)

91.4JD01.001(BA40-CP)

RGB CRT

LVDS 1CH

HDMI

CRT

LCD

WXGA+

HDMI

24

23

25

SYSTEM DC/DC

RT8223

INPUTS

DCBATOUT

OUTPUTS

5V_S5

3D3V_S5

SYSTEM DC/DC

RT8209E

INPUTS

DCBATOUT

OUTPUTS

1D5V_S3

SYSTEM DC/DC

49

50

RT8209E

WEBCAM

Mini-Card

WLAN

38

PCIE

INTEL

BLUETOOTH

PCH

Mini-Card

C C

RJ45 CONN

MIC IN

3G

38

Giga LAN

32

BCM57780

HD AUDIO CODEC

INT MIC

B B

ALC272

31

X1 25Mhz

33

USB 2.0

PCIE

X5 25Mhz

AZALIA

14 USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

6 SATA ports

8 PCIE ports

ACPI 1.1

LPC I/F

PCI/PCI BRIDGE

USB 2.0

SATA

Card Reader

AU 6433

USB x 3

37

23

29

30

USB_BD 09736-1

SD/MMC MS/MS Pro/xD

SATA HDD

JE40_Power_ BD

09738-1

HM42_Power_ BD

09737-1

SJV41_Power_ BD

09740-1

SJV41_LED_ BD

09739-1

37

26

PCB STACKUP

40

SPI

LPC debug

X4

32.768Khz

41

TOP

GND

S

GND

BOTTOM

LINE OUT

OP AMP

G1454

34

X6

32.768Khz

SPI

11,12,...,18,19

LPC Bus

KBC

ENE 3930

2CH SPEAKER

A A

SATA ODD

Flash ROM

4MB

41

BA40_Power_ BD

Diserete N11M

27

09768-1

INPUTS

DCBATOUT

SYSTEM DC/DC

INPUTS

DCBATOUT

SYSTEM DC/DC

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS5161

INPUTS

DCBATOUT

CPU DC/DC

ISL62882C

INPUTS

DCBATOUT

CHARGER

INPUTS

DCBATOUT

OUTPUTS

1D05V_VTT 1D05V_S0

RT9025

OUTPUTS

1D8V_S0

RT8209E

OUTPUTS

VGA_CORE

OUTPUTS

VCC_GFXCORE

OUTPUTS

VCC_CORE

ISL88731C

OUTPUTS

BT+

51

52

55

47,48

53

Wistron Corporation

Flash ROM

128KB

Thermal Sensor

41

G792

Touch

39

PAD

43

CPU FAN

5

4

3

Int. KB

Title

40

2

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Block Diagram

HM42-CP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1 72Friday, January 22, 2010

1

SC

A

B

C

D

E

Processor StrappingPCH Strapping

Name Schematics Notes

SPKR

4 4

3 3

INIT3_3V#

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#

GNT2#/ GPIO53

GPIO33

SPI_MOSI

NV_ALE

NC_CLE

HAD_DOCK_EN# /GPIO[33]

HDA_SDO

HDA_SYNC

GPIO15

GPIO8

GPIO27

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

Weak internal pull-down. Do not pull high.

Internal pull-up.

Default Mode:

(Connect to ground with 4.7-kΩ weak

Low (0) = Top Block Swap Mode

pull-down resistor).

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.

Connect GNT1# to ground with 1-kΩ pull-down

Boot from PCI:

resistor. Leave GNT0# Floating.

Connect both GNT0# and GNT1# to ground with 1-kΩ

Boot from LPC:

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.

Default:

Connect to ground with 1-kΩ

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.

Enable iTPM:

Left floating, no pull-down required.

Disable iTPM:

Connect to Vcc3_3 with 8.2-kΩ weak pull-up

Enable Danbury:

resistor. Connect to ground with 4.7-kΩ weak pull-down

Disable Danbury:

resistor.

Weak internal pull-up. Do not pull low.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

Pin Name

CFG[4]

CFG[3]

CFG[0]

CFG[7]

Strap Description Configuration (Default value for each bit is

DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select

Reserved Temporarily used for early Clarksfield samples.

1 unless specified otherwise)

Disabled - No Physical Display Port attached to

1:Embedded

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

-

Clarksfield (only for early samples pre-ES1)

Connect to GND with 3.01K Ohm/5% resistor

Only temporary for early CFD samples

Note:

(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.

Default Value

1

0

2 2

USB Table

PCIE Routing

LANE1

LANE2

LAN

MiniCard1

Pair

MiniCard2LANE3

1 1

Device

0

USB3

USB2

1

USB4

2

3

MINICARD1

4 WECAM

Touch Panel

5

NC

6

7

NC

89NC

USB1(HS)

10

Finger Print

11

Blue Tooth

1213MINIC2

Cardreader

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Table of Content

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

2 72Friday, January 22, 2010

SC

A

3D3V_S0

0R0603-P AD

4 4

0R0603-P AD

1 2

R310

1130 -SC

B

C360

12

SC10U6D3V3MX-GP

3D3V_CK 505

1D5V_S0

12

C356

0113 -1

SCD1U16V2ZY-2GP

R311

0R3J-0-U-G P

R308

0R3J-0-U-G P

1 2

DY

C

1D5V_S0 _CLKGEN

0120 -1

1D5V_S0 _CLKGEN

C366

12

SC10U6D3V3MX-GP

3D3V_CK 505_IO

SCD1U16V2ZY-2GP

C357

12

C361

D

SCD1U16V2ZY-2GP

12

C359

1130 -SC

C355

C353

SC1U10V2ZY-GP

C355

12

SC10U6D3V3MX-GP

DY

SCD1U16V2ZY-2GP

12

C358

DY

12

C354

R306

0R3J-0-U-G P

1130 -SC

1D05V_S 0

0R0603-P AD

1 2

R307

3D3V_S0

1 2

DY

E

SA 0622 EMI

VGA_XIN1_ L OSC_SPR EAD_L

U16

1D5V_S0 _CLKGEN 3D3V_CK 505

3D3V_CK 505_IO

1118 -SC

RNT1

PCH_SMB CLK12,20,21

R316

RNT1

1 2 3

DY

12

VGA_XIN1_ L

4

OSC_SPR EAD_L

GEN_XTA L_IN GEN_XTA L_OUT

CPU_STO P#

CLK_EN FSC

3 3

VGA_XIN162

OSC_SPR EAD62

CLK_ICH1412

C365

SC4D7P50V2CN-1GP

DY

12

SRN33J-5 -GP-U

PCH_SMB DATA12,20,21

33R2J-2-G P

1

VDD96_1_5

5

VDD27_3_3

15

VDDPCIEX_IO_LV

17

VDDPCIEX_1_5

18

VDDCPU_IO_LV

24

VDDCPU_1_5

29

VDDREF_3_3

6

27FIX

7

27SS

32

SCLK_3_3

31

SDATA_3_3

28

X1

27

X2

25

VTTPWRGD/PD#_3_3

30

REF/FSLC

16

NC#16

9LVS319 7BKLFT-GP

71.93197.B03

2ND = 71.08595.003

SATAT_LR

SATAC_LR

DOT96T_LR DOT96C_LR

CPUT_LR0 CPUC_LR0 CPUT_LR1 CPUC_LR1

PCIEXT_LR PCIEXC_LR

GND96 GND27

GNDSATA

GNDPCIEX

GNDCPU GNDREF

GND

CLK_PCIE_ SATA_R

10

CLK_PCIE_ SATA#_R

11

3 4

CLK_CPU _BCLK_R

23

CLK_CPU _BCLK#_R

22 20 19

13 14

2 8 9 12 21 26 33

DREFCLK _R DREFCLK #_R

CLKIN_DMI_R CLKIN_DMI#_R

0113 -1

2 2

1118 -SC

C364

SC12P50 V2JN-3GP

1 2

12

X2

C363

SC12P50 V2JN-3GP

1 2

SB 0813

CL = 10pF

Freq tolertance :+/- 30 ppm

X2 X-14D318 18M-50GP

X-14D318 18M-50GP

GEN_XTA L_OUT_R

82.30005.A51

2ND = 82.30005.901

3rd = 82.30005.B81

R313

200R2J-L 1-GP

12

GEN_XTA L_IN

12

R314

R314 10MR2J-L -GP

10MR2J-L -GP

DY

GEN_XTA L_OUT

1D05V_V TT

DY

1 2

R317

R317 2K2R2J-2 -GP

2K2R2J-2 -GP

R315

R315 2K2R2J-2 -GP

2K2R2J-2 -GP

FSC 0 1

SPEED

FSC

133MHz

(Default)

100MHz

1130 -SC

R3710R0402-P AD R3710R0402-PAD

12

R6950R0402-P AD R6950R0402-PAD

12

R5470R0402-P AD R5470R0402-PAD

12

R4110R0402-P ADR4110R0402-P AD

12

R6970R0402-P AD R6970R0402-PAD

12

R6960R0402-P AD R6960R0402-P AD

12

R3670R0402-P AD R3670R0402-PAD

12

R5480R0402-P AD R5480R0402-PAD

12

CLK_PCIE_ SATA 12

CLK_PCIE_ SATA# 12

DREFCLK 12

DREFCLK # 12

CLK_CPU _BCLK 12

CLK_CPU _BCLK# 12

CLKIN_DMI 1 2

CLKIN_DMI# 12

1130 -SC

3D3V_S0

CLK_EN

1016 -SA

2ND = 84.2N702.E31

4

RN32

RN32 SRN10KJ -5-GP

SRN10KJ -5-GP

1

2 3

CPU_STO P#

D

...

2N7002E -1-GP

84.2N702.D31

Q18

PCH_SMB DATA

PCH_SMB CLK

G

..

S

1 2

EC49 SC22P50 V2JN-4GP

1 2

DY

EC48 SC22P50 V2JN-4GP

DY

1 2

ECT3 SC33P50V2J N-3GP

DY

1 2

ECT4 SC33P50V2J N-3GP

VR_CLKE N# 47

SA 0629 RF

1 1

A

B

C

D

UMA

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Clock Generator

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

3 72Friday, January 22, 2010

E

SC

5

D D

DMI_TXN01 3 DMI_TXN11 3 DMI_TXN21 3 DMI_TXN31 3

DMI_TXP013 DMI_TXP113 DMI_TXP213 DMI_TXP313

DMI_RXN013 DMI_RXN113 DMI_RXN213 DMI_RXN313

DMI_RXP013 DMI_RXP113 DMI_RXP213 DMI_RXP313

FDI_TXN013 FDI_TXN113 FDI_TXN213

C C

B B

FDI_TXN313 FDI_TXN413 FDI_TXN513 FDI_TXN613 FDI_TXN713

FDI_TXP013 FDI_TXP113 FDI_TXP213 FDI_TXP313 FDI_TXP413 FDI_TXP513 FDI_TXP613 FDI_TXP713

FDI_FSYNC013 FDI_FSYNC113

FDI_INT13

FDI_LSYNC013 FDI_LSYNC113

RN33

1 2 3 4 5

SRN1KJ-4 -GP

DIS

FDI_FSYNC1

8

FDI_LSYNC1

7

FDI_LSYNC0

6

FDI_FSYNC0

1130 -SC

For Graphics Disable , Pull-down to GND via 1-k ± 5% resistor

A A

4

CPU1A

A24

DMI_RX0#

C23

DMI_RX1#

B22

DMI_RX2#

A21

DMI_RX3#

B24

DMI_RX0

D23

DMI_RX1

B23

DMI_RX2

A22

DMI_RX3

D24

DMI_TX0#

G24

DMI_TX1#

F23

DMI_TX2#

H23

DMI_TX3#

D25

DMI_TX0

F24

DMI_TX1

E23

DMI_TX2

G23

DMI_TX3

E22

FDI_TX0#

D21

FDI_TX1#

D19

FDI_TX2#

D18

FDI_TX3#

G21

FDI_TX4#

E19

FDI_TX5#

F21

FDI_TX6#

G18

FDI_TX7#

D22

FDI_TX0

C21

FDI_TX1

D20

FDI_TX2

C18

FDI_TX3

G22

FDI_TX4

E20

FDI_TX5

F20

FDI_TX6

G19

FDI_TX7

F17

FDI_FSYNC0

E17

FDI_FSYNC1

C17

FDI_INT

F18

FDI_LSYNC0

D17

FDI_LSYNC1

12

R481

R481 1KR2J-1-G P

1KR2J-1-G P

DIS

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3RD = 62.10055.341

4th = 62.10055.321

0113 -1

Del 3rd 62.10055.341 and 4th 62.10055.321 3rd and 4th have been purged CE will confrim SQM if it can add BOM CE will release EC to add to BOM

3

1 OF 9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX0# PEG_RX1# PEG_RX2#

DMI

PEG_RX3# PEG_RX4# PEG_RX5#

PCI EXPRESS -- GRAPHICS

PEG_RX6# PEG_RX7# PEG_RX8#

PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15#

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5

Intel(R) FDI

PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX0# PEG_TX1# PEG_TX2# PEG_TX3# PEG_TX4# PEG_TX5# PEG_TX6# PEG_TX7# PEG_TX8# PEG_TX9#

PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15#

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

AUBURNDALE

PEG_IRCOM P_R

B26 A26 B27

EXP_RBIAS

A25

PEG_RXN 15

K35

PEG_RXN 14

J34

PEG_RXN 13

J33

PEG_RXN 12

G35

PEG_RXN 11

G32

PEG_RXN 10

F34

PEG_RXN 9

F31

PEG_RXN 8

D35

PEG_RXN 7

E33

PEG_RXN 6

C33

PEG_RXN 5

D32

PEG_RXN 4

B32

PEG_RXN 3

C31

PEG_RXN 2

B28

PEG_RXN 1

B30

PEG_RXN 0

A31

PEG_RXP 15

J35

PEG_RXP 14

H34

PEG_RXP 13

H33

PEG_RXP 12

F35

PEG_RXP 11

G33

PEG_RXP 10

E34

PEG_RXP 9

F32

PEG_RXP 8

D34

PEG_RXP 7

F33

PEG_RXP 6

B33

PEG_RXP 5

D31

PEG_RXP 4

A32

PEG_RXP 3

C30

PEG_RXP 2

A28

PEG_RXP 1

B29

PEG_RXP 0

A30

PEG_TXN 15_L PEG_TXN15

L33

PEG_TXN 14_L PEG_TXN14

M35

PEG_TXN 13_L PEG_TXN13

M33

PEG_TXN 12_L PEG_TXN12

M30

PEG_TXN 11_L PEG_TXN11

L31

PEG_TXN 10_L PEG_TXN10

K32

PEG_TXN 9_L PEG_TXN9

M29

PEG_TXN 8_L PEG_TXN8

J31

PEG_TXN 7_L PEG_TXN7

K29

PEG_TXN 6_L PEG_TXN6

H30

PEG_TXN 5_L PEG_TXN5

H29

PEG_TXN 4_L PEG_TXN4

F29

PEG_TXN 3_L PEG_TXN3

E28

PEG_TXN 2_L PEG_TXN2

D29

PEG_TXN 1_L PEG_TXN1

D27

PEG_TXN 0_L PEG_TXN0

C26

PEG_TXP 15_L PEG_TXP 15

L34

PEG_TXP 14_L PEG_TXP 14

M34

PEG_TXP 13_L PEG_TXP 13

M32

PEG_TXP 12_L PEG_TXP 12

L30

PEG_TXP 11_L PEG_TXP 11

M31

PEG_TXP 10_L PEG_TXP 10

K31

PEG_TXP 9_L PEG_TXP 9

M28

PEG_TXP 8_L PEG_TXP 8

H31

PEG_TXP 7_L PEG_TXP 7

K28

PEG_TXP 6_L PEG_TXP 6

G30

PEG_TXP 5_L PEG_TXP 5

G29

PEG_TXP 4_L PEG_TXP 4

F28

PEG_TXP 3_L PEG_TXP 3

E27

PEG_TXP 2_L PEG_TXP 2

D28

PEG_TXP 1_L PEG_TXP 1

C27

PEG_TXP 0_L PEG_TXP 0

C25

R201

1 2

R206

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

1 2

DIS_Muxless

2

49D9R2F -GP

750R2F-G P

PEG_RXN [15..0] 62

PEG_RXP [15..0] 62

C498 SCD1 U10V2KX-5GP

C498 SCD1 U10V2KX-5GP C496 SCD1 U10V2KX-5GP

C496 SCD1 U10V2KX-5GP C481 SCD1 U10V2KX-5GP

C481 SCD1 U10V2KX-5GP C494 SCD1 U10V2KX-5GP

C494 SCD1 U10V2KX-5GP C479 SCD1 U10V2KX-5GP

C479 SCD1 U10V2KX-5GP C492 SCD1 U10V2KX-5GP

C492 SCD1 U10V2KX-5GP C477 SCD1 U10V2KX-5GP

C477 SCD1 U10V2KX-5GP C490 SCD1 U10V2KX-5GP

C490 SCD1 U10V2KX-5GP C475 SCD1 U10V2KX-5GP

C475 SCD1 U10V2KX-5GP C488 SCD1 U10V2KX-5GP

C488 SCD1 U10V2KX-5GP C473 SCD1 U10V2KX-5GP

C473 SCD1 U10V2KX-5GP C500 SCD1 U10V2KX-5GP

C500 SCD1 U10V2KX-5GP C502 SCD1 U10V2KX-5GP

C502 SCD1 U10V2KX-5GP C504 SCD1 U10V2KX-5GP

C504 SCD1 U10V2KX-5GP C506 SCD1 U10V2KX-5GP

C506 SCD1 U10V2KX-5GP C508 SCD1 U10V2KX-5GP

C508 SCD1 U10V2KX-5GP

C497 SCD1 U10V2KX-5GP

C497 SCD1 U10V2KX-5GP C495 SCD1 U10V2KX-5GP

C495 SCD1 U10V2KX-5GP C480 SCD1 U10V2KX-5GP

C480 SCD1 U10V2KX-5GP C493 SCD1 U10V2KX-5GP

C493 SCD1 U10V2KX-5GP C478 SCD1 U10V2KX-5GP

C478 SCD1 U10V2KX-5GP C491 SCD1 U10V2KX-5GP

C491 SCD1 U10V2KX-5GP C476 SCD1 U10V2KX-5GP

C476 SCD1 U10V2KX-5GP C489 SCD1 U10V2KX-5GP

C489 SCD1 U10V2KX-5GP C474 SCD1 U10V2KX-5GP

C474 SCD1 U10V2KX-5GP C487 SCD1 U10V2KX-5GP

C487 SCD1 U10V2KX-5GP C472 SCD1 U10V2KX-5GP

C472 SCD1 U10V2KX-5GP C501 SCD1 U10V2KX-5GP

C501 SCD1 U10V2KX-5GP C503 SCD1 U10V2KX-5GP

C503 SCD1 U10V2KX-5GP C505 SCD1 U10V2KX-5GP

C505 SCD1 U10V2KX-5GP C507 SCD1 U10V2KX-5GP

C507 SCD1 U10V2KX-5GP C509 SCD1 U10V2KX-5GP

C509 SCD1 U10V2KX-5GP

lab stuff 2nd,3rd and 4 th in BOM Eng add 1st source(62.10040.611)

Eng do not stuff 4 th in BOM becasue 4 th have been purge ,so stuff 1st in BOM but CE said, 4th need stuff in PD if not any concern

1

PEG_TXN [15..0] 62

PEG_TXP [15..0] 62

Diserete N11M

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

CPU (1/7)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

4 72Friday, January 22, 2010

SC

5

4

3

2

1

1D05V_V TT

1 2

R241 49D9R2F -GPR241 49D9R2F -GP

1 2

R189 68R2-GPR189 68R2-GP

H_CATER R#

PROCHOT #

D D

H_PECI16

H_PROCH OT#47

PM_THRM TRIP-A#16,45

H_PM_SYNC13

R227

C C

H_PW RGD16,59

1 2

0R0402-P AD

1130 -SC

PM_DRAM _PWRGD13

H_VTTPW RGD51

PLT_RST #15,30,36,3 7,40,41,45,59,62

R295

PM_DRAM _PWRGD

B B

1D5V_S0 _DDR 1D5V_S0 _DDR

12

R271

R271 1K1R2F-G P

12

1K1R2F-G P

R251

R251 3KR2F-GP

3KR2F-GP

NON-S3

DRAMPW ROK

NON-S3

A A

1D5V_S0 _PWRGD45 ,52

R295

1 2

1K5R2F-2 -GP

S3

PM_DRAM _PWRGD

U11

1

B

2

A

3

GND

74LVC1G 08GW-1-GP

73.01G08.L04

2ND = 73.7SZ08.DAH

PM_DRAM _PWRGD_1

VCC

S3

1 2

R468 20R2F-GPR468 20R2F-GP

1 2

R466 20R2F-GPR466 20R2F-GP

1 2

R228 49D9R2F -GPR228 49D9R2F -GP

1 2

R457 49D9R2F -GPR457 49D9R2F -GP

R194 0R2J-2-GP

1 2

DY

TP39TP AD14-GP TP3 9TPAD14-GP

R226

1 2

0R0402-P AD

R242

1 2

0R0402-P AD

TP41TP AD14-GP TP4 1TPAD14-GP

R232

1 2

1K5R2F-2 -GP

12

R274

R274 1K1R2F-G P

1K1R2F-G P

DY

R294

R294 750R2F-G P

750R2F-G P

S3

1 2

3D3V_S5

5

PM_DRAM _PWRGD_1

4

Y

TP42TP AD14-GP TP4 2TPAD14-GP

1

H_COMP3

H_COMP2

H_COMP1

H_COMP0

SKTOCC# _R

1

H_CATER R#

PROCHOT #

H_CPURS T#

VCCPW RGOOD_1

VCCPW RGOOD_0

DRAMPW ROK

H_PW RGD_XDP

PLT_RST #_R

12

R233

R233 750R2F-G P

750R2F-G P

CPU1B

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

XDP_TMS

XDP_TDI

XDP_PRE Q#

XDP_TDO

XDP_TCL K

XDP_TRS T#

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

1 2

DY

R183 51R2J-2-G P

1 2

DY

R451 51R2J-2-G P

1 2

DY

R188 51R2J-2-G P

1 2

R453 51R2J-2-G PR453 51R2J-2-G P

1 2

DY

R195 51R2J-2-G P

1 2

R456 51R2J-2-G PR456 51R2J-2-G P

MISC

AUBURNDALE

THERMAL PWR MANAGEMENT

DDR3

1D05V_V TT

CLOCKS

MISC

JTAG & BPM

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXT_TS0# PM_EXT_TS1#

PRDY# PREQ#

TCK TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#

CPU JTAG

A16 B16

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29

TDI

AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

XDP_TDO _M

XDP_TDI_M

BCLK_CP U_P BCLK_CP U_N

PEG_CLK _R PEG_CLK #_R

DPLL_RE F_SSCLK DPLL_RE F_SSCLK#

SM_DRAM RST# 16

SM_RCOM P_0 SM_RCOM P_1 SM_RCOM P_2

XDP_PRD Y# XDP_PRE Q#

XDP_TCL K XDP_TMS XDP_TRS T#

XDP_TDI XDP_TDO XDP_TDI_M XDP_TDO _M

XDP_DBR ESET#

R169

R169 0R0402-P AD

0R0402-P AD

1 2

0113 -1

1

BCLK_CP U_P 16 BCLK_CP U_N 16

PEG_CLK _R 12 PEG_CLK #_R 12

DPLL_RE F_SSCLK 12 DPLL_RE F_SSCLK# 12

RN25

RN25 SRN10KJ -5-GP

SRN10KJ -5-GP

1 2 3

TP37 TPAD 14-GPTP3 7 TPAD 14-GP

4

1D05V_V TT

SM_RCOM P_0

SM_RCOM P_1

SM_RCOM P_2

PM_EXTT S#0_R 20 PM_EXTT S#1_R 21

1 2

R282 100R2F-L 1-GP-UR28 2 100R2F-L 1-GP-U

1 2

R280 24D9R2F -L-GPR280 24D9R2F -L-GP

1 2

R281 130R2F-1 -GPR281 130R2F-1 -GP

1130 -SC

DPLL_RE F_SSCLK DPLL_RE F_SSCLK#

XDP_DBR ESET#

R197 1KR2J-1-G PR197 1KR2J-1-G P

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

1 2

R305 0R04 02-PADR305 0R04 02-PAD

1 2

R312 0R04 02-PADR312 0R04 02-PAD

1 2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2/7)

HM42-CP

3D3V_S0

5 72Friday, January 22, 2010

SC

5

CPU1C

3 OF 9

4

3

CPU1D

2

4 OF 9

1

AA6

SA_CK0

M_A_DQ[6 3..0]2 0

D D

C C

B B

M_A_BS020 M_A_BS120 M_A_BS220

M_A_CAS #2 0 M_A_RAS #2 0 M_A_W E#20

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3

A10

C10

B10

D10

E10

F10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ7 AJ6

AJ10

AJ9

AL10

AK12

AK8

AL7

AK11

AL8

AN8 AM10 AR11

AL11

AM9

AN9

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

AC3 AB2

AE1 AB3 AE9

SA_DQ0 SA_DQ1

C7

SA_DQ2

A7

SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6

A8

SA_DQ7

D8

SA_DQ8 SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15 SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20 SA_DQ21

J7

SA_DQ22

J10

SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

U7

SA_BS2

SA_CAS# SA_RAS# SA_WE#

AUBURNDALE

DDR SYSTEM MEMORY A

SA_CK0# SA_CKE0

SA_CK1 SA_CK1# SA_CKE1

SA_CS0# SA_CS1#

SA_ODT0 SA_ODT1

SA_DM0

SA_DM1

SA_DM2

SA_DM3

SA_DM4

SA_DM5

SA_DM6

SA_DM7

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0

SA_MA1

SA_MA2

SA_MA3

SA_MA4

SA_MA5

SA_MA6

SA_MA7

SA_MA8

SA_MA9

SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS #0M_A_DQS#0 M_A_DQS #1 M_A_DQS #2 M_A_DQS #3 M_A_DQS #4 M_A_DQS #5 M_A_DQS #6 M_A_DQS #7

M_A_DQS 0 M_A_DQS 1 M_A_DQS 2 M_A_DQS 3 M_A_DQS 4 M_A_DQS 5 M_A_DQS 6 M_A_DQS 7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_D DR0 20 M_CLK_D DR#0 20 M_CKE0 20

M_CLK_D DR1 20 M_CLK_D DR#1 20 M_CKE1 20

M_CS#0 20 M_CS#1 20

M_ODT0 20 M_ODT1 20

M_A_DM[7 ..0] 20

M_A_DQS #[7..0] 20

M_A_DQS [7..0] 20

M_A_A[15 ..0] 20

M_B_DQ[6 3..0]2 1

M_B_BS021 M_B_BS121 M_B_BS221

M_B_CAS #2 1 M_B_RAS #2 1 M_B_W E#21

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ1 0 M_B_DQ1 1 M_B_DQ1 2 M_B_DQ1 3 M_B_DQ1 4 M_B_DQ1 5 M_B_DQ1 6 M_B_DQ1 7 M_B_DQ1 8 M_B_DQ1 9 M_B_DQ2 0 M_B_DQ2 1 M_B_DQ2 2 M_B_DQ2 3 M_B_DQ2 4 M_B_DQ2 5 M_B_DQ2 6 M_B_DQ2 7 M_B_DQ2 8 M_B_DQ2 9 M_B_DQ3 0 M_B_DQ3 1 M_B_DQ3 2 M_B_DQ3 3 M_B_DQ3 4 M_B_DQ3 5 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 8 M_B_DQ3 9 M_B_DQ4 0 M_B_DQ4 1 M_B_DQ4 2 M_B_DQ4 3 M_B_DQ4 4 M_B_DQ4 5 M_B_DQ4 6 M_B_DQ4 7 M_B_DQ4 8 M_B_DQ4 9 M_B_DQ5 0 M_B_DQ5 1 M_B_DQ5 2 M_B_DQ5 3 M_B_DQ5 4 M_B_DQ5 5 M_B_DQ5 6 M_B_DQ5 7 M_B_DQ5 8 M_B_DQ5 9 M_B_DQ6 0 M_B_DQ6 1 M_B_DQ6 2 M_B_DQ6 3

AF3 AG1

AK1 AG4 AG3

AH4 AK3

AK4 AM6 AN2

AK5

AK2 AM4 AM3

AP3 AN5

AT4 AN6 AN4 AN3

AT5

AT6 AN7

AP6

AP8

AT9

AT7

AP9

AR10

AT10

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33

AJ3

SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37

AJ4

SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

AUBURNDALE

DDR SYSTEM MEMORY - B

SB_CK0 SB_CK0# SB_CKE0

SB_CK1 SB_CK1# SB_CKE1

SB_CS0# SB_CS1#

SB_ODT0 SB_ODT1

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM4

SB_DM5

SB_DM6

SB_DM7

SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W8 W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS #0 M_B_DQS #1 M_B_DQS #2 M_B_DQS #3 M_B_DQS #4 M_B_DQS #5 M_B_DQS #6 M_B_DQS #7

M_B_DQS 0 M_B_DQS 1 M_B_DQS 2 M_B_DQS 3 M_B_DQS 4 M_B_DQS 5 M_B_DQS 6 M_B_DQS 7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_D DR2 21 M_CLK_D DR#2 21 M_CKE2 21

M_CLK_D DR3 21 M_CLK_D DR#3 21 M_CKE3 21

M_CS#2 21 M_CS#3 21

M_ODT2 21 M_ODT3 21

M_B_DM[7 ..0] 21

M_B_DQS #[7..0] 21

M_B_DQS [7..0] 21

M_B_A[15 ..0] 21

AUBURNF ,CLARKUNF

62.10040.611

A A

5

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

4

3

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

CPU (3/7)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

6 72Friday, January 22, 2010

1

SC

5

4

CPU1F

6 OF 9

3

2

1

VCC_CORE

PROCESSOR CORE POWER

VCC_CORE

D D

1130 -SC

C522

12

SC10U6D3V3MX-GP

DY

C268

12

SC10U6D3V3MX-GP

DY

C520

12

SC10U6D3V3MX-GP

C C

B B

A A

SC10U6D3V3MX-GP

C200

12

SC10U6D3V3MX-GP

C222

12

SC10U6D3V3MX-GP

C218

12

SC10U6D3V3MX-GP

C260

12

SC10U6D3V3MX-GP

DY

C521

12

SC10U6D3V3MX-GP

0111 -1

C212

C231

12

SC10U6D3V3MX-GP

DY

5

SC10U6D3V3MX-GP

DY

C189

C523

12

SC10U6D3V3MX-GP

C239

C230

12

SC10U6D3V3MX-GP

C194

C211

12

SC10U6D3V3MX-GP

DY

C217

C524

12

SC10U6D3V3MX-GP

C207

C519

12

SC10U6D3V3MX-GP

C199

C214

12

SC10U6D3V3MX-GP

DY

C252

C276

12

SC10U6D3V3MX-GP

DY

48A

4

AG35

VCC

AG34

VCC

AG33

VCC

AG32

VCC

AG31

VCC

AG30

VCC

AG29

VCC

AG28

VCC

AG27

VCC

AG26

VCC

AF35

VCC

AF34

VCC

AF33

VCC

AF32

VCC

AF31

VCC

AF30

VCC

AF29

VCC

AF28

VCC

AF27

VCC

AF26

VCC

AD35

VCC

AD34

VCC

AD33

VCC

AD32

VCC

AD31

VCC

AD30

VCC

AD29

VCC

AD28

VCC

AD27

VCC

AD26

VCC

AC35

VCC

AC34

VCC

AC33

VCC

AC32

VCC

AC31

VCC

AC30

VCC

AC29

VCC

AC28

VCC

AC27

VCC

AC26

VCC

AA35

VCC

AA34

VCC

AA33

VCC

AA32

VCC

AA31

VCC

AA30

VCC

AA29

VCC

AA28

VCC

AA27

VCC

AA26

VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

AUBURNF,CLARKU NF

62.10040.611

2ND = 62.10053.561

AH14

VTT0

AH12

VTT0

AH11

VTT0

AH10

VTT0

J14

AUBURNDALE

1.1V RAIL POWER

CPU CORE SUPPLY

CPU VIDS

POWER

SENSE LINES

3rd = 62.10055.341 4th = 62.10055.321

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PSI#

VID0 VID1 VID2 VID3 VID4 VID5 VID6

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34

G15

Clarksfield H_VTTVID1 = Low, VTT = 1.1V Arrandale H_VTTVID1 = High, VTT = 1.05V

AN35

AJ34 AJ35

B15 A15

3

C275

SC10U6D3V3MX-GP

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

H_VTTVID1

TP_VSS_SENSE_VTT

1130 -SC

C565

12

SC10U6D3V3MX-GP

1130 -SC

C303

12

SC10U6D3V3MX-GP

DY

+VTT_43 +VTT_44

PSI# 47

H_VID[6..0] 47

PM_DPRSLPVR 47

1

TP53 TPAD14-GPTP53 TPAD14-GP

IMVP_IMON 47

VTT_SENSE 51

1

TP51 TPAD14-GPTP51 TPAD14-GP

C541

C543

C291

12

SC10U6D3V3MX-GP

12

DY

SC10U6D3V3MX-GP

C288

12

SC10U6D3V3MX-GP

C292

12

SC10U6D3V3MX-GP

12

SC10U6D3V3MX-GP

1D05V_VTT

1130 -SC

R677 0R0402-PADR677 0R0402-PAD

1 2

R678 0R0402-PADR678 0R0402-PAD

1 2

VCC_CORE

12

R129

R129 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R128

R128 100R2F-L1-GP-U

100R2F-L1-GP-U

2

C267

1D05V_VTT

12

SC10U6D3V3MX-GP

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

1D05V_VTT

Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V

VCC_SENSE 47 VSS_SENSE 47

Title

Size Document N umber Rev

Size Document N umber Rev Custom

Custom

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih,

21F, 88, Sec.1, H sin Tai Wu Rd., Hsich ih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (4/7)

HM42-CP

1

SC

7 72Friday, January 22, 2010

SC

5

4

3

2

1

VCC_GFX CORE

15A

D D

C526

C528

C536

12

SC10U6D3V3MX-GP

UMA_Muxless

VCC_GFX CORE

R483

R215

R215 0R3J-0-U-G P

0R3J-0-U-G P

DIS

C C

DIS

1 2

R483 0R3J-0-U-G P

0R3J-0-U-G P

DIS

1 2

Please note that the VTT Rail

R216

R216 0R3J-0-U-G P

0R3J-0-U-G P

DIS

1 2

1D05V_V TT

12

SC10U6D3V3MX-GP

UMA_Muxless

1 2

Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V

SA 0626

TC18

B B

TC18

1D05V_V TT

12

ST220U2D5VBM-2GP

DY

18A

12

C549

SC10U6D3V3MX-GP

C529

12

SC10U6D3V3MX-GP

C526

C540

12

SC10U6D3V3MX-GP

UMA_Muxless

R472

R472 0R3J-0-U-G P

0R3J-0-U-G P

DIS

C548

DY

12

SC10U6D3V3MX-GP

1130 -SC

C537

12

SC10U6D3V3MX-GP

DY

SC10U6D3V3MX-GP

C294

12

SC1U6D3V2KX-GP

12

C289

SC1U6D3V2KX-GP

CPU1G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1

J23

VTT1

H25

VTT1

K26

VTT1

J27

VTT1

J26

VTT1

J25

VTT1

H27

VTT1

G28

VTT1

G27

VTT1

G26

VTT1

F26

VTT1

E26

VTT1

E25

VTT1

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

SENSE

AUBURNDALE

GRAPHICS

GRAPHICS VIDs

FDI PEG & DMI

POWER

VAXG_SENSE

VSSAXG_SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

DDR3 - 1.5V RAILS

1.1V1.8V

7 OF 9

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6

GFX_IMON

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6

12

DY

VDDQ 3A for Auburndale VDDQ 6A for Clarksfield

R205

1 2

1KR2J-1-G P

DIS

12

C300

SC1U6D3V2KX-GP

C296

SC1U6D3V2KX-GP

C295

SC1U6D3V2KX-GP

C250

SC1U6D3V2KX-GP

VCC_AXG _SENSE 54 VSS_AXG _SENSE 54

GFX_VR_ EN 54 GFX_DPR SLPVR 54 GFX_IMON 54

12

C302

C297

SC1U6D3V2KX-GP

C569

12

SC10U6D3V3MX-GP

DY

C293

12

SC10U6D3V3MX-GP

DY

+V1.8S_V CCSFR

12

C236

C227

SC1U6D3V2KX-GP

12

SC4D7U6D3V3KX-GP

C306

SC1U6D3V2KX-GP

DY

1D05V_V TT

0.6A

C228

12

SC10U6D3V3MX-GP

GFX_VID[6..0] 54

C299

12

SC10U6D3V3MX-GP

PM_SLP_ S3_CTL13,2 0

C251

12

SC10U6D3V3MX-GP

C301

C307

12

SC10U6D3V3MX-GP

1130 -SC

R147 0R06 03-PADR147 0R06 03-PAD

1 2

12

DY

12

NON-S3

C305

SC10U6D3V3MX-GP

1D8V_S0

R542

1 2

0R3J-0-U-GP

NON-S3

G

S

1D5V_S3

R541

0R3J-0-U-GP

1 2

Q44

. .

2N7002E -1-GP

84.2N702.D31

2ND = 84.2N702.E31

R540

0R3J-0-U-GP

1 2

NON-S3

S3

...

D

S3

1016 -SB

R292

0R3J-0-U-GP

1 2

NON-S3

1D5V_S0 _DDR

12

R543

R543 220R2F-G P

220R2F-G P

PM_SLP_ S3_CTL_D

A A

5

4

3

2

UMA

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

CPU (5/7)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

8 72Friday, January 22, 2010

1

SC

5

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

AR23

VSS

D D

C C

B B

AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2

AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8

AM5

AM2 AL34 AL31 AL23 AL20 AL17 AL12

AL9

AL6

AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9

AH6

AH3

AG10

AF8

AF4

AF2 AE35

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ8

VSS

AJ5

VSS

AJ2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

VSS

3

8 OF 9

AE34

VSS

AE33

VSS

AE32

VSS

AE31

VSS

AE30

VSS

AE29

VSS

AE28

VSS

AE27

VSS

AE26

VSS

AE6

VSS

AD10

AUBURNDALE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

K27

H35 H32 H28 H26 H24 H22 H18 H15 H13 H11

G34 G31 G20

F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11

D33 D30 D26

C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11

A29 A27 A23

CPU1I

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H8

VSS

H5

VSS

H2

VSS VSS VSS VSS

G9

VSS

G6

VSS

G3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E8

VSS

E5

VSS

E2

VSS VSS VSS VSS

D9

VSS

D6

VSS

D3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B8

VSS

B6

VSS

B4

VSS VSS VSS VSS

A9

VSS

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

2

VSS

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

AUBURNDALE

VSS_NCTF#AR34

VSS_NCTF#B34

VSS_NCTF#B2

VSS_NCTF#B1

VSS_NCTF#A35

VSS_NCTF#AT1

VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35 RSVD_NCTF#AR35

RSVD_NCTF#AT3 RSVD_NCTF#AR1 RSVD_NCTF#AP1 RSVD_NCTF#AT2

RSVD_NCTF#C1

RSVD_NCTF#A3 RSVD_NCTF#C35 RSVD_NCTF#B35 RSVD_NCTF#A34 RSVD_NCTF#A33

9 OF 9

AR34 B34 B2

B1 A35 AT1 AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33

TP_MCP_ VSS_NCTF6 TP_MCP_ VSS_NCTF1 TP_MCP_ VSS_NCTF2 TP_MCP_ VSS_NCTF7

1

TP93 AFTE 14P-GPTP93 AFTE 14P-GP

1

TP84 AFTE 14P-GPTP84 AFTE 14P-GP

1

TP92 AFTE 14P-GPTP92 AFTE 14P-GP

1

TP83 AFTE 14P-GPTP83 AFTE 14P-GP

1

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

A A

5

4

3

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

2

Date: Sheet of

CPU (6/7)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

9 72Friday, January 22, 2010

1

SC

5

4

3

2

1

5 OF 9

CPU1E

D D

SO-DIMM VREFDQ (M3) Circuit for Clarksfield Processor

DY

RN18

M_VREF_ DQ_DIMM020 M_VREF_ DQ_DIMM121

C C

B B

A A

1 2 3

SRN0J-10 -GP-U

R679 0R04 02-PADR679 0R04 02-PAD

1 2

R680 0R04 02-PADR680 0R04 02-PAD

1 2

1130 -SC

5

TP33TP AD14-GP TP3 3TPAD14-GP TP22TP AD14-GP TP2 2TPAD14-GP

TP24TP AD14-GP TP2 4TPAD14-GP TP29TP AD14-GP TP2 9TPAD14-GP

TP20TP AD14-GP TP2 0TPAD14-GP TP25TP AD14-GP TP2 5TPAD14-GP TP32TP AD14-GP TP3 2TPAD14-GP TP34TP AD14-GP TP3 4TPAD14-GP TP30TP AD14-GP TP3 0TPAD14-GP TP23TP AD14-GP TP2 3TPAD14-GP TP21TP AD14-GP TP2 1TPAD14-GP TP31TP AD14-GP TP3 1TPAD14-GP TP27TP AD14-GP TP2 7TPAD14-GP TP28TP AD14-GP TP2 8TPAD14-GP

4

H_RSVD9 _R H_RSVD1 0_R

CFG0 CFG1

1

CFG2

1

CFG3 CFG4 CFG5

1

CFG6

1

CFG7 CFG8

1

CFG9

1

CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

1

CFG16

1

CFG17

1

H_RSVD1 7_R H_RSVD1 8_R

CPU1E

AP25

RSVD#AP25

AL25

RSVD#AL25

AL24

RSVD#AL24

AL22

RSVD#AL22

AJ33

RSVD#AJ33

AG9

RSVD#AG9

M27

RSVD#M27

L28

RSVD#L28

J17

SA_DIMM_VREF#

H17

SB_DIMM_VREF#

G25

RSVD#G25

G17

RSVD#G17

E31

RSVD#E31

E30

RSVD#E30

AM30

CFG0

AM28

CFG1

AP31

CFG2

AL32

CFG3

AL30

CFG4

AM31

CFG5

AN29

CFG6

AM32

CFG7

AK32

CFG8

AK31

CFG9

AK28

CFG10

AJ28

CFG11

AN30

CFG12

AN32

CFG13

AJ32

CFG14

AJ29

CFG15

AJ30

CFG16

AK30

CFG17

H16

RSVD_TP#H16

B19

RSVD#B19

A19

RSVD#A19

A20

RSVD#A20

B20

RSVD#B20

U9

RSVD#U9

T9

RSVD#T9

AC9

RSVD#AC9

AB9

RSVD#AB9

J29

RSVD#J29

J28

RSVD#J28

AUBURNF ,CLARKUNF

62.10040.611

2ND = 62.10053.561

3rd = 62.10055.341

4th = 62.10055.321

AUBURNDALE

RESERVED

4

5 OF 9

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF#AR2

RSVD#AJ26 RSVD#AJ27

RSVD#AL28 RSVD#AL29 RSVD#AP30 RSVD#AP32 RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD_TP#E15

RSVD_TP#F15

KEY RSVD#D15 RSVD#C15

RSVD#AJ15 RSVD#AH15

RSVD_TP#AA5 RSVD_TP#AA4

RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2 RSVD_TP#AA2 RSVD_TP#AA1

RSVD_TP#R9

RSVD_TP#AG7

RSVD_TP#AE3

RSVD_TP#V4

RSVD_TP#V5

RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7

RSVD_TP#W3 RSVD_TP#W2

RSVD_TP#N3 RSVD_TP#AE5 RSVD_TP#AD9

VSS

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2 D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

RSVD64_ R

R681 0R04 02-PADR681 0R04 02-PAD

RSVD65_ R

1 2

R682 0R04 02-PADR682 0R04 02-PAD

1 2

1130 -SC

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.

R125

RSVD_VS S

R125

1 2

0R0402-P AD

0113 -1

CFG0

12

R160

R160 3KR2F-GP

3KR2F-GP

DY

SA 0623

CFG3

CFG4

CFG7

3

12

R135

R135 3KR2F-GP

3KR2F-GP

12

R148

R148 3KR2F-GP

3KR2F-GP

DY

12

R141

R141 3KR2F-GP

3KR2F-GP

DY

Processor Strapping

PCI-Express Configuration Select

CFG0

CFG3

CFG4

CFG7 Clarksfield (only for early samples pre-ES1) -

2

1:Single PEG(Default) 0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation(Default) 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port attached to Embedded Display Port (Default) 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG7(Reserved) - Temporarily used for early Clarksfield samples.

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common M/B design (for AUB and CFD), the pull-down resistor shoubl e be used. Does not impact AUB functionality.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (7/7)

HM42-CP

SC

10 72Friday, Janu ary 22, 2010

1

SC

5

ICH_RTCX1

1 2

R482

R482 10MR2J-L -GP

10MR2J-L -GP

X6

1

D D

SC6P50V2CN-1GP

CL = 7pF

4

12

C547

X-32D768 KHZ-34GPU

23

82.30001.661

2nd = 82.30001.B21

ICH_RTCX2

12

C544

C544 SC6P50V 2CN-1GP

SC6P50V 2CN-1GP

ACZ_RST #

ACZ_SYNC

ACZ_BIT_C LK

ACZ_SDA TAOUT

Freq tolertance :+/- 20 ppm

RTC_AUX _S5

1 2

ECT5 SC33P50V2J N-3GP

DY

1 2

ECT7 SC33P50V2J N-3GP

DY

1 2

ECT6 SC33P50V2J N-3GP

DY

1 2

ECT8 SC33P50V2J N-3GP

DY

1202 -SC

ACZ_RST #_AUDIO32 ACZ_SYNC_ AUDIO32 ACZ_BITCL K_AUDIO32 ACZ_SDA TAOUT_AUDIO32

R455 10R2J-2-G PR455 10R2J-2-G P R461 10R2J-2-G PR461 10R2J-2-G P R458 10R2J-2-G PR458 10R2J-2-G P R463 33R2J-2-G PR463 33R2J-2-G P

SIV fail when stuff 10-ohm,

C C

fine tune 33-ohm for solving

12 12 12 12

1117 -SC

ACZ_RST # ACZ_SYNC

ACZ_BIT_C LK

ACZ_SDA TAOUT

33-ohm is required for intel recommend, real value base on fine tune result

NO REBOOT STRAP

3D3V_S0

1 2

DY

R516 1KR 2J-1-GP

No Reboot Strap R23

HDA_SPKR

SA 0709

B B

For after PCH stepping B3,have to DY,

PCH_JTA G_TMS

PCH_JTA G_TDO

PCH_JTA G_TDI

PCH_JTA G_RST#

PCH_JTA G_TMS

PCH_JTA G_TDO

A A

PCH_JTA G_TDI

PCH_JTA G_RST#

PCH_JTA G_TCK

When unused all JTAG pins may be NC

R235 10KR2J-3 -GP

R240 51R2F-2-G P

R515 51R2F-2-G PR515 51R2 F-2-GP

ACZ_SPK R

Low = Default High = No Reboot

1113 -SC

DY

R512

1 2

200R2J-L 1-GP

DY

R509

1 2

200R2J-L 1-GP

DY

R513

1 2

200R2J-L 1-GP

1 2

DY

R511

1 2

100R2J-2 -GP

DY

R510

1 2

100R2J-2 -GP

DY

R514

1 2

100R2J-2 -GP

1 2

DY

1 2

5

3D3V_S5

SPI_CS0#, SPI_M ISO, SPI_MOSI, SPI_CLK: No series resis tor required if routing lengt h is 1.5"-6.5"

PCH Strapping

SPI_MOSI

Enable iTPM: Connect to Vcc3_3 with

8.2-kΩ weak pull-up resistor.

Disable iTPM: Left floating, no pull-down required

3D3V_S0

1 2

R250 8K2R2J-3 -GP

RN55

2 3 1

SRN20KJ -GP-U

SA 0629 RF

PCH_SPI_C S#041

PCH_SPI_M OSI41

PCH_SPI_C LK41

SPI_MOSO_ R41

DY

4

C530

SC1U6D3V2KX-GP

ME_UNLO CK#40

SPI_MOSI_R

12

ACZ_SPK R32

ACZ_SDA TAIN032

PCH_SPI_C S#0

PCH_SPI_M OSI PCH_SPI_C LK

3

RTC_AUX _S5

ACZ_BIT_C LK

ACZ_SYNC

ACZ_RST #

ACZ_SDA TAIN1

HDA_SDIN2

ACZ_SDA TAOUT

8 7 6

HDA_DOC K_EN#

SM_INTRUD ER#

ICH_INTVRMEN

ICH_RTCX1 ICH_RTCX2

ICH_RTCRS T#

SRTCRST #

SM_INTRUD ER#

ICH_INTVRMEN

PCH_JTA G_TCK

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

PCH_JTA G_RST#

SPI_CLK_R

SPI_CS#0_ R

SPI_MOSI_R

SPI_MOSO_ R

D10

3

BAS40CW -GP

83.00040.E81

2nd = 83.00040.M81

3rd = 83.00040.R81

3

INTVRMEN- Integrated SUS

1.1V VRM Enable High - Enable internal VRs

PCH1A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-G P-NF

3D3V_AU X_S5

2

RTC_PW R

1

1 2

R470

R470 1MR2J-1-G P

12

C527

21

G59

G59 GAP-OPEN

GAP-OPEN

TPAD14-G P

1MR2J-1-G P

R475

SC1U6D3V2KX-GP

330KR2F -L-GP

SRTCRST# new signal Pin

TP40TP AD14-GP TP4 0TPAD14-GP

TP38

HM4-CP SA

1 2

1

1130 -SC

R182

1 2

0R0402-P AD

1 2

R187 8K2R2J-3 -GP

DY

0113 -1

RN81

1 2 3 4 5

SRN15J-1 -GP

RTC_AUX _S5 RTC_BAT

1 2

R298 0R 3J-0-U-GPR298 0R3J-0-U-G P

12

C330

C330 SC1U10V 2ZY-GP

SC1U10V 2ZY-GP

RTC_PW R_L

83.00040.Q81 is ROHS parts

83.00040.R81 is Halogens free Part arrange qual in Eng SKU

2

integrated VccS us1_05,VccSus1_ 5,VccCL1_5

INTVRMEN

integrated VccL an1_05VccCL1_05

LAN100_SLP

1 OF 10

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

D33 B33 C32 A32

C34

A34 F34

AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

PCH_GPIO2 3

INT_SERIRQ

SATAICOMP

SATA_LE D#

SATA_DE T#0_R

SATA_DE T#1_R

RTCIHDA

SPI JTAG

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

LDRQ1#/GPIO23

LPC

SATA

SATAICOMPO

SATAICOMPI

SATA0GP/GPIO21

SATA1GP/GPIO19

PCH 1 stuff 71.0IBEX.G0U

RTC1

MLX-CON2 -13-GP

1 2

R297

R297 1KR2J-1-G P

1KR2J-1-G P

1130 -SC

0113 -1

4 2

1 3

20.F1035.002

2nd = 20.F0772.002

3rd = 21.D0300.102

4th = 20.F1729.002

2

1

High=Enable Low=Disable

LPC_LAD 0 40,41 LPC_LAD 1 40,41 LPC_LAD 2 40,41 LPC_LAD 3 40,41

LPC_LFR AME# 40,41

1

TP35 TPAD 14-GPTP3 5 TPAD 14-GP

INT_SERIRQ 16,40

SATA_RX N0 26 SATA_RX P0 26 SATA_TX N0 26 SATA_TX P0 2 6

SATA_RX N4 27 SATA_RX P4 27 SATA_TX N4 27 SATA_TX P4 2 7

1D05V_S 0

1 2

R219

R219 37D4R2F -GP

37D4R2F -GP

SATA_LE D# 16,44

SATA_DE T#0_R

SATA_DE T#1_R

PCH_GPIO4 816

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

PCH_GPIO4 8

PCH (1/9)

HM42-CP

HDD

ODD

RN28

45 3

6

2

7

1

8

SRN10KJ -7GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

11 72Friday, Janu ary 22, 2010

1

3D3V_S0

SC

5

LAN

D D

MINICARD1

MINICARD2

C C

CLK_PCIE_ MINI1#37 CLK_PCIE_ MINI137

MINI1_CLKREQ #37

CLK_PCIE_ MINI2#37

CLK_PCIE_ MINI237

MIN2_CLKR EQ#37

CLK_PCIE_ LAN#30 CLK_PCIE_ LAN30

B B

LAN_CLK REQ#30

PCIE_RXN130 PCIE_RXP13 0 PCIE_TXN130 PCIE_TXP130

PCIE_RXN237 PCIE_RXP23 7 PCIE_TXN237 PCIE_TXP237

PCIE_RXN337

PCIE_RXP33 7 PCIE_TXN337 PCIE_TXP337

R267 0R2J-2-GP

R518 0R2J-2-GP

R529 0R2J-2-GP

PCIE_RXN1 PCIE_RXP1

PCIE_RXN2 PCIE_RXP2

PCIE_CLK_ RQ0#13

R683 0R04 02-PADR683 0R04 02-PAD

1 2

R684 0R04 02-PADR684 0R04 02-PAD

1 2

DY

R685 0R04 02-PADR685 0R04 02-PAD

1 2

R686 0R04 02-PADR686 0R04 02-PAD

1 2

DY

R687 0R0 402-PADR687 0R 0402-PAD

1 2

R688 0R0 402-PADR688 0R 0402-PAD

1 2

DY

TXN1

C198SCD1U10 V2KX-5GP C198SCD1U10 V2KX-5GP

12

TXP1

C197SCD1U10 V2KX-5GP C197SCD1U10 V2KX-5GP

12

TXN2

C219SCD1U10 V2KX-5GP C219SCD1U10 V2KX-5GP

12

TXP2

C223SCD1U10 V2KX-5GP C223SCD1U10 V2KX-5GP

12

TXN3

C216SCD1U10 V2KX-5GP C216SCD1U10 V2KX-5GP

12

TXP3

C221SCD1U10 V2KX-5GP C221SCD1U10 V2KX-5GP

12

PCIE_CLK_ RQ0# PEG_CLK REQ#

CLK_PCH _SRC1_N CLK_PCH _SRC1_P

PCIE_CLK_ RQ1#

CLK_PCH _SRC2_N CLK_PCH _SRC2_P

PCIE_CLK_ RQ2#

CLK_PCH _SRC0_N CLK_PCH _SRC0_P

PCIE_CLK_ RQ3#

1130 -SC

R517

R517 10KR2J-3 -GP

10KR2J-3 -GP

R519

R519 10KR2J-3 -GP

10KR2J-3 -GP

PCIE_CLK_ RQ4#

PCIE_CLK_ RQ5#

PEG_B_C LKRQ#

PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3VALW.

PCIECLKRQ{1,2} should have a 10K pull-up to +1.05VS (But CRB is pull-up to +3VS).

3D3V_S03D3V_S5

R527

R527 10KR2J-3 -GP

10KR2J-3 -GP

DY

A A

1 2

PCIE_CLK_ RQ3# PEG_B_C LKRQ#

R530

R530 10KR2J-3 -GP

10KR2J-3 -GP

1 2

R269

R269 10KR2J-3 -GP

10KR2J-3 -GP

DY

1 2

PCIE_CLK_ RQ1#

12

R268

R268 10KR2J-3 -GP

10KR2J-3 -GP

5

3D3V_S0

DY

1 2

12

PCIE_CLK_ RQ2#

4

PCH1B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-G P-NF

4

3D3V_S5

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N

CLKIN_SATA_P/CKSSCD_P

Clock Flex

RN27

1

8

2

7

3

6

4 5

SRN10KJ -7GP

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N

CLKIN_BCLK_P

CLKIN_DOT_96N

CLKIN_DOT_96P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

PCIE_CLK_ RQ4# PCIE_CLK_ RQ5#

B9

H14

C8

J14

C6

G8

M14

E10

G12

T13

T11

T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

AF38

T45

P43

T42

N50

SB 0812

3

PCH_GPIO1 1

PCH_GPIO6 0

SML0_CL K

SML0_DA TA

PCH_GPIO7 4

KBC_SCL 1

KBC_SDA 1

CL_CLK

CL_DATA

CL_RST#

PEG_CLK REQ#PEG_CLKREQ#

CLK_PCH _PEGA_N CLK_PCH _PEGA_P

CLK_EXP _N CLK_EXP _P

CLKOUT_ DP_N CLKOUT_ DP_P

CLKIN_DMI# CLKIN_DMI

CLK_CPU _BCLK# CLK_CPU _BCLK

DREFCLK # DREFCLK

CLK_PCIE_ SATA# CLK_PCIE_ SATA

CLK_ICH14

CLK_PCI_F B

XTAL25_ IN XTAL25_ OUT

XCLK_RC OMP

CLK48

3

PCH_GPIO1 1 16

SMB_CLK 37

SMB_DAT A 37

PCH_GPIO6 0 16

if use ENE KBC stuff 2.2K-ohm thermal IC will be abnormal

PCH_GPIO7 4 13

KBC_SCL 1 40

KBC_SDA 1 40

1

TP44 TPAD 14-GPTP4 4 TPAD 14-GP

1

TP47 TPAD 14-GPTP4 7 TPAD 14-GP

1

TP49 TPAD 14-GPTP4 9 TPAD 14-GP

1 2

DY

R261 0R2J-2-GP

R689 0R04 02-PADR689 0R04 02-PAD

1 2

R690 0R04 02-PADR690 0R04 02-PAD

1 2

R691 0R04 02-PADR691 0R04 02-PAD

1 2

R692 0R04 02-PADR692 0R04 02-PAD

1 2

4

DY

CLKIN_DMI# 3 CLKIN_DMI 3

CLK_CPU _BCLK# 3 CLK_CPU _BCLK 3

DREFCLK # 3 DREFCLK 3

CLK_PCIE_ SATA# 3 CLK_PCIE_ SATA 3

CLK_ICH14 3

CLK_PCI_F B 15

1 2

R172 90D9R2F -1-GPR172 90D9R2F-1-GP

1 2

R43733R 2J-2-GP R43733R 2J-2-GP

PEX_CLK REQ 62

1130 -SC

1

RN57

23

SRN0J-10 -GP-U

12

C484

DY

SC4D7P50V2CN-1GP

CLK48_C ardreader 36

2

SMB_CLK SMB_DAT A

PCH_SMB DATA3,20,21

CLK_PCIE_ PEG# 62 CLK_PCIE_ PEG 62

PEG_CLK #_R 5 PEG_CLK _R 5

DPLL_RE F_SSCLK# 5 DPLL_RE F_SSCLK 5

1D05V_S 0

2

1

678

1105 -SC

3D3V_S5 3D3V_S0

678

123

SMB_CLK

RN60

RN60 SRN2K2J -2-GP

SRN2K2J -2-GP

4 5

2N7002K DW-GP

2nd = 84.DM601.03F

SRN10KJ -7GP

RN56

123

SML0_CL K

SML0_DA TA KBC_S CL1

1

2

3 4

Q39

84.2N702.A3F

R262

1 2

10KR2J-3 -GP

82.30020.971

SMB_DAT A

6

5

4 5

3D3V_S0

CL = 12pF

Freq tolertance :+/- 30 ppm

XTAL25_ IN

1 2

DIS

R441 0R2J-2-GP

1117 -SC

UMA_Muxless

XTAL25_ IN

X5

R432

XTAL-25M HZ-102-GP

1MR2J-1-G P

UMA_Muxless

XTAL25_ OUT

UMA_Muxless

1MR2J-1-G P

82.30020.851

2nd = 82.30020.791

1 2

0R2J-2-GP

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

XTAL25_ OUT_R

UMA_Muxless

3rd = 82.30020.A31

R440

PCH (2/9)

HM42-CP

12

UMA_Muxless

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

3D3V_S5

KBC_SDA 1

PCH_SMB CLK 3,20,21

C486

12

SC12P50 V2JN-3GP

C485

12

SC12P50 V2JN-3GP

12 72Friday, Janu ary 22, 2010

SB 0812

SC

5

D D

1D05V_S 0

1 2

1214 -SC

R464 49 D9R2F-GPR464 49 D9R2F-GP

Current 0.1uF 0402 10V X7R

1 2

DY

0R2J-2-GP

1 2

CORE_PW RGD_1

RUNPW ROK_1

R256

PM_PW ROK45

CORE_PW RGD45,47

RUNPW ROK39

R256

R255 0R04 02-PADR255 0R04 02-PAD

R534 0R04 02-PADR534 0R04 02-PAD

0113 -1

C C

R254 10KR2J-3 -GPR254 10KR2J-3-G P

ALL_PW RGD45,47,50,5 1,52

PM_DRAM _PWRGD5

SUS_PW R_DN_ACK40

PM_PW RBTN#40,59

Q32

2N7002K DW-GP

12

1

DY

2

AC_PRES ENT4 0

34

2

1

3D3V_S5

DY

12

R459

R459 10KR2J-3 -GP

10KR2J-3 -GP

12

R460

1008 -SA

B B

A A

RSMRST# _KBC40

3D3V_AU X_S5

12

R450

R450 10KR2J-3 -GP

10KR2J-3 -GP

51123_P GOOD_2

84.2N702.A3F

2ND = 84.DM601.03F

R465

1KR2F-3-G P

D19

3

BAT54PT -GP

83.00054.T81

2ND = 83.BAT54.D81

3rd = 83.00054.S81

5

6

previous 0.1uF 0402 16V X7R

VCC

5

4

Y

12

3D3V_S5

ALL_PW RGD

PM_DRAM _PWRGD

1 2

R449

100KR2J -1-GP

U45

1

B

2

A

3

GND

74LVC1G 08GW-1-GP

73.01G08.L04

2ND = 73.7SZ08.DAH

1 2

PM_RSMR ST#

100KR2J-1-GP

4

DMI_RXN04 DMI_RXN14 DMI_RXN24 DMI_RXN34

DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34

DMI_TXN04 DMI_TXN14 DMI_TXN24 DMI_TXN34

DMI_TXP04 DMI_TXP14 DMI_TXP24 DMI_TXP34

DMI_IRCOMP_R

C578

DY

1 2

SCD1U10 V2KX-5GP

PM_PW ROK_1

R244 0R0 402-PADR244 0R 0402-PAD

1 2

R257 0R2J-2-GP

1 2

R221 10KR2J-3 -GPR221 10KR2J-3 -GP

1130 -SC

R531 0R 0402-PADR531 0R0402-PAD

R253 0R 0402-PADR253 0R0402-PAD

R252 0R 0402-PADR252 0R0402-PAD

51123_P GOOD 49

4

DY

PCIE_CLK_ RQ0#12

3D3V_S0

12

R270

R270 10KR2J-3 -GP

10KR2J-3 -GP

PM_SYSRST #_R

ME_PW ROK

LAN_RST #1

PM_RSMR ST#

SUS_PW R_DN_ACK_R

PM_PW RBTN#_R

AC_PRESENT_R

PCH_GPIO7 2

PM_RI#

PM_CLKR UN#

BC24

BJ22

AW20

BJ20

BD24 BG22 BA20 BG20

BE22

BF21 BD20 BE18

BD22 BH21 BC20 BD18

BH25

BF25

T6

M6

B17

K5

A10

D9

C16

M1

P5

P7

A6

F14

AC_PRES ENT_R PCIE_CLK_ RQ0# PM_RI#

1 2

R520

R520 8K2R2J-3 -GP

8K2R2J-3 -GP

PCH1C

DMI0RXN DMI1RXN DMI2RXN DMI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP

DMI_IRCOMP

SYS_RESET#

SYS_PWROK

PWROK

MEPWROK

LAN_RST#

DRAMPWROK

RSMRST#

SUS_PWR_DN_ACK/GPIO30

PWRBTN#

ACPRESENT/GPIO31

BATLOW#/GPIO72

RI#

IBEXPEAK-M-G P-NF

RN31

1 2 3 4 5

SRN10KJ -7GP

8 7 6

3D3V_S0

3

3 OF 10

BA18

FDI_RXN0

BH17

FDI_RXN1

BD16

FDI_RXN2

BJ16

FDI_RXN3

BA16

FDI_RXN4

BE14

FDI_RXN5

BA14

FDI_RXN6

BC12

FDI_RXN7

BB18

FDI_RXP0

BF17

FDI_RXP1

BC16

FDI_RXP2

BG16

FDI_RXP3

AW16

FDI_RXP4

BD14

FDI_RXP5

BB14

FDI_RXP6

BD12

FDI_RXP7

BJ14

FDI_INT

BF13

BH13

BJ12

BG14

J12

WAKE#

Y1

P8

F3

E4

H7

SLP_S4#

P12

SLP_S3#

K8

SLP_M#

N2

TP23

BJ10

PMSYNCH

F6

PCH_GPIO7 4 PM_PW RBTN#_R PCH_GPIO1 2 SUS_PW R_DN_ACK_R

PCH_GPIO7 2

PCIE_W AKE#

PM_CLKR UN#

PM_SUS_ STAT#

PM_SUS_ CLK

PM_SLP_ S5#

PM_SLP_ S4#_R

PM_SLP_ S3#_R

PM_SLP_ M#_R

PM_SLP_ DSW#

H_PM_SYNC

PM_SLP_ LAN#

SRN10KJ -7GP

R526 8K2R2J-3 -GPR526 8K2R2J-3-G P

RN62

1 2 3 4 5

1 2

12

R259 10KR 2J-3-GPR2 59 10KR 2J-3-GP

1

8 7 6

System Power Management

PCH_GPIO7 412

PCH_GPIO1 216

DMI

FDI

DMI

FDI

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_LAN#/GPIO29

3D3V_S5

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

HM42-CP NV Muxless 0917

change pull up 1K to 10K for Intel suggestion

3

2

FDI_TXN0 4 FDI_TXN1 4 FDI_TXN2 4 FDI_TXN3 4 FDI_TXN4 4 FDI_TXN5 4 FDI_TXN6 4 FDI_TXN7 4

FDI_TXP0 4 FDI_TXP1 4 FDI_TXP2 4 FDI_TXP3 4 FDI_TXP4 4 FDI_TXP5 4 FDI_TXP6 4 FDI_TXP7 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

PCIE_W AKE# 30,37

PM_CLKR UN# 40

TP48 TPAD 14-GPTP4 8 TPAD 14-GP

PM_SUS_ CLK 39,40

TP55 TPAD 14-GPTP5 5 TPAD 14-GP

R243 0R 0402-PADR243 0R0402-PAD

1 2

R275 0R 0402-PADR275 0R0402-PAD

1 2

R245 0R0 402-PADR245 0R0 402-PAD

1 2

TP89 TPAD 14-GPTP8 9 TPAD 14-GP

TP54 TPAD 14-GPTP5 4 TPAD 14-GP

3D3V_S5

2

1

HM42-CP NV Muxless 0918

1130 -SC

PM_SLP_ S4# 40 ,50,52

PM_SLP_ S3# 4 0,45,51,52

PM_SLP_ M# 40

H_PM_SYNC 5

3D3V_S5

12

R273

S3

10KR2J-3 -GP

1016 -SB

Q15

. .

PM_SLP_ S3#

SB 0814

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

. .

G

...

S3

S

2N7002E -1-GP

84.2N702.D31

2ND = 84.2N702.E31

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH (3/9)

HM42-CP

10KR2J-3 -GP

D

13 72Friday, Janu ary 22, 2010

1

PM_SLP_ S3_CTL 8,20

SC

5

D D

3D3V_S0

RN12

1 2 3

SRN10KJ -5-GP

UMA_Muxless

LCTL_CL K CLK_DDC _EDID

4

LCTL_DA TA

HM42-CP NV_Muxless SA

R181

1 2

2K4R2F-G P

UMA_Muxless

LIBG

Muxless->64.23715.6DL,UMA-2.4K

R175

LVDS_VR EF

1 2

0R2J-2-GP

C C

SB 0811

B B

UMA_Muxless

RN8

8 7 6

SRN150F -1-GP

UMA_Muxless

0R2J-2-GP

1 2 3 45

PCH_BLU E

PCH_GRE EN

PCH_RED

4

PCH_BL_ ON22

PCH_LCD VDD_ON23

CLK_DDC _EDID22 DAT_DDC _EDID22

PCH_TXA CLK-2 2 PCH_TXA CLK+22

PCH_TXA OUT0-22 PCH_TXA OUT1-22 PCH_TXA OUT2-22

PCH_TXA OUT0+22 PCH_TXA OUT1+22 PCH_TXA OUT2+22

PCH_BLU E22 PCH_GRE EN22 PCH_RED22

PCH_DDC CLK24 PCH_DDC DATA24

PCH_HSYNC24 PCH_VSYNC24

L_BKLTC TL23

TP26TPA D14-GP TP26T PAD14-GP

1 2

R130

R130 1KR2D-1-G P

1KR2D-1-G P

1K 0.5% ohm

DAT_DDC _EDID

LCTL_CL K LCTL_DA TA

LIBG L_LVBG

1

LVDS_VR EF

CRT_IREF

PCH1D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-G P-NF

3

4 OF 10

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

PCH_HDM I_DATA2-_L

BD42

PCH_HDM I_DATA2+_L

BC42

PCH_HDM I_DATA1-_L

BJ42

PCH_HDM I_DATA1+_L

BG42

PCH_HDM I_DATA0-_L

BB40

PCH_HDM I_DATA0+_L

BA40

PCH_HDM I_CLK-_L

AW38

PCH_HDM I_CLK+_L

BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

CRT

2

1014 -SA

PCH_HDM I_CLK 25 PCH_HDM I_DATA 25

PCH_HDM I_DETECT 25

1 2

C700 SCD 1U10V2KX-5GP

1 2

C703 SCD 1U10V2KX-5GPC7 03 SCD1U10V2K X-5GP

1 2

C696 SCD 1U10V2KX-5GPC6 96 SCD1U10V2K X-5GP

1 2

C697 SCD 1U10V2KX-5GPC6 97 SCD1U10V2K X-5GP

1 2

C701 SCD 1U10V2KX-5GPC7 01 SCD1U10V2K X-5GP

1 2

C702 SCD 1U10V2KX-5GPC7 02 SCD1U10V2K X-5GP

1 2

C698 SCD 1U10V2KX-5GPC6 98 SCD1U10V2K X-5GP

1 2

C699 SCD 1U10V2KX-5GPC6 99 SCD1U10V2K X-5GP

UMA_Muxless_HDMI

HDMI_DATA 2- 2 5,65 HDMI_DATA 2+ 2 5,65 HDMI_DATA 1- 2 5,65 HDMI_DATA 1+ 2 5,65 HDMI_DATA 0- 2 5,65 HDMI_DATA 0+ 2 5,65 HDMI_CLK- 25,65 HDMI_CLK+ 25,65

1

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

PCH (4/9)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

14 72Friday, Janu ary 22, 2010

1

SC

5

RN54

PCI_STOP#

PCI_IRDY#

INT_PIRQD#

INT_PIRQG#

3D3V_S0

D D

RN54

1 2 3 4 5 6

SRN8K2J -2-GP-U

10 9 8 7

PCI_PLOCK #

3D3V_S0

PCI_DEVSE L# PCI_FRAME # PCI_TRDY#

These pins are left as NC, because the function is disable.

HM42 NV Muxless SA 0925

1209 -SC

3D3V_S0

1 2

R443 8K2 R2J-3-GPR 443 8K2R2J-3-GP

1 2

R434 8K2 R2J-3-GPR 434 8K2R2J-3-GP

1 2

R438 8K2 R2J-3-GPR 438 8K2R2J-3-GP

3D3V_S0

1 2

R442 8K2 R2J-3-GPR 442 8K2R2J-3-GP

1 2

R126 8K2 R2J-3-GPR 126 8K2R2J-3-GP

1 2

R433 8K2 R2J-3-GPR 433 8K2R2J-3-GP

1 2

R436 8K2 R2J-3-GPR 436 8K2R2J-3-GP

C C

3D3V_S0

PCI_GNT0#

PCI_GNT1#

RN13

1 2 3 4 5

SRN8K2J -4-GP

1 2

DY

R136 1KR2J-1-G P

1 2

DY

R152 1KR2J-1-G P

8 7 6

PCH strapping

BOOT BIOS Strap

floating 0

B B

PCI_GNT#1

1

0

A A

GNT#1 BOOT BIOS Locat ionGNT#0

0 0 LPC

01 Reserved

floatingfloating

Default (internal pull up) Configures DMI for ESI compatible operation (Not for Mobile platform)

PCI_PLTRS T#

5

PCI_REQ1# INT_PIRQB# PCI_REQ3#

INT_PIRQH# PCI_PERR# PCI_REQ0# INT_PIRQF#

INT_PIRQC# INT_PIRQE# INT_PIRQA# PCI_SERR#

PCI

SPI(Default)

PCLK_FW H41 CLK_PCI_F B12 CLK_PCI_K BC40

USE SPI

1

2

3

74LVC1G 08GW-1-GP

73.01G08.L04

2ND = 73.7SZ08.DAH

1 2

R260 0R2 J-2-GPR260 0R2 J-2-GP

HM42 NV Muxless SA 0924

TP103TPAD14-G P TP103TPAD14-G P

TP67TP AD14-GP TP6 7TPAD14-GP

1016 -SB

SB 0810

R439 22R2J-2-G PR439 22R2J-2-G P

1 2

R121 22R2J-2-G PR121 22R2J-2-G P

1 2

R143 47R2J-2-G PR143 47R2J-2-G P

1 2

TP18TP AD14-GP TP1 8TPAD14-GP TP19TP AD14-GP TP1 9TPAD14-GP

3D3V_S5

U8

B

A

GND

5

VCC

DY

4

Y

4

3D3V_S0

12

R153

R153 10KR2J-3 -GP

10KR2J-3 -GP

dGPU_SE LECT#

1

dGPU_PW M_SELECT#

1

TP50TP AD14-GP TP5 0TPAD14-GP

1 1

C304

DY

12

SCD1U10 V2KX-5GP

PLT_RST #

4

1

CLK_PCI_S IO_R CLK_PCI_F B_R CLK_PCI_K BC_R CLK_PCI_3 CLK_PCI_4

PCLK_FW H

12

R276

R276 100KR2J -1-GP

100KR2J -1-GP

DY

H40 N34 C44 A38 C36

J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43

J36 K48 F40 C42 K46 M51

J52 K51

L34 F42

J40 G46 F44 M47 H36

J50 G42 H47

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1#

PCI_REQ3#

PCI_GNT0# PCI_GNT1#

PCI_GNT3#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

PCI_SERR# PCI_PERR#

PCI_IRDY#

PCI_DEVSE L# PCI_FRAME #

PCI_PLOCK #

PCI_STOP# PCI_TRDY#

ICH_PME#

PCI_PLTRS T#

G34

G38 H51 B37 A44

F51 A46 B45 M53

F48 K45 F36 H53

B41 K53 A36 A48

E44 E50

A42 H44 F46 C46

D49

D41 C48

N52 P53 P46 P51 P48

M7

DY

1204 -SC Near R439

PLT_RST # 5,30,3 6,37,40,41,45,59,6 2

PCH1E

AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

C/BE0# C/BE1# C/BE2# C/BE3#

PIRQA# PIRQB# PIRQC# PIRQD#

REQ0# REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54

GNT0# GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

K6

PCIRST#

SERR# PERR#

IRDY# PAR DEVSEL# FRAME#

PLOCK#

STOP# TRDY#

PME#

D5

PLTRST#

CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4

IBEXPEAK-M-G P-NF

1 2

EC90 SC22P50 V2JN-4GP

3

5 OF 10

AY9

NV_CE#0

BD1

NV_CE#1

AP15

NV_CE#2

BD8

NV_CE#3

AV9

NV_DQS0

BG8

NV_DQS1

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3

NV_ALE

AY6

NV_CLE

AU2

AV7

NV_RB#

AY8 AY5

AV11 BF5

H18

USBP0N

J18

USBP0P

A18

USBP1N

C18

USBP1P

N20

USBP2N

P20

USBP2P

J20

USBP3N

L20

USBP3P

F20

USBP4N

G20

USBP4P

A20

USBP5N

C20

USBP5P

M22

USBP6N

N22

USBP6P

B21

USBP7N

D21

USBP7P

H22

USBP8N

J22

USBP8P

E22

USBP9N

F22

USBP9P

A22

USBP10N

C22

USBP10P

G24

USBP11N

H24

USBP11P

L24

USBP12N

M24

USBP12P

A24

USBP13N

C24

USBP13P

B25

D25

USBRBIAS

N16 J16 F16 L16 E14 G16 F12 T15

1 2

DY

R435 4K7R2J-2 -GP

PCI

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11

NVRAM

NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USB

USBRBIAS#

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

PCI_GNT3#

PCH strapping

A16 swap overri de Strap/Top-Bl ock Swap Override j umper

PCI_GNT#3 Low = A16 swap

3

override/Top-Bl ock Swap Override e nabled High = Default

2

These pins are left as NC, because the function is disable.

NV_ALE NV_CLE

NV_RCOM P

USB_RBIAS _PN

1 2

R237

R237 32D4R2F -GP

32D4R2F -GP

DY

R467

R467 22D6R2F -L1-GP

22D6R2F -L1-GP

USB_OC# 1 USB_OC# 2 USB_OC# 3

USB_OC# 5 USB_OC# 6 USB_OC# 7

1 2

USB_OC# 0 29

USB_OC# 4 29

USBPN0 29 USBPP0 29 USBPN1 29 USBPP1 29

USBPN3 37 USBPP3 37

USBPN4 23 USBPP4 23

USBPN8 37 USBPP8 37 USBPN9 29 USBPP9 29

USBPN11 28 USBPP11 28 USBPN12 37 USBPP12 37 USBPN13 36 USBPP13 36

-SA 1001

2

PCH strapping

NV_CLE

floating internal pull-up

NV_ALE

1

floating

DMI termination voltage

Enable Anti-Theft Tech

Disable (internal pull-down)

DMI Termination Voltage

NV_CLE Set to Vss when low.

Set to Vcc when high.

USB

HM42-CP SA

Pair

USB_OC# 5 USB_OC# 1 USB_OC# 0 USB_OC# 7

USB_OC# 6 USB_OC# 3 USB_OC# 2 USB_OC# 4

Device

0

USB3

USB2

1

NC

2

3

MINICARD1(WLAN)

4 WECAM

NC

5

6

NC

7

NC

3G SIM Card

8

USB1(HS)

9

10

NC

11

Blue Tooth

1213MINIC2(3G)

Cardreader

8 7 6

1006 -SA swap net

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

3D3V_S5

RN16

1 2 3 45

SRN10KJ -6-GP

3D3V_S5

RN24

1 2 3 45

SRN10KJ -6-GP

PCH (5/9)

HM42-CP

1

+V_NVRA M_VCCQ

12

R229

R229 1KR2J-1-G P

1KR2J-1-G P

DY

NV_CLE

+V_NVRA M_VCCQ

12

R231

R231 1KR2J-1-G P

1KR2J-1-G P

DY

NV_ALE

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

15 72Friday, Janu ary 22, 2010

1

SC

GPIO8 has a weak[20K] internal pull up. No need to have external pull down/up. GPIO8 pin set to high at reset .

GPIO15 has a weak[20K] internal pull down. No need to have extern al pull up/down. GPIO 15 pin is set to low at reset. Low : ME Crypto TLS with no confide ntiality High : ME Crypto TLS with confidentiality

D D

GPIO27 has a weak[20K] internal pull up. To enable on-die PLL Vo ltage regurator, should not place externa l pull down.

PCH_GPIO1 112

PCH_GPIO6 012

5

PCH_GPIO1 1 EC_SW I# PCH_GPIO6 0 PCH_GPIO2 8

EC_SCI#40

EC_SW I#40

HM42-CP_NV _Muxless SA

3D3V_S5

RN30

45 3

6

2

7

1

8

SRN10KJ -7GP

PCH_GPIO1 213

DGPU_HO LD_RST#62

DGPU_PW ROK55,61 ,62

DGPU_PW R_EN#61

HM42-CP NV_Muxless SA

PCH_GPIO4 5

C C

B B

SATA_LE D#11,44

INT_SERIRQ11,40

SB 0819

GAP-OPEN

21

STP_PCI# PCH_GPIO2 2 PCH_GPIO0 dGPU_ED ID

3D3V_S0

PCH_GPIO3 5

PCH_GPIO1 5

PSW_ CLR#

G111

SATA_LE D# PCH_GPIO3 9

INT_SERIRQ

PSW_ CLR#

1 2 3 4 5 6

HM42-CP_NV _Muxless SA

3D3V_S0 3D3V_S0

R263

DY

1 2

R263 10KR2J-3 -GP

10KR2J-3 -GP

DGPU_PW R_EN#

R264

R264 10KR2J-3 -GP

10KR2J-3 -GP

5

A A

1 2

R508 8K2 R2J-3-GPR 508 8K2R2J-3-GP

1 2

R266 1KR2J-1-G PR266 1KR2J-1-G P

RN29

6 7 8

SRN10KJ -7GP

RP1

SRN10KJ -L3-GP

1 2

DY

10 9 8 7

R26510K R2J-3-GP R2 6510K R2J-3-GP

R532

R532 10KR2J-3 -GP

10KR2J-3 -GP

1 2

DGPU_HO LD_RST#

R533

R533 10KR2J-3 -GP

10KR2J-3 -GP

1 2

1016 -SB

SB 0814

SB 0722

3D3V_S0

45 3 2 1

3D3V_S0

EC_SMI# EC_SCI#

PX_HDMI#

H: No SG function L: SG Support

DIS_UMA

TP36TP AD14-GP TP3 6TPAD14-GP

TP46TP AD14-GP TP4 6TPAD14-GP

TP45TP AD14-GP TP4 5TPAD14-GP

TP56TP AD14-GP TP5 6TPAD14-GP

TP105TPAD14-G P TP105TPAD14-G P

PCH_GPIO4 811

3D3V_S0

1 2

dGPU_PR SNT#

Muxless

1 2

4

TP80AFTE14P-G P TP80AFTE14P-G P TP88AFTE14P-G P TP88AFTE14P-G P

TP87AFTE14P-G P TP87AFTE14P-G P

TP82AFTE14P-G P TP82AFTE14P-G P

R224

R224 10KR2J-3 -GP

10KR2J-3 -GP

R225

R225 10KR2J-3 -GP

10KR2J-3 -GP

4

PCH_GPIO0

EC_SMI#

PX_HDMI#

1

EC_SCI#

EC_SW I#

PCH_GPIO1 2

PCH_GPIO1 5

DGPU_HO LD_RST#

DGPU_PW ROK

PCH_GPIO2 2

PCH_GPIO2 4

1

PCH_GPIO2 7

1

PCH_GPIO2 8

1

STP_PCI#

PCH_GPIO3 5

DGPU_PW R_EN#

dGPU_PR SNT#

dGPU_ED ID

1

PCH_GPIO3 9

PCH_GPIO4 5

RST_GAT E

PCH_GPIO4 8

PSW_ CLR#

PCH_GPIO5 7

PCH_TP9 5

1

PCH_TP9 6

1

PCH_TP9 7

1

PCH_TP9 8

1

SB 0812

PCH1F

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/GPIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

B4

VSS_NCTF_8

B52

VSS_NCTF_9

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

D2

VSS_NCTF_28

A4

VSS_NCTF#A4

A49

VSS_NCTF#A49

A5

VSS_NCTF#A5

A50

VSS_NCTF#A50

A52

VSS_NCTF#A52

A53

VSS_NCTF#A53

B2

VSS_NCTF#B2

B53

VSS_NCTF#B53

BE1

VSS_NCTF#BE1

BE53

VSS_NCTF#BE53

BF1

VSS_NCTF#BF1

BF53

VSS_NCTF#BF53

BH1

VSS_NCTF#BH1

BH53

VSS_NCTF#BH53

BJ1

VSS_NCTF#BJ1

BJ2

VSS_NCTF#BJ2

BJ4

VSS_NCTF#BJ4

BJ49

VSS_NCTF#BJ49

BJ5

VSS_NCTF#BJ5

BJ50

VSS_NCTF#BJ50

BJ52

VSS_NCTF#BJ52

BJ53

VSS_NCTF#BJ53

D1

VSS_NCTF#D1

D53

VSS_NCTF#D53

E1

VSS_NCTF#E1

E53

VSS_NCTF#E53

IBEXPEAK-M-G P-NF

3D3V_S5

UMA_Muxless

R239

R239 10KR2J-3 -GP

10KR2J-3 -GP

1 2

PCH_GPIO5 7

R238

R238 10KR2J-3 -GP

10KR2J-3 -GP

DIS

1 2

MISC

GPIO

CPU

NCTF

RSVD

NCTF TEST PIN:

A4,A49,A5,A50,A52,A53,B2,B53,BE1,

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53

NCTF TEST PIN:

A4,A49,A5,A50,A52,A53,B2,B53,BE1,

BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,

BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53

UMA_DISCRETE# Optimus: HIGH UMA: HIGH DIS ONLY: LOW

3

6 OF 10

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

A20GATE

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

3

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

AH45 AH46

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

BCLK_CP U_N_R

BCLK_CP U_P_R

PCH_THE RMTRIP_R

INIT3_3V#

2 3 1

10KR2F-2 -GP

RST_GAT E

1

2

KA20GAT E 40

4

H_PECI 5

KBRCIN# 40

H_PW RGD 5,59

3D3V_S5

12

R272

S3

12

TP52 TPAD 14-GPTP5 2 TPAD 14-GP

2

1 2

R236

R236 56R2J-4-G P

56R2J-4-G P

BCLK_CP U_N 5 BCLK_CP U_P 5

SRN0J-10 -GP-U

SRN0J-10 -GP-U RN58

RN58

1 2

DY

R230

R230 54D9R2F -L1-GP

54D9R2F -L1-GP

Placed Within 2 " from PCH

1D5V_S3

12

S3

0121 -1

D

.

S3

.

. .

.

. .

G

S3

C298

C298 SCD047U 25V2KX-GP

SCD047U 25V2KX-GP

S3

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

1D05V_V TT

R279

R279 1KR2F-3-G P

1KR2F-3-G P

2ND = 84.2N702.E31

84.2N702.D31

2N7002E -1-GP

2N7002E -1-GP Q14

Q14

S

12

R277

R277 100KR2F -L1-GP

100KR2F -L1-GP

PCH (6/9)

HM42-CP

1

PM_THRM TRIP-A# 5,4 5

DDR3_DR AMRST# 20,21

NON-S3

12

R278

R278 0R2J-2-GP

0R2J-2-GP

SM_DRAM RST# 5

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

16 72Friday, Janu ary 22, 2010

1

SC

5

4

3

2

1

1014 -SA

R671

3D3V_S0 _DAC

1 2

C467

1 2

0R2J-2-GP

DIS

Imax = 300 mA

U33

UMA_Muxless

VIN GND EN3NC#4

G9091-33 0T11U-GP

74.09091.J3F

2ND = 74.09198.G7F

R246

R246 0R0603-P AD

0R0603-P AD

VOUT

DIS

R185

1 2

0R3J-0-U-G P

R192

1 2

0R3J-0-U-G P

DIS

3D3V_S01D8V_S0

12

5

4

DY

0R3J-0-U-G P

0R3J-0-U-G P R247

R247

3D3V_S0 _DAC

UMA_Muxless

C469

SC1U16V3ZY-GP

12

DY

1130 -SC

12

C468

SC22U6D3V5MX-2GP

1D05V_S 0

1.432A

12

C270

C261

SC10U6D3V3MX-GP

SC1U6D3V2KX-GP

+1.05VS_ VCCAPLL_EXP

12

C518

DY

12

C224

SC1U6D3V2KX-GP

12

C225

SCD1U10V2KX-5GP

12

C238

C240

SC1U6D3V2KX-GP

SC10U6D3V3MX-GP

12

C273

SC1U6D3V2KX-GP

357mA

VCCAFDI_V RM

+1.05VS_ VCCAPLL_FDI

SC10U6D3V3MX-GP

D D

1D05V_S 0

42mA

1D05V_S 0

C C

1D05V_S 0

B B

TC17

ST220U2D5VBM-2GP

3.062A

12

DY

1D05V_S 0

12

C256

1 2

L16

L16 IND-1UH-2-GP

IND-1UH-2-GP

DY

SC10U6D3V3MX-GP

1 2

L15

L15 IND-1UH-2-GP

IND-1UH-2-GP

12

C226

SC10U6D3V3MX-GP

DY

12

DY

1130 -SC

12

C243

SC1U6D3V2KX-GP

3D3V_S0

C538

12

SC10U6D 3V3MX-GP

12

C185

C253

SC1U6D3V2KX-GP

DY

12

C241

SC1U6D3V2KX-GP

DY

12

C237

SC1U6D3V2KX-GP

PCH1G

AB24 AB26 AB28 AD26 AD28

AF26 AF28 AF30

AF31 AH26 AH28 AH30 AH31

AJ30

AJ31

AK24

BJ24

AN20 AN22 AN23 AN24 AN26 AN28

BJ26

BJ28

AT26

AT28 AU26 AU28 AV26 AV28

AW26 AW28

BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27

AN30 AN31

AN35

AT22

BJ18

AM23

IBEXPEAK-M-G P-NF

VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE VCCCORE

VCCIO

VCCAPLLEXP

VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO

VCCIO VCCIO

VCC3_3

VCCVRM[1]

VCCFDIPLL

VCCIO

POWER

VCC CORE

DMI

PCI E*

NAND / SPI

FDI

CRTLVDS

HVCMOS

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

AE50

AE52

AF53

AF51

AH38

AH39

AP43 AP45 AT46 AT45

AB34

UMA_Muxless

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

+VCCA_D AC_1_2

12

R112

R112 0R2J-2-GP

0R2J-2-GP

DY

+3VS_VC CA_LVD

SCD01U16V2KX-3GP

12

C192

357mA

12

C220

SCD1U10V2KX-5GP

SB 0811

196mA

12

C282

12

C286

C286 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

85mA

12

C287

C287 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

12

1 2

R186

R186 0R3J-0-U-G P

0R3J-0-U-G P

+1.8VS_V CCTX_LVDS

SCD01U16V2KX-3GP

12

C196

UMA_Muxless

3D3V_S0

+1.1VS_V CC_DMI

SC1U6D3 V2KX-GP

156mA

VCCME3_ 3

12

C175

C174

SCD01U50V2KX-1GP

300mA

UMA_Muxless

C215

12

SC10U6D3V3MX-GP

DY

1D5V_S0 _1D8V_S0

0R0603-P AD

1 2

R222 0R3J -0-U-GP

+V_NVRA M_VCCQ

0R0603-P AD

1 2

R248

1130 -SC

R220

1130 -SC

0R0603-P AD

1 2

12

C181

SCD1U10V2KX-5GP

SC10U6D3V3MX-GP

DY

3D3V_S0

1 2

R198

R198 0R3J-0-U-G P

0R3J-0-U-G P

UMA_Muxless

61mA

DY

VCCPNAND which power the DC NAND interface must be powered even if dual channel NAND interface is not connected since it also supplies power to other functions inside PCH.

3D3V_S0

3D3V_S0 _DAC 3D3V_S0

1D8V_S0

69mA

5V_S0

UMA_Muxless

SC1U16V3ZY-GP

12

R115

59mA

SB 0811

+3VS_VC CA_LVD

+1.8VS_V CCTX_LVDS

1D05V_V TT

1D05V_S 0

1130 -SC

0113 -1

VCCAFDI_V RM

A A

5

1D8V_S0

1D5V_S0

4

R214

1 2

0R0603-P AD

R202

1 2

0R0603-P AD

1 2

DY

R212

R212 0R3J-0-U-G P

0R3J-0-U-G P

1D5V_S0 _1D8V_S0

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet

Date: Sheet of

3

2

Date: Sheet of

PCH (7/9)

HM42-CP

Taipei Hsien 221, Taiwan, R.O.C.

of

17 72Friday, Janu ary 22, 2010

1

SC

5

1D05V_S 0 +1.05VS_ VCCA_CLK

52mA

1D05V_S 0

R213 0R2J-2-GP

D D

VccLAN may be grounded if Intel LAN is disabled

HM42-CP SA

1D05V_S 0

C C

B B

A A

L8

1 2

IND-10UH-21 5-GP

SC10U6D 3V3MX-GP

68.1001D.10E

2ND = 68.10010.10T

L9

1 2

IND-10UH-21 5-GP

68.1001D.10E

2ND = 68.10010.10T

3D3V_S5

SCD1U10 V2KX-5GP

5

R213 0R2J-2-GP

1D05V_S 0

SC10U6D 3V3MX-GP

Inductance:10uH current :125mA

+1.05VS_ VCCA_A_DPL

C187

12

DY

+1.05VS_ VCCA_B_DPL

C188

12

DY

SC10U6D 3V3MX-GP

1D05V_S 0

SC1U6D3 V2KX-GP

C242

1D05V_V TT

L7

1 2

DY

IND-10UH-30 -GP

1 2

DY

0R0402-P AD

1130 -SC

12

C182

SC1U6D3 V2KX-GP

12

C183

SC1U6D3V2KX-GP

C257

SCD1U10 V2KX-5GP

12

3D3V_S0

0R0603-P AD

1 2

R218

SC4D7U6 D3V3KX-GP

1130 -SC

RTC_AUX _S5

0R0603-P AD

1 2

R223

SCD1U10 V2KX-5GP

R217

1 2

C248

12

SCD1U10 V2KX-5GP

12

SC1U6D3 V2KX-GP

12

C281

163mA

C265

C262

1.849A

C235

12

SC10U6D3V3MX-GP

68mA 69mA

C244

12

C284

4

12

C176

DY

+1.05VS_ VCCLAN

12

SC1U6D3V2KX-GP

DY

C258

SC1U10V 2KX-1GP

12

C285

+1.05VS_ VCCA_A_DPL

+1.05VS_ VCCA_B_DPL

12

SC1U6D3 V2KX-GP

+VCCSST

12

C278

C278 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

0111 -1

1mA

SCD1U10V2KX-5GP

12

C280

DY

2mA

12

C283

C283 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

4

SC1U10V2KX-1GP

12

C177

SC10U6D3V3MX-GP

DY

DCPSUSB YP

12

C272

SCD1U10V2KX-5GP

12

C266

SC1U6D3V2KX-GP

12

DY

+VCCRTC EXT

1D5V_S0 _1D8V_S0

12

C271

+1.1VALW _INT_VCCSUS

C269

C269 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

+1.1VS_P CH_CPU_IO

12

C277

SCD1U10 V2KX-5GP

+1.1VS_P CH_VCCRTC

PCH1J

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M-G P-NF

POWER

USB

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

CPU

RTC PCI/GPIO/LPC

3

10 OF 10

V24

VCCIO VCCIO VCCIO VCCIO

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

VCCIO

V5REF_SUS

V26 Y24 Y26

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

12

C247

SC1U6D3 V2KX-GP

12

C233

SCD1U10V2KX-5GP

+5VALW _PCH_VCC5R EFSUS

C232

SC1U6D3V2KX-GP

12

C245

C245 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

1124 -SC

+5VS_PC H_VCC5REF

K49

V5REF

J38

VCC3_3

L38

VCC3_3

M36

VCC3_3

N36

VCC3_3

P36

VCC3_3

U35

VCC3_3

AD13

VCC3_3

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

VCCSATAPLL VCCSATAPLL

VCCSUSHDA

HDA

3

Intel check list update from 0.1uF to 1uF

12

C274

SCD1U10V2KX-5GP

C279

+1.05VS_ VCCAPLL

12

SC1U10V 2KX-1GP

PCH_VCC _1_1_20 PCH_VCC _1_1_21 PCH_VCC _1_1_22 PCH_VCC _1_1_23

12

C234

C566

DY

1D5V_S0 _1D8V_S0

R177 0R06 03-PADR177 0R06 03-PAD R179 0R06 03-PADR179 0R06 03-PAD R178 0R06 03-PADR178 0R06 03-PAD R191 0R06 03-PADR191 0R06 03-PAD

SC1U6D3 V2KX-GP

12

DY

1 2 1 2 1 2 1 2

6mA

C568

C568 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

12

C259

SC1U6D3 V2KX-GP

1D05V_S 0

1 2

2

1D05V_S 0

3D3V_S5

1mA

12

C255

SC1U10V 2KX-1GP

3D3V_S0

SCD1U10 V2KX-5GP

L19

1 2

DY

IND-10UH-30 -GP

12

C249

1D05V_S 0

+3VS_+1 .5VS_HDA_IO

2

21

D7

D7 CH751H-4 0PT-GP

CH751H-4 0PT-GP

83.R0304.A8F

2ND = 83.R2004.B8F

3rd = 83.R3004.A8F

1 2

R204 10R2J-2-G PR2 04 10R2J-2-G P

SC1U6D3 V2KX-GP

+3VS_+1 .5VS_HDA_IO

UMA

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

1mA

3D3V_S0

32mA

5V_S5

1130 -SC1130 -SC

1D05V_S 0

0R0603-P AD

1 2

R203

3D3V_S0

21

D6

D6 CH751H-4 0PT-GP

CH751H-4 0PT-GP

83.R0304.A8F

2ND = 83.R2004.B8F

3rd = 83.R3004.A8F

12

C180

C180 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH ( 8/9 )

HM42-CP

1

5V_S0

1 2

R116 10R2J-2-G PR1 16 10R2J-2-G P

3D3V_S5

18 72Friday, Janu ary 22, 2010

1

SC

5

D D

C C

B B

A A

5

PCH1H

AB16

VSS

AA19

VSS

AA20

VSS

AA22

VSS

AM19

VSS

AA24

VSS

AA26

VSS

AA28

VSS

AA30

VSS

AA31

VSS

AA32

VSS

AB11

VSS

AB15

VSS

AB23

VSS

AB30

VSS

AB31

VSS

AB32

VSS

AB39

VSS

AB43

VSS

AB47

VSS

AB5

VSS

AB8

VSS

AC2

VSS

AC52

VSS

AD11

VSS

AD12

VSS

AD16

VSS

AD23

VSS

AD30

VSS

AD31

VSS

AD32

VSS

AD34

VSS

AU22

VSS

AD42

VSS

AD46

VSS

AD49

VSS

AD7

VSS

AE2

VSS

AE4

VSS

AF12

VSS

Y13

VSS

AH49

VSS

AU4

VSS

AF35

VSS

AP13

VSS

AN34

VSS

AF45

VSS

AF46

VSS

AF49

VSS

AF5

VSS

AF8

VSS

AG2

VSS

AG52

VSS

AH11

VSS

AH15

VSS

AH16

VSS

AH24

VSS

AH32

VSS

AV18

VSS

AH43

VSS

AH47

VSS

AH7

VSS

AJ19

VSS

AJ2

VSS

AJ20

VSS

AJ22

VSS

AJ23

VSS

AJ26

VSS

AJ28

VSS

AJ32

VSS

AJ34

VSS

AT5

VSS

AJ4

VSS

AK12

VSS

AM41

VSS

AN19

VSS

AK26

VSS

AK22

VSS

AK23

VSS

AK28

VSS

IBEXPEAK-M-G P-NF

4

8 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

PCH1I

AY7

VSS

B11

VSS

B15

VSS

B19

VSS

B23

VSS

B31

VSS

B35

VSS

B39

VSS

B43

VSS

B47

VSS

B7

VSS

BG12

VSS

BB12

VSS

BB16

VSS

BB20

VSS

BB24

VSS

BB30

VSS

BB34

VSS

BB38

VSS

BB42

VSS

BB49

VSS

BB5

VSS

BC10

VSS

BC14

VSS

BC18

VSS

BC2

VSS

BC22

VSS

BC32

VSS

BC36

VSS

BC40

VSS

BC44

VSS

BC52

VSS

BH9

VSS

BD48

VSS

BD49

VSS

BD5

VSS

BE12

VSS

BE16

VSS

BE20

VSS

BE24

VSS

BE30

VSS

BE34

VSS

BE38

VSS

BE42

VSS

BE46

VSS

BE48

VSS

BE50

VSS

BE6

VSS

BE8

VSS

BF3

VSS

BF49

VSS

BF51

VSS

BG18

VSS

BG24

VSS

BG4

VSS

BG50

VSS

BH11

VSS

BH15

VSS

BH19

VSS

BH23

VSS

BH31

VSS

BH35

VSS

BH39

VSS

BH43

VSS

BH47

VSS

BH7

VSS

C12

VSS

C50

VSS

D51

VSS

E12

VSS

E16

VSS

E20

VSS

E24

VSS

E30

VSS

E34

VSS

E38

VSS

E42

VSS

E46

VSS

E48

VSS

E6

VSS

E8

VSS

F49

VSS

F5

VSS

G10

VSS

G14

VSS

G18

VSS

G2

VSS

G22

VSS

G32

VSS

G36

VSS

G40

VSS

G44

VSS

G52

VSS

AF39

VSS

H16

VSS

H20

VSS

H30

VSS

H34

VSS

H38

VSS

H42

VSS

IBEXPEAK-M-G P-NF

3

9 OF 10

H49

VSS

H5

VSS

J24

VSS

K11

VSS

K43

VSS

K47

VSS

K7

VSS

L14

VSS

L18

VSS

L2

VSS

L22

VSS

L32

VSS

L36

VSS

L40

VSS

L52

VSS

M12

VSS

M16

VSS

M20

VSS

N38

VSS

M34

VSS

M38

VSS

M42

VSS

M46

VSS

M49

VSS

M5

VSS

M8

VSS

N24

VSS

P11

VSS

AD15

VSS

P22

VSS

P30

VSS

P32

VSS

P34

VSS

P42

VSS

P45

VSS

P47

VSS

R2

VSS

R52

VSS

T12

VSS

T41

VSS

T46

VSS

T49

VSS

T5

VSS

T8

VSS

U30

VSS

U31

VSS

U32

VSS

U34

VSS

P38

VSS

V11

VSS

P16

VSS

V19

VSS

V20

VSS

V22

VSS

V30

VSS

V31

VSS

V32

VSS

V34

VSS

V35

VSS

V38

VSS

V43

VSS

V45

VSS

V46

VSS

V47

VSS

V49

VSS

V5

VSS

V7

VSS

V8

VSS

W2

VSS

W52

VSS

Y11

VSS

Y12

VSS

Y15

VSS

Y19

VSS

Y23

VSS

Y28

VSS

Y30

VSS

Y31

VSS

Y32

VSS

Y38

VSS

Y43

VSS

Y46

VSS

P49

VSS

Y5

VSS

Y6

VSS

Y8

VSS

P24

VSS

T43

VSS

AD51

VSS

AT8

VSS

AD47

VSS

Y47

VSS

AT12

VSS

AM6

VSS

AT13

VSS

AM5

VSS

AK45

VSS

AK39

VSS

AV14

VSS

3

2

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet of

2

Date: Sheet of

PCH ( 9/9 )

HM42-CP

1

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

19 72Friday, Janu ary 22, 2010

1

SC

5

M_A_A[15..0]6

0D75_S0

12

R545

R545 22R2F-1-GP

22R2F-1-GP

S3

D D

C C

B B

1016 -SA

PM_SLP_S3_CTL8,13

DDR_VREF _S3

Place these caps close to VTT1 and VTT2.

0R0603-PAD

1 2

R296

SCD1U10V2KX- 5GP

0R0603-PAD

1 2

R299

SCD1U10V2KX- 5GP

0D75_S0

HM42-CP NV Muxless SA 0918

12

C322

SC1U6D3V2KX-GP

Q45

. .

G

...

.....

S

S3

2N7002E-1-GP

84.2N702.D31

2ND = 84.2N702.E31

12

C324

DY

1130 -SC

12

C327

DY

12

C329

SC1U6D3V2KX-GP

S3

PM_SLP_S3_CTL_D 1

D

M_VREF_CA_D IMM0

C325

C325 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

M_VREF_DQ_D IMM0

C328

C328 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

M_A_BS26

M_A_BS06 M_A_BS16

M_A_DQ[63..0]6

M_A_DQS#[7..0]6

M_A_DQS[7..0]6

M_ODT06 M_ODT16

M_VREF_DQ_D IMM010

DDR3_DR AMRST#16,21

M_VREF_CA_D IMM0 M_VREF_DQ_D IMM0

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

4

H =8mm

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-240P- 28-GP

62.10017.R91

2ND = 62.10017.S01

3rd = 62.10017.V61

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#77

NC#122

NC#125/TEST

REVERSE TYPE

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

197

SA0

201

SA1

77 122 125

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1126 -SC

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

SODIMM0_1_SMB_DAT A_R SODIMM0_1_SMB_CLK_R

TS#_DIMM0

SA0_DIM0 SA1_DIM0

1D5V_S3

M_A_RAS# 6 M_A_WE# 6 M_A_CAS# 6

M_CS#0 6 M_CS#1 6

M_CKE0 6 M_CKE1 6

M_CLK_DDR0 6 M_CLK_DDR#0 6

M_CLK_DDR1 6 M_CLK_DDR#1 6

M_A_DM[7..0] 6

1209 -SC

R559

1 2

0R0402-PAD

12

C604

SCD1U10V2KX-5GP

Layout Note: Place these Caps near SO-DIMMA.

3

PM_EXTTS#0_R 5

C601

C601 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

SA0_DIM0

SA1_DIM0

R558 0R0402-PADR5 58 0R0402-PAD

1 2

R557 0R0402-PADR5 57 0R0402-PAD

1 2

10KR2J-3-GP

3D3V_S0

1D5V_S3

3D3V_S0

12

R564

R564 10KR2J-3-GP

10KR2J-3-GP

DY

12

R565

R560

10KR2J-3-GP

1209 -SC

SODIMM A DECOUPLING

C314

C315

SC1U10V2KX-1GP

12

DY

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

PCH_SMBDAT A 3,12,21 PCH_SMBCLK 3,12,21

12

C317

12

C352

C319

SC10U6D3V3MX-GP

DY

1130 -SC

C346

SC1U10V2KX-1GP

12

C316

C343

SCD1U10V2KX-5GP

12

DY

2

12

C320

C318

SC10U6D3V3MX-GP

C347

SCD1U10V2KX-5GP

12

1

A A

Diserete N11M

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Size Document Num ber Rev A2

A2

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDRIII Socket DM1

HM42-CP

1

20 72Friday, January 22, 2010

SC

5

M_B_A[15..0]6

D D

C C

DDR_VREF _S3

0R0603-PAD

1 2

R300

SCD1U10V2KX- 5GP

M_VREF_CA_D IMM1

12

DY

C332

C333

C332 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

M_B_BS26

M_B_BS06 M_B_BS16

M_B_DQ[63..0]6

1130 -SC

DDR_VREF _S3

B B

HM42-CP NV Muxless SA 0918

0R0603-PAD

1 2

R301

C337

SCD1U10V2KX- 5GP

Place these caps close to VTT1 and VTT2.

DY

M_VREF_DQ_D IMM1

12

C338

C338 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

0D75_S0

12

C336

SC1U6D3V2KX-GP

M_B_DQS#[7..0]6

M_B_DQS[7..0]6

M_ODT26 M_ODT36

M_VREF_DQ_D IMM110

DDR3_DR AMRST#16,20

C331

SC1U6D3V2KX-GP

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther from the Processor than SO-DIMMA

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_VREF_CA_D IMM1 M_VREF_DQ_D IMM1

H = 4mm

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 97-GP

62.10017.W11

2nd = 62.10017.V51

3rd = 62.10017.M51

1st and 2nd change 1st: 20.F1115.204 and 2nd:20.F1207.204 (use in lab stage)

RAS#

CAS#

CKE0 CKE1

EVENT#

VDDSPD

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

REVERSE TYPE

NP1 NP2

WE#

CS0# CS1#

CK0

CK0#

CK1

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

SA0 SA1

NC#1 NC#2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

1126 -SC

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198

199

197 201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

SODIMM1_1_SMB_DAT A_R SODIMM1_1_SMB_CLK_R

TS#_DIMM1

SA0_DIM1 SA1_DIM1

1D5V_S3

M_B_RAS# 6 M_B_WE# 6 M_B_CAS# 6

M_CS#2 6 M_CS#3 6

M_CKE2 6 M_CKE3 6

M_CLK_DDR2 6 M_CLK_DDR#2 6

M_CLK_DDR3 6 M_CLK_DDR#3 6 M_B_DM[7..0] 6

1208 -SC

R572

1 2

0R0402-PAD

C340

12

SCD1U10V2KX-5GP

0113 -1

3

PM_EXTTS#1_R 5

DY

C339

C339 SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

1 2

R570 0R0402-PADR5 70 0R0402-PAD

1 2

R568 0R0402-PADR5 68 0R0402-PAD

1 2

1D5V_S3

3D3V_S0

SA1_DIM1

SA0_DIM1

PCH_SMBDAT A 3,12,20 PCH_SMBCLK 3,12,20

12

R302

R302 10KR2J-3-GP

10KR2J-3-GP

2

3D3V_S0

12

DY

R304

R304 10KR2J-3-GP

10KR2J-3-GP

R303

R303 10KR2J-3-GP

10KR2J-3-GP

1

SODIMM B DECOUPLING

12

C351

12

C350

C321

SC10U6D3V3MX-GP

12

C348

C349

SC10U6D3V3MX-GP

DY

1130 -SC

C341

C344

C312

SC1U10V2KX-1GP

C344

C345

SC1U10V2KX-1GP

12

C342

C313

SCD1U10V2KX-5GP

12

DY

C313

SCD1U10V2KX-5GP

12

DY

A A

Diserete N11M

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Size Document Num ber Rev A2

A2

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDRIII Socket DM2

HM42-CP

1

21 72Friday, January 22, 2010

SC