Acer Helios 700, Helios 717 boardview

1

2

3

4

5

6

7

8

Levante_CFS CFL-H/K +1170/1180 MAX-P SYSTEM DIAGRAM

SODIMM0

Max. 16GB

RVS H9.2

A A

Port14

LAN

Killer E3000
10x10x0.9mm

PCIe Redriver
SN75LVPE802RTJR
4x4x0.8mm

Daughter board

SODIMM1

Max. 16GB

RVS H5.2

SODIMM0

Max. 16GB

RVS H4.0 or 5.2

SODIMM1

Max. 16GB

STD H4.0 or 5.2

2400MT/s

DDR4
Channel A

2400MT/s

DDR4
Channel B

INTEL

Coffee Lake H

Processor : 6+2

Power : 45 (Watt)

Package : BGA1440

Size : 42 x 28 x 1.5 (mm)

DMI

PEG
X16 Lanes

NVIDIA N18E-G2/G3

Package 37.5 x 37.5mm

TGP: 115W/150W

eDP re-driver IC
TUSB546-DCI

27MHz

HDMI2.0 redriver
PS8409A

DP re-driver
TUSB546-DCI

VRAM GDDR6 * 8 pcs

HDMI2.0

Display port

17.3
eDP Panel FHD/UHD

01

PCI-E x 1

Port15

USB 2.0

B B

WLAN +BT

Cable

SATA Re-driver
PS8527B

TPM

P34

NGFF SSD #1

SATA/PCIE SSD

NGFF SSD #2

PCIE SSD

HDD

CNVI

SATA 6GB/s

PCIE x 4

SATA 6GB/s

PCIE x 4

CNL PCH
HM370

Package : FCBGA837

Size : 23 x 23 (mm)

SPI

USB2.0

DP re-driver

TUSB546-DCI*1

PCIE 4 Lanes

USB 2.0/3.0

CIO_TX_RX (DP/USB3.1)

DSL6540-SLL44

TBT(Apline Ridge)

NV Type-C (Please refer to the next page)

I2C
AUX /LS/SPI

Webcam
(DMIC)

PORT6

USB type C PD

TI
TPS65987*1
7x7x1mm

Metal
Keyboard

U2 re-driver
TUSB212

CC1/CC2

SBU1/SBU2

PORT7

USB TypeC X1

ROM

U3 10G re-timer

C C

Power / Battery LED

Macro Key LED

TP

KBC

ITE IT8987E/BX

MCU PWM/LED Driver

ENE 6K5130

LPC

CPU FAN

GPU FAN

Azalia

PS8817

4.2x8x0.8mm

U3 10G re-timer
PS8817

4.2x8x0.8mm
U2 re-driver

TUSB212 x2

U3 10G re-timer
PS8811

4.2x4.2x0.8mm

PORT1,2,3

USB3.0 Ports

X1

BC1.2

SLGC55544CVTR

USB3.0 Ports

X2

RGB LED for C cover

AUDIO
CODEC

ALC1220

MIC

4

7x7x0.9mm

HP

Daughter board

5

G3@ : NV G3 GPU

D D

ADP@ : For 330W
GSY@ : For G-SYNC panel
NGSY@ : For Non- GSYNC panel
SAM@ : SAMSUNG VRAM
MIC@ : MICRON VRAM
TPM@ : TPM
i9@ : i9 CPU

1

2

3

SLGC55544CVTR

AMP
ALC1001

3x3x0.9mm
AMP

ALC1001
3x3x0.9mm

AMP
ALC1001

3x3x0.9mm

BC1.2

Speaker Center
SubWoofer

Speaker R1/L1

Speaker R2/L2

6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

7

PROJECT :

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

ZGE

ZGE

ZGE

8

1 78Friday, May 03, 20 19

1 78Friday, May 03, 20 19

1 78Friday, May 03, 20 19

1A

1A

1A

5

For debug only remove from MV

+3V

R83
*4.7K_1%_4

D D

34

Q8A

5

CATERR#

C C

PECI

CPU CORE SVID

Layout note:

1.Need routing together

2.ALERT need between CLK and DATA.

PLACE THE PU RESISTORS
CLOSE TO VR
PULL UP IS IN THE VR MODULE

B B

CLOSE TO CPU
PLACE THE PU RESISTORS

H_CPU_SVIDALRT#

CLOSE TO CPU
PLACE THE PU RESISTORS

A A

*PJX138K

HWPG[57]

+VCCIO

R52 13_1%_4

R47 *short_0402

VR_SVID_CLK_R

R35 220_1%_4

H_CPU_SVIDDAT

+3V

21

61

2

R104 *short_0402

R103 *0_5%_4

R38 *short_0402

5

R85
*360_1%_6

LED1
*White_19-113/T1D-CP2Q2HY/3T

Q8B
*PJX138K

R101

4.7K_1%_4

34

Q16A

5

PJX138K

PCH_PECI [11]

EC_PECI [57]

+VCCST

modify 8/9

R39
*54.9_1%_4

+VCCST

R36

56.2_1%_4

C48
*0.1u/16V_4

+VCCST

R42
100_1%_4

R41 *short_0402

PROCPWRGD

C56
220p/50V_4

+VCCST+3V_DEEP_SUS

modify 8/9

R108
1K_1%_4

H_VCCST_PW RGD

61

Q16B

2

PJX138K

PROCPWRGD (50ohm)
Trace Length: 1~11.25 inches

PM_SYNC (50ohm)
Trace Length: 1~11.25 inches

CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches

Close to CPU

SVID CLK

VR_SVID_CLK [65]

Close to CPU

SVID ALERT

VR_SVID_ALERT# [65]

Close to CPU

SVID DATA

VR_SVID_DATA [65]

4

CLK_CPU_BCLKP[11]
CLK_CPU_BCLKN[11]

CPU_PCI_BCLKP[11]
CPU_PCI_BCLKN[11]

CLK_DPLL_NSCCLKP[11]

Host CLK:
Trace length < 11000 mils
Trace spacing = 15 / 20 mils, Impendence 85 ohm

CLK_DPLL_NSCCLKN[11]

EMI RESERVE

VCCST_PWRGD

EC2 10p/50V_4

R107 60.4/F_4

CPU_PLTRST#R[11]

PM_SYNC[11]

C92

0.1u/16V_4

H_PM_DOWN[11]

SKTOCC_N_R[13]

THERMTRIP# (50ohm)
Trace Length: 1.1~12 inches

IMVP_PWRGD[10,65]

SYS_SHDN#[57,62,68]

PM_THRMTRIP#[11,17,18,19,20,53]

PROCPWRGD[10]

R57 20_1%_4

SKTOCC_N_R

R53 *short_0402

TP6

+VCCST

R62 *100K_1%_4

modify 8/9

Ra Not install in SKL-H

+VCCST

Ra

R98
*10K_1%_4

PROC_SEL#

R97
*0_5%_4

4

3

CFL-H Processor (CLK,MISC,JTAG)

CLK_CPU_BCLKP
CLK_CPU_BCLKN

CPU_PCI_BCLKP
CPU_PCI_BCLKN

CLK_DPLL_NSCCLKP
CLK_DPLL_NSCCLKN

H_CPU_SVIDALRT#
VR_SVID_CLK_R
H_CPU_SVIDDAT
H_PROCHOT#_CPU

DDR_PG_CNT L

VCCST_PWRGD
PROCPWRGD

CPU_PLTRST#R
H_PM_DOWN_R

PECI
THERMTRIP#

SKTOCC_N
PROC_SEL#

CATERR#

R78 49.9_1%_6

+VCCST

3

Q6

2

DMG301NU-7

1

R46

R55

1K_1%_4

1K_1%_4

2

13

THERMTRIP#

Q5
METR3904-G

R51 *short_0402

U3E

B31

BCLKP

A32

BCLKN

D35

PCI_BCLKP

C36

PCI_BCLKN

E31

CLK24P

D31

CLK24N

BH31

VIDALERT#

BH32

VIDSCK

BH29

VIDSOUT

BR30

PROCHOT#

BT13

DDR_VTT_CNTL

H13

VCCST_PWRGD

BT31

PROCPWRGD

BP35

RESET#

BM34

PM_SYNC

BP31

PM_DOWN

BT34

PECI

J31

THERMTRIP#

BR33

SKTOCC#

BN1

PROC_SELECT#

BM30

CATERR#

AT13

ZVM#

AW13

MSM#

AU13

RSVD#AU13

AY13

RSVD#AY13

5 OF 13

CPU_CFL-H_1440P

Note: please keep plane is enough for VDDQ 2.8A

Placement close to CPU.

+1.2VSUS

C655 0.1u/16V_4
C657 *0.1u/16V_4

DDR_PG_CNT L

PROCHOT# (50ohm)
Trace Length <11 inches

Cb need placment near VR

modify 8/9

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8

CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15

CFG_17
CFG_16
CFG_19
CFG_18

BPM#_0
BPM#_1
BPM#_2
BPM#_3

PROC_TDO

PROC_TDI
PROC_TMS
PROC_TCK

PROC_TRST#

PROC_PREQ#

PROC_PRDY#

CFG_RCOMP

R90 10K_1%_4

+VCCSTG

H_PROCHOT#[57,61,65]

EMI RESERVE

EC1 *10p/50V_4

3

BN25
BN27
BN26

CFG2

BN28
BR20

CFG4

BM20

CFG5

BT20

CFG6

BP20
BR23
BR22
BT23
BT22
BM19
BR19
BP19
BT19

BN23
BP23
BP22
BN22

XDP_BPM0

BR27

XDP_BPM1

BT27

XDP_BPM2

BM31

XDP_BPM3

BT30

H_TDO

BT28

H_TDI

BL32

H_TMS

BP28

H_TCK

BR28

H_TRST#

BP30

H_PREQ#

BL30

H_PRDY#

BP27

CFG_RCOMP

BT25

Design Note(CFG_RCOMP):
DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)

+3V_DEEP_SUS

R96
10K_1%_4

2

Q10
METR3904-G

1 3

R88
100K_1%_4

R67 1K_1%_4

TP7
TP8
TP4
TP5

H_TDO [10]
H_TDI [10]
H_TMS [10]
H_TCK [10]

H_TRST# [15]
H_PREQ# [15]
H_PRDY# [15]

R7749.9_1%_4

+3V_DEEP_SUS

3

2

1

R68 499_1%_4

R95
10K_1%_4

Q12
2N7002KTB

Modify 8/10

H_PROCHOT#_CPU

C60

0.1u/16V_4

2

R92
100K_1%_4

H_PROCHOT#_CPU

2

The CFG signals have a default value of '1' if not terminated on the board.

DDR_VTTT_PG_CTRL [64]

1

Processor pull-up (CPU)

H_TDO
H_TMS
H_TDI
H_PREQ#

H_TCK
H_TRST#

R72 51_5%_4
R71 *51_5%_4
R73 *51_5%_4
R76 *56.2_1%_4

R69 51_5%_4
R65 *51_5%_4

Processor Strapping

R75 1K_1%_4

CFG2
CFG4

R79 *1K_1%_4

CFG5

R84 *1K_1%_4

CFG6

R81 *1K_1%_4

Contiguration Signals: The CFG signals
have a default value of '1' if not
terminated
on the board. Refer to the appropriate
platform design guide for pull-down
recommendations when a logic low is
desired.
Intel recommends placing test points on
the
board for CFG pins.
. CFG[0]:Stall reset sequence after PCU
PLL lock until de-asserted:

-1=(Default) Normal Operation;
No stall.

-0=Stall.
.CFG[1]:Reserved configuration lane.
.CFG[2]:PCI Express*Static x16 Lane
Numbering Reversal.

-1=Normal operation

-0=Lane numbers reversed.
.CFG[3]:Reserved configuration lane.
.CFG[4]:eDP enable:

-1=Disabled.

-0=Enabled.
.CFG[6:5]:PCI Express* Bifurcation

-00=1x8,2x4 PCI Express*

-01=reserved

-10=2x8 PCI Express*

-11=1x16 PCI Express*
.CFG[7]:PEG Training:

-1=(default) PEG Train
immediately following RESET# de
assertion.

-0=PEG Wait for BIOS for
assertion.
.CFG[19:8]:Reserved configuration
lanes.

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

CFL 1/7 (JTAG/MISC)

CFL 1/7 (JTAG/MISC)

CFL 1/7 (JTAG/MISC)

1

+VCCST

modify 8/9

ZGE

ZGE

ZGE

2 78Friday, May 03, 2019

2 78Friday, May 03, 2019

2 78Friday, May 03, 2019

02

1A

1A

1A

5

4

3

2

1

CFL Processor (DMI,PEG,FDI)

03

U3C

PEG_RXP15[21]

D D

C C

B B

+VCCIO

DMI RX

PEG_RXN15[21]
PEG_RXP14[21]

PEG_RXN14[21]
PEG_RXP13[21]

PEG_RXN13[21]
PEG_RXP12[21]

PEG_RXN12[21]
PEG_RXP11[21]

PEG_RXN11[21]
PEG_RXP10[21]

PEG_RXN10[21]
PEG_RXP9[21]

PEG_RXN9[21]
PEG_RXP8[21]

PEG_RXN8[21]
PEG_RXP7[21]

PEG_RXN7[21]
PEG_RXP6[21]

PEG_RXN6[21]
PEG_RXP5[21]

PEG_RXN5[21]
PEG_RXP4[21]

PEG_RXN4[21]
PEG_RXP3[21]

PEG_RXN3[21]
PEG_RXP2[21]

PEG_RXN2[21]
PEG_RXP1[21]

PEG_RXN1[21]
PEG_RXP0[21]

PEG_RXN0[21]

R102 24.9/F_4

DMI_RXP0[9]
DMI_RXN0[9]

DMI_RXP1[9]
DMI_RXN1[9]

DMI_RXP2[9]
DMI_RXN2[9]

DMI_RXP3[9]
DMI_RXN3[9]

PEG_COMP

E25

PEG_RXP_0

D25

PEG_RXN_0

E24

PEG_RXP_1

F24

PEG_RXN_1

E23

PEG_RXP_2

D23

PEG_RXN_2

E22

PEG_RXP_3

F22

PEG_RXN_3

E21

PEG_RXP_4

D21

PEG_RXN_4

E20

PEG_RXP_5

F20

PEG_RXN_5

E19

PEG_RXP_6

D19

PEG_RXN_6

E18

PEG_RXP_7

F18

PEG_RXN_7

D17

PEG_RXP_8

E17

PEG_RXN_8

F16

PEG_RXP_9

E16

PEG_RXN_9

D15

PEG_RXP_10

E15

PEG_RXN_10

F14

PEG_RXP_11

E14

PEG_RXN_11

D13

PEG_RXP_12

E13

PEG_RXN_12

F12

PEG_RXP_13

E12

PEG_RXN_13

D11

PEG_RXP_14

E11

PEG_RXN_14

F10

PEG_RXP_15

E10

PEG_RXN_15

G2

PEG_RCOMP

D8

DMI_RXP_0

E8

DMI_RXN_0

E6

DMI_RXP_1

F6

DMI_RXN_1

D5

DMI_RXP_2

E5

DMI_RXN_2

J8

DMI_RXP_3

J9

DMI_RXN_3

CPU_CFL-H_1440P

PEG_TXP_10
PEG_TXN_10

PEG_TXP_11
PEG_TXN_11

PEG_TXP_12
PEG_TXN_12

PEG_TXP_13
PEG_TXN_13

PEG_TXP_14
PEG_TXN_14

PEG_TXP_15
PEG_TXN_15

3 OF 13

PEG_TXP_0
PEG_TXN_0

PEG_TXP_1
PEG_TXN_1

PEG_TXP_2
PEG_TXN_2

PEG_TXP_3
PEG_TXN_3

PEG_TXP_4
PEG_TXN_4

PEG_TXP_5
PEG_TXN_5

PEG_TXP_6
PEG_TXN_6

PEG_TXP_7
PEG_TXN_7

PEG_TXP_8
PEG_TXN_8

PEG_TXP_9
PEG_TXN_9

DMI_TXP_0

DMI_TXN_0

DMI_TXP_1

DMI_TXN_1

DMI_TXP_2

DMI_TXN_2

DMI_TXP_3

DMI_TXN_3

B25
A25

B24
C24

B23
A23

B22
C22

B21
A21

B20
C20

B19
A19

B18
C18

A17
B17

C16
B16

A15
B15

C14
B14

A13
B13

C12
B12

A11
B11

C10
B10

B8
A8

C6
B6

B5
A5

D4
B4

C_PEG_TXP15
C_PEG_TXN15

C_PEG_TXP14
C_PEG_TXN14

C_PEG_TXP13
C_PEG_TXN13

C_PEG_TXP12
C_PEG_TXN12

C_PEG_TXP11
C_PEG_TXN11

C_PEG_TXP10
C_PEG_TXN10

C_PEG_TXP9
C_PEG_TXN9

C_PEG_TXP8
C_PEG_TXN8

C_PEG_TXP7
C_PEG_TXN7

C_PEG_TXP6
C_PEG_TXN6

C_PEG_TXP5
C_PEG_TXN5

C_PEG_TXP4
C_PEG_TXN4

C_PEG_TXP3
C_PEG_TXN3

C_PEG_TXP2
C_PEG_TXN2

C_PEG_TXP1
C_PEG_TXN1

C_PEG_TXP0
C_PEG_TXN0

C58 0.22u/6.3V_2
C57 0.22u/6.3V_2

C59 0.22u/6.3V_2
C61 0.22u/6.3V_2

C64 0.22u/6.3V_2
C63 0.22u/6.3V_2

C65 0.22u/6.3V_2
C67 0.22u/6.3V_2

C69 0.22u/6.3V_2
C68 0.22u/6.3V_2

C70 0.22u/6.3V_2
C71 0.22u/6.3V_2

C73 0.22u/6.3V_2
C72 0.22u/6.3V_2

C74 0.22u/6.3V_2
C75 0.22u/6.3V_2

C76 0.22u/6.3V_2
C77 0.22u/6.3V_2

C79 0.22u/6.3V_2
C78 0.22u/6.3V_2

C80 0.22u/6.3V_2
C81 0.22u/6.3V_2

C83 0.22u/6.3V_2
C82 0.22u/6.3V_2

C84 0.22u/6.3V_2
C85 0.22u/6.3V_2

C87 0.22u/6.3V_2
C86 0.22u/6.3V_2

C88 0.22u/6.3V_2
C89 0.22u/6.3V_2

C91 0.22u/6.3V_2
C90 0.22u/6.3V_2

DMI_TXP0 [9]
DMI_TXN0 [9]

DMI_TXP1 [9]
DMI_TXN1 [9]

DMI_TXP2 [9]
DMI_TXN2 [9]

DMI_TXP3 [9]
DMI_TXN3 [9]

PEG_TXP15 [21]
PEG_TXN15 [21]

PEG_TXP14 [21]
PEG_TXN14 [21]

PEG_TXP13 [21]
PEG_TXN13 [21]

PEG_TXP12 [21]
PEG_TXN12 [21]

PEG_TXP11 [21]
PEG_TXN11 [21]

PEG_TXP10 [21]
PEG_TXN10 [21]

PEG_TXP9 [21]
PEG_TXN9 [21]

PEG_TXP8 [21]
PEG_TXN8 [21]

PEG_TXP7 [21]
PEG_TXN7 [21]

PEG_TXP6 [21]
PEG_TXN6 [21]

PEG_TXP5 [21]
PEG_TXN5 [21]

PEG_TXP4 [21]
PEG_TXN4 [21]

PEG_TXP3 [21]
PEG_TXN3 [21]

PEG_TXP2 [21]
PEG_TXN2 [21]

PEG_TXP1 [21]
PEG_TXN1 [21]

PEG_TXP0 [21]
PEG_TXN0 [21]

DMI TX

U3D

K36

DDI1_TXP_0

K37

DDI1_TXN_0

J35

DDI1_TXP_1

J34

DDI1_TXN_1

H37

DDI1_TXP_2

H36

DDI1_TXN_2

J37

DDI1_TXP_3

J38

DDI1_TXN_3

D27

DDI1_AUXP

E27

DDI1_AUXN

H34

DDI2_TXP_0

H33

DDI2_TXN_0

F37

DDI2_TXP_1

G38

DDI2_TXN_1

F34

DDI2_TXP_2

F35

DDI2_TXN_2

E37

DDI2_TXP_3

E36

DDI2_TXN_3

F26

DDI2_AUXP

E26

DDI2_AUXN

C34

DDI3_TXP_0

D34

DDI3_TXN_0

B36

DDI3_TXP_1

B34

DDI3_TXN_1

F33

DDI3_TXP_2

E33

DDI3_TXN_2

C33

DDI3_TXP_3

B33

DDI3_TXN_3

A27

DDI3_AUXP

B27

DDI3_AUXN

CPU_CFL-H_1440P

DP & PEG Compensation

y

eDP_RCOMP
Trace length < 100 Mils
Trace Width 5 Mils Trace Spacing 25 Mils

eDP_COMPIO and ICOMPO signals should be shorted
near balls and routed with typical impedance <25 mohms

EDP_TXP_0
EDP_TXN_0
EDP_TXP_1
EDP_TXN_1
EDP_TXP_2
EDP_TXN_2
EDP_TXP_3
EDP_TXN_3

EDP_AUXP
EDP_AUXN

EDP_DISP_UTIL

DISP_RCOMP

PROC_AUDIO_CLK

PROC_AUDIO_SDI

PROC_AUDIO_SDO

4 of 13

D29
E29
F28
E28
A29
B29
C28
B28

C26
B26

EDP_DISP_UTIL

A33

EDP_RCOMP

D37

AUD_AZACPU_SCLK

G27

AUD_AZACPU_SDO_R

G25

AUD_AZACPU_SDI_R

G29

TP3

R687 24.9_1%_4

R61 20_1%_4

+VCCIO

AUD_AZACPU_SCLK [10]
AUD_AZACPU_SDO_R [10]

AUD_AZACPU_SDI [10]

PEG_RCOMP

Trace length < 400 MILS

A A

Trace width = 12 MILS
Trace spacing = 15 MILS

5

4

+1.2VSUS [2,6,10,14,17,18,19,20,46,59,60,64,75]
+3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73,75]

3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

PROJECT :

CFL 2/7 (DMI/EDP/PEG)

CFL 2/7 (DMI/EDP/PEG)

CFL 2/7 (DMI/EDP/PEG)

ZGE

ZGE

ZGE

1A

1A

1A

3 78Friday, May 03, 2019

3 78Friday, May 03, 2019

3 78Friday, May 03, 2019

1

5

4

3

2

1

M_A_DQ[15:0][17,19]

CFL Processor (DDR4)

M_A_DQ[31:16][17,19]

M_A_DQ[47:32][17,19]

M_A_DQ[63:48][17,19]

D D

C C

B B

M_A_CB0[17,19]
M_A_CB1[17,19]
M_A_CB2[17,19]
M_A_CB3[17,19]
M_A_CB4[17,19]
M_A_CB5[17,19]
M_A_CB6[17,19]
M_A_CB7[17,19]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8

M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14

M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23

M_A_DQ24

M_A_DQ25

M_A_DQ26

M_A_DQ27

M_A_DQ28

M_A_DQ29

M_A_DQ30

M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39

M_A_DQ40

M_A_DQ41

M_A_DQ42

M_A_DQ43

M_A_DQ44

M_A_DQ45

M_A_DQ46

M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55

M_A_DQ56

M_A_DQ57

M_A_DQ58

M_A_DQ59

M_A_DQ60

M_A_DQ61

M_A_DQ62

M_A_DQ63

M_A_CB0

M_A_CB1

M_A_CB2

M_A_CB3

M_A_CB4

M_A_CB5

M_A_CB6

M_A_CB7

Interleave / Non-Interleave

U3A

BR6

DDR0_DQ_0/DDR0_DQ_0

BT6

DDR0_DQ_1/DDR0_DQ_1

BP3

DDR0_DQ_2/DDR0_DQ_2

BR3

DDR0_DQ_3/DDR0_DQ_3

BN5

DDR0_DQ_4/DDR0_DQ_4

BP6

DDR0_DQ_5/DDR0_DQ_5

BP2

DDR0_DQ_6/DDR0_DQ_6

BN3

DDR0_DQ_7/DDR0_DQ_7

BL4

DDR0_DQ_8/DDR0_DQ_8

BL5

DDR0_DQ_9/DDR0_DQ_9

BL2

DDR0_DQ_10/DDR0_DQ_10

BM1

DDR0_DQ_11/DDR0_DQ_11

BK4

DDR0_DQ_12/DDR0_DQ_12

BK5

DDR0_DQ_13/DDR0_DQ_13

BK1

DDR0_DQ_14/DDR0_DQ_14

BK2

DDR0_DQ_15/DDR0_DQ_15

BG4

DDR0_DQ_16/DDR0_DQ_32

BG5

DDR0_DQ_17/DDR0_DQ_33

BF4

DDR0_DQ_18/DDR0_DQ_34

BF5

DDR0_DQ_19/DDR0_DQ_35

BG2

DDR0_DQ_20/DDR0_DQ_36

BG1

DDR0_DQ_21/DDR0_DQ_37

BF1

DDR0_DQ_22/DDR0_DQ_38

BF2

DDR0_DQ_23/DDR0_DQ_39

BD2

DDR0_DQ_24/DDR0_DQ_40

BD1

DDR0_DQ_25/DDR0_DQ_41

BC4

DDR0_DQ_26/DDR0_DQ_42

BC5

DDR0_DQ_27/DDR0_DQ_43

BD5

DDR0_DQ_28/DDR0_DQ_44

BD4

DDR0_DQ_29/DDR0_DQ_45

BC1

DDR0_DQ_30/DDR0_DQ_46

BC2

DDR0_DQ_31/DDR0_DQ_47

AB1

DDR0_DQ_32/DDR1_DQ_0

AB2

DDR0_DQ_33/DDR1_DQ_1

AA4

DDR0_DQ_34/DDR1_DQ_2

AA5

DDR0_DQ_35/DDR1_DQ_3

AB5

DDR0_DQ_36/DDR1_DQ_4

AB4

DDR0_DQ_37/DDR1_DQ_5

AA2

DDR0_DQ_38/DDR1_DQ_6

AA1

DDR0_DQ_39/DDR1_DQ_7

V5

DDR0_DQ_40/DDR1_DQ_8

V2

DDR0_DQ_41/DDR1_DQ_9

U1

DDR0_DQ_42/DDR1_DQ_10

U2

DDR0_DQ_43/DDR1_DQ_11

V1

DDR0_DQ_44/DDR1_DQ_12

V4

DDR0_DQ_45/DDR1_DQ_13

U5

DDR0_DQ_46/DDR1_DQ_14

U4

DDR0_DQ_47/DDR1_DQ_15

R2

DDR0_DQ_48/DDR1_DQ_32

P5

DDR0_DQ_49/DDR1_DQ_33

R4

DDR0_DQ_50/DDR1_DQ_34

P4

DDR0_DQ_51/DDR1_DQ_35

R5

DDR0_DQ_52/DDR1_DQ_36

P2

DDR0_DQ_53/DDR1_DQ_37

R1

DDR0_DQ_54/DDR1_DQ_38

P1

DDR0_DQ_55/DDR1_DQ_39

M4

DDR0_DQ_56/DDR1_DQ_40

M1

DDR0_DQ_57/DDR1_DQ_41

L4

DDR0_DQ_58/DDR1_DQ_42

L2

DDR0_DQ_59/DDR1_DQ_43

M5

DDR0_DQ_60/DDR1_DQ_44

M2

DDR0_DQ_61/DDR1_DQ_45

L5

DDR0_DQ_62/DDR1_DQ_46

L1

DDR0_DQ_63/DDR1_DQ_47

BA2

NC/DDR0_ECC_0

BA1

NC/DDR0_ECC_1

AY4

NC/DDR0_ECC_2

AY5

NC/DDR0_ECC_3

BA5

NC/DDR0_ECC_4

BA4

NC/DDR0_ECC_5

AY1

NC/DDR0_ECC_6

AY2

NC/DDR0_ECC_7

CPU_CFL-H_1440P

1 OF 13

DDR CHANNEL A

DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSN_7/DDR1_DQSN_5

DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSP_7/DDR1_DQSP_5

DDR0_DQSP_8/DDR0_DQSP_8
DDR0_DQSN_8/DDR0_DQSN_8

DDR0_CKP_0/DDR0_CKP_0
DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_1/DDR0_CKP_1
DDR0_CKN_1/DDR0_CKN_1

NC/DDR0_CKP_2
NC/DDR0_CKN_2
NC/DDR0_CKP_3
NC/DDR0_CKN_3

DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_1/DDR0_CKE_1
DDR0_CKE_2/DDR0_CKE_2
DDR0_CKE_3/DDR0_CKE_3

DDR0_CS#_0/DDR0_CS#_0
DDR0_CS#_1/DDR0_CS#_1

NC/DDR0_CS#_2
NC/DDR0_CS#_3

DDR0_ODT_0/DDR0_ODT_0

NC/DDR0_ODT_1
NC/DDR0_ODT_2
NC/DDR0_ODT_3

DDR0_CAB_4/DDR0_BA_0
DDR0_CAB_6/DDR0_BA_1
DDR0_CAA_5/DDR0_BG_0

DDR0_CAB_3/DDR0_MA_16
DDR0_CAB_2/DDR0_MA_14
DDR0_CAB_1/DDR0_MA_15

DDR0_CAB_9/DDR0_MA_0
DDR0_CAB_8/DDR0_MA_1
DDR0_CAB_5/DDR0_MA_2

NC/DDR0_MA_3

NC/DDR0_MA_4
DDR0_CAA_0/DDR0_MA_5
DDR0_CAA_2/DDR0_MA_6
DDR0_CAA_4/DDR0_MA_7
DDR0_CAA_3/DDR0_MA_8
DDR0_CAA_1/DDR0_MA_9

DDR0_CAB_7/DDR0_MA_10
DDR0_CAA_7/DDR0_MA_11
DDR0_CAA_6/DDR0_MA_12
DDR0_CAB_0/DDR0_MA_13

DDR0_CAA_9/DDR0_BG_1
DDR0_CAA_8/DDR0_ACT#

NC/DDR0_PAR

NC/DDR0_ALERT#

AG1
AG2
AK2
AK1
AL3
AK3
AL2
AL1

AT1
AT2
AT3
AT5

AD5
AE2
AD2
AE5

AD3
AE4
AE1
AD4

AH5
AH1
AU1

M_A_A16 M_B_A1

AH4

M_A_A14

AG4

M_A_A15

AD1

M_A_A0

AH3

M_A_A1

AP4

M_A_A2

AN4

M_A_A3

AP5

M_A_A4

AP2

M_A_A5

AP1

M_A_A6

AP3

M_A_A7

AN1

M_A_A8

AN3

M_A_A9

AT4

M_A_A10

AH2

M_A_A11

AN2

M_A_A12

AU4

M_A_A13

AE3
AU2
AU3

AG3
AU5

M_A_DQSN0

BR5

M_A_DQSN1

BL3

M_A_DQSN2

BG3

M_A_DQSN3

BD3

M_A_DQSN4

AA3

M_A_DQSN5 M_B_DQSP0

U3

M_A_DQSN6

P3

M_A_DQSN7

L3

M_A_DQSP0

BP5

M_A_DQSP1

BK3

M_A_DQSP2

BF3

M_A_DQSP3

BC3

M_A_DQSP4

AB3

M_A_DQSP5

V3

M_A_DQSP6

R3

M_A_DQSP7

M3

M_A_DQSP8

AY3

M_A_DQSN8

BA3

M_A_DIM0_CLKP0 [17]
M_A_DIM0_CLKN0 [17]
M_A_DIM0_CLKP1 [17]
M_A_DIM0_CLKN1 [17]

M_A_DIM1_CLKP0 [19]
M_A_DIM1_CLKN0 [19]
M_A_DIM1_CLKP1 [19]
M_A_DIM1_CLKN1 [19]

M_A_CKE0 [17]
M_A_CKE1 [17]
M_A_CKE2 [19]
M_A_CKE3 [19]

M_A_CS#0 [17]
M_A_CS#1 [17]
M_A_CS#2 [19]
M_A_CS#3 [19]

M_A_ODT0 [17]
M_A_ODT1 [17]
M_A_ODT2 [19]
M_A_ODT3 [19]

M_A_BS#0 [17,19]
M_A_BS#1 [17,19]

M_A_BG#0 [17,19]

M_A_A[16:0] [17,19]

M_A_BG#1 [17,19]
DDRA_ACT# [17,19]

DDR0_PAR [17,19]
DDR0_ALERT# [17,19]

M_A_DQSN0 [17,19]
M_A_DQSN1 [17,19]
M_A_DQSN2 [17,19]
M_A_DQSN3 [17,19]
M_A_DQSN4 [17,19]
M_A_DQSN5 [17,19] M_B_DQSP0 [18,20]
M_A_DQSN6 [17,19]
M_A_DQSN7 [17,19]

M_A_DQSP0 [17,19]
M_A_DQSP1 [17,19]
M_A_DQSP2 [17,19]
M_A_DQSP3 [17,19]
M_A_DQSP4 [17,19]
M_A_DQSP5 [17,19]
M_A_DQSP6 [17,19]
M_A_DQSP7 [17,19]

M_A_DQSP8 [17,19]
M_A_DQSN8 [17,19]

M_B_DQ[15:0][18,20]

M_B_DQ[31:16][18,20]

M_B_DQ[47:32][18,20]

M_B_DQ[48:63][18,20]

M_B_CB0[18,20]
M_B_CB1[18,20]
M_B_CB2[18,20]
M_B_CB3[18,20]
M_B_CB4[18,20]
M_B_CB5[18,20]
M_B_CB6[18,20]
M_B_CB7[18,20]

R99 121_1%_4
R105 75_1%_4
R109 100_1%_4

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7

M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14

M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23

M_B_DQ24

M_B_DQ25

M_B_DQ26

M_B_DQ27

M_B_DQ28

M_B_DQ29

M_B_DQ30

M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39

M_B_DQ40

M_B_DQ41

M_B_DQ42

M_B_DQ43

M_B_DQ44

M_B_DQ45

M_B_DQ46

M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55

M_B_DQ56

M_B_DQ57

M_B_DQ58

M_B_DQ59

M_B_DQ60

M_B_DQ61

M_B_DQ62

M_B_DQ63

M_B_CB0

M_B_CB1

M_B_CB2

M_B_CB3

M_B_CB4

M_B_CB5

M_B_CB6

M_B_CB7

SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

U3B

BT11

DDR1_DQ_0/DDR0_DQ_16

BR11

DDR1_DQ_1/DDR0_DQ_17

BT9

DDR1_DQ_2/DDR0_DQ_18

BR8

DDR1_DQ_3/DDR0_DQ_19

BP11

DDR1_DQ_4/DDR0_DQ_20

BN11

DDR1_DQ_5/DDR0_DQ_21

BP8

DDR1_DQ_6/DDR0_DQ_22

BN8

DDR1_DQ_7/DDR0_DQ_23

BL12

DDR1_DQ_8/DDR0_DQ_24

BL11

DDR1_DQ_9/DDR0_DQ_25

BL8

DDR1_DQ_10/DDR0_DQ_26

BJ8

DDR1_DQ_11/DDR0_DQ_27

BJ11

DDR1_DQ_12/DDR0_DQ_28

BJ10

DDR1_DQ_13/DDR0_DQ_29

BL7

DDR1_DQ_14/DDR0_DQ_30

BJ7

DDR1_DQ_15/DDR0_DQ_31

BG11

DDR1_DQ_16/DDR0_DQ_48

BG10

DDR1_DQ_17/DDR0_DQ_49

BG8

DDR1_DQ_18/DDR0_DQ_50

BF8

DDR1_DQ_19/DDR0_DQ_51

BF11

DDR1_DQ_20/DDR0_DQ_52

BF10

DDR1_DQ_21/DDR0_DQ_53

BG7

DDR1_DQ_22/DDR0_DQ_54

BF7

DDR1_DQ_23/DDR0_DQ_55

BB11

DDR1_DQ_24/DDR0_DQ_56

BC11

DDR1_DQ_25/DDR0_DQ_57

BB8

DDR1_DQ_26/DDR0_DQ_58

BC8

DDR1_DQ_27/DDR0_DQ_59

BC10

DDR1_DQ_28/DDR0_DQ_60

BB10

DDR1_DQ_29/DDR0_DQ_61

BC7

DDR1_DQ_30/DDR0_DQ_62

BB7

DDR1_DQ_31/DDR0_DQ_63

AA11

DDR1_DQ_32/DDR1_DQ_16

AA10

DDR1_DQ_33/DDR1_DQ_17

AC11

DDR1_DQ_34/DDR1_DQ_18

AC10

DDR1_DQ_35/DDR1_DQ_19

AA7

DDR1_DQ_36/DDR1_DQ_20

AA8

DDR1_DQ_37/DDR1_DQ_21

AC8

DDR1_DQ_38/DDR1_DQ_22

AC7

DDR1_DQ_39/DDR1_DQ_23

W8

DDR1_DQ_40/DDR1_DQ_24

W7

DDR1_DQ_41/DDR1_DQ_25

V10

DDR1_DQ_42/DDR1_DQ_26

V11

DDR1_DQ_43/DDR1_DQ_27

W11

DDR1_DQ_44/DDR1_DQ_28

W10

DDR1_DQ_45/DDR1_DQ_29

V7

DDR1_DQ_46/DDR1_DQ_30

V8

DDR1_DQ_47/DDR1_DQ_31

R11

DDR1_DQ_48/DDR1_DQ_48

P11

DDR1_DQ_49/DDR1_DQ_49

P7

DDR1_DQ_50/DDR1_DQ_50

R8

DDR1_DQ_51/DDR1_DQ_51

R10

DDR1_DQ_52/DDR1_DQ_52

P10

DDR1_DQ_53/DDR1_DQ_53

R7

DDR1_DQ_54/DDR1_DQ_54

P8

DDR1_DQ_55/DDR1_DQ_55

L11

DDR1_DQ_56/DDR1_DQ_56

M11

DDR1_DQ_57/DDR1_DQ_57

L7

DDR1_DQ_58/DDR1_DQ_58

M8

DDR1_DQ_59/DDR1_DQ_59

L10

DDR1_DQ_60/DDR1_DQ_60

M10

DDR1_DQ_61/DDR1_DQ_61

M7

DDR1_DQ_62/DDR1_DQ_62

L8

DDR1_DQ_63/DDR1_DQ_63

AW11

NC/DDR1_ECC_0

AY11

NC/DDR1_ECC_1

AY8

NC/DDR1_ECC_2

AW8

NC/DDR1_ECC_3

AY10

NC/DDR1_ECC_4

AW10

NC/DDR1_ECC_5

AY7

NC/DDR1_ECC_6

AW7

NC/DDR1_ECC_7

G1

DDR_RCOMP_0

H1

DDR_RCOMP_1

J2

DDR_RCOMP_2

CPU_CFL-H_1440P

2 OF 13

DDR CHANNEL B

DDR1_CKP_0/DDR1_CKP_0
DDR1_CKN_0/DDR1_CKN_0
DDR1_CKP_1/DDR1_CKP_1
DDR1_CKN_1/DDR1_CKN_1

NC/DDR1_CKP_2
NC/DDR1_CKN_2
NC/DDR1_CKP_3
NC/DDR1_CKN_3

DDR1_CKE_0/DDR1_CKE_0
DDR1_CKE_1/DDR1_CKE_1
DDR1_CKE_2/DDR1_CKE_2
DDR1_CKE_3/DDR1_CKE_3

DDR1_CS#_0/DDR1_CS#_0
DDR1_CS#_1/DDR1_CS#_1

NC/DDR1_CS#_2
NC/DDR1_CS#_3

DDR1_ODT_0/DDR1_ODT_0

NC/DDR1_ODT_1
NC/DDR1_ODT_2
NC/DDR1_ODT_3

DDR1_CAB_3/DDR1_MA_16
DDR1_CAB_2/DDR1_MA_14
DDR1_CAB_1/DDR1_MA_15

DDR1_CAB_4/DDR1_BA_0
DDR1_CAB_6/DDR1_BA_1

DDR1_CAA_5/DDR1_BG_0
DDR1_CAB_9/DDR1_MA_0

DDR1_CAB_8/DDR1_MA_1
DDR1_CAB_5/DDR1_MA_2

NC/DDR1_MA_3

NC/DDR1_MA_4
DDR1_CAA_0/DDR1_MA_5
DDR1_CAA_2/DDR1_MA_6
DDR1_CAA_4/DDR1_MA_7

DDR1_CAA_3/DDR1_MA_8
DDR1_CAA_1/DDR1_MA_9

DDR1_CAB_7/DDR1_MA_10
DDR1_CAA_7/DDR1_MA_11
DDR1_CAA_6/DDR1_MA_12
DDR1_CAB_0/DDR1_MA_13

DDR1_CAA_9/DDR1_BG_1
DDR1_CAA_8/DDR1_ACT#

NC/DDR1_PAR

NC/DDR1_ALERT#

DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSN_7/DDR1_DQSN_7

DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSP_7/DDR1_DQSP_7

DDR1_DQSP_8/DDR1_DQSP_8

DDR1_DQSN_8/DDR1_DQSN_8

DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ

AM9
AN9
AM7
AM8
AM11
AM10
AJ10
AJ11

AT8
AT10
AT7
AT11

AF11
AE7
AF10
AE10

AF7
AE8
AE9
AE11

M_B_A16

AH10

M_B_A14

AH11

M_B_A15

AF8
AH8

AH9
AR9

M_B_A0

AJ9
AK6

M_B_A2

AK5

M_B_A3

AL5

M_B_A4

AL6

M_B_A5

AM6

M_B_A6

AN7

M_B_A7

AN10

M_B_A8

AN8

M_B_A9

AR11

M_B_A10

AH7

M_B_A11

AN11

M_B_A12

AR10

M_B_A13

AF9
AR7
AT9

AJ7
AR8

M_B_DQSN0

BN9

M_B_DQSN1

BL9

M_B_DQSN2

BG9

M_B_DQSN3

BC9

M_B_DQSN4

AC9

M_B_DQSN5

W9

M_B_DQSN6

R9

M_B_DQSN7

M9
BP9

M_B_DQSP1

BJ9

M_B_DQSP2

BF9

M_B_DQSP3

BB9

M_B_DQSP4

AA9

M_B_DQSP5

V9

M_B_DQSP6

P9

M_B_DQSP7

L9

M_B_DQSP8

AW9

M_B_DQSN8

AY9

SMDDR_VREF_CA

BN13

SMDDR_VREF_DQ0_M3

BP13

SMDDR_VREF_DQ1_M3

BR13

M_B_DIM0_CLKP0 [18]
M_B_DIM0_CLKN0 [18]
M_B_DIM0_CLKP1 [18]
M_B_DIM0_CLKN1 [18]

M_B_DIM1_CLKP0 [20]
M_B_DIM1_CLKN0 [20]
M_B_DIM1_CLKP1 [20]
M_B_DIM1_CLKN1 [20]

M_B_CKE0 [18]
M_B_CKE1 [18]
M_B_CKE2 [20]
M_B_CKE3 [20]

M_B_CS#0 [18]
M_B_CS#1 [18]
M_B_CS#2 [20]
M_B_CS#3 [20]

M_B_ODT0 [18]
M_B_ODT1 [18]
M_B_ODT2 [20]
M_B_ODT3 [20]

M_B_A16 [18,20]
M_B_A14 [18,20]
M_B_A15 [18,20]

M_B_BS#0 [18,20]
M_B_BS#1 [18,20]

M_B_BG#0 [18,20]

M_B_A[13:0] [18,20]

M_B_BG#1 [18,20]
DDRB_ACT# [18,20]

DDR1_PAR [18,20]
DDR1_ALERT# [18,20]

M_B_DQSN0 [18,20]
M_B_DQSN1 [18,20]
M_B_DQSN2 [18,20]
M_B_DQSN3 [18,20]
M_B_DQSN4 [18,20]
M_B_DQSN5 [18,20]
M_B_DQSN6 [18,20]
M_B_DQSN7 [18,20]

M_B_DQSP1 [18,20]
M_B_DQSP2 [18,20]
M_B_DQSP3 [18,20]
M_B_DQSP4 [18,20]
M_B_DQSP5 [18,20]
M_B_DQSP6 [18,20]
M_B_DQSP7 [18,20]

M_B_DQSP8 [18,20]
M_B_DQSN8 [18,20]

SMDDR_VREF_CA [17]

TP9

SMDDR_VREF_DQ1_M3 [18]

04

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

CFL 3/7 (DDR4 I/F)

CFL 3/7 (DDR4 I/F)

CFL 3/7 (DDR4 I/F)

ZGE

ZGE

ZGE

1A

1A

4 78Friday, May 03, 2019

4 78Friday, May 03, 2019

1

4 78Friday, May 03, 2019

1A

5

4

3

2

1

VCCGT
Edge cap

4x 47uF 0805
7x 22uF 0603

CFL Processor (POWER)

05

Backside cap
10x 10uF 0402

D D

12x 1uF 0201

C C

B B

R686

Close CPU

+VCC_GT

*short_0805

Modify 8/15

A A

+VCC_GT +VCC_GT

U3K

AT14
AT31
AT32
AT33
AT34
AT35
AT36
AT37
AT38

AU14
AU29
AU30
AU31
AU32
AU35
AU36
AU37
AU38
AV29
AV30
AV31
AV32
AV33
AV34
AV35

AV36
AW14
AW31
AW32
AW33
AW34
AW35
AW36
AW37
AW38

AY29

AY30

AY31

AY32

AY35

AY36

AY37

AY38

BA13

BA14

BA29

BA30

BA31

BA32

BA33

BA34

BA35

BA36

BB13

BB14

BB31

BB32

BB33

BB34

BB35

BB36

BB37

BB38
BC29
BC30
BC31
BC32
BC35
BC36
BC37
BC38
BD13
BD14
BD29
BD30
BD31
BD32
BD33
BD34
BP37
BP38
BR15
BR16
BR17

CPU_CFL-H_1440P

VCCGT1
VCCGT2
VCCGT3
VCCGT4
VCCGT5
VCCGT6
VCCGT7
VCCGT8
VCCGT9
VCCGT10
VCCGT11
VCCGT12
VCCGT13
VCCGT14
VCCGT15
VCCGT16
VCCGT17
VCCGT18
VCCGT19
VCCGT20
VCCGT21
VCCGT22
VCCGT23
VCCGT24
VCCGT25
VCCGT26
VCCGT27
VCCGT28
VCCGT29
VCCGT30
VCCGT31
VCCGT32
VCCGT33
VCCGT34
VCCGT35
VCCGT36
VCCGT37
VCCGT38
VCCGT39
VCCGT40
VCCGT41
VCCGT42
VCCGT43
VCCGT44
VCCGT45
VCCGT46
VCCGT47
VCCGT48
VCCGT49
VCCGT50
VCCGT51
VCCGT52
VCCGT53
VCCGT54
VCCGT55
VCCGT56
VCCGT57
VCCGT58
VCCGT59
VCCGT60
VCCGT61
VCCGT62
VCCGT63
VCCGT64
VCCGT65
VCCGT66
VCCGT67
VCCGT68
VCCGT69
VCCGT70
VCCGT71
VCCGT72
VCCGT73
VCCGT74
VCCGT75
VCCGT76
VCCGT77
VCCGT78
VCCGT79
VCCGT159
VCCGT160
VCCGT161
VCCGT162
VCCGT163

11 OF 13

VCCGT80
VCCGT81
VCCGT82
VCCGT83
VCCGT84
VCCGT85
VCCGT86
VCCGT87
VCCGT88
VCCGT89
VCCGT90
VCCGT91
VCCGT92
VCCGT93
VCCGT94
VCCGT95
VCCGT96
VCCGT97
VCCGT98

VCCGT99
VCCGT100
VCCGT101
VCCGT102
VCCGT103
VCCGT104
VCCGT105
VCCGT106
VCCGT107
VCCGT108
VCCGT109
VCCGT110
VCCGT111
VCCGT112
VCCGT113
VCCGT114
VCCGT115
VCCGT116
VCCGT117
VCCGT118
VCCGT119
VCCGT120
VCCGT121
VCCGT122
VCCGT123
VCCGT124
VCCGT125
VCCGT126
VCCGT127
VCCGT128
VCCGT129
VCCGT130
VCCGT131
VCCGT132
VCCGT133
VCCGT134
VCCGT135
VCCGT136
VCCGT137
VCCGT138
VCCGT139
VCCGT140
VCCGT141
VCCGT142
VCCGT143
VCCGT144
VCCGT145
VCCGT146
VCCGT147
VCCGT148
VCCGT149
VCCGT150
VCCGT151
VCCGT152
VCCGT153
VCCGT154
VCCGT155
VCCGT156
VCCGT157
VCCGT158
VCCGT164
VCCGT165
VCCGT166
VCCGT167
VCCGT168

VSSGT_SENSE
VCCGT_SENSE

BD35
BD36
BE31
BE32
BE33
BE34
BE35
BE36
BE37
BE38
BF13
BF14
BF29
BF30
BF31
BF32
BF35
BF36
BF37
BF38
BG29
BG30
BG31
BG32
BG33
BG34
BG35
BG36
BH33
BH34
BH35
BH36
BH37
BH38
BJ16
BJ17
BJ19
BJ20
BJ21
BJ23
BJ24
BJ26
BJ27
BJ37
BJ38
BK16
BK17
BK19
BK20
BK21
BK23
BK24
BK26
BK27
BL15
BL16
BL17
BL23
BL24
BL25
BL26
BL27
BL28
BL36
BL37
BM15
BM16
BM17
BM36
BM37
BN15
BN16
BN17
BN36
BN37
BN38
BP15
BP16
BP17
BR37
BT15
BT16
BT17
BT37

AH37
AH38

VGT_VSSSENSE
VGT_VCCSENSE

TP2
TP1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

CFL 4/7 (POWER)

CFL 4/7 (POWER)

CFL 4/7 (POWER)

ZGE

ZGE

ZGE

1A

1A

5 78Friday, May 03, 2019

5 78Friday, May 03, 2019

5 78Friday, May 03, 2019

1

1A

5

4

3

2

1

Follow CFL H EDS page 128 to 45W(GT2): VCCSA=11.1A

+VCC_SA
Edge cap

D D

2x 47uF 0805
2x 22uF 0805

C611
22u/6.3V_6

Close CPU

C620
22u/6.3V_6

C643
47u/6.3V_8

C631
47u/6.3V_8

Backside cap
7x 10uF 0402

C591
10u/6.3V_4

Under CPU

0621Bear

C605
10u/6.3V_4

C598
10u/6.3V_4

C575

1u/6.3V_4

C584
10u/6.3V_4

C547
10u/6.3V_4

+VCCIO

C574
10u/6.3V_4

C562
10u/6.3V_4

Follow CFL H EDS P128 to 45W:
VCCIO,

C C

+VCCIO = 6.4A

+VCC_IO

C618
10u/6.3V_4

C638
10u/6.3V_4

Under CPU

C608
10u/6.3V_4

Backside cap
3x 10uF 0402

+1V_SUS

*0_5%_6

+VCCSTG

B B

R688

R689

modify 8/9

*short_0603

+VCCIO

+VCC_SA

AG12

U3L

J30

VCCSA1

K29

VCCSA2

K30

VCCSA3

K31

VCCSA4

K32

VCCSA5

K33

VCCSA6

K34

VCCSA7

K35

VCCSA8

L31

VCCSA9

L32

VCCSA10

L35

VCCSA11

L36

VCCSA12

L37

VCCSA13

L38

VCCSA14

M29

VCCSA15

M30

VCCSA16

M31

VCCSA17

M32

VCCSA18

M33

VCCSA19

M34

VCCSA20

M35

VCCSA21

M36

VCCSA22

VCCIO1

G15

VCCIO2

G17

VCCIO3

G19

VCCIO4

G21

VCCIO5

H15

VCCIO6

H16

VCCIO7

H17

VCCIO8

H19

VCCIO9

H20

VCCIO10

H21

VCCIO11

H26

VCCIO12

H27

VCCIO13

J15

VCCIO14

J16

VCCIO15

J17

VCCIO16

J19

VCCIO17

J20

VCCIO18

J21

VCCIO19

J26

VCCIO20

J27

VCCIO21

CPU_CFL-H_1440P

11.1 A

6.4 A

12 OF 13

3.3 A

0.13 A

0.06 A

0.02 A

0.15 A

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VDDQ19
VDDQ20
VDDQ21
VDDQ22
VDDQ23
VDDQ24
VDDQ25

VCCPLL_OC1
VCCPLL_OC2
VCCPLL_OC3

VCCST

VCCSTG2
VCCSTG1

VCCPLL1
VCCPLL2

VCCSA_SENSE

VSSSA_SENSE

VCCIO_SENSE

VSSIO_SENSE

AA6
AE12
AF5
AF6
AG5
AG9
AJ12
AL11
AP6
AP7
AR12
AR6
AT12
AW6
AY6
J5
J6
K12
K6
L12
L6
R6
T6
W6
Y12

BH13
BJ13
G11

H30
H29
G30
H28

J28

M38
M37

H14
J14

Follow CFL H EDS page 127 45W: VDDQ=3.3A (LPDDR4)

+1.2VSUS

C662
22u/6.3V_6

C303
22u/6.3V_6

Under CPU

C96
22u/6.3V_6

C663
22u/6.3V_6

VDDQ
Backside cap

4x 22uF 0603
11x 10uF 0402

C667
10u/6.3V_4

C140
10u/6.3V_4

C123
10u/6.3V_4

C666
10u/6.3V_4

C654
10u/6.3V_4

C122
10u/6.3V_4

C658
10u/6.3V_4

C651
10u/6.3V_4

C97
10u/6.3V_4

C668
10u/6.3V_4

VCC_PLL_OC

+VCCPLL_OC

+VCCST

modify 8/9

Backside cap
2x 1uF 0201

VCC_ST

VCCSA_VCCSENSE [65]

VCCIO_VCCSENSE
VSSIO_VCCSENSE

VCCSA_VSSSENSE [65]

modify 8/22

+VCCSTG

+VCCPLL

TP63
TP64

C555
1u/10V_2

Backside cap
1x 1uF 0201

VccSTG
Backside cap

1x 1uF 0201

VCC_PLL

C98
10u/6.3V_4

06

Backside cap

Under CPU

+VCCSTG +VCCPLL_OC +VCCPLL+VCCIO

R110

+VCCPLL_OC+1.2VSUS

*short_0603

4x 22uF 0603
11x 10uF 0404

+VCCST

modify 8/9

C93
22u/6.3V_6

+VCCPLL

C537
22u/6.3V_6

C559
22u/6.3V_6

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

CFL 5/7 (POWER&GND )

CFL 5/7 (POWER&GND )

CFL 5/7 (POWER&GND )

ZGE

ZGE

ZGE

6 78Friday, May 03, 2019

6 78Friday, May 03, 2019

6 78Friday, May 03, 2019

1

1A

1A

1A

C630

C582

1u/10V_2

A A

5

C648

22u/6.3V_6

C659

1u/10V_2

C649

1u/10V_2

modify 8/3

C641

1u/6.3V_4

4

*1u/6.3V_4

C625

*1u/6.3V_4

C589

1u/10V_2

C594
22u/6.3V_6

+1V_SUS

R690

R685

3

*short_0603

*short_0603

5

4

3

2

1

W35
W36
W37
W38
Y29
Y30
Y31
Y32
Y33
Y34
Y35
Y36

07

Vcc (VCC_CORE)
Edge cap

8 x 47uF 0805

D D

C C

B B

A A

Backside cap
12x 22uF 0603
42x 10uF 0402
48x 1uF 0201
24x 0201 (placeholder)

Under CPU

C612

C622
22u/6.3V_6

C604
22u/6.3V_6

C558
10u/6.3V_4

C567
10u/6.3V_4

C652
*10u/6.3V_4

22u/6.3V_6

C602
22u/6.3V_6

C580
10u/6.3V_4

C573
10u/6.3V_4

C637
10u/6.3V_4

C627
22u/6.3V_6

C621
22u/6.3V_6

C587
10u/6.3V_4

C554
10u/6.3V_4

C585
*10u/6.3V_4

Follow CFL H EDS page 124 to 45W(GT2): VCC_CORE=96A

Close CPU

C644
47u/6.3V_8

C636
22u/6.3V_6

C614
22u/6.3V_6

C569
10u/6.3V_4

C568
10u/6.3V_4

C607
10u/6.3V_4

modify 8/9

C632
47u/6.3V_8

C623
22u/6.3V_6

C596
10u/6.3V_4

C590
10u/6.3V_4

C578
10u/6.3V_4

C629
*10u/6.3V_4

C645
47u/6.3V_8

C617
22u/6.3V_6

C557
10u/6.3V_4

C600
10u/6.3V_4

C595
10u/6.3V_4

C615
10u/6.3V_4

C646
47u/6.3V_8

C613
22u/6.3V_6

C588
10u/6.3V_4

C609
10u/6.3V_4

C586
10u/6.3V_4

C634
*47u/6.3V_8

+VCC_CORE +VCC_CORE

U3I

AA13

C647
47u/6.3V_8

C603
22u/6.3V_6

C581
10u/6.3V_4

C593
10u/6.3V_4

C583
10u/6.3V_4

C597
10u/6.3V_4

C633
*47u/6.3V_8

AA31
AA32
AA33
AA34
AA35
AA36
AA37
AA38
AB29
AB30
AB31
AB32
AB35
AB36
AB37
AB38
AC13
AC14
AC29
AC30
AC31
AC32
AC33
AC34
AC35
AC36
AD13
AD14
AD31
AD32
AD33
AD34
AD35
AD36
AD37
AD38
AE13
AE14
AE30
AE31
AE32
AE35
AE36
AE37
AE38
AF29
AF30
AF31
AF32
AF33
AF34
AF35
AF36
AF37
AF38
AG14
AG31
AG32
AG33
AG34
AG35
AG36

VCC#AA13
VCC#AA31
VCC#AA32
VCC#AA33
VCC#AA34
VCC#AA35
VCC#AA36
VCC#AA37
VCC#AA38
VCC#AB29
VCC#AB30
VCC#AB31
VCC#AB32
VCC#AB35
VCC#AB36
VCC#AB37
VCC#AB38
VCC#AC13
VCC#AC14
VCC#AC29
VCC#AC30
VCC#AC31
VCC#AC32
VCC#AC33
VCC#AC34
VCC#AC35
VCC#AC36
VCC#AD13
VCC#AD14
VCC#AD31
VCC#AD32
VCC#AD33
VCC#AD34
VCC#AD35
VCC#AD36
VCC#AD37
VCC#AD38
VCC#AE13
VCC#AE14
VCC#AE30
VCC#AE31
VCC#AE32
VCC#AE35
VCC#AE36
VCC#AE37
VCC#AE38
VCC#AF29
VCC#AF30
VCC#AF31
VCC#AF32
VCC#AF33
VCC#AF34
VCC#AF35
VCC#AF36
VCC#AF37
VCC#AF38
VCC#AG14
VCC#AG31
VCC#AG32
VCC#AG33
VCC#AG34
VCC#AG35
VCC#AG36

CPU_CFL-H_1440P

9 OF 13

VCC#AH13
VCC#AH14
VCC#AH29
VCC#AH30
VCC#AH31

VCC#AH32
VCC#AJ14
VCC#AJ29
VCC#AJ30
VCC#AJ31
VCC#AJ32
VCC#AJ33
VCC#AJ34
VCC#AJ35
VCC#AJ36

VCC#AK31

VCC#AK32
VCC#AK33

VCC#AK34
VCC#AK35
VCC#AK36
VCC#AK37
VCC#AK38

VCC#AL13

VCC#AL29

VCC#AL30

VCC#AL31

VCC#AL32

VCC#AL35

VCC#AL36

VCC#AL37

VCC#AL38
VCC#AM13
VCC#AM14
VCC#AM29
VCC#AM30
VCC#AM31
VCC#AM32
VCC#AM33
VCC#AM34
VCC#AM35
VCC#AM36

VCC#AN13

VCC#AN14

VCC#AN31

VCC#AN32
VCC#AN33
VCC#AN34
VCC#AN35
VCC#AN36
VCC#AN37
VCC#AN38

VCC#AP13

VCC#AP30

VCC#AP31

VCC#AP32
VCC#AP35
VCC#AP36
VCC#AP37
VCC#AP38

VCC#K13

VCC_SENSE
VSS_SENSE

AH13
AH14
AH29
AH30
AH31
AH32
AJ14
AJ29
AJ30
AJ31
AJ32
AJ33
AJ34
AJ35
AJ36
AK31
AK32
AK33
AK34
AK35
AK36
AK37
AK38
AL13
AL29
AL30
AL31
AL32
AL35
AL36
AL37
AL38
AM13
AM14
AM29
AM30
AM31
AM32
AM33
AM34
AM35
AM36
AN13
AN14
AN31
AN32
AN33
AN34
AN35
AN36
AN37
AN38
AP13
AP30
AP31
AP32
AP35
AP36
AP37
AP38
K13

AG37
AG38

VCCSENSE
VSSSENSE

Under CPU

C542
1u/10V_2

C545
1u/10V_2

C565
1u/10V_2

C599
*10u/6.3V_4

C40
*1u/10V_2

C47
*1u/10V_2

+VCC_CORE

C656

C553

1u/10V_2

1u/10V_2

C556

C560
1u/10V_2

1u/10V_2

C544

C552

1u/10V_2

1u/10V_2

C576
*10u/6.3V_4

C571

C44

*1u/10V_2

*1u/10V_2

C46

C579

*1u/10V_2

*1u/10V_2

Sense resistor should be placed within 2
inches (50.8 mm) of the processor socket

Trace Impendence 50 ohm

R32
100_1%_4

VCCSENSE [65]
VSSSENSE [65]

R31
100_1%_4

C664
1u/10V_2

C566
1u/10V_2

C549
1u/10V_2

C624
*10u/6.3V_4

C38
*1u/10V_2

C577
*1u/10V_2

modify 8/9

C665
1u/10V_2

C548
1u/10V_2

C550
1u/10V_2

C592
*10u/6.3V_4

C36
*1u/10V_2

C39
*1u/10V_2

+VCC_CORE [65,66]

C541
1u/10V_2

C561
1u/10V_2

C570
1u/10V_2

C564
*10u/6.3V_4

C37
*1u/10V_2

C43
*1u/10V_2

C653
1u/10V_2

C546
1u/10V_2

C642
*10u/6.3V_4

C42
*1u/10V_2

C45
*1u/10V_2

C563
1u/10V_2

C540
1u/10V_2

C661
*10u/6.3V_4

C41
*1u/10V_2

C572
*1u/10V_2

C551
1u/10V_2

C543
1u/10V_2

U3J

K14

VCC#K14

L13

VCC#L13

L14

VCC#L14

N13

VCC#N13

N14

VCC#N14

N30

VCC#N30

N31

VCC#N31

N32

VCC#N32

N35

VCC#N35

N36

VCC#N36

N37

VCC#N37

N38

VCC#N38

P13

VCC#P13

P14

VCC#P14

P29

VCC#P29

P30

VCC#P30

P31

VCC#P31

P32

VCC#P32

P33

VCC#P33

P34

VCC#P34

P35

VCC#P35

P36

VCC#P36

R13

VCC#R13

R31

VCC#R31

R32

VCC#R32

R33

VCC#R33

R34

VCC#R34

R35

VCC#R35

R36

VCC#R36

R37

VCC#R37

R38

VCC#R38

T29

VCC#T29

T30

VCC#T30

T31

VCC#T31

T32

VCC#T32

T35

VCC#T35

T36

VCC#T36

T37

VCC#T37

T38

VCC#T38

U29

VCC#U29

U30

VCC#U30

U31

VCC#U31

U32

VCC#U32

U33

VCC#U33

U34

VCC#U34

U35

VCC#U35

U36

VCC#U36

V13

VCC#V13

V14

VCC#V14

V31

VCC#V31

V32

VCC#V32

V33

VCC#V33

V34

VCC#V34

V35

VCC#V35

V36

VCC#V36

V37

VCC#V37

V38

VCC#V38

W13

VCC#W13

W14

VCC#W14

W29

VCC#W29

W30

VCC#W30

W31

VCC#W31

W32

VCC#W32

CPU_CFL-H_1440P

Need to check/modify

10 OF 13

VCC#W35
VCC#W36
VCC#W37
VCC#W38

VCC#Y29
VCC#Y30
VCC#Y31
VCC#Y32
VCC#Y33
VCC#Y34
VCC#Y35
VCC#Y36

+VCC_CORE +VCC_CORE

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

CFL 6/7 (POWER&GND )

CFL 6/7 (POWER&GND )

CFL 6/7 (POWER&GND )

ZGE

ZGE

ZGE

7 78Friday, May 03, 2019

7 78Friday, May 03, 2019

1

7 78Friday, May 03, 2019

1A

1A

1A

5

4

3

2

1

CFL-H Processor (GND)

U3F

A10

VSS_1

A12

VSS_2

A16

VSS_3

A18

VSS_4

A20

VSS_5

A22

VSS_6

A24

VSS_7

D D

C C

B B

A26

VSS_8

A28

VSS_9

A30

VSS_10

A6

VSS_11

A9

VSS_12

AA12

VSS_13

AA29

VSS_14

AA30

VSS_15

AB33

VSS_16

AB34

VSS_17

AB6

VSS_18

AC1

VSS_19

AC12

VSS_20

AC2

VSS_21

AC3

VSS_22

AC37

VSS_23

AC38

VSS_24

AC4

VSS_25

AC5

VSS_26

AC6

VSS_27

AD10

VSS_28

AD11

VSS_29

AD12

VSS_30

AD29

VSS_31

AD30

VSS_32

AD6

VSS_33

AD8

VSS_34

AD9

VSS_35

AE33

VSS_36

AE34

VSS_37

AE6

VSS_38

AF1

VSS_39

AF12

VSS_40

AF13

VSS_41

AF14

VSS_42

AF2

VSS_43

AF3

VSS_44

AF4

VSS_45

AG10

VSS_46

AG11

VSS_47

AG13

VSS_48

AG29

VSS_49

AG30

VSS_50

AG6

VSS_51

AG7

VSS_52

AG8

VSS_53

AH12

VSS_54

AH33

VSS_55

AH34

VSS_56

AH35

VSS_57

AH36

VSS_58

AH6

VSS_59

AJ1

VSS_60

AJ13

VSS_61

AJ2

VSS_62

AJ3

VSS_63

AJ37

VSS_64

AJ38

VSS_65

AJ4

VSS_66

AJ5

VSS_67

AJ6

VSS_68

W4

VSS_69

W5

VSS_70

Y10

VSS_71

Y11

VSS_72

Y13

VSS_73

Y14

VSS_74

Y37

VSS_75

Y38

VSS_76

Y7

VSS_77

Y8

VSS_78

Y9

VSS_79

AK29

VSS_80

AK30

VSS_81

CPU_CFL-H_1440P

6 OF 13

VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162

AK4
AL10
AL12
AL14
AL33
AL34
AL4
AL7
AL8
AL9
AM1
AM12
AM2
AM3
AM37
AM38
AM4
AM5
AN12
AN29
AN30
AN5
AN6
AP10
AP11
AP12
AP33
AP34
AP8
AP9
AR1
AR13
AR14
AR2
AR29
AR3
AR30
AR31
AR32
AR33
AR34
AR35
AR36
AR37
AR38
AR4
AR5
AT29
AT30
AT6
AU10
AU11
AU12
AU33
AU34
AU6
AU7
AU8
AU9
AV37
AV38
AW1
AW12
AW2
AW29
AW3
AW30
AW4
U6
V12
V29
V30
A14
AD7
V6
W1
W12
W2
W3
W33
W34

U3G

AW5

VSS_163

AY12

VSS_164

AY33

VSS_165

AY34

VSS_166

B9

VSS_167

BA10

VSS_168

BA11

VSS_169

BA12

VSS_170

BA37

VSS_171

BA38

VSS_172

BA6

VSS_173

BA7

VSS_174

BA8

VSS_175

BA9

VSS_176

BB1

VSS_177

BB12

VSS_178

BB2

VSS_179

BB29

VSS_180

BB3

VSS_181

BB30

VSS_182

BB4

VSS_183

BB5

VSS_184

BB6

VSS_185

BC12

VSS_186

BC13

VSS_187

BC14

VSS_188

BC33

VSS_189

BC34

VSS_190

BC6

VSS_191

BD10

VSS_192

BD11

VSS_193

BD12

VSS_194

BD37

VSS_195

BD6

VSS_196

BD7

VSS_197

BD8

VSS_198

BD9

VSS_199

BE1

VSS_200

BE2

VSS_201

BE29

VSS_202

BE3

VSS_203

BE30

VSS_204

BE4

VSS_205

BE5

VSS_206

BE6

VSS_207

BF12

VSS_208

BF33

VSS_209

BF34

VSS_210

BF6

VSS_211

BG12

VSS_212

BG13

VSS_213

BG14

VSS_214

BG37

VSS_215

BG38

VSS_216

BG6

VSS_217

BH1

VSS_218

BH10

VSS_219

BH11

VSS_220

BH12

VSS_221

BH14

VSS_222

BH2

VSS_223

BH3

VSS_224

BH4

VSS_225

BH5

VSS_226

BH6

VSS_227

BH7

VSS_228

BH8

VSS_229

BH9

VSS_230

T2

VSS_231

T3

VSS_232

T33

VSS_233

T34

VSS_234

T4

VSS_235

T5

VSS_236

T7

VSS_237

T8

VSS_238

T9

VSS_239

U37

VSS_240

U38

VSS_241

BJ12

VSS_242

BJ14

VSS_243

CPU_CFL-H_1440P

7 OF 13

VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324

BJ15
BJ18
BJ22
BJ25
BJ29
BJ30
BJ31
BJ32
BJ33
BJ34
BJ35
BJ36
BK13
BK14
BK15
BK18
BK22
BK25
BK29
BK6
BL13
BL14
BL18
BL19
BL20
BL21
BL22
BL29
BL33
BL35
BL38
BL6
BM11
BM12
BM13
BM14
BM18
BM2
BM21
BM22
BM23
BM24
BM25
BM26
BM27
BM28
BM29
BM3
BM33
BM35
BM38
BM5
BM6
BM7
BM8
BM9
BN12
BN14
BN18
BN19
BN2
BN20
BN21
BN24
BN29
BN30
BN31
BN34
P38
P6
R12
R29
AY14
BD38
R30
T1
T10
T11
T12
T13
T14

U3H

BN4

VSS_325

BN7

VSS_326

BP12

VSS_327

BP14

VSS_328

BP18

VSS_329

BP21

VSS_330

BP24

VSS_331

BP25

VSS_332

BP26

VSS_333

BP29

VSS_334

BP33

VSS_335

BP34

VSS_336

BP7

VSS_337

BR12

VSS_338

BR14

VSS_339

BR18

VSS_340

BR21

VSS_341

BR24

VSS_342

BR25

VSS_343

BR26

VSS_344

BR29

VSS_345

BR34

VSS_346

BR36

VSS_347

BR7

VSS_348

BT12

VSS_349

BT14

VSS_350

BT18

VSS_351

BT21

VSS_352

BT24

VSS_353

BT26

VSS_354

BT29

VSS_355

BT32

VSS_356

BT5

VSS_357

C11

VSS_358

C13

VSS_359

C15

VSS_360

C17

VSS_361

C19

VSS_362

C21

VSS_363

C23

VSS_364

C25

VSS_365

C27

VSS_366

C29

VSS_367

C31

VSS_368

C37

VSS_369

C5

VSS_370

C8

VSS_371

C9

VSS_372

D10

VSS_373

D12

VSS_374

D14

VSS_375

D16

VSS_376

D18

VSS_377

D20

VSS_378

D22

VSS_379

D24

VSS_380

D26

VSS_381

D28

VSS_382

D3

VSS_383

D30

VSS_384

D33

VSS_385

D6

VSS_386

D9

VSS_387

E34

VSS_388

E35

VSS_389

E38

VSS_390

E4

VSS_391

E9

VSS_392

N3

VSS_393

N33

VSS_394

N34

VSS_395

N4

VSS_396

N5

VSS_397

N6

VSS_398

N7

VSS_399

N8

VSS_400

N9

VSS_401

P12

VSS_402

P37

VSS_403

M14

VSS_404

M6

VSS_405

N1

VSS_406

F11

VSS_407

F13

VSS_408

CPU_CFL-H_1440P

8 OF 13

VSS_409
VSS_410
VSS_411
VSS_412
VSS_413
VSS_414
VSS_415
VSS_416
VSS_417
VSS_418
VSS_419
VSS_420
VSS_421
VSS_422
VSS_423
VSS_424
VSS_425
VSS_426
VSS_427
VSS_428
VSS_429
VSS_430
VSS_431
VSS_432
VSS_433
VSS_434
VSS_435
VSS_436
VSS_437
VSS_438
VSS_439
VSS_440
VSS_441
VSS_442
VSS_443
VSS_444
VSS_445
VSS_446
VSS_447
VSS_448
VSS_449
VSS_450
VSS_451
VSS_452
VSS_453
VSS_454
VSS_455
VSS_456
VSS_457
VSS_458
VSS_459
VSS_460
VSS_461
VSS_462
VSS_463
VSS_464
VSS_465
VSS_466
VSS_467
VSS_468
VSS_469
VSS_470
VSS_471
VSS_472
VSS_473
VSS_474
VSS_475
VSS_476
VSS_477
VSS_478
VSS_479

VSS_A3

VSS_A34

VSS_A4
VSS_B3

VSS_B37

VSS_BR38

VSS_BT3
VSS_BT35
VSS_BT36

VSS_BT4

VSS_C2

VSS_D38

F15
F17
F19
F2
F21
F23
F25
F27
F29
F3
F31
F36
F4
F5
F8
F9
G10
G12
G14
G16
G18
G20
G22
G23
G24
G26
G28
G4
G5
G6
G8
G9
H11
H12
H18
H22
H25
H32
H35
J10
J18
J22
J25
J32
J33
J36
J4
J7
K1
K10
K11
K2
K3
K38
K4
K5
K7
K8
K9
L29
L30
L33
L34
M12
M13
N10
N11
N12
N2
BT8
BR9

A3
A34
A4
B3
B37
BR38
BT3
BT35
BT36
BT4
C2
D38

Need to check

TPEV_PEG_VIEW_2[11]

PCH_2_CPU_TRIG[15]

R48

*Short_0402

CPU_2_PCH_TRIG[15]

R43
*Short_0402

stuff it for CRB 9/20

Configuration Signals:

CFG[0] Stall reset sequence after PCU PLL

lock until de-asserted

CFG[2] PCI Express Static Lane Reversal

eDP enable

CFG[4]

CFG[6:5]

PCI Express Bifurcation

CFL-H Processor (RESERVED, CFG)

U3M

E2

TPEV_PEG_VIEW_2

TP11
TP10

R63

*Short_0402

CPU_2_PCH_TRIG_R

The CFG signals have a default value of '1' if not terminated on the board.

Note that some of the Intel reference designs board might connect CFG[0] to
HOOK[2]. This route is not needed on a OxM board.

x1 = Normal operation
x0 = Lane numbers reversed
x1 = Disabled
x0 = Enabled
x00 = 1 x8 & 2 x4 PCI Express
x01 = reserved
x10 = 2 x8 PCI Express

RSVD_TP5

E3

IST_TRIG

E1

RSVD_TP4

D1

RSVD_TP3

BR1

RSVD_TP1

BT2

RSVD_TP2

BN35

RSVD15

J24

RSVD28

H24

RSVD27

BN33

RSVD14

BL34

RSVD13

N29

RSVD30

R14

RSVD31

AE29

RSVD#AE29

AA14

RSVD1

AP29

RSVD5

AP14

RSVD4

A36

VSS_A36

A37

VSS_A37

H23

PROC_TRIGIN

J23

PROC_TRIGOUT

F30

RSVD24

E30

RSVD23

B30

RSVD7

C30

RSVD21

G3

RSVD26

J3

RSVD29

BR35

RSVD19

BR31

RSVD18

BH30

RSVD9

CPU_CFL-H_1440P

13 OF 13

RSVD11
RSVD10

RSVD12

RSVD3

RSVD25

RSVD22
RSVD20
RSVD17
RSVD16

RSVD8
RSVD6

BK28
BJ28

BL31
AJ8
G13

C38
C1
BR2
BP1
B38
B2

x11 = 1 x16 PCI Express

PEG defer training

CFG[7]

A A

x1 = PEG train follow RESETB de-asseted
x0 = PEG wait for BIOS fro training

08

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

CFL 7/7 (GND)

CFL 7/7 (GND)

CFL 7/7 (GND)

ZGE

ZGE

ZGE

1A

1A

8 78Friday, May 03, 2019

8 78Friday, May 03, 2019

1

8 78Friday, May 03, 2019

1A

5

4

3

2

1

U14B

DMI_TXN0[3]
DMI_TXP0[3]
DMI_RXN0[3]
DMI_RXP0[3]
DMI_TXN1[3]
DMI_TXP1[3]
DMI_RXN1[3]
DMI_RXP1[3]
DMI_TXN2[3]
DMI_TXP2[3]
DMI_RXN2[3]
DMI_RXP2[3]

D D

C C

USB3.0 (DB/IO-1)

USB3.0 (DB/IO-2)

B B

USB3.0 (IO-3/Charger)

USB3.0 (NV Type-C)

DMI_TXN3[3]
DMI_TXP3[3]
DMI_RXN3[3]
DMI_RXP3[3]

USB30_TX1-[60]
USB30_TX1+[60]
USB30_RX1-[60]
USB30_RX1+[60]

USB30_TX2-[60]
USB30_TX2+[60]
USB30_RX2-[60]
USB30_RX2+[60]

USB30_TX3+[46]
USB30_TX3-[46]
USB30_RX3+[46]
USB30_RX3-[46]

USB30_TX4+[44]
USB30_TX4-[44]
USB30_RX4+[44]
USB30_RX4-[44]

K34

DMI0_RXN

J35

DMI0_RXP

C33

DMI0_TXN

B33

DMI0_TXP

G33

DMI1_RXN

F34

DMI1_RXP

C32

DMI1_TXN

B32

DMI1_TXP

K32

DMI2_RXN

J32

DMI2_RXP

C31

DMI2_TXN

B31

DMI2_TXP

G30

DMI3_RXN

F30

DMI3_RXP

C29

DMI3_TXN

B29

DMI3_TXP

A25

DMI7_TXP

B25

DMI7_TXN

P24

DMI7_RXP

R24

DMI7_RXN

C26

DMI6_TXP

B26

DMI6_TXN

F26

DMI6_RXP

G26

DMI6_RXN

B27

DMI5_TXP

C27

DMI5_TXN

L26

DMI5_RXP

M26

DMI5_RXN

D29

DMI4_TXP

E28

DMI4_TXN

K29

DMI4_RXP

M29

DMI4_RXN

G17

PCIE1_RXN/USB31_7_RXN

F16

PCIE1_RXP/USB31_7_RXP

A17

PCIE1_TXN/USB31_7_TXN

B17

PCIE1_TXP/USB31_7_TXP

R21

PCIE2_RXN/USB31_8_RXN

P21

PCIE2_RXP/USB31_8_RXP

B18

PCIE2_TXN/USB31_8_TXN

C18

PCIE2_TXP/USB31_8_TXP

K18

PCIE3_RXN/USB31_9_RXN

J18

PCIE3_RXP/USB31_9_RXP

B19

PCIE3_TXN/USB31_9_TXN

C19

PCIE3_TXP/USB31_9_TXP

N18

PCIE4_RXN/USB31_10_RXN

R18

PCIE4_RXP/USB31_10_RXP

D20

PCIE4_TXN/USB31_10_TXN

C20

PCIE4_TXP/USB31_10_TXP

F20

PCIE5_RXN

G20

PCIE5_RXP

B21

PCIE5_TXN

A22

PCIE5_TXP

K21

PCIE6_RXN

J21

PCIE6_RXP

D21

PCIE6_TXN

C21

PCIE6_TXP

B23

PCIE7_TXP

C23

PCIE7_TXN

J24

PCIE7_RXP

L24

PCIE7_RXN

F24

PCIE8_RXN

G24

PCIE8_RXP

B24

PCIE8_TXN

C24

PCIE8_TXP

PCH_CFL-H_874P

U14F

F9

USB31_1_TXN

F7

USB31_1_TXP

D11

USB31_1_RXN

C11

USB31_1_RXP

C3

USB31_2_TXN

D4

USB31_2_TXP

B9

USB31_2_RXN

C9

USB31_2_RXP

C17

USB31_6_TXN

C16

USB31_6_TXP

G14

USB31_6_RXN

F14

USB31_6_RXP

C15

USB31_5_TXN

B15

USB31_5_TXP

J13

USB31_5_RXN

K13

USB31_5_RXP

G12

USB31_3_TXP

F11

USB31_3_TXN

C10

USB31_3_RXP

B10

USB31_3_RXN

C14

USB31_4_TXP

B14

USB31_4_TXN

J15

USB31_4_RXP

K16

USB31_4_RXN

PCH_CFL-H_874P

GPP_E9/USB2_OC0#
GPP_E10/USB2_OC1#
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
GPP_F15/USB2_OC4#
GPP_F16/USB2_OC5#
GPP_F17/USB2_OC6#
GPP_F18/USB2_OC7#

USB2_VBUSSENSE

2 OF 13

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS0#

GPP_A6/SERIRQ/ESPI_CS1#

GPP_A7/PIRQA#/ESPI_ALERT0#

GPP_A0/RCIN#/ESPI_ALERT1#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

GPP_K19/SMI#

GPP_K18/NMI#

GPP_E6/SATA_DEVSLP2
GPP_E5/SATA_DEVSLP1
GPP_E4/SATA_DEVSLP0
GPP_F9/SATA_DEVSLP7
GPP_F8/SATA_DEVSLP6
GPP_F7/SATA_DEVSLP5
GPP_F6/SATA_DEVSLP4
GPP_F5/SATA_DEVSLP3

6 OF 13

USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9

USB2P_9
USB2N_10
USB2P_10
USB2N_11
USB2P_11
USB2N_12
USB2P_12
USB2N_13
USB2P_13
USB2N_14
USB2P_14

USB2_COMP

RSVD1

USB2_ID

GPD7

PCIE24_TXP
PCIE24_TXN
PCIE24_RXP
PCIE24_RXN

PCIE23_TXP
PCIE23_TXN
PCIE23_RXP
PCIE23_RXN

PCIE22_TXP
PCIE22_TXN
PCIE22_RXP
PCIE22_RXN

PCIE21_TXP
PCIE21_TXN
PCIE21_RXP
PCIE21_RXN

J3
J2
N13
N15
K4
K3
M10
L9
M1
L2
K7
K6
L4
L3
G4
G5
M6
N8
H3
H2
R10
P9
G1
G2
N3

change to BT to Port14 for CNVi 9/20

N2
E5
F6

USB_OC0#

AH36

USB_OC1#

AL40

USB_OC2#

AJ44

USB_OC3#

AL41

USB_OC4#

AV47

USB_OC5#

AR35

USB_OC6#

AR37

USB_OC7#

AV43

USB2_COMP

F4
F3
U13
G3

PCH_GPD7

BE41
G45

G46
Y41
Y40
G48
G49
W44
W43
H48
H47
U41
U40
F46
G47
R44
T43

ESPI_EC_IO0

BB39

ESPI_EC_IO1

AW37

ESPI_EC_IO2

AV37

ESPI_EC_IO3

BA38

LPC_LFRAME#

BE38
AW35

SERIRQ
LPC_PIRQAB

BA36

SIO_RCIN#

BE39

EC_RST#

BF38

CLK_PCI_EC_R

BB36

CLK_PCI_LPC_R

BB34

EXT_SMI#

T48

PCH_TBT_WAKE#

T47

AH40

DEVSLP1_SSD1

AH35

DEVSLP0_HDD

AL48
AP47

DEVSLP7

AN37
AN46

DEVSLP4_SSD2

AR47
AP48

USBP1­USBP1+
USBP2­USBP2+
USBP3­USBP3+
USBP4­USBP4+
USBP5­USBP5+
USBP6­USBP6+
USBP7­USBP7+
USBP8­USBP8+

R214 113_1%_4
R195 1K_1%_4

R202 1K_1%_4

Modify 8/10

USBP1- [58]
USBP1+ [58]
USBP2- [58]
USBP2+ [58]
USBP3- [46]

USBP3+ [46]

TP75
TP71
TP74
TP73

USBP6- [32]

USBP6+ [32]

USBP7- [54]

USBP7+ [54]

TP69
TP70

TBTA_USB2_D_N [40]

TBTA_USB2_D_P [40]
NV_USB2_D_N [43]
NV_USB2_D_P [43]

modify 12/29

modify 8/3

R107933_5%_4
R110733_5%_4
R108733_5%_4
R107833_5%_4

TP110

R1035 22_1%_4
R1049 22_1%_4

TP28

DEVSLP1_SSD1 [51]

TP101

DEVSLP0_HDD [51]

DEVSLP4_SSD2 [52]

DB/IO-1
DB/IO-2
MB/IO-3

CCD
Metal KB

TBT TypeC1
NV TypeC2

USBP14- [50]
USBP14+ [50]

USB_OC0# [46]
USB_OC1# [58]
USB_OC2# [58]

If OTG is not implemented on the platform,
then USB2_ID and should both be connected
to ground.

PCIE_TXP24_SSD [52]
PCIE_TXN24_SSD [52]
PCIE_RXP24_SSD [52]

PCIE_RXN24_SSD [52]

PCIE_TXP23_SSD [52]
PCIE_TXN23_SSD [52]
PCIE_RXP23_SSD [52]

PCIE_RXN23_SSD [52]

PCIE_TXP22_SSD [52]
PCIE_TXN22_SSD [52]
PCIE_RXP22_SSD [52]
PCIE_RXN22_SSD [52]
PCIE_TXP21_SSD [52]
PCIE_TXN21_SSD [52]
PCIE_RXP21_SSD [52]
PCIE_RXN21_SSD [52]

change PCIE port for RAID 2/1

BT

LPC_LAD0 [50,57]
LPC_LAD1 [50,57]
LPC_LAD2 [50,57]
LPC_LAD3 [50,57]

LPC_LFRAME# [50,57]
SERIRQ [57]

SIO_RCIN# [57]

C918 18p/50V_4

C922 18p/50V_4

SSD1
HDD

(USBP1_TypeA-1)
(USBP2_TypeA-2)
(USBP3_TypeA-3)

(USBP6)
(USBP7)

(USBP9)

(USBP10)

(USBP14)

SSD2 PCIE x4

CLK_PCI_EC [57]
CLK_PCI_LPC [50]

SSD2

EMI RESERVE

USB_OC0#

EC8 *10p/50V_4

EMI RESERVE

CLK_PCI_EC

EC11 *10p/50V_4

This strap should sample HIGH.

R533 *100K_1%_4

PCH_GPD7

LPC_PIRQAB

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
USB_OC4#
USB_OC5#
USB_OC6#
USB_OC7#

USB_OC2#
USB_OC0#
USB_OC1#

SERIRQ
SIO_RCIN#

DEVSLP0_HDD
DEVSLP1_SSD1
DEVSLP4_SSD2
EXT_SMI#

R532 100K_1%_4

R1123 10K_1%_4

modify 8/9

R844 10K_1%_4
R873 10K_1%_4
R885 10K_1%_4
R882 10K_1%_4
R910 10K_1%_4
R830 10K_1%_4
R828 10K_1%_4
R905 10K_1%_4

C825 0.1u/10V_2
C799 0.1u/10V_2
C816 0.1u/10V_2

R1047 10K_1%_4
R474 10K_1%_4

R328 *100K_1%_4
R241 *100K_1%_4
R896 *100K_1%_4
R242 *100K_1%_4
R258 *10K_1%_4

+3VPCU

09

+3V

+3V_DEEP_SUS

+3V

+3V_DEEP_SUS

USB 2.0 PORT

+3V_DEEP_SUS

R222
10K_1%_2

PCH_TBT_WAKE#

A

W

K

E
H

W

I
L
E

A A

5

4

D

3

-
C

O

L
D

Q27
*2N7002KTB

321

R223 *short_0402

PCH_WAKE# [38]

3

PORT1
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
PORT10
PORT11
PORT12
PORT13
PORT14

+3V_DEEP_SUS[2,10,11,12,13,14,16,39]

2

USB2 DB-1
USB2 DB-2
USB2 MB-1

NC
CCD
Metal KB
NC
TBT TypeC
NV TypeC
NC
NC
NC
BT( CNVi )

USB 3.0 PORT
PORT1
PORT2
PORT3
PORT4

PORT7
PORT8~10 NC

USB3 DB_TYPEA-1
USB3 DB_TYPEA-2
USB3 MB_TYPEA-1
NCNC
NCPORT5~6
NC

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

PCH 1/7 (DMI/USB/PCIE)

PCH 1/7 (DMI/USB/PCIE)

PCH 1/7 (DMI/USB/PCIE)

ZGE

ZGE

ZGE

9 78Friday, May 03, 2019

9 78Friday, May 03, 2019

1

9 78Friday, May 03, 2019

1A

1A

1A

5

*47p/50V_4

C442

PCH_AZ_CODEC_BITCLK[47]
PCH_AZ_CODEC_SDIN0[47]
PCH_AZ_CODEC_SDOUT[47]

PCH_AZ_CODEC_SYNC[47]

D D

Add R1204 for CNVi 9/29

CNV_RF_RESET#_C

C C

R98875K_1%_4

MODEM_CLKREQ_C

R447

71.5K_1%_4

PCH_AZ_CODEC_RST#[47]

AUD_AZACPU_SDO_R[3]
AUD_AZACPU_SDI[3]
AUD_AZACPU_SCLK[3]

Modify 8/10

modify 8/9

PCM_CLK[50]
PCM_IN[50]

PCH_DMICDAT[32]
PCH_DMICCLK[32]

RTC_RST#[16]

SYS_PWROK

RSMRST#[57]

PCH_RSMRST# DPWROK_R

R488 33_5%_4
R491 *short_0402
R492 33_5%_4
R494 33_5%_4

R496 33_5%_4

R358 30_1%_4
R313 30_1%_4

R1118 *0_5%_4
R1117 *0_5%_4

R1068 *0_5%_4
R981 *short_0402

R965 *short_0402

ACZ_BCLK

ACZ_BCLK
ACZ_SDIN0_R
ACZ_SDO
ACZ_SYNC

ACZ_RST#

AUD_AZACPU_SDO
AUD_AZACPU_SDI
AUD_AZACPU_SCLK_R

I2S2_SCLK

I2S2_RXD
MODEM_CLKREQ_C
CNV_RF_RESET#_C

RTC_RST#
SRTC_RST#

EC_PWROK_R

PCH_RSMRST#

SMBALERT#
SMB_PCH_CLK
SMB_PCH_DAT

SML0ALERT#
SMB_ME0_CLK
SMB_ME0_DAT

SMB1ALERT#
SMB_ME1_CLK
SMB_ME1_DAT

ME Lock

ME_WR#

ACZ_SDO

+3V_DEEP_SUS

R1088

*1K_1%_2

R1053

*1K_1%_2

CLR_CMOS[57]

EC reset RTC

CLR_CMOS

2

ME_WR#[57]

B B

R493 1K_1%_4

0 = *Enable security in the Flash
Description (iPD 20K)

1 = Disable Flash Descriptor Security (Override)

TLS CONFIDENTIALITY ENABLED

HIGH: Flash Descriptor Security (override). This
strap should only be asserted high using external
pull-up in manufacturing/debug environments ONLY.(CRB)

LOW: security measures defined in the Flash
Descriptor. (Default)

+3V_DEEP_SUS[2,9,11,12,13,14,16,39]

RTC Circuitry(RTC)

+3VPCU

+3V_RTC_0

update footprint to
bat-aaa-bat-046-k03-2p-smt and change pin defined

A A

4/17

3

50273-0020N-V09

RTC Power trace width 20mils.

+3V_RTC_0 +3V_RTC_1

R566 1K_1%_4

1

2

4

CN6

5

D58

2
1

BAT54CW

modify 8/9

+3V_RTC

3

C488

1u/6.3V_4

30mils

+3V_RTC

R619

20K_5%_4

R618

20K_5%_4

RTC_RST#

C489
1u/6.3V_4

SRTC_RST#

C476
1u/6.3V_4

(20mils)

R586
100K_1%_4

3

Q49

2N7002KTB

1

12

4

U14D

BD11

HDA_BCLK/I2S0_SCLK

BE11

HDA_SDI0/I2S0_RXD

BF12

HDA_SDO/I2S0_TXD

BG13

HDA_SYNC/I2S0_SFRM

BE10

HDA_RST#/I2S1_SCLK

BF10

HDA_SDI1/I2S1_RXD

BE12

I2S1_TXD/SNDW2_DATA

BD12

I2S1_SFRM/SNDW2_CLK

AM2

HDACPU_SDO

AN3

HDACPU_SDI

AM3

HDACPU_SCLK

AV18

GPP_D8/I2S2_SCLK

AW18

GPP_D7/I2S2_RXD

BA17

GPP_D6/I2S2_TXD/MODEM_CLKREQ

BE16

GPP_D5/I2S2_SFRM/CNV_RF_RESET#

BF15

GPP_D20/DMIC_DATA0/SNDW4_DATA

BD16

GPP_D19/DMIC_CLK0/SNDW4_CLK

AV16

GPP_D18/DMIC_DATA1/SNDW3_DATA

AW15

GPP_D17/DMIC_CLK1/SNDW3_CLK

BE47

RTCRST#

BD46

SRTCRST#

AY42

PCH_PWROK

BA47

RSMRST#

AW41

DSW_PWROK

BE25

GPP_C2/SMBALERT#

BE26

GPP_C0/SMBCLK

BF26

GPP_C1/SMBDATA

BF24

GPP_C5/SML0ALERT#

BF25

GPP_C3/SML0CLK

BE24

GPP_C4/SML0DATA

BD33

GPP_B23/SML1ALERT#/PCHHOT#

BF27

GPP_C6/SML1CLK

BE27

GPP_C7/SML1DATA

PCH_CFL-H_874P

SRTC_RST#

3

Q41

2

*2N7002KTB

1

RTC_RST#

J1
*SHORT_PAD

4

HDA Bus(CLG)

GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#

GPP_A13/SUSWARN#/SUSPWRDNACK

4 OF 13

2ND_MBDATA[40,57,60]

PCH/EC

2ND_MBCLK[40,57,60]

PCH_SMBDATA[17,18,19,20]

XDP/DDR

PCH_SMBCLK[17,18,19,20]

SYSPWOK

SYS_PWROK

EC_PWROK_R

SYS_PWROK_R EC_PWROK

DP_PWROK

DPWROK_R

SYS_PWROK_R
PCH_RSMRST#

GPP_A8/CLKRUN#
GPD11/LANPHYPC
GPD9/SLP_WLAN#

DRAM_RESET#

GPP_B2/VRALERT#

GPP_B1/GSPI1_CS1#/TIME_SYNC1

GPP_B0/GSPI0_CS1#

GPP_K17/ADR_COMPLETE

GPP_B11/I2S_MCLK

SYS_PWROK

WAKE#

GPD6/SLP_A#

SLP_LAN#

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

GPD8/SUSCLK

GPD0/BATLOW#

GPP_A15/SUSACK#

GPD2/LAN_WAKE#

GPD1/ACPRESENT

SLP_SUS#

GPD3/PWRBTN#

SYS_RESET#

GPP_B14/SPKR

CPUPWRGD

ITP_PMODE

PCH_JTAGX

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_TCK

*2N7002KDW

3 4

R1156 *short_0402

6 1

*2N7002KDW

R1157 *short_0402

R723 4.7K_1%_4

+3V

R726 4.7K_1%_4

+3V

+3V_DEEP_SUS

4

3 5

R1019 *0_5%_4

R1023 *short_0402

R1108 *short_0402
R1073 *0_5%_4
R1024 *0_5%_4

R960 680K_1%_4
R1032 10K_1%_2
R951

modify 8/9

C881 *0.1u/10V_2

*10K_1%_2

3

BF36
AV32

BF41
BD42
BB46

BE32
BF33
BE29
R47
AP29
AU3

BB47
BE40
BF40
BC28
BF42
BE42
BC42

BE45
BF44
BE35
BC37

BG44
BG42
BD39
BE46
AU2
AW29
AE3

AL3
AH4
AJ4
AH3
AH2
AJ3

Q55A

5

2

Q55B

2N7002KDW
Q66A

5

2

2N7002KDW
Q66B

EC_PWROK

1
2

U42
*NL17SZ08DFT2G

3

CLKRUN#
LAN_DIS#
SLP_WLAN_N
DDR_DRAMRST#_L

GPP_B2

MPHY_EXT_PWR_GATE
SYS_PWROK_R

PCH_WAKE#_L
SLP_A#_L
SLP_LAN#
PCH_SLP_S0ix#_L
SLP_S3#_L
SLP_S4#_L
SLP_S5#_L

SUSCLK32
BATLOW#
SUSACK#
SUSWARN#

LANWAKE_N
ACPRESENT

PCH_SLP_SUS#
DNBSWON#

XDP_DBRESET#
ACZ_SPKR
PROCPWRGD

ITP_PMODE
PCH_JTAGX
PCH_TMS
PCH_TDO
PCH_TDI
PCH_TCK

+3V_DEEP_SUS

SMB_ME1_DAT

SMB_ME1_CLK

+3V

SMB_PCH_DAT

34

SMB_PCH_CLK

61

R437 *short_0402
R620 *0_5%_4

R1037 *short_0402
R449 *short_0402

R540 *short_0402
R552 *short_0402

R480 *short_0402
R541 *short_0402
R479 *short_0402

R983 *0_5%_4
R486 *short_0402

R543 *0_5%_4

R248 *short_0402
R264 *short_0402
R188 *short_0402
R244 *short_0402
R283 51_5%_4

modify 3/21

modify 8/9

PCH_PWROK [57]

TP119
TP113

SYS_PWROK

CNVi

Add 10/18 Intel#571006

EC_PWROK [57]
IMVP_PWRGD [2,65]

R1006
*10K_1%_2

CLKRUN# [57]

C407 *0.1u/16V_4

DDR_DRAMRST# [17,18,19,20]
UART_WAKE_N [50]

PIRQ# [49]

TP111

modify 8/9

PCIE_WAKE# [38,50,59]
SLP_A# [16]

TP112

PCH_SLP_S0ix# [16,49]
SUSB# [16,57]
SUSC# [16,57]
SLP_S5# [16]

SUSCLK [50]
BATLOW# [38]

TP122

ACPRESENT [57]

TP105

DNBSWON# [57]

XDP_DBRESET# [16]
ACZ_SPKR [47]
PROCPWRGD [2]

TP99

H_TCK [2]
H_TMS [2]
H_TDO [2]
H_TDI [2]

CNV_RF_RESET#_C

Modify the circuit 10/19

MODEM_CLKREQ_C

2

Modify 8/10

modify 8/9

change BOM 9/4

+3V_DEEP_SUS +1.8V_DEEP_SUS

2

+1.8V_DEEP_SUS+3V_DEEP_SUS

2

modify 8/9

R473

4.7K_1%_4

61

Q38B

PJX138K

R468

4.7K_1%_4

61

Q35B

PJX138K

ACZ_SPKR

SMB1ALERT#

R498
10K_1%_4

34

Q38A

5

PJX138K

R460
10K_1%_4

34

Q35A

5

PJX138K

TOP SWAP OVERRIDE STRAP

HIGH:TOP SWAP ENABLED (CRB)

LOW:TOP SWAP DISABLED(DEFAULT)

This signal has an internal pull-down.
0 = Disable IntelR DCI-OOB (Default)
1 = Enable IntelR DCI-OOB

2

DDR_DRAMRST#

MPHY_EXT_PWR_GATE

PCH_WAKE#_L
GPP_B2
LANWAKE_N
SUSACK#
XDP_DBRESET#
SUSCLK32
SUSWARN#
BATLOW#
ACPRESENT
PCH_SLP_S0ix#_L

SMB_ME0_CLK
SMB_ME0_DAT

SMB_ME1_CLK
SMB_ME1_DAT

SMB_PCH_CLK
SMB_PCH_DAT

PCH_TDO

CLKRUN#

CNV_RF_RESET# [50]

MODEM_CLKREQ [50]

R1040
20K_1%_4

+3V_DEEP_SUS

R1103
150K_1%_4

R1071
*20K_1%_4

1

10

R336 470_1%_4

R1097 200K_1%_4
R436 4.7K_1%_4
R579 4.7K_1%_4
R481 4.7K_1%_4
R617 *10K_1%_4
R935 10K_1%_4
R1011 *10K_1%_4
R615 *10K_1%_4
R534 10K_1%_4
R542 100K_1%_4
R495 100K_1%_4
R537 2.2K_5%_4

R535 2.2K_5%_4
R606 *2.2K_5%_4

R603 *2.2K_5%_4
R478 2.2K_5%_4

R477 2.2K_5%_4

R189 *51_5%_4

R1121 10K_1%_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

+1.2VSUS

+3V_DEEP_SUS

change R1007 to 4.7K for CNVi 9/29

change R985 to 4.7K for CNVi 9/29

+1V_S5

+3V

GPP_C5/SML0ALERT#
0 = LPC is selected (for EC). (Default)
1 = eSPI is selected (for EC).

ESPI/LPC SELECT STRAP

HIGH:eSPI Is selected for EC.

LOW: LPC Is selected for EC. (Default)

TLS CONFIDENTIALITY ENABLED

HIGH:T Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). (CRB)

LOW: Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

PCH 2/7 (HDA/SMBUS)

PCH 2/7 (HDA/SMBUS)

PCH 2/7 (HDA/SMBUS)

SML0ALERT#

modify 8/9

SMBALERT#

1

+3V_DEEP_SUS

+3V_DEEP_SUS

R575

4.7K_1%_4

R574
*20K_1%_4

ZGE

ZGE

ZGE

10 78Friday, May 03, 2019

10 78Friday, May 03, 2019

10 78Friday, May 03, 2019

R577
*4.7K_1%_4

R476
100K_1%_4

1A

1A

1A

PLT_ID0
PLT_ID1

C771 15p/25V_2

1

2

Y5

4

3

C778 15p/25V_2

5

SSD1 PCIE x4

HDD SATA

SSD1 PCIE x4

modify it 9/20

TBT PCIE x4

R871 *100K_1%_4
R889 100K_1%_4

XTAL24_IN_L

R814
1M_1%_2

XTAL24_OUT_L

LAN

R820 33_5%_2

L32

4 3
1

*MCM2012B900GBE
R821 33_5%_2

Modify 8/10

PCIE_TXP11_SSD[51]
PCIE_TXN11_SSD[51]
PCIE_RXP11_SSD[51]
PCIE_RXN11_SSD[51]

PCIE_TXN14_LAN[59]

PCIE_TXP14_LAN[59 ]

PCIE_RXN14_LAN[59]

PCIE_RXP14_LAN[59]

SATA_TXN0[51]

SATA_TXP0[51]
SATA_RXN0[51]
SATA_RXP0[51]

PCIE_TXP12_SSD[51]
PCIE_TXN12_SSD[51]
PCIE_RXP12_SSD[51]
PCIE_RXN12_SSD[51]

PCIE_TXP20_TBT[38]
PCIE_TXN20_TBT[38 ]
PCIE_RXP20_TBT[38]
PCIE_RXN20_TBT[38]

PCIE_TXP19_TBT[38]
PCIE_TXN19_TBT[38 ]
PCIE_RXP19_TBT[38]
PCIE_RXN19_TBT[38]

2/5 modify

CLK_DPLL_NSCCLKP[2]
CLK_DPLL_NSCCLKN[2]

CLK_CPU_BCLKP[2]
CLK_CPU_BCLKN[2]

R218 60.4_1%_4

Swap SSD2 and TBT REQ for PCIE SSD RAID 2/1

PCIE_CLKREQ_NGFF1#[51]
PCIE_CLKREQ_VGA#[21]

PCIE_CLKREQ_LAN#[59]
PCIE_CLKREQ_WLAN#[50]
PCIE_CLKREQ_NGFF2#[52]
PCIE_CLKREQ_TBT#[38]

XTAL24_IN

2

XTAL24_OUT

HSIO MUX PORT

PCIE1-8

NC

PCIE9-12

SSD1 SATA/PCIE * 4

PCIE13

HDD (SATA2)
LANPCIE14
WLAN

PCIE15
PCIE16 NC
PCIE17-20

Apline Ridge

PCIE21-24

SSD2 PCIE * 4

D D

+3V

PLT_ID0 PU for REVE PCB 2/1

R861 100K_1%_4
R878 *100K_1%_4

RESERVE

C C

The 24 MHz (50 Ohm ESR) XTAL used for Skylake-H
needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for
Cannonlake-H.

24MHZ/+-20PPM

01/31 Modify value and Y5 PN

B B

Crystal Components with Surrounding 10 mil Wide GND Shield Trace
Break Out:4-10 mil Wide GND Shield Trace

RTC Clock 32.768KHz

C365 18p/50V_ 4

Y4

32.768KHZ/20ppm

C391 18p/50V_ 4

chang P/N to CS04872FB11
8/18

R207 48.7_4
R203 48.7_4

R190 48.7_4

48.7 ohm no symbol link

A A

12

R411
10M_5%_4

CLKOUT_SRC_N15
CLKOUT_SRC_P15

R197 *0_5%_4

TPEV_PEG_VIEW_2

5

RTC_X1

RTC_X2

TPEV_PEG_VIEW_2 [8]

GPIO24_IFPF_HPD_PCH GPP_I14

CNV_PA_BLANKING[50]

modify 10/20

HRESET[40]

CNV_BRI_DT[50]

CNV_BRI_RSP[50]

CNV_RGI_DT[50]

CNV_RGI_RSP[50]

CNV_MFUART2_RXD[50]
CNV_MFUART2_TXD[50]

GPIO24_IFPF_HPD_PCH

CNVi

TP125
TP126
TP127

EMI RESERVE

EC10 *10P/50V/C0G_4

R170 *short_0402
R169 *short_0402

C184 0.22u/6.3V _2
C174 0.22u/6.3V _2

C171 0.22u/6.3V _2
C181 0.22u/6.3V _2

TP118

+3V_DEEP_SUS

RG196
10K_1%_4

3

GPIO24_IFPF_HPD

2

1

Q78
PJA138K

4

CL_CLK

RS232_DET#
PLT_ID1
PLT_ID0

PCIE_TXN14_LAN_C
PCIE_TXP14_LAN_C

PCIE_TXP20_TBT_C
PCIE_TXN20_TBT_C

PCIE_TXP19_TBT_C
PCIE_TXN19_TBT_C

XTAL24_OUT
XTAL24_IN

XCLK_RBIAS
RTC_X1

RTC_X2
PCIE_CLKREQ_NGFF1#

PCIE_CLKREQ_VGA#
PCIE_CLKREQ2#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_NGFF2#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#

GPP_G3

R239 *short_0402

R946 *0_5%_4

R998 *0_5%_4

R372 33_5%_4
R403 33_5%_4

R384 *0_5%_4
R404 *0_5%_4

4

CL_CLK

AR2

CL_DATA

AT5

CL_RST#

AU4
P48

V47
V48
W47

L47

L46
U48
U47
N48
N47
P47
R46

C36
B36
F39
G38

AR42
AR48
AU47
AU46

C39
D39
D46
C47

B38
C38
C45
C46

E37
D38

J41
H42

B44
A44
R37
R35
D43
C44
N42
M44

CLKOUT_SRC_N15
CLKOUT_SRC_P15

AW13

BE9
BF8
BF9

BG8

BE8

BD8

AV13

AP3

AP2
AN4
AM7

GPP_J0

AV6

GPP_J1

AY3

AR13

GPP_J10

AV7

AW3
AT10

CNV_BRI_DT_R

AV4

CNV_BRI_RSP

AY2

CNV_RGI_DT_R

BA4

CNV_RGI_RSP

AV3

GPP_J8

AW2

GPP_J9

AU9

GPIO24_IFPF_HPD [24,41,57]

U14C

CL_CLK
CL_DATA
CL_RST#

GPP_K8
GPP_K9
GPP_K10
GPP_K11

GPP_K0
GPP_K1
GPP_K2
GPP_K3
GPP_K4
GPP_K5
GPP_K6
GPP_K7

PCIE11_TXP/SATA0A_TXP
PCIE11_TXN/SATA0A_TXN
PCIE11_RXP/SATA0A_RXP
PCIE11_RXN/SATA0A_RXN

GPP_F10/SATA_SCLOCK
GPP_F11/SATA_SLOAD
GPP_F13/SATA_SDATAOUT0
GPP_F12/SATA_SDATAOUT1

PCIE14_TXN/SATA1B_TXN
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP

PCIE13_TXN/SATA0B_TXN
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP

PCIE12_TXP/SATA1A_TXP
PCIE12_TXN/SATA1A_TXN
PCIE12_RXP/SATA_1A_RXP
PCIE12_RXN/SATA1A_RXN

PCIE20_TXP/SATA7_TXP
PCIE20_TXN/SATA7_TXN
PCIE20_RXP/SATA7_RXP
PCIE20_RXN/SATA7_RXN
PCIE19_TXP/SATA6_TXP
PCIE19_TXN/SATA6_TXN
PCIE19_RXP/SATA6_RXP
PCIE19_RXN/SATA6_RXN

PCH_CFL-H_874P

BE33

D7
C6

B8
C8

U9

U10

T3

BA49
BA48

BF31
BE31

AR32

BB30
BA30

AN29

AE47

AC48

AE41

AF48
AC41
AC39

AE39

AB48
AC44
AC43

V2
V3

T2
T1

AA1

Y2

AC7
AC6

U14M

GPP_G0/SD_CMD
GPP_G1/SD_D0
GPP_G2/SD_D1
GPP_G3/SD_D2
GPP_G4/SD_D3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP

GPP_I11/M2_SKT2_CFG0
GPP_I12/M2_SKT2_CFG1
GPP_I13/M2_SKT2_CFG2
GPP_I14/M2_SKT2_CFG3

GPP_J0/CNV_PA_BLANKING
GPP_J1/CPU_VCCIO_PWR_GATE#
GPP_J11/A4WP_PRESENT
GPP_J10
GPP_J_2
GPP_J_3
GPP_J_4_CNV_BRI_DT_UART0_RTSB
GPP_J5/CNV_BRI_RSP/UART0_RXD
GPP_J6/CNV_RGI_DT/UART0_TXD
GPP_J7/CNV_RGI_RSP/UART0_CTS#
GPP_J8/CNV_MFUART2_RXD
GPP_J9/CNV_MFUART2_TXD

PCH_CFL-H_874P

GPP_F0/SATAXPCIE3/SATAGP_3

3 OF 13

U14G

GPP_A16/CLKOUT_48
CLKOUT_CPUNSSC_P

CLKOUT_CPUNSSC
CLKOUT_CPUBCLK_P

CLKOUT_CPUBCLK
XTAL_OUT

XTAL_IN
XCLK_BIASREF
RTCX1

RTCX2
GPP_B5/SRCCLKREQ0#

GPP_B6/SRCCLKREQ1#
GPP_B7/SRCCLKREQ2#
GPP_B8/SRCCLKREQ3#
GPP_B9/SRCCLKREQ4#
GPP_B10/SRCCLKREQ5#
GPP_H0/SRCCLKREQ6#
GPP_H1/SRCCLKREQ7#
GPP_H2/SRCCLKREQ8#
GPP_H3/SRCCLKREQ9#
GPP_H4/SRCCLKREQ10#
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
GPP_H7/SRCCLKREQ13#
GPP_H8/SRCCLKREQ14#
GPP_H9/SRCCLKREQ15#

CLKOUT_PCIE_N15
CLKOUT_PCIE_P15

CLKOUT_PCIE_N14
CLKOUT_PCIE_P14

CLKOUT_PCIE_N13
CLKOUT_PCIE_P13

CLKOUT_PCIE_N12
CLKOUT_PCIE_P12

PCH_CFL-H_874P

3

PCIE9_RXN
PCIE9_RXP
PCIE9_TXN

PCIE9_TXP

PCIE10_RXN
PCIE10_RXP
PCIE10_TXN

PCIE10_TXP

PCIE15_RXN/SATA2_RXN
PCIE15_RXP/SATA2_RXP

PCIE_15_SATA_2_TXN

PCIE15_TXP/SATA2_TXP

PCIE16_RXN/SATA3_RXN
PCIE16_RXP/SATA3_RXP
PCIE16_TXN/SATA3_TXN

PCIE16_TXP/SATA3_TXP

PCIE17_RXN/SATA4_RXN
PCIE17_RXP/SATA4_RXP
PCIE17_TXN/SATA4_TXN

PCIE17_TXP/SATA4_TXP

PCIE18_RXN/SATA5_RXN
PCIE18_RXP/SATA5_RXP
PCIE18_TXN/SATA5_TXN

PCIE18_TXP/SATA5_TXP

GPP_E8/SATA_LED#

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_F1/SATAXPCIE4/SATAGP4
GPP_F2/SATAXPCIE5/SATAGP5
GPP_F3/SATAXPCIE6/SATAGP6
GPP_F4/SATAXPCIE7/SATAGP7

GPP_F21/EDP_BKLTCTL

GPP_F20/EDP_BKLTEN

GPP_F19/EDP_VDDEN

THRMTRIP#

PM_SYNC

PLTRST_CPU#

PM_DOWN

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

CLKOUT_CPUPCIBCLK

CLKOUT_CPUPCIBCLK_P

CLKOUT_PCIE_N0

CLKOUT_PCIE_P0

CLKOUT_PCIE_N1

CLKOUT_PCIE_P1

CLKOUT_PCIE_N2

CLKOUT_PCIE_P2

CLKOUT_PCIE_N3

CLKOUT_PCIE_P3

CLKOUT_PCIE_N4

CLKOUT_PCIE_P4

CLKOUT_PCIE_N5

CLKOUT_PCIE_P5

CLKOUT_PCIE_N6

CLKOUT_PCIE_P6

CLKOUT_PCIE_N7

CLKOUT_PCIE_P7

CLKOUT_PCIE_N8

CLKOUT_PCIE_P8

CLKOUT_PCIE_N9

CLKOUT_PCIE_P9

CLKOUT_PCIE_N10
CLKOUT_PCIE_P10

CLKOUT_PCIE_N11
CLKOUT_PCIE_P11

CLKIN_XTAL

7 OF 13

CNV_WR_CLKN
CNV_WR_CLKP

CNV_WR_D0N
CNV_WR_D0P
CNV_WR_D1N
CNV_WR_D1P

CNV_WT_CLKN
CNV_WT_CLKP

CNV_WT_D0N

CNV_WT_D0P

CNV_WT_D1N

CNV_WT_D1P

CNV_WT_RCOMP

PCIE_RCOMPN

PCIE_RCOMPP
SD_RCOMP_1P8
SD_RCOMP_3P3

GPPJ_RCOMP_1P81
GPPJ_RCOMP_1P82
GPPJ_RCOMP_1P83

RSVD#BC1

13 OF 13

3

G36
F36
C34
D34

K37
J37
C35
B35

F44
E45

PCIE_TXN15_WLAN_C

B40

PCIE_TXP15_WLAN_C

C40
L41

M40
B41
C41

K43
K44

PCIE_TXN17_TBT_C

A42

PCIE_TXP17_TBT_C

B42
P41

R40

PCIE_TXN18_TBT_C

C42

PCIE_TXP18_TBT_C

D42
AK48
AH41

NGFF1_DET1

AJ43
AK47
AN47

NGFF2_DET2

AM46
AM43
AM47

PCH_TBT_PLTRST#

AM48

PCH_DPST_PWM

AU48

PCH_LVDS_BLON

AV46

PCH_DISP_ON

AV44

PM_THRMTRIP#_L

AD3

PCH_PECI

AF2

PECI

PM_SYNC_R

AF3

CPU_PLTRST#

AG5

H_PM_DOWN

AE2

Y3
Y4

B6
A6

AJ6
AJ7

AH9
AH10

AE14
AE15

AE6
AE7

AC2
AC3

AB2
AB3

W4
W3

W7
W6

Swap SSD2 and TBT CLK for PCIE SSD RAID 2/1

AC14
AC15

U2
U3

AC9
AC11

AE9
AE11

R6

RSVD2
RSVD3

R858 10K_1%_4

BD4
BE3

BB3
BB4
BA3
BA2

BC5
BB6

BE6
BD7
BG6
BF6

CNV_RCOMP

BA1

PCIECOMP_N

B12

PCIECOMP_P

A13
BE5
BE4
BD1
BE1
BE2

Y35
Y36

BC1
AL35

TP

modify 8/9

R343 10K_1%_4

R845 620_1%_4
R219 30_1%_4

R887 *short_0402

CPU_PCI_BCLKN [2]
CPU_PCI_BCLKP [2]

CLK_PCIE_SSD1N [51]
CLK_PCIE_SSD1P [51 ]

CLK_VGA_N [21]
CLK_VGA_P [21]

CLK_PCIE_LANN [59]
CLK_PCIE_LANP [59]

CLK_PCIE_WLANN [50]
CLK_PCIE_WLANP [50]

CLK_PCIE_SSD2N [52]
CLK_PCIE_SSD2P [52 ]

CLK_PCIE_TBTN [38]
CLK_PCIE_TBTP [38]

CLKIN_XTAL [50]

CNVI for WLAN

CNV_WR_CLKN [50]
CNV_WR_CLKP [5 0]

CNV_WRXN0 [50]
CNV_WRXP0 [50]
CNV_WRXN1 [50]
CNV_WRXP1 [50]

CNV_WT_CLKN [50]
CNV_WT_CLKP [50]

CNV_WTXN0 [50]
CNV_WTXP0 [50]
CNV_WTXN1 [50]
CNV_WTXP1 [50]

R961 150_1%_4
R171 100_1%_4

R978 200_1%_4
R990 200_1%_4

R432 200_1%_4

TP48

C2320.1u/16V_4
C2310.1u/16V_4

C1780.22 u/6.3V_2
C1790.22 u/6.3V_2

C1770.22 u/6.3V_2
C1760.22 u/6.3V_2

+3V

NGFF1_DET1 [51]

PCH_TBT_PLTRST# [12]

PCH_DPST_PWM [32]
PCH_LVDS_BLON [32]
PCH_DISP_ON [32]

PM_THRMTRIP# [2,17,18,19,20,53]
PCH_PECI [2]
PM_SYNC [2]
CPU_PLTRST#R [2]
H_PM_DOWN [2]

SSD1
GFX

LAN
WLAN

SSD2
TBT

CNV_RGI_RSP
CNV_BRI_RSP

2

modify 8/9

GPP_J9

2

PCIE_RXN9_SSD [51]
PCIE_RXP9_SSD [51]
PCIE_TXN9_SSD [51]
PCIE_TXP9_SSD [51]

PCIE_RXN10_SSD [51]
PCIE_RXP10_SSD [51]
PCIE_TXN10_SSD [51]
PCIE_TXP10_SSD [51]

PCIE_RXN15_WLAN [50]
PCIE_RXP15_WLAN [50]
PCIE_TXN15_WLAN [50]
PCIE_TXP15_WLAN [50]

2/5 modify

PCIE_RXN17_TBT [38]
PCIE_RXP17_TBT [38]
PCIE_TXN17_TBT [38]
PCIE_TXP17_TBT [38]

PCIE_RXN18_TBT [38]
PCIE_RXP18_TBT [38]
PCIE_TXN18_TBT [38]
PCIE_TXP18_TBT [38]

SATA_LED# [51,52,59]

For SSD1 Det

Close PCH

R366 20K_ 1%_4
R393 20K_ 1%_4

R416 *4.7K_1%_4

R914 10K_1%_4

SSD1 PCIE x4

WLAN

TBT PCIE x4

SSD SATA I/F --> H
SSD PCIE I/F --> L

R877 *10K_1%_4

R334 10K_1%_4

+1.8V_DEEP_SUS

+1.8V_DEEP_SUS

1

11

+1V_S5

PM_THRMTRIP#_L

EMI RESERVE

SATA_LED#

stuff R1037 and unstuff R1039 for PCIE SSD RAID 2/1

CPU_VCCIO_PWR_GATE[63]

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

NGFF1_DET1

NGFF2_DET2

RS232_DET#

GPP_G3
PCH_DPST_PWM

PCH_PECI

PCIE_CLKREQ_NGFF1#
PCIE_CLKREQ_VGA#
PCIE_CLKREQ2#
PCIE_CLKREQ_LAN#
PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_TBT#
PCIE_CLKREQ_NGFF2#
PCIE_CLKREQ7#
PCIE_CLKREQ8#
PCIE_CLKREQ9#
PCIE_CLKREQ10#
PCIE_CLKREQ11#
PCIE_CLKREQ12#
PCIE_CLKREQ13#
PCIE_CLKREQ14#
PCIE_CLKREQ15#

R351
*10K_1%_4

Modify 8/10

VCCIO Power Gat e control for C 10

PCH 3/7 (SATA/LPC/CLK)

PCH 3/7 (SATA/LPC/CLK)

PCH 3/7 (SATA/LPC/CLK)

modify 8/9

R855 2K_1%_4

C800 1000p/50V _4

Add 12/19

12

D49 PESD5V0H1BSF

+3V

R875 10K_1%_4

R256 *10K_1%_4

R881 *100K_1%_4

R441 *10K_1%_4
R909 10K_1%_4

R193 *100K_1%_4

+3V

R576 10K_1%_4
R490 10K_1%_4
R1120 *10K_1%_4
R1119 10K_1%_4
R1129 10K_1%_4
R305 10K_1%_4
R1098 *10K_1%_4
R279 *10K_1%_4
R864 *10K_1%_4
R338 *10K_1%_4
R832 *10K_1%_4
R831 *10K_1%_4
R825 *10K_1%_4
R281 *10K_1%_4
R846 *10K_1%_4
R835 *10K_1%_4

+3V_DEEP_SUS

+1.8V_DEEP_SUS

R383

*10K_1%_4

Q34

3

*PJA138K

GPP_J1

2

1

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZGE

ZGE

ZGE

11 78Friday, May 03, 2019

11 78Friday, May 03, 2019

1

11 78Friday, May 03, 2019

1A

1A

1A

5

4

3

2

1

PCH Strap Pin

D D

EMI RESERVE

PCH_SPI1_CLK

EC5 *10P/50V/C0G_4

TP97

PCH_SPI1_SI
PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK

TP104

C C

SPI_TPM_CS#[49]

PLTRST#(CLG)

B B

PCI_PLTRST#

SPI_TPM_CS# SPI_TPM_CS#_L

TP57
TP53
TP55
TP54

TS_SPI1_CLK
TS_SPI1_CS#
TS_SPI1_MISO
TS_SPI1_MOSI TS_SPI1_MISO_R

PCH_SPI1_SI_L[49]
PCH_SPI1_SO_L[49]
PCH_SPI1_CLK_L[49]

+3V_DEEP_SUS

C492 0.1u/16V_4

1
2

U31

3 5

MC74VHC1G08DFT2G

TP102

R936 33_5%_4
R945 33_5%_4
R369 *short_0402
R360 33_5%_4

R921 TPM@33_5%_4

R489 33_5%_4
R551 33_5%_4
R550 33_5%_4
R553 33_5%_4

TPM

PCH_SPI1_SI_L
PCH_SPI1_SO_L
PCH_SPI1_CLK_L

4

PLTRST#

R605
100K_1%_4

PCH_SPI1_SI_L
PCH_SPI1_SO_L
PCH_SPI_CS0#_L
PCH_SPI1_CLK_L

SPI1_IO2
SPI1_IO3

TS_SPI1_CLK_R
TS_SPI1_CS#_R
TS_SPI1_MOSI_R

PLTRST# [21,41,49,50,51,52,57,59]

TBT_PLTRST# (RTD3)

PLTRST#

PLTRST#

A A

PCI_PLTRST#

PCH_TBT_PLTRST#[11]

R
E

S
E
T

A

F
T
E
R

R

T
D

3
R

E

R1151 *short_0201
R1152 *0_5%_2

PCH_TBT_PLTRST#

5

R1150
100K_1%_4

R162 *0_5%_2

+3V_DEEP_SUS

1
2

3 5

U6
MC74VHC1G08DFT2G

4

R160
*100K_1%_4

U14A

BE36

GPP_A11/PME#/SD_VDD2_PWR_EN#

R15

RSVD#R15

R13

RSVD#R13

AL37

VSS

AN35

TP#AN35

AU41

SPI0_MOSI

BA45

SPI0_MISO

AY47

SPI0_CS0#

AW47

SPI0_CLK

AW48

SPI0_CS1#

AY48

SPI0_IO2

BA46

SPI0_IO3

AT40

SPI0_CS2#

BE19

GPP_D1/SPI1_CLK/SBK1_BK1

BF19

GPP_D0/SPI1_CS#/SBK0_BK0

BF18

GPP_D3/SPI1_MOSI/SBK3_BK3

BE18

GPP_D2/SPI1_MISO/SBK2_BK2

BC17

GPP_D22/SPI1_IO3

BD17

GPP_D21/SPI1_IO2

PCH_CFL-H_874P

TBT_PLTRST# [38]

4

GPP_B13/PLTRST#

GPP_K16/GSXCLK

GPP_K12/GSXDOUT

GPP_K13/GSXSLOAD

GPP_K14/GSXDIN

GPP_K15/GSXSRESET#

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

GPP_H18/SML4ALERT#

GPP_H17/SML4DATA

GPP_H16/SML4CLK

GPP_H15/SML3ALERT#

GPP_H14/SML3DATA

GPP_H13/SML3CLK

GPP_H12/SML2ALERT#

GPP_H11/SML2DATA

GPP_H10/SML2CLK

1 OF 13

INTRUDER#

This strap should sample HIGH.

R850 *100K_1%_4

PCH SPI ROM(CLG)

+3V_DEEP_SUS

Follow VSPI level (1.8V or 3.3V)

R319 *short_0402

PCH_SPI_CS0#
PCH_SPI1_CLK

SPI1_IO2 PCH_SPI_IO2

+SPI_VCC

EC

SPI_CS0#_UR_ME[57]
PCH_SPI_CLK_EC[57]

PCH_SPI_SI_EC[57]

PCH_SPI_SO_EC[57]

+SPI_VCC

PLTRST#(CLG)

PCI_PLTRST#

AV29

Y47
Y46
Y48
W46
AA45

AL47
AM45

KBL_DET#

BF32
BC33

AE44

SMB_ME4_DAT

AJ46

SMB_ME4_CLK

AE43

PCH_GPP_H15

AC47

SMB_ME3_DAT

AD48

SMB_ME3_CLK

AF47
AB47

SML2ALERT#

SMB_ME2_DAT

AD47

SMB_ME2_CLK

AE48

SM_INTRUDER#

BB44

PCH_GPP_H15

+SPI_VCC

C328
1u/10V_4

R455 33_5%_4

R456 *1K_1%_4

R341 33_5%_4
R454 33_5%_4
R453 *short_0402
R321 33_5%_4

Modify 8/10

R863 *short_0402

R967 1M_1%_4

follow intel command 8/8

R836 100K_1%_4

R452

4.7K_1%_4

R335
*2.55K_1%_4

Modify 8/10

PCH_SPI1_SI
PCH_SPI1_SO

PCH_SPI_CS0#

PCH_SPI1_CLK

3

TP52

TP87

RTD3_CIO_PWR_EN [38]

+3V_RTC

+3V_DEEP_SUS

PCH SOIC 208 mils 16MB
SPI ROM Socket

Main source AKE3DF-KN01
2nd source AKE3DZN0Q02

1/21 change to IC

U19

5

DI(IO0)
DO(IO1)
CS
CLK

WP(IO2)

HOLD(IO3)

GND

VCC

2
1
6

W25Q128JVSIQ

change U26 footprint name to soic8-7_9-1_27
10/03

Socket:DG008000011

Modify 8/10

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

modify 8/9

SMB_ME4_CLK
SMB_ME4_DAT
SMB_ME3_CLK
SMB_ME3_DAT
SMB_ME2_CLK
SMB_ME2_DAT

KBL_DET#

R849 *1K_1%_4
R879 1K_1%_4
R891 1K_1%_4
R289 1K_1%_4
R303 1K_1%_4
R288 1K_1%_4

R538 *100K_1%_4

ESD

+SPI_VCC

+SPI_VCCPCH_SPI1_SI

8

PCH_SPI_IO2PCH_SPI1_SO

3
7

R340 *1K_1%_4

4

C320

0.1u/16V_4

PCH_SPI_IO3

2

+3V_DEEP_SUS

PCH_SPI1_SO_L

+3VPCU

C441 *0.1u/16V_4

R320 33_5%_4

R931

*20K_1%_4

R944
*4.7K_1%_4

+3V_DEEP_SUS

SPI1_IO3

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

ESPI FLASH SHARING MODE

HIGH:SLAVE ATTACEHD FLASH SHARING

LOW: 0: MASTER ATTACHED FLASH SHARING

This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

+3V_DEEP_SUS

SML2ALERT#

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

update vlaue follow intel command 8/8

+3V_DEEP_SUS

PCH_SPI1_SI_L

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

update vlaue follow intel command 8/8

+3V_DEEP_SUS

SPI1_IO2

RESERVED

This strap should sample HIGH.
There should NOT be any on-board device
driving it to opposite direction during

strap sampling.

update vlaue follow intel command 8/8

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

PCH 4/7 (GPIO/MISC)

PCH 4/7 (GPIO/MISC)

PCH 4/7 (GPIO/MISC)

SPI1_IO3

1

+3V_DEEP_SUS

ZGE

ZGE

ZGE

12 78Friday, May 03, 2019

12 78Friday, May 03, 2019

12 78Friday, May 03, 2019

R270
*4.7K_1%_4

R271
*30K_5%_4

R919
100K_1%_4

R940
*4.7K_1%_4

R377
100K_1%_4

R378
*4.7K_1%_4

R382
100K_1%_4

R385
*100_1%_4

1A

1A

1A

12

5

Modify 8/10

GPUEVENT#_PCH[23]

D D

GC6FBEN_Q[23]

DGPU_PWROK_Q[23]

DGPU_PWR_EN[25]

DGPU_HOLD_RST#[21]

modify 10/20

TPD_INT#_PCH[54]

+3V_DEEP_SUS

EMI RESERVE

I2C1_SCL

EC6 *10P/50V/C0G_4

TBT_HTPLG_NL5[38]

TBT3
TPD

C C

TBT

B B

+3V

R1089 *1K_1%_4
R1065 *10K_1%_2
R1163 10K_1%_2
R1062 *10K_1%_2
R1122 10K_1%_2

Modify 8/10

EDP_HPD_CPU
DGPU_PWR_EN
GC6FBEN_Q
DGPU_HOLD_RST#
DGPU_PWROK_Q

+3V

R1055 *short_0402

S_GPIO

R1056 *short_0402

I2C1_SCL[40]
I2C1_SDA[40]
I2C0_SCL[54]
I2C0_SDA[54]

Change to stuff by NV FAE's suggestion 0326

TBT_DP_HPD[23,37,38]

SIO_EXT_SCI#[57]

+3V_DEEP_SUS

EDP_HPD_CPU[32]

R1054 100K_1%_4
R1034 10K_1%_2
R1164 *10K_1%_2

10K_1%_2

R1031
R1081 *10K_1%_2

Boot BISO Destination: HIGH=LPC, LOW=SPI
GPP_B22 LOW

R1036 100K_1%_4
R1094 *short_0402

GSPI0_MOSI
DGPU_PWR_EN
DGPU_HOLD_RST#

R1110

GPP_B15

BBS_BIT1
GPP_C11

UART2_CTS#

UART2_RTS#

UART2_TXD

UART2_RXD

I2C1_SCL
I2C1_SDA
I2C0_SCL
I2C0_SDA

DDPB_HPD0
DP_HPD_PCH_R
HDMI_HPD_PCH_R
SIO_EXT_SCI#

EDP_HPD_CPU

TP108

TP107

Unstuff TBT_DP_HDP from ZGQ

R1004 *short_0402

R907 10K_1%_2

GSPI1_MOSI

10K_1%_2

4

U14K

BA26

GPP_B22/GSPI1_MOSI

BD30

GPP_B21/GSPI1_MISO

AU26

GPP_B20/GSPI1_CLK

AW26

GPP_B19/GSPI1_CS0#

BE30

GPP_B18/GSPI0_MOSI

BD29

GPP_B17/GSPI0_MISO

BF29

GPP_B16/GSPI0_CLK

BB26

GPP_B15/GSPI0_CS0#

BB24

GPP_C9/UART0_TXD

BE23

GPP_C8/UART0_RXD

AP24

GPP_C11/UART0_CTS#

BA24

GPP_C10/UART0_RTS#

BD21

GPP_C15/UART1_CTS#/ISH_UART1_CTS#

AW24

GPP_C14/UART1_RTS#/ISH_UART1_RTS#

AP21

GPP_C13/UART1_TXD/ISH_UART1_TXD

AU24

GPP_C12/UART1_RXD/ISH_UART1_RXD

AV21

GPP_C23/UART2_CTS#

AW21

GPP_C22/UART2_RTS#

BE20

GPP_C21/UART2_TXD

BD20

GPP_C20/UART2_RXD

BE21

GPP_C19/I2C1_SCL

BF21

GPP_C18/I2C1_SDA

BC22

GPP_C17/I2C0_SCL

BF23

GPP_C16/I2C0_SDA

BE15

GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4

BE14

GPP_D23/ISH_I2C2_SCL/I2C3_SCL

PCH_CFL-H_874P

U14E

AT6

GPP_I0/DDPB_HPD0/DISP_MISC0

AN10

GPP_I1/DDPC_HPD1/DISP_MISC1

AP9

GPP_I2/DPPD_HPD2/DISP_MISC2

AL15

GPP_I3/DPPE_HPD3/DISP_MISC3

AN6

GPP_I4/EDP_HPD/DISP_MISC4

PCH_CFL-H_874P

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#
GPP_D10/ISH_SPI_CLK/GSPI2_CLK

GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO

GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI

GPP_D16/ISH_UART0_CTS#/CNV_WCEN

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN

GPP_D14/ISH_UART0_TXD/I2C2_SCL

GPP_D13/ISH_UART0_RXD/I2C2_SDA

GPP_H20/ISH_I2C0_SCL
GPP_H19/ISH_I2C0_SDA

GPP_H22/ISH_I2C1_SCL
GPP_H21/ISH_I2C1_SDA

GPP_A23/ISH_GP5
GPP_A22/ISH_GP4
GPP_A21/ISH_GP3
GPP_A20/ISH_GP2
GPP_A19/ISH_GP1

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

11 OF 13

GPP_A18/ISH_GP0

BOARD_ID0 BOARD_ID1

GPP_K21
GPP_K20

AL13
AR8
AN13
AL10
AL9
AR3
AN40
AT49

AP41
M45

L48
T45
T46
AJ47

GPP_I5/DDPB_CTRLCLK

GPP_I6/DDPB_CTRLDATA

GPP_I7/DDPC_CTRLCLK

GPP_I8/DDPC_CTRLDATA

GPP_I9/DDPD_CTRLCLK

GPP_I10/DDPD_CTRLDATA

GPP_F23/DDPF_CTRLDATA

GPP_F22/DDPF_CTRLCLK

GPP_F14/EXT_PWR_GATE#/PS_ON#

GPP_K23/IMGCLKOUT1
GPP_K22/IMGCLKOUT0

GPP_H23/TIME_SYNC0

5 OF 13

NV GSYNG STRAP

3

TBT_FORCE_PWR_R

BA20

BOARD_ID0

BB20

BOARD_ID1

BB16

BOARD_ID2

AN18

BOARD_ID3

BF14

BOARD_ID4

AR18

BOARD_ID5

BF17

BOARD_ID6

BE17

AG45

Add R1219 for intel#571006 10/18

AH46

AH47

GPP_H21

AH48

AV34
AW32
BA33
BE34
BD34
BF35
BD38

0 0

1 0

0

DDPB_CLK
DDPB_DATA
DDPC_CLK
DDPC_DATA
DDPD_CLK
DDPD_DATA

GPP_K21

R895 10K_1%_4

BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
BOARD_ID11
BOARD_ID12
BOARD_ID13

OD_EN

NC

NC

11

NC

1

Reserve Reserve Reserve Reserve

Modify 8/10

R941 *short_0402

R547 *short_0402

+3V

TBT_FORCE_PWR [38]
BOARD_ID0 [32]
BOARD_ID1 [32]

LCD_OD_EN# [32]

GPP_H21 = XTAL Frequency Select

RESERVED

PWM pin

NSVR pin

Reserve

Reserve

NC

Y

Y

NC

TP95
TP100

SKTOCC_N_R [2]

BOOT SELECT STRAP

HIGH:LPC

LOW: SPI. (Default)

S_GPIO

+3V_DEEP_SUS[2,9,10,11,12,14,16,39]

Support panel

Reserve

NSVR

DD/Normal

+3V_DEEP_SUS

R1105
*4.7K_1%_4

R1104
*20K_1%_4

2

Modify 8/10

NO REBOOT IF SAMPLED HIGH

HIGH:TOP SWAP ENABLED (CRB)

LOW: Disable "No Reboot" mode. (Default)

+3V

BBS_BIT1

I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA

GPP_C11
UART2_CTS#

UART2_RTS#
UART2_TXD
UART2_RXD

change R331 to 2.2K and stuff it for TBT HPD 11/29

DDPC_CLK
DDPC_DATA
DDPB_CLK
DDPB_DATA
DDPD_CLK
DDPD_DATA
SKTOCC_N_R

R1058 *100K_1%_4
R1052 *100K_1%_4
R970 *10K_1%_4
R487 *10K_1%_4
R1045 10K_1%_2
R548 i7@10K_1%_4
R497 iTPM@10K_1%_4
R1041 *NVL@10K_1%_4
R1051 N-Tobii@10K_1%_4
R1050 *N-Macro@10K_1%_4
R539 *10K_1%_4
R1124 *Max-Q@10K_1%_4
R578 *N-GS@10K_1%_4
R545 *OP@10K_1%_4

R451 2.2K_5%_4
R438 2.2K_5%_4
R1057 2.2K_5%_4
R483 2.2K_5%_4

R1059 100K_1%_4
R1048 *49.9K_1%_4

R1099 2.2K_5%_4
R484 *49.9K_1%_4
R1008 *49.9K_1%_4

R862 *10K_1%_4
R880 *10K_1%_4
R874 *10K_1%_4
R893 *10K_1%_4
R888 *10K_1%_4
R902 *10K_1%_4
R900 *100K_1%_4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4
BOARD_ID5
BOARD_ID6
BOARD_ID7
BOARD_ID8
BOARD_ID9
BOARD_ID10
BOARD_ID11
BOARD_ID12
BOARD_ID13

RESERVED

This strap should sample LOW.
There should NOT be any on-board device
driving it to opposite direction during
strap sampling.

Intel ME STRAP

R546

4.7K_1%_4

R536
*20K_1%_4

1

+3V_DEEP_SUS

+3V

modify 8/8

R1106 10K_1%_4
R1091 10K_1%_4
R991 SUB@10K_1%_4
R544 10K_1%_4
R1090 *10K_1%_2
R554 *i9@10K_1%_4
R549 *dTPM@10K_1%_4
R1102 VL@10K_1%_4
R1101 *Tobii@10K_1%_4
R1100 Macro@10K_1%_4
R580 10K_1%_4
R1125 Max-P@10K_1%_4
R581 GS@10K_1%_4
R616 DIS@10K_1%_4

GPP_K21

13

+3V_DEEP_SUS

+3V_DEEP_SUS

R856
*100K_1%_4

R852
*20K_1%_4

RESERVED

R781

5

1M_1%_4

2

Q70A
PJX138K

Q70B
PJX138K

DP_HPD_PCH_R

R798
1M_1%_4

HDMI_HPD_PCH_R

DP_HPD_PCH[23,33]

R789 *100K_1%_4

A A

update BOM 10/20

HDMI_HPD_PCH[23,35]

R783 *100K_1%_4

3 4

+3V

6 1

5

ID.NO

BOARD_ID11

BOARD_ID12

BOARD_ID13

Function

PCB

VGA

4

Low

MAXQ

Non-GS

Optimus

Pin Name

GPP_B18
(GSPI0_MOSI)

GPP_B22
(GSPI1_MOSI)

High

ID.NO

MAXP

GSG-SYNC

d-VGA

BOARD_ID8

BOARD_ID9

BOARD_ID10

Strap description

No reboot

Boot BIOS Strap Bit (BBS)

Function

EYE Trace

Macro Key

Touch Panel

Sampled

PCH_PWROK

PCH_PWROK

Low

NO

NO

YES

Configuration

0 = *Disable No Reboot (iPD 20K)

1 = Enable No Reboot Mode

0 = *SPI (iPD 20K)

3

1 = LPC

High

ID.NO

YES

BOARD_ID4

YES

NO

BOARD_ID6

BOARD_ID7

Function

Keyboard

CPU

TPM

Battery
Vin Boost

note

+3V

+3V

Low

Metal

i7

NO

R1126 *1K_1%_4

R1096 *1K_1%_4

2

High High

Plastic

dTPMiTPM

YES

ID.NO

BOARD_ID0

i9

BOARD_ID1BOARD_ID5

BOARD_ID2

BOARD_ID3

Function

LCD Panel

LCD Panel

Sub-Woofer

Power Button

note

GSPI0_MOSI

R1095 *100K_1%_4

GSPI1_MOSI

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCH 5/7 (GPIO)

PCH 5/7 (GPIO)

PCH 5/7 (GPIO)

Low

No Stuff

No Stuff

No

Metal

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

1

ZGE

ZGE

ZGE

Default

Default

YES

Plastic

13 78Friday, May 03, 2019

13 78Friday, May 03, 2019

13 78Friday, May 03, 2019

1A

1A

1A

5

4

3

2

1

14

+1V_S5

D D

22u/6.3V_6

C789
1u/6.3V_4

C817
1u/6.3V_4

EMI RESERVE

+VCCDUSB

EC9 *10P/50V/C0G_4

*short_0603
*short_0603

*short_0603

*short_0603

*short_0603

*short_0603

+VCCDUSB

+VCCDSW_1.05V

C797 1u/6.3V_4

+VCCPRIM_MPHY

C198 0.1u/10V_2
C205 1u/6.3V_4

+VCCAMPHYPLL

C196 22u/6.3V_6
C195 22u/6.3V_6

+VCCA_XTAL

C786 22u/6.3V_6
C793 22u/6.3V_6

+VCCAPLL_1

C163 1u/6.3V_4

+VCCA_BCLK

C787 1u/6.3V_4

+VCCAPLL_2

C162 1u/6.3V_4

EC4 *10P/50V/C0G_4

+1V_S5

C C

+1V_S5
+1V_S5

+1V_S5

+1V_S5

+1V_S5

+1V_S5

+1V_S5

R872 *short_0402
R531 *0_5%_4

C452 1u/6.3V_4

R868
R177

R192 *short_0805
C192 1u/6.3V_4

R833

R172

R838

R159

Modify 8/10

B B

+3V_DEEP_SUS

EMI RESERVE EMI RESERVE

+VCCAPLL_1 +VCCAPLL_2

EC3 *10P/50V/C0G_4

U14H

AA22

VCCPRIM_1P051

AA23

VCCPRIM_1P052

AB20

VCCPRIM_1P053

AB22

VCCPRIM_1P054

AB23

VCCPRIM_1P055

AB27

VCCPRIM_1P056

AB28

VCCPRIM_1P057

AB30

VCCPRIM_1P058

AD20

VCCPRIM_1P059

AD23

VCCPRIM_1P0510

AD27

VCCPRIM_1P0511

AD28

VCCPRIM_1P0512

AD30

VCCPRIM_1P0513

AF23

VCCPRIM_1P0516

AF27

VCCPRIM_1P0517

AF30

VCCPRIM_1P0518

U26

VCCPRIM_1P0523

U29

VCCPRIM_1P0524

V25

VCCPRIM_1P0525

V27

VCCPRIM_1P0526

V28

VCCPRIM_1P0527

V30

VCCPRIM_1P0528

V31

VCCPRIM_1P0529

AD31

VCCPRIM_1P0514

AE17

VCCPRIM_1P0515

W22

VCCDUSB_1P051

W23

VCCDUSB_1P052

BG45

VCCDSW_1P051

BG46

VCCDSW_1P052

W31

VCCPRIM_MPHY_1P05

D1

VCCPRIM_1P0521

E1

VCCPRIM_1P0522

C49

VCCAMPHYPLL_1P051

D49

VCCAMPHYPLL_1P052

E49

VCCAMPHYPLL_1P053

P2

VCCA_XTAL_1P051

P3

VCCA_XTAL_1P052

W19

VCCA_SRC_1P051

W20

VCCA_SRC_1P052

C1

VCCAPLL_1P054

C2

VCCAPLL_1P055

V19

VCCA_BCLK_1P05

B1

VCCAPLL_1P051

B2

VCCAPLL_1P052

B3

VCCAPLL_1P053

PCH_CFL-H_874P

+1.2VSUS

8 OF 13

+3VPCU

VCCPRIM_3P32

DCPRTC1
DCPRTC2

VCCPRIM_3P35

VCCSPI

VCCRTC1
VCCRTC2

VCCPGPPG_3P3

VCCPRIM_3P33
VCCPRIM_3P34

VCCPGPPHK1
VCCPGPPHK2
VCCPGPPEF1
VCCPGPPEF2

VCCPGPPD
VCCPGPPBC1
VCCPGPPBC2

VCCPGPPA

VCCPRIM_3P31
VCCDSW_3P31

VCCDSW_3P32

VCCHDA

VCCPRIM_1P83
VCCPRIM_1P84
VCCPRIM_1P85
VCCPRIM_1P86
VCCPRIM_1P87

VCCPRIM_1P81
VCCPRIM_1P82

VCCPRIM_1P0520
VCCPRIM_1P0519

VCCPRIM_1P241
VCCPRIM_1P242

VCCDPHY_1P241
VCCDPHY_1P242
VCCDPHY_1P243

VCCMPHY_SENSE

VSSMPHY_SENSE

AW9
BF47

BG47
V23
AN44
BC49

BD49
AN21
AY8

BB7
AC35

AC36
AE35
AE36

AN24
AN26
AP26

AN32
AT44
BE48

BE49
BB14
AG19

AG20
AN15
AR15
BB11

AF19
AF20

AG31
AF31

AK22
AK23

AJ22
AJ23
BG5

K47
K46

+1V_S5

DCPRTC

C445 0.1u/16V_4
C436 0.1u/16V_4C808

+3V_VCCSPI

R908 *short_0402

C431 0.1u/16V_4
C433 0.1u/16V_4
C432 1u/6.3V_4
C438 0.1u/16V_4

C818 4.7u/6.3V_4

+VCCPGPPA

R508 *short_0402

+V3.3DX_ADO

C450 0.1u/16V_4

R977 BLM15GG471SN1D

C867 0.1u/16V_4

C838 0.1u/16V_4
C852 4.7u/6.3V_4

VCCPHVLDO_1P8

+VCCDPHY

VCCMPHY_SENSE
VSSMPHY_SENSE

R808 *CNVI@0_5%_6

C826 1u/6.3V_4
C887 4.7u/6.3V_4

+3V_DEEP_SUS

Modify 8/10

+3V_DEEP_SUS

12

R894 *short_0402
C813 1u/6.3V_4

Unstaff

+3V_DEEP_SUS

+3V_DEEP_SUS

+3V_RTC

10mils

eSPI/GPPA Power rail

+1.8V_DEEP_SUS

Need stuff R322 9/12

TP27
TP26

+VCCPGPPA

+3V_DEEP_SUS

+3V_DEEP_SUS

+1V_S5

+1.2VSUS

+VCCPGPPA

R922 *0_5%_6
R906 *short_0603

C833

0.1u/16V_4

Internal LDO Output

+1.8V_DEEP_SUS

+1.8V_DEEP_SUS

+VCCAPLL_1

+VCCAPLL_2

+VCCPRIM_MPHY

+VCCAMPHYPLL

+3V_DEEP_SUS

C206

0.1u/10V_2

C801

0.1u/10V_2

C158

0.1u/10V_2

C166

0.1u/10V_2

C845
1u/6.3V_4

A A

+3V_DEEP_SUS[2,9,10,11,12,13,16,39]

5

C846

0.1u/16V_4

+1.8V_S5 +1.8V_DEEP_SUS

C814

0.1u/16V_4

External VR

R932 *0_5%_6

4

C798

0.1u/16V_4

C836

0.1u/16V_4

C851
*0.1u/10V_2

C832

0.1u/16V_4

+3V_S5 +3V_DEEP_SUS

R1025
R1026

C131

0.1u/16V_4

*short_0603
*short_0603

C927

0.1u/16V_4

3

C870

0.1u/10V_2

C790

4.7u/6.3V_4

C811

0.1u/16V_4

C820

0.1u/16V_4

2

C819
10u/6.3V_4

C821
10u/6.3V_4

C810

4.7u/6.3V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

C791
1u/6.3V_4

C802

2.2u/10V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

PCH 6/7 (POWER)

PCH 6/7 (POWER)

PCH 6/7 (POWER)

ZGE

ZGE

ZGE

1

14 78Friday, May 03, 2019

14 78Friday, May 03, 2019

14 78Friday, May 03, 2019

1A

1A

1A

5

4

3

2

1

15

D D

U14I

A2

VSS_1

A28

VSS_2

A3

VSS_3

A33

VSS_4

A37

VSS_5

A4

VSS_6

A45

VSS_7

A46

VSS_8

A47

VSS_9

A48

VSS_10

A5

VSS_11

A8

VSS_12

AA19

VSS_13

AA20

VSS_14

AA25

VSS_15

AA27

VSS_16

AA28

VSS_17

AA30

VSS_18

AA31

VSS_19

AA49

VSS_20

AA5

VSS_21

AB19

C C

B B

AB25
AB31
AC12
AC17
AC33
AC38

AC4

AC46

AD1

AD19

AD2
AD22
AD25
AD49
AE12
AE33
AE38

AE4

AE46

AF22
AF25
AF28

AG1
AG22
AG23
AG25
AG27
AG28
AG30
AG49
AH12
AH17
AH33
AH38

AJ19
AJ20
AJ25
AJ27
AJ28
AJ30

AJ31
AK19
AK20
AK25
AK27
AK28
AK30
AK31

AK4

AK46

PCH_CFL-H_874P

VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72

9 OF 13

VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144

AL12
AL17
AL21
AL24
AL26
AL29
AL33
AL38
AM1
AM18
AM32
AM49
AN12
AN16
AN34
AN38
AP4
AP46
AR12
AR16
AR34
AR38
AT1
AT16
AT18
AT21
AT24
AT26
AT29
AT32
AT34
AT45
AV11
AV39
AW10
AW4
AW40
AW46
B47
B48
B49
BA12
BA14
BA44
BA5
BA6
BB41
BB43
BB9
BC10
BC13
BC15
BC19
BC24
BC26
BC31
BC35
BC40
BC45
BC8
BD43
BE44
BF1
BF2
BF3
BF48
BF49
BG17
BG2
BG22
BG25
BG28

BG33
BG37

BG48

BG3

BG4

G44

M16
M18
M21

C12
C25
C30

C4

C48

C5
D12
D16
D17
D30
D33

D8
E10
E13
E15
E17
E19
E22
E24
E26
E31
E33
E35
E40
E42

E8
F41
F43
F47

G6

H8

J10
J26
J29

J4
J40
J46
J47
J48

J9

K11
K39

U14L

VSS_196

VSS_145

VSS_197

VSS_146
VSS_147

VSS_198

VSS_148

VSS_199

VSS_149

VSS_200

VSS_150

VSS_201
VSS_202

VSS_151

VSS_203

VSS_152

VSS_204

VSS_153

VSS_205

VSS_154

VSS_206

VSS_155

VSS_207

VSS_156

VSS_208

VSS_157
VSS_158

VSS_209

VSS_159

VSS_210

VSS_160

VSS_211

VSS_161

VSS_212
VSS_213

VSS_162

VSS_214

VSS_163

VSS_215

VSS_164

VSS_216

VSS_165

VSS_217

VSS_166

VSS_218

VSS_167

VSS_219

VSS_168
VSS_169

VSS_220

VSS_170

VSS_221

VSS_171

VSS_222

VSS_172

VSS_223
VSS_224

VSS_173

VSS_225

VSS_174

VSS_226

VSS_175

VSS_227

VSS_176

VSS_228

VSS_177

VSS_229

VSS_178

VSS_230

VSS_179
VSS_180

VSS_231

VSS_181

VSS_232

VSS_182

VSS_233

VSS_183

VSS_234
VSS_235

VSS_184

VSS_236

VSS_185

VSS_237

VSS_186

VSS_238

VSS_187

VSS_239

VSS_188

VSS_240

VSS_189
VSS_190

VSS_241

VSS_191

VSS_242

VSS_192

VSS_243

VSS_193

VSS_244

VSS_194

VSS_245
VSS_246

VSS_195

12 OF 13

PCH_CFL-H_874P

M24
M32
M34
M49
M5
N12
N16
N34
N35
N37
N38
P26
P29
P4
P46
R12
R16
R26
R29
R3
R34
R38
R4
T17
T18
T32
T4
T49
T5
T7
U12
U15
U17
U21
U24
U33
U38
V20
V22
V4
V46
W25
W27
W28
W30
Y10
Y12
Y17
Y33
Y38
Y9

U14J

RSVD#Y14
RSVD#Y15

RSVD#U37
RSVD#U35

RSVD#N32
RSVD#R32

RSVD#AH15
RSVD#AH14

10 OF 13

PREQ#
PRDY#

CPU_TRST#

TRIGGER_OUT

TRIGGER_IN

PCH_CFL-H_874P

Y14

PGDMON

Y15
U37

U35
N32

R32
AH15

AH14

H_PREQ#_L

AL2

H_PRDY#_L

AM5

H_TRST#_L

AM4

PCH_2_CPU_TRIG_R

AK3

CPU_2_PCH_TRIG

AK2

R867
*1K_1%_4

R233 *short_0402
R234 *short_0402
R346 *short_0402
R232 *short_0402

H_PRDY#_L
H_TRST#_L

H_PREQ# [2]
H_PRDY# [2]

H_TRST# [2]
PCH_2_CPU_TRIG [8]
CPU_2_PCH_TRIG [8]

R345 *51_5%_4
R364 *51_5%_4

CRB is 30 ohme check it

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

PCH 7/7 (GND)

PCH 7/7 (GND)

PCH 7/7 (GND)

ZGE

ZGE

ZGE

1A

1A

15 78Friday, May 03, 2019

15 78Friday, May 03, 2019

1

15 78Friday, May 03, 2019

1A

5

4

3

2

1

16

D D

APS

+3VPCU+3V_DEEP_SUS

EMI RESERVE

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

XDP_DBRESET#

13

13

14

14

15

15

16

16
19
20

*APS CONN

17

17

18

18

C C

B B

19
20

EC12*10p/50V_4CN5

SUSB# [10,57]
SLP_S5# [10]

SUSC# [10,57]
SLP_A# [10]

RTC_RST# [10]
NBSWON# [57,59]
XDP_DBRESET# [10]
PCH_SLP_S0ix# [10,49]

+3V_DEEP_SUS [2,9,10,11,12,13,14,39]
+3VPCU [9,10,12,14,32,37,39,40,47,54,57,59,61,62,68,70,75]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

XDP & APS

XDP & APS

XDP & APS

1

ZGE

ZGE

ZGE

1A

1A

1A

16 78Friday, May 03, 2019

16 78Friday, May 03, 2019

16 78Friday, May 03, 2019

5

4

3

2

1

17

D D

+1.2VSUS

PM_THRMTRIP#

C C

B B

A A

R333 *1K_1%_4

SWAP Pin 8/3

A-DIMM0
SA0=0;SA1=0;SA2=0

R330
*0_5%_4

CHA_DIMM0_SA2 CHA_DIMM0_SA0

R329
*short_0402

R332

+3V

CHA_DIMM0_SA1

DIMM0_CHA_EVENT_NPM_THRMTRIP#

R323

*0_5%_4

R317
*short_0402

240_1%_4

M_A_A[16:0][4,19]

DDRA_ACT#[4,19]
DDR0_PAR[4,19]

DDR0_ALERT#[4,19]

DDR_DRAMRST#[10,18,19,20]

M_A_BS#0[4,19]
M_A_BS#1[4,19]

M_A_BG#0[4,19]
M_A_BG#1[4,19]

M_A_CS#0[4]
M_A_CS#1[4]
M_A_CKE0[4]
M_A_CKE1[4]

M_A_DIM0_CLKP0[4]
M_A_DIM0_CLKN0[4]
M_A_DIM0_CLKP1[4]
M_A_DIM0_CLKN1[4]

M_A_ODT0[4]
M_A_ODT1[4]

PCH_SMBCLK[10,18,19,20]
PCH_SMBDATA[10,18,19,20]

M_A_CB0[4,19]
M_A_CB4[4,19]
M_A_CB2[4,19]
M_A_CB7[4,19]
M_A_CB1[4,19]
M_A_CB5[4,19]
M_A_CB3[4,19]
M_A_CB6[4,19]

R325
*0_5%_4

R324
*short_0402

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

DIMM0_CHA_EVENT_N

C284 *0.1u/16V_4

PCH_SMBCLK
PCH_SMBDATA

CHA_DIMM0_SA0
CHA_DIMM0_SA1
CHA_DIMM0_SA2

M_A_CB0
M_A_CB4
M_A_CB2
M_A_CB7
M_A_CB1
M_A_CB5
M_A_CB3
M_A_CB6

+1.2VSUS

JDIM2A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DM8

DDR3-DIMM0_H=9.2_RVS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49

(260P)

DDR4 SODIMM 260 PIN

DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

+1.2VSUS

7
20
21
4
3
16
17

M_A_DQ8

28

M_A_DQ12

29

M_A_DQ11

41

M_A_DQ14

42

M_A_DQ9

24

M_A_DQ13

25

M_A_DQ15

38

M_A_DQ10

37
50
49
62
63
46
45
58
59

M_A_DQ25

70

M_A_DQ28

71

M_A_DQ30

83

M_A_DQ27

84

M_A_DQ24

66

M_A_DQ29

67

M_A_DQ31

79

M_A_DQ26

80
174
173
187
186
170
169
183
182

M_A_DQ45

195

M_A_DQ44

194

M_A_DQ46

207

M_A_DQ42

208

M_A_DQ40

191

M_A_DQ41

190

M_A_DQ47

203

M_A_DQ43

204
216
215
228
229
211
212
224
225

M_A_DQ56

237

M_A_DQ61

236

M_A_DQ63

249

M_A_DQ62

250

M_A_DQ57

232

M_A_DQ60

233

M_A_DQ59

245

M_A_DQ58

246

M_A_DQSP0

13

M_A_DQSP1

34

M_A_DQSP2

55

M_A_DQSP3

76

M_A_DQSP4

179

M_A_DQSP5

200

M_A_DQSP6

221

M_A_DQSP7

242

M_A_DQSP8

97

M_A_DQSN0

11

M_A_DQSN1

32

M_A_DQSN2

53

M_A_DQSN3

74

M_A_DQSN4

177

M_A_DQSN5

198

M_A_DQSN6

219

M_A_DQSN7

240

M_A_DQSN8

95

R793 1K_1%_4

SMDDR_VREF_CA[4]

M_A_DQ0
M_A_DQ2
M_A_DQ7
M_A_DQ5
M_A_DQ3
M_A_DQ1
M_A_DQ6

M_A_DQ17
M_A_DQ21
M_A_DQ19
M_A_DQ23
M_A_DQ16
M_A_DQ20
M_A_DQ18
M_A_DQ22

M_A_DQ32
M_A_DQ37
M_A_DQ34
M_A_DQ39
M_A_DQ33
M_A_DQ36
M_A_DQ35
M_A_DQ38

M_A_DQ51
M_A_DQ50
M_A_DQ53
M_A_DQ49
M_A_DQ52
M_A_DQ54
M_A_DQ55
M_A_DQ48

0.1u/16V_4

+SMDDR_VREF_CHA_DIMM0_R

C729

M_A_DQ4

8

M_A_DQ[63:0] [4,19]

SWAP Pin 8/3

M_A_DQSP[8:0] [4,19]

M_A_DQSN[8:0] [4,19]

VREF CHA Solution

R778
1K_1%_4

R730 2_1%_6

C694

0.022u/25V_4
R727 24.9_1%_4

+1.2VSUS

2.48A

R771 *short_0402

111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163

15
19
23
27
31
35
39
43
47
51
57
61
65
69
73
77
81
85
89
93

99
103
107
167
171
175
181
185
189
193
197
201
205
209
213
217
223
227
231
235
239
243
247
251

263
264

C706

0.1u/16V_4

JDIM2B

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19

1

VSS1

5

VSS2

9

VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47

NC#1
NC#2

VREF_CA

(260P)

DDR4 SODIMM 260 PIN

DDR3-DIMM0_H=9.2_RVS

+VREFCA_CHA_DIMM

VDDSPD

VPP1
VPP2

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

GND#1
GND#2

VTT

255

257
259

258

+VREFCA_CHA_DIMM

164

2
6
10
14
18
22
26
30
36
40
44
48
52
56
60
64
68
72
78
82
86
90
94
98
102
106
168
172
176
180
184
188
192
196
202
206
210
214
218
222
226
230
234
238
244
248
252

261
262

+3V

+2.5VSUS

DDR_VTT

+VREFCA_CHA_DIMM

Place these Caps near So-Dimm

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C115 1u/6.3V_4
C116 1u/6.3V_4
C108 1u/6.3V_4
C130 1u/6.3V_4
C141 1u/6.3V_4
C128 1u/6.3V_4
C129 1u/6.3V_4
C114 1u/6.3V_4

C310 10u/6.3V_6
C309 10u/6.3V_6
C311 10u/6.3V_6
C299 10u/6.3V_6
C298 10u/6.3V_6
C294 10u/6.3V_6
C305 10u/6.3V_6
C308 10u/6.3V_6

Place these Caps near So-Dimm

+VREFCA_CHA_DIMM

C709 0.1u/16V_4
C712 *2.2u/10V_4

+2.5VSUS

C103 *1u/6.3V_4
C102 1u/6.3V_4
C105 10u/6.3V_6
C104 10u/6.3V_6

+3V

C121 0.1u/16V_4
C120 2.2u/10V_4

DDR_VTT

C191 1u/6.3V_4
C844 1u/6.3V_4
C290 10u/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

DDR4 Channel A DIMM0

DDR4 Channel A DIMM0

DDR4 Channel A DIMM0

1

ZGE

ZGE

ZGE

1A

1A

17 78Friday, May 03, 2019

17 78Friday, May 03, 2019

17 78Friday, May 03, 2019

1A

5

4

3

2

1

18

M_B_DQ[63:0] [4,20]

SWAP Pin 8/3

M_B_DQSP[8:0] [4,20]

M_B_DQSN[8:0] [4,20]

M_B_ODT0
M_B_ODT1

JDIM1A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DM8

DDR4-DIMM0_H=5.2_RVS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49

(260P)

DDR4 SODIMM 260 PIN

DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_B_DQ4

7

M_B_DQ2

20

M_B_DQ7

21

M_B_DQ0

4

M_B_DQ5

3

M_B_DQ3

16

M_B_DQ6

17

M_B_DQ8

28

M_B_DQ14

29

M_B_DQ15

41

M_B_DQ12

42

M_B_DQ9

24

M_B_DQ10

25

M_B_DQ13

38

M_B_DQ11

37

M_B_DQ16

50

M_B_DQ22

49

M_B_DQ23

62

M_B_DQ20

63

M_B_DQ17

46

M_B_DQ18

45

M_B_DQ19

58

M_B_DQ21

59

M_B_DQ25

70

M_B_DQ30

71

M_B_DQ24

83

M_B_DQ31

84

M_B_DQ28

66

M_B_DQ27

67

M_B_DQ29

79

M_B_DQ26

80

M_B_DQ39

174

M_B_DQ38

173

M_B_DQ37

187

M_B_DQ32

186

M_B_DQ34

170

M_B_DQ35

169

M_B_DQ33

183

M_B_DQ36

182

M_B_DQ44

195

M_B_DQ41

194

M_B_DQ46

207

M_B_DQ43

208

M_B_DQ45

191

M_B_DQ40

190

M_B_DQ47

203

M_B_DQ42

204

M_B_DQ54

216

M_B_DQ48

215

M_B_DQ50

228

M_B_DQ55

229

M_B_DQ52

211

M_B_DQ51

212

M_B_DQ49

224

M_B_DQ53

225

M_B_DQ57

237

M_B_DQ59

236

M_B_DQ58

249

M_B_DQ56

250

M_B_DQ62

232

M_B_DQ61

233

M_B_DQ63

245

M_B_DQ60

246

M_B_DQSP0

13

M_B_DQSP1

34

M_B_DQSP2

55

M_B_DQSP3

76

M_B_DQSP4

179

M_B_DQSP5

200

M_B_DQSP6

221

M_B_DQSP7

242

M_B_DQSP8

97

M_B_DQSN0

11

M_B_DQSN1

32

M_B_DQSN2

53

M_B_DQSN3

74

M_B_DQSN4

177

M_B_DQSN5

198

M_B_DQSN6

219

M_B_DQSN7

240

M_B_DQSN8

95

M_B_DQ1

8

240_1%_4

R185
*short_0402

M_B_A[16:0][4,20]

DDRB_ACT#[4,20]
DDR1_PAR[4,20]

DDR1_ALERT#[4,20]

DDR_DRAMRST#[10,17,19,20]

DIMM0_CHB_EVENT_NPM_THRMTRIP#

M_B_BS#0[4,20]
M_B_BS#1[4,20]

M_B_BG#0[4,20]
M_B_BG#1[4,20]

M_B_CS#0[4]
M_B_CS#1[4]
M_B_CKE0[4]
M_B_CKE1[4]

M_B_DIM0_CLKP0[4]
M_B_DIM0_CLKN0[4]
M_B_DIM0_CLKP1[4]
M_B_DIM0_CLKN1[4]

M_B_ODT0[4]
M_B_ODT1[4]

PCH_SMBCLK[10,17,19,20]
PCH_SMBDATA[10,17,19,20]

M_B_CB1[4,20]
M_B_CB6[4,20]
M_B_CB5[4,20]
M_B_CB0[4,20]
M_B_CB4[4,20]
M_B_CB2[4,20]
M_B_CB3[4,20]
M_B_CB7[4,20]

D D

R331

+1.2VSUS

PM_THRMTRIP#

C C

B-DIMM0

B B

SA0=0;SA1=1;SA2=0

R805
*0_5%_4

CHB_DIMM0_SA2 CHB_DIMM0_SA0CHB_DIMM0_SA1

R802
*short_0402

R348 *1K_1%_4

+3V

R199
*short_0402

R198
*0_5%_4

SWAP Pin 8/3

R186
*0_5%_4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

DIMM0_CHB_EVENT_N

C322 *0.1u/16V_4

PCH_SMBCLK
PCH_SMBDATA

CHB_DIMM0_SA0
CHB_DIMM0_SA1
CHB_DIMM0_SA2

M_B_CB1
M_B_CB6
M_B_CB5
M_B_CB0
M_B_CB4
M_B_CB2
M_B_CB3
M_B_CB7

+1.2VSUS

2.48A

+1.2VSUS

+1.2VSUS

R216 1K_1%_4

JDIM1B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

NC#1

264

NC#2

DDR4-DIMM0_H=5.2_RVS

C236

0.1u/16V_4

255

VDDSPD

257

VPP1

259

VPP2

258

VTT

+VREFCA_CHB_DIMM

164

VREF_CA

2

VSS48

6

VSS49

10

VSS50

14

VSS51

18

VSS52

22

VSS53

26

VSS54

30

VSS55

36

VSS56

40

VSS57

44

VSS58

48

VSS59

52

VSS60

56

VSS61

60

VSS62

64

VSS63

68

VSS64

72

VSS65

78

VSS66

82

VSS67

86

VSS68

90

VSS69

(260P)

94

DDR4 SODIMM 260 PIN

VSS70

98

VSS71

102

VSS72

106

VSS73

168

VSS74

172

VSS75

176

VSS76

180

VSS77

184

VSS78

188

VSS79

192

VSS80

196

VSS81

202

VSS82

206

VSS83

210

VSS84

214

VSS85

218

VSS86

222

VSS87

226

VSS88

230

VSS89

234

VSS90

238

VSS91

244

VSS92

248

VSS93

252

VSS94

261

GND#1

262

GND#2

+SMDDR_VREF_CHB_DIMM0_R

R224
1K_1%_4

+3V

+2.5VSUS

DDR_VTT

+VREFCA_CHB_DIMM

Place these Caps near So-Dimm

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C137 1u/6.3V_4
C138 1u/6.3V_4
C139 1u/6.3V_4
C110 1u/6.3V_4
C134 1u/6.3V_4
C112 1u/6.3V_4
C117 1u/6.3V_4
C125 1u/6.3V_4
C302 10u/6.3V_6

C301 10u/6.3V_6
C313 10u/6.3V_6

C293 10u/6.3V_6
C315 10u/6.3V_6

C291 10u/6.3V_6
C292 10u/6.3V_6

C314 10u/6.3V_6

+VREFCA_CHB_DIMM +2.5VSUS

Place these Caps near So-Dimm

C210 0.1u/16V_4
C186 *2.2u/10V_6

VREF CHB Solution

R205 *short_0402

DDR_VTT

C281 1u/6.3V_4
C286 1u/6.3V_4
C271 10u/6.3V_6

+3V

C225 0.1u/16V_4
C143 2.2u/10V_4

C766 10u/6.3V_6
C765 10u/6.3V_6
C770 1u/6.3V_4
C761 *1u/6.3V_4

SMDDR_VREF_DQ1_M3[4]

+1.2VSUS [2,6,10,14,17,19,20,46,59,60,64,75]

A A

+2.5VSUS [17,19,20,64]

5

4

3

SMDDR_VREF_DQ1_M3

C151

0.022u/25V_4

R151

24.9_1%_4

R164 2_1%_6

2

+VREFCA_CHB_DIMM

C207

0.1u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

DDR4 Channel B DIMM0

DDR4 Channel B DIMM0

DDR4 Channel B DIMM0

1

ZGE

ZGE

ZGE

18 78Friday, May 03, 2019

18 78Friday, May 03, 2019

18 78Friday, May 03, 2019

1A

1A

1A

5

4

3

2

1

19

7/28 change to STD

M_A_A[16:0][4,17]

D D

DDRA_ACT#[4,17]
DDR0_PAR[4,17]

DDR0_ALERT#[4,17]

240_1%_4

R717

+1.2VSUS

PM_THRMTRIP# DIMM1_CHA_EVENT_N

PM_THRMTRIP#[2,11,17,18,20,53]

C C

B B

R718 *1K_1%_4

SWAP Pin 8/3

A-DIMM1
SA0=1;SA1=0;SA2=0

R722
*0_5%_4

Modify 8/10

R719
*short_0402

A A

+3V

R314
*0_5%_4

CHA_DIMM1_SA1

R316
*short_0402

DDR_DRAMRST#[10,17,18,20]

M_A_BS#0[4,17]
M_A_BS#1[4,17]

M_A_BG#0[4,17]
M_A_BG#1[4,17]

M_A_CS#2[4]
M_A_CS#3[4]
M_A_CKE2[4]
M_A_CKE3[4]

M_A_DIM1_CLKP0[4]
M_A_DIM1_CLKN0[4]
M_A_DIM1_CLKP1[4]
M_A_DIM1_CLKN1[4]

M_A_ODT2[4]
M_A_ODT3[4]

PCH_SMBCLK[10,17,18,20]
PCH_SMBDATA[10,17,18,20]

M_A_CB5[4,17]
M_A_CB1[4,17]
M_A_CB6[4,17]
M_A_CB3[4,17]
M_A_CB4[4,17]
M_A_CB0[4,17]
M_A_CB7[4,17]
M_A_CB2[4,17]

R322
*short_0402

CHA_DIMM1_SA0CHA_DIMM1_SA2

R315
*0_5%_4

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_A16

DIMM1_CHA_EVENT_N

C319 *0.1u/16V_4

PCH_SMBCLK
PCH_SMBDATA

CHA_DIMM1_SA0
CHA_DIMM1_SA1
CHA_DIMM1_SA2

M_A_CB5
M_A_CB1
M_A_CB6
M_A_CB3
M_A_CB4
M_A_CB0
M_A_CB7
M_A_CB2

+1.2VSUS

JDIM4A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DM8

DDR3-DIMM0_H=4_RVS

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49

(260P)

DDR4 SODIMM 260 PIN

DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

EZIW

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_A_DQ5

7

M_A_DQ6

20

M_A_DQ1

21

M_A_DQ0

4

M_A_DQ4

3

M_A_DQ7

16

M_A_DQ2

17

M_A_DQ13

28

M_A_DQ9

29

M_A_DQ15

41

M_A_DQ10

42

M_A_DQ12

24

M_A_DQ8

25

M_A_DQ11

38

M_A_DQ14

37

M_A_DQ20

50

M_A_DQ16

49

M_A_DQ22

62

M_A_DQ18

63

M_A_DQ21

46

M_A_DQ17

45

M_A_DQ23

58

M_A_DQ19

59

M_A_DQ29

70

M_A_DQ24

71

M_A_DQ26

83

M_A_DQ31

84

M_A_DQ28

66

M_A_DQ25

67

M_A_DQ27

79

M_A_DQ30

80

M_A_DQ36

174

M_A_DQ33

173

M_A_DQ38

187

M_A_DQ35

186

M_A_DQ37

170

M_A_DQ32

169

M_A_DQ39

183

M_A_DQ34

182

M_A_DQ41

195

M_A_DQ40

194

M_A_DQ43

207

M_A_DQ47

208

M_A_DQ44

191

M_A_DQ45

190

M_A_DQ42

203

M_A_DQ46

204

M_A_DQ52

216

M_A_DQ54

215

M_A_DQ48

228

M_A_DQ55

229

M_A_DQ51

211

M_A_DQ50

212

M_A_DQ49

224

M_A_DQ53

225

M_A_DQ57

237

M_A_DQ60

236

M_A_DQ58

249

M_A_DQ59

250

M_A_DQ56

232

M_A_DQ61

233

M_A_DQ62

245

M_A_DQ63

246

M_A_DQSP0

13

M_A_DQSP1

34

M_A_DQSP2

55

M_A_DQSP3

76

M_A_DQSP4

179

M_A_DQSP5

200

M_A_DQSP6

221

M_A_DQSP7

242

M_A_DQSP8

97

M_A_DQSN0

11

M_A_DQSN1

32

M_A_DQSN2

53

M_A_DQSN3

74

M_A_DQSN4

177

M_A_DQSN5

198

M_A_DQSN6

219

M_A_DQSN7

240

M_A_DQSN8

95

M_A_DQ3

8

M_A_DQ[63:0] [4,17]

SWAP Pin 8/3

M_A_DQSP[8:0] [4,17]

M_A_DQSN[8:0] [4,17]

2.48A

+1.2VSUS

JDIM4B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

NC#1

264

NC#2

DDR3-DIMM0_H=4_RVS

255

VDDSPD

257

VPP1

259

VPP2

258

VTT

164

VREF_CA

2

VSS48

6

VSS49

10

VSS50

14

VSS51

18

VSS52

22

VSS53

26

VSS54

30

VSS55

36

VSS56

40

VSS57

44

VSS58

48

VSS59

52

VSS60

56

VSS61

60

VSS62

64

VSS63

68

VSS64

72

VSS65

78

VSS66

82

VSS67

86

VSS68

90

VSS69

(260P)

94

DDR4 SODIMM 260 PIN

VSS70

98

VSS71

102

VSS72

106

VSS73

168

VSS74

172

VSS75

176

VSS76

180

VSS77

184

VSS78

188

VSS79

192

VSS80

196

VSS81

202

VSS82

206

VSS83

210

VSS84

214

VSS85

218

VSS86

222

VSS87

226

VSS88

230

VSS89

234

VSS90

238

VSS91

244

VSS92

248

VSS93

252

VSS94

261

GND#1

262

GND#2

+3V

+2.5VSUS

DDR_VTT

+VREFCA_CHA_DIMM

+VREFCA_CHA_DIMM

Place these Caps near So-Dimm

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C127 1u/6.3V_4
C135 1u/6.3V_4
C142 1u/6.3V_4
C119 1u/6.3V_4
C107 1u/6.3V_4
C126 1u/6.3V_4
C106 1u/6.3V_4
C109 1u/6.3V_4

C690 10u/6.3V_6
C689 10u/6.3V_6
C316 10u/6.3V_6
C691 10u/6.3V_6
C318 10u/6.3V_6
C317 10u/6.3V_6
C95 10u/6.3V_6
C94 10u/6.3V_6

Place these Caps near So-Dimm

+VREFCA_CHA_DIMM

C705 0.1u/16V_4
C702 *2.2u/10V_4

+2.5VSUS

C785 *1u/6.3V_4
C747 1u/6.3V_4
C273 10u/6.3V_6
C274 10u/6.3V_6

+3V

C693 0.1u/16V_4
C692 2.2u/10V_4

DDR_VTT

C700 1u/6.3V_4
C699 1u/6.3V_4
C695 10u/6.3V_6

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

DDR4 Channel A DIMM1

DDR4 Channel A DIMM1

DDR4 Channel A DIMM1

1

ZGE

ZGE

ZGE

1A

1A

19 78Friday, May 03, 2019

19 78Friday, May 03, 2019

19 78Friday, May 03, 2019

1A

5

4

3

2

1

20

7/28 change RVS

M_B_DQ[63:0] [4,18]

SWAP Pin 8/3

M_B_DQSP[8:0] [4,18]

M_B_DQSN[8:0] [4,18]

M_B_ODT2
M_B_ODT3

JDIM3A

144

A0

133

A1

132

A2

131

A3

128

A4

126

A5

127

A6

122

A7

125

A8

121

A9

146

A10/AP

120

A11

119

A12

158

A13

151

A14/WE#

156

A15/CAS#

152

A16/RAS#

162

S2#/C0

165

S3#/C1

114

ACT#

143

PARITY

116

ALERT#

134

EVENT#

108

RESET#

150

BA0

145

BA1

115

BG0

113

BG1

149

S0#

157

S1#

109

CKE0

110

CKE1

137

CK0

139

CK0#

138

CK1

140

CK1#

155

ODT0

161

ODT1

253

SCL

254

SDA

256

SA0

260

SA1

166

SA2

92

CB0

91

CB1

101

CB2

105

CB3

88

CB4

87

CB5

100

CB6

104

CB7

12

DM0

33

DM1

54

DM2

75

DM3

178

DM4

199

DM5

220

DM6

241

DM7

96

DM8

DDR4-DIMM0_H=4_STD

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49

(260P)

DDR4 SODIMM 260 PIN

DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
DQS#8

M_B_DQ0

7

M_B_DQ6

20

M_B_DQ3

21

M_B_DQ4

4

M_B_DQ1

3

M_B_DQ7

16

M_B_DQ2

17

M_B_DQ10

28

M_B_DQ9

29

M_B_DQ13

41

M_B_DQ11

42

M_B_DQ14

24

M_B_DQ8

25

M_B_DQ15

38

M_B_DQ12

37

M_B_DQ18

50

M_B_DQ17

49

M_B_DQ21

62

M_B_DQ19

63

M_B_DQ22

46

M_B_DQ16

45

M_B_DQ20

58

M_B_DQ23

59

M_B_DQ27

70

M_B_DQ28

71

M_B_DQ26

83

M_B_DQ29

84

M_B_DQ30

66

M_B_DQ25

67

M_B_DQ31

79

M_B_DQ24

80

M_B_DQ35

174

M_B_DQ34

173

M_B_DQ36

187

M_B_DQ33

186

M_B_DQ38

170

M_B_DQ39

169

M_B_DQ32

183

M_B_DQ37

182

M_B_DQ40

195

M_B_DQ45

194

M_B_DQ42

207

M_B_DQ47

208

M_B_DQ41

191

M_B_DQ44

190

M_B_DQ43

203

M_B_DQ46

204

M_B_DQ52

216

M_B_DQ51

215

M_B_DQ53

228

M_B_DQ49

229

M_B_DQ54

211

M_B_DQ48

212

M_B_DQ55

224

M_B_DQ50

225

M_B_DQ62

237

M_B_DQ61

236

M_B_DQ60

249

M_B_DQ63

250

M_B_DQ57

232

M_B_DQ59

233

M_B_DQ56

245

M_B_DQ58

246

M_B_DQSP0

13

M_B_DQSP1

34

M_B_DQSP2

55

M_B_DQSP3

76

M_B_DQSP4

179

M_B_DQSP5

200

M_B_DQSP6

221

M_B_DQSP7

242

M_B_DQSP8

97

M_B_DQSN0

11

M_B_DQSN1

32

M_B_DQSN2

53

M_B_DQSN3

74

M_B_DQSN4

177

M_B_DQSN5

198

M_B_DQSN6

219

M_B_DQSN7

240

M_B_DQSN8

95

M_B_DQ5

8

M_B_A[16:0][4,18]

D D

DDRB_ACT#[4,18]
DDR1_PAR[4,18]

240_1%_4

R720

+1.2VSUS

PM_THRMTRIP#[2,11,17,18,19,53]

C C

B B

Modify 9/14

PM_THRMTRIP# DIMM1_CHB_EVENT_N

SWAP Pin 8/3

B-DIMM1
SA0=1;SA1=1;SA2=0

+3V

R724
*0_5%_4

R725
*short_0402

R790
*short_0402

CHB_DIMM1_SA1

R797
*0_5%_4

CHB_DIMM1_SA0CHB_DIMM1_SA2

R770
*0_5%_4

R776
*short_0402

DDR1_ALERT#[4,18]

DDR_DRAMRST#[10,17,18,19]

M_B_BS#0[4,18]
M_B_BS#1[4,18]

M_B_BG#0[4,18]
M_B_BG#1[4,18]

M_B_CS#2[4]
M_B_CS#3[4]
M_B_CKE2[4]
M_B_CKE3[4]

M_B_DIM1_CLKP0[4]
M_B_DIM1_CLKN0[4]
M_B_DIM1_CLKP1[4]
M_B_DIM1_CLKN1[4]

M_B_ODT2[4]
M_B_ODT3[4]

PCH_SMBCLK[10,17,18,19]
PCH_SMBDATA[10,17,18,19]

M_B_CB2[4,18]
M_B_CB4[4,18]
M_B_CB7[4,18]
M_B_CB3[4,18]
M_B_CB6[4,18]
M_B_CB1[4,18]
M_B_CB0[4,18]
M_B_CB5[4,18]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A16

DIMM1_CHB_EVENT_N

C323 *0.1u/16V_4

PCH_SMBCLK
PCH_SMBDATA

CHB_DIMM1_SA0
CHB_DIMM1_SA1
CHB_DIMM1_SA2

M_B_CB2
M_B_CB4
M_B_CB7
M_B_CB3
M_B_CB6
M_B_CB1
M_B_CB0
M_B_CB5

+1.2VSUS

2.48A

+1.2VSUS

JDIM3B

111

VDD1

112

VDD2

117

VDD3

118

VDD4

123

VDD5

124

VDD6

129

VDD7

130

VDD8

135

VDD9

136

VDD10

141

VDD11

142

VDD12

147

VDD13

148

VDD14

153

VDD15

154

VDD16

159

VDD17

160

VDD18

163

VDD19

1

VSS1

5

VSS2

9

VSS3

15

VSS4

19

VSS5

23

VSS6

27

VSS7

31

VSS8

35

VSS9

39

VSS10

43

VSS11

47

VSS12

51

VSS13

57

VSS14

61

VSS15

65

VSS16

69

VSS17

73

VSS18

77

VSS19

81

VSS20

85

VSS21

89

VSS22

93

VSS23

99

VSS24

103

VSS25

107

VSS26

167

VSS27

171

VSS28

175

VSS29

181

VSS30

185

VSS31

189

VSS32

193

VSS33

197

VSS34

201

VSS35

205

VSS36

209

VSS37

213

VSS38

217

VSS39

223

VSS40

227

VSS41

231

VSS42

235

VSS43

239

VSS44

243

VSS45

247

VSS46

251

VSS47

263

NC#1

264

NC#2

DDR4-DIMM0_H=4_STD

255

VDDSPD

257

VPP1

259

VPP2

258

VTT

164

VREF_CA

2

VSS48

6

VSS49

10

VSS50

14

VSS51

18

VSS52

22

VSS53

26

VSS54

30

VSS55

36

VSS56

40

VSS57

44

VSS58

48

VSS59

52

VSS60

56

VSS61

60

VSS62

64

VSS63

68

VSS64

72

VSS65

78

VSS66

82

VSS67

86

VSS68

90

VSS69

(260P)

94

DDR4 SODIMM 260 PIN

VSS70

98

VSS71

102

VSS72

106

VSS73

168

VSS74

172

VSS75

176

VSS76

180

VSS77

184

VSS78

188

VSS79

192

VSS80

196

VSS81

202

VSS82

206

VSS83

210

VSS84

214

VSS85

218

VSS86

222

VSS87

226

VSS88

230

VSS89

234

VSS90

238

VSS91

244

VSS92

248

VSS93

252

VSS94

261

GND#1

262

GND#2

+3V

+2.5VSUS

DDR_VTT

+VREFCA_CHB_DIMM

+VREFCA_CHB_DIMM

Place these Caps near So-Dimm

1uF/10uF 4pcs on each side of connector

+1.2VSUS

C113 1u/6.3V_4
C136 1u/6.3V_4
C111 1u/6.3V_4

C133 1u/6.3V_4
C118 1u/6.3V_4
C124 1u/6.3V_4
C99 1u/6.3V_4
C759 10u/6.3V_6

C306 10u/6.3V_6
C296 10u/6.3V_6

C304 10u/6.3V_6
C300 10u/6.3V_6

C307 10u/6.3V_6
C295 10u/6.3V_6

C297 10u/6.3V_6

Place these Caps near So-Dimm

C175 0.1u/16V_4
C197 *2.2u/10V_6

+2.5VSUS+VREFCA_CHB_DIMM

C255 10u/6.3V_6
C244 10u/6.3V_6
C235 1u/6.3V_4
C229 *1u/6.3V_4

DDR_VTT

C848 1u/6.3V_4
C849 1u/6.3V_4
C837 10u/6.3V_6C132 1u/6.3V_4R721 *1K_1%_4

+3V

C335 0.1u/16V_4
C330 2.2u/10V_4

+1.2VSUS [2,6,10,14,17,18,19,46,59,60,64,75]
+2.5VSUS [17,18,19,64]

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

DDR4 Channel B DIMM1

DDR4 Channel B DIMM1

DDR4 Channel B DIMM1

1

ZGE

ZGE

ZGE

1A

1A

20 78Friday, May 03, 2019

20 78Friday, May 03, 2019

20 78Friday, May 03, 2019

1A

5

4

3

2

1

DG:1.8V

+1.8V_AON

1108 change MOS for cost down

DGPU_PWROK[23,25]

PCIE_CLKREQ_VGA#[11]

D D

C C

B B

PEG_RXP0[3]

PEG_RXN0[3]

PEG_RXP1[3]

PEG_RXN1[3]

PEG_RXP2[3]

PEG_RXN2[3]

PEG_RXP3[3]

PEG_RXN3[3]

PEG_RXP4[3]

PEG_RXN4[3]

PEG_RXP5[3]

PEG_RXN5[3]

PEG_RXP6[3]

PEG_RXN6[3]

PEG_RXP7[3]

PEG_RXN7[3]

PEG_RXP8[3]

PEG_RXN8[3]

PEG_RXP9[3]

PEG_RXN9[3]

PEG_RXP10[3]

PEG_RXN10[3]

PEG_RXP11[3]

PEG_RXN11[3]

PEG_RXP12[3]

PEG_RXN12[3]

PEG_RXP13[3]

PEG_RXN13[3]

PEG_RXP14[3]

PEG_RXN14[3]

PEG_RXP15[3]

PEG_RXN15[3]

321

QG13
DMG1012T-7

PEG_TXP0[3]

PEG_TXN0[3]

PEG_TXP1[3]

PEG_TXN1[3]

PEG_TXP2[3]

PEG_TXN2[3]

PEG_TXP3[3]

PEG_TXN3[3]

PEG_TXP4[3]

PEG_TXN4[3]

PEG_TXP5[3]

PEG_TXN5[3]

PEG_TXP6[3]

PEG_TXN6[3]

PEG_TXP7[3]

PEG_TXN7[3]

PEG_TXP8[3]

PEG_TXN8[3]

PEG_TXP9[3]

PEG_TXN9[3]

PEG_TXP10[3]

PEG_TXN10[3]

PEG_TXP11[3]

PEG_TXN11[3]

PEG_TXP12[3]

PEG_TXN12[3]

PEG_TXP13[3]

PEG_TXN13[3]

PEG_TXP14[3]

PEG_TXN14[3]

PEG_TXP15[3]

PEG_TXN15[3]

JS-N18-0705 Del

WAKE is not required for NB design

RG70
10K_5%_4

CLK_VGA_P[11]

CLK_VGA_N[11]

CG8910.22u/6.3V_2
CG8900.22u/6.3V_2

CG8970.22u/6.3V_2
CG8980.22u/6.3V_2

CG8890.22u/6.3V_2
CG8880.22u/6.3V_2

CG8950.22u/6.3V_2

CG8870.22u/6.3V_2
CG8860.22u/6.3V_2

CG8850.22u/6.3V_2
CG8840.22u/6.3V_2

CG8830.22u/6.3V_2
CG8920.22u/6.3V_2

CG8820.22u/6.3V_2
CG8940.22u/6.3V_2

CG8810.22u/6.3V_2
CG8800.22u/6.3V_2

CG8790.22u/6.3V_2
CG8780.22u/6.3V_2

CG8700.22u/6.3V_2
CG8670.22u/6.3V_2

CG8760.22u/6.3V_2
CG8750.22u/6.3V_2

CG8740.22u/6.3V_2
CG8730.22u/6.3V_2

CG8720.22u/6.3V_2
CG8710.22u/6.3V_2

CG8770.22u/6.3V_2
CG8680.22u/6.3V_2

CG8660.22u/6.3V_2
CG8630.22u/6.3V_2

PEGX_RST#
PEX_CLKREQ

PEG_RXP0_C
PEG_RXN0_C

PEG_RXP1_C
PEG_RXN1_C

PEG_RXP2_C
PEG_RXN2_C

PEG_RXP3_C
PEG_RXN3_C

PEG_RXP4_C
PEG_RXN4_C

PEG_RXP5_C
PEG_RXN5_C

PEG_RXP6_C
PEG_RXN6_C

PEG_RXP7_C
PEG_RXN7_C

PEG_RXP8_C
PEG_RXN8_C

PEG_RXP9_C
PEG_RXN9_C

PEG_RXP10_C
PEG_RXN10_C

PEG_RXP11_C
PEG_RXN11_C

PEG_RXP12_C
PEG_RXN12_C

PEG_RXP13_C
PEG_RXN13_C

PEG_RXP14_C
PEG_RXN14_C

PEG_RXP15_C
PEG_RXN15_C

N17_GPU RST#

+1.8V_AON

A A

DGPU_HOLD_RST#[13]

Cb

PLTRST#[12,41,49,50,51,52,57,59]

Rg

RG181

1107 Del SYS_PEX_RST_MON#

*short_0402

CG8930.1u/16V_4

Ub

1

4

2

UG7

3 5

NL17SZ08DFT2G

5

Rf

RG182 *short_0402

RG177
100K_5%_4

BK44
BK26
BL26

BM26
BM27

BG26
BH26

BL27
BK27

BF26
BE26

BK29
BL29

BF27
BG27

BM29
BM30

BG29
BH29

BL30
BK30

BF29
BE29

BK32
BL32

BF30
BG30

BM32
BM33

BG32
BH32

BL33
BK33

BF32
BE32

BK35
BL35

BF33
BG33

BM35
BM36

BG35
BH35

BL36
BK36

BF35
BE35

BK38
BL38

BF36
BG36

BM38
BM39

BG38
BH38

BL39
BK39

BF38
BE38

BK41
BL41

BF39
BG39

BM41
BM42

BH41
BG41

BL42
BK42

PEGX_RST#

UG1A

1/22 PCI_EXPRESS

PEX_WAKE

PEX_RST

PEX_CLKREQ

PEX_REFCLK
PEX_REFCLK

PEX_TX0
PEX_TX0

PEX_RX0
PEX_RX0

PEX_TX1
PEX_TX1

PEX_RX1
PEX_RX1

PEX_TX2
PEX_TX2

PEX_RX2
PEX_RX2

PEX_TX3
PEX_TX3

PEX_RX3
PEX_RX3

PEX_TX4
PEX_TX4

PEX_RX4
PEX_RX4

PEX_TX5
PEX_TX5

PEX_RX5
PEX_RX5

PEX_TX6
PEX_TX6

PEX_RX6
PEX_RX6

PEX_TX7
PEX_TX7

PEX_RX7
PEX_RX7

PEX_TX8
PEX_TX8

PEX_RX8
PEX_RX8

PEX_TX9
PEX_TX9

PEX_RX9
PEX_RX9

PEX_TX10
PEX_TX10

PEX_RX10
PEX_RX10

PEX_TX11
PEX_TX11

PEX_RX11
PEX_RX11

PEX_TX12
PEX_TX12

PEX_RX12
PEX_RX12

PEX_TX13
PEX_TX13

PEX_RX13
PEX_RX13

PEX_TX14
PEX_TX14

PEX_RX14
PEX_RX14

PEX_TX15
PEX_TX15

PEX_RX15
PEX_RX15

N18E-G3-ES-A1

PEGX_RST# [23,25]

0812 add intersheet

BB35

PEX_DVDD

BB36

PEX_DVDD

BC35

PEX_DVDD

BC36

PEX_DVDD

BD33

PEX_DVDD

BD36

PEX_DVDD

BB33

PEX_CVDD

BC33

PEX_CVDD

1.8V

+1.8V_MAIN

BB26

PEX_HVDD

BB27

PEX_HVDD

BB29

PEX_HVDD

BB32

PEX_HVDD

BC26

PEX_HVDD

BC27

PEX_HVDD

BC29

PEX_HVDD

BC30

PEX_HVDD

BC32

PEX_HVDD

BD27

PEX_HVDD

BD30

PEX_HVDD

BB30

PEX_PLL_HVDD

PEX_TERMP

BL44

PEX_TERMP

1/22

4

Under GPU

1.0V

+1V_GFX

JS-N18

0.47*16 4.7*3 22*2 10*3

CG8280.47u/6.3V_2
CG7970.47u/6.3V_2 CG6110u/6.3V_6
CG8250.47u/6.3V_2
CG8440.47u/6.3V_2
CG8260.47u/6.3V_2
CG8090.47u/6.3V_2
CG7890.47u/6.3V_2
CG8270.47u/6.3V_2

HVDD+PLL_HVDD

0.47*10 4.7*3

CG7800.47u/6.3V_2
CG7840.47u/6.3V_2
CG7820.47u/6.3V_2
CG8500.47u/6.3V_2
CG8460.47u/6.3V_2
CG8550.47u/6.3V_2
CG8510.47u/6.3V_2
CG8480.47u/6.3V_2
CG7860.47u/6.3V_2
CG7880.47u/6.3V_2CG8960.22u/6.3V_2

CG8240.47u/6.3V_2
CG8310.47u/6.3V_2
CG8410.47u/6.3V_2
CG8360.47u/6.3V_2
CG8000.47u/6.3V_2
CG8300.47u/6.3V_2
CG8290.47u/6.3V_2
CG7850.47u/6.3V_2
CG534.7u/6.3V _6
CG484.7u/6.3V _6
CG524.7u/6.3V _6

CG364.7u/6.3V_6
CG394.7u/6.3V_6

JS-N18-0709 change 0.47U/25V_4 to 0.47u/6.3V_2

PEX_PLL_HVDD

JS-N18

RG36 2.49 K_1%_4

CG7830.47u/6.3V_2
CG7810.47u/6.3V_2
CG8374.7u/6.3V_6

RG141 *s hort_0402

+1.8V_MAIN

3

Place between GPU and PS

CG6222u/6.3V_6
CG6022u/6.3V_6

22*2 10*3

CG6410u/6.3V_6
CG5010u/6.3V_6

VMA_DQ[63:0][27]

CG83222u/6.3V_6
CG4022u/6.3V_6
CG4110u/6.3V_6
CG3710u/6.3V_6
CG4210u/6.3V_6

FBA_DBI[7:0][27]

FBA_EDC[7:0][27]

1.8V

JS-N18

VMA_DQ[63:0]

CG407

0.47u/6.3V_2

VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
VMA_DQ5
VMA_DQ6
VMA_DQ7
VMA_DQ8
VMA_DQ9
VMA_DQ10
VMA_DQ11
VMA_DQ12
VMA_DQ13
VMA_DQ14
VMA_DQ15
VMA_DQ16
VMA_DQ17
VMA_DQ18
VMA_DQ19
VMA_DQ20
VMA_DQ21
VMA_DQ22
VMA_DQ23
VMA_DQ24
VMA_DQ25
VMA_DQ26
VMA_DQ27
VMA_DQ28
VMA_DQ29
VMA_DQ30
VMA_DQ31
VMA_DQ32
VMA_DQ33
VMA_DQ34
VMA_DQ35
VMA_DQ36
VMA_DQ37
VMA_DQ38
VMA_DQ39
VMA_DQ40
VMA_DQ41
VMA_DQ42
VMA_DQ43
VMA_DQ44
VMA_DQ45
VMA_DQ46
VMA_DQ47
VMA_DQ48
VMA_DQ49
VMA_DQ50
VMA_DQ51
VMA_DQ52
VMA_DQ53
VMA_DQ54
VMA_DQ55
VMA_DQ56
VMA_DQ57
VMA_DQ58
VMA_DQ59
VMA_DQ60
VMA_DQ61
VMA_DQ62
VMA_DQ63

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

FBA_PLL_AVDD

CG414

0.47u/6.3V_2

AG48
AG49

AD47
AD49
AD48
AC46
AC47
AA47
AA46
AA45

AW51

BA52

AW50

BA51
BA50
BB50
BA49

AW49

AV48

AV51
AV52
AV49

AK49
AM47
AM46
AN48
AN49
AM44
AM45
AN45
AN46
AR48
AN47
AR47
AR46

AG47
AC48
BB51
AV50
AM48
AR49

AA48
BB52

AK48
AR51

U51
U48
U50
U49
R51
R50
R47
U46
V46
Y45
Y47
Y46
V50
V47
U52
V51

AJ44
AJ45
AF46

AF47
AF48

Y44

AT49
AT47
AT48
AT46

AJ48
AJ46
AJ47

U47
Y48

R48
V48

AF44

AT50

W45
W47
W49
W51

W6

W8
Y14
Y15

AF42

L29

UG1B

2/22 FBA

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

GND
GND
GND
GND
GND
GND
GND
GND

FB_REFPLL_AVDD0
FB_REFPLL_AVDD1

N18E-G3-ES-A1

2

21

FBA_CMD0

Y51

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_CMD34
FBA_CMD35

FBA_DBG_RFU1
FBA_DBG_RFU2

FBA_CLK0
FBA_CLK0
FBA_CLK1
FBA_CLK1

FBA_WCK01
FBA_WCK01

FBA_WCKB01
FBA_WCKB01

FBA_WCK23
FBA_WCK23

FBA_WCKB23
FBA_WCKB23

FBA_WCK45
FBA_WCK45

FBA_WCKB45
FBA_WCKB45

FBA_WCK67
FBA_WCK67

FBA_WCKB67
FBA_WCKB67

FBA_PLL_AVDD

2/22

Y52
Y49
AA52
AA51
AA50
AC50
AC51
AC52
AC49
AD52
AD51
AD50
AF50
AF51
AF52
AN50
AN51
AN52
AM49
AM52
AM51
AM50
AK50
AK51
AK52
AJ49
AJ52
AJ51
AJ50
AG50
AG51
AF49
AG52
Y50
AR50

AA44
AN44

AG45
AG46
AK46
AK45

U45
U44
V45
V44
AC45
AC44
AD46
AD45
AV47
AV46
AW48
AW47
AR45
AR44
AT45
AT44

AN42

FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CMD32
FBA_CMD33
FBA_DEBUG0
FBA_DEBUG1

FBA_PLL_AVDD

FBA_CMD[33:0] [27]

FBVDDQ_MEMFBVDDQ_MEM

RG122

RG105

10K_4

10K_4

FBA_CMD10
FBA_CMD26

FBA_CMD2
FBA_CMD18

JS-N18

RG142

RG102

10K_4

10K_4

close to VRAM

TPG52
TPG66

VMA_CLK0 [27]
VMA_CLK0# [27]
VMA_CLK1 [27]
VMA_CLK1# [27]

VMA_WCK01 [27 ]
VMA_WCK01# [2 7]
VMA_WCKB01 [27]
VMA_WCKB01# [27]
VMA_WCK23 [27 ]
VMA_WCK23# [2 7]
VMA_WCKB23 [27]
VMA_WCKB23# [27]
VMA_WCK45 [27 ]
VMA_WCK45# [2 7]
VMA_WCKB45 [27]
VMA_WCKB45# [27]
VMA_WCK67 [27 ]
VMA_WCK67# [2 7]
VMA_WCKB67 [27]
VMA_WCKB67# [27]

CG2922u/6.3V _6
CG354.7u/6.3V _6
CG314.7u/6.3V _6
CG5810.47u/6.3V_2

JS-N18

JS-N18

+1.8V_MAIN

1 2

LG1 HCB1005KF-330T30

Place near GPU

+1.8V_AON [2 3,24,25,27,28,29,30,70,73,75]
+1V_GFX [23,24,75]
+1.8V_MAIN [23,25,35,75]
FBVDDQ_MEM [22,25,27,28,29,30,73]
FBA_PLL_AVDD [22]

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

N18E-GX-1/9 (PCIE)

N18E-GX-1/9 (PCIE)

N18E-GX-1/9 (PCIE)

1

ZGE

ZGE

ZGE

21 78Friday, May 03, 2019

21 78Friday, May 03, 2019

21 78Friday, May 03, 2019

1A

1A

1A

5

FBVDDQ_MEM [21,25,27,28,29,30,73]
FBA_PLL_AVDD [21 ]

4

3

2

1

22

UG1D

VMC_DQ0
VMC_DQ1
VMC_DQ2
VMC_DQ3
VMC_DQ4
VMC_DQ5
VMC_DQ6
VMC_DQ7
VMC_DQ8
VMC_DQ9
VMC_DQ10
VMC_DQ11
VMC_DQ12
VMC_DQ13
VMC_DQ14
VMC_DQ15
VMC_DQ16
VMC_DQ17
VMC_DQ18
VMC_DQ19
VMC_DQ20
VMC_DQ21
VMC_DQ22
VMC_DQ23
VMC_DQ24
VMC_DQ25
VMC_DQ26
VMC_DQ27
VMC_DQ28
VMC_DQ29
VMC_DQ30
VMC_DQ31
VMC_DQ32
VMC_DQ33
VMC_DQ34
VMC_DQ35
VMC_DQ36
VMC_DQ37
VMC_DQ38
VMC_DQ39
VMC_DQ40
VMC_DQ41
VMC_DQ42
VMC_DQ43
VMC_DQ44
VMC_DQ45
VMC_DQ46
VMC_DQ47
VMC_DQ48
VMC_DQ49
VMC_DQ50
VMC_DQ51
VMC_DQ52
VMC_DQ53
VMC_DQ54
VMC_DQ55
VMC_DQ56
VMC_DQ57
VMC_DQ58
VMC_DQ59
VMC_DQ60
VMC_DQ61
VMC_DQ62
VMC_DQ63

RG88
10K_5%_4

C6
D6
A6
B6
B4
A4
B3
C4
D9
C9
E9
B9
B8
A8

F6

E6
F18
G18
E18
H18
D15
E15
G17
H17
J15
H15
E14
F14
H11
G11
F11
E11
J29
F30
H29
G30
B30
A30
H30
C30
D27
J26
F27
G27
C27
B27
A27
G29
H20
D18
G20
E20
F23
E21
D21
E23
G24
H26
F24
G26
F26
D26
B26
C26

A5

C8
J18
F12
D29
E27
F20
E26

D5

D8
E17
E12
E30
B29
G21
E24

Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y31

4/22 FBC

FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63

FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7

FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7

GND
GND
GND
GND
GND
GND
GND
GND

N18E-G3-ES-A1

FBC_CMD0

C11

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33
FBC_CMD34
FBC_CMD35

FBC_DBG_RFU1
FBC_DBG_RFU2

FBC_CLK0
FBC_CLK0
FBC_CLK1
FBC_CLK1

FBC_WCK01
FBC_WCK01

FBC_WCKB01
FBC_WCKB01

FBC_WCK23
FBC_WCK23

FBC_WCKB23
FBC_WCKB23

FBC_WCK45
FBC_WCK45

FBC_WCKB45
FBC_WCKB45

FBC_WCK67
FBC_WCK67

FBC_WCKB67
FBC_WCKB67

B11
A11
D11
A12
B12
C12
C14
B14
A14
D14
A15
B15
C15
C17
B17
B24
A24
D23
A23
B23
C23
C21
B21
A21
D20
A20
B20
C20
C18
B18
A18
A17
D17
A9
C24

J14
J23

G15
F15
H21
J21

F8
G8
G9
F9
H12
G12
G14
H14
J27
H27
E29
F29
G23
H23
H24
J24

FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8

FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30
FBC_CMD31
FBC_CMD32
FBC_CMD33

FBC_DEBUG0
FBC_DEBUG1

FBC_CMD[33:0] [29]

TPG37
TPG39

VMC_CLK0 [29]
VMC_CLK0# [29]
VMC_CLK1 [29]
VMC_CLK1# [29]

VMC_WCK01 [29]
VMC_WCK01# [29]
VMC_WCKB01 [29]
VMC_WCKB01# [29]
VMC_WCK23 [29]
VMC_WCK23# [29]
VMC_WCKB23 [29]
VMC_WCKB23# [29]
VMC_WCK45 [29]
VMC_WCK45# [29]
VMC_WCKB45 [29]
VMC_WCKB45# [29]
VMC_WCK67 [29]
VMC_WCK67# [29]
VMC_WCKB67 [29]
VMC_WCKB67# [29]

VMD_DQ[63:0][30]

JS-N18

FBD_DBI[7:0][30]

FBD_EDC[7:0][30]

FBA_PLL_AVDD

L17

FBC_PLL_AVDD

CG724

0.47u/6.3V_2

4/22

FBVDDQ_MEM FBVDDQ_MEM

RG103

RG114

10K_5%_4

10K_5%_4

FBD_CMD10
FBD_CMD26

FBD_CMD2
FBD_CMD18

JS-N18

RG100

RG119

10K_5%_4

10K_5%_4

close to VRAM

3

2

VMD_DQ0
VMD_DQ1
VMD_DQ2
VMD_DQ3
VMD_DQ4
VMD_DQ5
VMD_DQ6
VMD_DQ7
VMD_DQ8
VMD_DQ9
VMD_DQ10
VMD_DQ11
VMD_DQ12
VMD_DQ13
VMD_DQ14
VMD_DQ15
VMD_DQ16
VMD_DQ17
VMD_DQ18
VMD_DQ19
VMD_DQ20
VMD_DQ21
VMD_DQ22
VMD_DQ23
VMD_DQ24
VMD_DQ25
VMD_DQ26
VMD_DQ27
VMD_DQ28
VMD_DQ29
VMD_DQ30
VMD_DQ31
VMD_DQ32
VMD_DQ33
VMD_DQ34
VMD_DQ35
VMD_DQ36
VMD_DQ37
VMD_DQ38
VMD_DQ39
VMD_DQ40
VMD_DQ41
VMD_DQ42
VMD_DQ43
VMD_DQ44
VMD_DQ45
VMD_DQ46
VMD_DQ47
VMD_DQ48
VMD_DQ49
VMD_DQ50
VMD_DQ51
VMD_DQ52
VMD_DQ53
VMD_DQ54
VMD_DQ55
VMD_DQ56
VMD_DQ57
VMD_DQ58
VMD_DQ59
VMD_DQ60
VMD_DQ61
VMD_DQ62
VMD_DQ63

FBD_DBI0
FBD_DBI1
FBD_DBI2
FBD_DBI3
FBD_DBI4
FBD_DBI5
FBD_DBI6
FBD_DBI7

FBD_EDC0
FBD_EDC1
FBD_EDC2
FBD_EDC3
FBD_EDC4
FBD_EDC5
FBD_EDC6
FBD_EDC7

AK8
AK4
AK2
AK3
AK5
AK6
AK9
AK7
AG4

AF9
AG6
AG7

AJ4

AJ5

AJ6
AG5

Y6
Y5
V5

Y4
AA6
AA5
AC5
AC4
AD7
AC6

AF6

AD6

AF7
AF8
AF2
AF3

F4

E1

F3

F5

D2
D1
C3
C2

J5

J4

L8

J2

F1

F2

H4
H5

V7

V8

V6

V9

U4
R5
R6
U8

P6

R9

P4

P5

L7

L6

L4

L5

AJ1
AG1
AA7
AD5

D3
H3
U5
M9

AJ3
AG2
AA9

AF4

E3
H2
U6
M5

Y32
Y33
Y34
Y35
Y36
Y37
Y38
Y39

UG1E

5/22 FBD

FBD_D0
FBD_D1
FBD_D2
FBD_D3
FBD_D4
FBD_D5
FBD_D6
FBD_D7
FBD_D8
FBD_D9
FBD_D10
FBD_D11
FBD_D12
FBD_D13
FBD_D14
FBD_D15
FBD_D16
FBD_D17
FBD_D18
FBD_D19
FBD_D20
FBD_D21
FBD_D22
FBD_D23
FBD_D24
FBD_D25
FBD_D26
FBD_D27
FBD_D28
FBD_D29
FBD_D30
FBD_D31
FBD_D32
FBD_D33
FBD_D34
FBD_D35
FBD_D36
FBD_D37
FBD_D38
FBD_D39
FBD_D40
FBD_D41
FBD_D42
FBD_D43
FBD_D44
FBD_D45
FBD_D46
FBD_D47
FBD_D48
FBD_D49
FBD_D50
FBD_D51
FBD_D52
FBD_D53
FBD_D54
FBD_D55
FBD_D56
FBD_D57
FBD_D58
FBD_D59
FBD_D60
FBD_D61
FBD_D62
FBD_D63

FBD_DQM0
FBD_DQM1
FBD_DQM2
FBD_DQM3
FBD_DQM4
FBD_DQM5
FBD_DQM6
FBD_DQM7

FBD_DQS_WP0
FBD_DQS_WP1
FBD_DQS_WP2
FBD_DQS_WP3
FBD_DQS_WP4
FBD_DQS_WP5
FBD_DQS_WP6
FBD_DQS_WP7

GND
GND
GND
GND
GND
GND
GND
GND

N18E-G3-ES-A1

FBD_CMD0

AD2

FBD_CMD0
FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8

FBD_CMD9
FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33
FBD_CMD34
FBD_CMD35

FBD_DBG_RFU1
FBD_DBG_RFU2

FBD_CLK0
FBD_CLK0
FBD_CLK1
FBD_CLK1

FBD_WCK01
FBD_WCK01

FBD_WCKB01
FBD_WCKB01

FBD_WCK23
FBD_WCK23

FBD_WCKB23
FBD_WCKB23

FBD_WCK45
FBD_WCK45

FBD_WCKB45
FBD_WCKB45

FBD_WCK67
FBD_WCK67

FBD_WCKB67
FBD_WCKB67

FBD_PLL_AVDD

AD1
AD4
AC1
AC2
AC3
AA3
AA2
AA1
AA4
Y1
Y2
Y3
V3
V2
V1
L3
L2
L1
M4
M1
M2
M3
P3
P2
P1
R4
R1
R2
R3
U3
U2
V4
U1
AD3
J3

AC9
P9

Y8
Y7
R8
R7

AJ8
AJ7
AG8
AG9
AD8
AD9
AC7
AC8
J6
J7
H7
H6
P8
P7
M7
M8

V11

FBD_CMD10
FBD_CMD11
FBD_CMD12
FBD_CMD13
FBD_CMD14
FBD_CMD15
FBD_CMD16
FBD_CMD17
FBD_CMD18
FBD_CMD19
FBD_CMD20
FBD_CMD21
FBD_CMD22
FBD_CMD23
FBD_CMD24
FBD_CMD25
FBD_CMD26
FBD_CMD27
FBD_CMD28
FBD_CMD29
FBD_CMD30
FBD_CMD31
FBD_CMD32
FBD_CMD33

FBD_CMD1
FBD_CMD2
FBD_CMD3
FBD_CMD4
FBD_CMD5
FBD_CMD6
FBD_CMD7
FBD_CMD8
FBD_CMD9

FBD_DEBUG0
FBD_DEBUG1

FBA_PLL_AVDD

FBD_CMD[33:0] [30]

TPG59
TPG48

VMD_CLK0 [30]
VMD_CLK0# [30]
VMD_CLK1 [30]
VMD_CLK1# [30]

VMD_WCK01 [30]
VMD_WCK01# [30]
VMD_WCKB01 [30]
VMD_WCKB01# [30]
VMD_WCK23 [30]
VMD_WCK23# [30]
VMD_WCKB23 [30]
VMD_WCKB23# [30]
VMD_WCK45 [30]
VMD_WCK45# [30]
VMD_WCKB45 [30]
VMD_WCKB45# [30]
VMD_WCK67 [30]
VMD_WCK67# [30]
VMD_WCKB67 [30]
VMD_WCKB67# [30]

CG504

0.47u/6.3V_2

JS-N18

N18E-G3

5/22

N/AFBD

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

N18E-GX-2/9 (Memory)

N18E-GX-2/9 (Memory)

N18E-GX-2/9 (Memory)

1

ZGE

ZGE

ZGE

1A

1A

22 78Friday, May 03, 2019

22 78Friday, May 03, 2019

22 78Friday, May 03, 2019

1A

VMB_CLK0 [28]
VMB_CLK0# [28]
VMB_CLK1 [28]
VMB_CLK1# [28]

VMB_WCK01 [28]
VMB_WCK01# [28]
VMB_WCKB01 [28]
VMB_WCKB01# [28]
VMB_WCK23 [28]
VMB_WCK23# [28]
VMB_WCKB23 [28]
VMB_WCKB23# [28]
VMB_WCK45 [28]
VMB_WCK45# [28]
VMB_WCKB45 [28]
VMB_WCKB45# [28]
VMB_WCK67 [28]
VMB_WCK67# [28]
VMB_WCKB67 [28]
VMB_WCKB67# [28]

RG82
10K_5%_4

VMC_DQ[63:0][29]

JS-N18

RG93
10K_5%_4

RG86
10K_5%_4

FBC_DBI0
FBC_DBI1
FBC_DBI2
FBC_DBI3
FBC_DBI4
FBC_DBI5
FBC_DBI6
FBC_DBI7

FBC_EDC0
FBC_EDC1
FBC_EDC2
FBC_EDC3
FBC_EDC4
FBC_EDC5
FBC_EDC6
FBC_EDC7

RG83
10K_5%_4

FBC_DBI[7:0][29]

FBC_EDC[7:0][29]

FBC_CMD10
FBC_CMD26

FBC_CMD2
FBC_CMD18

close to VRAM

VMB_DQ[63:0][28]

D D

C C

FBB_DBI[7:0][28]

B B

A A

FBB_EDC[7:0][28]

VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63

FBB_DBI0
FBB_DBI1
FBB_DBI2
FBB_DBI3
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7

FBB_EDC0
FBB_EDC1
FBB_EDC2
FBB_EDC3
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7

H32
D32
A33
B32
E32

G32

J30
F32
H36

G36

J36
F36
F33
D33
J32

G33

E45
D45
F45

G45

D42
E42
F42
H41
E41
F39
E39
D39
F38
E38
D36
E36

M50

P48
M51
M49

P47

P52

R46

P46

L50

L51

L52

L49
M46

L47
M48
M47

D48

C50

C48

C49

E49

E50

F49

F48

F50

D52

J50

H48

H51

J51

H49

H52

C32

E33

E44
G39

P49

L48

D50

H50

B33

E35
G44

H38

P50

J48

D51

F51

Y16

Y17

Y18

Y19

Y20

Y21

Y22

Y23

UG1C

3/22 FBB

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

GND
GND
GND
GND
GND
GND
GND
GND

N18E-G3-ES-A1

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8

FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32
FBB_CMD33
FBB_CMD34
FBB_CMD35

FBB_DBG_RFU1
FBB_DBG_RFU2

FBB_CLK0
FBB_CLK0
FBB_CLK1
FBB_CLK1

FBB_WCK01

FBB_WCK01
FBB_WCKB01
FBB_WCKB01

FBB_WCK23

FBB_WCK23
FBB_WCKB23
FBB_WCKB23

FBB_WCK45

FBB_WCK45
FBB_WCKB45
FBB_WCKB45

FBB_WCK67

FBB_WCK67
FBB_WCKB67
FBB_WCKB67

FBB_PLL_AVDD

A35
D35
A36
B36
C36
C38
B38
A38
D38
A39
B39
C39
C41
B41
A41
B49
A49
A48
D47
A47
B47
C47
C45
B45
A45
D44
A44
B44
C44
C42
B42
D41
A42
C35
B50

J35
J41

H42
G42
F47
E47

J33
H33
G35
H35
J39
H39
F41
G41
L46
L45
M44
M45
H47
H46
J47
J46

L38

FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CMD32

FBB_CMD33
FBB_DEBUG0
FBB_DEBUG1

FBA_PLL_AVDD

3/22

JS-N18 JS-N18

FBB_CMD[33:0] [28]

TPG36
TPG42

CG410

0.47u/6.3V_2

FBVDDQ_MEM FBVDDQ_MEM FBV DDQ_MEM FBVDDQ_MEM

RG95
10K_5%_4

FBB_CMD10
FBB_CMD26

FBB_CMD2
FBB_CMD18

RG91

RG97

10K_5%_4

10K_5%_4

FBB_CMD0

B35

close to VRAM

5

4

5

UG1N

7/22 IFPAB

IFPAB_RSET

RG152 1K_5%_4

CORE_PLLVDD

Under the GPU

D D

CG833

0.47u/6.3V_2

0.4A

+1V_GFX

CG801

CG849

4.7u/6.3V_6

0.47u/6.3V_2

C C

1.8V

CG799

BD23

IFPAB_RSET

BD21

IFPAB_PLLVDD

BB18

IFP_IOVDD

BB17

IFP_IOVDD

BB20

CG802

CG803

IFP_IOVDD

BB21

IFP_IOVDD

0.47u/6.3V_2

0.47u/6.3V_2

0.47u/6.3V_2

Under the GPUNear th e GPU

IFPAB

N18E-G3-ES-A1

JS-N18E-TBD

RG159

RG153

*MIC@100K_1%_4

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

B B

A A

STRAP5

RG158

SAM@100K_1%_4

UG1U

14/22 MISC 2

BL3

STRAP0

STRAP0

BL4

STRAP1

STRAP1

BM4

STRAP2

STRAP2

BM5

STRAP3

STRAP3

BK5

STRAP4

STRAP4

BJ5

STRAP5

STRAP5

N18E-G3-ES-A1

+1.8V_AON

RG12
10K_1%_4

GPIO27_IFPC_HPD

JS-N18 JS-N18 JS-N18

GPIO27_IFPE_HPD_Q DP_HPD_PCH

2

QG4

MMBT3904

1 3

GND

RG173

*100K_1%_4

*100K_1%_4

RG174

RG154

100K_1%_4

100K_1%_4

ROM_CS

ROM_SI

ROM_SO

ROM_SCLK

BUFRST

21/22

HDMI-HPD

RG9 100K_5%_4

RG10
100K_5%_4

GND

GND

0712: CG106 change to 0201 0712: CG107 change to 0201 0712: CG108 change to 0201

5

14/22

RG171
100K_1%_4

RG172
*100K_1%_4

BJ4
BK2

BK4
BK3

BF9

HDMI_HPD_PCH

CG38
*220p/25V_2

DVI/HDMI D P

DL-DVI

SDA

SDA

SCL

SCL

TXC

TXC

TXC

TXC

TXD0

TXD0

TXD0

TXD0

TXD1

TXD1

TXD1

TXD1

TXD2

TXD2

TXD2

TXD2

SDA
SCL

TXC
TXC

TXD3

TXD0

TXD3

TXD0

TXD4

TXD1

TXD4

TXD1

TXD5

TXD2

TXD5

TXD2

+1.8V_AON

RG162

RG145

*100K_1%_4

GSYN@100K_1%_4

RG161

RG146

100K_1%_4

*NGSYN@100K_1%_4

ROM_CS
ROM_SI

ROM_SO
ROM_SCLK

BUFRST

TPG68

TBT DP/Re-Driver

BH11

IFPA_AUX

BG11

IFPA_AUX

BF21

IFPA_L3

BG21

IFPA_L3

BG23

IFPA_L2

BH23

IFPA_L2

BF23

IFPA_L1

BE23

IFPA_L1

BF24

IFPA_L0

BG24

IFPA_L0

TBT DP/Re-Driver

GPU_IFPB_I2C_SDA

BG12

IFPB_AUX

GPU_IFPB_I2C_SCL

BH12

IFPB_AUX

BL18

IFPB_L3

BK18

IFPB_L3

BK20

IFPB_L2

BL20

IFPB_L2

BM20

IFPB_L1

BM21

IFPB_L1

BL21

IFPB_L0

BK21

IFPB_L0

BOM:

VRAM Table for G3 GDDR6

RAMCFG
[2:0]

0x1

TBD

0x0

TBD

ROM_SI

RG4733.2_1%_4
RG7133.2_1%_4

ROM_SCLK

RG6233.2_1%_4

RG35
*100K_1%_4

ROM_SI
ROM_SO
ROM_SCLK

RG31
100K_1%_4

JS-N18-0706

GPIO18_IFPE_HPD

HDMI_HPD_PCH [13,35] DP_HPD_PCH [13,33]

MMBT3904

QG6

JS-N18 from IFPF to IFPB

GPU_TBT_AUXN [37,38]

GPU_TBT_AUXP [37,38]

GPU_TBT_D3# [37]

GPU_TBT_D3 [37]

GPU_TBT_D2 [37]

GPU_TBT_D1 [37]

GPU_TBT_D0 [37]

GPU_TBT_AUXN
GPU_TBT_AUXP

GPU_TBT_D2# [37]

GPU_TBT_D1# [37]

GPU_TBT_D0# [37]

RG166

100K_1%_4

JS-N18 from IFPF to IFPB

+1.8V_AON +1.8V_AON

RG59

RG58

2.2K_5%_4

GPU_IFPB_I2C_SDA IFPB_I2C_SDA
GPU_IFPB_I2C_SCL IFPB_I2C_SCL

2.2K_5%_4

TYPE-C

Vendor P/NVendorDESC RIPTION

Micron

MT61K256 M32JE-14:A

Samsung

K4Z80325BC-HC14

JS-N18E change to 8Mb

BOM:

N18E-G3

+1.8V_AON

N18E-G2

RG76
10K_5%_4

+1.8V_AON

RG143
*100K_1%_4

RG147
100K_1%_4

UG2

5

SI/SIO0

2

SO/SIO1

1

CS

6

SCLK

MX25U8033EM1I-12G

VCC
WP

HOLD#

GND

+1.8V_AON

ROM_SI_R
ROM_SO
ROM_CS_R
ROM_SCLK_R

RG49
*10K_1%_4

RG50

10K_1%_4

RG24
10K_1%_4

DP HPD

GPIO18_IFPE_HPD_Q

2

1 3

GND

GND

RG23

100K_5%_4

RG22 100 K_5%_4

RG170

100K_1%_4

B

QG14B PJT138K

RG66 *0_5%_4

PCB CO-LAYOUT

Description

W25Q80EWSNIG
GD25LQ80CTIGR

MX25U8033EM1I-12G

8

WP#_3

3

HOLLD#_7ROM_CS

7
4

CG45
*220p/25V_2

GND

4

QG20A

GPU_IFPB_I2C_SCL

QG20B

GPU_IFPB_I2C_SDA

2

A

61

RG54

PCB CO-LAYOUT

JS-N18-0702

Drax GSync SKU
Non GSync SKU

TOP P/N QB P/N

AKG5JZ0TL04
AKG58G0T505

P/N

Size
8MbN18E-G3

AKE5GGN0N02

8Mb

AKE5GF00Q01
AKE5GFP0Z02

8Mb

+1.8V_AON

RG48 10K_5%_4
RG72 10K_5%_4

CG84

0.1u/16V_4

4

5

34

2

61

*SSM6N43FU

5

QG14A PJT138K

+1.8V_AON

34

*0_5%_4

HPD_IFPD

MMBT3904

RG42 10K _1%_4

+1.8V_AON

QG8

3ND_MBCLK [24,46,53,54,57]

3ND_MBDATA [24,46,53,54,57]

IFPB_I2C_SDA [41]

IFPB_I2C_SCL [41]

Default

ROM_CS_R
ROM_SO
ROM_SI_R
ROM_SCLK_R

For ICT test

JTAG_TRST#

JS-N18 0706

GPU_ADC_INP[74]
GPU_ADC_INN[74]

JS-N18-0702

JTAG_SEL

RG164
10K_1%_4

RG29
10K_1%_4

eDP HPD(For G-Sync)

ULT_EDP_HPD_Q

2

1 3

GND

GND GND

Near the GPU

+1V_GFX

0.4A

CG63

CG47

4.7u/6.3V_6

4.7u/6.3V_6

C, D share the filter

follow ZGQ

TPG10
TPG8
TPG7
TPG9

OVERT#

TS_VREF

TPG67

THERMDN

TPG1

THERMDP

TPG2

CG865 *47p/50V_4

CG869 *47p/50V_4

JTAG_TCK

TPG4

JTAG_TMS

TPG6

JTAG_TDI

TPG3

JTAG_TDO

TPG5

JTAG_TRST#

JTAG_SEL

TPG69

RG33 100 K_5%_4

RG34
100K_5%_4

+1V_GFX

1.8V

0.4A

0.47u/6.3V_2

Near the GPU

BG5

BF12

BJ11

BK24
BL23
BM23
BM24
BL24

BK23

EDP_HPD_GPU

CG67
*220p/25V_2

3

UG1P

9/22 IFPD

Under the GPU

BC18

IFP_IOVDD

BC20

CORE_PLLVDD

CG847

0.47u/6.3V_2

CG56

0.47u/6.3V_2

IFPC_RSET

IFP_IOVDD

N18E-G3-ES-A1

UG1O

8/22 IFPC

BD20

IFPCD_RSET

BD18

IFPCD_PLLVDD

CG46

4.7u/6.3V_6

JS-N18

CG787

0.47u/6.3V_2

RG144 1K_5%_4

Under the GPU

BB23

IFP_IOVDD

BC17

IFP_IOVDD

N18E-G3-ES-A1

CG815

0.47u/6.3V_2 RG56

Under the GPU

GFx SMBus Isolation(for EC)
I2C Address 0x9E

JS-N18-0702

RG155 *short_0402

PEGX_RST#[21,23,25]

GPUT_CLK[57]

GPUT_DATA[57]

12/22 MISC 1

OVERT

TS_VREF

THERMDN

THERMDP

ADC_IN
ADC_IN

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST

NVJTAG_SEL

20/22

HPD_TBT

EDP_HPD_GPU [31,32]

QG7

MMBT3904

CG793

BJ1
BJ2

BJ9

1.0V

UG1T

N18E-G3-ES-A1

IFPD

IFPC

I2CS_SCL
I2CS_SDA

I2CC_SCL
I2CC_SDA

I2CB_SCL
I2CB_SDA

GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30

+1.8V_AON

3

DVI/HDMI

SDA
SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

16/22

DVI/HDMI

SDA
SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

15/22

RG128

5

2K_1%_4

3 4

QG18APJT138K A

2

6 1

QG18BPJT138K A

RG40
2K_1%_4

GFX_SCL

BJ8

GFX_SDA

BH8

I2CC_SCL_GFX

BG9

I2CC_SDA_GFX

BH9

I2CB_SCL_G

BG8

I2CB_SDA_G

BF8

NVVDD_PWM_GPU

BD6

GPIO0

BB5

GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

GND

GC6FBEN

BD1

GPUEVENT#

BE4

GC6_1V8_MAIN_EN

BE1

FRM_LCK#

BG2
BD2

LCD_BL_PWM

BD7

MEM_VDD_CTRL

BH4

THER_ALERT#

BJ3

MEM_VREF_CTL

BD3

LCD_VDD

BH3

PWR_LEVEL

BE6
BB1

HPD_TBT

BG4

HPD_2PL

BG1
BE2

HPD_IFPD

BH1

GPIO18_IFPE_HPD

BE3
BD4

NB_FGC6

BE5

LCD_BLEN

BA5

GPIO22_SWAPRDY_IN

BB6

GPIO23_RASTER_SYNC1

BG3

GPU_GPIO24_IFPF_HPD

BD5

FBVDD_PSI

BB2

GPIO26_FP_FUSE

BE7

GPIO27_IFPC_HPD

BA4

GPIO28_OC_WARN#

BB4

GPIO29_IDLE_IN_SW

BA3
BB3

RG28
10K_1%_4

TBT HPD1

JS-N18

RG32

DP_HPD_TBT_Q

2

100K_5%_4

1 3

RG38

100K_5%_4

GND

DP

BF11

IFPD_AUX

BE11

IFPD_AUX

BM14

IFPD_L3

BM15

IFPD_L3

BL15

IFPD_L2

BK15

IFPD_L2

BK17

IFPD_L1

BL17

IFPD_L1

BM17

IFPD_L0

BM18

IFPD_L0

DP

BL9

IFPC_AUX

BK9

IFPC_AUX

BF17

IFPC_L3

BE17

IFPC_L3

BF18

IFPC_L2

BG18

IFPC_L2

BG20

IFPC_L1

BH20

IFPC_L1

BF20

IFPC_L0

BE20

IFPC_L0

+1.8V_AON

RG135
2K_1%_4

GFX_SCL

GFX_SDA

+1.8V_AON

RG39
2K_1%_4

RG138
2K_1%_4

JS-N18-0702

RG160 *100K_5%_4

JS-N18 from GPIO24 to 15

TP12

JS-N18 change netname

JS-N18
JS-N18 add

JS-N18 add, confirm with power team

THER_ALERT#

RG25 *short_0402

TBT_DP_HPD

CG66
*220p/25V_2

GND

0712: CG109 change to 0201

eDP

INT_EDP_AUXP [31]

INT_EDP_TXP3 [31]

INT_EDP_TXP2 [31]

INT_EDP_TXP1 [31]

INT_EDP_TXP0 [31]

HDMI/Re-Driver

GPU_DDCCLK [35]

GPU_CLK [35]

GPU_D0 [35]

GPU_D1 [35]

GPU_D2 [35]

GPU_DDCDATA
GPU_DDCCLK

RG57

*100K_1%_4

JS-N18-0702

PEGX_RST#[21,23,25]

I2CC_SCL_GFX

I2CC_SDA_GFX

+1.8V_AON

RG140
2K_1%_4

NVVDD_PWM_GPU [70]

GC6_1V8_MAIN_EN [25]

FRM_LCK# [32]

NVVDD_PSI [70]

RG151 10K_5%_4
RG136 100K_5%_4

RG14 10K _5%_4
RG7 *10K_1%_4

+1.8V_AON

QG5 DMG1012T-7

TBT_DP_HPD [13,37,38]

INT_EDP_AUXN [31]

INT_EDP_TXN3 [31]

INT_EDP_TXN2 [31]

INT_EDP_TXN1 [31]

INT_EDP_TXN0 [31]

GPU_DDCDATA [35]

GPU_CLK# [35]

GPU_D0# [35]

GPU_D1# [35]

GPU_D2# [35]

*100K_1%_4

QG10A PJT138KA

QG10B PJT138KA

RG178 10K_5%_4

JS-N18-0705

RG150 100K_1%_4
RG163 10K_5%_4

RG20 10K_5%_4

LCD_VDD
LCD_BLEN

NB_FGC6 [25]

GPU_GPIO24_IFPF_HPD [24]

FBVDD_PSI [73]
GPIO26_FP_FUSE [25]

GPIO28_OC_WARN# [74]

+1.8V_AON

321

RG43 *short_0402

5

2

JS-N18 DEL

1.0V

34

61

INT_EDP_AUXN
INT_EDP_AUXP

RG149

100K_1%_4

1.8V

0.4A

+1V_GFX

CG807

CG51

4.7u/6.3V_6

4.7u/6.3V_6

Near the GPU
E,F share the filter

follow ZGQ

GC6FBEN [25]

LCD_BL_PWM [32]

MEM_VDD_CTRL [73]

JS-N18 change to 10K

MEM_VREF_CTL [27,28,29,30]
LCD_VDD [32]
LCD_BLEN [32]

JS-N18-0705

RG156

100K_1%_4

IFPEF_RSET

RG148 1K_5%_4

CORE_PLLVDD

CG775 0.47u/6.3V_2

JS-N18

Under GPU

CG839

CG794

0.47u/6.3V_2

0.47u/6.3V_2

JS-N18

+1V_GFX

RG127
10K_5%_4

CG58

0.47u/6.3V_2

MBCLK1_GPU [70]

MBDATA1_GPU [70]

JS-N18-0705

DGPU_THER_ALERT# [57]

2

UG1Q

BD17

IFPE_RSET

BD15

IFPE_PLLVDD

BC21

IFP_IOVDD

BC23

IFP_IOVDD

N18E-G3-ES-A1

CG804

0.47u/6.3V_2

Close the GPU

AT10

AT9
AV10
AV11

AR10
AT11

CG59

0.47u/6.3V_2

AM10
AM11
AN10
AN11
AR11

AN9

RG120

10K_5%_4

AM3

JS-N18-0705

JS-N18-0705

JS-N18-0705

GC6FBEN

JS-0106 follow WBC

2

10/22 IFPE

IFPE

UG1S

11/22 NVHS

NVHS_DVDD
NVHS_DVDD
NVHS_DVDD
NVHS_DVDD

NVHS_CVDD
NVHS_CVDD

NVHS_HVDD
NVHS_HVDD
NVHS_HVDD
NVHS_HVDD
NVHS_HVDD

NVHS_PLL_HVDD

NVHS_TERMP

19/22

N18E-G3-ES-A1

GPUEVENT#
GC6_1V8_MAIN_EN
FRM_LCK#
NVVDD_PSI
THER_ALERT#
PWR_LEVEL
FBVDD_PSI

GPIO28_OC_WARN#

GPIO22_SWAPRDY_IN
GPU_GPIO24_IFPF_HPD

GPIO23_RASTER_SYNC1

DGPU_PWROK_Q[13]

Throttle

2

+3V

PWR_LEVEL

NVHS RX/TX

RG188
10K_5%_4

3

QG22

1

DMG1012T-7

DVI/HDMI

17/22

N18E-G3

DG2

SDA
SCL

TXC
TXC

TXD0
TXD0

TXD1
TXD1

TXD2
TXD2

NVHS_REFCLK
NVHS_REFCLK

EXT_REFCLK_SLI

N/A

RG19 10K _5%_4
RG21 10K _5%_4
RG27 10K _5%_4
RG18 10K _5%_4
RG30 10K _5%_4
RG13 10K _5%_4
RG17 10K _5%_4

RG8 10K_5%_4

RG11 2.2K _5%_4
RG130 10K_5%_4

RG26 100 K_1%_4

3

2

2N7002K

QG24

1

0723: QG8 change to 2N7002K

0723: QG10 change to 2N7002K

3

2

*2N7002K

QG25

1

DGPU_PWROK_Q

+1.8V_AON

PWR_LEVEL

2

1

RG16

*0_5%_2

DP

IFPE_AUX
IFPE_AUX

IFPE_L3
IFPE_L3

IFPE_L2
IFPE_L2

IFPE_L1
IFPE_L1

IFPE_L0
IFPE_L0

NVHS_RX0
NVHS_RX0

NVHS_RX1
NVHS_RX1

NVHS_RX2
NVHS_RX2

NVHS_RX3
NVHS_RX3

NVHS_RX4
NVHS_RX4

NVHS_RX5
NVHS_RX5

NVHS_RX6
NVHS_RX6

NVHS_RX7
NVHS_RX7

NVHS_TX0
NVHS_TX0

NVHS_TX1
NVHS_TX1

NVHS_TX2
NVHS_TX2

NVHS_TX3
NVHS_TX3

NVHS_TX4
NVHS_TX4

NVHS_TX5
NVHS_TX5

NVHS_TX6
NVHS_TX6

NVHS_TX7
NVHS_TX7

+1.8V_AON

JS-N18 0702 stuff

JS-N18 0702 stuff

JS-N18-0705 PD

GC6FBEN_Q [13]

+1.8V_AON

321

QG15 DMG1012T-7

DMG1012T-7
QG3

SDM20U30-7

DP

INT_DP_AUXN

BL8

INT_DP_AUXP

BK8

BG14
BH14

BF14
BE14

BF15
BG15

BG17
BH17

AM1
AN1

AN2
AN3

AR3
AR2

AR1
AT1

AT2
AT3

AV3
AV2

AV1
AW1

AW2
AW3

AM7
AM8

AN7
AN6

AR6
AR5

AR7
AR8

AT7
AT6

AV6
AV5

AV7
AV8

AW7
AW6

JS-N18-0709 50ohm

AM6

RG123 *51_1%_4

AM5

RG121 *51_1%_4

AM2

GC6FBEN_Q_EC [57]

321

RG15
*0_5%_4

RG69
10K_1%_4

100K_1%_4

RG52

100K_1%_4

5

RG53

1

+3V+1.8V_MAIN +3V

RG60
10K_1%_4

2

34

QG11A
PJX138K

QG12A

5

2N7002KDW

34

DP_D3# [33]
DP_D3 [33]

DP_D2# [33]
DP_D2 [33]

DP_D1# [33]
DP_D1 [33]

DP_D0# [33]
DP_D0 [33]

CQ-1019 [DB] NV suggest

INT_DP_AUXN

INT_DP_AUXP

For DP port , prevent backdrive leakage current into GPU

GPUEVENT#_PCH

2

GPUEVENT#

+1.8V_AON

DGPU_PWROK [21,25]

GPIO12 AC detect
AC high
DC low

DGPU_OPP#_PROCHOT# [57]

Nvidia :
suggest to
connect this
pin to EC only

GPU_THROTTING# [61]

RG45 10K_5%_4

OVERT#

1

DG1RB500V-40

Event

JS-N18-0702 stuff

3

QG9 DMG1012T-7

2

1

RG51 *0_5%_4

Overt shutdown

+1V_GFX [21,24,75]
+1.8V_AON [21,24,25,27,28,29,30,70,73,75]
+3V [2,9,10,11,13,17,18,19,20,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73,75]
CORE_PLLVDD [25]

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

2

QG12B
2N7002KDW

23

61

+1.8V_AON

DGPU_OVT# [25]

ZGE

ZGE

ZGE

23 78Friday, May 03, 2019

23 78Friday, May 03, 2019

23 78Friday, May 03, 2019

RG61
10K_1%_4

61

QG11B
PJX138K

CG81

0.01u/50V_4

INT_DP_AUXN_Q [33] INT_DP_AUXP_Q [33]

GPUEVENT#_PCH [13]

PEGX_RST# [21,23,25]

RG46 10K_5%_4

DGPU_OVT#

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

N18E-GX-3/9(Display)

N18E-GX-3/9(Display)

N18E-GX-3/9(Display)

1A

1A

1A

5

Place under GPUBetween GPU and PS

D D

C C

B B

+1V_GFX

+1.8V_AON

+3V_S5

+3.3V_AON

CG49
22u/6.3V_6

CG756
22u/6.3V_6

RG139 *0_5%_4

RG195 *short_0402

CG54
10u/6.3V_6

CG738
10u/6.3V_6

CG737

4.7u/6.3V_6

CG773

4.7u/6.3V_6

CG65

4.7u/6.3V_6

CG112

0.47u/6.3V_2

CG840

4.7u/6.3V_6

CG795

0.47u/6.3V_2

CG55

0.47u/6.3V_2

CG111

0.47u/6.3V_2

PS_USB_VDDP_IN

CG810

0.47u/6.3V_2

CG798

0.47u/6.3V_2

CG104

0.47u/6.3V_2

CG777

0.47u/6.3V_2

RG1572.49K_1%_4
RG1652.49K_1%_4
RG1371K_1%_4

4

USB_TERMP0
USB_TERMP1
USB_RBIAS

CG796

0.47u/6.3V_2

0.47u/6.3V_2

CG100

0.47u/6.3V_2

CG811

0.47u/6.3V_2

BB15
BC15

AW10
AW11

AW9

BE12

BG6

BH6
BA6

UG1R

6/22 IFPF/USB-C

USB_DVDD
USB_DVDD

USB_HVDD
USB_HVDD

USB_PLL_HVDD

USB_VDDP

USB_TERMP0

USB_TERMP1

USB_RBIAS

N18E-G3-ES-A1

18/22

3

USB-C

SBU2
SBU1

RX1
RX1

TX1
TX1

TX2
TX2

RX2
RX2

IFPF/USB-C

DP

IFPF_AUX
IFPF_AUX

IFPF_L3
IFPF_L3

IFPF_L2
IFPF_L2

IFPF_L1
IFPF_L1

IFPF_L0
IFPF_L0

USB_L0
USB_L0

USB_L1
USB_L1

USB_SCL
USB_SDA

GPU_GPIO24_IFPF_HPD[23]

The cap is used to reduce the slew rate of AUX CH

CG68 18P/50V_4

IFPF_AUX-

BM9

IFPF_AUX+

BM8

IFPF_L3-

BK11

IFPF_L3+

BL11

IFPF_L2-

BM11

IFPF_L2+

BM12

IFPF_L1-

BL12

IFPF_L1+

BK12

IFPF_L0-

BK14

IFPF_L0+

BL14

GPU_USB_L0-

BA1

GPU_USB_L0+

BA2

GPU_USB_L1-

BA7

GPU_USB_L1+

BA8

I2C 7-BIT ADDR:0x48

GPU_USB_I2C_SCL

BB8

GPU_USB_I2C_SDA

BB7

RG131

2.2K_5%_4

+1.8V_AON

3

RG133
10K_1%_4

NV USE PJC138K

1

Q64
PJA138K

CG79 0.1u/16V_4
CG78 0.1u/16V_4

CG69 0.1u/16V_4
CG70 0.1u/16V_4

CG71 0.1u/16V_4CG57
CG72 0.1u/16V_4

CG73 0.1u/16V_4
CG74 0.1u/16V_4

CG76 0.1u/16V_4
CG75 0.1u/16V_4

+1.8V_AON

RG132

2.2K_5%_4

GPIO24_IFPF_HPD

2

2

IFPF_AUX­IFPF_AUX+

RG169

100K_1%_4

DP_USB_MUX_AUXN
DP_USB_MUX_AUXP

DP_USB_MUX_ML3N
DP_USB_MUX_ML3P

DP_USB_MUX_ML2N
DP_USB_MUX_ML2P

DP_USB_MUX_ML1N
DP_USB_MUX_ML1P

DP_USB_MUX_ML0N
DP_USB_MUX_ML0P

GPU_USB_L0- [42]
GPU_USB_L0+ [42]

GPU_USB_L1- [42]
GPU_USB_L1+ [42]

2

61

Q63B PJT138K

B A

*0_5%_4

RG134

PCB CO-LAYOUT PCB CO-LAYOUT

Vitural-Link USB-C

GPIO24_IFPF_HPD [11,41,57]

RG168

100K_1%_4

+1.8V_AON

5

34

Q63A PJT138K

*0_5%_4

RG129

1

DP_USB_MUX_AUXN [44]
DP_USB_MUX_AUXP [44]

DP_USB_MUX_ML3N [44]
DP_USB_MUX_ML3P [44]

DP_USB_MUX_ML2N [44]
DP_USB_MUX_ML2P [44]

DP_USB_MUX_ML1N [44]
DP_USB_MUX_ML1P [44]

DP_USB_MUX_ML0N [44]
DP_USB_MUX_ML0P [44]

USB_I2C_SCL
USB_I2C_SDA

24

USB_I2C_SCL [41,76]

USB_I2C_SDA [41,76]

+1.8V_AON

5

A A

5

4

GPU_USB_I2C_SCL

GPU_USB_I2C_SDA

3

Q65A

*SSM6N43FU

Q65B

2

*SSM6N43FU

34

61

3ND_MBCLK [23,46,53,54,57]

3ND_MBDATA [23,46,53,54,57]

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PROJECT :

N18E-GX-3/9 (Display-TC)

N18E-GX-3/9 (Display-TC)

N18E-GX-3/9 (Display-TC)

ZGE

ZGE

ZGE

24 78Friday, May 03, 2019

24 78Friday, May 03, 2019

24 78Friday, May 03, 2019

1

1A

1A

1A