Acer Helios 700, Helios 717 boardview

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Levante_CFS CFL-H/K +1170/1180 MAX-P SYSTEM DIAGRAM
SODIMM0
Max. 16GB
RVS H9.2
A A
Port14
LAN
Killer E3000 10x10x0.9mm
PCIe Redriver SN75LVPE802RTJR 4x4x0.8mm
Daughter board
SODIMM1
Max. 16GB
RVS H5.2
SODIMM0
Max. 16GB
RVS H4.0 or 5.2
SODIMM1
Max. 16GB
STD H4.0 or 5.2
2400MT/s
DDR4 Channel A
2400MT/s
DDR4 Channel B
INTEL
Coffee Lake H
Processor : 6+2
Power : 45 (Watt)
Package : BGA1440
Size : 42 x 28 x 1.5 (mm)
PEG X16 Lanes
NVIDIA N18E-G2/G3
Package 37.5 x 37.5mm
TGP: 115W/150W
eDP re-driver IC TUSB546-DCI
27MHz
HDMI2.0 redriver PS8409A
DP re-driver TUSB546-DCI
VRAM GDDR6 * 8 pcs
HDMI2.0
Display port
17.3 eDP Panel FHD/UHD
01
PCI-E x 1
Port15
USB 2.0
B B
WLAN +BT
Cable
SATA Re-driver PS8527B
TPM
P34
NGFF SSD #1
SATA/PCIE SSD
NGFF SSD #2
PCIE SSD
HDD
CNVI
SATA 6GB/s
PCIE x 4
SATA 6GB/s
PCIE x 4
CNL PCH HM370
Package : FCBGA837
Size : 23 x 23 (mm)
SPI
USB2.0
DP re-driver
TUSB546-DCI*1
PCIE 4 Lanes
USB 2.0/3.0
CIO_TX_RX (DP/USB3.1)
DSL6540-SLL44
TBT(Apline Ridge)
NV Type-C (Please refer to the next page)
I2C AUX /LS/SPI
Webcam (DMIC)
PORT6
USB type C PD
TI TPS65987*1 7x7x1mm
Metal Keyboard
U2 re-driver TUSB212
CC1/CC2
SBU1/SBU2
PORT7
USB TypeC X1
ROM
U3 10G re-timer
C C
Power / Battery LED
Macro Key LED
TP
KBC
ITE IT8987E/BX
MCU PWM/LED Driver
ENE 6K5130
LPC
CPU FAN
GPU FAN
Azalia
PS8817
4.2x8x0.8mm
U3 10G re-timer PS8817
4.2x8x0.8mm U2 re-driver
TUSB212 x2
U3 10G re-timer PS8811
4.2x4.2x0.8mm
PORT1,2,3
USB3.0 Ports
X1
BC1.2
SLGC55544CVTR
USB3.0 Ports
X2
RGB LED for C cover
AUDIO CODEC
ALC1220
MIC
4
7x7x0.9mm
HP
Daughter board
5
G3@ : NV G3 GPU
D D
ADP@ : For 330W GSY@ : For G-SYNC panel NGSY@ : For Non- GSYNC panel SAM@ : SAMSUNG VRAM MIC@ : MICRON VRAM TPM@ : TPM i9@ : i9 CPU
1
2
3
SLGC55544CVTR
AMP ALC1001
3x3x0.9mm AMP
ALC1001 3x3x0.9mm
AMP ALC1001
3x3x0.9mm
BC1.2
Speaker Center SubWoofer
Speaker R1/L1
Speaker R2/L2
6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
7
PROJECT :
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
ZGE
ZGE
ZGE
8
1 78Friday, May 03, 20 19
1 78Friday, May 03, 20 19
1 78Friday, May 03, 20 19
1A
1A
1A
Page 2
5
For debug only remove from MV
+3V
R83 *4.7K_1%_4
D D
34
Q8A
5
CATERR#
C C
PECI
CPU CORE SVID
Layout note:
1.Need routing together
2.ALERT need between CLK and DATA.
PLACE THE PU RESISTORS CLOSE TO VR PULL UP IS IN THE VR MODULE
B B
CLOSE TO CPU PLACE THE PU RESISTORS
H_CPU_SVIDALRT#
CLOSE TO CPU PLACE THE PU RESISTORS
A A
*PJX138K
HWPG[57]
+VCCIO
R52 13_1%_4
R47 *short_0402
VR_SVID_CLK_R
R35 220_1%_4
H_CPU_SVIDDAT
+3V
21
61
2
R104 *short_0402
R103 *0_5%_4
R38 *short_0402
5
R85 *360_1%_6
LED1 *White_19-113/T1D-CP2Q2HY/3T
Q8B *PJX138K
R101
4.7K_1%_4
34
Q16A
5
PJX138K
PCH_PECI [11]
EC_PECI [57]
+VCCST
modify 8/9
R39 *54.9_1%_4
+VCCST
R36
56.2_1%_4
C48 *0.1u/16V_4
+VCCST
R42 100_1%_4
R41 *short_0402
PROCPWRGD
C56 220p/50V_4
+VCCST+3V_DEEP_SUS
modify 8/9
R108 1K_1%_4
H_VCCST_PW RGD
61
Q16B
2
PJX138K
PROCPWRGD (50ohm) Trace Length: 1~11.25 inches
PM_SYNC (50ohm) Trace Length: 1~11.25 inches
CPU_PLTRST# (50ohm) Trace Length: 10~17 inches
Close to CPU
SVID CLK
VR_SVID_CLK [65]
Close to CPU
SVID ALERT
VR_SVID_ALERT# [65]
Close to CPU
SVID DATA
VR_SVID_DATA [65]
4
CLK_CPU_BCLKP[11] CLK_CPU_BCLKN[11]
CPU_PCI_BCLKP[11] CPU_PCI_BCLKN[11]
CLK_DPLL_NSCCLKP[11]
Host CLK: Trace length < 11000 mils Trace spacing = 15 / 20 mils, Impendence 85 ohm
CLK_DPLL_NSCCLKN[11]
EMI RESERVE
VCCST_PWRGD
EC2 10p/50V_4
R107 60.4/F_4
CPU_PLTRST#R[11]
PM_SYNC[11]
C92
0.1u/16V_4
H_PM_DOWN[11]
SKTOCC_N_R[13]
THERMTRIP# (50ohm) Trace Length: 1.1~12 inches
IMVP_PWRGD[10,65]
SYS_SHDN#[57,62,68]
PM_THRMTRIP#[11,17,18,19,20,53]
PROCPWRGD[10]
R57 20_1%_4
SKTOCC_N_R
R53 *short_0402
TP6
+VCCST
R62 *100K_1%_4
modify 8/9
Ra Not install in SKL-H
+VCCST
Ra
R98 *10K_1%_4
PROC_SEL#
R97 *0_5%_4
4
3
CFL-H Processor (CLK,MISC,JTAG)
CLK_CPU_BCLKP CLK_CPU_BCLKN
CPU_PCI_BCLKP CPU_PCI_BCLKN
CLK_DPLL_NSCCLKP CLK_DPLL_NSCCLKN
H_CPU_SVIDALRT# VR_SVID_CLK_R H_CPU_SVIDDAT H_PROCHOT#_CPU
DDR_PG_CNT L
VCCST_PWRGD PROCPWRGD
CPU_PLTRST#R H_PM_DOWN_R
PECI THERMTRIP#
SKTOCC_N PROC_SEL#
CATERR#
R78 49.9_1%_6
+VCCST
3
Q6
2
DMG301NU-7
1
R46
R55
1K_1%_4
1K_1%_4
2
13
THERMTRIP#
Q5 METR3904-G
R51 *short_0402
U3E
B31
BCLKP
A32
BCLKN
D35
PCI_BCLKP
C36
PCI_BCLKN
E31
CLK24P
D31
CLK24N
BH31
VIDALERT#
BH32
VIDSCK
BH29
VIDSOUT
BR30
PROCHOT#
BT13
DDR_VTT_CNTL
H13
VCCST_PWRGD
BT31
PROCPWRGD
BP35
RESET#
BM34
PM_SYNC
BP31
PM_DOWN
BT34
PECI
J31
THERMTRIP#
BR33
SKTOCC#
BN1
PROC_SELECT#
BM30
CATERR#
AT13
ZVM#
AW13
MSM#
AU13
RSVD#AU13
AY13
RSVD#AY13
5 OF 13
CPU_CFL-H_1440P
Note: please keep plane is enough for VDDQ 2.8A
Placement close to CPU.
+1.2VSUS
C655 0.1u/16V_4 C657 *0.1u/16V_4
DDR_PG_CNT L
PROCHOT# (50ohm) Trace Length <11 inches
Cb need placment near VR
modify 8/9
CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8
CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15
CFG_17 CFG_16 CFG_19 CFG_18
BPM#_0 BPM#_1 BPM#_2 BPM#_3
PROC_TDO
PROC_TDI PROC_TMS PROC_TCK
PROC_TRST#
PROC_PREQ#
PROC_PRDY#
CFG_RCOMP
R90 10K_1%_4
+VCCSTG
H_PROCHOT#[57,61,65]
EMI RESERVE
EC1 *10p/50V_4
3
BN25 BN27 BN26
CFG2
BN28 BR20
CFG4
BM20
CFG5
BT20
CFG6
BP20 BR23 BR22 BT23 BT22 BM19 BR19 BP19 BT19
BN23 BP23 BP22 BN22
XDP_BPM0
BR27
XDP_BPM1
BT27
XDP_BPM2
BM31
XDP_BPM3
BT30
H_TDO
BT28
H_TDI
BL32
H_TMS
BP28
H_TCK
BR28
H_TRST#
BP30
H_PREQ#
BL30
H_PRDY#
BP27
CFG_RCOMP
BT25
Design Note(CFG_RCOMP): DEFENSIVE DESIGN 50-OHM FOR R40PR (SV REQ)
+3V_DEEP_SUS
R96 10K_1%_4
2
Q10 METR3904-G
1 3
R88 100K_1%_4
R67 1K_1%_4
TP7 TP8 TP4 TP5
H_TDO [10] H_TDI [10] H_TMS [10] H_TCK [10]
H_TRST# [15] H_PREQ# [15] H_PRDY# [15]
R7749.9_1%_4
+3V_DEEP_SUS
3
2
1
R68 499_1%_4
R95 10K_1%_4
Q12 2N7002KTB
Modify 8/10
H_PROCHOT#_CPU
C60
0.1u/16V_4
2
R92 100K_1%_4
H_PROCHOT#_CPU
2
The CFG signals have a default value of '1' if not terminated on the board.
DDR_VTTT_PG_CTRL [64]
1
Processor pull-up (CPU)
H_TDO H_TMS H_TDI H_PREQ#
H_TCK H_TRST#
R72 51_5%_4 R71 *51_5%_4 R73 *51_5%_4 R76 *56.2_1%_4
R69 51_5%_4 R65 *51_5%_4
Processor Strapping
R75 1K_1%_4
CFG2 CFG4
R79 *1K_1%_4
CFG5
R84 *1K_1%_4
CFG6
R81 *1K_1%_4
Contiguration Signals: The CFG signals have a default value of '1' if not terminated on the board. Refer to the appropriate platform design guide for pull-down recommendations when a logic low is desired. Intel recommends placing test points on the board for CFG pins. . CFG[0]:Stall reset sequence after PCU PLL lock until de-asserted:
-1=(Default) Normal Operation; No stall.
-0=Stall. .CFG[1]:Reserved configuration lane. .CFG[2]:PCI Express*Static x16 Lane Numbering Reversal.
-1=Normal operation
-0=Lane numbers reversed. .CFG[3]:Reserved configuration lane. .CFG[4]:eDP enable:
-1=Disabled.
-0=Enabled. .CFG[6:5]:PCI Express* Bifurcation
-00=1x8,2x4 PCI Express*
-01=reserved
-10=2x8 PCI Express*
-11=1x16 PCI Express* .CFG[7]:PEG Training:
-1=(default) PEG Train immediately following RESET# de assertion.
-0=PEG Wait for BIOS for assertion. .CFG[19:8]:Reserved configuration lanes.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
CFL 1/7 (JTAG/MISC)
CFL 1/7 (JTAG/MISC)
CFL 1/7 (JTAG/MISC)
1
+VCCST
modify 8/9
ZGE
ZGE
ZGE
2 78Friday, May 03, 2019
2 78Friday, May 03, 2019
2 78Friday, May 03, 2019
02
1A
1A
1A
Page 3
5
4
3
2
1
CFL Processor (DMI,PEG,FDI)
03
U3C
PEG_RXP15[21]
D D
C C
B B
+VCCIO
DMI RX
PEG_RXN15[21] PEG_RXP14[21]
PEG_RXN14[21] PEG_RXP13[21]
PEG_RXN13[21] PEG_RXP12[21]
PEG_RXN12[21] PEG_RXP11[21]
PEG_RXN11[21] PEG_RXP10[21]
PEG_RXN10[21] PEG_RXP9[21]
PEG_RXN9[21] PEG_RXP8[21]
PEG_RXN8[21] PEG_RXP7[21]
PEG_RXN7[21] PEG_RXP6[21]
PEG_RXN6[21] PEG_RXP5[21]
PEG_RXN5[21] PEG_RXP4[21]
PEG_RXN4[21] PEG_RXP3[21]
PEG_RXN3[21] PEG_RXP2[21]
PEG_RXN2[21] PEG_RXP1[21]
PEG_RXN1[21] PEG_RXP0[21]
PEG_RXN0[21]
R102 24.9/F_4
DMI_RXP0[9] DMI_RXN0[9]
DMI_RXP1[9] DMI_RXN1[9]
DMI_RXP2[9] DMI_RXN2[9]
DMI_RXP3[9] DMI_RXN3[9]
PEG_COMP
E25
PEG_RXP_0
D25
PEG_RXN_0
E24
PEG_RXP_1
F24
PEG_RXN_1
E23
PEG_RXP_2
D23
PEG_RXN_2
E22
PEG_RXP_3
F22
PEG_RXN_3
E21
PEG_RXP_4
D21
PEG_RXN_4
E20
PEG_RXP_5
F20
PEG_RXN_5
E19
PEG_RXP_6
D19
PEG_RXN_6
E18
PEG_RXP_7
F18
PEG_RXN_7
D17
PEG_RXP_8
E17
PEG_RXN_8
F16
PEG_RXP_9
E16
PEG_RXN_9
D15
PEG_RXP_10
E15
PEG_RXN_10
F14
PEG_RXP_11
E14
PEG_RXN_11
D13
PEG_RXP_12
E13
PEG_RXN_12
F12
PEG_RXP_13
E12
PEG_RXN_13
D11
PEG_RXP_14
E11
PEG_RXN_14
F10
PEG_RXP_15
E10
PEG_RXN_15
G2
PEG_RCOMP
D8
DMI_RXP_0
E8
DMI_RXN_0
E6
DMI_RXP_1
F6
DMI_RXN_1
D5
DMI_RXP_2
E5
DMI_RXN_2
J8
DMI_RXP_3
J9
DMI_RXN_3
CPU_CFL-H_1440P
PEG_TXP_10 PEG_TXN_10
PEG_TXP_11 PEG_TXN_11
PEG_TXP_12 PEG_TXN_12
PEG_TXP_13 PEG_TXN_13
PEG_TXP_14 PEG_TXN_14
PEG_TXP_15 PEG_TXN_15
3 OF 13
PEG_TXP_0 PEG_TXN_0
PEG_TXP_1 PEG_TXN_1
PEG_TXP_2 PEG_TXN_2
PEG_TXP_3 PEG_TXN_3
PEG_TXP_4 PEG_TXN_4
PEG_TXP_5 PEG_TXN_5
PEG_TXP_6 PEG_TXN_6
PEG_TXP_7 PEG_TXN_7
PEG_TXP_8 PEG_TXN_8
PEG_TXP_9 PEG_TXN_9
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP_2
DMI_TXN_2
DMI_TXP_3
DMI_TXN_3
B25 A25
B24 C24
B23 A23
B22 C22
B21 A21
B20 C20
B19 A19
B18 C18
A17 B17
C16 B16
A15 B15
C14 B14
A13 B13
C12 B12
A11 B11
C10 B10
B8 A8
C6 B6
B5 A5
D4 B4
C_PEG_TXP15 C_PEG_TXN15
C_PEG_TXP14 C_PEG_TXN14
C_PEG_TXP13 C_PEG_TXN13
C_PEG_TXP12 C_PEG_TXN12
C_PEG_TXP11 C_PEG_TXN11
C_PEG_TXP10 C_PEG_TXN10
C_PEG_TXP9 C_PEG_TXN9
C_PEG_TXP8 C_PEG_TXN8
C_PEG_TXP7 C_PEG_TXN7
C_PEG_TXP6 C_PEG_TXN6
C_PEG_TXP5 C_PEG_TXN5
C_PEG_TXP4 C_PEG_TXN4
C_PEG_TXP3 C_PEG_TXN3
C_PEG_TXP2 C_PEG_TXN2
C_PEG_TXP1 C_PEG_TXN1
C_PEG_TXP0 C_PEG_TXN0
C58 0.22u/6.3V_2 C57 0.22u/6.3V_2
C59 0.22u/6.3V_2 C61 0.22u/6.3V_2
C64 0.22u/6.3V_2 C63 0.22u/6.3V_2
C65 0.22u/6.3V_2 C67 0.22u/6.3V_2
C69 0.22u/6.3V_2 C68 0.22u/6.3V_2
C70 0.22u/6.3V_2 C71 0.22u/6.3V_2
C73 0.22u/6.3V_2 C72 0.22u/6.3V_2
C74 0.22u/6.3V_2 C75 0.22u/6.3V_2
C76 0.22u/6.3V_2 C77 0.22u/6.3V_2
C79 0.22u/6.3V_2 C78 0.22u/6.3V_2
C80 0.22u/6.3V_2 C81 0.22u/6.3V_2
C83 0.22u/6.3V_2 C82 0.22u/6.3V_2
C84 0.22u/6.3V_2 C85 0.22u/6.3V_2
C87 0.22u/6.3V_2 C86 0.22u/6.3V_2
C88 0.22u/6.3V_2 C89 0.22u/6.3V_2
C91 0.22u/6.3V_2 C90 0.22u/6.3V_2
DMI_TXP0 [9] DMI_TXN0 [9]
DMI_TXP1 [9] DMI_TXN1 [9]
DMI_TXP2 [9] DMI_TXN2 [9]
DMI_TXP3 [9] DMI_TXN3 [9]
PEG_TXP15 [21] PEG_TXN15 [21]
PEG_TXP14 [21] PEG_TXN14 [21]
PEG_TXP13 [21] PEG_TXN13 [21]
PEG_TXP12 [21] PEG_TXN12 [21]
PEG_TXP11 [21] PEG_TXN11 [21]
PEG_TXP10 [21] PEG_TXN10 [21]
PEG_TXP9 [21] PEG_TXN9 [21]
PEG_TXP8 [21] PEG_TXN8 [21]
PEG_TXP7 [21] PEG_TXN7 [21]
PEG_TXP6 [21] PEG_TXN6 [21]
PEG_TXP5 [21] PEG_TXN5 [21]
PEG_TXP4 [21] PEG_TXN4 [21]
PEG_TXP3 [21] PEG_TXN3 [21]
PEG_TXP2 [21] PEG_TXN2 [21]
PEG_TXP1 [21] PEG_TXN1 [21]
PEG_TXP0 [21] PEG_TXN0 [21]
DMI TX
U3D
K36
DDI1_TXP_0
K37
DDI1_TXN_0
J35
DDI1_TXP_1
J34
DDI1_TXN_1
H37
DDI1_TXP_2
H36
DDI1_TXN_2
J37
DDI1_TXP_3
J38
DDI1_TXN_3
D27
DDI1_AUXP
E27
DDI1_AUXN
H34
DDI2_TXP_0
H33
DDI2_TXN_0
F37
DDI2_TXP_1
G38
DDI2_TXN_1
F34
DDI2_TXP_2
F35
DDI2_TXN_2
E37
DDI2_TXP_3
E36
DDI2_TXN_3
F26
DDI2_AUXP
E26
DDI2_AUXN
C34
DDI3_TXP_0
D34
DDI3_TXN_0
B36
DDI3_TXP_1
B34
DDI3_TXN_1
F33
DDI3_TXP_2
E33
DDI3_TXN_2
C33
DDI3_TXP_3
B33
DDI3_TXN_3
A27
DDI3_AUXP
B27
DDI3_AUXN
CPU_CFL-H_1440P
DP & PEG Compensation
y
eDP_RCOMP Trace length < 100 Mils Trace Width 5 Mils Trace Spacing 25 Mils
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
EDP_TXP_0 EDP_TXN_0 EDP_TXP_1 EDP_TXN_1 EDP_TXP_2 EDP_TXN_2 EDP_TXP_3 EDP_TXN_3
EDP_AUXP EDP_AUXN
EDP_DISP_UTIL
DISP_RCOMP
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
4 of 13
D29 E29 F28 E28 A29 B29 C28 B28
C26 B26
EDP_DISP_UTIL
A33
EDP_RCOMP
D37
AUD_AZACPU_SCLK
G27
AUD_AZACPU_SDO_R
G25
AUD_AZACPU_SDI_R
G29
TP3
R687 24.9_1%_4
R61 20_1%_4
+VCCIO
AUD_AZACPU_SCLK [10] AUD_AZACPU_SDO_R [10]
AUD_AZACPU_SDI [10]
PEG_RCOMP
Trace length < 400 MILS
A A
Trace width = 12 MILS Trace spacing = 15 MILS
5
4
+1.2VSUS [2,6,10,14,17,18,19,20,46,59,60,64,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73,75]
3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
CFL 2/7 (DMI/EDP/PEG)
CFL 2/7 (DMI/EDP/PEG)
CFL 2/7 (DMI/EDP/PEG)
ZGE
ZGE
ZGE
1A
1A
1A
3 78Friday, May 03, 2019
3 78Friday, May 03, 2019
3 78Friday, May 03, 2019
1
Page 4
5
4
3
2
1
M_A_DQ[15:0][17,19]
CFL Processor (DDR4)
M_A_DQ[31:16][17,19]
M_A_DQ[47:32][17,19]
M_A_DQ[63:48][17,19]
D D
C C
B B
M_A_CB0[17,19] M_A_CB1[17,19] M_A_CB2[17,19] M_A_CB3[17,19] M_A_CB4[17,19] M_A_CB5[17,19] M_A_CB6[17,19] M_A_CB7[17,19]
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8
M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14
M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_CB0
M_A_CB1
M_A_CB2
M_A_CB3
M_A_CB4
M_A_CB5
M_A_CB6
M_A_CB7
Interleave / Non-Interleave
U3A
BR6
DDR0_DQ_0/DDR0_DQ_0
BT6
DDR0_DQ_1/DDR0_DQ_1
BP3
DDR0_DQ_2/DDR0_DQ_2
BR3
DDR0_DQ_3/DDR0_DQ_3
BN5
DDR0_DQ_4/DDR0_DQ_4
BP6
DDR0_DQ_5/DDR0_DQ_5
BP2
DDR0_DQ_6/DDR0_DQ_6
BN3
DDR0_DQ_7/DDR0_DQ_7
BL4
DDR0_DQ_8/DDR0_DQ_8
BL5
DDR0_DQ_9/DDR0_DQ_9
BL2
DDR0_DQ_10/DDR0_DQ_10
BM1
DDR0_DQ_11/DDR0_DQ_11
BK4
DDR0_DQ_12/DDR0_DQ_12
BK5
DDR0_DQ_13/DDR0_DQ_13
BK1
DDR0_DQ_14/DDR0_DQ_14
BK2
DDR0_DQ_15/DDR0_DQ_15
BG4
DDR0_DQ_16/DDR0_DQ_32
BG5
DDR0_DQ_17/DDR0_DQ_33
BF4
DDR0_DQ_18/DDR0_DQ_34
BF5
DDR0_DQ_19/DDR0_DQ_35
BG2
DDR0_DQ_20/DDR0_DQ_36
BG1
DDR0_DQ_21/DDR0_DQ_37
BF1
DDR0_DQ_22/DDR0_DQ_38
BF2
DDR0_DQ_23/DDR0_DQ_39
BD2
DDR0_DQ_24/DDR0_DQ_40
BD1
DDR0_DQ_25/DDR0_DQ_41
BC4
DDR0_DQ_26/DDR0_DQ_42
BC5
DDR0_DQ_27/DDR0_DQ_43
BD5
DDR0_DQ_28/DDR0_DQ_44
BD4
DDR0_DQ_29/DDR0_DQ_45
BC1
DDR0_DQ_30/DDR0_DQ_46
BC2
DDR0_DQ_31/DDR0_DQ_47
AB1
DDR0_DQ_32/DDR1_DQ_0
AB2
DDR0_DQ_33/DDR1_DQ_1
AA4
DDR0_DQ_34/DDR1_DQ_2
AA5
DDR0_DQ_35/DDR1_DQ_3
AB5
DDR0_DQ_36/DDR1_DQ_4
AB4
DDR0_DQ_37/DDR1_DQ_5
AA2
DDR0_DQ_38/DDR1_DQ_6
AA1
DDR0_DQ_39/DDR1_DQ_7
V5
DDR0_DQ_40/DDR1_DQ_8
V2
DDR0_DQ_41/DDR1_DQ_9
U1
DDR0_DQ_42/DDR1_DQ_10
U2
DDR0_DQ_43/DDR1_DQ_11
V1
DDR0_DQ_44/DDR1_DQ_12
V4
DDR0_DQ_45/DDR1_DQ_13
U5
DDR0_DQ_46/DDR1_DQ_14
U4
DDR0_DQ_47/DDR1_DQ_15
R2
DDR0_DQ_48/DDR1_DQ_32
P5
DDR0_DQ_49/DDR1_DQ_33
R4
DDR0_DQ_50/DDR1_DQ_34
P4
DDR0_DQ_51/DDR1_DQ_35
R5
DDR0_DQ_52/DDR1_DQ_36
P2
DDR0_DQ_53/DDR1_DQ_37
R1
DDR0_DQ_54/DDR1_DQ_38
P1
DDR0_DQ_55/DDR1_DQ_39
M4
DDR0_DQ_56/DDR1_DQ_40
M1
DDR0_DQ_57/DDR1_DQ_41
L4
DDR0_DQ_58/DDR1_DQ_42
L2
DDR0_DQ_59/DDR1_DQ_43
M5
DDR0_DQ_60/DDR1_DQ_44
M2
DDR0_DQ_61/DDR1_DQ_45
L5
DDR0_DQ_62/DDR1_DQ_46
L1
DDR0_DQ_63/DDR1_DQ_47
BA2
NC/DDR0_ECC_0
BA1
NC/DDR0_ECC_1
AY4
NC/DDR0_ECC_2
AY5
NC/DDR0_ECC_3
BA5
NC/DDR0_ECC_4
BA4
NC/DDR0_ECC_5
AY1
NC/DDR0_ECC_6
AY2
NC/DDR0_ECC_7
CPU_CFL-H_1440P
1 OF 13
DDR CHANNEL A
DDR0_DQSN_0/DDR0_DQSN_0 DDR0_DQSN_1/DDR0_DQSN_1 DDR0_DQSN_2/DDR0_DQSN_4 DDR0_DQSN_3/DDR0_DQSN_5 DDR0_DQSN_4/DDR1_DQSN_0 DDR0_DQSN_5/DDR1_DQSN_1 DDR0_DQSN_6/DDR1_DQSN_4 DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_0/DDR0_DQSP_0 DDR0_DQSP_1/DDR0_DQSP_1 DDR0_DQSP_2/DDR0_DQSP_4 DDR0_DQSP_3/DDR0_DQSP_5 DDR0_DQSP_4/DDR1_DQSP_0 DDR0_DQSP_5/DDR1_DQSP_1 DDR0_DQSP_6/DDR1_DQSP_4 DDR0_DQSP_7/DDR1_DQSP_5
DDR0_DQSP_8/DDR0_DQSP_8 DDR0_DQSN_8/DDR0_DQSN_8
DDR0_CKP_0/DDR0_CKP_0 DDR0_CKN_0/DDR0_CKN_0 DDR0_CKP_1/DDR0_CKP_1 DDR0_CKN_1/DDR0_CKN_1
NC/DDR0_CKP_2 NC/DDR0_CKN_2 NC/DDR0_CKP_3 NC/DDR0_CKN_3
DDR0_CKE_0/DDR0_CKE_0 DDR0_CKE_1/DDR0_CKE_1 DDR0_CKE_2/DDR0_CKE_2 DDR0_CKE_3/DDR0_CKE_3
DDR0_CS#_0/DDR0_CS#_0 DDR0_CS#_1/DDR0_CS#_1
NC/DDR0_CS#_2 NC/DDR0_CS#_3
DDR0_ODT_0/DDR0_ODT_0
NC/DDR0_ODT_1 NC/DDR0_ODT_2 NC/DDR0_ODT_3
DDR0_CAB_4/DDR0_BA_0 DDR0_CAB_6/DDR0_BA_1 DDR0_CAA_5/DDR0_BG_0
DDR0_CAB_3/DDR0_MA_16 DDR0_CAB_2/DDR0_MA_14 DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_9/DDR0_MA_0 DDR0_CAB_8/DDR0_MA_1 DDR0_CAB_5/DDR0_MA_2
NC/DDR0_MA_3
NC/DDR0_MA_4 DDR0_CAA_0/DDR0_MA_5 DDR0_CAA_2/DDR0_MA_6 DDR0_CAA_4/DDR0_MA_7 DDR0_CAA_3/DDR0_MA_8 DDR0_CAA_1/DDR0_MA_9
DDR0_CAB_7/DDR0_MA_10 DDR0_CAA_7/DDR0_MA_11 DDR0_CAA_6/DDR0_MA_12 DDR0_CAB_0/DDR0_MA_13
DDR0_CAA_9/DDR0_BG_1 DDR0_CAA_8/DDR0_ACT#
NC/DDR0_PAR
NC/DDR0_ALERT#
AG1 AG2 AK2 AK1 AL3 AK3 AL2 AL1
AT1 AT2 AT3 AT5
AD5 AE2 AD2 AE5
AD3 AE4 AE1 AD4
AH5 AH1 AU1
M_A_A16 M_B_A1
AH4
M_A_A14
AG4
M_A_A15
AD1
M_A_A0
AH3
M_A_A1
AP4
M_A_A2
AN4
M_A_A3
AP5
M_A_A4
AP2
M_A_A5
AP1
M_A_A6
AP3
M_A_A7
AN1
M_A_A8
AN3
M_A_A9
AT4
M_A_A10
AH2
M_A_A11
AN2
M_A_A12
AU4
M_A_A13
AE3 AU2 AU3
AG3 AU5
M_A_DQSN0
BR5
M_A_DQSN1
BL3
M_A_DQSN2
BG3
M_A_DQSN3
BD3
M_A_DQSN4
AA3
M_A_DQSN5 M_B_DQSP0
U3
M_A_DQSN6
P3
M_A_DQSN7
L3
M_A_DQSP0
BP5
M_A_DQSP1
BK3
M_A_DQSP2
BF3
M_A_DQSP3
BC3
M_A_DQSP4
AB3
M_A_DQSP5
V3
M_A_DQSP6
R3
M_A_DQSP7
M3
M_A_DQSP8
AY3
M_A_DQSN8
BA3
M_A_DIM0_CLKP0 [17] M_A_DIM0_CLKN0 [17] M_A_DIM0_CLKP1 [17] M_A_DIM0_CLKN1 [17]
M_A_DIM1_CLKP0 [19] M_A_DIM1_CLKN0 [19] M_A_DIM1_CLKP1 [19] M_A_DIM1_CLKN1 [19]
M_A_CKE0 [17] M_A_CKE1 [17] M_A_CKE2 [19] M_A_CKE3 [19]
M_A_CS#0 [17] M_A_CS#1 [17] M_A_CS#2 [19] M_A_CS#3 [19]
M_A_ODT0 [17] M_A_ODT1 [17] M_A_ODT2 [19] M_A_ODT3 [19]
M_A_BS#0 [17,19] M_A_BS#1 [17,19]
M_A_BG#0 [17,19]
M_A_A[16:0] [17,19]
M_A_BG#1 [17,19] DDRA_ACT# [17,19]
DDR0_PAR [17,19] DDR0_ALERT# [17,19]
M_A_DQSN0 [17,19] M_A_DQSN1 [17,19] M_A_DQSN2 [17,19] M_A_DQSN3 [17,19] M_A_DQSN4 [17,19] M_A_DQSN5 [17,19] M_B_DQSP0 [18,20] M_A_DQSN6 [17,19] M_A_DQSN7 [17,19]
M_A_DQSP0 [17,19] M_A_DQSP1 [17,19] M_A_DQSP2 [17,19] M_A_DQSP3 [17,19] M_A_DQSP4 [17,19] M_A_DQSP5 [17,19] M_A_DQSP6 [17,19] M_A_DQSP7 [17,19]
M_A_DQSP8 [17,19] M_A_DQSN8 [17,19]
M_B_DQ[15:0][18,20]
M_B_DQ[31:16][18,20]
M_B_DQ[47:32][18,20]
M_B_DQ[48:63][18,20]
M_B_CB0[18,20] M_B_CB1[18,20] M_B_CB2[18,20] M_B_CB3[18,20] M_B_CB4[18,20] M_B_CB5[18,20] M_B_CB6[18,20] M_B_CB7[18,20]
R99 121_1%_4 R105 75_1%_4 R109 100_1%_4
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7
M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14
M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_CB0
M_B_CB1
M_B_CB2
M_B_CB3
M_B_CB4
M_B_CB5
M_B_CB6
M_B_CB7
SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2
U3B
BT11
DDR1_DQ_0/DDR0_DQ_16
BR11
DDR1_DQ_1/DDR0_DQ_17
BT9
DDR1_DQ_2/DDR0_DQ_18
BR8
DDR1_DQ_3/DDR0_DQ_19
BP11
DDR1_DQ_4/DDR0_DQ_20
BN11
DDR1_DQ_5/DDR0_DQ_21
BP8
DDR1_DQ_6/DDR0_DQ_22
BN8
DDR1_DQ_7/DDR0_DQ_23
BL12
DDR1_DQ_8/DDR0_DQ_24
BL11
DDR1_DQ_9/DDR0_DQ_25
BL8
DDR1_DQ_10/DDR0_DQ_26
BJ8
DDR1_DQ_11/DDR0_DQ_27
BJ11
DDR1_DQ_12/DDR0_DQ_28
BJ10
DDR1_DQ_13/DDR0_DQ_29
BL7
DDR1_DQ_14/DDR0_DQ_30
BJ7
DDR1_DQ_15/DDR0_DQ_31
BG11
DDR1_DQ_16/DDR0_DQ_48
BG10
DDR1_DQ_17/DDR0_DQ_49
BG8
DDR1_DQ_18/DDR0_DQ_50
BF8
DDR1_DQ_19/DDR0_DQ_51
BF11
DDR1_DQ_20/DDR0_DQ_52
BF10
DDR1_DQ_21/DDR0_DQ_53
BG7
DDR1_DQ_22/DDR0_DQ_54
BF7
DDR1_DQ_23/DDR0_DQ_55
BB11
DDR1_DQ_24/DDR0_DQ_56
BC11
DDR1_DQ_25/DDR0_DQ_57
BB8
DDR1_DQ_26/DDR0_DQ_58
BC8
DDR1_DQ_27/DDR0_DQ_59
BC10
DDR1_DQ_28/DDR0_DQ_60
BB10
DDR1_DQ_29/DDR0_DQ_61
BC7
DDR1_DQ_30/DDR0_DQ_62
BB7
DDR1_DQ_31/DDR0_DQ_63
AA11
DDR1_DQ_32/DDR1_DQ_16
AA10
DDR1_DQ_33/DDR1_DQ_17
AC11
DDR1_DQ_34/DDR1_DQ_18
AC10
DDR1_DQ_35/DDR1_DQ_19
AA7
DDR1_DQ_36/DDR1_DQ_20
AA8
DDR1_DQ_37/DDR1_DQ_21
AC8
DDR1_DQ_38/DDR1_DQ_22
AC7
DDR1_DQ_39/DDR1_DQ_23
W8
DDR1_DQ_40/DDR1_DQ_24
W7
DDR1_DQ_41/DDR1_DQ_25
V10
DDR1_DQ_42/DDR1_DQ_26
V11
DDR1_DQ_43/DDR1_DQ_27
W11
DDR1_DQ_44/DDR1_DQ_28
W10
DDR1_DQ_45/DDR1_DQ_29
V7
DDR1_DQ_46/DDR1_DQ_30
V8
DDR1_DQ_47/DDR1_DQ_31
R11
DDR1_DQ_48/DDR1_DQ_48
P11
DDR1_DQ_49/DDR1_DQ_49
P7
DDR1_DQ_50/DDR1_DQ_50
R8
DDR1_DQ_51/DDR1_DQ_51
R10
DDR1_DQ_52/DDR1_DQ_52
P10
DDR1_DQ_53/DDR1_DQ_53
R7
DDR1_DQ_54/DDR1_DQ_54
P8
DDR1_DQ_55/DDR1_DQ_55
L11
DDR1_DQ_56/DDR1_DQ_56
M11
DDR1_DQ_57/DDR1_DQ_57
L7
DDR1_DQ_58/DDR1_DQ_58
M8
DDR1_DQ_59/DDR1_DQ_59
L10
DDR1_DQ_60/DDR1_DQ_60
M10
DDR1_DQ_61/DDR1_DQ_61
M7
DDR1_DQ_62/DDR1_DQ_62
L8
DDR1_DQ_63/DDR1_DQ_63
AW11
NC/DDR1_ECC_0
AY11
NC/DDR1_ECC_1
AY8
NC/DDR1_ECC_2
AW8
NC/DDR1_ECC_3
AY10
NC/DDR1_ECC_4
AW10
NC/DDR1_ECC_5
AY7
NC/DDR1_ECC_6
AW7
NC/DDR1_ECC_7
G1
DDR_RCOMP_0
H1
DDR_RCOMP_1
J2
DDR_RCOMP_2
CPU_CFL-H_1440P
2 OF 13
DDR CHANNEL B
DDR1_CKP_0/DDR1_CKP_0 DDR1_CKN_0/DDR1_CKN_0 DDR1_CKP_1/DDR1_CKP_1 DDR1_CKN_1/DDR1_CKN_1
NC/DDR1_CKP_2 NC/DDR1_CKN_2 NC/DDR1_CKP_3 NC/DDR1_CKN_3
DDR1_CKE_0/DDR1_CKE_0 DDR1_CKE_1/DDR1_CKE_1 DDR1_CKE_2/DDR1_CKE_2 DDR1_CKE_3/DDR1_CKE_3
DDR1_CS#_0/DDR1_CS#_0 DDR1_CS#_1/DDR1_CS#_1
NC/DDR1_CS#_2 NC/DDR1_CS#_3
DDR1_ODT_0/DDR1_ODT_0
NC/DDR1_ODT_1 NC/DDR1_ODT_2 NC/DDR1_ODT_3
DDR1_CAB_3/DDR1_MA_16 DDR1_CAB_2/DDR1_MA_14 DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_4/DDR1_BA_0 DDR1_CAB_6/DDR1_BA_1
DDR1_CAA_5/DDR1_BG_0 DDR1_CAB_9/DDR1_MA_0
DDR1_CAB_8/DDR1_MA_1 DDR1_CAB_5/DDR1_MA_2
NC/DDR1_MA_3
NC/DDR1_MA_4 DDR1_CAA_0/DDR1_MA_5 DDR1_CAA_2/DDR1_MA_6 DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8 DDR1_CAA_1/DDR1_MA_9
DDR1_CAB_7/DDR1_MA_10 DDR1_CAA_7/DDR1_MA_11 DDR1_CAA_6/DDR1_MA_12 DDR1_CAB_0/DDR1_MA_13
DDR1_CAA_9/DDR1_BG_1 DDR1_CAA_8/DDR1_ACT#
NC/DDR1_PAR
NC/DDR1_ALERT#
DDR1_DQSN_0/DDR0_DQSN_2 DDR1_DQSN_1/DDR0_DQSN_3 DDR1_DQSN_2/DDR0_DQSN_6 DDR1_DQSN_3/DDR0_DQSN_7 DDR1_DQSN_4/DDR1_DQSN_2 DDR1_DQSN_5/DDR1_DQSN_3 DDR1_DQSN_6/DDR1_DQSN_6 DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_0/DDR0_DQSP_2 DDR1_DQSP_1/DDR0_DQSP_3 DDR1_DQSP_2/DDR0_DQSP_6 DDR1_DQSP_3/DDR0_DQSP_7 DDR1_DQSP_4/DDR1_DQSP_2 DDR1_DQSP_5/DDR1_DQSP_3 DDR1_DQSP_6/DDR1_DQSP_6 DDR1_DQSP_7/DDR1_DQSP_7
DDR1_DQSP_8/DDR1_DQSP_8
DDR1_DQSN_8/DDR1_DQSN_8
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
AM9 AN9 AM7 AM8 AM11 AM10 AJ10 AJ11
AT8 AT10 AT7 AT11
AF11 AE7 AF10 AE10
AF7 AE8 AE9 AE11
M_B_A16
AH10
M_B_A14
AH11
M_B_A15
AF8 AH8
AH9 AR9
M_B_A0
AJ9 AK6
M_B_A2
AK5
M_B_A3
AL5
M_B_A4
AL6
M_B_A5
AM6
M_B_A6
AN7
M_B_A7
AN10
M_B_A8
AN8
M_B_A9
AR11
M_B_A10
AH7
M_B_A11
AN11
M_B_A12
AR10
M_B_A13
AF9 AR7 AT9
AJ7 AR8
M_B_DQSN0
BN9
M_B_DQSN1
BL9
M_B_DQSN2
BG9
M_B_DQSN3
BC9
M_B_DQSN4
AC9
M_B_DQSN5
W9
M_B_DQSN6
R9
M_B_DQSN7
M9 BP9
M_B_DQSP1
BJ9
M_B_DQSP2
BF9
M_B_DQSP3
BB9
M_B_DQSP4
AA9
M_B_DQSP5
V9
M_B_DQSP6
P9
M_B_DQSP7
L9
M_B_DQSP8
AW9
M_B_DQSN8
AY9
SMDDR_VREF_CA
BN13
SMDDR_VREF_DQ0_M3
BP13
SMDDR_VREF_DQ1_M3
BR13
M_B_DIM0_CLKP0 [18] M_B_DIM0_CLKN0 [18] M_B_DIM0_CLKP1 [18] M_B_DIM0_CLKN1 [18]
M_B_DIM1_CLKP0 [20] M_B_DIM1_CLKN0 [20] M_B_DIM1_CLKP1 [20] M_B_DIM1_CLKN1 [20]
M_B_CKE0 [18] M_B_CKE1 [18] M_B_CKE2 [20] M_B_CKE3 [20]
M_B_CS#0 [18] M_B_CS#1 [18] M_B_CS#2 [20] M_B_CS#3 [20]
M_B_ODT0 [18] M_B_ODT1 [18] M_B_ODT2 [20] M_B_ODT3 [20]
M_B_A16 [18,20] M_B_A14 [18,20] M_B_A15 [18,20]
M_B_BS#0 [18,20] M_B_BS#1 [18,20]
M_B_BG#0 [18,20]
M_B_A[13:0] [18,20]
M_B_BG#1 [18,20] DDRB_ACT# [18,20]
DDR1_PAR [18,20] DDR1_ALERT# [18,20]
M_B_DQSN0 [18,20] M_B_DQSN1 [18,20] M_B_DQSN2 [18,20] M_B_DQSN3 [18,20] M_B_DQSN4 [18,20] M_B_DQSN5 [18,20] M_B_DQSN6 [18,20] M_B_DQSN7 [18,20]
M_B_DQSP1 [18,20] M_B_DQSP2 [18,20] M_B_DQSP3 [18,20] M_B_DQSP4 [18,20] M_B_DQSP5 [18,20] M_B_DQSP6 [18,20] M_B_DQSP7 [18,20]
M_B_DQSP8 [18,20] M_B_DQSN8 [18,20]
SMDDR_VREF_CA [17]
TP9
SMDDR_VREF_DQ1_M3 [18]
04
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
CFL 3/7 (DDR4 I/F)
CFL 3/7 (DDR4 I/F)
CFL 3/7 (DDR4 I/F)
ZGE
ZGE
ZGE
1A
1A
4 78Friday, May 03, 2019
4 78Friday, May 03, 2019
1
4 78Friday, May 03, 2019
1A
Page 5
5
4
3
2
1
VCCGT Edge cap
4x 47uF 0805 7x 22uF 0603
CFL Processor (POWER)
05
Backside cap 10x 10uF 0402
D D
12x 1uF 0201
C C
B B
R686
Close CPU
+VCC_GT
*short_0805
Modify 8/15
A A
+VCC_GT +VCC_GT
U3K
AT14 AT31 AT32 AT33 AT34 AT35 AT36 AT37 AT38
AU14 AU29 AU30 AU31 AU32 AU35 AU36 AU37 AU38 AV29 AV30 AV31 AV32 AV33 AV34 AV35
AV36 AW14 AW31 AW32 AW33 AW34 AW35 AW36 AW37 AW38
AY29
AY30
AY31
AY32
AY35
AY36
AY37
AY38
BA13
BA14
BA29
BA30
BA31
BA32
BA33
BA34
BA35
BA36
BB13
BB14
BB31
BB32
BB33
BB34
BB35
BB36
BB37
BB38 BC29 BC30 BC31 BC32 BC35 BC36 BC37 BC38 BD13 BD14 BD29 BD30 BD31 BD32 BD33 BD34 BP37 BP38 BR15 BR16 BR17
CPU_CFL-H_1440P
VCCGT1 VCCGT2 VCCGT3 VCCGT4 VCCGT5 VCCGT6 VCCGT7 VCCGT8 VCCGT9 VCCGT10 VCCGT11 VCCGT12 VCCGT13 VCCGT14 VCCGT15 VCCGT16 VCCGT17 VCCGT18 VCCGT19 VCCGT20 VCCGT21 VCCGT22 VCCGT23 VCCGT24 VCCGT25 VCCGT26 VCCGT27 VCCGT28 VCCGT29 VCCGT30 VCCGT31 VCCGT32 VCCGT33 VCCGT34 VCCGT35 VCCGT36 VCCGT37 VCCGT38 VCCGT39 VCCGT40 VCCGT41 VCCGT42 VCCGT43 VCCGT44 VCCGT45 VCCGT46 VCCGT47 VCCGT48 VCCGT49 VCCGT50 VCCGT51 VCCGT52 VCCGT53 VCCGT54 VCCGT55 VCCGT56 VCCGT57 VCCGT58 VCCGT59 VCCGT60 VCCGT61 VCCGT62 VCCGT63 VCCGT64 VCCGT65 VCCGT66 VCCGT67 VCCGT68 VCCGT69 VCCGT70 VCCGT71 VCCGT72 VCCGT73 VCCGT74 VCCGT75 VCCGT76 VCCGT77 VCCGT78 VCCGT79 VCCGT159 VCCGT160 VCCGT161 VCCGT162 VCCGT163
11 OF 13
VCCGT80 VCCGT81 VCCGT82 VCCGT83 VCCGT84 VCCGT85 VCCGT86 VCCGT87 VCCGT88 VCCGT89 VCCGT90 VCCGT91 VCCGT92 VCCGT93 VCCGT94 VCCGT95 VCCGT96 VCCGT97 VCCGT98
VCCGT99 VCCGT100 VCCGT101 VCCGT102 VCCGT103 VCCGT104 VCCGT105 VCCGT106 VCCGT107 VCCGT108 VCCGT109 VCCGT110 VCCGT111 VCCGT112 VCCGT113 VCCGT114 VCCGT115 VCCGT116 VCCGT117 VCCGT118 VCCGT119 VCCGT120 VCCGT121 VCCGT122 VCCGT123 VCCGT124 VCCGT125 VCCGT126 VCCGT127 VCCGT128 VCCGT129 VCCGT130 VCCGT131 VCCGT132 VCCGT133 VCCGT134 VCCGT135 VCCGT136 VCCGT137 VCCGT138 VCCGT139 VCCGT140 VCCGT141 VCCGT142 VCCGT143 VCCGT144 VCCGT145 VCCGT146 VCCGT147 VCCGT148 VCCGT149 VCCGT150 VCCGT151 VCCGT152 VCCGT153 VCCGT154 VCCGT155 VCCGT156 VCCGT157 VCCGT158 VCCGT164 VCCGT165 VCCGT166 VCCGT167 VCCGT168
VSSGT_SENSE VCCGT_SENSE
BD35 BD36 BE31 BE32 BE33 BE34 BE35 BE36 BE37 BE38 BF13 BF14 BF29 BF30 BF31 BF32 BF35 BF36 BF37 BF38 BG29 BG30 BG31 BG32 BG33 BG34 BG35 BG36 BH33 BH34 BH35 BH36 BH37 BH38 BJ16 BJ17 BJ19 BJ20 BJ21 BJ23 BJ24 BJ26 BJ27 BJ37 BJ38 BK16 BK17 BK19 BK20 BK21 BK23 BK24 BK26 BK27 BL15 BL16 BL17 BL23 BL24 BL25 BL26 BL27 BL28 BL36 BL37 BM15 BM16 BM17 BM36 BM37 BN15 BN16 BN17 BN36 BN37 BN38 BP15 BP16 BP17 BR37 BT15 BT16 BT17 BT37
AH37 AH38
VGT_VSSSENSE VGT_VCCSENSE
TP2 TP1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
CFL 4/7 (POWER)
CFL 4/7 (POWER)
CFL 4/7 (POWER)
ZGE
ZGE
ZGE
1A
1A
5 78Friday, May 03, 2019
5 78Friday, May 03, 2019
5 78Friday, May 03, 2019
1
1A
Page 6
5
4
3
2
1
Follow CFL H EDS page 128 to 45W(GT2): VCCSA=11.1A
+VCC_SA Edge cap
D D
2x 47uF 0805 2x 22uF 0805
C611 22u/6.3V_6
Close CPU
C620 22u/6.3V_6
C643 47u/6.3V_8
C631 47u/6.3V_8
Backside cap 7x 10uF 0402
C591 10u/6.3V_4
Under CPU
0621Bear
C605 10u/6.3V_4
C598 10u/6.3V_4
C575
1u/6.3V_4
C584 10u/6.3V_4
C547 10u/6.3V_4
+VCCIO
C574 10u/6.3V_4
C562 10u/6.3V_4
Follow CFL H EDS P128 to 45W: VCCIO,
C C
+VCCIO = 6.4A
+VCC_IO
C618 10u/6.3V_4
C638 10u/6.3V_4
Under CPU
C608 10u/6.3V_4
Backside cap 3x 10uF 0402
+1V_SUS
*0_5%_6
+VCCSTG
B B
R688
R689
modify 8/9
*short_0603
+VCCIO
+VCC_SA
AG12
U3L
J30
VCCSA1
K29
VCCSA2
K30
VCCSA3
K31
VCCSA4
K32
VCCSA5
K33
VCCSA6
K34
VCCSA7
K35
VCCSA8
L31
VCCSA9
L32
VCCSA10
L35
VCCSA11
L36
VCCSA12
L37
VCCSA13
L38
VCCSA14
M29
VCCSA15
M30
VCCSA16
M31
VCCSA17
M32
VCCSA18
M33
VCCSA19
M34
VCCSA20
M35
VCCSA21
M36
VCCSA22
VCCIO1
G15
VCCIO2
G17
VCCIO3
G19
VCCIO4
G21
VCCIO5
H15
VCCIO6
H16
VCCIO7
H17
VCCIO8
H19
VCCIO9
H20
VCCIO10
H21
VCCIO11
H26
VCCIO12
H27
VCCIO13
J15
VCCIO14
J16
VCCIO15
J17
VCCIO16
J19
VCCIO17
J20
VCCIO18
J21
VCCIO19
J26
VCCIO20
J27
VCCIO21
CPU_CFL-H_1440P
11.1 A
6.4 A
12 OF 13
3.3 A
0.13 A
0.06 A
0.02 A
0.15 A
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25
VCCPLL_OC1 VCCPLL_OC2 VCCPLL_OC3
VCCST
VCCSTG2 VCCSTG1
VCCPLL1 VCCPLL2
VCCSA_SENSE
VSSSA_SENSE
VCCIO_SENSE
VSSIO_SENSE
AA6 AE12 AF5 AF6 AG5 AG9 AJ12 AL11 AP6 AP7 AR12 AR6 AT12 AW6 AY6 J5 J6 K12 K6 L12 L6 R6 T6 W6 Y12
BH13 BJ13 G11
H30 H29 G30 H28
J28
M38 M37
H14 J14
Follow CFL H EDS page 127 45W: VDDQ=3.3A (LPDDR4)
+1.2VSUS
C662 22u/6.3V_6
C303 22u/6.3V_6
Under CPU
C96 22u/6.3V_6
C663 22u/6.3V_6
VDDQ Backside cap
4x 22uF 0603 11x 10uF 0402
C667 10u/6.3V_4
C140 10u/6.3V_4
C123 10u/6.3V_4
C666 10u/6.3V_4
C654 10u/6.3V_4
C122 10u/6.3V_4
C658 10u/6.3V_4
C651 10u/6.3V_4
C97 10u/6.3V_4
C668 10u/6.3V_4
VCC_PLL_OC
+VCCPLL_OC
+VCCST
modify 8/9
Backside cap 2x 1uF 0201
VCC_ST
VCCSA_VCCSENSE [65]
VCCIO_VCCSENSE VSSIO_VCCSENSE
VCCSA_VSSSENSE [65]
modify 8/22
+VCCSTG
+VCCPLL
TP63 TP64
C555 1u/10V_2
Backside cap 1x 1uF 0201
VccSTG Backside cap
1x 1uF 0201
VCC_PLL
C98 10u/6.3V_4
06
Backside cap
Under CPU
+VCCSTG +VCCPLL_OC +VCCPLL+VCCIO
R110
+VCCPLL_OC+1.2VSUS
*short_0603
4x 22uF 0603 11x 10uF 0404
+VCCST
modify 8/9
C93 22u/6.3V_6
+VCCPLL
C537 22u/6.3V_6
C559 22u/6.3V_6
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
CFL 5/7 (POWER&GND )
CFL 5/7 (POWER&GND )
CFL 5/7 (POWER&GND )
ZGE
ZGE
ZGE
6 78Friday, May 03, 2019
6 78Friday, May 03, 2019
6 78Friday, May 03, 2019
1
1A
1A
1A
C630
C582
1u/10V_2
A A
5
C648
22u/6.3V_6
C659
1u/10V_2
C649
1u/10V_2
modify 8/3
C641
1u/6.3V_4
4
*1u/6.3V_4
C625
*1u/6.3V_4
C589
1u/10V_2
C594 22u/6.3V_6
+1V_SUS
R690
R685
3
*short_0603
*short_0603
Page 7
5
4
3
2
1
W35 W36 W37 W38 Y29 Y30 Y31 Y32 Y33 Y34 Y35 Y36
07
Vcc (VCC_CORE) Edge cap
8 x 47uF 0805
D D
C C
B B
A A
Backside cap 12x 22uF 0603 42x 10uF 0402 48x 1uF 0201 24x 0201 (placeholder)
Under CPU
C612
C622 22u/6.3V_6
C604 22u/6.3V_6
C558 10u/6.3V_4
C567 10u/6.3V_4
C652 *10u/6.3V_4
22u/6.3V_6
C602 22u/6.3V_6
C580 10u/6.3V_4
C573 10u/6.3V_4
C637 10u/6.3V_4
C627 22u/6.3V_6
C621 22u/6.3V_6
C587 10u/6.3V_4
C554 10u/6.3V_4
C585 *10u/6.3V_4
Follow CFL H EDS page 124 to 45W(GT2): VCC_CORE=96A
Close CPU
C644 47u/6.3V_8
C636 22u/6.3V_6
C614 22u/6.3V_6
C569 10u/6.3V_4
C568 10u/6.3V_4
C607 10u/6.3V_4
modify 8/9
C632 47u/6.3V_8
C623 22u/6.3V_6
C596 10u/6.3V_4
C590 10u/6.3V_4
C578 10u/6.3V_4
C629 *10u/6.3V_4
C645 47u/6.3V_8
C617 22u/6.3V_6
C557 10u/6.3V_4
C600 10u/6.3V_4
C595 10u/6.3V_4
C615 10u/6.3V_4
C646 47u/6.3V_8
C613 22u/6.3V_6
C588 10u/6.3V_4
C609 10u/6.3V_4
C586 10u/6.3V_4
C634 *47u/6.3V_8
+VCC_CORE +VCC_CORE
U3I
AA13
C647 47u/6.3V_8
C603 22u/6.3V_6
C581 10u/6.3V_4
C593 10u/6.3V_4
C583 10u/6.3V_4
C597 10u/6.3V_4
C633 *47u/6.3V_8
AA31 AA32 AA33 AA34 AA35 AA36 AA37 AA38 AB29 AB30 AB31 AB32 AB35 AB36 AB37 AB38 AC13 AC14 AC29 AC30 AC31 AC32 AC33 AC34 AC35 AC36 AD13 AD14 AD31 AD32 AD33 AD34 AD35 AD36 AD37 AD38 AE13 AE14 AE30 AE31 AE32 AE35 AE36 AE37 AE38 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AF36 AF37 AF38 AG14 AG31 AG32 AG33 AG34 AG35 AG36
VCC#AA13 VCC#AA31 VCC#AA32 VCC#AA33 VCC#AA34 VCC#AA35 VCC#AA36 VCC#AA37 VCC#AA38 VCC#AB29 VCC#AB30 VCC#AB31 VCC#AB32 VCC#AB35 VCC#AB36 VCC#AB37 VCC#AB38 VCC#AC13 VCC#AC14 VCC#AC29 VCC#AC30 VCC#AC31 VCC#AC32 VCC#AC33 VCC#AC34 VCC#AC35 VCC#AC36 VCC#AD13 VCC#AD14 VCC#AD31 VCC#AD32 VCC#AD33 VCC#AD34 VCC#AD35 VCC#AD36 VCC#AD37 VCC#AD38 VCC#AE13 VCC#AE14 VCC#AE30 VCC#AE31 VCC#AE32 VCC#AE35 VCC#AE36 VCC#AE37 VCC#AE38 VCC#AF29 VCC#AF30 VCC#AF31 VCC#AF32 VCC#AF33 VCC#AF34 VCC#AF35 VCC#AF36 VCC#AF37 VCC#AF38 VCC#AG14 VCC#AG31 VCC#AG32 VCC#AG33 VCC#AG34 VCC#AG35 VCC#AG36
CPU_CFL-H_1440P
9 OF 13
VCC#AH13 VCC#AH14 VCC#AH29 VCC#AH30 VCC#AH31
VCC#AH32 VCC#AJ14 VCC#AJ29 VCC#AJ30 VCC#AJ31 VCC#AJ32 VCC#AJ33 VCC#AJ34 VCC#AJ35 VCC#AJ36
VCC#AK31
VCC#AK32 VCC#AK33
VCC#AK34 VCC#AK35 VCC#AK36 VCC#AK37 VCC#AK38
VCC#AL13
VCC#AL29
VCC#AL30
VCC#AL31
VCC#AL32
VCC#AL35
VCC#AL36
VCC#AL37
VCC#AL38 VCC#AM13 VCC#AM14 VCC#AM29 VCC#AM30 VCC#AM31 VCC#AM32 VCC#AM33 VCC#AM34 VCC#AM35 VCC#AM36
VCC#AN13
VCC#AN14
VCC#AN31
VCC#AN32 VCC#AN33 VCC#AN34 VCC#AN35 VCC#AN36 VCC#AN37 VCC#AN38
VCC#AP13
VCC#AP30
VCC#AP31
VCC#AP32 VCC#AP35 VCC#AP36 VCC#AP37 VCC#AP38
VCC#K13
VCC_SENSE VSS_SENSE
AH13 AH14 AH29 AH30 AH31 AH32 AJ14 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 AJ36 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AL13 AL29 AL30 AL31 AL32 AL35 AL36 AL37 AL38 AM13 AM14 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AN13 AN14 AN31 AN32 AN33 AN34 AN35 AN36 AN37 AN38 AP13 AP30 AP31 AP32 AP35 AP36 AP37 AP38 K13
AG37 AG38
VCCSENSE VSSSENSE
Under CPU
C542 1u/10V_2
C545 1u/10V_2
C565 1u/10V_2
C599 *10u/6.3V_4
C40 *1u/10V_2
C47 *1u/10V_2
+VCC_CORE
C656
C553
1u/10V_2
1u/10V_2
C556
C560 1u/10V_2
1u/10V_2
C544
C552
1u/10V_2
1u/10V_2
C576 *10u/6.3V_4
C571
C44
*1u/10V_2
*1u/10V_2
C46
C579
*1u/10V_2
*1u/10V_2
Sense resistor should be placed within 2 inches (50.8 mm) of the processor socket
Trace Impendence 50 ohm
R32 100_1%_4
VCCSENSE [65] VSSSENSE [65]
R31 100_1%_4
C664 1u/10V_2
C566 1u/10V_2
C549 1u/10V_2
C624 *10u/6.3V_4
C38 *1u/10V_2
C577 *1u/10V_2
modify 8/9
C665 1u/10V_2
C548 1u/10V_2
C550 1u/10V_2
C592 *10u/6.3V_4
C36 *1u/10V_2
C39 *1u/10V_2
+VCC_CORE [65,66]
C541 1u/10V_2
C561 1u/10V_2
C570 1u/10V_2
C564 *10u/6.3V_4
C37 *1u/10V_2
C43 *1u/10V_2
C653 1u/10V_2
C546 1u/10V_2
C642 *10u/6.3V_4
C42 *1u/10V_2
C45 *1u/10V_2
C563 1u/10V_2
C540 1u/10V_2
C661 *10u/6.3V_4
C41 *1u/10V_2
C572 *1u/10V_2
C551 1u/10V_2
C543 1u/10V_2
U3J
K14
VCC#K14
L13
VCC#L13
L14
VCC#L14
N13
VCC#N13
N14
VCC#N14
N30
VCC#N30
N31
VCC#N31
N32
VCC#N32
N35
VCC#N35
N36
VCC#N36
N37
VCC#N37
N38
VCC#N38
P13
VCC#P13
P14
VCC#P14
P29
VCC#P29
P30
VCC#P30
P31
VCC#P31
P32
VCC#P32
P33
VCC#P33
P34
VCC#P34
P35
VCC#P35
P36
VCC#P36
R13
VCC#R13
R31
VCC#R31
R32
VCC#R32
R33
VCC#R33
R34
VCC#R34
R35
VCC#R35
R36
VCC#R36
R37
VCC#R37
R38
VCC#R38
T29
VCC#T29
T30
VCC#T30
T31
VCC#T31
T32
VCC#T32
T35
VCC#T35
T36
VCC#T36
T37
VCC#T37
T38
VCC#T38
U29
VCC#U29
U30
VCC#U30
U31
VCC#U31
U32
VCC#U32
U33
VCC#U33
U34
VCC#U34
U35
VCC#U35
U36
VCC#U36
V13
VCC#V13
V14
VCC#V14
V31
VCC#V31
V32
VCC#V32
V33
VCC#V33
V34
VCC#V34
V35
VCC#V35
V36
VCC#V36
V37
VCC#V37
V38
VCC#V38
W13
VCC#W13
W14
VCC#W14
W29
VCC#W29
W30
VCC#W30
W31
VCC#W31
W32
VCC#W32
CPU_CFL-H_1440P
Need to check/modify
10 OF 13
VCC#W35 VCC#W36 VCC#W37 VCC#W38
VCC#Y29 VCC#Y30 VCC#Y31 VCC#Y32 VCC#Y33 VCC#Y34 VCC#Y35 VCC#Y36
+VCC_CORE +VCC_CORE
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
CFL 6/7 (POWER&GND )
CFL 6/7 (POWER&GND )
CFL 6/7 (POWER&GND )
ZGE
ZGE
ZGE
7 78Friday, May 03, 2019
7 78Friday, May 03, 2019
1
7 78Friday, May 03, 2019
1A
1A
1A
Page 8
5
4
3
2
1
CFL-H Processor (GND)
U3F
A10
VSS_1
A12
VSS_2
A16
VSS_3
A18
VSS_4
A20
VSS_5
A22
VSS_6
A24
VSS_7
D D
C C
B B
A26
VSS_8
A28
VSS_9
A30
VSS_10
A6
VSS_11
A9
VSS_12
AA12
VSS_13
AA29
VSS_14
AA30
VSS_15
AB33
VSS_16
AB34
VSS_17
AB6
VSS_18
AC1
VSS_19
AC12
VSS_20
AC2
VSS_21
AC3
VSS_22
AC37
VSS_23
AC38
VSS_24
AC4
VSS_25
AC5
VSS_26
AC6
VSS_27
AD10
VSS_28
AD11
VSS_29
AD12
VSS_30
AD29
VSS_31
AD30
VSS_32
AD6
VSS_33
AD8
VSS_34
AD9
VSS_35
AE33
VSS_36
AE34
VSS_37
AE6
VSS_38
AF1
VSS_39
AF12
VSS_40
AF13
VSS_41
AF14
VSS_42
AF2
VSS_43
AF3
VSS_44
AF4
VSS_45
AG10
VSS_46
AG11
VSS_47
AG13
VSS_48
AG29
VSS_49
AG30
VSS_50
AG6
VSS_51
AG7
VSS_52
AG8
VSS_53
AH12
VSS_54
AH33
VSS_55
AH34
VSS_56
AH35
VSS_57
AH36
VSS_58
AH6
VSS_59
AJ1
VSS_60
AJ13
VSS_61
AJ2
VSS_62
AJ3
VSS_63
AJ37
VSS_64
AJ38
VSS_65
AJ4
VSS_66
AJ5
VSS_67
AJ6
VSS_68
W4
VSS_69
W5
VSS_70
Y10
VSS_71
Y11
VSS_72
Y13
VSS_73
Y14
VSS_74
Y37
VSS_75
Y38
VSS_76
Y7
VSS_77
Y8
VSS_78
Y9
VSS_79
AK29
VSS_80
AK30
VSS_81
CPU_CFL-H_1440P
6 OF 13
VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162
AK4 AL10 AL12 AL14 AL33 AL34 AL4 AL7 AL8 AL9 AM1 AM12 AM2 AM3 AM37 AM38 AM4 AM5 AN12 AN29 AN30 AN5 AN6 AP10 AP11 AP12 AP33 AP34 AP8 AP9 AR1 AR13 AR14 AR2 AR29 AR3 AR30 AR31 AR32 AR33 AR34 AR35 AR36 AR37 AR38 AR4 AR5 AT29 AT30 AT6 AU10 AU11 AU12 AU33 AU34 AU6 AU7 AU8 AU9 AV37 AV38 AW1 AW12 AW2 AW29 AW3 AW30 AW4 U6 V12 V29 V30 A14 AD7 V6 W1 W12 W2 W3 W33 W34
U3G
AW5
VSS_163
AY12
VSS_164
AY33
VSS_165
AY34
VSS_166
B9
VSS_167
BA10
VSS_168
BA11
VSS_169
BA12
VSS_170
BA37
VSS_171
BA38
VSS_172
BA6
VSS_173
BA7
VSS_174
BA8
VSS_175
BA9
VSS_176
BB1
VSS_177
BB12
VSS_178
BB2
VSS_179
BB29
VSS_180
BB3
VSS_181
BB30
VSS_182
BB4
VSS_183
BB5
VSS_184
BB6
VSS_185
BC12
VSS_186
BC13
VSS_187
BC14
VSS_188
BC33
VSS_189
BC34
VSS_190
BC6
VSS_191
BD10
VSS_192
BD11
VSS_193
BD12
VSS_194
BD37
VSS_195
BD6
VSS_196
BD7
VSS_197
BD8
VSS_198
BD9
VSS_199
BE1
VSS_200
BE2
VSS_201
BE29
VSS_202
BE3
VSS_203
BE30
VSS_204
BE4
VSS_205
BE5
VSS_206
BE6
VSS_207
BF12
VSS_208
BF33
VSS_209
BF34
VSS_210
BF6
VSS_211
BG12
VSS_212
BG13
VSS_213
BG14
VSS_214
BG37
VSS_215
BG38
VSS_216
BG6
VSS_217
BH1
VSS_218
BH10
VSS_219
BH11
VSS_220
BH12
VSS_221
BH14
VSS_222
BH2
VSS_223
BH3
VSS_224
BH4
VSS_225
BH5
VSS_226
BH6
VSS_227
BH7
VSS_228
BH8
VSS_229
BH9
VSS_230
T2
VSS_231
T3
VSS_232
T33
VSS_233
T34
VSS_234
T4
VSS_235
T5
VSS_236
T7
VSS_237
T8
VSS_238
T9
VSS_239
U37
VSS_240
U38
VSS_241
BJ12
VSS_242
BJ14
VSS_243
CPU_CFL-H_1440P
7 OF 13
VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252 VSS_253 VSS_254 VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324
BJ15 BJ18 BJ22 BJ25 BJ29 BJ30 BJ31 BJ32 BJ33 BJ34 BJ35 BJ36 BK13 BK14 BK15 BK18 BK22 BK25 BK29 BK6 BL13 BL14 BL18 BL19 BL20 BL21 BL22 BL29 BL33 BL35 BL38 BL6 BM11 BM12 BM13 BM14 BM18 BM2 BM21 BM22 BM23 BM24 BM25 BM26 BM27 BM28 BM29 BM3 BM33 BM35 BM38 BM5 BM6 BM7 BM8 BM9 BN12 BN14 BN18 BN19 BN2 BN20 BN21 BN24 BN29 BN30 BN31 BN34 P38 P6 R12 R29 AY14 BD38 R30 T1 T10 T11 T12 T13 T14
U3H
BN4
VSS_325
BN7
VSS_326
BP12
VSS_327
BP14
VSS_328
BP18
VSS_329
BP21
VSS_330
BP24
VSS_331
BP25
VSS_332
BP26
VSS_333
BP29
VSS_334
BP33
VSS_335
BP34
VSS_336
BP7
VSS_337
BR12
VSS_338
BR14
VSS_339
BR18
VSS_340
BR21
VSS_341
BR24
VSS_342
BR25
VSS_343
BR26
VSS_344
BR29
VSS_345
BR34
VSS_346
BR36
VSS_347
BR7
VSS_348
BT12
VSS_349
BT14
VSS_350
BT18
VSS_351
BT21
VSS_352
BT24
VSS_353
BT26
VSS_354
BT29
VSS_355
BT32
VSS_356
BT5
VSS_357
C11
VSS_358
C13
VSS_359
C15
VSS_360
C17
VSS_361
C19
VSS_362
C21
VSS_363
C23
VSS_364
C25
VSS_365
C27
VSS_366
C29
VSS_367
C31
VSS_368
C37
VSS_369
C5
VSS_370
C8
VSS_371
C9
VSS_372
D10
VSS_373
D12
VSS_374
D14
VSS_375
D16
VSS_376
D18
VSS_377
D20
VSS_378
D22
VSS_379
D24
VSS_380
D26
VSS_381
D28
VSS_382
D3
VSS_383
D30
VSS_384
D33
VSS_385
D6
VSS_386
D9
VSS_387
E34
VSS_388
E35
VSS_389
E38
VSS_390
E4
VSS_391
E9
VSS_392
N3
VSS_393
N33
VSS_394
N34
VSS_395
N4
VSS_396
N5
VSS_397
N6
VSS_398
N7
VSS_399
N8
VSS_400
N9
VSS_401
P12
VSS_402
P37
VSS_403
M14
VSS_404
M6
VSS_405
N1
VSS_406
F11
VSS_407
F13
VSS_408
CPU_CFL-H_1440P
8 OF 13
VSS_409 VSS_410 VSS_411 VSS_412 VSS_413 VSS_414 VSS_415 VSS_416 VSS_417 VSS_418 VSS_419 VSS_420 VSS_421 VSS_422 VSS_423 VSS_424 VSS_425 VSS_426 VSS_427 VSS_428 VSS_429 VSS_430 VSS_431 VSS_432 VSS_433 VSS_434 VSS_435 VSS_436 VSS_437 VSS_438 VSS_439 VSS_440 VSS_441 VSS_442 VSS_443 VSS_444 VSS_445 VSS_446 VSS_447 VSS_448 VSS_449 VSS_450 VSS_451 VSS_452 VSS_453 VSS_454 VSS_455 VSS_456 VSS_457 VSS_458 VSS_459 VSS_460 VSS_461 VSS_462 VSS_463 VSS_464 VSS_465 VSS_466 VSS_467 VSS_468 VSS_469 VSS_470 VSS_471 VSS_472 VSS_473 VSS_474 VSS_475 VSS_476 VSS_477 VSS_478 VSS_479
VSS_A3
VSS_A34
VSS_A4 VSS_B3
VSS_B37
VSS_BR38
VSS_BT3 VSS_BT35 VSS_BT36
VSS_BT4
VSS_C2
VSS_D38
F15 F17 F19 F2 F21 F23 F25 F27 F29 F3 F31 F36 F4 F5 F8 F9 G10 G12 G14 G16 G18 G20 G22 G23 G24 G26 G28 G4 G5 G6 G8 G9 H11 H12 H18 H22 H25 H32 H35 J10 J18 J22 J25 J32 J33 J36 J4 J7 K1 K10 K11 K2 K3 K38 K4 K5 K7 K8 K9 L29 L30 L33 L34 M12 M13 N10 N11 N12 N2 BT8 BR9
A3 A34 A4 B3 B37 BR38 BT3 BT35 BT36 BT4 C2 D38
Need to check
TPEV_PEG_VIEW_2[11]
PCH_2_CPU_TRIG[15]
R48
*Short_0402
CPU_2_PCH_TRIG[15]
R43 *Short_0402
stuff it for CRB 9/20
Configuration Signals:
CFG[0] Stall reset sequence after PCU PLL
lock until de-asserted
CFG[2] PCI Express Static Lane Reversal
eDP enable
CFG[4]
CFG[6:5]
PCI Express Bifurcation
CFL-H Processor (RESERVED, CFG)
U3M
E2
TPEV_PEG_VIEW_2
TP11 TP10
R63
*Short_0402
CPU_2_PCH_TRIG_R
The CFG signals have a default value of '1' if not terminated on the board.
Note that some of the Intel reference designs board might connect CFG[0] to HOOK[2]. This route is not needed on a OxM board.
x1 = Normal operation x0 = Lane numbers reversed x1 = Disabled x0 = Enabled x00 = 1 x8 & 2 x4 PCI Express x01 = reserved x10 = 2 x8 PCI Express
RSVD_TP5
E3
IST_TRIG
E1
RSVD_TP4
D1
RSVD_TP3
BR1
RSVD_TP1
BT2
RSVD_TP2
BN35
RSVD15
J24
RSVD28
H24
RSVD27
BN33
RSVD14
BL34
RSVD13
N29
RSVD30
R14
RSVD31
AE29
RSVD#AE29
AA14
RSVD1
AP29
RSVD5
AP14
RSVD4
A36
VSS_A36
A37
VSS_A37
H23
PROC_TRIGIN
J23
PROC_TRIGOUT
F30
RSVD24
E30
RSVD23
B30
RSVD7
C30
RSVD21
G3
RSVD26
J3
RSVD29
BR35
RSVD19
BR31
RSVD18
BH30
RSVD9
CPU_CFL-H_1440P
13 OF 13
RSVD11 RSVD10
RSVD12
RSVD3
RSVD25
RSVD22 RSVD20 RSVD17 RSVD16
RSVD8 RSVD6
BK28 BJ28
BL31 AJ8 G13
C38 C1 BR2 BP1 B38 B2
x11 = 1 x16 PCI Express
PEG defer training
CFG[7]
A A
x1 = PEG train follow RESETB de-asseted x0 = PEG wait for BIOS fro training
08
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
CFL 7/7 (GND)
CFL 7/7 (GND)
CFL 7/7 (GND)
ZGE
ZGE
ZGE
1A
1A
8 78Friday, May 03, 2019
8 78Friday, May 03, 2019
1
8 78Friday, May 03, 2019
1A
Page 9
5
4
3
2
1
U14B
DMI_TXN0[3] DMI_TXP0[3] DMI_RXN0[3] DMI_RXP0[3] DMI_TXN1[3] DMI_TXP1[3] DMI_RXN1[3] DMI_RXP1[3] DMI_TXN2[3] DMI_TXP2[3] DMI_RXN2[3] DMI_RXP2[3]
D D
C C
USB3.0 (DB/IO-1)
USB3.0 (DB/IO-2)
B B
USB3.0 (IO-3/Charger)
USB3.0 (NV Type-C)
DMI_TXN3[3] DMI_TXP3[3] DMI_RXN3[3] DMI_RXP3[3]
USB30_TX1-[60] USB30_TX1+[60] USB30_RX1-[60] USB30_RX1+[60]
USB30_TX2-[60] USB30_TX2+[60] USB30_RX2-[60] USB30_RX2+[60]
USB30_TX3+[46] USB30_TX3-[46] USB30_RX3+[46] USB30_RX3-[46]
USB30_TX4+[44] USB30_TX4-[44] USB30_RX4+[44] USB30_RX4-[44]
K34
DMI0_RXN
J35
DMI0_RXP
C33
DMI0_TXN
B33
DMI0_TXP
G33
DMI1_RXN
F34
DMI1_RXP
C32
DMI1_TXN
B32
DMI1_TXP
K32
DMI2_RXN
J32
DMI2_RXP
C31
DMI2_TXN
B31
DMI2_TXP
G30
DMI3_RXN
F30
DMI3_RXP
C29
DMI3_TXN
B29
DMI3_TXP
A25
DMI7_TXP
B25
DMI7_TXN
P24
DMI7_RXP
R24
DMI7_RXN
C26
DMI6_TXP
B26
DMI6_TXN
F26
DMI6_RXP
G26
DMI6_RXN
B27
DMI5_TXP
C27
DMI5_TXN
L26
DMI5_RXP
M26
DMI5_RXN
D29
DMI4_TXP
E28
DMI4_TXN
K29
DMI4_RXP
M29
DMI4_RXN
G17
PCIE1_RXN/USB31_7_RXN
F16
PCIE1_RXP/USB31_7_RXP
A17
PCIE1_TXN/USB31_7_TXN
B17
PCIE1_TXP/USB31_7_TXP
R21
PCIE2_RXN/USB31_8_RXN
P21
PCIE2_RXP/USB31_8_RXP
B18
PCIE2_TXN/USB31_8_TXN
C18
PCIE2_TXP/USB31_8_TXP
K18
PCIE3_RXN/USB31_9_RXN
J18
PCIE3_RXP/USB31_9_RXP
B19
PCIE3_TXN/USB31_9_TXN
C19
PCIE3_TXP/USB31_9_TXP
N18
PCIE4_RXN/USB31_10_RXN
R18
PCIE4_RXP/USB31_10_RXP
D20
PCIE4_TXN/USB31_10_TXN
C20
PCIE4_TXP/USB31_10_TXP
F20
PCIE5_RXN
G20
PCIE5_RXP
B21
PCIE5_TXN
A22
PCIE5_TXP
K21
PCIE6_RXN
J21
PCIE6_RXP
D21
PCIE6_TXN
C21
PCIE6_TXP
B23
PCIE7_TXP
C23
PCIE7_TXN
J24
PCIE7_RXP
L24
PCIE7_RXN
F24
PCIE8_RXN
G24
PCIE8_RXP
B24
PCIE8_TXN
C24
PCIE8_TXP
PCH_CFL-H_874P
U14F
F9
USB31_1_TXN
F7
USB31_1_TXP
D11
USB31_1_RXN
C11
USB31_1_RXP
C3
USB31_2_TXN
D4
USB31_2_TXP
B9
USB31_2_RXN
C9
USB31_2_RXP
C17
USB31_6_TXN
C16
USB31_6_TXP
G14
USB31_6_RXN
F14
USB31_6_RXP
C15
USB31_5_TXN
B15
USB31_5_TXP
J13
USB31_5_RXN
K13
USB31_5_RXP
G12
USB31_3_TXP
F11
USB31_3_TXN
C10
USB31_3_RXP
B10
USB31_3_RXN
C14
USB31_4_TXP
B14
USB31_4_TXN
J15
USB31_4_RXP
K16
USB31_4_RXN
PCH_CFL-H_874P
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3# GPP_F15/USB2_OC4# GPP_F16/USB2_OC5# GPP_F17/USB2_OC6# GPP_F18/USB2_OC7#
USB2_VBUSSENSE
2 OF 13
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS0#
GPP_A6/SERIRQ/ESPI_CS1#
GPP_A7/PIRQA#/ESPI_ALERT0#
GPP_A0/RCIN#/ESPI_ALERT1#
GPP_A14/SUS_STAT#/ESPI_RESET#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_K19/SMI#
GPP_K18/NMI#
GPP_E6/SATA_DEVSLP2 GPP_E5/SATA_DEVSLP1 GPP_E4/SATA_DEVSLP0 GPP_F9/SATA_DEVSLP7 GPP_F8/SATA_DEVSLP6 GPP_F7/SATA_DEVSLP5 GPP_F6/SATA_DEVSLP4 GPP_F5/SATA_DEVSLP3
6 OF 13
USB2N_1 USB2P_1 USB2N_2 USB2P_2 USB2N_3 USB2P_3 USB2N_4 USB2P_4 USB2N_5 USB2P_5 USB2N_6 USB2P_6 USB2N_7 USB2P_7 USB2N_8 USB2P_8 USB2N_9
USB2P_9 USB2N_10 USB2P_10 USB2N_11 USB2P_11 USB2N_12 USB2P_12 USB2N_13 USB2P_13 USB2N_14 USB2P_14
USB2_COMP
RSVD1
USB2_ID
GPD7
PCIE24_TXP PCIE24_TXN PCIE24_RXP PCIE24_RXN
PCIE23_TXP PCIE23_TXN PCIE23_RXP PCIE23_RXN
PCIE22_TXP PCIE22_TXN PCIE22_RXP PCIE22_RXN
PCIE21_TXP PCIE21_TXN PCIE21_RXP PCIE21_RXN
J3 J2 N13 N15 K4 K3 M10 L9 M1 L2 K7 K6 L4 L3 G4 G5 M6 N8 H3 H2 R10 P9 G1 G2 N3
change to BT to Port14 for CNVi 9/20
N2 E5 F6
USB_OC0#
AH36
USB_OC1#
AL40
USB_OC2#
AJ44
USB_OC3#
AL41
USB_OC4#
AV47
USB_OC5#
AR35
USB_OC6#
AR37
USB_OC7#
AV43
USB2_COMP
F4 F3 U13 G3
PCH_GPD7
BE41 G45
G46 Y41 Y40 G48 G49 W44 W43 H48 H47 U41 U40 F46 G47 R44 T43
ESPI_EC_IO0
BB39
ESPI_EC_IO1
AW37
ESPI_EC_IO2
AV37
ESPI_EC_IO3
BA38
LPC_LFRAME#
BE38 AW35
SERIRQ LPC_PIRQAB
BA36
SIO_RCIN#
BE39
EC_RST#
BF38
CLK_PCI_EC_R
BB36
CLK_PCI_LPC_R
BB34
EXT_SMI#
T48
PCH_TBT_WAKE#
T47
AH40
DEVSLP1_SSD1
AH35
DEVSLP0_HDD
AL48 AP47
DEVSLP7
AN37 AN46
DEVSLP4_SSD2
AR47 AP48
USBP1­USBP1+ USBP2­USBP2+ USBP3­USBP3+ USBP4­USBP4+ USBP5­USBP5+ USBP6­USBP6+ USBP7­USBP7+ USBP8­USBP8+
R214 113_1%_4 R195 1K_1%_4
R202 1K_1%_4
Modify 8/10
USBP1- [58] USBP1+ [58] USBP2- [58] USBP2+ [58] USBP3- [46]
USBP3+ [46]
TP75 TP71 TP74 TP73
USBP6- [32]
USBP6+ [32]
USBP7- [54]
USBP7+ [54]
TP69 TP70
TBTA_USB2_D_N [40]
TBTA_USB2_D_P [40] NV_USB2_D_N [43] NV_USB2_D_P [43]
modify 12/29
modify 8/3
R107933_5%_4 R110733_5%_4 R108733_5%_4 R107833_5%_4
TP110
R1035 22_1%_4 R1049 22_1%_4
TP28
DEVSLP1_SSD1 [51]
TP101
DEVSLP0_HDD [51]
DEVSLP4_SSD2 [52]
DB/IO-1 DB/IO-2 MB/IO-3
CCD Metal KB
TBT TypeC1 NV TypeC2
USBP14- [50] USBP14+ [50]
USB_OC0# [46] USB_OC1# [58] USB_OC2# [58]
If OTG is not implemented on the platform, then USB2_ID and should both be connected to ground.
PCIE_TXP24_SSD [52] PCIE_TXN24_SSD [52] PCIE_RXP24_SSD [52]
PCIE_RXN24_SSD [52]
PCIE_TXP23_SSD [52] PCIE_TXN23_SSD [52] PCIE_RXP23_SSD [52]
PCIE_RXN23_SSD [52]
PCIE_TXP22_SSD [52] PCIE_TXN22_SSD [52] PCIE_RXP22_SSD [52] PCIE_RXN22_SSD [52] PCIE_TXP21_SSD [52] PCIE_TXN21_SSD [52] PCIE_RXP21_SSD [52] PCIE_RXN21_SSD [52]
change PCIE port for RAID 2/1
BT
LPC_LAD0 [50,57] LPC_LAD1 [50,57] LPC_LAD2 [50,57] LPC_LAD3 [50,57]
LPC_LFRAME# [50,57] SERIRQ [57]
SIO_RCIN# [57]
C918 18p/50V_4
C922 18p/50V_4
SSD1 HDD
(USBP1_TypeA-1) (USBP2_TypeA-2) (USBP3_TypeA-3)
(USBP6) (USBP7)
(USBP9)
(USBP10)
(USBP14)
SSD2 PCIE x4
CLK_PCI_EC [57] CLK_PCI_LPC [50]
SSD2
EMI RESERVE
USB_OC0#
EC8 *10p/50V_4
EMI RESERVE
CLK_PCI_EC
EC11 *10p/50V_4
This strap should sample HIGH.
R533 *100K_1%_4
PCH_GPD7
LPC_PIRQAB
USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# USB_OC7#
USB_OC2# USB_OC0# USB_OC1#
SERIRQ SIO_RCIN#
DEVSLP0_HDD DEVSLP1_SSD1 DEVSLP4_SSD2 EXT_SMI#
R532 100K_1%_4
R1123 10K_1%_4
modify 8/9
R844 10K_1%_4 R873 10K_1%_4 R885 10K_1%_4 R882 10K_1%_4 R910 10K_1%_4 R830 10K_1%_4 R828 10K_1%_4 R905 10K_1%_4
C825 0.1u/10V_2 C799 0.1u/10V_2 C816 0.1u/10V_2
R1047 10K_1%_4 R474 10K_1%_4
R328 *100K_1%_4 R241 *100K_1%_4 R896 *100K_1%_4 R242 *100K_1%_4 R258 *10K_1%_4
+3VPCU
09
+3V
+3V_DEEP_SUS
+3V
+3V_DEEP_SUS
USB 2.0 PORT
+3V_DEEP_SUS
R222 10K_1%_2
PCH_TBT_WAKE#
A
W
K
E H
W
I L E
A A
5
4
D
3
- C
O
L D
Q27 *2N7002KTB
321
R223 *short_0402
PCH_WAKE# [38]
3
PORT1 PORT2 PORT3 PORT4 PORT5 PORT6 PORT7 PORT8 PORT9 PORT10 PORT11 PORT12 PORT13 PORT14
+3V_DEEP_SUS[2,10,11,12,13,14,16,39]
2
USB2 DB-1 USB2 DB-2 USB2 MB-1
NC CCD Metal KB NC TBT TypeC NV TypeC NC NC NC BT( CNVi )
USB 3.0 PORT PORT1 PORT2 PORT3 PORT4
PORT7 PORT8~10 NC
USB3 DB_TYPEA-1 USB3 DB_TYPEA-2 USB3 MB_TYPEA-1 NCNC NCPORT5~6 NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
PCH 1/7 (DMI/USB/PCIE)
PCH 1/7 (DMI/USB/PCIE)
PCH 1/7 (DMI/USB/PCIE)
ZGE
ZGE
ZGE
9 78Friday, May 03, 2019
9 78Friday, May 03, 2019
1
9 78Friday, May 03, 2019
1A
1A
1A
Page 10
5
*47p/50V_4
C442
PCH_AZ_CODEC_BITCLK[47] PCH_AZ_CODEC_SDIN0[47] PCH_AZ_CODEC_SDOUT[47]
PCH_AZ_CODEC_SYNC[47]
D D
Add R1204 for CNVi 9/29
CNV_RF_RESET#_C
C C
R98875K_1%_4
MODEM_CLKREQ_C
R447
71.5K_1%_4
PCH_AZ_CODEC_RST#[47]
AUD_AZACPU_SDO_R[3] AUD_AZACPU_SDI[3] AUD_AZACPU_SCLK[3]
Modify 8/10
modify 8/9
PCM_CLK[50] PCM_IN[50]
PCH_DMICDAT[32] PCH_DMICCLK[32]
RTC_RST#[16]
SYS_PWROK
RSMRST#[57]
PCH_RSMRST# DPWROK_R
R488 33_5%_4 R491 *short_0402 R492 33_5%_4 R494 33_5%_4
R496 33_5%_4
R358 30_1%_4 R313 30_1%_4
R1118 *0_5%_4 R1117 *0_5%_4
R1068 *0_5%_4 R981 *short_0402
R965 *short_0402
ACZ_BCLK
ACZ_BCLK ACZ_SDIN0_R ACZ_SDO ACZ_SYNC
ACZ_RST#
AUD_AZACPU_SDO AUD_AZACPU_SDI AUD_AZACPU_SCLK_R
I2S2_SCLK
I2S2_RXD MODEM_CLKREQ_C CNV_RF_RESET#_C
RTC_RST# SRTC_RST#
EC_PWROK_R
PCH_RSMRST#
SMBALERT# SMB_PCH_CLK SMB_PCH_DAT
SML0ALERT# SMB_ME0_CLK SMB_ME0_DAT
SMB1ALERT# SMB_ME1_CLK SMB_ME1_DAT
ME Lock
ME_WR#
ACZ_SDO
+3V_DEEP_SUS
R1088
*1K_1%_2
R1053
*1K_1%_2
CLR_CMOS[57]
EC reset RTC
CLR_CMOS
2
ME_WR#[57]
B B
R493 1K_1%_4
0 = *Enable security in the Flash Description (iPD 20K)
1 = Disable Flash Descriptor Security (Override)
TLS CONFIDENTIALITY ENABLED
HIGH: Flash Descriptor Security (override). This strap should only be asserted high using external pull-up in manufacturing/debug environments ONLY.(CRB)
LOW: security measures defined in the Flash Descriptor. (Default)
+3V_DEEP_SUS[2,9,11,12,13,14,16,39]
RTC Circuitry(RTC)
+3VPCU
+3V_RTC_0
update footprint to bat-aaa-bat-046-k03-2p-smt and change pin defined
A A
4/17
3
50273-0020N-V09
RTC Power trace width 20mils.
+3V_RTC_0 +3V_RTC_1
R566 1K_1%_4
1
2
4
CN6
5
D58
2 1
BAT54CW
modify 8/9
+3V_RTC
3
C488
1u/6.3V_4
30mils
+3V_RTC
R619
20K_5%_4
R618
20K_5%_4
RTC_RST#
C489 1u/6.3V_4
SRTC_RST#
C476 1u/6.3V_4
(20mils)
R586 100K_1%_4
3
Q49
2N7002KTB
1
12
4
U14D
BD11
HDA_BCLK/I2S0_SCLK
BE11
HDA_SDI0/I2S0_RXD
BF12
HDA_SDO/I2S0_TXD
BG13
HDA_SYNC/I2S0_SFRM
BE10
HDA_RST#/I2S1_SCLK
BF10
HDA_SDI1/I2S1_RXD
BE12
I2S1_TXD/SNDW2_DATA
BD12
I2S1_SFRM/SNDW2_CLK
AM2
HDACPU_SDO
AN3
HDACPU_SDI
AM3
HDACPU_SCLK
AV18
GPP_D8/I2S2_SCLK
AW18
GPP_D7/I2S2_RXD
BA17
GPP_D6/I2S2_TXD/MODEM_CLKREQ
BE16
GPP_D5/I2S2_SFRM/CNV_RF_RESET#
BF15
GPP_D20/DMIC_DATA0/SNDW4_DATA
BD16
GPP_D19/DMIC_CLK0/SNDW4_CLK
AV16
GPP_D18/DMIC_DATA1/SNDW3_DATA
AW15
GPP_D17/DMIC_CLK1/SNDW3_CLK
BE47
RTCRST#
BD46
SRTCRST#
AY42
PCH_PWROK
BA47
RSMRST#
AW41
DSW_PWROK
BE25
GPP_C2/SMBALERT#
BE26
GPP_C0/SMBCLK
BF26
GPP_C1/SMBDATA
BF24
GPP_C5/SML0ALERT#
BF25
GPP_C3/SML0CLK
BE24
GPP_C4/SML0DATA
BD33
GPP_B23/SML1ALERT#/PCHHOT#
BF27
GPP_C6/SML1CLK
BE27
GPP_C7/SML1DATA
PCH_CFL-H_874P
SRTC_RST#
3
Q41
2
*2N7002KTB
1
RTC_RST#
J1 *SHORT_PAD
4
HDA Bus(CLG)
GPP_A12/BM_BUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
GPP_A13/SUSWARN#/SUSPWRDNACK
4 OF 13
2ND_MBDATA[40,57,60]
PCH/EC
2ND_MBCLK[40,57,60]
PCH_SMBDATA[17,18,19,20]
XDP/DDR
PCH_SMBCLK[17,18,19,20]
SYSPWOK
SYS_PWROK
EC_PWROK_R
SYS_PWROK_R EC_PWROK
DP_PWROK
DPWROK_R
SYS_PWROK_R PCH_RSMRST#
GPP_A8/CLKRUN# GPD11/LANPHYPC GPD9/SLP_WLAN#
DRAM_RESET#
GPP_B2/VRALERT#
GPP_B1/GSPI1_CS1#/TIME_SYNC1
GPP_B0/GSPI0_CS1#
GPP_K17/ADR_COMPLETE
GPP_B11/I2S_MCLK
SYS_PWROK
WAKE#
GPD6/SLP_A#
SLP_LAN#
GPP_B12/SLP_S0#
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
GPD8/SUSCLK
GPD0/BATLOW#
GPP_A15/SUSACK#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
SYS_RESET#
GPP_B14/SPKR
CPUPWRGD
ITP_PMODE
PCH_JTAGX
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TCK
*2N7002KDW
3 4
R1156 *short_0402
6 1
*2N7002KDW
R1157 *short_0402
R723 4.7K_1%_4
+3V
R726 4.7K_1%_4
+3V
+3V_DEEP_SUS
4
3 5
R1019 *0_5%_4
R1023 *short_0402
R1108 *short_0402 R1073 *0_5%_4 R1024 *0_5%_4
R960 680K_1%_4 R1032 10K_1%_2 R951
modify 8/9
C881 *0.1u/10V_2
*10K_1%_2
3
BF36 AV32
BF41 BD42 BB46
BE32 BF33 BE29 R47 AP29 AU3
BB47 BE40 BF40 BC28 BF42 BE42 BC42
BE45 BF44 BE35 BC37
BG44 BG42 BD39 BE46 AU2 AW29 AE3
AL3 AH4 AJ4 AH3 AH2 AJ3
Q55A
5
2
Q55B
2N7002KDW Q66A
5
2
2N7002KDW Q66B
EC_PWROK
1 2
U42 *NL17SZ08DFT2G
3
CLKRUN# LAN_DIS# SLP_WLAN_N DDR_DRAMRST#_L
GPP_B2
MPHY_EXT_PWR_GATE SYS_PWROK_R
PCH_WAKE#_L SLP_A#_L SLP_LAN# PCH_SLP_S0ix#_L SLP_S3#_L SLP_S4#_L SLP_S5#_L
SUSCLK32 BATLOW# SUSACK# SUSWARN#
LANWAKE_N ACPRESENT
PCH_SLP_SUS# DNBSWON#
XDP_DBRESET# ACZ_SPKR PROCPWRGD
ITP_PMODE PCH_JTAGX PCH_TMS PCH_TDO PCH_TDI PCH_TCK
+3V_DEEP_SUS
SMB_ME1_DAT
SMB_ME1_CLK
+3V
SMB_PCH_DAT
34
SMB_PCH_CLK
61
R437 *short_0402 R620 *0_5%_4
R1037 *short_0402 R449 *short_0402
R540 *short_0402 R552 *short_0402
R480 *short_0402 R541 *short_0402 R479 *short_0402
R983 *0_5%_4 R486 *short_0402
R543 *0_5%_4
R248 *short_0402 R264 *short_0402 R188 *short_0402 R244 *short_0402 R283 51_5%_4
modify 3/21
modify 8/9
PCH_PWROK [57]
TP119 TP113
SYS_PWROK
CNVi
Add 10/18 Intel#571006
EC_PWROK [57] IMVP_PWRGD [2,65]
R1006 *10K_1%_2
CLKRUN# [57]
C407 *0.1u/16V_4
DDR_DRAMRST# [17,18,19,20] UART_WAKE_N [50]
PIRQ# [49]
TP111
modify 8/9
PCIE_WAKE# [38,50,59] SLP_A# [16]
TP112
PCH_SLP_S0ix# [16,49] SUSB# [16,57] SUSC# [16,57] SLP_S5# [16]
SUSCLK [50] BATLOW# [38]
TP122
ACPRESENT [57]
TP105
DNBSWON# [57]
XDP_DBRESET# [16] ACZ_SPKR [47] PROCPWRGD [2]
TP99
H_TCK [2] H_TMS [2] H_TDO [2] H_TDI [2]
CNV_RF_RESET#_C
Modify the circuit 10/19
MODEM_CLKREQ_C
2
Modify 8/10
modify 8/9
change BOM 9/4
+3V_DEEP_SUS +1.8V_DEEP_SUS
2
+1.8V_DEEP_SUS+3V_DEEP_SUS
2
modify 8/9
R473
4.7K_1%_4
61
Q38B
PJX138K
R468
4.7K_1%_4
61
Q35B
PJX138K
ACZ_SPKR
SMB1ALERT#
R498 10K_1%_4
34
Q38A
5
PJX138K
R460 10K_1%_4
34
Q35A
5
PJX138K
TOP SWAP OVERRIDE STRAP
HIGH:TOP SWAP ENABLED (CRB)
LOW:TOP SWAP DISABLED(DEFAULT)
This signal has an internal pull-down. 0 = Disable IntelR DCI-OOB (Default) 1 = Enable IntelR DCI-OOB
2
DDR_DRAMRST#
MPHY_EXT_PWR_GATE
PCH_WAKE#_L GPP_B2 LANWAKE_N SUSACK# XDP_DBRESET# SUSCLK32 SUSWARN# BATLOW# ACPRESENT PCH_SLP_S0ix#_L
SMB_ME0_CLK SMB_ME0_DAT
SMB_ME1_CLK SMB_ME1_DAT
SMB_PCH_CLK SMB_PCH_DAT
PCH_TDO
CLKRUN#
CNV_RF_RESET# [50]
MODEM_CLKREQ [50]
R1040 20K_1%_4
+3V_DEEP_SUS
R1103 150K_1%_4
R1071 *20K_1%_4
1
10
R336 470_1%_4
R1097 200K_1%_4 R436 4.7K_1%_4 R579 4.7K_1%_4 R481 4.7K_1%_4 R617 *10K_1%_4 R935 10K_1%_4 R1011 *10K_1%_4 R615 *10K_1%_4 R534 10K_1%_4 R542 100K_1%_4 R495 100K_1%_4 R537 2.2K_5%_4
R535 2.2K_5%_4 R606 *2.2K_5%_4
R603 *2.2K_5%_4 R478 2.2K_5%_4
R477 2.2K_5%_4
R189 *51_5%_4
R1121 10K_1%_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+1.2VSUS
+3V_DEEP_SUS
change R1007 to 4.7K for CNVi 9/29
change R985 to 4.7K for CNVi 9/29
+1V_S5
+3V
GPP_C5/SML0ALERT# 0 = LPC is selected (for EC). (Default) 1 = eSPI is selected (for EC).
ESPI/LPC SELECT STRAP
HIGH:eSPI Is selected for EC.
LOW: LPC Is selected for EC. (Default)
TLS CONFIDENTIALITY ENABLED
HIGH:T Enable Intel ME Crypto Transport Layer Security (TLS) cipher suite (with confidentiality). (CRB)
LOW: Disable Intel ME Crypto Transport Layer Security (TLS) cipher suite (no confidentiality). (Default)
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 2/7 (HDA/SMBUS)
PCH 2/7 (HDA/SMBUS)
PCH 2/7 (HDA/SMBUS)
SML0ALERT#
modify 8/9
SMBALERT#
1
+3V_DEEP_SUS
+3V_DEEP_SUS
R575
4.7K_1%_4
R574 *20K_1%_4
ZGE
ZGE
ZGE
10 78Friday, May 03, 2019
10 78Friday, May 03, 2019
10 78Friday, May 03, 2019
R577 *4.7K_1%_4
R476 100K_1%_4
1A
1A
1A
Page 11
PLT_ID0 PLT_ID1
C771 15p/25V_2
1
2
Y5
4
3
C778 15p/25V_2
5
SSD1 PCIE x4
HDD SATA
SSD1 PCIE x4
modify it 9/20
TBT PCIE x4
R871 *100K_1%_4 R889 100K_1%_4
XTAL24_IN_L
R814 1M_1%_2
XTAL24_OUT_L
LAN
R820 33_5%_2
L32
4 3 1
*MCM2012B900GBE R821 33_5%_2
Modify 8/10
PCIE_TXP11_SSD[51] PCIE_TXN11_SSD[51] PCIE_RXP11_SSD[51] PCIE_RXN11_SSD[51]
PCIE_TXN14_LAN[59]
PCIE_TXP14_LAN[59 ]
PCIE_RXN14_LAN[59]
PCIE_RXP14_LAN[59]
SATA_TXN0[51]
SATA_TXP0[51] SATA_RXN0[51] SATA_RXP0[51]
PCIE_TXP12_SSD[51] PCIE_TXN12_SSD[51] PCIE_RXP12_SSD[51] PCIE_RXN12_SSD[51]
PCIE_TXP20_TBT[38] PCIE_TXN20_TBT[38 ] PCIE_RXP20_TBT[38] PCIE_RXN20_TBT[38]
PCIE_TXP19_TBT[38] PCIE_TXN19_TBT[38 ] PCIE_RXP19_TBT[38] PCIE_RXN19_TBT[38]
2/5 modify
CLK_DPLL_NSCCLKP[2] CLK_DPLL_NSCCLKN[2]
CLK_CPU_BCLKP[2] CLK_CPU_BCLKN[2]
R218 60.4_1%_4
Swap SSD2 and TBT REQ for PCIE SSD RAID 2/1
PCIE_CLKREQ_NGFF1#[51] PCIE_CLKREQ_VGA#[21]
PCIE_CLKREQ_LAN#[59] PCIE_CLKREQ_WLAN#[50] PCIE_CLKREQ_NGFF2#[52] PCIE_CLKREQ_TBT#[38]
XTAL24_IN
2
XTAL24_OUT
HSIO MUX PORT
PCIE1-8
NC
PCIE9-12
SSD1 SATA/PCIE * 4
PCIE13
HDD (SATA2) LANPCIE14 WLAN
PCIE15 PCIE16 NC PCIE17-20
Apline Ridge
PCIE21-24
SSD2 PCIE * 4
D D
+3V
PLT_ID0 PU for REVE PCB 2/1
R861 100K_1%_4 R878 *100K_1%_4
RESERVE
C C
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-H needs to be replaced by 38.4 MHz (30 Ohm ESR) XTAL for Cannonlake-H.
24MHZ/+-20PPM
01/31 Modify value and Y5 PN
B B
Crystal Components with Surrounding 10 mil Wide GND Shield Trace Break Out:4-10 mil Wide GND Shield Trace
RTC Clock 32.768KHz
C365 18p/50V_ 4
Y4
32.768KHZ/20ppm
C391 18p/50V_ 4
chang P/N to CS04872FB11 8/18
R207 48.7_4 R203 48.7_4
R190 48.7_4
48.7 ohm no symbol link
A A
12
R411 10M_5%_4
CLKOUT_SRC_N15 CLKOUT_SRC_P15
R197 *0_5%_4
TPEV_PEG_VIEW_2
5
RTC_X1
RTC_X2
TPEV_PEG_VIEW_2 [8]
GPIO24_IFPF_HPD_PCH GPP_I14
CNV_PA_BLANKING[50]
modify 10/20
HRESET[40]
CNV_BRI_DT[50]
CNV_BRI_RSP[50]
CNV_RGI_DT[50]
CNV_RGI_RSP[50]
CNV_MFUART2_RXD[50] CNV_MFUART2_TXD[50]
GPIO24_IFPF_HPD_PCH
CNVi
TP125 TP126 TP127
EMI RESERVE
EC10 *10P/50V/C0G_4
R170 *short_0402 R169 *short_0402
C184 0.22u/6.3V _2 C174 0.22u/6.3V _2
C171 0.22u/6.3V _2 C181 0.22u/6.3V _2
TP118
+3V_DEEP_SUS
RG196 10K_1%_4
3
GPIO24_IFPF_HPD
2
1
Q78 PJA138K
4
CL_CLK
RS232_DET# PLT_ID1 PLT_ID0
PCIE_TXN14_LAN_C PCIE_TXP14_LAN_C
PCIE_TXP20_TBT_C PCIE_TXN20_TBT_C
PCIE_TXP19_TBT_C PCIE_TXN19_TBT_C
XTAL24_OUT XTAL24_IN
XCLK_RBIAS RTC_X1
RTC_X2 PCIE_CLKREQ_NGFF1#
PCIE_CLKREQ_VGA# PCIE_CLKREQ2# PCIE_CLKREQ_LAN# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_NGFF2# PCIE_CLKREQ_TBT# PCIE_CLKREQ7# PCIE_CLKREQ8# PCIE_CLKREQ9# PCIE_CLKREQ10# PCIE_CLKREQ11# PCIE_CLKREQ12# PCIE_CLKREQ13# PCIE_CLKREQ14# PCIE_CLKREQ15#
GPP_G3
R239 *short_0402
R946 *0_5%_4
R998 *0_5%_4
R372 33_5%_4 R403 33_5%_4
R384 *0_5%_4 R404 *0_5%_4
4
CL_CLK
AR2
CL_DATA
AT5
CL_RST#
AU4 P48
V47 V48 W47
L47
L46 U48 U47 N48 N47 P47 R46
C36 B36 F39 G38
AR42 AR48 AU47 AU46
C39 D39 D46 C47
B38 C38 C45 C46
E37 D38
J41 H42
B44 A44 R37 R35 D43 C44 N42 M44
CLKOUT_SRC_N15 CLKOUT_SRC_P15
AW13
BE9 BF8 BF9
BG8
BE8
BD8
AV13
AP3
AP2 AN4 AM7
GPP_J0
AV6
GPP_J1
AY3
AR13
GPP_J10
AV7
AW3 AT10
CNV_BRI_DT_R
AV4
CNV_BRI_RSP
AY2
CNV_RGI_DT_R
BA4
CNV_RGI_RSP
AV3
GPP_J8
AW2
GPP_J9
AU9
GPIO24_IFPF_HPD [24,41,57]
U14C
CL_CLK CL_DATA CL_RST#
GPP_K8 GPP_K9 GPP_K10 GPP_K11
GPP_K0 GPP_K1 GPP_K2 GPP_K3 GPP_K4 GPP_K5 GPP_K6 GPP_K7
PCIE11_TXP/SATA0A_TXP PCIE11_TXN/SATA0A_TXN PCIE11_RXP/SATA0A_RXP PCIE11_RXN/SATA0A_RXN
GPP_F10/SATA_SCLOCK GPP_F11/SATA_SLOAD GPP_F13/SATA_SDATAOUT0 GPP_F12/SATA_SDATAOUT1
PCIE14_TXN/SATA1B_TXN PCIE14_TXP/SATA1B_TXP PCIE14_RXN/SATA1B_RXN PCIE14_RXP/SATA1B_RXP
PCIE13_TXN/SATA0B_TXN PCIE13_TXP/SATA0B_TXP PCIE13_RXN/SATA0B_RXN PCIE13_RXP/SATA0B_RXP
PCIE12_TXP/SATA1A_TXP PCIE12_TXN/SATA1A_TXN PCIE12_RXP/SATA_1A_RXP PCIE12_RXN/SATA1A_RXN
PCIE20_TXP/SATA7_TXP PCIE20_TXN/SATA7_TXN PCIE20_RXP/SATA7_RXP PCIE20_RXN/SATA7_RXN PCIE19_TXP/SATA6_TXP PCIE19_TXN/SATA6_TXN PCIE19_RXP/SATA6_RXP PCIE19_RXN/SATA6_RXN
PCH_CFL-H_874P
BE33
D7 C6
B8 C8
U9
U10
T3
BA49 BA48
BF31 BE31
AR32
BB30 BA30
AN29
AE47
AC48
AE41
AF48 AC41 AC39
AE39
AB48 AC44 AC43
V2 V3
T2 T1
AA1
Y2
AC7 AC6
U14M
GPP_G0/SD_CMD GPP_G1/SD_D0 GPP_G2/SD_D1 GPP_G3/SD_D2 GPP_G4/SD_D3 GPP_G5/SD_CD# GPP_G6/SD_CLK GPP_G7/SD_WP
GPP_I11/M2_SKT2_CFG0 GPP_I12/M2_SKT2_CFG1 GPP_I13/M2_SKT2_CFG2 GPP_I14/M2_SKT2_CFG3
GPP_J0/CNV_PA_BLANKING GPP_J1/CPU_VCCIO_PWR_GATE# GPP_J11/A4WP_PRESENT GPP_J10 GPP_J_2 GPP_J_3 GPP_J_4_CNV_BRI_DT_UART0_RTSB GPP_J5/CNV_BRI_RSP/UART0_RXD GPP_J6/CNV_RGI_DT/UART0_TXD GPP_J7/CNV_RGI_RSP/UART0_CTS# GPP_J8/CNV_MFUART2_RXD GPP_J9/CNV_MFUART2_TXD
PCH_CFL-H_874P
GPP_F0/SATAXPCIE3/SATAGP_3
3 OF 13
U14G
GPP_A16/CLKOUT_48 CLKOUT_CPUNSSC_P
CLKOUT_CPUNSSC CLKOUT_CPUBCLK_P
CLKOUT_CPUBCLK XTAL_OUT
XTAL_IN XCLK_BIASREF RTCX1
RTCX2 GPP_B5/SRCCLKREQ0#
GPP_B6/SRCCLKREQ1# GPP_B7/SRCCLKREQ2# GPP_B8/SRCCLKREQ3# GPP_B9/SRCCLKREQ4# GPP_B10/SRCCLKREQ5# GPP_H0/SRCCLKREQ6# GPP_H1/SRCCLKREQ7# GPP_H2/SRCCLKREQ8# GPP_H3/SRCCLKREQ9# GPP_H4/SRCCLKREQ10# GPP_H5/SRCCLKREQ11# GPP_H6/SRCCLKREQ12# GPP_H7/SRCCLKREQ13# GPP_H8/SRCCLKREQ14# GPP_H9/SRCCLKREQ15#
CLKOUT_PCIE_N15 CLKOUT_PCIE_P15
CLKOUT_PCIE_N14 CLKOUT_PCIE_P14
CLKOUT_PCIE_N13 CLKOUT_PCIE_P13
CLKOUT_PCIE_N12 CLKOUT_PCIE_P12
PCH_CFL-H_874P
3
PCIE9_RXN PCIE9_RXP PCIE9_TXN
PCIE9_TXP
PCIE10_RXN PCIE10_RXP PCIE10_TXN
PCIE10_TXP
PCIE15_RXN/SATA2_RXN PCIE15_RXP/SATA2_RXP
PCIE_15_SATA_2_TXN
PCIE15_TXP/SATA2_TXP
PCIE16_RXN/SATA3_RXN PCIE16_RXP/SATA3_RXP PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
PCIE17_RXN/SATA4_RXN PCIE17_RXP/SATA4_RXP PCIE17_TXN/SATA4_TXN
PCIE17_TXP/SATA4_TXP
PCIE18_RXN/SATA5_RXN PCIE18_RXP/SATA5_RXP PCIE18_TXN/SATA5_TXN
PCIE18_TXP/SATA5_TXP
GPP_E8/SATA_LED#
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
GPP_F1/SATAXPCIE4/SATAGP4 GPP_F2/SATAXPCIE5/SATAGP5 GPP_F3/SATAXPCIE6/SATAGP6 GPP_F4/SATAXPCIE7/SATAGP7
GPP_F21/EDP_BKLTCTL
GPP_F20/EDP_BKLTEN
GPP_F19/EDP_VDDEN
THRMTRIP#
PM_SYNC
PLTRST_CPU#
PM_DOWN
CLKOUT_ITPXDP
CLKOUT_ITPXDP_P
CLKOUT_CPUPCIBCLK
CLKOUT_CPUPCIBCLK_P
CLKOUT_PCIE_N0
CLKOUT_PCIE_P0
CLKOUT_PCIE_N1
CLKOUT_PCIE_P1
CLKOUT_PCIE_N2
CLKOUT_PCIE_P2
CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
CLKOUT_PCIE_N4
CLKOUT_PCIE_P4
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
CLKOUT_PCIE_N7
CLKOUT_PCIE_P7
CLKOUT_PCIE_N8
CLKOUT_PCIE_P8
CLKOUT_PCIE_N9
CLKOUT_PCIE_P9
CLKOUT_PCIE_N10 CLKOUT_PCIE_P10
CLKOUT_PCIE_N11 CLKOUT_PCIE_P11
CLKIN_XTAL
7 OF 13
CNV_WR_CLKN CNV_WR_CLKP
CNV_WR_D0N CNV_WR_D0P CNV_WR_D1N CNV_WR_D1P
CNV_WT_CLKN CNV_WT_CLKP
CNV_WT_D0N
CNV_WT_D0P
CNV_WT_D1N
CNV_WT_D1P
CNV_WT_RCOMP
PCIE_RCOMPN
PCIE_RCOMPP SD_RCOMP_1P8 SD_RCOMP_3P3
GPPJ_RCOMP_1P81 GPPJ_RCOMP_1P82 GPPJ_RCOMP_1P83
RSVD#BC1
13 OF 13
3
G36 F36 C34 D34
K37 J37 C35 B35
F44 E45
PCIE_TXN15_WLAN_C
B40
PCIE_TXP15_WLAN_C
C40 L41
M40 B41 C41
K43 K44
PCIE_TXN17_TBT_C
A42
PCIE_TXP17_TBT_C
B42 P41
R40
PCIE_TXN18_TBT_C
C42
PCIE_TXP18_TBT_C
D42 AK48 AH41
NGFF1_DET1
AJ43 AK47 AN47
NGFF2_DET2
AM46 AM43 AM47
PCH_TBT_PLTRST#
AM48
PCH_DPST_PWM
AU48
PCH_LVDS_BLON
AV46
PCH_DISP_ON
AV44
PM_THRMTRIP#_L
AD3
PCH_PECI
AF2
PECI
PM_SYNC_R
AF3
CPU_PLTRST#
AG5
H_PM_DOWN
AE2
Y3 Y4
B6 A6
AJ6 AJ7
AH9 AH10
AE14 AE15
AE6 AE7
AC2 AC3
AB2 AB3
W4 W3
W7 W6
Swap SSD2 and TBT CLK for PCIE SSD RAID 2/1
AC14 AC15
U2 U3
AC9 AC11
AE9 AE11
R6
RSVD2 RSVD3
R858 10K_1%_4
BD4 BE3
BB3 BB4 BA3 BA2
BC5 BB6
BE6 BD7 BG6 BF6
CNV_RCOMP
BA1
PCIECOMP_N
B12
PCIECOMP_P
A13 BE5 BE4 BD1 BE1 BE2
Y35 Y36
BC1 AL35
TP
modify 8/9
R343 10K_1%_4
R845 620_1%_4 R219 30_1%_4
R887 *short_0402
CPU_PCI_BCLKN [2] CPU_PCI_BCLKP [2]
CLK_PCIE_SSD1N [51] CLK_PCIE_SSD1P [51 ]
CLK_VGA_N [21] CLK_VGA_P [21]
CLK_PCIE_LANN [59] CLK_PCIE_LANP [59]
CLK_PCIE_WLANN [50] CLK_PCIE_WLANP [50]
CLK_PCIE_SSD2N [52] CLK_PCIE_SSD2P [52 ]
CLK_PCIE_TBTN [38] CLK_PCIE_TBTP [38]
CLKIN_XTAL [50]
CNVI for WLAN
CNV_WR_CLKN [50] CNV_WR_CLKP [5 0]
CNV_WRXN0 [50] CNV_WRXP0 [50] CNV_WRXN1 [50] CNV_WRXP1 [50]
CNV_WT_CLKN [50] CNV_WT_CLKP [50]
CNV_WTXN0 [50] CNV_WTXP0 [50] CNV_WTXN1 [50] CNV_WTXP1 [50]
R961 150_1%_4 R171 100_1%_4
R978 200_1%_4 R990 200_1%_4
R432 200_1%_4
TP48
C2320.1u/16V_4 C2310.1u/16V_4
C1780.22 u/6.3V_2 C1790.22 u/6.3V_2
C1770.22 u/6.3V_2 C1760.22 u/6.3V_2
+3V
NGFF1_DET1 [51]
PCH_TBT_PLTRST# [12]
PCH_DPST_PWM [32] PCH_LVDS_BLON [32] PCH_DISP_ON [32]
PM_THRMTRIP# [2,17,18,19,20,53] PCH_PECI [2] PM_SYNC [2] CPU_PLTRST#R [2] H_PM_DOWN [2]
SSD1 GFX
LAN WLAN
SSD2 TBT
CNV_RGI_RSP CNV_BRI_RSP
2
modify 8/9
GPP_J9
2
PCIE_RXN9_SSD [51] PCIE_RXP9_SSD [51] PCIE_TXN9_SSD [51] PCIE_TXP9_SSD [51]
PCIE_RXN10_SSD [51] PCIE_RXP10_SSD [51] PCIE_TXN10_SSD [51] PCIE_TXP10_SSD [51]
PCIE_RXN15_WLAN [50] PCIE_RXP15_WLAN [50] PCIE_TXN15_WLAN [50] PCIE_TXP15_WLAN [50]
2/5 modify
PCIE_RXN17_TBT [38] PCIE_RXP17_TBT [38] PCIE_TXN17_TBT [38] PCIE_TXP17_TBT [38]
PCIE_RXN18_TBT [38] PCIE_RXP18_TBT [38] PCIE_TXN18_TBT [38] PCIE_TXP18_TBT [38]
SATA_LED# [51,52,59]
For SSD1 Det
Close PCH
R366 20K_ 1%_4 R393 20K_ 1%_4
R416 *4.7K_1%_4
R914 10K_1%_4
SSD1 PCIE x4
WLAN
TBT PCIE x4
SSD SATA I/F --> H SSD PCIE I/F --> L
R877 *10K_1%_4
R334 10K_1%_4
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS
1
11
+1V_S5
PM_THRMTRIP#_L
EMI RESERVE
SATA_LED#
stuff R1037 and unstuff R1039 for PCIE SSD RAID 2/1
CPU_VCCIO_PWR_GATE[63]
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
NGFF1_DET1
NGFF2_DET2
RS232_DET#
GPP_G3 PCH_DPST_PWM
PCH_PECI
PCIE_CLKREQ_NGFF1# PCIE_CLKREQ_VGA# PCIE_CLKREQ2# PCIE_CLKREQ_LAN# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_TBT# PCIE_CLKREQ_NGFF2# PCIE_CLKREQ7# PCIE_CLKREQ8# PCIE_CLKREQ9# PCIE_CLKREQ10# PCIE_CLKREQ11# PCIE_CLKREQ12# PCIE_CLKREQ13# PCIE_CLKREQ14# PCIE_CLKREQ15#
R351 *10K_1%_4
Modify 8/10
VCCIO Power Gat e control for C 10
PCH 3/7 (SATA/LPC/CLK)
PCH 3/7 (SATA/LPC/CLK)
PCH 3/7 (SATA/LPC/CLK)
modify 8/9
R855 2K_1%_4
C800 1000p/50V _4
Add 12/19
12
D49 PESD5V0H1BSF
+3V
R875 10K_1%_4
R256 *10K_1%_4
R881 *100K_1%_4
R441 *10K_1%_4 R909 10K_1%_4
R193 *100K_1%_4
+3V
R576 10K_1%_4 R490 10K_1%_4 R1120 *10K_1%_4 R1119 10K_1%_4 R1129 10K_1%_4 R305 10K_1%_4 R1098 *10K_1%_4 R279 *10K_1%_4 R864 *10K_1%_4 R338 *10K_1%_4 R832 *10K_1%_4 R831 *10K_1%_4 R825 *10K_1%_4 R281 *10K_1%_4 R846 *10K_1%_4 R835 *10K_1%_4
+3V_DEEP_SUS
+1.8V_DEEP_SUS
R383
*10K_1%_4
Q34
3
*PJA138K
GPP_J1
2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
ZGE
11 78Friday, May 03, 2019
11 78Friday, May 03, 2019
1
11 78Friday, May 03, 2019
1A
1A
1A
Page 12
5
4
3
2
1
PCH Strap Pin
D D
EMI RESERVE
PCH_SPI1_CLK
EC5 *10P/50V/C0G_4
TP97
PCH_SPI1_SI PCH_SPI1_SO PCH_SPI_CS0# PCH_SPI1_CLK
TP104
C C
SPI_TPM_CS#[49]
PLTRST#(CLG)
B B
PCI_PLTRST#
SPI_TPM_CS# SPI_TPM_CS#_L
TP57 TP53 TP55 TP54
TS_SPI1_CLK TS_SPI1_CS# TS_SPI1_MISO TS_SPI1_MOSI TS_SPI1_MISO_R
PCH_SPI1_SI_L[49] PCH_SPI1_SO_L[49] PCH_SPI1_CLK_L[49]
+3V_DEEP_SUS
C492 0.1u/16V_4
1 2
U31
3 5
MC74VHC1G08DFT2G
TP102
R936 33_5%_4 R945 33_5%_4 R369 *short_0402 R360 33_5%_4
R921 TPM@33_5%_4
R489 33_5%_4 R551 33_5%_4 R550 33_5%_4 R553 33_5%_4
TPM
PCH_SPI1_SI_L PCH_SPI1_SO_L PCH_SPI1_CLK_L
4
PLTRST#
R605 100K_1%_4
PCH_SPI1_SI_L PCH_SPI1_SO_L PCH_SPI_CS0#_L PCH_SPI1_CLK_L
SPI1_IO2 SPI1_IO3
TS_SPI1_CLK_R TS_SPI1_CS#_R TS_SPI1_MOSI_R
PLTRST# [21,41,49,50,51,52,57,59]
TBT_PLTRST# (RTD3)
PLTRST#
PLTRST#
A A
PCI_PLTRST#
PCH_TBT_PLTRST#[11]
R E
S E T
A
F T E R
R
T D
3 R
E
R1151 *short_0201 R1152 *0_5%_2
PCH_TBT_PLTRST#
5
R1150 100K_1%_4
R162 *0_5%_2
+3V_DEEP_SUS
1 2
3 5
U6 MC74VHC1G08DFT2G
4
R160 *100K_1%_4
U14A
BE36
GPP_A11/PME#/SD_VDD2_PWR_EN#
R15
RSVD#R15
R13
RSVD#R13
AL37
VSS
AN35
TP#AN35
AU41
SPI0_MOSI
BA45
SPI0_MISO
AY47
SPI0_CS0#
AW47
SPI0_CLK
AW48
SPI0_CS1#
AY48
SPI0_IO2
BA46
SPI0_IO3
AT40
SPI0_CS2#
BE19
GPP_D1/SPI1_CLK/SBK1_BK1
BF19
GPP_D0/SPI1_CS#/SBK0_BK0
BF18
GPP_D3/SPI1_MOSI/SBK3_BK3
BE18
GPP_D2/SPI1_MISO/SBK2_BK2
BC17
GPP_D22/SPI1_IO3
BD17
GPP_D21/SPI1_IO2
PCH_CFL-H_874P
TBT_PLTRST# [38]
4
GPP_B13/PLTRST#
GPP_K16/GSXCLK
GPP_K12/GSXDOUT
GPP_K13/GSXSLOAD
GPP_K14/GSXDIN
GPP_K15/GSXSRESET#
GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
GPP_H13/SML3CLK
GPP_H12/SML2ALERT#
GPP_H11/SML2DATA
GPP_H10/SML2CLK
1 OF 13
INTRUDER#
This strap should sample HIGH.
R850 *100K_1%_4
PCH SPI ROM(CLG)
+3V_DEEP_SUS
Follow VSPI level (1.8V or 3.3V)
R319 *short_0402
PCH_SPI_CS0# PCH_SPI1_CLK
SPI1_IO2 PCH_SPI_IO2
+SPI_VCC
EC
SPI_CS0#_UR_ME[57] PCH_SPI_CLK_EC[57]
PCH_SPI_SI_EC[57]
PCH_SPI_SO_EC[57]
+SPI_VCC
PLTRST#(CLG)
PCI_PLTRST#
AV29
Y47 Y46 Y48 W46 AA45
AL47 AM45
KBL_DET#
BF32 BC33
AE44
SMB_ME4_DAT
AJ46
SMB_ME4_CLK
AE43
PCH_GPP_H15
AC47
SMB_ME3_DAT
AD48
SMB_ME3_CLK
AF47 AB47
SML2ALERT#
SMB_ME2_DAT
AD47
SMB_ME2_CLK
AE48
SM_INTRUDER#
BB44
PCH_GPP_H15
+SPI_VCC
C328 1u/10V_4
R455 33_5%_4
R456 *1K_1%_4
R341 33_5%_4 R454 33_5%_4 R453 *short_0402 R321 33_5%_4
Modify 8/10
R863 *short_0402
R967 1M_1%_4
follow intel command 8/8
R836 100K_1%_4
R452
4.7K_1%_4
R335 *2.55K_1%_4
Modify 8/10
PCH_SPI1_SI PCH_SPI1_SO
PCH_SPI_CS0#
PCH_SPI1_CLK
3
TP52
TP87
RTD3_CIO_PWR_EN [38]
+3V_RTC
+3V_DEEP_SUS
PCH SOIC 208 mils 16MB SPI ROM Socket
Main source AKE3DF-KN01 2nd source AKE3DZN0Q02
1/21 change to IC
U19
5
DI(IO0) DO(IO1) CS CLK
WP(IO2)
HOLD(IO3)
GND
VCC
2 1 6
W25Q128JVSIQ
change U26 footprint name to soic8-7_9-1_27 10/03
Socket:DG008000011
Modify 8/10
RESERVED
This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during
strap sampling.
modify 8/9
SMB_ME4_CLK SMB_ME4_DAT SMB_ME3_CLK SMB_ME3_DAT SMB_ME2_CLK SMB_ME2_DAT
KBL_DET#
R849 *1K_1%_4 R879 1K_1%_4 R891 1K_1%_4 R289 1K_1%_4 R303 1K_1%_4 R288 1K_1%_4
R538 *100K_1%_4
ESD
+SPI_VCC
+SPI_VCCPCH_SPI1_SI
8
PCH_SPI_IO2PCH_SPI1_SO
3 7
R340 *1K_1%_4
4
C320
0.1u/16V_4
PCH_SPI_IO3
2
+3V_DEEP_SUS
PCH_SPI1_SO_L
+3VPCU
C441 *0.1u/16V_4
R320 33_5%_4
R931
*20K_1%_4
R944 *4.7K_1%_4
+3V_DEEP_SUS
SPI1_IO3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
ESPI FLASH SHARING MODE
HIGH:SLAVE ATTACEHD FLASH SHARING
LOW: 0: MASTER ATTACHED FLASH SHARING
This strap should sample LOW. There should NOT be any on-board device driving it to opposite direction during
strap sampling.
+3V_DEEP_SUS
SML2ALERT#
RESERVED
This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
+3V_DEEP_SUS
PCH_SPI1_SI_L
RESERVED
This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
+3V_DEEP_SUS
SPI1_IO2
RESERVED
This strap should sample HIGH. There should NOT be any on-board device driving it to opposite direction during
strap sampling.
update vlaue follow intel command 8/8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 4/7 (GPIO/MISC)
PCH 4/7 (GPIO/MISC)
PCH 4/7 (GPIO/MISC)
SPI1_IO3
1
+3V_DEEP_SUS
ZGE
ZGE
ZGE
12 78Friday, May 03, 2019
12 78Friday, May 03, 2019
12 78Friday, May 03, 2019
R270 *4.7K_1%_4
R271 *30K_5%_4
R919 100K_1%_4
R940 *4.7K_1%_4
R377 100K_1%_4
R378 *4.7K_1%_4
R382 100K_1%_4
R385 *100_1%_4
1A
1A
1A
12
Page 13
5
Modify 8/10
GPUEVENT#_PCH[23]
D D
GC6FBEN_Q[23]
DGPU_PWROK_Q[23]
DGPU_PWR_EN[25]
DGPU_HOLD_RST#[21]
modify 10/20
TPD_INT#_PCH[54]
+3V_DEEP_SUS
EMI RESERVE
I2C1_SCL
EC6 *10P/50V/C0G_4
TBT_HTPLG_NL5[38]
TBT3 TPD
C C
TBT
B B
+3V
R1089 *1K_1%_4 R1065 *10K_1%_2 R1163 10K_1%_2 R1062 *10K_1%_2 R1122 10K_1%_2
Modify 8/10
EDP_HPD_CPU DGPU_PWR_EN GC6FBEN_Q DGPU_HOLD_RST# DGPU_PWROK_Q
+3V
R1055 *short_0402
S_GPIO
R1056 *short_0402
I2C1_SCL[40] I2C1_SDA[40] I2C0_SCL[54] I2C0_SDA[54]
Change to stuff by NV FAE's suggestion 0326
TBT_DP_HPD[23,37,38]
SIO_EXT_SCI#[57]
+3V_DEEP_SUS
EDP_HPD_CPU[32]
R1054 100K_1%_4 R1034 10K_1%_2 R1164 *10K_1%_2
10K_1%_2
R1031 R1081 *10K_1%_2
Boot BISO Destination: HIGH=LPC, LOW=SPI GPP_B22 LOW
R1036 100K_1%_4 R1094 *short_0402
GSPI0_MOSI DGPU_PWR_EN DGPU_HOLD_RST#
R1110
GPP_B15
BBS_BIT1 GPP_C11
UART2_CTS#
UART2_RTS#
UART2_TXD
UART2_RXD
I2C1_SCL I2C1_SDA I2C0_SCL I2C0_SDA
DDPB_HPD0 DP_HPD_PCH_R HDMI_HPD_PCH_R SIO_EXT_SCI#
EDP_HPD_CPU
TP108
TP107
Unstuff TBT_DP_HDP from ZGQ
R1004 *short_0402
R907 10K_1%_2
GSPI1_MOSI
10K_1%_2
4
U14K
BA26
GPP_B22/GSPI1_MOSI
BD30
GPP_B21/GSPI1_MISO
AU26
GPP_B20/GSPI1_CLK
AW26
GPP_B19/GSPI1_CS0#
BE30
GPP_B18/GSPI0_MOSI
BD29
GPP_B17/GSPI0_MISO
BF29
GPP_B16/GSPI0_CLK
BB26
GPP_B15/GSPI0_CS0#
BB24
GPP_C9/UART0_TXD
BE23
GPP_C8/UART0_RXD
AP24
GPP_C11/UART0_CTS#
BA24
GPP_C10/UART0_RTS#
BD21
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AW24
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
AP21
GPP_C13/UART1_TXD/ISH_UART1_TXD
AU24
GPP_C12/UART1_RXD/ISH_UART1_RXD
AV21
GPP_C23/UART2_CTS#
AW21
GPP_C22/UART2_RTS#
BE20
GPP_C21/UART2_TXD
BD20
GPP_C20/UART2_RXD
BE21
GPP_C19/I2C1_SCL
BF21
GPP_C18/I2C1_SDA
BC22
GPP_C17/I2C0_SCL
BF23
GPP_C16/I2C0_SDA
BE15
GPP_D4/ISH_I2C2_SDA/I2C3_SDA/SBK4_BK4
BE14
GPP_D23/ISH_I2C2_SCL/I2C3_SCL
PCH_CFL-H_874P
U14E
AT6
GPP_I0/DDPB_HPD0/DISP_MISC0
AN10
GPP_I1/DDPC_HPD1/DISP_MISC1
AP9
GPP_I2/DPPD_HPD2/DISP_MISC2
AL15
GPP_I3/DPPE_HPD3/DISP_MISC3
AN6
GPP_I4/EDP_HPD/DISP_MISC4
PCH_CFL-H_874P
GPP_D9/ISH_SPI_CS#/GSPI2_CS0# GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GP_BSSB_CLK/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GP_BSSB_DI/GSPI2_MOSI
GPP_D16/ISH_UART0_CTS#/CNV_WCEN
GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#/CNV_WFEN
GPP_D14/ISH_UART0_TXD/I2C2_SCL
GPP_D13/ISH_UART0_RXD/I2C2_SDA
GPP_H20/ISH_I2C0_SCL GPP_H19/ISH_I2C0_SDA
GPP_H22/ISH_I2C1_SCL GPP_H21/ISH_I2C1_SDA
GPP_A23/ISH_GP5 GPP_A22/ISH_GP4 GPP_A21/ISH_GP3 GPP_A20/ISH_GP2 GPP_A19/ISH_GP1
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7
11 OF 13
GPP_A18/ISH_GP0
BOARD_ID0 BOARD_ID1
GPP_K21 GPP_K20
AL13 AR8 AN13 AL10 AL9 AR3 AN40 AT49
AP41 M45
L48 T45 T46 AJ47
GPP_I5/DDPB_CTRLCLK
GPP_I6/DDPB_CTRLDATA
GPP_I7/DDPC_CTRLCLK
GPP_I8/DDPC_CTRLDATA
GPP_I9/DDPD_CTRLCLK
GPP_I10/DDPD_CTRLDATA
GPP_F23/DDPF_CTRLDATA
GPP_F22/DDPF_CTRLCLK
GPP_F14/EXT_PWR_GATE#/PS_ON#
GPP_K23/IMGCLKOUT1 GPP_K22/IMGCLKOUT0
GPP_H23/TIME_SYNC0
5 OF 13
NV GSYNG STRAP
3
TBT_FORCE_PWR_R
BA20
BOARD_ID0
BB20
BOARD_ID1
BB16
BOARD_ID2
AN18
BOARD_ID3
BF14
BOARD_ID4
AR18
BOARD_ID5
BF17
BOARD_ID6
BE17
AG45
Add R1219 for intel#571006 10/18
AH46
AH47
GPP_H21
AH48
AV34 AW32 BA33 BE34 BD34 BF35 BD38
0 0
1 0
0
DDPB_CLK DDPB_DATA DDPC_CLK DDPC_DATA DDPD_CLK DDPD_DATA
GPP_K21
R895 10K_1%_4
BOARD_ID7 BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID11 BOARD_ID12 BOARD_ID13
OD_EN
NC
NC
11
NC
1
Reserve Reserve Reserve Reserve
Modify 8/10
R941 *short_0402
R547 *short_0402
+3V
TBT_FORCE_PWR [38] BOARD_ID0 [32] BOARD_ID1 [32]
LCD_OD_EN# [32]
GPP_H21 = XTAL Frequency Select
RESERVED
PWM pin
NSVR pin
Reserve
Reserve
NC
Y
Y
NC
TP95 TP100
SKTOCC_N_R [2]
BOOT SELECT STRAP
HIGH:LPC
LOW: SPI. (Default)
S_GPIO
+3V_DEEP_SUS[2,9,10,11,12,14,16,39]
Support panel
Reserve
NSVR
DD/Normal
+3V_DEEP_SUS
R1105 *4.7K_1%_4
R1104 *20K_1%_4
2
Modify 8/10
NO REBOOT IF SAMPLED HIGH
HIGH:TOP SWAP ENABLED (CRB)
LOW: Disable "No Reboot" mode. (Default)
+3V
BBS_BIT1
I2C0_SCL I2C0_SDA I2C1_SCL I2C1_SDA
GPP_C11 UART2_CTS#
UART2_RTS# UART2_TXD UART2_RXD
change R331 to 2.2K and stuff it for TBT HPD 11/29
DDPC_CLK DDPC_DATA DDPB_CLK DDPB_DATA DDPD_CLK DDPD_DATA SKTOCC_N_R
R1058 *100K_1%_4 R1052 *100K_1%_4 R970 *10K_1%_4 R487 *10K_1%_4 R1045 10K_1%_2 R548 i7@10K_1%_4 R497 iTPM@10K_1%_4 R1041 *NVL@10K_1%_4 R1051 N-Tobii@10K_1%_4 R1050 *N-Macro@10K_1%_4 R539 *10K_1%_4 R1124 *Max-Q@10K_1%_4 R578 *N-GS@10K_1%_4 R545 *OP@10K_1%_4
R451 2.2K_5%_4 R438 2.2K_5%_4 R1057 2.2K_5%_4 R483 2.2K_5%_4
R1059 100K_1%_4 R1048 *49.9K_1%_4
R1099 2.2K_5%_4 R484 *49.9K_1%_4 R1008 *49.9K_1%_4
R862 *10K_1%_4 R880 *10K_1%_4 R874 *10K_1%_4 R893 *10K_1%_4 R888 *10K_1%_4 R902 *10K_1%_4 R900 *100K_1%_4
BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4 BOARD_ID5 BOARD_ID6 BOARD_ID7 BOARD_ID8 BOARD_ID9 BOARD_ID10 BOARD_ID11 BOARD_ID12 BOARD_ID13
RESERVED
This strap should sample LOW. There should NOT be any on-board device driving it to opposite direction during strap sampling.
Intel ME STRAP
R546
4.7K_1%_4
R536 *20K_1%_4
1
+3V_DEEP_SUS
+3V
modify 8/8
R1106 10K_1%_4 R1091 10K_1%_4 R991 SUB@10K_1%_4 R544 10K_1%_4 R1090 *10K_1%_2 R554 *i9@10K_1%_4 R549 *dTPM@10K_1%_4 R1102 VL@10K_1%_4 R1101 *Tobii@10K_1%_4 R1100 Macro@10K_1%_4 R580 10K_1%_4 R1125 Max-P@10K_1%_4 R581 GS@10K_1%_4 R616 DIS@10K_1%_4
GPP_K21
13
+3V_DEEP_SUS
+3V_DEEP_SUS
R856 *100K_1%_4
R852 *20K_1%_4
RESERVED
R781
5
1M_1%_4
2
Q70A PJX138K
Q70B PJX138K
DP_HPD_PCH_R
R798 1M_1%_4
HDMI_HPD_PCH_R
DP_HPD_PCH[23,33]
R789 *100K_1%_4
A A
update BOM 10/20
HDMI_HPD_PCH[23,35]
R783 *100K_1%_4
3 4
+3V
6 1
5
ID.NO
BOARD_ID11
BOARD_ID12
BOARD_ID13
Function
PCB
VGA
4
Low
MAXQ
Non-GS
Optimus
Pin Name
GPP_B18 (GSPI0_MOSI)
GPP_B22 (GSPI1_MOSI)
High
ID.NO
MAXP
GSG-SYNC
d-VGA
BOARD_ID8
BOARD_ID9
BOARD_ID10
Strap description
No reboot
Boot BIOS Strap Bit (BBS)
Function
EYE Trace
Macro Key
Touch Panel
Sampled
PCH_PWROK
PCH_PWROK
Low
NO
NO
YES
Configuration
0 = *Disable No Reboot (iPD 20K)
1 = Enable No Reboot Mode
0 = *SPI (iPD 20K)
3
1 = LPC
High
ID.NO
YES
BOARD_ID4
YES
NO
BOARD_ID6
BOARD_ID7
Function
Keyboard
CPU
TPM
Battery Vin Boost
note
+3V
+3V
Low
Metal
i7
NO
R1126 *1K_1%_4
R1096 *1K_1%_4
2
High High
Plastic
dTPMiTPM
YES
ID.NO
BOARD_ID0
i9
BOARD_ID1BOARD_ID5
BOARD_ID2
BOARD_ID3
Function
LCD Panel
LCD Panel
Sub-Woofer
Power Button
note
GSPI0_MOSI
R1095 *100K_1%_4
GSPI1_MOSI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PCH 5/7 (GPIO)
PCH 5/7 (GPIO)
PCH 5/7 (GPIO)
Low
No Stuff
No Stuff
No
Metal
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZGE
ZGE
ZGE
Default
Default
YES
Plastic
13 78Friday, May 03, 2019
13 78Friday, May 03, 2019
13 78Friday, May 03, 2019
1A
1A
1A
Page 14
5
4
3
2
1
14
+1V_S5
D D
22u/6.3V_6
C789 1u/6.3V_4
C817 1u/6.3V_4
EMI RESERVE
+VCCDUSB
EC9 *10P/50V/C0G_4
*short_0603 *short_0603
*short_0603
*short_0603
*short_0603
*short_0603
+VCCDUSB
+VCCDSW_1.05V
C797 1u/6.3V_4
+VCCPRIM_MPHY
C198 0.1u/10V_2 C205 1u/6.3V_4
+VCCAMPHYPLL
C196 22u/6.3V_6 C195 22u/6.3V_6
+VCCA_XTAL
C786 22u/6.3V_6 C793 22u/6.3V_6
+VCCAPLL_1
C163 1u/6.3V_4
+VCCA_BCLK
C787 1u/6.3V_4
+VCCAPLL_2
C162 1u/6.3V_4
EC4 *10P/50V/C0G_4
+1V_S5
C C
+1V_S5 +1V_S5
+1V_S5
+1V_S5
+1V_S5
+1V_S5
+1V_S5
R872 *short_0402 R531 *0_5%_4
C452 1u/6.3V_4
R868 R177
R192 *short_0805 C192 1u/6.3V_4
R833
R172
R838
R159
Modify 8/10
B B
+3V_DEEP_SUS
EMI RESERVE EMI RESERVE
+VCCAPLL_1 +VCCAPLL_2
EC3 *10P/50V/C0G_4
U14H
AA22
VCCPRIM_1P051
AA23
VCCPRIM_1P052
AB20
VCCPRIM_1P053
AB22
VCCPRIM_1P054
AB23
VCCPRIM_1P055
AB27
VCCPRIM_1P056
AB28
VCCPRIM_1P057
AB30
VCCPRIM_1P058
AD20
VCCPRIM_1P059
AD23
VCCPRIM_1P0510
AD27
VCCPRIM_1P0511
AD28
VCCPRIM_1P0512
AD30
VCCPRIM_1P0513
AF23
VCCPRIM_1P0516
AF27
VCCPRIM_1P0517
AF30
VCCPRIM_1P0518
U26
VCCPRIM_1P0523
U29
VCCPRIM_1P0524
V25
VCCPRIM_1P0525
V27
VCCPRIM_1P0526
V28
VCCPRIM_1P0527
V30
VCCPRIM_1P0528
V31
VCCPRIM_1P0529
AD31
VCCPRIM_1P0514
AE17
VCCPRIM_1P0515
W22
VCCDUSB_1P051
W23
VCCDUSB_1P052
BG45
VCCDSW_1P051
BG46
VCCDSW_1P052
W31
VCCPRIM_MPHY_1P05
D1
VCCPRIM_1P0521
E1
VCCPRIM_1P0522
C49
VCCAMPHYPLL_1P051
D49
VCCAMPHYPLL_1P052
E49
VCCAMPHYPLL_1P053
P2
VCCA_XTAL_1P051
P3
VCCA_XTAL_1P052
W19
VCCA_SRC_1P051
W20
VCCA_SRC_1P052
C1
VCCAPLL_1P054
C2
VCCAPLL_1P055
V19
VCCA_BCLK_1P05
B1
VCCAPLL_1P051
B2
VCCAPLL_1P052
B3
VCCAPLL_1P053
PCH_CFL-H_874P
+1.2VSUS
8 OF 13
+3VPCU
VCCPRIM_3P32
DCPRTC1 DCPRTC2
VCCPRIM_3P35
VCCSPI
VCCRTC1 VCCRTC2
VCCPGPPG_3P3
VCCPRIM_3P33 VCCPRIM_3P34
VCCPGPPHK1 VCCPGPPHK2 VCCPGPPEF1 VCCPGPPEF2
VCCPGPPD VCCPGPPBC1 VCCPGPPBC2
VCCPGPPA
VCCPRIM_3P31 VCCDSW_3P31
VCCDSW_3P32
VCCHDA
VCCPRIM_1P83 VCCPRIM_1P84 VCCPRIM_1P85 VCCPRIM_1P86 VCCPRIM_1P87
VCCPRIM_1P81 VCCPRIM_1P82
VCCPRIM_1P0520 VCCPRIM_1P0519
VCCPRIM_1P241 VCCPRIM_1P242
VCCDPHY_1P241 VCCDPHY_1P242 VCCDPHY_1P243
VCCMPHY_SENSE
VSSMPHY_SENSE
AW9 BF47
BG47 V23 AN44 BC49
BD49 AN21 AY8
BB7 AC35
AC36 AE35 AE36
AN24 AN26 AP26
AN32 AT44 BE48
BE49 BB14 AG19
AG20 AN15 AR15 BB11
AF19 AF20
AG31 AF31
AK22 AK23
AJ22 AJ23 BG5
K47 K46
+1V_S5
DCPRTC
C445 0.1u/16V_4 C436 0.1u/16V_4C808
+3V_VCCSPI
R908 *short_0402
C431 0.1u/16V_4 C433 0.1u/16V_4 C432 1u/6.3V_4 C438 0.1u/16V_4
C818 4.7u/6.3V_4
+VCCPGPPA
R508 *short_0402
+V3.3DX_ADO
C450 0.1u/16V_4
R977 BLM15GG471SN1D
C867 0.1u/16V_4
C838 0.1u/16V_4 C852 4.7u/6.3V_4
VCCPHVLDO_1P8
+VCCDPHY
VCCMPHY_SENSE VSSMPHY_SENSE
R808 *CNVI@0_5%_6
C826 1u/6.3V_4 C887 4.7u/6.3V_4
+3V_DEEP_SUS
Modify 8/10
+3V_DEEP_SUS
12
R894 *short_0402 C813 1u/6.3V_4
Unstaff
+3V_DEEP_SUS
+3V_DEEP_SUS
+3V_RTC
10mils
eSPI/GPPA Power rail
+1.8V_DEEP_SUS
Need stuff R322 9/12
TP27 TP26
+VCCPGPPA
+3V_DEEP_SUS
+3V_DEEP_SUS
+1V_S5
+1.2VSUS
+VCCPGPPA
R922 *0_5%_6 R906 *short_0603
C833
0.1u/16V_4
Internal LDO Output
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS
+VCCAPLL_1
+VCCAPLL_2
+VCCPRIM_MPHY
+VCCAMPHYPLL
+3V_DEEP_SUS
C206
0.1u/10V_2
C801
0.1u/10V_2
C158
0.1u/10V_2
C166
0.1u/10V_2
C845 1u/6.3V_4
A A
+3V_DEEP_SUS[2,9,10,11,12,13,16,39]
5
C846
0.1u/16V_4
+1.8V_S5 +1.8V_DEEP_SUS
C814
0.1u/16V_4
External VR
R932 *0_5%_6
4
C798
0.1u/16V_4
C836
0.1u/16V_4
C851 *0.1u/10V_2
C832
0.1u/16V_4
+3V_S5 +3V_DEEP_SUS
R1025 R1026
C131
0.1u/16V_4
*short_0603 *short_0603
C927
0.1u/16V_4
3
C870
0.1u/10V_2
C790
4.7u/6.3V_4
C811
0.1u/16V_4
C820
0.1u/16V_4
2
C819 10u/6.3V_4
C821 10u/6.3V_4
C810
4.7u/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C791 1u/6.3V_4
C802
2.2u/10V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
PCH 6/7 (POWER)
PCH 6/7 (POWER)
PCH 6/7 (POWER)
ZGE
ZGE
ZGE
1
14 78Friday, May 03, 2019
14 78Friday, May 03, 2019
14 78Friday, May 03, 2019
1A
1A
1A
Page 15
5
4
3
2
1
15
D D
U14I
A2
VSS_1
A28
VSS_2
A3
VSS_3
A33
VSS_4
A37
VSS_5
A4
VSS_6
A45
VSS_7
A46
VSS_8
A47
VSS_9
A48
VSS_10
A5
VSS_11
A8
VSS_12
AA19
VSS_13
AA20
VSS_14
AA25
VSS_15
AA27
VSS_16
AA28
VSS_17
AA30
VSS_18
AA31
VSS_19
AA49
VSS_20
AA5
VSS_21
AB19
C C
B B
AB25 AB31 AC12 AC17 AC33 AC38
AC4
AC46
AD1
AD19
AD2 AD22 AD25 AD49 AE12 AE33 AE38
AE4
AE46
AF22 AF25 AF28
AG1 AG22 AG23 AG25 AG27 AG28 AG30 AG49 AH12 AH17 AH33 AH38
AJ19 AJ20 AJ25 AJ27 AJ28 AJ30
AJ31 AK19 AK20 AK25 AK27 AK28 AK30 AK31
AK4
AK46
PCH_CFL-H_874P
VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72
9 OF 13
VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98
VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144
AL12 AL17 AL21 AL24 AL26 AL29 AL33 AL38 AM1 AM18 AM32 AM49 AN12 AN16 AN34 AN38 AP4 AP46 AR12 AR16 AR34 AR38 AT1 AT16 AT18 AT21 AT24 AT26 AT29 AT32 AT34 AT45 AV11 AV39 AW10 AW4 AW40 AW46 B47 B48 B49 BA12 BA14 BA44 BA5 BA6 BB41 BB43 BB9 BC10 BC13 BC15 BC19 BC24 BC26 BC31 BC35 BC40 BC45 BC8 BD43 BE44 BF1 BF2 BF3 BF48 BF49 BG17 BG2 BG22 BG25 BG28
BG33 BG37
BG48
BG3
BG4
G44
M16 M18 M21
C12 C25 C30
C4
C48
C5 D12 D16 D17 D30 D33
D8 E10 E13 E15 E17 E19 E22 E24 E26 E31 E33 E35 E40 E42
E8 F41 F43 F47
G6
H8
J10 J26 J29
J4 J40 J46 J47 J48
J9
K11 K39
U14L
VSS_196
VSS_145
VSS_197
VSS_146 VSS_147
VSS_198
VSS_148
VSS_199
VSS_149
VSS_200
VSS_150
VSS_201 VSS_202
VSS_151
VSS_203
VSS_152
VSS_204
VSS_153
VSS_205
VSS_154
VSS_206
VSS_155
VSS_207
VSS_156
VSS_208
VSS_157 VSS_158
VSS_209
VSS_159
VSS_210
VSS_160
VSS_211
VSS_161
VSS_212 VSS_213
VSS_162
VSS_214
VSS_163
VSS_215
VSS_164
VSS_216
VSS_165
VSS_217
VSS_166
VSS_218
VSS_167
VSS_219
VSS_168 VSS_169
VSS_220
VSS_170
VSS_221
VSS_171
VSS_222
VSS_172
VSS_223 VSS_224
VSS_173
VSS_225
VSS_174
VSS_226
VSS_175
VSS_227
VSS_176
VSS_228
VSS_177
VSS_229
VSS_178
VSS_230
VSS_179 VSS_180
VSS_231
VSS_181
VSS_232
VSS_182
VSS_233
VSS_183
VSS_234 VSS_235
VSS_184
VSS_236
VSS_185
VSS_237
VSS_186
VSS_238
VSS_187
VSS_239
VSS_188
VSS_240
VSS_189 VSS_190
VSS_241
VSS_191
VSS_242
VSS_192
VSS_243
VSS_193
VSS_244
VSS_194
VSS_245 VSS_246
VSS_195
12 OF 13
PCH_CFL-H_874P
M24 M32 M34 M49 M5 N12 N16 N34 N35 N37 N38 P26 P29 P4 P46 R12 R16 R26 R29 R3 R34 R38 R4 T17 T18 T32 T4 T49 T5 T7 U12 U15 U17 U21 U24 U33 U38 V20 V22 V4 V46 W25 W27 W28 W30 Y10 Y12 Y17 Y33 Y38 Y9
U14J
RSVD#Y14 RSVD#Y15
RSVD#U37 RSVD#U35
RSVD#N32 RSVD#R32
RSVD#AH15 RSVD#AH14
10 OF 13
PREQ# PRDY#
CPU_TRST#
TRIGGER_OUT
TRIGGER_IN
PCH_CFL-H_874P
Y14
PGDMON
Y15 U37
U35 N32
R32 AH15
AH14
H_PREQ#_L
AL2
H_PRDY#_L
AM5
H_TRST#_L
AM4
PCH_2_CPU_TRIG_R
AK3
CPU_2_PCH_TRIG
AK2
R867 *1K_1%_4
R233 *short_0402 R234 *short_0402 R346 *short_0402 R232 *short_0402
H_PRDY#_L H_TRST#_L
H_PREQ# [2] H_PRDY# [2]
H_TRST# [2] PCH_2_CPU_TRIG [8] CPU_2_PCH_TRIG [8]
R345 *51_5%_4 R364 *51_5%_4
CRB is 30 ohme check it
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
PCH 7/7 (GND)
PCH 7/7 (GND)
PCH 7/7 (GND)
ZGE
ZGE
ZGE
1A
1A
15 78Friday, May 03, 2019
15 78Friday, May 03, 2019
1
15 78Friday, May 03, 2019
1A
Page 16
5
4
3
2
1
16
D D
APS
+3VPCU+3V_DEEP_SUS
EMI RESERVE
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
XDP_DBRESET#
13
13
14
14
15
15
16
16 19 20
*APS CONN
17
17
18
18
C C
B B
19 20
EC12*10p/50V_4CN5
SUSB# [10,57] SLP_S5# [10]
SUSC# [10,57] SLP_A# [10]
RTC_RST# [10] NBSWON# [57,59] XDP_DBRESET# [10] PCH_SLP_S0ix# [10,49]
+3V_DEEP_SUS [2,9,10,11,12,13,14,39] +3VPCU [9,10,12,14,32,37,39,40,47,54,57,59,61,62,68,70,75]
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
XDP & APS
XDP & APS
XDP & APS
1
ZGE
ZGE
ZGE
1A
1A
1A
16 78Friday, May 03, 2019
16 78Friday, May 03, 2019
16 78Friday, May 03, 2019
Page 17
5
4
3
2
1
17
D D
+1.2VSUS
PM_THRMTRIP#
C C
B B
A A
R333 *1K_1%_4
SWAP Pin 8/3
A-DIMM0 SA0=0;SA1=0;SA2=0
R330 *0_5%_4
CHA_DIMM0_SA2 CHA_DIMM0_SA0
R329 *short_0402
R332
+3V
CHA_DIMM0_SA1
DIMM0_CHA_EVENT_NPM_THRMTRIP#
R323
*0_5%_4
R317 *short_0402
240_1%_4
M_A_A[16:0][4,19]
DDRA_ACT#[4,19] DDR0_PAR[4,19]
DDR0_ALERT#[4,19]
DDR_DRAMRST#[10,18,19,20]
M_A_BS#0[4,19] M_A_BS#1[4,19]
M_A_BG#0[4,19] M_A_BG#1[4,19]
M_A_CS#0[4] M_A_CS#1[4] M_A_CKE0[4] M_A_CKE1[4]
M_A_DIM0_CLKP0[4] M_A_DIM0_CLKN0[4] M_A_DIM0_CLKP1[4] M_A_DIM0_CLKN1[4]
M_A_ODT0[4] M_A_ODT1[4]
PCH_SMBCLK[10,18,19,20] PCH_SMBDATA[10,18,19,20]
M_A_CB0[4,19] M_A_CB4[4,19] M_A_CB2[4,19] M_A_CB7[4,19] M_A_CB1[4,19] M_A_CB5[4,19] M_A_CB3[4,19] M_A_CB6[4,19]
R325 *0_5%_4
R324 *short_0402
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_A16
DIMM0_CHA_EVENT_N
C284 *0.1u/16V_4
PCH_SMBCLK PCH_SMBDATA
CHA_DIMM0_SA0 CHA_DIMM0_SA1 CHA_DIMM0_SA2
M_A_CB0 M_A_CB4 M_A_CB2 M_A_CB7 M_A_CB1 M_A_CB5 M_A_CB3 M_A_CB6
+1.2VSUS
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR3-DIMM0_H=9.2_RVS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
+1.2VSUS
7 20 21 4 3 16 17
M_A_DQ8
28
M_A_DQ12
29
M_A_DQ11
41
M_A_DQ14
42
M_A_DQ9
24
M_A_DQ13
25
M_A_DQ15
38
M_A_DQ10
37 50 49 62 63 46 45 58 59
M_A_DQ25
70
M_A_DQ28
71
M_A_DQ30
83
M_A_DQ27
84
M_A_DQ24
66
M_A_DQ29
67
M_A_DQ31
79
M_A_DQ26
80 174 173 187 186 170 169 183 182
M_A_DQ45
195
M_A_DQ44
194
M_A_DQ46
207
M_A_DQ42
208
M_A_DQ40
191
M_A_DQ41
190
M_A_DQ47
203
M_A_DQ43
204 216 215 228 229 211 212 224 225
M_A_DQ56
237
M_A_DQ61
236
M_A_DQ63
249
M_A_DQ62
250
M_A_DQ57
232
M_A_DQ60
233
M_A_DQ59
245
M_A_DQ58
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
M_A_DQSP8
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
M_A_DQSN8
95
R793 1K_1%_4
SMDDR_VREF_CA[4]
M_A_DQ0 M_A_DQ2 M_A_DQ7 M_A_DQ5 M_A_DQ3 M_A_DQ1 M_A_DQ6
M_A_DQ17 M_A_DQ21 M_A_DQ19 M_A_DQ23 M_A_DQ16 M_A_DQ20 M_A_DQ18 M_A_DQ22
M_A_DQ32 M_A_DQ37 M_A_DQ34 M_A_DQ39 M_A_DQ33 M_A_DQ36 M_A_DQ35 M_A_DQ38
M_A_DQ51 M_A_DQ50 M_A_DQ53 M_A_DQ49 M_A_DQ52 M_A_DQ54 M_A_DQ55 M_A_DQ48
0.1u/16V_4
+SMDDR_VREF_CHA_DIMM0_R
C729
M_A_DQ4
8
M_A_DQ[63:0] [4,19]
SWAP Pin 8/3
M_A_DQSP[8:0] [4,19]
M_A_DQSN[8:0] [4,19]
VREF CHA Solution
R778 1K_1%_4
R730 2_1%_6
C694
0.022u/25V_4 R727 24.9_1%_4
+1.2VSUS
2.48A
R771 *short_0402
111 112 117 118 123 124 129 130 135 136 141 142 147 148 153 154 159 160 163
15 19 23 27 31 35 39 43 47 51 57 61 65 69 73 77 81 85 89 93
99 103 107 167 171 175 181 185 189 193 197 201 205 209 213 217 223 227 231 235 239 243 247 251
263 264
C706
0.1u/16V_4
JDIM2B
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19
1
VSS1
5
VSS2
9
VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47
NC#1 NC#2
VREF_CA
(260P)
DDR4 SODIMM 260 PIN
DDR3-DIMM0_H=9.2_RVS
+VREFCA_CHA_DIMM
VDDSPD
VPP1 VPP2
VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94
GND#1 GND#2
VTT
255
257 259
258
+VREFCA_CHA_DIMM
164
2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252
261 262
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHA_DIMM
Place these Caps near So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C115 1u/6.3V_4 C116 1u/6.3V_4 C108 1u/6.3V_4 C130 1u/6.3V_4 C141 1u/6.3V_4 C128 1u/6.3V_4 C129 1u/6.3V_4 C114 1u/6.3V_4
C310 10u/6.3V_6 C309 10u/6.3V_6 C311 10u/6.3V_6 C299 10u/6.3V_6 C298 10u/6.3V_6 C294 10u/6.3V_6 C305 10u/6.3V_6 C308 10u/6.3V_6
Place these Caps near So-Dimm
+VREFCA_CHA_DIMM
C709 0.1u/16V_4 C712 *2.2u/10V_4
+2.5VSUS
C103 *1u/6.3V_4 C102 1u/6.3V_4 C105 10u/6.3V_6 C104 10u/6.3V_6
+3V
C121 0.1u/16V_4 C120 2.2u/10V_4
DDR_VTT
C191 1u/6.3V_4 C844 1u/6.3V_4 C290 10u/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
DDR4 Channel A DIMM0
DDR4 Channel A DIMM0
DDR4 Channel A DIMM0
1
ZGE
ZGE
ZGE
1A
1A
17 78Friday, May 03, 2019
17 78Friday, May 03, 2019
17 78Friday, May 03, 2019
1A
Page 18
5
4
3
2
1
18
M_B_DQ[63:0] [4,20]
SWAP Pin 8/3
M_B_DQSP[8:0] [4,20]
M_B_DQSN[8:0] [4,20]
M_B_ODT0 M_B_ODT1
JDIM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM0_H=5.2_RVS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
M_B_DQ4
7
M_B_DQ2
20
M_B_DQ7
21
M_B_DQ0
4
M_B_DQ5
3
M_B_DQ3
16
M_B_DQ6
17
M_B_DQ8
28
M_B_DQ14
29
M_B_DQ15
41
M_B_DQ12
42
M_B_DQ9
24
M_B_DQ10
25
M_B_DQ13
38
M_B_DQ11
37
M_B_DQ16
50
M_B_DQ22
49
M_B_DQ23
62
M_B_DQ20
63
M_B_DQ17
46
M_B_DQ18
45
M_B_DQ19
58
M_B_DQ21
59
M_B_DQ25
70
M_B_DQ30
71
M_B_DQ24
83
M_B_DQ31
84
M_B_DQ28
66
M_B_DQ27
67
M_B_DQ29
79
M_B_DQ26
80
M_B_DQ39
174
M_B_DQ38
173
M_B_DQ37
187
M_B_DQ32
186
M_B_DQ34
170
M_B_DQ35
169
M_B_DQ33
183
M_B_DQ36
182
M_B_DQ44
195
M_B_DQ41
194
M_B_DQ46
207
M_B_DQ43
208
M_B_DQ45
191
M_B_DQ40
190
M_B_DQ47
203
M_B_DQ42
204
M_B_DQ54
216
M_B_DQ48
215
M_B_DQ50
228
M_B_DQ55
229
M_B_DQ52
211
M_B_DQ51
212
M_B_DQ49
224
M_B_DQ53
225
M_B_DQ57
237
M_B_DQ59
236
M_B_DQ58
249
M_B_DQ56
250
M_B_DQ62
232
M_B_DQ61
233
M_B_DQ63
245
M_B_DQ60
246
M_B_DQSP0
13
M_B_DQSP1
34
M_B_DQSP2
55
M_B_DQSP3
76
M_B_DQSP4
179
M_B_DQSP5
200
M_B_DQSP6
221
M_B_DQSP7
242
M_B_DQSP8
97
M_B_DQSN0
11
M_B_DQSN1
32
M_B_DQSN2
53
M_B_DQSN3
74
M_B_DQSN4
177
M_B_DQSN5
198
M_B_DQSN6
219
M_B_DQSN7
240
M_B_DQSN8
95
M_B_DQ1
8
240_1%_4
R185 *short_0402
M_B_A[16:0][4,20]
DDRB_ACT#[4,20] DDR1_PAR[4,20]
DDR1_ALERT#[4,20]
DDR_DRAMRST#[10,17,19,20]
DIMM0_CHB_EVENT_NPM_THRMTRIP#
M_B_BS#0[4,20] M_B_BS#1[4,20]
M_B_BG#0[4,20] M_B_BG#1[4,20]
M_B_CS#0[4] M_B_CS#1[4] M_B_CKE0[4] M_B_CKE1[4]
M_B_DIM0_CLKP0[4] M_B_DIM0_CLKN0[4] M_B_DIM0_CLKP1[4] M_B_DIM0_CLKN1[4]
M_B_ODT0[4] M_B_ODT1[4]
PCH_SMBCLK[10,17,19,20] PCH_SMBDATA[10,17,19,20]
M_B_CB1[4,20] M_B_CB6[4,20] M_B_CB5[4,20] M_B_CB0[4,20] M_B_CB4[4,20] M_B_CB2[4,20] M_B_CB3[4,20] M_B_CB7[4,20]
D D
R331
+1.2VSUS
PM_THRMTRIP#
C C
B-DIMM0
B B
SA0=0;SA1=1;SA2=0
R805 *0_5%_4
CHB_DIMM0_SA2 CHB_DIMM0_SA0CHB_DIMM0_SA1
R802 *short_0402
R348 *1K_1%_4
+3V
R199 *short_0402
R198 *0_5%_4
SWAP Pin 8/3
R186 *0_5%_4
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_A16
DIMM0_CHB_EVENT_N
C322 *0.1u/16V_4
PCH_SMBCLK PCH_SMBDATA
CHB_DIMM0_SA0 CHB_DIMM0_SA1 CHB_DIMM0_SA2
M_B_CB1 M_B_CB6 M_B_CB5 M_B_CB0 M_B_CB4 M_B_CB2 M_B_CB3 M_B_CB7
+1.2VSUS
2.48A
+1.2VSUS
+1.2VSUS
R216 1K_1%_4
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR4-DIMM0_H=5.2_RVS
C236
0.1u/16V_4
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
+VREFCA_CHB_DIMM
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
(260P)
94
DDR4 SODIMM 260 PIN
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND#1
262
GND#2
+SMDDR_VREF_CHB_DIMM0_R
R224 1K_1%_4
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHB_DIMM
Place these Caps near So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C137 1u/6.3V_4 C138 1u/6.3V_4 C139 1u/6.3V_4 C110 1u/6.3V_4 C134 1u/6.3V_4 C112 1u/6.3V_4 C117 1u/6.3V_4 C125 1u/6.3V_4 C302 10u/6.3V_6
C301 10u/6.3V_6 C313 10u/6.3V_6
C293 10u/6.3V_6 C315 10u/6.3V_6
C291 10u/6.3V_6 C292 10u/6.3V_6
C314 10u/6.3V_6
+VREFCA_CHB_DIMM +2.5VSUS
Place these Caps near So-Dimm
C210 0.1u/16V_4 C186 *2.2u/10V_6
VREF CHB Solution
R205 *short_0402
DDR_VTT
C281 1u/6.3V_4 C286 1u/6.3V_4 C271 10u/6.3V_6
+3V
C225 0.1u/16V_4 C143 2.2u/10V_4
C766 10u/6.3V_6 C765 10u/6.3V_6 C770 1u/6.3V_4 C761 *1u/6.3V_4
SMDDR_VREF_DQ1_M3[4]
+1.2VSUS [2,6,10,14,17,19,20,46,59,60,64,75]
A A
+2.5VSUS [17,19,20,64]
5
4
3
SMDDR_VREF_DQ1_M3
C151
0.022u/25V_4
R151
24.9_1%_4
R164 2_1%_6
2
+VREFCA_CHB_DIMM
C207
0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
DDR4 Channel B DIMM0
DDR4 Channel B DIMM0
DDR4 Channel B DIMM0
1
ZGE
ZGE
ZGE
18 78Friday, May 03, 2019
18 78Friday, May 03, 2019
18 78Friday, May 03, 2019
1A
1A
1A
Page 19
5
4
3
2
1
19
7/28 change to STD
M_A_A[16:0][4,17]
D D
DDRA_ACT#[4,17] DDR0_PAR[4,17]
DDR0_ALERT#[4,17]
240_1%_4
R717
+1.2VSUS
PM_THRMTRIP# DIMM1_CHA_EVENT_N
PM_THRMTRIP#[2,11,17,18,20,53]
C C
B B
R718 *1K_1%_4
SWAP Pin 8/3
A-DIMM1 SA0=1;SA1=0;SA2=0
R722 *0_5%_4
Modify 8/10
R719 *short_0402
A A
+3V
R314 *0_5%_4
CHA_DIMM1_SA1
R316 *short_0402
DDR_DRAMRST#[10,17,18,20]
M_A_BS#0[4,17] M_A_BS#1[4,17]
M_A_BG#0[4,17] M_A_BG#1[4,17]
M_A_CS#2[4] M_A_CS#3[4] M_A_CKE2[4] M_A_CKE3[4]
M_A_DIM1_CLKP0[4] M_A_DIM1_CLKN0[4] M_A_DIM1_CLKP1[4] M_A_DIM1_CLKN1[4]
M_A_ODT2[4] M_A_ODT3[4]
PCH_SMBCLK[10,17,18,20] PCH_SMBDATA[10,17,18,20]
M_A_CB5[4,17] M_A_CB1[4,17] M_A_CB6[4,17] M_A_CB3[4,17] M_A_CB4[4,17] M_A_CB0[4,17] M_A_CB7[4,17] M_A_CB2[4,17]
R322 *short_0402
CHA_DIMM1_SA0CHA_DIMM1_SA2
R315 *0_5%_4
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_A16
DIMM1_CHA_EVENT_N
C319 *0.1u/16V_4
PCH_SMBCLK PCH_SMBDATA
CHA_DIMM1_SA0 CHA_DIMM1_SA1 CHA_DIMM1_SA2
M_A_CB5 M_A_CB1 M_A_CB6 M_A_CB3 M_A_CB4 M_A_CB0 M_A_CB7 M_A_CB2
+1.2VSUS
JDIM4A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR3-DIMM0_H=4_RVS
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
EZIW
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
M_A_DQ5
7
M_A_DQ6
20
M_A_DQ1
21
M_A_DQ0
4
M_A_DQ4
3
M_A_DQ7
16
M_A_DQ2
17
M_A_DQ13
28
M_A_DQ9
29
M_A_DQ15
41
M_A_DQ10
42
M_A_DQ12
24
M_A_DQ8
25
M_A_DQ11
38
M_A_DQ14
37
M_A_DQ20
50
M_A_DQ16
49
M_A_DQ22
62
M_A_DQ18
63
M_A_DQ21
46
M_A_DQ17
45
M_A_DQ23
58
M_A_DQ19
59
M_A_DQ29
70
M_A_DQ24
71
M_A_DQ26
83
M_A_DQ31
84
M_A_DQ28
66
M_A_DQ25
67
M_A_DQ27
79
M_A_DQ30
80
M_A_DQ36
174
M_A_DQ33
173
M_A_DQ38
187
M_A_DQ35
186
M_A_DQ37
170
M_A_DQ32
169
M_A_DQ39
183
M_A_DQ34
182
M_A_DQ41
195
M_A_DQ40
194
M_A_DQ43
207
M_A_DQ47
208
M_A_DQ44
191
M_A_DQ45
190
M_A_DQ42
203
M_A_DQ46
204
M_A_DQ52
216
M_A_DQ54
215
M_A_DQ48
228
M_A_DQ55
229
M_A_DQ51
211
M_A_DQ50
212
M_A_DQ49
224
M_A_DQ53
225
M_A_DQ57
237
M_A_DQ60
236
M_A_DQ58
249
M_A_DQ59
250
M_A_DQ56
232
M_A_DQ61
233
M_A_DQ62
245
M_A_DQ63
246
M_A_DQSP0
13
M_A_DQSP1
34
M_A_DQSP2
55
M_A_DQSP3
76
M_A_DQSP4
179
M_A_DQSP5
200
M_A_DQSP6
221
M_A_DQSP7
242
M_A_DQSP8
97
M_A_DQSN0
11
M_A_DQSN1
32
M_A_DQSN2
53
M_A_DQSN3
74
M_A_DQSN4
177
M_A_DQSN5
198
M_A_DQSN6
219
M_A_DQSN7
240
M_A_DQSN8
95
M_A_DQ3
8
M_A_DQ[63:0] [4,17]
SWAP Pin 8/3
M_A_DQSP[8:0] [4,17]
M_A_DQSN[8:0] [4,17]
2.48A
+1.2VSUS
JDIM4B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR3-DIMM0_H=4_RVS
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
(260P)
94
DDR4 SODIMM 260 PIN
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND#1
262
GND#2
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHA_DIMM
+VREFCA_CHA_DIMM
Place these Caps near So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C127 1u/6.3V_4 C135 1u/6.3V_4 C142 1u/6.3V_4 C119 1u/6.3V_4 C107 1u/6.3V_4 C126 1u/6.3V_4 C106 1u/6.3V_4 C109 1u/6.3V_4
C690 10u/6.3V_6 C689 10u/6.3V_6 C316 10u/6.3V_6 C691 10u/6.3V_6 C318 10u/6.3V_6 C317 10u/6.3V_6 C95 10u/6.3V_6 C94 10u/6.3V_6
Place these Caps near So-Dimm
+VREFCA_CHA_DIMM
C705 0.1u/16V_4 C702 *2.2u/10V_4
+2.5VSUS
C785 *1u/6.3V_4 C747 1u/6.3V_4 C273 10u/6.3V_6 C274 10u/6.3V_6
+3V
C693 0.1u/16V_4 C692 2.2u/10V_4
DDR_VTT
C700 1u/6.3V_4 C699 1u/6.3V_4 C695 10u/6.3V_6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
DDR4 Channel A DIMM1
DDR4 Channel A DIMM1
DDR4 Channel A DIMM1
1
ZGE
ZGE
ZGE
1A
1A
19 78Friday, May 03, 2019
19 78Friday, May 03, 2019
19 78Friday, May 03, 2019
1A
Page 20
5
4
3
2
1
20
7/28 change RVS
M_B_DQ[63:0] [4,18]
SWAP Pin 8/3
M_B_DQSP[8:0] [4,18]
M_B_DQSN[8:0] [4,18]
M_B_ODT2 M_B_ODT3
JDIM3A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
DDR4-DIMM0_H=4_STD
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49
(260P)
DDR4 SODIMM 260 PIN
DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
M_B_DQ0
7
M_B_DQ6
20
M_B_DQ3
21
M_B_DQ4
4
M_B_DQ1
3
M_B_DQ7
16
M_B_DQ2
17
M_B_DQ10
28
M_B_DQ9
29
M_B_DQ13
41
M_B_DQ11
42
M_B_DQ14
24
M_B_DQ8
25
M_B_DQ15
38
M_B_DQ12
37
M_B_DQ18
50
M_B_DQ17
49
M_B_DQ21
62
M_B_DQ19
63
M_B_DQ22
46
M_B_DQ16
45
M_B_DQ20
58
M_B_DQ23
59
M_B_DQ27
70
M_B_DQ28
71
M_B_DQ26
83
M_B_DQ29
84
M_B_DQ30
66
M_B_DQ25
67
M_B_DQ31
79
M_B_DQ24
80
M_B_DQ35
174
M_B_DQ34
173
M_B_DQ36
187
M_B_DQ33
186
M_B_DQ38
170
M_B_DQ39
169
M_B_DQ32
183
M_B_DQ37
182
M_B_DQ40
195
M_B_DQ45
194
M_B_DQ42
207
M_B_DQ47
208
M_B_DQ41
191
M_B_DQ44
190
M_B_DQ43
203
M_B_DQ46
204
M_B_DQ52
216
M_B_DQ51
215
M_B_DQ53
228
M_B_DQ49
229
M_B_DQ54
211
M_B_DQ48
212
M_B_DQ55
224
M_B_DQ50
225
M_B_DQ62
237
M_B_DQ61
236
M_B_DQ60
249
M_B_DQ63
250
M_B_DQ57
232
M_B_DQ59
233
M_B_DQ56
245
M_B_DQ58
246
M_B_DQSP0
13
M_B_DQSP1
34
M_B_DQSP2
55
M_B_DQSP3
76
M_B_DQSP4
179
M_B_DQSP5
200
M_B_DQSP6
221
M_B_DQSP7
242
M_B_DQSP8
97
M_B_DQSN0
11
M_B_DQSN1
32
M_B_DQSN2
53
M_B_DQSN3
74
M_B_DQSN4
177
M_B_DQSN5
198
M_B_DQSN6
219
M_B_DQSN7
240
M_B_DQSN8
95
M_B_DQ5
8
M_B_A[16:0][4,18]
D D
DDRB_ACT#[4,18] DDR1_PAR[4,18]
240_1%_4
R720
+1.2VSUS
PM_THRMTRIP#[2,11,17,18,19,53]
C C
B B
Modify 9/14
PM_THRMTRIP# DIMM1_CHB_EVENT_N
SWAP Pin 8/3
B-DIMM1 SA0=1;SA1=1;SA2=0
+3V
R724 *0_5%_4
R725 *short_0402
R790 *short_0402
CHB_DIMM1_SA1
R797 *0_5%_4
CHB_DIMM1_SA0CHB_DIMM1_SA2
R770 *0_5%_4
R776 *short_0402
DDR1_ALERT#[4,18]
DDR_DRAMRST#[10,17,18,19]
M_B_BS#0[4,18] M_B_BS#1[4,18]
M_B_BG#0[4,18] M_B_BG#1[4,18]
M_B_CS#2[4] M_B_CS#3[4] M_B_CKE2[4] M_B_CKE3[4]
M_B_DIM1_CLKP0[4] M_B_DIM1_CLKN0[4] M_B_DIM1_CLKP1[4] M_B_DIM1_CLKN1[4]
M_B_ODT2[4] M_B_ODT3[4]
PCH_SMBCLK[10,17,18,19] PCH_SMBDATA[10,17,18,19]
M_B_CB2[4,18] M_B_CB4[4,18] M_B_CB7[4,18] M_B_CB3[4,18] M_B_CB6[4,18] M_B_CB1[4,18] M_B_CB0[4,18] M_B_CB5[4,18]
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_A16
DIMM1_CHB_EVENT_N
C323 *0.1u/16V_4
PCH_SMBCLK PCH_SMBDATA
CHB_DIMM1_SA0 CHB_DIMM1_SA1 CHB_DIMM1_SA2
M_B_CB2 M_B_CB4 M_B_CB7 M_B_CB3 M_B_CB6 M_B_CB1 M_B_CB0 M_B_CB5
+1.2VSUS
2.48A
+1.2VSUS
JDIM3B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
263
NC#1
264
NC#2
DDR4-DIMM0_H=4_STD
255
VDDSPD
257
VPP1
259
VPP2
258
VTT
164
VREF_CA
2
VSS48
6
VSS49
10
VSS50
14
VSS51
18
VSS52
22
VSS53
26
VSS54
30
VSS55
36
VSS56
40
VSS57
44
VSS58
48
VSS59
52
VSS60
56
VSS61
60
VSS62
64
VSS63
68
VSS64
72
VSS65
78
VSS66
82
VSS67
86
VSS68
90
VSS69
(260P)
94
DDR4 SODIMM 260 PIN
VSS70
98
VSS71
102
VSS72
106
VSS73
168
VSS74
172
VSS75
176
VSS76
180
VSS77
184
VSS78
188
VSS79
192
VSS80
196
VSS81
202
VSS82
206
VSS83
210
VSS84
214
VSS85
218
VSS86
222
VSS87
226
VSS88
230
VSS89
234
VSS90
238
VSS91
244
VSS92
248
VSS93
252
VSS94
261
GND#1
262
GND#2
+3V
+2.5VSUS
DDR_VTT
+VREFCA_CHB_DIMM
+VREFCA_CHB_DIMM
Place these Caps near So-Dimm
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C113 1u/6.3V_4 C136 1u/6.3V_4 C111 1u/6.3V_4
C133 1u/6.3V_4 C118 1u/6.3V_4 C124 1u/6.3V_4 C99 1u/6.3V_4 C759 10u/6.3V_6
C306 10u/6.3V_6 C296 10u/6.3V_6
C304 10u/6.3V_6 C300 10u/6.3V_6
C307 10u/6.3V_6 C295 10u/6.3V_6
C297 10u/6.3V_6
Place these Caps near So-Dimm
C175 0.1u/16V_4 C197 *2.2u/10V_6
+2.5VSUS+VREFCA_CHB_DIMM
C255 10u/6.3V_6 C244 10u/6.3V_6 C235 1u/6.3V_4 C229 *1u/6.3V_4
DDR_VTT
C848 1u/6.3V_4 C849 1u/6.3V_4 C837 10u/6.3V_6C132 1u/6.3V_4R721 *1K_1%_4
+3V
C335 0.1u/16V_4 C330 2.2u/10V_4
+1.2VSUS [2,6,10,14,17,18,19,46,59,60,64,75] +2.5VSUS [17,18,19,64]
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
DDR4 Channel B DIMM1
DDR4 Channel B DIMM1
DDR4 Channel B DIMM1
1
ZGE
ZGE
ZGE
1A
1A
20 78Friday, May 03, 2019
20 78Friday, May 03, 2019
20 78Friday, May 03, 2019
1A
Page 21
5
4
3
2
1
DG:1.8V
+1.8V_AON
1108 change MOS for cost down
DGPU_PWROK[23,25]
PCIE_CLKREQ_VGA#[11]
D D
C C
B B
PEG_RXP0[3]
PEG_RXN0[3]
PEG_RXP1[3]
PEG_RXN1[3]
PEG_RXP2[3]
PEG_RXN2[3]
PEG_RXP3[3]
PEG_RXN3[3]
PEG_RXP4[3]
PEG_RXN4[3]
PEG_RXP5[3]
PEG_RXN5[3]
PEG_RXP6[3]
PEG_RXN6[3]
PEG_RXP7[3]
PEG_RXN7[3]
PEG_RXP8[3]
PEG_RXN8[3]
PEG_RXP9[3]
PEG_RXN9[3]
PEG_RXP10[3]
PEG_RXN10[3]
PEG_RXP11[3]
PEG_RXN11[3]
PEG_RXP12[3]
PEG_RXN12[3]
PEG_RXP13[3]
PEG_RXN13[3]
PEG_RXP14[3]
PEG_RXN14[3]
PEG_RXP15[3]
PEG_RXN15[3]
321
QG13 DMG1012T-7
PEG_TXP0[3]
PEG_TXN0[3]
PEG_TXP1[3]
PEG_TXN1[3]
PEG_TXP2[3]
PEG_TXN2[3]
PEG_TXP3[3]
PEG_TXN3[3]
PEG_TXP4[3]
PEG_TXN4[3]
PEG_TXP5[3]
PEG_TXN5[3]
PEG_TXP6[3]
PEG_TXN6[3]
PEG_TXP7[3]
PEG_TXN7[3]
PEG_TXP8[3]
PEG_TXN8[3]
PEG_TXP9[3]
PEG_TXN9[3]
PEG_TXP10[3]
PEG_TXN10[3]
PEG_TXP11[3]
PEG_TXN11[3]
PEG_TXP12[3]
PEG_TXN12[3]
PEG_TXP13[3]
PEG_TXN13[3]
PEG_TXP14[3]
PEG_TXN14[3]
PEG_TXP15[3]
PEG_TXN15[3]
JS-N18-0705 Del
WAKE is not required for NB design
RG70 10K_5%_4
CLK_VGA_P[11]
CLK_VGA_N[11]
CG8910.22u/6.3V_2 CG8900.22u/6.3V_2
CG8970.22u/6.3V_2 CG8980.22u/6.3V_2
CG8890.22u/6.3V_2 CG8880.22u/6.3V_2
CG8950.22u/6.3V_2
CG8870.22u/6.3V_2 CG8860.22u/6.3V_2
CG8850.22u/6.3V_2 CG8840.22u/6.3V_2
CG8830.22u/6.3V_2 CG8920.22u/6.3V_2
CG8820.22u/6.3V_2 CG8940.22u/6.3V_2
CG8810.22u/6.3V_2 CG8800.22u/6.3V_2
CG8790.22u/6.3V_2 CG8780.22u/6.3V_2
CG8700.22u/6.3V_2 CG8670.22u/6.3V_2
CG8760.22u/6.3V_2 CG8750.22u/6.3V_2
CG8740.22u/6.3V_2 CG8730.22u/6.3V_2
CG8720.22u/6.3V_2 CG8710.22u/6.3V_2
CG8770.22u/6.3V_2 CG8680.22u/6.3V_2
CG8660.22u/6.3V_2 CG8630.22u/6.3V_2
PEGX_RST# PEX_CLKREQ
PEG_RXP0_C PEG_RXN0_C
PEG_RXP1_C PEG_RXN1_C
PEG_RXP2_C PEG_RXN2_C
PEG_RXP3_C PEG_RXN3_C
PEG_RXP4_C PEG_RXN4_C
PEG_RXP5_C PEG_RXN5_C
PEG_RXP6_C PEG_RXN6_C
PEG_RXP7_C PEG_RXN7_C
PEG_RXP8_C PEG_RXN8_C
PEG_RXP9_C PEG_RXN9_C
PEG_RXP10_C PEG_RXN10_C
PEG_RXP11_C PEG_RXN11_C
PEG_RXP12_C PEG_RXN12_C
PEG_RXP13_C PEG_RXN13_C
PEG_RXP14_C PEG_RXN14_C
PEG_RXP15_C PEG_RXN15_C
N17_GPU RST#
+1.8V_AON
A A
DGPU_HOLD_RST#[13]
Cb
PLTRST#[12,41,49,50,51,52,57,59]
Rg
RG181
1107 Del SYS_PEX_RST_MON#
*short_0402
CG8930.1u/16V_4
Ub
1
4
2
UG7
3 5
NL17SZ08DFT2G
5
Rf
RG182 *short_0402
RG177 100K_5%_4
BK44 BK26 BL26
BM26 BM27
BG26 BH26
BL27 BK27
BF26 BE26
BK29 BL29
BF27 BG27
BM29 BM30
BG29 BH29
BL30 BK30
BF29 BE29
BK32 BL32
BF30 BG30
BM32 BM33
BG32 BH32
BL33 BK33
BF32 BE32
BK35 BL35
BF33 BG33
BM35 BM36
BG35 BH35
BL36 BK36
BF35 BE35
BK38 BL38
BF36 BG36
BM38 BM39
BG38 BH38
BL39 BK39
BF38 BE38
BK41 BL41
BF39 BG39
BM41 BM42
BH41 BG41
BL42 BK42
PEGX_RST#
UG1A
1/22 PCI_EXPRESS
PEX_WAKE
PEX_RST
PEX_CLKREQ
PEX_REFCLK PEX_REFCLK
PEX_TX0 PEX_TX0
PEX_RX0 PEX_RX0
PEX_TX1 PEX_TX1
PEX_RX1 PEX_RX1
PEX_TX2 PEX_TX2
PEX_RX2 PEX_RX2
PEX_TX3 PEX_TX3
PEX_RX3 PEX_RX3
PEX_TX4 PEX_TX4
PEX_RX4 PEX_RX4
PEX_TX5 PEX_TX5
PEX_RX5 PEX_RX5
PEX_TX6 PEX_TX6
PEX_RX6 PEX_RX6
PEX_TX7 PEX_TX7
PEX_RX7 PEX_RX7
PEX_TX8 PEX_TX8
PEX_RX8 PEX_RX8
PEX_TX9 PEX_TX9
PEX_RX9 PEX_RX9
PEX_TX10 PEX_TX10
PEX_RX10 PEX_RX10
PEX_TX11 PEX_TX11
PEX_RX11 PEX_RX11
PEX_TX12 PEX_TX12
PEX_RX12 PEX_RX12
PEX_TX13 PEX_TX13
PEX_RX13 PEX_RX13
PEX_TX14 PEX_TX14
PEX_RX14 PEX_RX14
PEX_TX15 PEX_TX15
PEX_RX15 PEX_RX15
N18E-G3-ES-A1
PEGX_RST# [23,25]
0812 add intersheet
BB35
PEX_DVDD
BB36
PEX_DVDD
BC35
PEX_DVDD
BC36
PEX_DVDD
BD33
PEX_DVDD
BD36
PEX_DVDD
BB33
PEX_CVDD
BC33
PEX_CVDD
1.8V
+1.8V_MAIN
BB26
PEX_HVDD
BB27
PEX_HVDD
BB29
PEX_HVDD
BB32
PEX_HVDD
BC26
PEX_HVDD
BC27
PEX_HVDD
BC29
PEX_HVDD
BC30
PEX_HVDD
BC32
PEX_HVDD
BD27
PEX_HVDD
BD30
PEX_HVDD
BB30
PEX_PLL_HVDD
PEX_TERMP
BL44
PEX_TERMP
1/22
4
Under GPU
1.0V
+1V_GFX
JS-N18
0.47*16 4.7*3 22*2 10*3
CG8280.47u/6.3V_2 CG7970.47u/6.3V_2 CG6110u/6.3V_6 CG8250.47u/6.3V_2 CG8440.47u/6.3V_2 CG8260.47u/6.3V_2 CG8090.47u/6.3V_2 CG7890.47u/6.3V_2 CG8270.47u/6.3V_2
HVDD+PLL_HVDD
0.47*10 4.7*3
CG7800.47u/6.3V_2 CG7840.47u/6.3V_2 CG7820.47u/6.3V_2 CG8500.47u/6.3V_2 CG8460.47u/6.3V_2 CG8550.47u/6.3V_2 CG8510.47u/6.3V_2 CG8480.47u/6.3V_2 CG7860.47u/6.3V_2 CG7880.47u/6.3V_2CG8960.22u/6.3V_2
CG8240.47u/6.3V_2 CG8310.47u/6.3V_2 CG8410.47u/6.3V_2 CG8360.47u/6.3V_2 CG8000.47u/6.3V_2 CG8300.47u/6.3V_2 CG8290.47u/6.3V_2 CG7850.47u/6.3V_2 CG534.7u/6.3V _6 CG484.7u/6.3V _6 CG524.7u/6.3V _6
CG364.7u/6.3V_6 CG394.7u/6.3V_6
JS-N18-0709 change 0.47U/25V_4 to 0.47u/6.3V_2
PEX_PLL_HVDD
JS-N18
RG36 2.49 K_1%_4
CG7830.47u/6.3V_2 CG7810.47u/6.3V_2 CG8374.7u/6.3V_6
RG141 *s hort_0402
+1.8V_MAIN
3
Place between GPU and PS
CG6222u/6.3V_6 CG6022u/6.3V_6
22*2 10*3
CG6410u/6.3V_6 CG5010u/6.3V_6
VMA_DQ[63:0][27]
CG83222u/6.3V_6 CG4022u/6.3V_6 CG4110u/6.3V_6 CG3710u/6.3V_6 CG4210u/6.3V_6
FBA_DBI[7:0][27]
FBA_EDC[7:0][27]
1.8V
JS-N18
VMA_DQ[63:0]
CG407
0.47u/6.3V_2
VMA_DQ0 VMA_DQ1 VMA_DQ2 VMA_DQ3 VMA_DQ4 VMA_DQ5 VMA_DQ6 VMA_DQ7 VMA_DQ8 VMA_DQ9 VMA_DQ10 VMA_DQ11 VMA_DQ12 VMA_DQ13 VMA_DQ14 VMA_DQ15 VMA_DQ16 VMA_DQ17 VMA_DQ18 VMA_DQ19 VMA_DQ20 VMA_DQ21 VMA_DQ22 VMA_DQ23 VMA_DQ24 VMA_DQ25 VMA_DQ26 VMA_DQ27 VMA_DQ28 VMA_DQ29 VMA_DQ30 VMA_DQ31 VMA_DQ32 VMA_DQ33 VMA_DQ34 VMA_DQ35 VMA_DQ36 VMA_DQ37 VMA_DQ38 VMA_DQ39 VMA_DQ40 VMA_DQ41 VMA_DQ42 VMA_DQ43 VMA_DQ44 VMA_DQ45 VMA_DQ46 VMA_DQ47 VMA_DQ48 VMA_DQ49 VMA_DQ50 VMA_DQ51 VMA_DQ52 VMA_DQ53 VMA_DQ54 VMA_DQ55 VMA_DQ56 VMA_DQ57 VMA_DQ58 VMA_DQ59 VMA_DQ60 VMA_DQ61 VMA_DQ62 VMA_DQ63
FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7
FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7
FBA_PLL_AVDD
CG414
0.47u/6.3V_2
AG48 AG49
AD47 AD49 AD48 AC46 AC47 AA47 AA46 AA45
AW51
BA52
AW50
BA51 BA50 BB50 BA49
AW49
AV48
AV51 AV52 AV49
AK49 AM47 AM46 AN48 AN49 AM44 AM45 AN45 AN46 AR48 AN47 AR47 AR46
AG47 AC48 BB51 AV50 AM48 AR49
AA48 BB52
AK48 AR51
U51 U48 U50 U49 R51 R50 R47 U46 V46 Y45 Y47 Y46 V50 V47 U52 V51
AJ44 AJ45 AF46
AF47 AF48
Y44
AT49 AT47 AT48 AT46
AJ48 AJ46 AJ47
U47 Y48
R48 V48
AF44
AT50
W45 W47 W49 W51
W6
W8 Y14 Y15
AF42
L29
UG1B
2/22 FBA
FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63
FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7
FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7
GND GND GND GND GND GND GND GND
FB_REFPLL_AVDD0 FB_REFPLL_AVDD1
N18E-G3-ES-A1
2
21
FBA_CMD0
Y51
FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33 FBA_CMD34 FBA_CMD35
FBA_DBG_RFU1 FBA_DBG_RFU2
FBA_CLK0 FBA_CLK0 FBA_CLK1 FBA_CLK1
FBA_WCK01 FBA_WCK01
FBA_WCKB01 FBA_WCKB01
FBA_WCK23 FBA_WCK23
FBA_WCKB23 FBA_WCKB23
FBA_WCK45 FBA_WCK45
FBA_WCKB45 FBA_WCKB45
FBA_WCK67 FBA_WCK67
FBA_WCKB67 FBA_WCKB67
FBA_PLL_AVDD
2/22
Y52 Y49 AA52 AA51 AA50 AC50 AC51 AC52 AC49 AD52 AD51 AD50 AF50 AF51 AF52 AN50 AN51 AN52 AM49 AM52 AM51 AM50 AK50 AK51 AK52 AJ49 AJ52 AJ51 AJ50 AG50 AG51 AF49 AG52 Y50 AR50
AA44 AN44
AG45 AG46 AK46 AK45
U45 U44 V45 V44 AC45 AC44 AD46 AD45 AV47 AV46 AW48 AW47 AR45 AR44 AT45 AT44
AN42
FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8
FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_CMD32 FBA_CMD33 FBA_DEBUG0 FBA_DEBUG1
FBA_PLL_AVDD
FBA_CMD[33:0] [27]
FBVDDQ_MEMFBVDDQ_MEM
RG122
RG105
10K_4
10K_4
FBA_CMD10 FBA_CMD26
FBA_CMD2 FBA_CMD18
JS-N18
RG142
RG102
10K_4
10K_4
close to VRAM
TPG52 TPG66
VMA_CLK0 [27] VMA_CLK0# [27] VMA_CLK1 [27] VMA_CLK1# [27]
VMA_WCK01 [27 ] VMA_WCK01# [2 7] VMA_WCKB01 [27] VMA_WCKB01# [27] VMA_WCK23 [27 ] VMA_WCK23# [2 7] VMA_WCKB23 [27] VMA_WCKB23# [27] VMA_WCK45 [27 ] VMA_WCK45# [2 7] VMA_WCKB45 [27] VMA_WCKB45# [27] VMA_WCK67 [27 ] VMA_WCK67# [2 7] VMA_WCKB67 [27] VMA_WCKB67# [27]
CG2922u/6.3V _6 CG354.7u/6.3V _6 CG314.7u/6.3V _6 CG5810.47u/6.3V_2
JS-N18
JS-N18
+1.8V_MAIN
1 2
LG1 HCB1005KF-330T30
Place near GPU
+1.8V_AON [2 3,24,25,27,28,29,30,70,73,75] +1V_GFX [23,24,75] +1.8V_MAIN [23,25,35,75] FBVDDQ_MEM [22,25,27,28,29,30,73] FBA_PLL_AVDD [22]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
N18E-GX-1/9 (PCIE)
N18E-GX-1/9 (PCIE)
N18E-GX-1/9 (PCIE)
1
ZGE
ZGE
ZGE
21 78Friday, May 03, 2019
21 78Friday, May 03, 2019
21 78Friday, May 03, 2019
1A
1A
1A
Page 22
5
FBVDDQ_MEM [21,25,27,28,29,30,73] FBA_PLL_AVDD [21 ]
4
3
2
1
22
UG1D
VMC_DQ0 VMC_DQ1 VMC_DQ2 VMC_DQ3 VMC_DQ4 VMC_DQ5 VMC_DQ6 VMC_DQ7 VMC_DQ8 VMC_DQ9 VMC_DQ10 VMC_DQ11 VMC_DQ12 VMC_DQ13 VMC_DQ14 VMC_DQ15 VMC_DQ16 VMC_DQ17 VMC_DQ18 VMC_DQ19 VMC_DQ20 VMC_DQ21 VMC_DQ22 VMC_DQ23 VMC_DQ24 VMC_DQ25 VMC_DQ26 VMC_DQ27 VMC_DQ28 VMC_DQ29 VMC_DQ30 VMC_DQ31 VMC_DQ32 VMC_DQ33 VMC_DQ34 VMC_DQ35 VMC_DQ36 VMC_DQ37 VMC_DQ38 VMC_DQ39 VMC_DQ40 VMC_DQ41 VMC_DQ42 VMC_DQ43 VMC_DQ44 VMC_DQ45 VMC_DQ46 VMC_DQ47 VMC_DQ48 VMC_DQ49 VMC_DQ50 VMC_DQ51 VMC_DQ52 VMC_DQ53 VMC_DQ54 VMC_DQ55 VMC_DQ56 VMC_DQ57 VMC_DQ58 VMC_DQ59 VMC_DQ60 VMC_DQ61 VMC_DQ62 VMC_DQ63
RG88 10K_5%_4
C6 D6 A6 B6 B4 A4 B3 C4 D9 C9 E9 B9 B8 A8
F6
E6 F18 G18 E18 H18 D15 E15 G17 H17 J15 H15 E14 F14 H11 G11 F11 E11 J29 F30 H29 G30 B30 A30 H30 C30 D27 J26 F27 G27 C27 B27 A27 G29 H20 D18 G20 E20 F23 E21 D21 E23 G24 H26 F24 G26 F26 D26 B26 C26
A5
C8 J18 F12 D29 E27 F20 E26
D5
D8 E17 E12 E30 B29 G21 E24
Y24 Y25 Y26 Y27 Y28 Y29 Y30 Y31
4/22 FBC
FBC_D0 FBC_D1 FBC_D2 FBC_D3 FBC_D4 FBC_D5 FBC_D6 FBC_D7 FBC_D8 FBC_D9 FBC_D10 FBC_D11 FBC_D12 FBC_D13 FBC_D14 FBC_D15 FBC_D16 FBC_D17 FBC_D18 FBC_D19 FBC_D20 FBC_D21 FBC_D22 FBC_D23 FBC_D24 FBC_D25 FBC_D26 FBC_D27 FBC_D28 FBC_D29 FBC_D30 FBC_D31 FBC_D32 FBC_D33 FBC_D34 FBC_D35 FBC_D36 FBC_D37 FBC_D38 FBC_D39 FBC_D40 FBC_D41 FBC_D42 FBC_D43 FBC_D44 FBC_D45 FBC_D46 FBC_D47 FBC_D48 FBC_D49 FBC_D50 FBC_D51 FBC_D52 FBC_D53 FBC_D54 FBC_D55 FBC_D56 FBC_D57 FBC_D58 FBC_D59 FBC_D60 FBC_D61 FBC_D62 FBC_D63
FBC_DQM0 FBC_DQM1 FBC_DQM2 FBC_DQM3 FBC_DQM4 FBC_DQM5 FBC_DQM6 FBC_DQM7
FBC_DQS_WP0 FBC_DQS_WP1 FBC_DQS_WP2 FBC_DQS_WP3 FBC_DQS_WP4 FBC_DQS_WP5 FBC_DQS_WP6 FBC_DQS_WP7
GND GND GND GND GND GND GND GND
N18E-G3-ES-A1
FBC_CMD0
C11
FBC_CMD0 FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31 FBC_CMD32 FBC_CMD33 FBC_CMD34 FBC_CMD35
FBC_DBG_RFU1 FBC_DBG_RFU2
FBC_CLK0 FBC_CLK0 FBC_CLK1 FBC_CLK1
FBC_WCK01 FBC_WCK01
FBC_WCKB01 FBC_WCKB01
FBC_WCK23 FBC_WCK23
FBC_WCKB23 FBC_WCKB23
FBC_WCK45 FBC_WCK45
FBC_WCKB45 FBC_WCKB45
FBC_WCK67 FBC_WCK67
FBC_WCKB67 FBC_WCKB67
B11 A11 D11 A12 B12 C12 C14 B14 A14 D14 A15 B15 C15 C17 B17 B24 A24 D23 A23 B23 C23 C21 B21 A21 D20 A20 B20 C20 C18 B18 A18 A17 D17 A9 C24
J14 J23
G15 F15 H21 J21
F8 G8 G9 F9 H12 G12 G14 H14 J27 H27 E29 F29 G23 H23 H24 J24
FBC_CMD1 FBC_CMD2 FBC_CMD3 FBC_CMD4 FBC_CMD5 FBC_CMD6 FBC_CMD7 FBC_CMD8
FBC_CMD9 FBC_CMD10 FBC_CMD11 FBC_CMD12 FBC_CMD13 FBC_CMD14 FBC_CMD15 FBC_CMD16 FBC_CMD17 FBC_CMD18 FBC_CMD19 FBC_CMD20 FBC_CMD21 FBC_CMD22 FBC_CMD23 FBC_CMD24 FBC_CMD25 FBC_CMD26 FBC_CMD27 FBC_CMD28 FBC_CMD29 FBC_CMD30 FBC_CMD31 FBC_CMD32 FBC_CMD33
FBC_DEBUG0 FBC_DEBUG1
FBC_CMD[33:0] [29]
TPG37 TPG39
VMC_CLK0 [29] VMC_CLK0# [29] VMC_CLK1 [29] VMC_CLK1# [29]
VMC_WCK01 [29] VMC_WCK01# [29] VMC_WCKB01 [29] VMC_WCKB01# [29] VMC_WCK23 [29] VMC_WCK23# [29] VMC_WCKB23 [29] VMC_WCKB23# [29] VMC_WCK45 [29] VMC_WCK45# [29] VMC_WCKB45 [29] VMC_WCKB45# [29] VMC_WCK67 [29] VMC_WCK67# [29] VMC_WCKB67 [29] VMC_WCKB67# [29]
VMD_DQ[63:0][30]
JS-N18
FBD_DBI[7:0][30]
FBD_EDC[7:0][30]
FBA_PLL_AVDD
L17
FBC_PLL_AVDD
CG724
0.47u/6.3V_2
4/22
FBVDDQ_MEM FBVDDQ_MEM
RG103
RG114
10K_5%_4
10K_5%_4
FBD_CMD10 FBD_CMD26
FBD_CMD2 FBD_CMD18
JS-N18
RG100
RG119
10K_5%_4
10K_5%_4
close to VRAM
3
2
VMD_DQ0 VMD_DQ1 VMD_DQ2 VMD_DQ3 VMD_DQ4 VMD_DQ5 VMD_DQ6 VMD_DQ7 VMD_DQ8 VMD_DQ9 VMD_DQ10 VMD_DQ11 VMD_DQ12 VMD_DQ13 VMD_DQ14 VMD_DQ15 VMD_DQ16 VMD_DQ17 VMD_DQ18 VMD_DQ19 VMD_DQ20 VMD_DQ21 VMD_DQ22 VMD_DQ23 VMD_DQ24 VMD_DQ25 VMD_DQ26 VMD_DQ27 VMD_DQ28 VMD_DQ29 VMD_DQ30 VMD_DQ31 VMD_DQ32 VMD_DQ33 VMD_DQ34 VMD_DQ35 VMD_DQ36 VMD_DQ37 VMD_DQ38 VMD_DQ39 VMD_DQ40 VMD_DQ41 VMD_DQ42 VMD_DQ43 VMD_DQ44 VMD_DQ45 VMD_DQ46 VMD_DQ47 VMD_DQ48 VMD_DQ49 VMD_DQ50 VMD_DQ51 VMD_DQ52 VMD_DQ53 VMD_DQ54 VMD_DQ55 VMD_DQ56 VMD_DQ57 VMD_DQ58 VMD_DQ59 VMD_DQ60 VMD_DQ61 VMD_DQ62 VMD_DQ63
FBD_DBI0 FBD_DBI1 FBD_DBI2 FBD_DBI3 FBD_DBI4 FBD_DBI5 FBD_DBI6 FBD_DBI7
FBD_EDC0 FBD_EDC1 FBD_EDC2 FBD_EDC3 FBD_EDC4 FBD_EDC5 FBD_EDC6 FBD_EDC7
AK8 AK4 AK2 AK3 AK5 AK6 AK9 AK7 AG4
AF9 AG6 AG7
AJ4
AJ5
AJ6 AG5
Y6 Y5 V5
Y4 AA6 AA5 AC5 AC4 AD7 AC6
AF6
AD6
AF7 AF8 AF2 AF3
F4
E1
F3
F5
D2 D1 C3 C2
J5
J4
L8
J2
F1
F2
H4 H5
V7
V8
V6
V9
U4 R5 R6 U8
P6
R9
P4
P5
L7
L6
L4
L5
AJ1 AG1 AA7 AD5
D3 H3 U5 M9
AJ3 AG2 AA9
AF4
E3 H2 U6 M5
Y32 Y33 Y34 Y35 Y36 Y37 Y38 Y39
UG1E
5/22 FBD
FBD_D0 FBD_D1 FBD_D2 FBD_D3 FBD_D4 FBD_D5 FBD_D6 FBD_D7 FBD_D8 FBD_D9 FBD_D10 FBD_D11 FBD_D12 FBD_D13 FBD_D14 FBD_D15 FBD_D16 FBD_D17 FBD_D18 FBD_D19 FBD_D20 FBD_D21 FBD_D22 FBD_D23 FBD_D24 FBD_D25 FBD_D26 FBD_D27 FBD_D28 FBD_D29 FBD_D30 FBD_D31 FBD_D32 FBD_D33 FBD_D34 FBD_D35 FBD_D36 FBD_D37 FBD_D38 FBD_D39 FBD_D40 FBD_D41 FBD_D42 FBD_D43 FBD_D44 FBD_D45 FBD_D46 FBD_D47 FBD_D48 FBD_D49 FBD_D50 FBD_D51 FBD_D52 FBD_D53 FBD_D54 FBD_D55 FBD_D56 FBD_D57 FBD_D58 FBD_D59 FBD_D60 FBD_D61 FBD_D62 FBD_D63
FBD_DQM0 FBD_DQM1 FBD_DQM2 FBD_DQM3 FBD_DQM4 FBD_DQM5 FBD_DQM6 FBD_DQM7
FBD_DQS_WP0 FBD_DQS_WP1 FBD_DQS_WP2 FBD_DQS_WP3 FBD_DQS_WP4 FBD_DQS_WP5 FBD_DQS_WP6 FBD_DQS_WP7
GND GND GND GND GND GND GND GND
N18E-G3-ES-A1
FBD_CMD0
AD2
FBD_CMD0 FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8
FBD_CMD9 FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30 FBD_CMD31 FBD_CMD32 FBD_CMD33 FBD_CMD34 FBD_CMD35
FBD_DBG_RFU1 FBD_DBG_RFU2
FBD_CLK0 FBD_CLK0 FBD_CLK1 FBD_CLK1
FBD_WCK01 FBD_WCK01
FBD_WCKB01 FBD_WCKB01
FBD_WCK23 FBD_WCK23
FBD_WCKB23 FBD_WCKB23
FBD_WCK45 FBD_WCK45
FBD_WCKB45 FBD_WCKB45
FBD_WCK67 FBD_WCK67
FBD_WCKB67 FBD_WCKB67
FBD_PLL_AVDD
AD1 AD4 AC1 AC2 AC3 AA3 AA2 AA1 AA4 Y1 Y2 Y3 V3 V2 V1 L3 L2 L1 M4 M1 M2 M3 P3 P2 P1 R4 R1 R2 R3 U3 U2 V4 U1 AD3 J3
AC9 P9
Y8 Y7 R8 R7
AJ8 AJ7 AG8 AG9 AD8 AD9 AC7 AC8 J6 J7 H7 H6 P8 P7 M7 M8
V11
FBD_CMD10 FBD_CMD11 FBD_CMD12 FBD_CMD13 FBD_CMD14 FBD_CMD15 FBD_CMD16 FBD_CMD17 FBD_CMD18 FBD_CMD19 FBD_CMD20 FBD_CMD21 FBD_CMD22 FBD_CMD23 FBD_CMD24 FBD_CMD25 FBD_CMD26 FBD_CMD27 FBD_CMD28 FBD_CMD29 FBD_CMD30 FBD_CMD31 FBD_CMD32 FBD_CMD33
FBD_CMD1 FBD_CMD2 FBD_CMD3 FBD_CMD4 FBD_CMD5 FBD_CMD6 FBD_CMD7 FBD_CMD8 FBD_CMD9
FBD_DEBUG0 FBD_DEBUG1
FBA_PLL_AVDD
FBD_CMD[33:0] [30]
TPG59 TPG48
VMD_CLK0 [30] VMD_CLK0# [30] VMD_CLK1 [30] VMD_CLK1# [30]
VMD_WCK01 [30] VMD_WCK01# [30] VMD_WCKB01 [30] VMD_WCKB01# [30] VMD_WCK23 [30] VMD_WCK23# [30] VMD_WCKB23 [30] VMD_WCKB23# [30] VMD_WCK45 [30] VMD_WCK45# [30] VMD_WCKB45 [30] VMD_WCKB45# [30] VMD_WCK67 [30] VMD_WCK67# [30] VMD_WCKB67 [30] VMD_WCKB67# [30]
CG504
0.47u/6.3V_2
JS-N18
N18E-G3
5/22
N/AFBD
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
N18E-GX-2/9 (Memory)
N18E-GX-2/9 (Memory)
N18E-GX-2/9 (Memory)
1
ZGE
ZGE
ZGE
1A
1A
22 78Friday, May 03, 2019
22 78Friday, May 03, 2019
22 78Friday, May 03, 2019
1A
VMB_CLK0 [28] VMB_CLK0# [28] VMB_CLK1 [28] VMB_CLK1# [28]
VMB_WCK01 [28] VMB_WCK01# [28] VMB_WCKB01 [28] VMB_WCKB01# [28] VMB_WCK23 [28] VMB_WCK23# [28] VMB_WCKB23 [28] VMB_WCKB23# [28] VMB_WCK45 [28] VMB_WCK45# [28] VMB_WCKB45 [28] VMB_WCKB45# [28] VMB_WCK67 [28] VMB_WCK67# [28] VMB_WCKB67 [28] VMB_WCKB67# [28]
RG82 10K_5%_4
VMC_DQ[63:0][29]
JS-N18
RG93 10K_5%_4
RG86 10K_5%_4
FBC_DBI0 FBC_DBI1 FBC_DBI2 FBC_DBI3 FBC_DBI4 FBC_DBI5 FBC_DBI6 FBC_DBI7
FBC_EDC0 FBC_EDC1 FBC_EDC2 FBC_EDC3 FBC_EDC4 FBC_EDC5 FBC_EDC6 FBC_EDC7
RG83 10K_5%_4
FBC_DBI[7:0][29]
FBC_EDC[7:0][29]
FBC_CMD10 FBC_CMD26
FBC_CMD2 FBC_CMD18
close to VRAM
VMB_DQ[63:0][28]
D D
C C
FBB_DBI[7:0][28]
B B
A A
FBB_EDC[7:0][28]
VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63
FBB_DBI0 FBB_DBI1 FBB_DBI2 FBB_DBI3 FBB_DBI4 FBB_DBI5 FBB_DBI6 FBB_DBI7
FBB_EDC0 FBB_EDC1 FBB_EDC2 FBB_EDC3 FBB_EDC4 FBB_EDC5 FBB_EDC6 FBB_EDC7
H32 D32 A33 B32 E32
G32
J30 F32 H36
G36
J36 F36 F33 D33 J32
G33
E45 D45 F45
G45
D42 E42 F42 H41 E41 F39 E39 D39 F38 E38 D36 E36
M50
P48 M51 M49
P47
P52
R46
P46
L50
L51
L52
L49 M46
L47 M48 M47
D48
C50
C48
C49
E49
E50
F49
F48
F50
D52
J50
H48
H51
J51
H49
H52
C32
E33
E44 G39
P49
L48
D50
H50
B33
E35 G44
H38
P50
J48
D51
F51
Y16
Y17
Y18
Y19
Y20
Y21
Y22
Y23
UG1C
3/22 FBB
FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63
FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7
FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7
GND GND GND GND GND GND GND GND
N18E-G3-ES-A1
FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8
FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32 FBB_CMD33 FBB_CMD34 FBB_CMD35
FBB_DBG_RFU1 FBB_DBG_RFU2
FBB_CLK0 FBB_CLK0 FBB_CLK1 FBB_CLK1
FBB_WCK01
FBB_WCK01 FBB_WCKB01 FBB_WCKB01
FBB_WCK23
FBB_WCK23 FBB_WCKB23 FBB_WCKB23
FBB_WCK45
FBB_WCK45 FBB_WCKB45 FBB_WCKB45
FBB_WCK67
FBB_WCK67 FBB_WCKB67 FBB_WCKB67
FBB_PLL_AVDD
A35 D35 A36 B36 C36 C38 B38 A38 D38 A39 B39 C39 C41 B41 A41 B49 A49 A48 D47 A47 B47 C47 C45 B45 A45 D44 A44 B44 C44 C42 B42 D41 A42 C35 B50
J35 J41
H42 G42 F47 E47
J33 H33 G35 H35 J39 H39 F41 G41 L46 L45 M44 M45 H47 H46 J47 J46
L38
FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD32
FBB_CMD33 FBB_DEBUG0 FBB_DEBUG1
FBA_PLL_AVDD
3/22
JS-N18 JS-N18
FBB_CMD[33:0] [28]
TPG36 TPG42
CG410
0.47u/6.3V_2
FBVDDQ_MEM FBVDDQ_MEM FBV DDQ_MEM FBVDDQ_MEM
RG95 10K_5%_4
FBB_CMD10 FBB_CMD26
FBB_CMD2 FBB_CMD18
RG91
RG97
10K_5%_4
10K_5%_4
FBB_CMD0
B35
close to VRAM
5
4
Page 23
5
UG1N
7/22 IFPAB
IFPAB_RSET
RG152 1K_5%_4
CORE_PLLVDD
Under the GPU
D D
CG833
0.47u/6.3V_2
0.4A
+1V_GFX
CG801
CG849
4.7u/6.3V_6
0.47u/6.3V_2
C C
1.8V
CG799
BD23
IFPAB_RSET
BD21
IFPAB_PLLVDD
BB18
IFP_IOVDD
BB17
IFP_IOVDD
BB20
CG802
CG803
IFP_IOVDD
BB21
IFP_IOVDD
0.47u/6.3V_2
0.47u/6.3V_2
0.47u/6.3V_2
Under the GPUNear th e GPU
IFPAB
N18E-G3-ES-A1
JS-N18E-TBD
RG159
RG153
*MIC@100K_1%_4
STRAP0 STRAP1 STRAP2 STRAP3 STRAP4
B B
A A
STRAP5
RG158
SAM@100K_1%_4
UG1U
14/22 MISC 2
BL3
STRAP0
STRAP0
BL4
STRAP1
STRAP1
BM4
STRAP2
STRAP2
BM5
STRAP3
STRAP3
BK5
STRAP4
STRAP4
BJ5
STRAP5
STRAP5
N18E-G3-ES-A1
+1.8V_AON
RG12 10K_1%_4
GPIO27_IFPC_HPD
JS-N18 JS-N18 JS-N18
GPIO27_IFPE_HPD_Q DP_HPD_PCH
2
QG4
MMBT3904
1 3
GND
RG173
*100K_1%_4
*100K_1%_4
RG174
RG154
100K_1%_4
100K_1%_4
ROM_CS
ROM_SI
ROM_SO
ROM_SCLK
BUFRST
21/22
HDMI-HPD
RG9 100K_5%_4
RG10 100K_5%_4
GND
GND
0712: CG106 change to 0201 0712: CG107 change to 0201 0712: CG108 change to 0201
5
14/22
RG171 100K_1%_4
RG172 *100K_1%_4
BJ4 BK2
BK4 BK3
BF9
HDMI_HPD_PCH
CG38 *220p/25V_2
DVI/HDMI D P
DL-DVI
SDA
SDA
SCL
SCL
TXC
TXC
TXC
TXC
TXD0
TXD0
TXD0
TXD0
TXD1
TXD1
TXD1
TXD1
TXD2
TXD2
TXD2
TXD2
SDA SCL
TXC TXC
TXD3
TXD0
TXD3
TXD0
TXD4
TXD1
TXD4
TXD1
TXD5
TXD2
TXD5
TXD2
+1.8V_AON
RG162
RG145
*100K_1%_4
GSYN@100K_1%_4
RG161
RG146
100K_1%_4
*NGSYN@100K_1%_4
ROM_CS ROM_SI
ROM_SO ROM_SCLK
BUFRST
TPG68
TBT DP/Re-Driver
BH11
IFPA_AUX
BG11
IFPA_AUX
BF21
IFPA_L3
BG21
IFPA_L3
BG23
IFPA_L2
BH23
IFPA_L2
BF23
IFPA_L1
BE23
IFPA_L1
BF24
IFPA_L0
BG24
IFPA_L0
TBT DP/Re-Driver
GPU_IFPB_I2C_SDA
BG12
IFPB_AUX
GPU_IFPB_I2C_SCL
BH12
IFPB_AUX
BL18
IFPB_L3
BK18
IFPB_L3
BK20
IFPB_L2
BL20
IFPB_L2
BM20
IFPB_L1
BM21
IFPB_L1
BL21
IFPB_L0
BK21
IFPB_L0
BOM:
VRAM Table for G3 GDDR6
RAMCFG [2:0]
0x1
TBD
0x0
TBD
ROM_SI
RG4733.2_1%_4 RG7133.2_1%_4
ROM_SCLK
RG6233.2_1%_4
RG35 *100K_1%_4
ROM_SI ROM_SO ROM_SCLK
RG31 100K_1%_4
JS-N18-0706
GPIO18_IFPE_HPD
HDMI_HPD_PCH [13,35] DP_HPD_PCH [13,33]
MMBT3904
QG6
JS-N18 from IFPF to IFPB
GPU_TBT_AUXN [37,38]
GPU_TBT_AUXP [37,38]
GPU_TBT_D3# [37]
GPU_TBT_D3 [37]
GPU_TBT_D2 [37]
GPU_TBT_D1 [37]
GPU_TBT_D0 [37]
GPU_TBT_AUXN GPU_TBT_AUXP
GPU_TBT_D2# [37]
GPU_TBT_D1# [37]
GPU_TBT_D0# [37]
RG166
100K_1%_4
JS-N18 from IFPF to IFPB
+1.8V_AON +1.8V_AON
RG59
RG58
2.2K_5%_4
GPU_IFPB_I2C_SDA IFPB_I2C_SDA GPU_IFPB_I2C_SCL IFPB_I2C_SCL
2.2K_5%_4
TYPE-C
Vendor P/NVendorDESC RIPTION
Micron
MT61K256 M32JE-14:A
Samsung
K4Z80325BC-HC14
JS-N18E change to 8Mb
BOM:
N18E-G3
+1.8V_AON
N18E-G2
RG76 10K_5%_4
+1.8V_AON
RG143 *100K_1%_4
RG147 100K_1%_4
UG2
5
SI/SIO0
2
SO/SIO1
1
CS
6
SCLK
MX25U8033EM1I-12G
VCC WP
HOLD#
GND
+1.8V_AON
ROM_SI_R ROM_SO ROM_CS_R ROM_SCLK_R
RG49 *10K_1%_4
RG50
10K_1%_4
RG24 10K_1%_4
DP HPD
GPIO18_IFPE_HPD_Q
2
1 3
GND
GND
RG23
100K_5%_4
RG22 100 K_5%_4
RG170
100K_1%_4
B
QG14B PJT138K
RG66 *0_5%_4
PCB CO-LAYOUT
Description
W25Q80EWSNIG GD25LQ80CTIGR
MX25U8033EM1I-12G
8
WP#_3
3
HOLLD#_7ROM_CS
7 4
CG45 *220p/25V_2
GND
4
QG20A
GPU_IFPB_I2C_SCL
QG20B
GPU_IFPB_I2C_SDA
2
A
61
RG54
PCB CO-LAYOUT
JS-N18-0702
Drax GSync SKU Non GSync SKU
TOP P/N QB P/N
AKG5JZ0TL04 AKG58G0T505
P/N
Size 8MbN18E-G3
AKE5GGN0N02
8Mb
AKE5GF00Q01 AKE5GFP0Z02
8Mb
+1.8V_AON
RG48 10K_5%_4 RG72 10K_5%_4
CG84
0.1u/16V_4
4
5
34
2
61
*SSM6N43FU
5
QG14A PJT138K
+1.8V_AON
34
*0_5%_4
HPD_IFPD
MMBT3904
RG42 10K _1%_4
+1.8V_AON
QG8
3ND_MBCLK [24,46,53,54,57]
3ND_MBDATA [24,46,53,54,57]
IFPB_I2C_SDA [41]
IFPB_I2C_SCL [41]
Default
ROM_CS_R ROM_SO ROM_SI_R ROM_SCLK_R
For ICT test
JTAG_TRST#
JS-N18 0706
GPU_ADC_INP[74] GPU_ADC_INN[74]
JS-N18-0702
JTAG_SEL
RG164 10K_1%_4
RG29 10K_1%_4
eDP HPD(For G-Sync)
ULT_EDP_HPD_Q
2
1 3
GND
GND GND
Near the GPU
+1V_GFX
0.4A
CG63
CG47
4.7u/6.3V_6
4.7u/6.3V_6
C, D share the filter
follow ZGQ
TPG10 TPG8 TPG7 TPG9
OVERT#
TS_VREF
TPG67
THERMDN
TPG1
THERMDP
TPG2
CG865 *47p/50V_4
CG869 *47p/50V_4
JTAG_TCK
TPG4
JTAG_TMS
TPG6
JTAG_TDI
TPG3
JTAG_TDO
TPG5
JTAG_TRST#
JTAG_SEL
TPG69
RG33 100 K_5%_4
RG34 100K_5%_4
+1V_GFX
1.8V
0.4A
0.47u/6.3V_2
Near the GPU
BG5
BF12
BJ11
BK24 BL23 BM23 BM24 BL24
BK23
EDP_HPD_GPU
CG67 *220p/25V_2
3
UG1P
9/22 IFPD
Under the GPU
BC18
IFP_IOVDD
BC20
CORE_PLLVDD
CG847
0.47u/6.3V_2
CG56
0.47u/6.3V_2
IFPC_RSET
IFP_IOVDD
N18E-G3-ES-A1
UG1O
8/22 IFPC
BD20
IFPCD_RSET
BD18
IFPCD_PLLVDD
CG46
4.7u/6.3V_6
JS-N18
CG787
0.47u/6.3V_2
RG144 1K_5%_4
Under the GPU
BB23
IFP_IOVDD
BC17
IFP_IOVDD
N18E-G3-ES-A1
CG815
0.47u/6.3V_2 RG56
Under the GPU
GFx SMBus Isolation(for EC) I2C Address 0x9E
JS-N18-0702
RG155 *short_0402
PEGX_RST#[21,23,25]
GPUT_CLK[57]
GPUT_DATA[57]
12/22 MISC 1
OVERT
TS_VREF
THERMDN
THERMDP
ADC_IN ADC_IN
JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST
NVJTAG_SEL
20/22
HPD_TBT
EDP_HPD_GPU [31,32]
QG7
MMBT3904
CG793
BJ1 BJ2
BJ9
1.0V
UG1T
N18E-G3-ES-A1
IFPD
IFPC
I2CS_SCL I2CS_SDA
I2CC_SCL I2CC_SDA
I2CB_SCL I2CB_SDA
GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30
+1.8V_AON
3
DVI/HDMI
SDA SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
16/22
DVI/HDMI
SDA SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
15/22
RG128
5
2K_1%_4
3 4
QG18APJT138K A
2
6 1
QG18BPJT138K A
RG40 2K_1%_4
GFX_SCL
BJ8
GFX_SDA
BH8
I2CC_SCL_GFX
BG9
I2CC_SDA_GFX
BH9
I2CB_SCL_G
BG8
I2CB_SDA_G
BF8
NVVDD_PWM_GPU
BD6
GPIO0
BB5
GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9
GND
GC6FBEN
BD1
GPUEVENT#
BE4
GC6_1V8_MAIN_EN
BE1
FRM_LCK#
BG2 BD2
LCD_BL_PWM
BD7
MEM_VDD_CTRL
BH4
THER_ALERT#
BJ3
MEM_VREF_CTL
BD3
LCD_VDD
BH3
PWR_LEVEL
BE6 BB1
HPD_TBT
BG4
HPD_2PL
BG1 BE2
HPD_IFPD
BH1
GPIO18_IFPE_HPD
BE3 BD4
NB_FGC6
BE5
LCD_BLEN
BA5
GPIO22_SWAPRDY_IN
BB6
GPIO23_RASTER_SYNC1
BG3
GPU_GPIO24_IFPF_HPD
BD5
FBVDD_PSI
BB2
GPIO26_FP_FUSE
BE7
GPIO27_IFPC_HPD
BA4
GPIO28_OC_WARN#
BB4
GPIO29_IDLE_IN_SW
BA3 BB3
RG28 10K_1%_4
TBT HPD1
JS-N18
RG32
DP_HPD_TBT_Q
2
100K_5%_4
1 3
RG38
100K_5%_4
GND
DP
BF11
IFPD_AUX
BE11
IFPD_AUX
BM14
IFPD_L3
BM15
IFPD_L3
BL15
IFPD_L2
BK15
IFPD_L2
BK17
IFPD_L1
BL17
IFPD_L1
BM17
IFPD_L0
BM18
IFPD_L0
DP
BL9
IFPC_AUX
BK9
IFPC_AUX
BF17
IFPC_L3
BE17
IFPC_L3
BF18
IFPC_L2
BG18
IFPC_L2
BG20
IFPC_L1
BH20
IFPC_L1
BF20
IFPC_L0
BE20
IFPC_L0
+1.8V_AON
RG135 2K_1%_4
GFX_SCL
GFX_SDA
+1.8V_AON
RG39 2K_1%_4
RG138 2K_1%_4
JS-N18-0702
RG160 *100K_5%_4
JS-N18 from GPIO24 to 15
TP12
JS-N18 change netname
JS-N18 JS-N18 add
JS-N18 add, confirm with power team
THER_ALERT#
RG25 *short_0402
TBT_DP_HPD
CG66 *220p/25V_2
GND
0712: CG109 change to 0201
eDP
INT_EDP_AUXP [31]
INT_EDP_TXP3 [31]
INT_EDP_TXP2 [31]
INT_EDP_TXP1 [31]
INT_EDP_TXP0 [31]
HDMI/Re-Driver
GPU_DDCCLK [35]
GPU_CLK [35]
GPU_D0 [35]
GPU_D1 [35]
GPU_D2 [35]
GPU_DDCDATA GPU_DDCCLK
RG57
*100K_1%_4
JS-N18-0702
PEGX_RST#[21,23,25]
I2CC_SCL_GFX
I2CC_SDA_GFX
+1.8V_AON
RG140 2K_1%_4
NVVDD_PWM_GPU [70]
GC6_1V8_MAIN_EN [25]
FRM_LCK# [32]
NVVDD_PSI [70]
RG151 10K_5%_4 RG136 100K_5%_4
RG14 10K _5%_4 RG7 *10K_1%_4
+1.8V_AON
QG5 DMG1012T-7
TBT_DP_HPD [13,37,38]
INT_EDP_AUXN [31]
INT_EDP_TXN3 [31]
INT_EDP_TXN2 [31]
INT_EDP_TXN1 [31]
INT_EDP_TXN0 [31]
GPU_DDCDATA [35]
GPU_CLK# [35]
GPU_D0# [35]
GPU_D1# [35]
GPU_D2# [35]
*100K_1%_4
QG10A PJT138KA
QG10B PJT138KA
RG178 10K_5%_4
JS-N18-0705
RG150 100K_1%_4 RG163 10K_5%_4
RG20 10K_5%_4
LCD_VDD LCD_BLEN
NB_FGC6 [25]
GPU_GPIO24_IFPF_HPD [24]
FBVDD_PSI [73] GPIO26_FP_FUSE [25]
GPIO28_OC_WARN# [74]
+1.8V_AON
321
RG43 *short_0402
5
2
JS-N18 DEL
1.0V
34
61
INT_EDP_AUXN INT_EDP_AUXP
RG149
100K_1%_4
1.8V
0.4A
+1V_GFX
CG807
CG51
4.7u/6.3V_6
4.7u/6.3V_6
Near the GPU E,F share the filter
follow ZGQ
GC6FBEN [25]
LCD_BL_PWM [32]
MEM_VDD_CTRL [73]
JS-N18 change to 10K
MEM_VREF_CTL [27,28,29,30] LCD_VDD [32] LCD_BLEN [32]
JS-N18-0705
RG156
100K_1%_4
IFPEF_RSET
RG148 1K_5%_4
CORE_PLLVDD
CG775 0.47u/6.3V_2
JS-N18
Under GPU
CG839
CG794
0.47u/6.3V_2
0.47u/6.3V_2
JS-N18
+1V_GFX
RG127 10K_5%_4
CG58
0.47u/6.3V_2
MBCLK1_GPU [70]
MBDATA1_GPU [70]
JS-N18-0705
DGPU_THER_ALERT# [57]
2
UG1Q
BD17
IFPE_RSET
BD15
IFPE_PLLVDD
BC21
IFP_IOVDD
BC23
IFP_IOVDD
N18E-G3-ES-A1
CG804
0.47u/6.3V_2
Close the GPU
AT10
AT9 AV10 AV11
AR10 AT11
CG59
0.47u/6.3V_2
AM10 AM11 AN10 AN11 AR11
AN9
RG120
10K_5%_4
AM3
JS-N18-0705
JS-N18-0705
JS-N18-0705
GC6FBEN
JS-0106 follow WBC
2
10/22 IFPE
IFPE
UG1S
11/22 NVHS
NVHS_DVDD NVHS_DVDD NVHS_DVDD NVHS_DVDD
NVHS_CVDD NVHS_CVDD
NVHS_HVDD NVHS_HVDD NVHS_HVDD NVHS_HVDD NVHS_HVDD
NVHS_PLL_HVDD
NVHS_TERMP
19/22
N18E-G3-ES-A1
GPUEVENT# GC6_1V8_MAIN_EN FRM_LCK# NVVDD_PSI THER_ALERT# PWR_LEVEL FBVDD_PSI
GPIO28_OC_WARN#
GPIO22_SWAPRDY_IN GPU_GPIO24_IFPF_HPD
GPIO23_RASTER_SYNC1
DGPU_PWROK_Q[13]
Throttle
2
+3V
PWR_LEVEL
NVHS RX/TX
RG188 10K_5%_4
3
QG22
1
DMG1012T-7
DVI/HDMI
17/22
N18E-G3
DG2
SDA SCL
TXC TXC
TXD0 TXD0
TXD1 TXD1
TXD2 TXD2
NVHS_REFCLK NVHS_REFCLK
EXT_REFCLK_SLI
N/A
RG19 10K _5%_4 RG21 10K _5%_4 RG27 10K _5%_4 RG18 10K _5%_4 RG30 10K _5%_4 RG13 10K _5%_4 RG17 10K _5%_4
RG8 10K_5%_4
RG11 2.2K _5%_4 RG130 10K_5%_4
RG26 100 K_1%_4
3
2
2N7002K
QG24
1
0723: QG8 change to 2N7002K
0723: QG10 change to 2N7002K
3
2
*2N7002K
QG25
1
DGPU_PWROK_Q
+1.8V_AON
PWR_LEVEL
2
1
RG16
*0_5%_2
DP
IFPE_AUX IFPE_AUX
IFPE_L3 IFPE_L3
IFPE_L2 IFPE_L2
IFPE_L1 IFPE_L1
IFPE_L0 IFPE_L0
NVHS_RX0 NVHS_RX0
NVHS_RX1 NVHS_RX1
NVHS_RX2 NVHS_RX2
NVHS_RX3 NVHS_RX3
NVHS_RX4 NVHS_RX4
NVHS_RX5 NVHS_RX5
NVHS_RX6 NVHS_RX6
NVHS_RX7 NVHS_RX7
NVHS_TX0 NVHS_TX0
NVHS_TX1 NVHS_TX1
NVHS_TX2 NVHS_TX2
NVHS_TX3 NVHS_TX3
NVHS_TX4 NVHS_TX4
NVHS_TX5 NVHS_TX5
NVHS_TX6 NVHS_TX6
NVHS_TX7 NVHS_TX7
+1.8V_AON
JS-N18 0702 stuff
JS-N18 0702 stuff
JS-N18-0705 PD
GC6FBEN_Q [13]
+1.8V_AON
321
QG15 DMG1012T-7
DMG1012T-7 QG3
SDM20U30-7
DP
INT_DP_AUXN
BL8
INT_DP_AUXP
BK8
BG14 BH14
BF14 BE14
BF15 BG15
BG17 BH17
AM1 AN1
AN2 AN3
AR3 AR2
AR1 AT1
AT2 AT3
AV3 AV2
AV1 AW1
AW2 AW3
AM7 AM8
AN7 AN6
AR6 AR5
AR7 AR8
AT7 AT6
AV6 AV5
AV7 AV8
AW7 AW6
JS-N18-0709 50ohm
AM6
RG123 *51_1%_4
AM5
RG121 *51_1%_4
AM2
GC6FBEN_Q_EC [57]
321
RG15 *0_5%_4
RG69 10K_1%_4
100K_1%_4
RG52
100K_1%_4
5
RG53
1
+3V+1.8V_MAIN +3V
RG60 10K_1%_4
2
34
QG11A PJX138K
QG12A
5
2N7002KDW
34
DP_D3# [33] DP_D3 [33]
DP_D2# [33] DP_D2 [33]
DP_D1# [33] DP_D1 [33]
DP_D0# [33] DP_D0 [33]
CQ-1019 [DB] NV suggest
INT_DP_AUXN
INT_DP_AUXP
For DP port , prevent backdrive leakage current into GPU
GPUEVENT#_PCH
2
GPUEVENT#
+1.8V_AON
DGPU_PWROK [21,25]
GPIO12 AC detect AC high DC low
DGPU_OPP#_PROCHOT# [57]
Nvidia : suggest to connect this pin to EC only
GPU_THROTTING# [61]
RG45 10K_5%_4
OVERT#
1
DG1RB500V-40
Event
JS-N18-0702 stuff
3
QG9 DMG1012T-7
2
1
RG51 *0_5%_4
Overt shutdown
+1V_GFX [21,24,75] +1.8V_AON [21,24,25,27,28,29,30,70,73,75] +3V [2,9,10,11,13,17,18,19,20,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73,75] CORE_PLLVDD [25]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
2
QG12B 2N7002KDW
23
61
+1.8V_AON
DGPU_OVT# [25]
ZGE
ZGE
ZGE
23 78Friday, May 03, 2019
23 78Friday, May 03, 2019
23 78Friday, May 03, 2019
RG61 10K_1%_4
61
QG11B PJX138K
CG81
0.01u/50V_4
INT_DP_AUXN_Q [33] INT_DP_AUXP_Q [33]
GPUEVENT#_PCH [13]
PEGX_RST# [21,23,25]
RG46 10K_5%_4
DGPU_OVT#
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
N18E-GX-3/9(Display)
N18E-GX-3/9(Display)
N18E-GX-3/9(Display)
1A
1A
1A
Page 24
5
Place under GPUBetween GPU and PS
D D
C C
B B
+1V_GFX
+1.8V_AON
+3V_S5
+3.3V_AON
CG49 22u/6.3V_6
CG756 22u/6.3V_6
RG139 *0_5%_4
RG195 *short_0402
CG54 10u/6.3V_6
CG738 10u/6.3V_6
CG737
4.7u/6.3V_6
CG773
4.7u/6.3V_6
CG65
4.7u/6.3V_6
CG112
0.47u/6.3V_2
CG840
4.7u/6.3V_6
CG795
0.47u/6.3V_2
CG55
0.47u/6.3V_2
CG111
0.47u/6.3V_2
PS_USB_VDDP_IN
CG810
0.47u/6.3V_2
CG798
0.47u/6.3V_2
CG104
0.47u/6.3V_2
CG777
0.47u/6.3V_2
RG1572.49K_1%_4 RG1652.49K_1%_4 RG1371K_1%_4
4
USB_TERMP0 USB_TERMP1 USB_RBIAS
CG796
0.47u/6.3V_2
0.47u/6.3V_2
CG100
0.47u/6.3V_2
CG811
0.47u/6.3V_2
BB15 BC15
AW10 AW11
AW9
BE12
BG6
BH6 BA6
UG1R
6/22 IFPF/USB-C
USB_DVDD USB_DVDD
USB_HVDD USB_HVDD
USB_PLL_HVDD
USB_VDDP
USB_TERMP0
USB_TERMP1
USB_RBIAS
N18E-G3-ES-A1
18/22
3
USB-C
SBU2 SBU1
RX1 RX1
TX1 TX1
TX2 TX2
RX2 RX2
IFPF/USB-C
DP
IFPF_AUX IFPF_AUX
IFPF_L3 IFPF_L3
IFPF_L2 IFPF_L2
IFPF_L1 IFPF_L1
IFPF_L0 IFPF_L0
USB_L0 USB_L0
USB_L1 USB_L1
USB_SCL USB_SDA
GPU_GPIO24_IFPF_HPD[23]
The cap is used to reduce the slew rate of AUX CH
CG68 18P/50V_4
IFPF_AUX-
BM9
IFPF_AUX+
BM8
IFPF_L3-
BK11
IFPF_L3+
BL11
IFPF_L2-
BM11
IFPF_L2+
BM12
IFPF_L1-
BL12
IFPF_L1+
BK12
IFPF_L0-
BK14
IFPF_L0+
BL14
GPU_USB_L0-
BA1
GPU_USB_L0+
BA2
GPU_USB_L1-
BA7
GPU_USB_L1+
BA8
I2C 7-BIT ADDR:0x48
GPU_USB_I2C_SCL
BB8
GPU_USB_I2C_SDA
BB7
RG131
2.2K_5%_4
+1.8V_AON
3
RG133 10K_1%_4
NV USE PJC138K
1
Q64 PJA138K
CG79 0.1u/16V_4 CG78 0.1u/16V_4
CG69 0.1u/16V_4 CG70 0.1u/16V_4
CG71 0.1u/16V_4CG57 CG72 0.1u/16V_4
CG73 0.1u/16V_4 CG74 0.1u/16V_4
CG76 0.1u/16V_4 CG75 0.1u/16V_4
+1.8V_AON
RG132
2.2K_5%_4
GPIO24_IFPF_HPD
2
2
IFPF_AUX­IFPF_AUX+
RG169
100K_1%_4
DP_USB_MUX_AUXN DP_USB_MUX_AUXP
DP_USB_MUX_ML3N DP_USB_MUX_ML3P
DP_USB_MUX_ML2N DP_USB_MUX_ML2P
DP_USB_MUX_ML1N DP_USB_MUX_ML1P
DP_USB_MUX_ML0N DP_USB_MUX_ML0P
GPU_USB_L0- [42] GPU_USB_L0+ [42]
GPU_USB_L1- [42] GPU_USB_L1+ [42]
2
61
Q63B PJT138K
B A
*0_5%_4
RG134
PCB CO-LAYOUT PCB CO-LAYOUT
Vitural-Link USB-C
GPIO24_IFPF_HPD [11,41,57]
RG168
100K_1%_4
+1.8V_AON
5
34
Q63A PJT138K
*0_5%_4
RG129
1
DP_USB_MUX_AUXN [44] DP_USB_MUX_AUXP [44]
DP_USB_MUX_ML3N [44] DP_USB_MUX_ML3P [44]
DP_USB_MUX_ML2N [44] DP_USB_MUX_ML2P [44]
DP_USB_MUX_ML1N [44] DP_USB_MUX_ML1P [44]
DP_USB_MUX_ML0N [44] DP_USB_MUX_ML0P [44]
USB_I2C_SCL USB_I2C_SDA
24
USB_I2C_SCL [41,76]
USB_I2C_SDA [41,76]
+1.8V_AON
5
A A
5
4
GPU_USB_I2C_SCL
GPU_USB_I2C_SDA
3
Q65A
*SSM6N43FU
Q65B
2
*SSM6N43FU
34
61
3ND_MBCLK [23,46,53,54,57]
3ND_MBDATA [23,46,53,54,57]
2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
N18E-GX-3/9 (Display-TC)
N18E-GX-3/9 (Display-TC)
N18E-GX-3/9 (Display-TC)
ZGE
ZGE
ZGE
24 78Friday, May 03, 2019
24 78Friday, May 03, 2019
24 78Friday, May 03, 2019
1
1A
1A
1A
Page 25
5
UG1F
15/22 GND_1/3
A2
GND
A26
GND
A29
GND
A3
GND
A32
GND
A50
GND
A51
GND
AA49
GND
AA8
GND
AB10
GND
AB14
GND
AB15
GND
AB16
GND
AB17
GND
AB18
GND
D D
AB19
GND
AB2
GND
AB20
GND
AB21
GND
AB22
GND
AB23
GND
AB24
GND
AB25
GND
AB26
GND
AB27
GND
AB28
GND
AB29
GND
AB30
GND
AB31
GND
AB32
GND
AB33
GND
AB34
GND
AB35
GND
AB36
GND
AB37
GND
AB38
GND
AB39
GND
AB4
GND
AB43
GND
AB45
GND
AB47
GND
AB49
GND
AB51
GND
AB6
GND
AB8
GND
AD14
GND
AD15
GND
AD16
GND
AD17
GND
AD18
GND
AD19
GND
AD20
GND
AD21
GND
AD22
GND
AD23
GND
AD24
GND
AD25
GND
AD26
GND
AD27
GND
AD28
GND
AD29
GND
AD30
GND
AD31
GND
AD32
GND
AD33
GND
AD34
C C
GND
AD35
GND
AD36
GND
AD37
GND
AD38
GND
AD39
GND
AD44
GND
AE10
GND
AE2
GND
AE4
GND
AE43
GND
AE45
GND
AE47
GND
AE49
GND
AE51
GND
AE6
GND
AE8
GND
AF1
GND
AF19
GND
AF20
GND
AF21
GND
AF22
GND
AF23
GND
AF27
GND
AF28
GND
AF29
GND
AF35
GND
AF36
GND
AF37
GND
AF38
GND
AF39
GND
AF45
GND
AF5
GND
AG14
GND
AG15
GND
AG16
GND
AG17
GND
AG18
GND
AG24
GND
AG25
GND
AG26
GND
AG3
GND
AG30
GND
AG31
GND
AG32
GND
AG33
GND
AG34
GND
AG44
GND
AH10
GND
AH2
GND
AH4
GND
B B
AH43
GND
AH45
GND
AH47
GND
AH49
GND
AH51
GND
N18E-G3-ES-A1
AH6
GND
AH8
GND
AJ14
GND
AJ15
GND
AJ16
GND
AJ17
GND
AJ18
GND
AJ19
GND
AJ2
GND
AJ20
GND
AJ21
GND
AJ22
GND
AJ23
GND
AJ24
GND
AJ25
GND
AJ26
GND
AJ27
GND
AJ28
GND
AJ29
GND
AJ30
GND
AJ31
GND
AJ32
GND
AJ33
GND
AJ34
GND
AJ35
GND
AJ36
GND
AJ37
GND
AJ38
GND
AJ39
GND
AJ9
GND
AK1
GND
AK44
GND
AK47
GND
AL10
GND
AL14
GND
AL15
GND
AL16
GND
AL17
GND
AL18
GND
AL19
GND
AL2
GND
AL20
GND
AL21
GND
AL22
GND
AL23
GND
AL24
GND
AL25
GND
AL26
GND
AL27
GND
AL28
GND
AL29
GND
AL30
GND
AL31
GND
AL32
GND
AL33
GND
AL34
GND
AL35
GND
AL36
GND
AL37
GND
AL38
GND
AL39
GND
AL4
GND
AL43
GND
AL45
GND
AL47
GND
AL49
GND
AL51
GND
AL6
GND
AL8
GND
AM4
GND
AM9
GND
AN14
GND
AN15
GND
AN16
GND
AN17
GND
AN18
GND
AN19
GND
AN20
GND
AN21
GND
AN22
GND
AN23
GND
AN24
GND
AN25
GND
AN26
GND
AN27
GND
AN28
GND
AN29
GND
AN30
GND
AN31
GND
AN32
GND
AN33
GND
AN34
GND
AN35
GND
AN36
GND
AN37
GND
AN38
GND
AN39
GND
AN4
GND
AN5
GND
AN8
GND
AP10
GND
AP2
GND
AP4
GND
AP43
GND
AP45
GND
AP47
GND
AP49
GND
AP51
GND
AP6
GND
AP8
GND
AR14
GND
AR15
GND
AR16
GND
AR17
GND
AR18
GND
AR19
GND
BL34
GND
BC24
GND
6/22
+1.8V_AON
JS-N18-0716
A A
GPIO26_FP_FUSE[23]
UG1G
16/22 GND_2/3
AR20
GND
AR21
GND
AR22
GND
AR23
GND
AR24
GND
AR25
GND
AR26
GND
AR27
GND
AR28
GND
AR29
GND
AR30
GND
AR31
GND
AR32
GND
AR33
GND
AR34
GND
AR35
GND
AR36
GND
AR37
GND
AR38
GND
AR39
GND
AR4
GND
AR52
GND
AR9
GND
AT4
GND
AT5
GND
AT51
GND
AT52
GND
AT8
GND
AU10
GND
AU14
GND
AU15
GND
AU16
GND
AU17
GND
AU18
GND
AU19
GND
AU2
GND
AU20
GND
AU21
GND
AU22
GND
AU23
GND
AU24
GND
AU25
GND
AU26
GND
AU27
GND
AU28
GND
AU29
GND
AU30
GND
AU31
GND
AU32
GND
AU33
GND
AU34
GND
AU35
GND
AU36
GND
AU37
GND
AU38
GND
AU39
GND
AU4
GND
AU45
GND
AU47
GND
AU49
GND
AU51
GND
AU6
GND
AU8
GND
AV4
GND
AV45
GND
AV9
GND
AW14
GND
AW15
GND
AW16
GND
AW17
GND
AW18
GND
AW19
GND
AW20
GND
AW21
GND
AW22
GND
AW23
GND
AW24
GND
AW25
GND
AW26
GND
AW27
GND
AW28
GND
AW29
GND
AW30
GND
AW31
GND
AW32
GND
AW33
GND
AW34
GND
AW35
GND
AW36
GND
AW37
GND
AW38
GND
AW39
GND
AW4
GND
AW46
GND
AW5
GND
AW52
GND
AW8
GND
AY10
GND
AY2
GND
AY4
GND
AY47
GND
AY49
GND
AY51
GND
AY6
GND
AY8
GND
B1
GND
B10
GND
B13
GND
B16
GND
B19
GND
B2
GND
B22
GND
B25
GND
B28
GND
B31
GND
B34
GND
B37
GND
B40
GND
B43
GND
B46
GND
B48
GND
7/22
N18E-G3-ES-A1
JS-N18E-this part need to apply
UG4
1
CG779
VIN#1
2.2u/10V_4
2
VIN#2 VIN#39VOUT
+3V_S5
3
VBIAS
CG729
0.1u/16V_4
4
ON
AOZ1335DI_2
RG125 10K_5%_4
5
B52
GND
B7
GND
BA48
GND
BA9
GND
BB49
GND
BC13
GND
BC16
GND
BC19
GND
BC2
GND
BC22
GND
BC25
GND
BC28
GND
BC31
GND
BC34
GND
BC37
GND
BC4
GND
BC51
GND
BC6
GND
BC8
GND
BD26
GND
BD29
GND
BD32
GND
BD35
GND
BD38
GND
BD52
GND
BE10
GND
BE13
GND
BE15
GND
BE16
GND
BE18
GND
BE19
GND
BE21
GND
BE22
GND
BE24
GND
BE25
GND
BE27
GND
BE28
GND
BE30
GND
BE31
GND
BE33
GND
BE34
GND
BE36
GND
BE37
GND
BE39
GND
BE40
GND
BF2
GND
BF4
GND
BF41
GND
BF6
GND
BG10
GND
BG13
GND
BG16
GND
BG19
GND
BG22
GND
BG25
GND
BG28
GND
BG31
GND
BG34
GND
BG37
GND
BG40
GND
BG42
GND
BG7
GND
BH15
GND
BH18
GND
BH2
GND
BH21
GND
BH24
GND
BH27
GND
BH30
GND
BH33
GND
BH36
GND
BH39
GND
BH42
GND
BH5
GND
BJ10
GND
BJ12
GND
BJ13
GND
BJ14
GND
BJ15
GND
BJ16
GND
BJ17
GND
BJ18
GND
BJ19
GND
BJ20
GND
BJ21
GND
BJ22
GND
BJ23
GND
BJ24
GND
BJ25
GND
BJ26
GND
BJ27
GND
BJ28
GND
BJ29
GND
BJ30
GND
BJ31
GND
BJ32
GND
BJ33
GND
BJ34
GND
BJ35
GND
BJ36
GND
BJ37
GND
BJ38
GND
BJ39
GND
BJ40
GND
BJ41
GND
BJ42
GND
BJ43
GND
BJ7
GND
BK1
GND
BL1
GND
BL10
GND
BL13
GND
BL16
GND
BL19
GND
BL2
GND
BL22
GND
BL25
GND
BL28
GND
BL31
GND
B5
GND
B51
GND
8
CG713
2.2u/10V_4
5
GND
FP_FUSE_GPU
RG124
2.21K_1%_4
UG1H
21/22 GND_3/3
BL40
GND
BL43
GND
BL5
GND
BL7
GND
BM2
GND
BM3
GND
C1
GND
C29
GND
C33
GND
C5
GND
C51
GND
C52
GND
D10
GND
D12
GND
D13
GND
D16
GND
D19
GND
D22
GND
D24
GND
D25
GND
D28
GND
D30
GND
D31
GND
D34
GND
D37
GND
D4
GND
D40
GND
D43
GND
D46
GND
D49
GND
D7
GND
E2
GND
E4
GND
E48
GND
E5
GND
E51
GND
E8
GND
F10
GND
F13
GND
F16
GND
F17
GND
F19
GND
F21
GND
F22
GND
F25
GND
F28
GND
F31
GND
F34
GND
F35
GND
F37
GND
F40
GND
F43
GND
F44
GND
F46
GND
F52
GND
F7
GND
G2
GND
G38
GND
G4
GND
G47
GND
G49
GND
G51
GND
G6
GND
H1
GND
H10
GND
H13
GND
H16
GND
H19
GND
H22
GND
H25
GND
H28
GND
H31
GND
H34
GND
H37
GND
H40
GND
H43
GND
J1
GND
J12
GND
J17
GND
J20
GND
J38
GND
J49
GND
J52
GND
K13
GND
K16
GND
K19
GND
K2
GND
K22
GND
K25
GND
K28
GND
K31
GND
K34
GND
K37
GND
K4
GND
K40
GND
K45
GND
K47
GND
K49
GND
K51
GND
K6
GND
K8
GND
M52
GND
M6
GND
N10
GND
N2
GND
N4
GND
N43
GND
N45
GND
N47
GND
N49
GND
BL37
GND
N18E-G3-ES-A1
BD14
UG1K
20/22 NC/1V8
FP_FUSE_SRC
N18E-G3-ES-A1
N51
GND
N6
GND
N8
GND
P14
GND
P15
GND
P16
GND
P17
GND
P18
GND
P19
GND
P20
GND
P21
GND
P22
GND
P23
GND
P24
GND
P25
GND
P26
GND
P27
GND
P28
GND
P29
GND
P30
GND
P31
GND
P32
GND
P33
GND
P34
GND
P35
GND
P36
GND
P37
GND
P38
GND
P39
GND
P51
GND
R49
GND
R52
GND
T10
GND
T14
GND
T15
GND
T16
GND
T17
GND
T18
GND
T19
GND
T2
GND
T20
GND
T21
GND
T22
GND
T23
GND
T24
GND
T25
GND
T26
GND
T27
GND
T28
GND
T29
GND
T30
GND
T31
GND
T32
GND
T33
GND
T34
GND
T35
GND
T36
GND
T37
GND
T38
GND
T39
GND
T4
GND
T43
GND
T45
GND
T47
GND
T49
GND
T51
GND
T6
GND
T8
GND
U7
GND
U9
GND
V14
GND
V15
GND
V16
GND
V17
GND
V18
GND
V19
GND
V20
GND
V21
GND
V22
GND
V23
GND
V24
GND
V25
GND
V26
GND
V27
GND
V28
GND
V29
GND
V30
GND
V31
GND
V32
GND
V33
GND
V34
GND
V35
GND
V36
GND
V37
GND
V38
GND
V39
GND
V49
GND
V52
GND
W10
GND
W2
GND
W4
GND
W43
GND
Y9
GND
8/22
BA10
1V8_AON
BB14
1V8_AON
BC14
1V8_AON
BD24
NC
BM44
NC
BM45
NC
11/22
4
UG1L
19/22 FBVDDQ
AA10
FBVDDQ
FBVDDQ
AA11
FBVDDQ
FBVDDQ
AA42
FBVDDQ
FBVDDQ
AA43
FBVDDQ
FBVDDQ
AC10
FBVDDQ
FBVDDQ
AC11
FBVDDQ
FBVDDQ
AC42
FBVDDQ
FBVDDQ
AC43
FBVDDQ
FBVDDQ
AD10
FBVDDQ
FBVDDQ
AD11
FBVDDQ
FBVDDQ
AD42
FBVDDQ
FBVDDQ
AD43
FBVDDQ
FBVDDQ
AF10
FBVDDQ
FBVDDQ
AF43
FBVDDQ
FBVDDQ
AG10
FBVDDQ
FBVDDQ
AG11
FBVDDQ
FBVDDQ
AG42
FBVDDQ
FBVDDQ
AG43
FBVDDQ
FBVDDQ
AJ10
FBVDDQ
FBVDDQ
AJ11
FBVDDQ
FBVDDQ
AJ42
FBVDDQ
FBVDDQ
AJ43
FBVDDQ
FBVDDQ
AK10
FBVDDQ
FBVDDQ
AK11
FBVDDQ
FBVDDQ
AK42
FBVDDQ
FBVDDQ
AK43
FBVDDQ
FBVDDQ
AM42
FBVDDQ
FBVDDQ
AM43
FBVDDQ
FBVDDQ
AN43
FBVDDQ
FBVDDQ
AR42
FBVDDQ
FBVDDQ
AR43
FBVDDQ
FBVDDQ
R42
FBVDDQ
FBVDDQ
R43
FBVDDQ
FBVDDQ
U10
FBVDDQ
FBVDDQ
U11
FBVDDQ
FBVDDQ
U43
FBVDDQ
FBVDDQ
V10
FBVDDQ
FBVDDQ
V42
FBVDDQ
FBVDDQ
V43
FBVDDQ
FBVDDQ
Y10
FBVDDQ
FBVDDQ
Y11
FBVDDQ
FBVDDQ
Y42
FBVDDQ
FBVDDQ
Y43
FBVDDQ
FBVDDQ FBVDDQ
FBVDDQ_SENSE
FB_VREF
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CALTERM_GND
12/22
N18E-G3-ES-A1
+1.8V_MAIN
1 2
LG2 HCB1005KF-330T30
0.4A
CG862 22u/6.3V_6
+1.8V_AON
Near GPU Under GPU
follow NV DS NV DS:0.47*3, 1*3, 4.7*3
JS-N18-0710
CG744
CG791
0.47u/6.3V_2
0.47u/6.3V_2
4
CG753
0.47u/6.3V_2
4.7u/6.3V_6
CG757
CG739
4.7u/6.3V_6
FBVDDQ_MEMFBVDDQ_MEM
AT43 K12 K14 K15 K17 K18 K20 K21 K23 K24 K26 K27 K29 K30 K32 K33 K35 K36 K38 K39 K41 L14 L15 L18 L20 L21 L23 L24 L26 L27 L30 L32 L33 L35 L36 L39 M10 M43 P10 P11 P42 P43 R10 R11
E52
FB_VREF_PROBE
P45
FB_CAL_PD_VDDQ
R44
FB_CAL_PU_GND
P44
FB_CAL_TERM_GND
R45
CG856
4.7u/6.3V_6
CG834
4.7u/6.3V_6
JS-N18E-0705 Del
FBVDDQ_MEM
7 X 10u 9 X 22u 1 X 47u
CG386 10u/6.3V_6 CG205 10u/6.3V_6 CG564 10u/6.3V_6 CG543 10u/6.3V_6 CG402 10u/6.3V_6 CG679 10u/6.3V_6 CG680 10u/6.3V_6
CG332 22u/6.3V_6 CG535 22u/6.3V_6
CG284 22u/6.3V_6 CG88 22u/6.3V_6 CG352 22u/6.3V_6 CG565 22u/6.3V_6 CG116 22u/6.3V_6 CG311 22u/6.3V_6
CG292 47u/6.3V_8 CG387 *47u/6.3V_8 CG253 *10u/6.3V_6
follow ZGQ
FBVDDQ_SENSE
FBVDDQ_SENSE [73]
JS-N18-0702 add
RG1071K_1%_4
PLACE CLOSE TO GPU B ALLS
RG111 40.2_1%_4 RG110 40.2_1%_4 RG112 40.2_1%_4
JS-N18E
CORE_PLLVDD
CG838
CG774
0.47u/6.3V_2
0.47u/6.3V_2
JS-N18-0705
CORE_PLLVDD
CG488
CG582
0.47u/6.3V_2
0.47u/6.3V_2
CG690
CG790 1u/6.3V_2
CG421
1u/6.3V_2
1u/6.3V_2
0712: CG197 change to 0201
3
Under GPU
5 X 10u 48 X 0.47u 1 X 47u
CG703 10u/6.3V_6 CG649 10u/6.3V_6 CG617 10u/6.3V_6 CG731 10u/6.3V_6 CG522 10u/6.3V_6
CG372 0.47u/6.3V_2 CG405 0.47u/6.3V_2 CG385 0.47u/6.3V_2 CG459 0.47u/6.3V_2 CG641 0.47u/6.3V_2 CG395 0.47u/6.3V_2 CG517 0.47u/6.3V_2CG484 22u/6.3V_6 CG519 0.47u/6.3V_2 CG646 0.47u/6.3V_2 CG547 0.47u/6.3V_2
CG579 0.47u/6.3V_2 CG461 0.47u/6.3V_2 CG480 0.47u/6.3V_2 CG409 0.47u/6.3V_2 CG503 0.47u/6.3V_2 CG361 0.47u/6.3V_2 CG308 0.47u/6.3V_2 CG520 0.47u/6.3V_2 CG377 0.47u/6.3V_2 CG642 0.47u/6.3V_2
CG375 0.47u/6.3V_2 CG643 0.47u/6.3V_2 CG647 0.47u/6.3V_2 CG374 0.47u/6.3V_2 CG541 0.47u/6.3V_2 CG351 0.47u/6.3V_2 CG391 0.47u/6.3V_2 CG364 0.47u/6.3V_2 CG481 0.47u/6.3V_2 CG400 0.47u/6.3V_2
CG365 0.47u/6.3V_2 CG460 0.47u/6.3V_2 CG362 0.47u/6.3V_2 CG390 0.47u/6.3V_2 CG356 0.47u/6.3V_2 CG381 0.47u/6.3V_2 CG563 0.47u/6.3V_2 CG681 0.47u/6.3V_2 CG640 0.47u/6.3V_2 CG542 0.47u/6.3V_2
CG548 0.47u/6.3V_2 CG392 0.47u/6.3V_2 CG360 0.47u/6.3V_2 CG566 0.47u/6.3V_2 CG399 0.47u/6.3V_2 CG378 0.47u/6.3V_2 CG418 0.47u/6.3V_2
FBVDDQ_MEM
CG858
0.47u/6.3V_2
CG397 0.47u/6.3V_2
CG309 47u/6.3V_8 CG312 *47u/6.3V_8
CG305 *47u/6.3V_8 CG169 *47u/6.3V_8
follow ZGQ
UG1V
13/22 XTAL/PLL
BD12
SP_PLLVDD
BC12
VID_PLLVDD
U42
GPCPLL_AVDD0
AF11
GPCPLL_AVDD1
BB24
XSN_PLLVDD
BJ6
XTALSSIN XTALOUTBUFF
VGA_XTALIN
10p/25V_2
BL6
CG80
EXT_REFCLK_FL
XTALIN
N18E-G3-ES-A1
22/22
YG1 27MHZ/10ppm
3 412
XTALOUTBUFF
JS-N18E-ADD,layout reference demoboard
VGA_XTALOUT
0712: CG191 CG192 change to 0201
3
XTALOUT
BK6 BM6
DGPU_PWR_EN[13]
VGA_XTALOUT_R
XTALOUT_RC
RG44 *short_0402
10p/25V_2
2
2
NVVDD_CORE1
1
DG6 RB500V-40
2
3
QG21 DMG1012T-7
1
RG80 1K _5%_4
Overt temp ckt for NVVDD
JS-N18-0706 Del
DG7RB500V-4021
RG189 1K_5%_4
check power sequence
2
1
DG3 RB500V-40
JS-N18-0706
RG74 *12.1K_1%_4
RG184 *1.21K_1%_4
JS-N18-0706
CG82 820p/50V_4
PEGX_RST#[21,23]
+1.8V_AON
RG78 10K_5%_4
JS-N18-0705
NVVDDPG[70]
GC6FBEN[23]
NVVDD POWER GOOD LOOPBACK
5
JS-N18-0702
NVVDD_PG_LOOP_OVT
34
QG23A PJT138KA
DGPU_OVT#[23]
RG185 10K_5%_4
61
2
QG23B PJT138KA
+1.8V
UG10
2 1
3 5
RG68 *0_5%_4
+1.8V_AON+1.8V
RG187 *0_ 5%_2
1 2
3 5
74LVC1G32GW
4
RG186 *0_ 5%_2
4
UG11
*NL17SZ08DFT2G
RG179 *0_5%_4
+1.8V_AON+1.8V
2 1
1V8_AON_EN [75]
RG63 *0_5%_ 2
RG64 *short_0201
UG6 74LVC1G32GW
3 5
RG180 *0_5%_4
JS-N18-0702 to be confirm
For GCOFF
1V8_MAIN_EN_U
4
1
DG5 RB500V-40
RG73 *short_0201
UG3 74LVC1G32GW
+1V_GFX_PG[75]
4
+1V_GFX_EN [75]
+1.8V_AON+1.8V
+1.8V_MAIN
RG183 10K_5%_4
RG194 *0_5 %_2
RG193 *short_0201
1V8_MAIN_PG
2
JS-N18-0706
1
NVVDD_CORE1
4
2
UG8
NL17SZ08DFT2G
3 5
JS-N18-0706
PEXVDD_EN_U
+1.8V_AON+1.8V
RG75 *0_5%_ 2
2 1
3 5
DGPU_PWR_EN PS_FBVDD_PGOOD
GC6_1V8_MAIN_EN[23]
GC6FBEN
NB_FGC6[23]
for FGC6
XTALOUTBUFF
XTALSSIN
JS-N18-0706
RG37
RG167
10K_5%_4
100K_1%_4
RG41 *short_0402
CG77
PS_FBVDD_PGOOD[33,73]
GC6_1V8_MAIN_EN GC6FBEN NB _FGC6 NVVDD+1.8V_MAIN+1.8V_AON +1V_GFX FBVDDQ
POWER ON
2
1 0 0 ON ON ON ON ON
GC6
0
FGC6
0 1
GPU All power good
JS-N18-0705
NVVDDPG
1
+1.8V_AON
RG77 10K_5%_4
DG4
1
3
2
BAT54AW-L
RG79
10K_5%_4
5
+1.8V_AON
34
QG16A PJT138KA
1
25
NVVDD_CORE1_EN [70]
JS-N18-0706
CG899 820p/50V_4
JS-N18-0706JS-N18-0706
PEXVDD_EN_U
+1.8V_AON+1.8V
RG191 *short_0201
RG192 *0_5 %_2
CG900
0.1u/16V_4 RG190*10K_5%_4
UG9
2
74LVC1G32GW
4
1
GC6FBEN
3 5
+1.8V_AON+1.8V
RG176 *short_0201
RG175 *0_5 %_2
DGPU_PWR_EN
1
1V8_MAIN_EN_U
For GCOFF
OFFON1 0
OFFOFF
OFF
4
2
UG5
NL17SZ08DFT2G
3 5
ON ONON ON O N
+1.8V_AON
RG67
10K_5%_4
DGPU_PWROK
DGPU_PWROK [21,23]
61
QG16B
2
PJT138KA
FBVDDQ_MEM [21,22,27,28,29,30,73] +1.8V_AON [21,23,24,27,28,29,30,70,73,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73,75] +1.8V_MAIN [21,23,35,75] +1.8V [32,68] CORE_PLLVDD [23]
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
N18E-GX -4/9 (MISC)
N18E-GX -4/9 (MISC)
N18E-GX -4/9 (MISC)
Date: Sheet of
Date: Sheet of
Date: Sheet of
CG83 *0.1u/16V_4
+1.8V_AON
FBVDD_EN [73]
1V8_MAIN_EN [75]
ZGE
ZGE
ZGE
25 78Friday, May 03, 2019
25 78Friday, May 03, 2019
25 78Friday, May 03, 2019
1A
1A
1A
Page 26
5
4
3
2
1
UG1I
NVVDD
D D
C C
B B
A A
17/22 VDD_1/3
AA13
VDD
AA14
VDD
AA15
VDD
AA16
VDD
AA17
VDD
AA18
VDD
AA19
VDD
AA20
VDD
AA21
VDD
AA22
VDD
AA23
VDD
AA24
VDD
AA25
VDD
AA26
VDD
AA27
VDD
AA28
VDD
AA29
VDD
AA30
VDD
AA31
VDD
AA32
VDD
AA33
VDD
AA34
VDD
AA35
VDD
AA36
VDD
AA37
VDD
AA38
VDD
AA39
VDD
AA40
VDD
AB13
VDD
AB40
VDD
AC13
VDD
AC14
VDD
AC15
VDD
AC16
VDD
AC17
VDD
AC18
VDD
AC19
VDD
AC20
VDD
AC21
VDD
AC22
VDD
AC23
VDD
AC24
VDD
AC25
VDD
AC26
VDD
AC27
VDD
AC28
VDD
AC29
VDD
AC30
VDD
AC31
VDD
AC32
VDD
AC33
VDD
AC34
VDD
AC35
VDD
AC36
VDD
AC37
VDD
AC38
VDD
AC39
VDD
AC40
VDD
AD13
VDD
AD40
VDD
AE13
VDD
AE14
VDD
AE15
VDD
AE16
VDD
AE17
VDD
AE18
VDD
AE19
VDD
AE20
VDD
AE21
VDD
AE22
VDD
AE23
VDD
AE24
VDD
AE25
VDD
AE26
VDD
AE27
VDD
AT30
VDD
AT31
VDD
AT32
VDD
AT33
VDD
AT34
VDD
AT35
VDD
AT36
VDD
AT37
VDD
AT38
VDD
AT39
VDD
AT40
VDD
AT42
VDD
AU13
VDD
AU40
VDD
AU43
VDD
AV13
VDD
AV14
VDD
AV15
VDD
AV16
VDD
AV17
VDD
AV18
VDD
AV19
VDD
AV20
VDD
AV21
VDD
AV22
VDD
AV23
VDD
AV24
VDD
AV25
VDD
AV26
VDD
AV27
VDD
9/22
NVVDD
AE28
VDD
AE29
VDD
AE30
VDD
AE31
VDD
AE32
VDD
AE33
VDD
AE34
VDD
AE35
VDD
AE36
VDD
AE37
VDD
AE38
VDD
AE39
VDD
AE40
VDD
AF13
VDD
AF14
VDD
AF15
VDD
AF16
VDD
AF17
VDD
AF18
VDD
AF24
VDD
AF25
VDD
AF26
VDD
AF30
VDD
AF31
VDD
AF32
VDD
AF33
VDD
AF34
VDD
AF40
VDD
AG13
VDD
AG19
VDD
AG20
VDD
AG21
VDD
AG22
VDD
AG23
VDD
AG27
VDD
AG28
VDD
AG29
VDD
AG35
VDD
AG36
VDD
AG37
VDD
AG38
VDD
AG39
VDD
AG40
VDD
AH13
VDD
AH14
VDD
AH15
VDD
AH16
VDD
AH17
VDD
AH18
VDD
AH19
VDD
AH20
VDD
AH21
VDD
AH22
VDD
AH23
VDD
AH24
VDD
AH25
VDD
AH26
VDD
AH27
VDD
AH28
VDD
AH29
VDD
AH30
VDD
AH31
VDD
AH32
VDD
AH33
VDD
AH34
VDD
AH35
VDD
AH36
VDD
AH37
VDD
AH38
VDD
AV28
VDD
AV29
VDD
AV30
VDD
AV31
VDD
AV32
VDD
AV33
VDD
AV34
VDD
AV35
VDD
AV36
VDD
AV37
VDD
AV38
VDD
AV39
VDD
AV40
VDD
AV42
VDD
AV43
VDD
AV44
VDD
AW13
VDD
AW40
VDD
AW42
VDD
AW43
VDD
AW44
VDD
AW45
VDD
AY13
VDD
AY14
VDD
AY15
VDD
AY16
VDD
AY17
VDD
AY18
VDD
AY19
VDD
AY20
VDD
AY21
VDD
AY22
VDD
AY23
VDD
AY24
VDD
AY25
VDD
N18E-G3-ES-A1
5
UG1J
NVVDD NVVDD
AH39 AH40
AJ13
AJ40 AK13 AK14 AK15 AK16 AK17 AK18 AK19 AK20 AK21 AK22 AK23 AK24 AK25 AK26 AK27 AK28 AK29 AK30 AK31 AK32 AK33 AK34 AK35 AK36 AK37 AK38 AK39 AK40
AL13
AL40 AM13 AM14 AM15 AM16 AM17 AM18 AM19 AM20 AM21 AM22 AM23 AM24 AM25 AM26 AM27 AM28 AM29 AM30 AM31 AM32 AM33 AM34 AM35 AM36 AM37 AM38 AM39 AM40 AN13 AN40 AP13 AP14 AP15 AP16 AP17 AP18 AP19 AP20 AP21 AP22 BD41 BD46 BD47 BD48 BD49 BD50 BD51 BE41 BE42 BE43 BE46 BE47
18/22 VDD_2/3
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
N18E-G3-ES-A1
10/22
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
NVVDD_SENSE
GND_SENSE
AP23 AP24 AP25 AP26 AP27 AP28 AP29 AP30 AP31 AP32 AP33 AP34 AP35 AP36 AP37 AP38 AP39 AP40 AR13 AR40 AT13 AT14 AT15 AT16 AT17 AT18 AT19 AT20 AT21 AT22 AT23 AT24 AT25 AT26 AT27 AT28 AT29 AY26 AY27 AY28 AY29 AY30 AY31 AY32 AY33 AY34 AY35 AY36 AY37 AY38 AY39 AY40 AY43 AY45 BA43 BA44 BA45 BA46 BA47 BB38 BB39 BB45 BB46 BB47 BB48 BC38 BC39 BC40 BC41 BC45 BC47 BC49 BD39 BE48 BE49 BE50 BE51 BE52 BF42 BF44 BF45 BF47 BF49 BF51 BG43 BG44
BK45 BL45
Near GPU
NVVDD
CG902 330u/2V_7343H1.9 CG903 330u/2V_7343H1.9 CG901 330u/2V_7343H1.9
NVVDD
7 X 47u 4 X 22u
Under GPU
VGPU_CORE_SENSE [70] VSS_GPU_SENSE [70]
4
follow ZGQ
+
+
+
3 X 330u
CG736 47u/6.3V_8 CG486 47u/6.3V_8 CG725 47u/6.3V_8 CG766 0.47u/6.3V_2
CG527 22u/6.3V_6 CG561 22u/6.3V_6 CG722 22u/6.3V_6 CG750 22u/6.3V_6
23 X 10u
CG842 10u/6.3V_6 CG749 10u/6.3V_6 CG692 10u/6.3V_6 CG606 0.47u/6.3V_2 CG706 10u/6.3V_6 CG854 10u/6.3V_6 CG752 10u/6.3V_6 CG695 10u/6.3V_6 CG776 10u/6.3V_6 CG808 10u/6.3V_6 CG562 10u/6.3V_6 CG630 10u/6.3V_6 CG861 10u/6.3V_6 CG812 10u/6.3V_6 CG859 10u/6.3V_6 CG751 10u/6.3V_6 CG758 10u/6.3V_6 CG843 10u/6.3V_6 CG705 10u/6.3V_6 CG636 10u/6.3V_6 CG639 10u/6.3V_6 CG633 10u/6.3V_6 CG852 10u/6.3V_6 CG497 10u/6.3V_6
CG578 47u/6.3V_8 CG689 47u/6.3V_8 CG482 47u/6.3V_8 CG554 47u/6.3V_8
CG708 *22u/6.3V_6 CG853 0.47u/6.3V_2 CG857 *22u/6.3V_6 CG709 *22u/6.3V_6 CG864 *22u/6.3V_6
ZGQ:330*3 NV DS:470*2
follow ZGQ ZGQ:47*7(8), 22*4(4) NV DS:47*3, 22*4
NVVDD NVVDD NVVDD
185 X 0.47u
CG632 0.47u/6.3V_2 CG718 0.47u/6.3V_2 CG499 0.47u/6.3V_2 CG576 0.47u/6.3V_2 CG559 0.47u/6.3V_2 CG495 0.47u/6.3V_2 CG545 0.47u/6.3V_2 CG671 0.47u/6.3V_2 CG668 0.47u/6.3V_2 CG733 0.47u/6.3V_2
CG760 0.47u/6.3V_2 CG494 0.47u/6.3V_2 CG498 0.47u/6.3V_2 CG714 0.47u/6.3V_2 CG605 0.47u/6.3V_2 CG650 0.47u/6.3V_2 CG420 0.47u/6.3V_2 CG625 0.47u/6.3V_2 CG765 0.47u/6.3V_2 CG732 0.47u/6.3V_2
CG602 0.47u/6.3V_2 CG560 0.47u/6.3V_2 CG580 0.47u/6.3V_2 CG772 0.47u/6.3V_2 CG496 0.47u/6.3V_2 CG607 0.47u/6.3V_2 CG719 0.47u/6.3V_2 CG759 0.47u/6.3V_2 CG532 0.47u/6.3V_2 CG595 0.47u/6.3V_2
CG570 0.47u/6.3V_2 CG716 0.47u/6.3V_2 CG615 0.47u/6.3V_2 CG616 0.47u/6.3V_2 CG500 0.47u/6.3V_2 CG473 0.47u/6.3V_2 CG604 0.47u/6.3V_2 CG613 0.47u/6.3V_2 CG501 0.47u/6.3V_2 CG720 0.47u/6.3V_2
CG438 0.47u/6.3V_2 CG763 0.47u/6.3V_2 CG465 0.47u/6.3V_2 CG629 0.47u/6.3V_2 CG710 0.47u/6.3V_2 CG601 0.47u/6.3V_2 CG743 0.47u/6.3V_2 CG770 0.47u/6.3V_2 CG627 0.47u/6.3V_2 CG667 0.47u/6.3V_2
CG675 0.47u/6.3V_2 CG721 0.47u/6.3V_2 CG652 0.47u/6.3V_2 CG715 0.47u/6.3V_2 CG466 0.47u/6.3V_2 CG411 0.47u/6.3V_2 CG477 0.47u/6.3V_2 CG699 0.47u/6.3V_2 CG474 0.47u/6.3V_2 CG614 0.47u/6.3V_2
CG608 0.47u/6.3V_2 CG697 0.47u/6.3V_2 CG663 0.47u/6.3V_2 CG525 0.47u/6.3V_2 CG768 0.47u/6.3V_2 CG467 0.47u/6.3V_2 CG767 0.47u/6.3V_2 CG558 0.47u/6.3V_2 CG457 0.47u/6.3V_2 CG471 0.47u/6.3V_2
CG742 0.47u/6.3V_2 CG769 0.47u/6.3V_2 CG598 0.47u/6.3V_2 CG526 0.47u/6.3V_2 CG609 0.47u/6.3V_2 CG536 0.47u/6.3V_2 CG468 0.47u/6.3V_2 CG556 0.47u/6.3V_2 CG660 0.47u/6.3V_2 CG491 0.47u/6.3V_2
CG530 0.47u/6.3V_2 CG449 0.47u/6.3V_2 CG638 0.47u/6.3V_2 CG635 0.47u/6.3V_2 CG696 0.47u/6.3V_2 CG590 0.47u/6.3V_2 CG435 0.47u/6.3V_2 CG755 0.47u/6.3V_2 CG626 0.47u/6.3V_2 CG546 0.47u/6.3V_2
CG518 0.47u/6.3V_2 CG529 0.47u/6.3V_2 CG662 0.47u/6.3V_2 CG551 0.47u/6.3V_2 CG472 0.47u/6.3V_2 CG693 0.47u/6.3V_2 CG571 0.47u/6.3V_2 CG761 0.47u/6.3V_2 CG476 0.47u/6.3V_2 CG419 0.47u/6.3V_2
CG413 0.47u/6.3V_2 CG492 0.47u/6.3V_2 CG603 0.47u/6.3V_2 CG444 0.47u/6.3V_2 CG698 0.47u/6.3V_2 CG658 0.47u/6.3V_2 CG746 0.47u/6.3V_2 CG453 0.47u/6.3V_2 CG717 0.47u/6.3V_2 CG597 0.47u/6.3V_2
CG659 0.47u/6.3V_2 CG631 0.47u/6.3V_2 CG762 0.47u/6.3V_2 CG661 0.47u/6.3V_2 CG447 0.47u/6.3V_2 CG592 0.47u/6.3V_2 CG479 0.47u/6.3V_2 CG475 0.47u/6.3V_2 CG448 0.47u/6.3V_2 CG664 0.47u/6.3V_2
CG591 0.47u/6.3V_2 CG452 0.47u/6.3V_2
CG700 0.47u/6.3V_2 CG754 0.47u/6.3V_2 CG741 0.47u/6.3V_2 CG655 0.47u/6.3V_2 CG599 0.47u/6.3V_2 CG552 0.47u/6.3V_2 CG674 0.47u/6.3V_2
CG424 0.47u/6.3V_2 CG634 0.47u/6.3V_2
CG573 0.47u/6.3V_2 CG845 0.47u/6.3V_2 CG470 0.47u/6.3V_2 CG440 0.47u/6.3V_2 CG524 0.47u/6.3V_2 CG628 0.47u/6.3V_2 CG493 0.47u/6.3V_2
CG450 0.47u/6.3V_2 CG656 0.47u/6.3V_2 CG528 0.47u/6.3V_2 CG669 0.47u/6.3V_2 CG454 0.47u/6.3V_2 CG594 0.47u/6.3V_2 CG436 0.47u/6.3V_2 CG666 0.47u/6.3V_2 CG651 0.47u/6.3V_2 CG442 0.47u/6.3V_2
CG456 0.47u/6.3V_2 CG550 0.47u/6.3V_2 CG657 0.47u/6.3V_2 CG569 0.47u/6.3V_2 CG443 0.47u/6.3V_2 CG694 0.47u/6.3V_2 CG531 0.47u/6.3V_2 CG464 0.47u/6.3V_2 CG673 0.47u/6.3V_2 CG437 0.47u/6.3V_2
CG445 0.47u/6.3V_2 CG502 0.47u/6.3V_2 CG764 0.47u/6.3V_2
CG439 0.47u/6.3V_2 CG672 0.47u/6.3V_2 CG665 0.47u/6.3V_2 CG860 0.47u/6.3V_2 CG469 0.47u/6.3V_2 CG637 0.47u/6.3V_2
CG557 0.47u/6.3V_2 CG489 0.47u/6.3V_2 CG653 0.47u/6.3V_2 CG596 0.47u/6.3V_2 CG446 0.47u/6.3V_2 CG533 0.47u/6.3V_2 CG572 0.47u/6.3V_2 CG654 0.47u/6.3V_2 CG441 0.47u/6.3V_2 CG670 0.47u/6.3V_2
CG728 0.47u/6.3V_2 CG610 0.47u/6.3V_2 CG451 0.47u/6.3V_2 CG412 0.47u/6.3V_2 CG600 0.47u/6.3V_2
3
NVVDD NVVDD
UG1M
22/22 VDD_3/3
BG45
VDD
BG46
VDD
BG47
VDD
BG48
VDD
BG49
VDD
BG50
VDD
BG51
VDD
BG52
VDD
BH44
VDD
BH45
VDD
BH47
VDD
BH48
VDD
BH49
VDD
BH50
VDD
BH51
VDD
BH52
VDD
BJ44
VDD
BJ45
VDD
BJ46
VDD
BJ47
VDD
BJ48
VDD
BJ49
VDD
BJ50
VDD
BJ51
VDD
BJ52
VDD
BK47
VDD
BK48
VDD
BK49
VDD
BK50
VDD
BK51
VDD
BK52
VDD
BL46
VDD
BL47
VDD
BL48
VDD
BL49
VDD
BL50
VDD
BL51
VDD
BL52
VDD
BM47
VDD
BM48
VDD
BM49
VDD
BM50
VDD
BM51
VDD
N13
VDD
N14
VDD
N15
VDD
N16
VDD
N17
VDD
N18
VDD
N19
VDD
N20
VDD
N21
VDD
N22
VDD
N23
VDD
N24
VDD
N25
VDD
N26
VDD
N27
VDD
N28
VDD
N29
VDD
N30
VDD
N31
VDD
N32
VDD
N33
VDD
N34
VDD
N35
VDD
N36
VDD
N37
VDD
N38
VDD
N39
VDD
N40
VDD
P13
VDD
P40
VDD
R13
VDD
R14
VDD
R15
VDD
R16
VDD
R17
VDD
R18
VDD
R19
VDD
R20
VDD
R21
VDD
R22
VDD
R23
VDD
R24
VDD
R25
VDD
R26
VDD
R27
VDD
R28
VDD
R29
VDD
R30
VDD
R31
VDD
R32
VDD
R33
VDD
R34
VDD
R35
VDD
R36
VDD
R37
VDD
R38
VDD
R39
VDD
R40
VDD
T13
VDD
T40
VDD
U13
VDD
U14
VDD
U15
VDD
U16
VDD
U17
VDD
U18
VDD
U19
VDD
U20
VDD
U21
VDD
U22
VDD
U23
VDD
U24
VDD
U25
VDD
U26
VDD
U27
VDD
U28
VDD
U29
VDD
U30
VDD
U31
VDD
U32
VDD
U33
VDD
U34
VDD
U35
VDD
U36
VDD
U37
VDD
U38
VDD
U39
VDD
U40
VDD
V13
VDD
V40
VDD
W13
VDD
W14
VDD
W15
VDD
W16
VDD
W17
VDD
W18
VDD
W19
VDD
W20
VDD
W21
VDD
W22
VDD
W23
VDD
W24
VDD
W25
VDD
W26
VDD
W27
VDD
W28
VDD
W29
VDD
W30
VDD
W31
VDD
W32
VDD
W33
VDD
W34
VDD
W35
VDD
W36
VDD
W37
VDD
W38
VDD
W39
VDD
W40
VDD
Y13
VDD
Y40
VDD
13/22
N18E-G3-ES-A1
2
26
NVVDD [70,71,72]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
N18E-GX-5/9 (Power)
N18E-GX-5/9 (Power)
N18E-GX-5/9 (Power)
1
ZGE
ZGE
ZGE
26 78Friday, May 03, 2019
26 78Friday, May 03, 2019
26 78Friday, May 03, 2019
1A
1A
1A
Page 27
5
MEMORY: FBA Partition 31..0
FBVDDQ _MEM [21,22 ,25,28,29 ,30,73] +1.8V_AO N [21,23,2 4,25,28,2 9,30,70,73 ,75]
VDD#A14 VDD#E10
VDD#H13
VDD#P10
VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14 VDDQ#F11
VDDQ#F4
VDDQ#H1
VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1 VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#V10
CG619
0.47u/6.3V _2
VDD#A1
VDD#E5 VDD#H2
VDD#L13
VDD#L2 VDD#P5
VDD#V1
VPP#A5 VPP#V5
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
A10 A5 V10 V5
CG682
0.47u/6.3V _2
+1.8V_AO N
FBA_CMD [33:0][21,2 7]
CG324
0.47u/6.3V _2
VMA_DQ[3 1:0][21]
M11
VRAM6B
VMA_DQ0
G2
DQ0_A/DQ7_A
VMA_DQ1
B3
DQ1_A/DQ2_A
VMA_DQ2
F2
DQ2_A/DQ6_A
VMA_DQ3
E3
DQ3_A/DQ4_A
VMA_DQ4
QD0~7
VMA_WC K01[21] VMA_WC K01#[21]
QD8~15
VMA_WC KB01[21 ] VMA_WC KB01#[21]
VMA_DQ5 VMA_DQ6 VMA_DQ7
FBA_ED C0 FBA_DB I0
VMA_WC K01 VMA_WC K01#
VMA_DQ8 VMA_DQ9 VMA_DQ1 0 VMA_DQ1 1 VMA_DQ1 2 VMA_DQ1 3 VMA_DQ1 4 VMA_DQ1 5
FBA_ED C1 FBA_DB I1
VMA_WC KB01 VMA_WC KB01#
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
X16 X8
CHANGE FBVDDQ TO FBVDDQ_MEM
CG509
0.47u/6.3V _2
CG515
0.47u/6.3V _2
CG462
0.47u/6.3V _2
CG621
0.47u/6.3V _2
VRAM6A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
D D
C C
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM
Right under DRAM Right under DRAM
CG589
0.47u/6.3V _2
40OHM_NETCLASS1 40OHM_NETCLASS1
JS-N18-0709 swap
NORMAL
QD24~31
VMA_WC KB23[21] VMA_WC KB23#[21]
NC NC NC
QD16~23
NC NC NC NC NC
GND NC
NC NC
CG740
CG818
0.47u/6.3V _2
0.47u/6.3V _2
VMA_WC K23[21] VMA_WC K23#[21]
CG317
0.47u/6.3V _2
FBA_DB I0 FBA_DB I1 FBA_DB I2 FBA_DB I3 FBA_DB I4 FBA_DB I5 FBA_DB I6 FBA_DB I7
CG821
0.47u/6.3V _2
4
FBA_ED C[7:0][2 1,27]FB A_DBI[7 :0][21 ,27]
VRAM6C
VMA_DQ2 4 VMA_DQ2 5 VMA_DQ2 6 VMA_DQ2 7 VMA_DQ2 8 VMA_DQ2 9 VMA_DQ3 0 VMA_DQ3 1
FBA_ED C3 FBA_DB I3
VMA_WC KB23 VMA_WC KB23#
VMA_DQ1 6 VMA_DQ1 7 VMA_DQ1 8 VMA_DQ1 9 VMA_DQ2 0 VMA_DQ2 1 VMA_DQ2 2 VMA_DQ2 3
FBA_ED C2 FBA_DB I2
VMA_WC K23 VMA_WC K23#
NORMAL
N2
DQ0_B/DQ6_B
P3
DQ1_B/DQ4_B
M2
DQ2_B/DQ7_B
P2
DQ3_B/DQ5_B
U3
DQ4_B/DQ2_B
V3
DQ5_B/DQ1_B
U4
DQ6_B/DQ0_B
U2
DQ7_B/DQ3_B
T2
EDC0_B
R2
DBI0_N_B
R4
WCK_t_B/NC
R5
WCK_c_B/NC
P13
DQ8_B/DQ13_B
U13
DQ9_B/DQ11_B
M13
DQ10_B/DQ15_B
N13
DQ11_B/DQ14_B
U12
DQ12_B/DQ10_B
P12
DQ13_B/DQ12_B
V12
DQ14_B/DQ9_B
U11
DQ15_B/DQ8_B
T13
EDC1_B
R13
DBI1_n_B
R11
WCK1_t_B
R10
WCK1_c_B
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM
Close to DRAM Close to DRAM
CG242
CG401
0.47u/6.3V _2
0.47u/6.3V _2
CG234
0.47u/6.3V _2
FBA_ED C0 FBA_ED C1 FBA_ED C2 FBA_ED C3 FBA_ED C4 FBA_ED C5 FBA_ED C6 FBA_ED C7
VMA_CLK 0#[21] VMA_CLK 0[21]
CG735
0.47u/6.3V _2
CG593
0.47u/6.3V _2
FBA_CMD 0 FBA_CMD 9 FBA_CMD 8 FBA_CMD 32 FBA_CMD 7 FBA_CMD 11 FBA_CMD 15 FBA_CMD 14 FBA_CMD 3 FBA_CMD 1 FBA_CMD 6 FBA_CMD 10
FBA_CMD 4 FBA_CMD 12 FBA_CMD 5 FBA_CMD 13 FBA_CMD 7 FBA_CMD 11 FBA_CMD 15 FBA_CMD 14 FBA_CMD 3 FBA_CMD 1 FBA_CMD 6 FBA_CMD 10
FBA_CMD 2
VMA_CLK 0# VMA_CLK 0
CG126
0.47u/6.3V _2
3
FBVDDQ _MEM FBVDDQ _MEM
CG685
CG146
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM
CG575 330u/2 V_7343 H1.9
+
CG819
0.47u/6.3V _2
CG816
0.47u/6.3V _2
follow ZGQ add 330*1(OC issue)
H3
G11
G4
H12
H5
H10
J12 J11
J4 J3 J5
G10
L3
M11
M4
L12
L5 L10 K12 K11
K4
K3
K5 M10
J1
K10
J10
VRAM6D
CA0_A CA1_A CA2_A CA3_A CA4_A CA5_A CA6_A CA7_A CA8_A CA9_A CABI_n_A CKE_n_A
CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B CA7_B CA8_B CA9_B CABI_n_B CKE_n_B
RESET_n
CK_c CK_t
MT61K25 6M32JE-16 :A
VREFC
TDO TMS
ZQ_A ZQ_B
NC#G5 NC#M5
CG805
0.47u/6.3V _2
FBA_VR EFC
K1
SNN_FBA_ TCK0
N5
TCK
SNN_FBA_ TDI0
F10
TDI
SNN_FBA_ TDO0
N10
SNN_FBA_ TMS0
F5
FBA_ZQ _1_A
J14 K14
FBA_ZQ _1_B
SNN_FBA_ RFU_G5
G5
SNN_FBA_ RFU_M5
M5
CG711
0.47u/6.3V _2
FBA_VR EFC [27 ]
TPG47 TPG51 TPG50 TPG49
RG11512 1_1%_4
RG11312 1_1%_4
CQ-0724 [SI] Change PN CS1121 2FB24
TPG46 TPG45
CG133
CG199
0.47u/6.3V _2
0.47u/6.3V _2
CG730
0.47u/6.3V _2
CG823
CG328
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBV DDQ_MEM
CG272
CG25
22u/6.3V_ 6
22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
Close to DRAM Close to DRAM
CG22
CG10
10u/6.3V_ 6
10u/6.3V_ 6
+1.8V_AO N
option
CG16
4.7u/6.3V_ 6
CG534
0.47u/6.3V _2
CG383
0.47u/6.3V _2
CG19
0.47u/6.3V _2
CG231 22u/6.3V_ 6
CG21 10u/6.3V_ 6
CG624
0.47u/6.3V _2
CG18
0.47u/6.3V _2
2
CG817
0.47u/6.3V _2
Around DRAMAround DRAM
CG8 22u/6.3V_ 6
CG23 10u/6.3V_ 6
CG15
0.47u/6.3V _2
CG285 22u/6.3V_ 6
CG12 10u/6.3V_ 6
CG307
0.47u/6.3V _2
CG14
0.47u/6.3V _2
CG238 22u/6.3V_ 6
CG11 10u/6.3V_ 6
CG417
0.47u/6.3V _2
JS-N18-0706
CG425
0.47u/6.3V _2
VREFC IS NOT USED IN x16 CONFIGURATION 1K OHM PULL-DOWN IS IN PLACE OF THE 1.33K FOR R104
MEM_VREF _CTL[23,28 ,29,30]
FBVDDQ _MEM
RG5
*549_1% _4
RG2
1K_1%_ 4
MEM_VREF_CTL
RG3
*931_1% _4
2
MEM_VREF_CTL_QA
3
QG2 *PJC138 K
1
1
VREFC_VMA1 0.4MM=16mils
FBA_VR EFC
CG835
*820p/50 V_4
27
FBA_VR EFC [27 ]
MEMORY: FBA Partition 63..32
40OHM_NETCLASS1 40OHM_NETCLASS1
M12
VRAM8B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
X16 X8
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
VDD#A1 VDD#A14 VDD#E10
VDD#E5 VDD#H13
VDD#H2
VDD#L13
VDD#L2 VDD#P10
VDD#P5
VDD#V1 VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14 VDDQ#F11
VDDQ#F4
VDDQ#H1
VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1 VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
FBA_CMD [33:0][21,2 7]
VMA_DQ[6 3:32][21]
QD32~39
VMA_WC K45[21] VMA_WC K45#[21]
QD40~47
VMA_WC KB45[21 ] VMA_WC KB45#[21]
VMA_DQ3 6 VMA_DQ3 2 VMA_DQ3 7 VMA_DQ3 4 VMA_DQ3 9 VMA_DQ3 8 VMA_DQ3 3 VMA_DQ3 5
FBA_ED C4 FBA_DB I4
VMA_WC K45 VMA_WC K45#
VMA_DQ4 3 VMA_DQ4 7 VMA_DQ4 0 VMA_DQ4 1 VMA_DQ4 5 VMA_DQ4 4 VMA_DQ4 2 VMA_DQ4 6
FBA_ED C5 FBA_DB I5
VMA_WC KB45 VMA_WC KB45#
VRAM8A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
B B
A A
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
JS-N18-0709 swap
QD56~63
NC NC
QD48~55
NC NC NC NC NC NC
GND NC
NC NC
FBA_DB I0 FBA_DB I1 FBA_DB I2 FBA_DB I3 FBA_DB I4 FBA_DB I5 FBA_DB I6 FBA_DB I7
VMA_WC KB67[21 ] VMA_WC KB67#[21]
VMA_WC K67[21] VMA_WC K67#[21]
FBA_ED C[7:0][2 1,27]FB A_DBI[7 :0][21 ,27]
VMA_DQ6 3 VMA_DQ6 1 VMA_DQ6 2 VMA_DQ6 0 VMA_DQ5 9 VMA_DQ5 6 VMA_DQ5 7 VMA_DQ5 8
FBA_ED C7 FBA_DB I7
VMA_WC KB67 VMA_WC KB67#
VMA_DQ5 1 VMA_DQ4 8 VMA_DQ5 5 VMA_DQ5 4 VMA_DQ5 3 VMA_DQ5 2 VMA_DQ5 0 VMA_DQ4 9
FBA_ED C6 FBA_DB I6
VMA_WC K67 VMA_WC K67#
N2
P3
M2
P2
U3
V3 U4 U2
T2 R2
R4 R5
P13 U13
M13
N13 U12 P12 V12 U11
T13 R13
R11 R10
VRAM8C
NORMAL
DQ0_B/DQ6_B DQ1_B/DQ4_B DQ2_B/DQ7_B DQ3_B/DQ5_B DQ4_B/DQ2_B DQ5_B/DQ1_B DQ6_B/DQ0_B DQ7_B/DQ3_B
EDC0_B DBI0_N_B
WCK_t_B/NC WCK_c_B/NC
DQ8_B/DQ13_B DQ9_B/DQ11_B DQ10_B/DQ15_B DQ11_B/DQ14_B DQ12_B/DQ10_B DQ13_B/DQ12_B DQ14_B/DQ9_B DQ15_B/DQ8_B
EDC1_B DBI1_n_B
WCK1_t_B WCK1_c_B
MT61K25 6M32JE-16 :A
FBA_ED C0 FBA_ED C1 FBA_ED C2 FBA_ED C3 FBA_ED C4 FBA_ED C5 FBA_ED C6 FBA_ED C7
VMA_CLK 1#[21] VMA_CLK 1[21]
FBA_CMD 20 FBA_CMD 28 FBA_CMD 21 FBA_CMD 29 FBA_CMD 23 FBA_CMD 27 FBA_CMD 30 FBA_CMD 31 FBA_CMD 19 FBA_CMD 17 FBA_CMD 22 FBA_CMD 26
FBA_CMD 16 FBA_CMD 25 FBA_CMD 24 FBA_CMD 33 FBA_CMD 23 FBA_CMD 27 FBA_CMD 30 FBA_CMD 31 FBA_CMD 19 FBA_CMD 17 FBA_CMD 22 FBA_CMD 26
FBA_CMD 18
VMA_CLK 1# VMA_CLK 1
H3
G11
G4
H12
H5
H10
J12 J11
G10
M11
M4 L12
L10 K12 K11
K4
K3
K5 M10
K10
J10
FBVDDQ _MEM FBVDDQ _MEM
CG416
CG747
0.47u/6.3V _2
TPG65 TPG60 TPG61 TPG63
RG11712 1_1%_4
RG11612 1_1%_4
TPG64 TPG62
CG549
0.47u/6.3V _2
0.47u/6.3V _2
VREFC_VMA1 0.4MM=16mils
FBA_VR EFC
CQ-0724 [SI] Change PN CS1121 2FB24
VRAM8D
CA0_A CA1_A CA2_A CA3_A CA4_A CA5_A CA6_A CA7_A
J4
CA8_A
J3
CA9_A
J5
CABI_n_A CKE_n_A
L3
CA0_B CA1_B CA2_B CA3_B
L5
CA4_B CA5_B CA6_B CA7_B CA8_B CA9_B CABI_n_B CKE_n_B
J1
RESET_n
CK_c CK_t
MT61K25 6M32JE-16 :A
VREFC
NC#G5 NC#M5
CG404
0.47u/6.3V _2
K1
SNN_FBA_ TCK1
N5
TCK
SNN_FBA_ TDI1
F10
TDI
SNN_FBA_ TDO1
N10
TDO
SNN_FBA_ TMS1
F5
TMS
FBA_ZQ _2_A
J14
ZQ_A
K14
ZQ_B
FBA_ZQ _2_B
SNN_FBA_ RFU_G5_1
G5
SNN_FBA_ RFU_M5_1
M5
CG748
0.47u/6.3V _2
FBA_VR EFC [2 7]
CG341
0.47u/6.3V _2
CG321
0.47u/6.3V _2
FBVDDQ _MEM FBVDDQ _MEM
Around DRAM Around DRAM
CG271 22u/6.3V_ 6
FBVDDQ _MEM FB VDDQ_ME M
Close to DRAM Close to DRAM
CG235 10u/6.3V_ 6
+1.8V_AO N
option
CG30
4.7u/6.3V_ 6
CG43 22u/6.3V_ 6
CG27 10u/6.3V_ 6
CG322
0.47u/6.3V _2
CG415
0.47u/6.3V _2
CG150 22u/6.3V_ 6
CG28 10u/6.3V_ 6
CG334
0.47u/6.3V _2
CG458
0.47u/6.3V _2
CG115 10u/6.3V_ 6
CG723
0.47u/6.3V _2
CG157 22u/6.3V_ 6
CG745
0.47u/6.3V _2
CG162 10u/6.3V_ 6
CG128
0.47u/6.3V _2
CG44 22u/6.3V_ 6
CG691
0.47u/6.3V _2
CG287 10u/6.3V_ 6
CG291 22u/6.3V_ 6
CG820
0.47u/6.3V _2
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG510
0.47u/6.3V _2
CG333
0.47u/6.3V _2
CG355
0.47u/6.3V _2
CG366
0.47u/6.3V _2
5
CG323
0.47u/6.3V _2
CG347
0.47u/6.3V _2
CG433
0.47u/6.3V _2
CG320
0.47u/6.3V _2
CG712
0.47u/6.3V _2
CG512
0.47u/6.3V _2
CG514
0.47u/6.3V _2
CG318
0.47u/6.3V _2
CG588
CG511
CG319
0.47u/6.3V _2
4
0.47u/6.3V _2
0.47u/6.3V _2
CG701
0.47u/6.3V _2
CG326
0.47u/6.3V _2
CG339
0.47u/6.3V _2
CG734
0.47u/6.3V _2
CG707
0.47u/6.3V _2
CG346
CG806
0.47u/6.3V _2
0.47u/6.3V _2
3
CG371
0.47u/6.3V _2
CG508
0.47u/6.3V _2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
N18E-GX-6/9(GDDR6)
N18E-GX-6/9(GDDR6)
N18E-GX-6/9(GDDR6)
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
ZGE
1A
1A
1A
27 78Friday, May 03, 2019
27 78Friday, May 03, 2019
27 78Friday, May 03, 2019
Page 28
5
MEMORY: FBB Partition 31..0
FBVDDQ _MEM [21,22 ,25,27,29 ,30,73] +1.8V_AO N [21,23,24 ,25,27,29 ,30,70,73,7 5]
VRAM3A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
D D
C C
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM FBVDDQ_ MEM
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG262
0.47u/6.3V _2
VDD#H13
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14
VDDQ#F11
VDDQ#F4
VDDQ#H1 VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1
VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
CG201
0.47u/6.3V _2
VDD#A1 VDD#A14 VDD#E10
VDD#E5
VDD#H2 VDD#L13
VDD#L2 VDD#P10
VDD#P5
VDD#V1 VDD#V14
VPP#A10
VPP#A5 VPP#V10
VPP#V5
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
A10 A5 V10 V5
CG158
0.47u/6.3V _2
+1.8V_AO N
CG264
0.47u/6.3V _2
FBB_CMD [33:0][22,28 ]
VMB_DQ[3 1:0][22]
QD8~15
QD0~7
VMB_WC K01[22] VMB_WC K01#[22]
VMB_WC KB01[22 ] VMB_WC KB01#[22]
CG200
0.47u/6.3V _2
CG137
0.47u/6.3V _2
VMB_DQ7 VMB_DQ2 VMB_DQ0 VMB_DQ5 VMB_DQ1 VMB_DQ4 VMB_DQ3 VMB_DQ6
FBB_ED C0 FBB_DB I0
VMB_WC K01 VMB_WC K01#
VMB_DQ1 3 VMB_DQ1 0 VMB_DQ8 VMB_DQ9 VMB_DQ1 5 VMB_DQ1 2 VMB_DQ1 1 VMB_DQ1 4
FBB_ED C1 FBB_DB I1
VMB_WC KB01 VMB_WC KB01#
CG257
0.47u/6.3V _2
40OHM_NETCLASS1 40OHM_NETCLASS1
M9
JS-N18-0709 swap
VRAM3B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
CG185
0.47u/6.3V _2
X16 X8
NC NC NC NC NC NC NC NC
GND NC
NC NC
CG123
0.47u/6.3V _2
QD24~31
QD16~23
CG107
0.47u/6.3V _2
FBB_DB I0 FBB_DB I1 FBB_DB I2 FBB_DB I3 FBB_DB I4 FBB_DB I5 FBB_DB I6 FBB_DB I7
VMB_WC KB23[22 ] VMB_WC KB23#[22]
VMB_WC K23[22] VMB_WC K23#[22]
CG357
0.47u/6.3V _2
4
CG186
0.47u/6.3V _2
FBB_ED C[7:0][2 2,28]FB B_DBI[7 :0][22,28 ]
VMB_DQ2 7 VMB_DQ2 5 VMB_DQ2 8 VMB_DQ2 6 VMB_DQ2 9 VMB_DQ3 0 VMB_DQ2 4 VMB_DQ3 1
FBB_ED C3 FBB_DB I3
VMB_WC KB23 VMB_WC KB23#
VMB_DQ2 2 VMB_DQ1 7 VMB_DQ1 9 VMB_DQ2 3 VMB_DQ2 0 VMB_DQ1 8 VMB_DQ1 6 VMB_DQ2 1
FBB_ED C2 FBB_DB I2
VMB_WC K23 VMB_WC K23#
N2 P3
M2
P2 U3 V3 U4 U2
T2 R2
R4 R5
P13 U13 M13 N13 U12 P12 V12 U11
T13
R13 R11
R10
VRAM3C
NORMAL
DQ0_B/DQ6_B DQ1_B/DQ4_B DQ2_B/DQ7_B DQ3_B/DQ5_B DQ4_B/DQ2_B DQ5_B/DQ1_B DQ6_B/DQ0_B DQ7_B/DQ3_B
EDC0_B DBI0_N_B
WCK_t_B/NC WCK_c_B/NC
DQ8_B/DQ13_B DQ9_B/DQ11_B DQ10_B/DQ15_B DQ11_B/DQ14_B DQ12_B/DQ10_B DQ13_B/DQ12_B DQ14_B/DQ9_B DQ15_B/DQ8_B
EDC1_B DBI1_n_B
WCK1_t_B WCK1_c_B
MT61K25 6M32JE-16 :A
CG213
0.47u/6.3V _2
CG132
0.47u/6.3V _2
FBB_ED C0 FBB_ED C1 FBB_ED C2 FBB_ED C3 FBB_ED C4 FBB_ED C5 FBB_ED C6 FBB_ED C7
VMB_CLK 0#[22] VMB_CLK 0[22]
CG197
0.47u/6.3V _2
CG507
0.47u/6.3V _2
FBB_CMD 0 FBB_CMD 9 FBB_CMD 8 FBB_CMD 32 FBB_CMD 7 FBB_CMD 11 FBB_CMD 15 FBB_CMD 14 FBB_CMD 3 FBB_CMD 1 FBB_CMD 6 FBB_CMD 10
FBB_CMD 4 FBB_CMD 12 FBB_CMD 5 FBB_CMD 13 FBB_CMD 7 FBB_CMD 11 FBB_CMD 15 FBB_CMD 14 FBB_CMD 3 FBB_CMD 1 FBB_CMD 6 FBB_CMD 10
FBB_CMD 2
VMB_CLK 0# VMB_CLK 0
CG148
0.47u/6.3V _2
H3
CA0_A
G11
CA1_A
G4
CA2_A
H12
CA3_A
H5
CA4_A
H10
CA5_A
J12
CA6_A
J11
CA7_A
J4
CA8_A
J3
CA9_A
J5
CABI_n_A
G10
CKE_n_A
L3
CA0_B
M11
CA1_B
M4
CA2_B
L12
CA3_B
L5
CA4_B
L10
CA5_B
K12
CA6_B
K11
CA7_B
K4
CA8_B
K3
CA9_B
K5
CABI_n_B
M10
CKE_n_B
J1
RESET_n
K10
CK_c
J10
CK_t
3
FBVDDQ _MEM FBVDDQ _MEM
CG233
0.47u/6.3V _2
FBB_VR EFC [2 8]
TPG33 TPG21 TPG31 TPG11
RG84121_1%_4
RG90121_1%_4
TPG20 TPG28
CG229
0.47u/6.3V _2
CG167
0.47u/6.3V _2
CG223
0.47u/6.3V _2
CG246
0.47u/6.3V _2
VRAM3D
VREFC
TCK
TDI TDO TMS
ZQ_A ZQ_B
NC#G5 NC#M5
MT61K25 6M32JE-16 :A
CG296
0.47u/6.3V _2
CG544
0.47u/6.3V _2
FBB_VR EFC
K1
FBB_FB _TCK0
N5
FBB_FB _TDI0
F10
FBB_FB _TDO0
N10
FBB_FB _TMS0
F5
FBB_ZQ _1_A
J14 K14
FBB_ZQ _1_B
CQ-0724 [SI] Change PN CS1121 2FB24
SNN_FBB_ RFU_G5
G5
SNN_FBB_ RFU_M5
M5
CG95
CG219
0.47u/6.3V _2
0.47u/6.3V _2
CG254
0.47u/6.3V _2
CG237
CG295
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBVD DQ_MEM
CG226
CG314
22u/6.3V_ 6
22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
Close to DRAM Close to DRAM
CG283
CG151
10u/6.3V_ 6
10u/6.3V_ 6
+1.8V_AO N
option
CG313
4.7u/6.3V_ 6
CG171
0.47u/6.3V _2
CG211
0.47u/6.3V _2
CG161 22u/6.3V_ 6
CG422 10u/6.3V_ 6
CG521
0.47u/6.3V _2
CG224
0.47u/6.3V _2
CG301
0.47u/6.3V _2
2
CG255
0.47u/6.3V _2
Around DRAMAround DRAM
CG538 22u/6.3V_ 6
CG168 10u/6.3V_ 6
CG340
0.47u/6.3V _2
CG203
0.47u/6.3V _2
CG265 22u/6.3V_ 6
CG358 10u/6.3V_ 6
CG336
0.47u/6.3V _2
CG269
0.47u/6.3V _2
CG298 22u/6.3V_ 6
CG335 10u/6.3V_ 6
CG222
0.47u/6.3V _2
VREFC IS NOT USED IN x16 CONFIGURATION 1K OHM PULL-DOWN IS IN PLACE OF THE 1.33K FOR R104
MEM_VREF _CTL[23,27 ,29,30]
JS-N18-0706
FBVDDQ _MEMFBVDDQ _MEM
RG1
*549_1% _4
RG6
1K_1%_ 4
MEM_VREF_CTL
RG4 *931_1% _4
2
MEM_VREF_CTL_QB
3
QG1 *PJC138 K
1
1
VREFC_VMA1 0.4MM=16mils
FBB_VR EFC
CG192 *820p/50 V_4
28
FBB_VR EFC [28 ]
MEMORY: FBB Partition 63..32
40OHM_NETCLASS1 40OHM_NETCLASS1
M10
VRAM4B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
X16 X8
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
CG134
CG125
0.47u/6.3V _2
0.47u/6.3V _2
VDD#A1 VDD#A14 VDD#E10
VDD#E5 VDD#H13
VDD#H2 VDD#L13
VDD#L2 VDD#P10
VDD#P5
VDD#V1 VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14
VDDQ#F11
VDDQ#F4
VDDQ#H1 VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1
VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
CG243
0.47u/6.3V _2
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
CG485
0.47u/6.3V _2
5
CG135
0.47u/6.3V _2
FBB_CMD [33:0][22,2 8]
VMB_DQ[6 3:32][22]
QD32~39
VMB_WC K45[22] VMB_WC K45#[22]
QD40~47
VMB_WC KB45[22 ] VMB_WC KB45#[22]
CG178
0.47u/6.3V _2
CG101
0.47u/6.3V _2
VMB_WC KB45 VMB_WC KB45#
CG96
0.47u/6.3V _2
VMB_DQ3 8 VMB_DQ3 2 VMB_DQ3 7 VMB_DQ3 9 VMB_DQ3 5 VMB_DQ3 6 VMB_DQ3 4 VMB_DQ3 3
FBB_ED C4 FBB_DB I4
VMB_WC K45 VMB_WC K45#
VMB_DQ4 2 VMB_DQ4 7 VMB_DQ4 4 VMB_DQ4 6 VMB_DQ4 1 VMB_DQ4 0 VMB_DQ4 5 VMB_DQ4 3
FBB_ED C5 FBB_DB I5
VRAM4A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
B B
A A
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM FBVDD Q_MEM
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG261
0.47u/6.3V _2
JS-N18-0709 swap
QD56~63
NC NC NC NC
QD48~55
NC NC NC NC
GND NC
NC NC
CG252
CG141
0.47u/6.3V _2
0.47u/6.3V _2
FBB_DB I0 FBB_DB I1 FBB_DB I2 FBB_DB I3 FBB_DB I4 FBB_DB I5 FBB_DB I6 FBB_DB I7
VMB_WC KB67[22 ] VMB_WC KB67#[22]
VMB_WC K67[22] VMB_WC K67#[22]
CG622
0.47u/6.3V _2
4
FBB_ED C[7:0][2 2,28]FB B_DBI[7 :0][22,28 ]
VMB_DQ6 0 VMB_DQ5 6 VMB_DQ5 8 VMB_DQ6 1 VMB_DQ5 7 VMB_DQ5 9 VMB_DQ6 2 VMB_DQ6 3
FBB_ED C7 FBB_DB I7
VMB_WC KB67 VMB_WC KB67#
VMB_DQ5 1 VMB_DQ5 0 VMB_DQ5 4 VMB_DQ5 3 VMB_DQ5 2 VMB_DQ4 9 VMB_DQ4 8 VMB_DQ5 5
FBB_ED C6 FBB_DB I6
VMB_WC K67 VMB_WC K67#
P13 U13
M13
N13 U12 P12 V12 U11
T13 R13
R11 R10
N2 P3 M2 P2 U3 V3 U4 U2
T2
R2 R4
R5
CG90
0.47u/6.3V _2
VRAM4C
NORMAL
DQ0_B/DQ6_B DQ1_B/DQ4_B DQ2_B/DQ7_B DQ3_B/DQ5_B DQ4_B/DQ2_B DQ5_B/DQ1_B DQ6_B/DQ0_B DQ7_B/DQ3_B
EDC0_B DBI0_N_B
WCK_t_B/NC WCK_c_B/NC
DQ8_B/DQ13_B DQ9_B/DQ11_B DQ10_B/DQ15_B DQ11_B/DQ14_B DQ12_B/DQ10_B DQ13_B/DQ12_B DQ14_B/DQ9_B DQ15_B/DQ8_B
EDC1_B DBI1_n_B
WCK1_t_B WCK1_c_B
MT61K25 6M32JE-16 :A
CG463
0.47u/6.3V _2
FBB_ED C0 FBB_ED C1 FBB_ED C2 FBB_ED C3 FBB_ED C4 FBB_ED C5 FBB_ED C6 FBB_ED C7
VMB_CLK 1#[22] VMB_CLK 1[22]
CG822
0.47u/6.3V _2
CG258
0.47u/6.3V _2
FBB_CMD 20 FBB_CMD 28 FBB_CMD 21 FBB_CMD 29 FBB_CMD 23 FBB_CMD 27 FBB_CMD 30 FBB_CMD 31 FBB_CMD 19 FBB_CMD 17 FBB_CMD 22 FBB_CMD 26
FBB_CMD 16 FBB_CMD 25 FBB_CMD 24 FBB_CMD 33 FBB_CMD 23 FBB_CMD 27 FBB_CMD 30 FBB_CMD 31 FBB_CMD 19 FBB_CMD 17 FBB_CMD 22 FBB_CMD 26
FBB_CMD 18
VMB_CLK 1# VMB_CLK 1
CG175
0.47u/6.3V _2
VRAM4D
H3
CA0_A
G11
CA1_A
G4
CA2_A
H12
CA3_A
H5
CA4_A
H10
CA5_A
J12
CA6_A
J11
CA7_A
J4
CA8_A
J3
CA9_A
J5
CABI_n_A
G10
CKE_n_A
L3
CA0_B
M11
CA1_B
M4
CA2_B
L12
CA3_B
L5
CA4_B
L10
CA5_B
K12
CA6_B
K11
CA7_B
K4
CA8_B
K3
CA9_B
K5
CABI_n_B
M10
CKE_n_B
J1
RESET_n
K10
CK_c
J10
CK_t
MT61K25 6M32JE-16 :A
CG239
0.47u/6.3V _2
FBVDDQ _MEM FBVDDQ_ MEM
TPG13 TPG26 TPG17 TPG29
TPG23 TPG22
CG188
0.47u/6.3V _2
RG92121_1%_4
RG81121_1%_4
CG241
0.47u/6.3V _2
CG99
0.47u/6.3V _2
CG154
0.47u/6.3V _2
CG190
0.47u/6.3V _2
FBB_VR EFC [2 8]
CG140
0.47u/6.3V _2
VREFC
NC#G5 NC#M5
ZQ_A ZQ_B
TCK
TDI TDO TMS
K1
N5 F10 N10 F5
J14 K14
G5 M5
CG251
0.47u/6.3V _2
3
CG163
0.47u/6.3V _2
SNN_FBB_ TCK1 SNN_FBB_ TDI1 SNN_FBB_ TDO1 SNN_FBB_ TMS1
FBB_ZQ _2_A
FBB_ZQ _2_B
SNN_FBB_ RFU_G5_1 SNN_FBB_ RFU_M5_1
CG230
0.47u/6.3V _2
CG127
0.47u/6.3V _2
VREFC_VMA1 0.4MM=16mils
FBB_VR EFC
CQ-0724 [SI] Change PN CS1121 2FB24
CG145
0.47u/6.3V _2
CG160
0.47u/6.3V _2
CG142
CG184
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBVD DQ_MEM
Around DRAM Around DRAM
CG94 22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
Close to DRAM Close to DRAM
CG139 10u/6.3V_ 6
+1.8V_AO N
option
CG555
4.7u/6.3V_ 6
CG194 22u/6.3V_ 6
CG187 10u/6.3V_ 6
CG273
0.47u/6.3V _2
2
CG181
0.47u/6.3V _2
CG290 22u/6.3V_ 6
CG306 10u/6.3V_ 6
CG113
0.47u/6.3V _2
CG193
0.47u/6.3V _2
CG143 22u/6.3V_ 6
CG432 10u/6.3V_ 6
CG110
0.47u/6.3V _2
CG676
0.47u/6.3V _2
CG345 10u/6.3V_ 6
CG156 22u/6.3V_ 6
CG109
0.47u/6.3V _2
CG513
0.47u/6.3V _2
CG281 22u/6.3V_ 6
CG379 10u/6.3V_ 6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
N18E-GX-7/9(GDDR6)
N18E-GX-7/9(GDDR6)
N18E-GX-7/9(GDDR6)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
ZGE
28 78Friday, May 03, 2019
28 78Friday, May 03, 2019
28 78Friday, May 03, 2019
1A
1A
1A
Page 29
5
MEMORY: FBC Partition 31..0
FBVDDQ _MEM [21,22 ,25,27,28 ,30,73] +1.8V_AO N [21,23,2 4,25,27,2 8,30,70,73 ,75]
VDD#A1 VDD#A14 VDD#E10
VDD#E5 VDD#H13
VDD#H2 VDD#L13
VDD#L2
VDD#P10
VDD#P5
VDD#V1 VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14 VDDQ#F11
VDDQ#F4
VDDQ#H1 VDDQ#H14 VDDQ#J13
VDDQ#J2
VDDQ#K13
VDDQ#K2
VDDQ#L1 VDDQ#L14 VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1 VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
CG159
0.47u/6.3V _2
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
CG215
0.47u/6.3V _2
CG236
0.47u/6.3V _2
FBC_CMD [33:0][22,29 ]
VMC_DQ[3 1:0][22]
QD0~7
VMC_WC K01[22] VMC_WC K01#[22]
QD8~15
VMC_WC KB01[22] VMC_WC KB01#[22]
CG266
CG214
0.47u/6.3V _2
0.47u/6.3V _2
M3
JS-N18-0709 swap
VRAM1B
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
NORMAL
X16 X8
NC NC NC NC NC NC NC NC
GND NC
NC NC
VMC_DQ2
VMC_DQ5 VMC_DQ0 VMC_DQ6 VMC_DQ1
VMC_DQ4
VMC_DQ3 VMC_DQ7
FBC_ED C0 FBC_DB I0
VMC_WC K01 VMC_WC K01#
VMC_DQ1 4 VMC_DQ1 0 VMC_DQ9 VMC_DQ1 1 VMC_DQ1 3 VMC_DQ8 VMC_DQ1 2 VMC_DQ1 5
FBC_ED C1 FBC_DB I1
VMC_WC KB01 VMC_WC KB01#
CHANGE FBVDDQ TO FBVDDQ_MEM
CG174
0.47u/6.3V _2
CG196
0.47u/6.3V _2
CG106
0.47u/6.3V _2
CG189
0.47u/6.3V _2
VRAM1A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
D D
C C
VSS#C12
C3
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ_ MEM FBVDDQ_ MEM
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG247
CG138
0.47u/6.3V _2
0.47u/6.3V _2
4
FBC_DB I0 FBC_DB I1 FBC_DB I2 FBC_DB I3 FBC_DB I4 FBC_DB I5 FBC_DB I6 FBC_DB I7
QD24~31
VMC_WC KB23[22] VMC_WC KB23#[22]
QD16~23
VMC_WC K23[22] VMC_WC K23#[22 ]
CG250
0.47u/6.3V _2
FBC_ED C[7:0][22 ,29]FBC _DBI[7:0 ][22,29]
VMC_DQ3 0 VMC_DQ2 6 VMC_DQ2 7 VMC_DQ2 4 VMC_DQ2 8 VMC_DQ2 9 VMC_DQ2 5 VMC_DQ3 1
FBC_ED C3 FBC_DB I3
VMC_WC KB23 VMC_WC KB23#
VMC_DQ1 9 VMC_DQ2 1 VMC_DQ1 6 VMC_DQ1 7 VMC_DQ2 2 VMC_DQ1 8 VMC_DQ2 0 VMC_DQ2 3
FBC_ED C2 FBC_DB I2
VMC_WC K23 VMC_WC K23#
CG149
0.47u/6.3V _2
VRAM1C
N2
DQ0_B/DQ6_B
P3
DQ1_B/DQ4_B
M2
DQ2_B/DQ7_B
P2
DQ3_B/DQ5_B
U3
DQ4_B/DQ2_B
V3
DQ5_B/DQ1_B
U4
DQ6_B/DQ0_B
U2
DQ7_B/DQ3_B
T2
EDC0_B
R2
DBI0_N_B
R4
WCK_t_B/NC
R5
WCK_c_B/NC
P13
DQ8_B/DQ13_B
U13
DQ9_B/DQ11_B
M13
DQ10_B/DQ15_B
N13
DQ11_B/DQ14_B
U12
DQ12_B/DQ10_B
P12
DQ13_B/DQ12_B
V12
DQ14_B/DQ9_B
U11
DQ15_B/DQ8_B
T13
EDC1_B
R13
DBI1_n_B
R11
WCK1_t_B
R10
WCK1_c_B
MT61K25 6M32JE-16 :A
CG165
0.47u/6.3V _2
3
40OHM_NETCLASS140OHM_NETCLASS1
NORMAL
CG195
0.47u/6.3V _2
FBC_ED C0 FBC_ED C1 FBC_ED C2 FBC_ED C3 FBC_ED C4 FBC_ED C5 FBC_ED C6 FBC_ED C7
VMC_CLK 0#[22] VMC_CLK 0[2 2]
CG217
0.47u/6.3V _2
CG216
0.47u/6.3V _2
FBC_CMD 0 FBC_CMD 9 FBC_CMD 8 FBC_CMD 32 FBC_CMD 7 FBC_CMD 11 FBC_CMD 15 FBC_CMD 14 FBC_CMD 3 FBC_CMD 1 FBC_CMD 6 FBC_CMD 10
FBC_CMD 4 FBC_CMD 12 FBC_CMD 5 FBC_CMD 13 FBC_CMD 7 FBC_CMD 11 FBC_CMD 15 FBC_CMD 14 FBC_CMD 3 FBC_CMD 1 FBC_CMD 6 FBC_CMD 10
FBC_CMD 2
VMC_CLK 0# VMC_CLK 0
CG209
0.47u/6.3V _2
FBVDDQ _MEM F BVDDQ_ME M
VRAM1D
H3
CA0_A
G11
CA1_A
G4
CA2_A
H12
CA3_A
H5
CA4_A
H10
CA5_A
J12
CA6_A
J11
CA7_A
J4
CA8_A
J3
CA9_A
J5
CABI_n_A
G10
CKE_n_A
L3
CA0_B
M11
CA1_B
M4
CA2_B
L12
CA3_B
L5
CA4_B
L10
CA5_B
K12
CA6_B
K11
CA7_B
K4
CA8_B
K3
CA9_B
K5
CABI_n_B
M10
CKE_n_B
J1
RESET_n
K10
CK_c
J10
CK_t
MT61K25 6M32JE-16 :A
CG248
0.47u/6.3V _2
VREFC
NC#G5 NC#M5
CG406
CG299
0.47u/6.3V _2
0.47u/6.3V _2
FBC_VR EFC
K1
SNN_FBC_ TCK0
N5
TCK
SNN_FBC_ TDI0
F10
TDI
SNN_FBC_ TDO0
N10
TDO
SNN_FBC_ TMS0
F5
TMS
FBC_ZQ _1_A
J14
ZQ_A
K14
ZQ_B
FBC_ZQ _1_B
SNN_FBC_ RFU_G5
G5
SNN_FBC_ RFU_M5
M5
CG270
CG256
0.47u/6.3V _2
0.47u/6.3V _2
CG245
CG259
0.47u/6.3V _2
0.47u/6.3V _2
FBC_VR EFC [29]
TPG27 TPG16 TPG34 TPG12
RG87121_1%_4
RG94121_1%_4
CQ-0724 [SI] Change PN CS1121 2FB24
TPG19 TPG25
CG210
CG227
0.47u/6.3V _2
0.47u/6.3V _2
CG206
CG119
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBVDDQ_MEM
CG225
0.47u/6.3V _2
Around DRAM Around DRAM
CG423
CG289
22u/6.3V_ 6
22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
Close to DRAM Close to DRAM
CG85
CG3
10u/6.3V_ 6
10u/6.3V_ 6
+1.8V_AO N
option
CG771
CG778
4.7u/6.3V_ 6
0.47u/6.3V _2
CG155
0.47u/6.3V _2
CG396 22u/6.3V_ 6
CG1 10u/6.3V_ 6
CG120
0.47u/6.3V _2
CG813
0.47u/6.3V _2
2
CG644 22u/6.3V_ 6
CG585 10u/6.3V_ 6
CG170
0.47u/6.3V _2
CG792
0.47u/6.3V _2
CG403 22u/6.3V_ 6
CG2 10u/6.3V_ 6
CG97
0.47u/6.3V _2
CG814
0.47u/6.3V _2
CG293 22u/6.3V_ 6
CG4 10u/6.3V_ 6
CG240
0.47u/6.3V _2
CG316
0.47u/6.3V _2
VREFC IS NOT USED IN x16 CONFIGURATION 1K OHM PULL-DOWN IS IN PLACE OF THE 1.33K FOR R104
MEM_VREF _CTL[23,27,2 8,30]
JS-N18-0706
FBVDDQ _MEM
RG99
*549_1% _4
RG98
1K_1%_ 4
MEM_VREF_CTL
RG96
*931_1% _4
2
*820p/50 V_4
MEM_VREF_CTL_QC
3
QG17 *PJC138 K
1
1
VREFC_VMA1 0.4MM=16mils
FBC_VR EFC
CG191
29
FBC_VR EFC [29]
MEMORY: FBC Partition 63..32
40OHM_NETCLASS1 40OHM_NETCLASS1
M4
VRAM2B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
X16 X8
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
CG220
0.47u/6.3V _2
VDD#A1 VDD#A14 VDD#E10
VDD#E5
VDD#H13
VDD#H2 VDD#L13
VDD#L2 VDD#P10
VDD#P5
VDD#V1 VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14
VDDQ#F11
VDDQ#F4
VDDQ#H1 VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1
VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
CG124
0.47u/6.3V _2
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
CG131
0.47u/6.3V _2
5
FBC_CMD [33:0][22,29] VMC_DQ[6 3:32][22]
QD32~39
QD40~47
CG267
0.47u/6.3V _2
VMC_WC K45[22] VMC_WC K45#[22]
VMC_WC KB45[22] VMC_WC KB45#[22]
CG152
0.47u/6.3V _2
CG228
0.47u/6.3V _2
VMC_DQ3 7 VMC_DQ3 6 VMC_DQ3 3 VMC_DQ3 5 VMC_DQ3 8 VMC_DQ3 9 VMC_DQ3 2 VMC_DQ3 4
FBC_ED C4 FBC_DB I4
VMC_WC K45 VMC_WC K45#
VMC_DQ4 0 VMC_DQ4 1 VMC_DQ4 5 VMC_DQ4 7 VMC_DQ4 4 VMC_DQ4 6 VMC_DQ4 2 VMC_DQ4 3
FBC_ED C5 FBC_DB I5
VMC_WC KB45 VMC_WC KB45#
CG147
0.47u/6.3V _2
VRAM2A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
VSS#C3
C5
VSS#C5
D1
B B
A A
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM FBVDD Q_MEM
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG108
0.47u/6.3V _2
JS-N18-0709 swap
NC NC NC NC NC NC NC NC
GND NC
NC NC
CG105
0.47u/6.3V _2
FBC_DB I0 FBC_DB I1 FBC_DB I2 FBC_DB I3 FBC_DB I4 FBC_DB I5 FBC_DB I6 FBC_DB I7
QD56~63
VMC_WC KB67[22] VMC_WC KB67#[22]
QD48~55
VMC_WC K67[22] VMC_CLK1 #[22] VMC_WC K67#[22]
CG198
0.47u/6.3V _2
CG172
0.47u/6.3V _2
CG164
0.47u/6.3V _2
4
FBC_ED C[7:0][22,29 ]FBC_ DBI[7:0][22,29]
VMC_DQ6 2 VMC_DQ6 0 VMC_DQ6 3 VMC_DQ6 1 VMC_DQ5 8 VMC_DQ5 7 VMC_DQ5 6 VMC_DQ5 9
FBC_ED C7 FBC_DB I7
VMC_WC KB67 VMC_WC KB67#
VMC_DQ5 2 VMC_DQ4 9 VMC_DQ5 4 VMC_DQ5 5 VMC_DQ4 8 VMC_DQ5 3 VMC_DQ5 0 VMC_DQ5 1
FBC_ED C6 FBC_DB I6
VMC_WC K67 VMC_WC K67#
N2 P3 M2 P2 U3 V3 U4 U2
T2 R2
R4 R5
P13 U13
M13
N13 U12 P12 V12 U11
T13 R13
R11 R10
VRAM2C
NORMAL
DQ0_B/DQ6_B DQ1_B/DQ4_B DQ2_B/DQ7_B DQ3_B/DQ5_B DQ4_B/DQ2_B DQ5_B/DQ1_B DQ6_B/DQ0_B DQ7_B/DQ3_B
EDC0_B DBI0_N_B
WCK_t_B/NC WCK_c_B/NC
DQ8_B/DQ13_B DQ9_B/DQ11_B DQ10_B/DQ15_B DQ11_B/DQ14_B DQ12_B/DQ10_B DQ13_B/DQ12_B DQ14_B/DQ9_B DQ15_B/DQ8_B
EDC1_B DBI1_n_B
WCK1_t_B WCK1_c_B
MT61K25 6M32JE-16 :A
CG208
0.47u/6.3V _2
FBC_ED C0 FBC_ED C1 FBC_ED C2 FBC_ED C3 FBC_ED C4 FBC_ED C5 FBC_ED C6 FBC_ED C7
CG114
0.47u/6.3V _2
CG276
0.47u/6.3V _2
H3
G11
G4
H12
H5
H10
J12 J11
J4 J3 J5
G10
L3
M11
M4
L12
L5 L10 K12 K11
K4
K3
K5 M10
J1
K10
J10
CG310
0.47u/6.3V _2
VRAM2D
CA0_A CA1_A CA2_A CA3_A CA4_A CA5_A CA6_A CA7_A CA8_A CA9_A CABI_n_A CKE_n_A
CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B CA7_B CA8_B CA9_B CABI_n_B CKE_n_B
RESET_n
CK_c CK_t
MT61K25 6M32JE-16 :A
FBC_CMD 20 FBC_CMD 28 FBC_CMD 21 FBC_CMD 29 FBC_CMD 23 FBC_CMD 27 FBC_CMD 30 FBC_CMD 31 FBC_CMD 19 FBC_CMD 17 FBC_CMD 22 FBC_CMD 26
FBC_CMD 16 FBC_CMD 25 FBC_CMD 24 FBC_CMD 33 FBC_CMD 23 FBC_CMD 27 FBC_CMD 30 FBC_CMD 31 FBC_CMD 19 FBC_CMD 17 FBC_CMD 22 FBC_CMD 26
FBC_CMD 18
VMC_CLK 1#
CG278
0.47u/6.3V _2
VMC_CLK 1
VMC_CLK 1[22]
FBVDDQ _MEM FBVDDQ _MEM
VREFC
TCK
TDI TDO TMS
ZQ_A ZQ_B
NC#G5 NC#M5
CG129
0.47u/6.3V _2
CG207
0.47u/6.3V _2
VREFC_VMA1 0.4MM=16mils
K1
SNN_FBC_ TCK1
N5
SNN_FBC_ TDI1
F10
SNN_FBC_ TDO1
N10
SNN_FBC_ TMS1
F5
FBC_ZQ _2_A
J14 K14
FBC_ZQ _2_B
CQ-0724 [SI] Change PN CS1121 2FB24
SNN_FBC_ RFU_G5_1
G5
SNN_FBC_ RFU_M5_1
M5
CG136
0.47u/6.3V _2
3
FBC_VR EFC
CG232
0.47u/6.3V _2
CG121
0.47u/6.3V _2
TPG15 TPG30 TPG14 TPG32
TPG24 TPG18
RG89121_1%_4
RG85121_1%_4
CG130
0.47u/6.3V _2
CG166
0.47u/6.3V _2
CG180
0.47u/6.3V _2
CG274
0.47u/6.3V _2
FBC_VR EFC [2 9]
CG263
0.47u/6.3V _2
CG117
0.47u/6.3V _2
CG144
0.47u/6.3V _2
CG89
0.47u/6.3V _2
CG176
CG244
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBVDDQ_MEM
CG102 22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
CG487 10u/6.3V_ 6
CG91
CG122
22u/6.3V_ 6
22u/6.3V_ 6
Close to DRAM Close to DRAM
CG177
CG398
10u/6.3V_ 6
10u/6.3V_ 6
+1.8V_AO N
option
CG727
4.7u/6.3V_ 6
CG279
0.47u/6.3V _2
CG204
0.47u/6.3V _2
CG183
0.47u/6.3V _2
CG249
0.47u/6.3V _2
CG103
0.47u/6.3V _2
Around DRAMAround DRAM
CG618 22u/6.3V_ 6
CG118 10u/6.3V_ 6
CG348
0.47u/6.3V _2
CG539 22u/6.3V_ 6
CG92 10u/6.3V_ 6
CG353
0.47u/6.3V _2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
N18E-GX-8/9(GDDR6)
N18E-GX-8/9(GDDR6)
N18E-GX-8/9(GDDR6)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
ZGE
29 78Friday, May 03, 2019
29 78Friday, May 03, 2019
29 78Friday, May 03, 2019
CG87 22u/6.3V_ 6
CG455 10u/6.3V_ 6
CG584
0.47u/6.3V _2
2
1A
1A
1A
Page 30
5
MEMORY: FBD Partition 31..0
FBVDDQ _MEM [21,22 ,25,27,28 ,29,73] +1.8V_AO N [21,23,2 4,25,27,2 8,29,70,73 ,75]
VRAM7A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
D D
C C
VSS#C3
C5
VSS#C5
D1
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM FBVDDQ _MEM FBVDD Q_MEM
CG568
0.47u/6.3V _2
FBVDDQ _MEM
A1
VDD#A1
A14
VDD#A14
E10
VDD#E10
E5
VDD#E5
H13
VDD#H13
H2
VDD#H2
VDD#L13
VDD#L2
VDD#P10
VDD#P5 VDD#V1
VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14 VDDQ#F11
VDDQ#F4
VDDQ#H1
VDDQ#H14
VDDQ#J13
VDDQ#J2 VDDQ#K13
VDDQ#K2
VDDQ#L1
VDDQ#L14
VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1 VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
FBD_CMD [33:0][22,30 ]
L13 L2 P10
VMD_DQ[3 1:0][22]
P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
QD0~7
VMD_WC K01[22] VMD_WC K01#[22]
VMD_WC KB01[22] VMD_WC KB01#[22]
VMD_DQ4 VMD_DQ0 VMD_DQ2 VMD_DQ6 VMD_DQ5 VMD_DQ3 VMD_DQ7 VMD_DQ1
FBD_ED C0 FBD_DB I0
VMD_WC K01 VMD_WC K01#
VMD_DQ1 3 VMD_DQ1 1 VMD_DQ1 5 VMD_DQ9 VMD_DQ1 0 VMD_DQ8 VMD_DQ1 2 VMD_DQ1 4
FBD_ED C1 FBD_DB I1
VMD_WC KB01 VMD_WC KB01#
Right under DRAM Right under DRAM Close to DRAM Close to DRAM
CG426
0.47u/6.3V _2
CG349
0.47u/6.3V _2
CG684
0.47u/6.3V _2
CG540
0.47u/6.3V _2
CG677
0.47u/6.3V _2
40OHM_NETCLASS1 40OHM_NETCLASS1
M1
VRAM7B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
X16 X8
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
CG577
CG202
0.47u/6.3V _2
0.47u/6.3V _2
JS-N18-0709 swap
QD24~31
NC NC NC NC
QD16~23QD8~15
NC NC NC NC
GND NC
NC NC
CG505
0.47u/6.3V _2
FBD_DB I0 FBD_DB I1 FBD_DB I2 FBD_DB I3 FBD_DB I4 FBD_DB I5 FBD_DB I6 FBD_DB I7
VMD_WC KB23[22] VMD_WC KB23#[22]
VMD_WC K23[22] VMD_WC K23#[22 ]
CG359
0.47u/6.3V _2
CG645
0.47u/6.3V _2
4
FBD_ED C[7:0][22 ,30]FBD _DBI[7:0 ][22,30]
VMD_DQ2 9 VMD_DQ2 5 VMD_DQ2 4 VMD_DQ2 7 VMD_DQ2 6 VMD_DQ2 8 VMD_DQ3 0 VMD_DQ3 1
FBD_ED C3 FBD_DB I3
VMD_WC KB23 VMD_WC KB23#
VMD_DQ1 9 VMD_DQ2 0 VMD_DQ1 8 VMD_DQ1 6 VMD_DQ2 2 VMD_DQ1 7 VMD_DQ2 1 VMD_DQ2 3
FBD_ED C2 FBD_DB I2
VMD_WC K23 VMD_WC K23#
CG678
0.47u/6.3V _2
N2 P3 M2 P2 U3 V3 U4 U2
T2
R2 R4
R5
P13 U13
M13
N13 U12 P12 V12 U11
T13 R13
R11 R10
VRAM7C
NORMAL
DQ0_B/DQ6_B DQ1_B/DQ4_B DQ2_B/DQ7_B DQ3_B/DQ5_B DQ4_B/DQ2_B DQ5_B/DQ1_B DQ6_B/DQ0_B DQ7_B/DQ3_B
EDC0_B DBI0_N_B
WCK_t_B/NC WCK_c_B/NC
DQ8_B/DQ13_B DQ9_B/DQ11_B DQ10_B/DQ15_B DQ11_B/DQ14_B DQ12_B/DQ10_B DQ13_B/DQ12_B DQ14_B/DQ9_B DQ15_B/DQ8_B
EDC1_B DBI1_n_B
WCK1_t_B WCK1_c_B
MT61K25 6M32JE-16 :A
FBD_ED C0 FBD_ED C1 FBD_ED C2 FBD_ED C3 FBD_ED C4 FBD_ED C5 FBD_ED C6 FBD_ED C7
VMD_CLK 0#[22] VMD_CLK 0[2 2]
CG7
0.47u/6.3V _2
CG688
0.47u/6.3V _2
FBD_CMD 0 FBD_CMD 9 FBD_CMD 8 FBD_CMD 32 FBD_CMD 7 FBD_CMD 11 FBD_CMD 15 FBD_CMD 14 FBD_CMD 3 FBD_CMD 1 FBD_CMD 6 FBD_CMD 10
FBD_CMD 4 FBD_CMD 12 FBD_CMD 5 FBD_CMD 13 FBD_CMD 7 FBD_CMD 11 FBD_CMD 15 FBD_CMD 14 FBD_CMD 3 FBD_CMD 1 FBD_CMD 6 FBD_CMD 10
FBD_CMD 2
VMD_CLK 0# VMD_CLK 0
CG686
0.47u/6.3V _2
H3
G11
G4
H12
H5 H10 J12 J11
J4
J3
J5 G10
L3 M11
M4 L12
L5 L10 K12 K11
K4
K3
K5 M10
J1
K10 J10
CG363
0.47u/6.3V _2
VRAM7D
CA0_A
VREFC CA1_A CA2_A CA3_A CA4_A CA5_A CA6_A CA7_A CA8_A CA9_A CABI_n_A CKE_n_A
CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B
ZQ_A
CA7_B
ZQ_B CA8_B CA9_B CABI_n_B CKE_n_B
RESET_n
NC#G5
NC#M5 CK_c CK_t
MT61K25 6M32JE-16 :A
CG427
0.47u/6.3V _2
3
FBVDDQ _MEM FBVDDQ_MEM
CG612
CG478
0.47u/6.3V _2
0.47u/6.3V _2
FBD_VR EFC
K1
SNN_FBD_ TCK0
N5
TCK
SNN_FBD_ TDI0
F10
TDI
SNN_FBD_ TDO0
N10
TDO
SNN_FBD_ TMS0
F5
TMS
FBD_ZQ _1_A
J14 K14
FBD_ZQ _1_B
SNN_FBD_ RFU_G5
G5
SNN_FBD_ RFU_M5
M5
CG430
0.47u/6.3V _2
FBD_VR EFC [30]
TPG56 TPG53 TPG54 TPG55
RG10912 1_1%_4
RG10812 1_1%_4
CQ-0724 [SI] Change PN CS1121 2FB24
TPG58 TPG57
CG620
CG431
0.47u/6.3V _2
0.47u/6.3V _2
CG583
0.47u/6.3V _2
CG153
0.47u/6.3V _2
CG687
0.47u/6.3V _2
CG574
0.47u/6.3V _2
CG182
CG611
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBVD DQ_MEM
Around DRAM Around DRAM
CG587
option
CG286
4.7u/6.3V_ 6
CG428
0.47u/6.3V _2
22u/6.3V_ 6
CG393 10u/6.3V_ 6
CG380 22u/6.3V_ 6
CG315 10u/6.3V_ 6
CG586
0.47u/6.3V _2
CG179 22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
CG567 10u/6.3V_ 6
+1.8V_AO N
CG683
0.47u/6.3V _2
CG537
0.47u/6.3V _2
CG98
0.47u/6.3V _2
CG523
0.47u/6.3V _2
CG221 22u/6.3V_ 6
Close to DRAMClose to DRAM
CG86 10u/6.3V_ 6
2
CG331
0.47u/6.3V _2
CG5 22u/6.3V_ 6
CG704 10u/6.3V_ 6
CG506
0.47u/6.3V _2
CG516
0.47u/6.3V _2
CG623 22u/6.3V_ 6
CG483 10u/6.3V_ 6
CG648
0.47u/6.3V _2
CG343
CG429
0.47u/6.3V _2
0.47u/6.3V _2
VREFC IS NOT USED IN x16 CONFIGURATION 1K OHM PULL-DOWN IS IN PLACE OF THE 1.33K FOR R104
1
JS-N18-0706
FBVDDQ _MEM
RG118
*549_1% _4
RG101
1K_1%_ 4
MEM_VREF_CTL
MEM_VREF _CTL[23,27,2 8,29]
RG126
*931_1% _4
2
MEM_VREF_CTL_QD
3
QG19 *PJC138 K
1
VREFC_VMA1 0.4MM=16mils
FBD_VR EFC
CG702
*820p/50 V_4
30
FBD_VR EFC [30]
MEMORY: FBD Partition 63..32
FBVDDQ _MEM FBVDDQ _MEM
VREFC
NC#G5 NC#M5
CG490
CG367
0.47u/6.3V _2
VREFC_VMA1 0.4MM=16mils
K1
SNN_FBD_ TCK1
N5
TCK
SNN_FBD_ TDI1
F10
TDI
SNN_FBD_ TDO1
N10
TDO
SNN_FBD_ TMS1
F5
TMS
FBD_ZQ _2_A
J14
ZQ_A
K14
ZQ_B
FBD_ZQ _2_B
SNN_FBD_ RFU_G5_1
G5
SNN_FBD_ RFU_M5_1
M5
CG337
0.47u/6.3V _2
3
CG327
TPG41 TPG43 TPG44 TPG38
RG10612 1_1%_4
RG10412 1_1%_4
TPG40 TPG35
CG26
0.47u/6.3V _2
0.47u/6.3V _2
CG17
0.47u/6.3V _2
CG9
0.47u/6.3V _2
0.47u/6.3V _2
FBD_VR EFC
CQ-0724 [SI] Change PN CS1121 2FB24
CG354
0.47u/6.3V _2
CG368
0.47u/6.3V _2
CG300
0.47u/6.3V _2
FBD_VR EFC [30]
CG34
0.47u/6.3V _2
CG6
0.47u/6.3V _2
CG24
CG344
0.47u/6.3V _2
0.47u/6.3V _2
FBVDDQ _MEM FBV DDQ_MEM
CG268
CG389 22u/6.3V_ 6
FBVDDQ _MEM FBVDDQ _MEM
CG294 10u/6.3V_ 6
+1.8V_AO N
CG373
0.47u/6.3V _2
CG218
22u/6.3V_ 6
22u/6.3V_ 6
Close to DRAM Close to DRAM
CG384
CG350
10u/6.3V_ 6
10u/6.3V_ 6
option
CG277
CG288
0.47u/6.3V _2
4.7u/6.3V_ 6
CG280
0.47u/6.3V _2
2
CG388
0.47u/6.3V _2
Around DRAMAround DRAM
CG553 22u/6.3V_ 6
CG408 10u/6.3V_ 6
CG275
0.47u/6.3V _2
CG329
0.47u/6.3V _2
CG726 22u/6.3V_ 6
CG434 10u/6.3V_ 6
CG282
0.47u/6.3V _2
CG20
0.47u/6.3V _2
CG394 22u/6.3V_ 6
CG93 10u/6.3V_ 6
CG303
0.47u/6.3V _2
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
N18E-GX-9/9(GDDR6)
N18E-GX-9/9(GDDR6)
N18E-GX-9/9(GDDR6)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
ZGE
30 78Friday, May 03, 2019
30 78Friday, May 03, 2019
30 78Friday, May 03, 2019
VDD#A1 VDD#A14 VDD#E10
VDD#E5 VDD#H13
VDD#H2 VDD#L13
VDD#L2
VDD#P10
VDD#P5
VDD#V1 VDD#V14
VDDQ#B10
VDDQ#B5
VDDQ#C1 VDDQ#C11 VDDQ#C14
VDDQ#C4
VDDQ#E1 VDDQ#E14 VDDQ#F11
VDDQ#F4
VDDQ#H1 VDDQ#H14 VDDQ#J13
VDDQ#J2
VDDQ#K13
VDDQ#K2
VDDQ#L1 VDDQ#L14 VDDQ#N11
VDDQ#N4
VDDQ#P1 VDDQ#P14
VDDQ#T1 VDDQ#T11 VDDQ#T14
VDDQ#T4 VDDQ#U10
VDDQ#U5
VPP#A10
VPP#A5
VPP#V10
VPP#V5
CG304
0.47u/6.3V _2
FBVDDQ _MEM
A1 A14 E10 E5 H13 H2 L13 L2 P10 P5 V1 V14
B10 B5 C1 C11 C14 C4 E1 E14 F11 F4 H1 H14 J13 J2 K13 K2 L1 L14 N11 N4 P1 P14 T1 T11 T14 T4 U10 U5
+1.8V_AO N
A10 A5 V10 V5
CG13
0.47u/6.3V _2
CG260
0.47u/6.3V _2
5
FBD_CMD [33:0][22,30 ]
VMD_DQ[6 3:32][22]
QD32~39
VMD_WC K45[22] VMD_WC K45#[22]
QD40~47
VMD_WC KB45[22] VMD_WC KB45#[22]
CG325
0.47u/6.3V _2
CG338
0.47u/6.3V _2
VMD_DQ3 8 VMD_DQ3 2 VMD_DQ3 6 VMD_DQ3 4 VMD_DQ3 5 VMD_DQ3 7 VMD_DQ3 9 VMD_DQ3 3
FBD_ED C4 FBD_DB I4
VMD_WC K45 VMD_WC K45#
VMD_DQ4 3 VMD_DQ4 5 VMD_DQ4 4 VMD_DQ4 7 VMD_DQ4 6 VMD_DQ4 2 VMD_DQ4 0 VMD_DQ4 1
FBD_ED C5 FBD_DB I5
VMD_WC KB45 VMD_WC KB45#
VRAM5A
A11
VSS#A11
A13
VSS#A13
A2
VSS#A2
A4
VSS#A4
B1
VSS#B1
B14
VSS#B14
C10
VSS#C10
C12
VSS#C12
C3
VSS#C3
C5
VSS#C5
D1
B B
A A
VSS#D1
D12
VSS#D12
D14
VSS#D14
D3
VSS#D3
E11
VSS#E11
E4
VSS#E4
F1
VSS#F1
F12
VSS#F12
F14
VSS#F14
F3
VSS#F3
G1
VSS#G1
G12
VSS#G12
G14
VSS#G14
G3
VSS#G3
H11
VSS#H11
H4
VSS#H4
L11
VSS#L11
L4
VSS#L4
M1
VSS#M1
M12
VSS#M12
M14
VSS#M14
M3
VSS#M3
N1
VSS#N1
N12
VSS#N12
N14
VSS#N14
N3
VSS#N3
P11
VSS#P11
P4
VSS#P4
R1
VSS#R1
R12
VSS#R12
R14
VSS#R14
R3
VSS#R3
T10
VSS#T10
T12
VSS#T12
T3
VSS#T3
T5
VSS#T5
U1
VSS#U1
U14
VSS#U14
V11
VSS#V11
V13
VSS#V13
V2
VSS#V2
V4
VSS#V4
MT61K25 6M32JE-16 :A
FBVDDQ _MEM FBVDDQ _MEM
Right under DRAM Right under DRAM
CG173
0.47u/6.3V _2
40OHM_NETCLASS1 40OHM_NETCLASS1
M2
VRAM5B
NORMAL
G2
DQ0_A/DQ7_A
B3
DQ1_A/DQ2_A
F2
DQ2_A/DQ6_A
E3
DQ3_A/DQ4_A
B4
DQ4_A/DQ0_A
B2
DQ5_A/DQ3_A
E2
DQ6_A/DQ5_A
A3
DQ7_A/DQ1_A
C2
EDC0_A
D2
DBI0_N_A
D4
WCK_t_A
D5
WCK_c_A
X16 X8
B11
DQ8_A
G13
DQ9_A/DQ15_A
E13
DQ10_A/DQ13_A
F13
DQ11_A/DQ14_A
E12
DQ12_A
B12
DQ13_A/DQ10_A
B13
DQ14_A/DQ11_A
A12
DQ15_A/DQ9_A
C13
EDC1_A
D13
DBI1_n_A
D11
WCK1_t_A
D10
WCK1_c_A
MT61K25 6M32JE-16 :A
CG376
CG212
0.47u/6.3V _2
0.47u/6.3V _2
JS-N18-0709 swap
QD56~63
NC NC NC NC
QD48~55
NC NC NC NC
GND NC
NC NC
CG330
0.47u/6.3V _2
FBD_DB I0 FBD_DB I1 FBD_DB I2 FBD_DB I3 FBD_DB I4 FBD_DB I5 FBD_DB I6 FBD_DB I7
VMD_WC KB67[22] VMD_WC KB67#[22]
VMD_WC K67[22] VMD_WC K67#[22]
CG297
0.47u/6.3V _2
CG342
0.47u/6.3V _2
FBD_ED C[7:0][22 ,30]FBD _DBI[7:0 ][22,30]
VMD_DQ6 1 VMD_DQ5 7 VMD_DQ6 3 VMD_DQ6 2 VMD_DQ5 8 VMD_DQ5 9 VMD_DQ5 6 VMD_DQ6 0
FBD_ED C7 FBD_DB I7
VMD_WC KB67 VMD_WC KB67#
VMD_DQ5 3 VMD_DQ5 0 VMD_DQ5 4 VMD_DQ5 1 VMD_DQ5 2 VMD_DQ5 5 VMD_DQ4 8 VMD_DQ4 9
FBD_ED C6 FBD_DB I6
VMD_WC K67 VMD_WC K67#
CG302
0.47u/6.3V _2
4
FBD_ED C0 FBD_ED C1 FBD_ED C2 FBD_ED C3 FBD_ED C4 FBD_ED C5 FBD_ED C6 FBD_ED C7
VRAM5C
NORMAL
N2
DQ0_B/DQ6_B
P3
DQ1_B/DQ4_B
M2
DQ2_B/DQ7_B
P2
DQ3_B/DQ5_B
U3
DQ4_B/DQ2_B
V3
DQ5_B/DQ1_B
U4
DQ6_B/DQ0_B
U2
DQ7_B/DQ3_B
T2
EDC0_B
R2
DBI0_N_B
R4
WCK_t_B/NC
R5
WCK_c_B/NC
P13
DQ8_B/DQ13_B
U13
DQ9_B/DQ11_B
M13
DQ10_B/DQ15_B
N13
DQ11_B/DQ14_B
U12
DQ12_B/DQ10_B
P12
DQ13_B/DQ12_B
V12
DQ14_B/DQ9_B
U11
DQ15_B/DQ8_B
T13
EDC1_B
R13
DBI1_n_B
R11
WCK1_t_B
R10
WCK1_c_B
MT61K25 6M32JE-16 :A
VMD_CLK 1#[22] VMD_CLK 1[22]
FBVDDQ _MEM FBVDDQ_ MEM
CG32
0.47u/6.3V _2
FBD_CMD 20
H3
FBD_CMD 28
G11
FBD_CMD 21
G4
FBD_CMD 29
H12
FBD_CMD 23
H5
FBD_CMD 27
H10
FBD_CMD 30
J12
FBD_CMD 31
J11
FBD_CMD 19
J4
FBD_CMD 17
J3
FBD_CMD 22
J5
FBD_CMD 26
G10
FBD_CMD 16
L3
FBD_CMD 25
M11
FBD_CMD 24
M4
FBD_CMD 33
L12
FBD_CMD 23
L5
FBD_CMD 27
L10
FBD_CMD 30
K12
FBD_CMD 31
K11
FBD_CMD 19
K4
FBD_CMD 17
K3
FBD_CMD 22
K5
FBD_CMD 26
M10
FBD_CMD 18
J1
VMD_CLK 1#
K10
VMD_CLK 1
J10
Close to DRAM Close to DRAM
CG370
0.47u/6.3V _2
CG369
0.47u/6.3V _2
CG33
0.47u/6.3V _2
VRAM5D
CA0_A CA1_A CA2_A CA3_A CA4_A CA5_A CA6_A CA7_A CA8_A CA9_A CABI_n_A CKE_n_A
CA0_B CA1_B CA2_B CA3_B CA4_B CA5_B CA6_B CA7_B CA8_B CA9_B CABI_n_B CKE_n_B
RESET_n
CK_c CK_t
MT61K25 6M32JE-16 :A
CG382
0.47u/6.3V _2
1A
1A
1A
Page 31
5
4
3
2
1
eDP Redriver
+3V_EDP+3V_EDP
D D
L27
+3V
1 2
Typ. 0.2A
PBY160808T-600Y-N
+3V_EDP
C678
0.1u/10V_2
C679 *1u/6.3V_2
C677
0.1u/10V_2
C675
0.1u/10V_2
C688
0.1u/10V_2
C676 10u/6.3V_4
I2C_EN_EDP
I2C Programming or pin strap programming select. I2C is only disable when this pin is '0' 0 : Pin Strap(I2C disable)(Default) R : TI test mode(I2C enable at 3.3V) F : I2C enabled at 1.8V 1 : I2C enabled at 3.3V
R111 *1K_1%_4 R112 1K_1%_4
+3V_EDP
31
Min of 15 Vias for GND Pad
U41
CAD_SNK/DCI_DAT
SSEQ1
3
T14
T11
1
TUSB546-DCI
VCC#428VCC#320VCC#1
RX1p RX1n
RX2p RX2n
TX1p TX1n
TX2p TX2n
CTL1/HPDIN
CTL0/SDA
FLIP/SCL
SBU1 SBU2
HPDIN/DCI_CLK
DPEQ1
2
30 31
40 39
33 34
37 36
CAD_SNK_R_EDP
29
CTL1_EDP
23
CTL0_EDP
22
FLIP_EDP
21 27
26
INT_ULT_EDP_HPD
32
DPEQ1_EDP
C_OUT_EDP_TXP3 C_OUT_EDP_TXN3
C_OUT_EDP_TXP0 C_OUT_EDP_TXN0
C_OUT_EDP_TXP2 C_OUT_EDP_TXN2
C_OUT_EDP_TXP1 C_OUT_EDP_TXN1
R710 *0_5%_4
C606 0.1u/10V_2 C601 0.1u/10V_2
C635 0.1u/10V_2 C628 0.1u/10V_2
C616 0.1u/10V_2 C610 0.1u/10V_2
C626 0.1u/10V_2 C619 0.1u/10V_2
R705 4.7K_1%_4 R704 *4.7K_1%_4
INT_ULT_EDP_HPD
T12 T13
R702 *short_0402 R703 100K_5%_4
EDP_TXP3_C [32] EDP_TXN3_C [32]
EDP_TXP0_C [32] EDP_TXN0_C [32]
EDP_TXP2_C [32] EDP_TXN2_C [32]
EDP_TXP1_C [32] EDP_TXN1_C [32]
+3V_EDP
EDP_HPD_GPU [23,32]
CTL1_EDP
CTL0_EDP
FLIP_EDP
SSEQ0,SSEQ1 : USB receiver equalizer gain for upstream facing SSTXP/N F,F(Default) When I2C_EN is not '0' SSEQ0 sets I2C adress
DPEQ0_A1_EDP
A0_EDP
DPEQ1_EDP
R711 1K_1%_4 R712 *1K_1%_4
R713 *1K_1%_4 R714 1K_1%_4
R715 *1K_1%_4 R716 1K_1%_4
R115 1K_1%_4 R116 *1K_1%_4
R113 1K_1%_4 R114 *1K_1%_4
R706 *1K_1%_4 R708 1K_1%_4
42
Impedance S-50ohm/D-90ohm, Intra-Pair within 2mils
INT_EDP_TXP0[23]
GPU
INT_EDP_TXN0[23] INT_EDP_TXP3[23]
INT_EDP_TXN3[23]
INT_EDP_TXP2[23] INT_EDP_TXN2[23]
INT_EDP_TXP1[23] INT_EDP_TXN1[23]
INT_EDP_AUXP[23] INT_EDP_AUXN[23]
GPU
C C
B B
C680 C681
C686 C687
C684 0.1u/10V_2 C685 0.1u/10V_2
C682 0.1u/10V_2 C683 0.1u/10V_2
C640 0.1u/10V_2 C639 0.1u/10V_2
+3V_EDP
EDP_AUX_C[32] EDP_AUX#_C[32]
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
R709 100K_5%_4
R707 100K_5%_4
EDP_AUX_C EDP_AUX#_C
INT_EDP_TXP0_R INT_EDP_TXN0_R
INT_EDP_TXP3_R INT_EDP_TXN3_R
INT_EDP_TXP2_R INT_EDP_TXN2_R
INT_EDP_TXP1_R INT_EDP_TXN1_R
EDP_AUX_C EDP_AUX#_C
9
DP0p
10
DP0n
18
DP3p
19
DP3n
5
SSRXp
4
SSRXn
8
SSTXp
7
SSTXn
15
DP2p
16
DP2n
12
DP1p
13
DP1n
24
AUXp
25
AUXn
I2C_EN_EDP A0_EDP DPEQ0_A1_EDP
41
GND#143GND#344GND#445GND#546GND#647GND#7
GND#2
17
I2C_EN
6
48
49
GND#8
GND#9
VCC#2
SSEQ0/A011EQ038EQ135DPEQ0/A1
14
T10
+3V_EDP
+3V_EDP
+3V_EDP
+3V_EDP
+3V_EDP
+3V_EDP
DPEQ0,DPEQ1 : DP Receiver equalization gain F,F(Default)
A A
5
4
3
When I2C_EN is not '0' DPEQ0 sets I2C adress
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
eDP Re-driver(TUSB546)
eDP Re-driver(TUSB546)
eDP Re-driver(TUSB546)
ZGE
ZGE
ZGE
31 78Friday, May 03, 2019
31 78Friday, May 03, 2019
1
31 78Friday, May 03, 2019
1A
1A
1A
Page 32
5
4
3
2
1
LCD CONNECTOR
+VIN_PANEL_R
R680 *short_0805
+VIN
D D
C C
LCDVCC CCD_PW R
C660
C650
0.1u/10V_2
100p/50V_4
+VIN_PANEL_R MIC_VCC
C539
0.1u/10V_2
LCD_BL_PWM[23]
EDP_HPD_CPU[13] EDP_HPD_GPU[23,31]
PCH_DPST_PWM[11]
C538 100p/50V_4
C536 22u/25V_8
C50
0.1u/10V_2
C51
0.1u/10V_2
LCDVCC
R106
10K_1%_2
3
2
Q17 DMG1012T-7
1
R60 *0_5%_4 R59 *short_0402
R45
C49 1000p/50V_4
C52 1000p/50V_4
LCDVCC
3
2
1
*10_5%_4
R100
1K_1%_4
Q15 DMG1012T-7
PCH_BRIGHT
EDP_HPD_RR
C55 180p/50V _4
R696 *100K_5%_4 R695 *100K_5%_4
BL_ON PCH_BRIGHT
R54 33_1%_2
EDP_AUX_C
EDP_AUX#_C
for G-SYNC NVSR
FRM_LCK#[23]
TS-USB
CCD-DMIC*2
CCD-USB
BOARD_ID00BOARD_ID1
EDP_HPD_R
R701 *100K_5%_4 R700 *100K_5%_4
PCH_DMICDAT[10] PCH_DMICCLK[10]
DMIC_DAT[47]
DMIC_CLK[47]
USBP6+[9]
USBP6-[9]
R49 100K_5%_ 4 R50 1K_1%_4
R44 100K_5%_ 4
0
1 0
0
1 1
+3V
LCDVCC
2
Q14 DDTC144EUA-7-F
13
R692 *33_5%_4 R691 *33_5%_4 R74 *short_0402 R70 *short_0402
R66 *short_0402 R64 *short_0402
OD_EN NSVR pin
NC
NC
1
Y
NC
eDP FHD
eDP UHD
BOARD_ID0[1 3] BOARD_ID1[1 3]
+3V
MIC_VCC change to 3.3V 9/20
BOARD_ID0_R BOARD_ID1_R
PWM pin
Reserve
NC
Y
Y Normal, DD, Freesync
LCDVCC
R58 33_5%_4 R56 33_5%_4
R40 *short_0402 R37 *short_0603
C53
220p/50V_4
Reserve
Y
NC
NC
EDP_AUX_C[31] EDP_AUX#_C[31]
EDP_TXP0_C[31] EDP_TXN0_C[31]
EDP_TXP1_C[31] EDP_TXN1_C[31]
EDP_TXP2_C[31] EDP_TXN2_C[31]
EDP_TXP3_C[31] EDP_TXN3_C[31]
TP62 TP61
C54 220p/50V_4
Support panel
Reserve
NSVR
DD
MAX 1.2A
FRM_LCK#_Panel
USBP7+_C USBP7-_C
DMIC_DATA_C DMIC_CLK_C
USBP6+_C USBP6-_C EDP_HPD_R
BOARD_ID0_R BOARD_ID1_R BLONCON
MIC_VCC
CCD_PWR
LCD_OD_EN_R
+VIN_PANEL_R
EDP_AUX_C EDP_AUX#_C
CN10
45 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
LCD Power
PCH_DISP_ON[11]
LCD_VDD[23]
41
43
44
42
46
C62 33p/50V_4
GS12401-1011P-7H
12
D11 *AZ5725-01F.R7G
12
D12 *AZ5725-01F.R7G
R698 *10_5%_4 R699 1 0_5%_4
12
D10
*AZ5725-01F.R7G
C66 33p/50V_4
C674 1u/6.3V_2
EDP_VDD_EN
R697 100K_5%_4
USBP6+_C
USBP6-_C
+3V
DMIC_CLK_C
DMIC_DATA_C
12
D13 *AZ5725-01F.R7G
U40
5
IN
4
EN
2
3
OCB
1
OUT
GND
SY6288C20AAC
R694 100K_5 %_4
C673
0.01u/16V_2
+3V
C672 47u/6.3V_8
C671
0.1u/10V_2
C670 22u/6.3V_6
C669 22u/6.3V_6
32
LCDVCC
C943 22u/6.3V_6
B B
Backlight
+3VPCU
BL_ON
1
2
1 3
R80 *100K_5%_4
D14 SDM20U30-7
2
Q7 DDTC144EUA-7-F
LID# [5 7,59]
EC_FPBACK# [57 ]
2
LCDVCC
3
1
R94 10K_1%_2
DMG1012T-7
R91 *10_5%_4
LCDVCC
3
2
Q13
1
R93 1K_1%_4
Q11
DMG1012T-7
change to 1K ohm for NVSR LCD
+3VPCU
PCH_BLON_EC[57]
R89 *short_0402
BLON_EN
4
R87 100K_1%_4
R82 10K_1%_2
BL#
34
5
Q9A PJX8838
+3V
R86 1K_5%_2
61
2
Q9B PJX8838
3
PCH_LVDS_BLON[11]
LCD_BLEN[23]
A A
5
LCD OD EN
LCD_OD_EN#[13]
Function
LCD OD_EN_R
2
+1.8V
R34 100K_5%_4
LCD_OD_EN_R
3
2
Q4
DMG1012T-7
1
R33 *1M_5%_4
DisableEnable
DefaultHi or Open
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
eDP Panel/CCD/Hall Sensor
eDP Panel/CCD/Hall Sensor
eDP Panel/CCD/Hall Sensor
1
ZGE
ZGE
ZGE
32 78Friday, May 03, 2019
32 78Friday, May 03, 2019
32 78Friday, May 03, 2019
1A
1A
1A
Page 33
5
DP Redriver
U36
Q57A PJX8838
HDMI DAT
Q60A PJX8838
HDMI CLK
4
VIN#1
5
VIN#2
3
EN
5
3 4
5
3 4
UP7553PMA5-15
change value for safety
C512 0.1u/10V_2
C521
R633 *short_0603
+3V
C500 0.1u/10V_2 R646 *short_0402
+3V
BU5 use MAINON to enable
D D
C C
B B
INT_DP_AUXN_Q[23]
INT_DP_AUXP_Q[23]
1 2
DP_D2[23] DP_D2#[23]
DP_D1[23] DP_D1#[23]
R651 *short_0603 C511
0.1u/10V_2
DP_D0[23] DP_D0#[23]
DP_D3[23] DP_D3#[23]
C_INT_DP_AUXP C_INT_DP_AUXN
VOUT
GND
GPU
Impedance S-50ohm/D-90ohm, Intra-Pair within 2mils
GPU
support dual mode /0525
Q57B
2
PJX8838
61
Q60B
2
PJX8838
61
0.1u/10V_2
4
+3V_DP
+3V_DP
C527
0.1u/10V_2
C34 *1u/6.3V_2
Min of 15 Vias for GND Pad
42
41
48
49
C528 0.1u/10V_2 C529 0.1u/10V_2
C534 0.1u/10V_2 C535 0.1u/10V_2
C532 0.1u/10V_2 C533 0.1u/10V_2
C530 0.1u/10V_2 C531 0.1u/10V_2
R664 100K_5%_4
R663 100K_5%_4
+3V_DP
C_INT_DP_AUXN
C_INT_DP_AUXP CAD_SNK
DP_TXP0_R DP_TXN0_R
DP_TXP3_R DP_TXN3_R
DP_TXP2_R DP_TXN2_R CAD_SNK_R_DP
DP_TXP1_R DP_TXN1_R CTL1_DP INT_ULT_DP_HPD
0.01u/50V_4
C508
0.01u/50V_4
9
DP0p
10
DP0n
18
DP3p
19
DP3n
5
SSRXp
4
SSRXn
8
SSTXp
7
SSTXn
15
DP2p
16
DP2n
12
DP1p
13
DP1n
24
AUXp
25
AUXn
I2C_EN_DP A0_DP DPEQ0_A1_DP
+3V +3V
R641 10K_1%_2
R642 10K_1%_2
3
2
Q56
1
2N7002KTB
To support dual mode (DP++) over DisplayPort through Dongle for HDMI, the circuit shown below is required to be implemented on the motherboard.
GND#143GND#344GND#445GND#546GND#647GND#7
GND#2
17
+3V
3
2
Q58
1
2N7002KTB
GND#8
GND#9
SSEQ0/A011EQ038EQ135DPEQ0/A1
I2C_EN
14
3
2
Q2
1
2N7002KTB
6
VCC#2
T9
T8
3
CAD_SNK/DCI_DAT
SSEQ1
3
T2
R21 10K_1%_2
3
2
Q3
1
2N7002KTB
+3V_DP
1
VCC#428VCC#320VCC#1
RX1p RX1n
RX2p RX2n
TX1p TX1n
TX2p TX2n
CTL1/HPDIN
CTL0/SDA
FLIP/SCL
SBU1 SBU2
HPDIN/DCI_CLK
DPEQ1
2
C35
C32
0.1u/10V_2
0.1u/10V_2
U39 TUSB546-DCIRNQR
OUT_DP_TXP3
30
OUT_DP_TXN3
31
OUT_DP_TXP0
40
OUT_DP_TXN0
39
OUT_DP_TXP2
33
OUT_DP_TXN2
34
OUT_DP_TXP1
37
OUT_DP_TXN1
36
29
23
CTL0_DP
22
FLIP_DP
21 27
26
INT_ULT_DP_HPD
32
DPEQ1_DP
PS_FBVDD_PGOOD [25,73]
C33
0.1u/10V_2
R649 4.7K_1%_4 R647 *4.7K_1%_4
R670 *0_5%_4
T1 T3
R653 *short_0402 R22 100K_5%_4
CAD_SNK
C526 10u/6.3V_4
+3V_DP
R7 *short_0402
1 2
3 5
R9 *0_5%_4
2
+3V_DP
DP_HPD_PCH [13,23]
U1 TC7SH08FU(F)
CAD_SNK_R_DP
4
1
33
I2C_EN_DP
I2C Programming or pin strap programming select. I2C is only disable when this pin is '0' 0 : Pin Strap(I2C disable)(Default) R : TI test mode(I2C enable at 3.3V) F : I2C enabled at 1.8V 1 : I2C enabled at 3.3V
CTL1_DP
CTL0_DP
FLIP_DP
A0_DP
SSEQ0,SSEQ1 : USB receiver equalizer gain for upstream facing SSTXP/N F,F(Default) When I2C_EN is not '0' SSEQ0 sets I2C adress
DPEQ0_A1_DP
DPEQ1_DP
DPEQ0,DPEQ1 : DP Receiver equalization gain F,F(Default) When I2C_EN is not '0' DPEQ0 sets I2C adress
R25 *1K_1%_4
R26 1K_1%_4
R668 1K_1%_4
R667 *1K_1%_4
R671 *1K_1%_4 R23 1K_1%_4
R672 *1K_1%_4 R24 1K_1%_4
R29 1K_1%_4
R30 *1K_1%_4
R27 *1K_1%_4C522 R28 *1K_1%_4
R662 *1K_1%_4 R665 *1K_1%_4
+3V_DP
+3V_DP
+3V_DP
+3V_DP
+3V_DP
+3V_DP
+3V_DP
24
23
OUT_DP_TXP0 C_OUT_DP_TXP0 OUT_DP_TXN0 C_OUT_DP_TXN0
OUT_DP_TXP1 C_OUT_DP_TXP1
+3V_DP
A A
R650 100K_5%_4
C_INT_DP_AUXN C_INT_DP_AUXP
R661 100K_5%_4
5
DP_HPD_PCH DP_HPD
OUT_DP_TXN1 C_OUT_DP_TXN1 OUT_DP_TXP2 C_OUT_DP_TXP2
OUT_DP_TXN2 C_OUT_DP_TXN2 OUT_DP_TXP3 C_OUT_DP_TXP3
OUT_DP_TXN3 C_OUT_DP_TXN3
R18 *short_0201
4
C30 C31
C24 C25
C26 C27
C28 C29
R640 R643
C509 220p/50V_4
+3V_DP
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2
0.1u/10V_2 1M_1%_4
5.1M_5%_4
CAD_SNK C_INT_DP_AUXP C_INT_DP_AUXN
C19 10u/6.3V_4
C18
0.1u/10V_2
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20
ML_L0+
ML_L0-
GND
ML_L2+
ML_L2-
GND
Config1
AUX_CH+
AUX_CH-
Return
22 21
GND
ML_L1+
ML_L1-
GND
ML_L3+
ML_L3-
Config2
GND
HPD
DP_PWR
CN2 2DT1517-321211F
3
C_INT_DP_AUXP C_INT_DP_AUXP C_INT_DP_AUXN C_INT_DP_AUXN
DP_HPD DP_HPD CAD_SNK CAD_SNK
ESD1
1
Line-1
2
Line-2
3
GND#1
4
Line-3 Line-45NC#1
*AZ1045-04F.R7G
2
NC#4 NC#3
NC#2
10 9
7 6
C_OUT_DP_TXP0 C_OUT_DP_TXN0 C_OUT_DP_TXP1 C_OUT_DP_TXN1 C_OUT_DP_TXP2 C_OUT_DP_TXN2 C_OUT_DP_TXP3 C_OUT_DP_TXN3
D7 D8 D1 D2 D3 D4 D5 D6
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
*PESD5V0H1BSF
12
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
DP Re-driver(TUSB546)
DP Re-driver(TUSB546)
DP Re-driver(TUSB546)
ZGE
ZGE
ZGE
33 78Friday, May 03, 2019
33 78Friday, May 03, 2019
1
33 78Friday, May 03, 2019
1A
1A
1A
Page 34
5
4
3
2
1
34
D D
C C
B B
A A
5
4
3
2
1
Page 35
5
4
3
2
1
HDMI Retimer(HDM)
GPU_DDCCLK_Q HDMI_SEL#_A1 GPU_DDCDATA_Q I2C_SEL_PIN
+3V_HDMI
HDMI_HPD_PCH[13,23]
SI
*0_5%_4
*0_5%_4
R655
R656
R15 *10K_1%_4 R20 *short_0402
GPU_D2[23] GPU_D2#[23]
GPU_D1[23] GPU_D1#[23]
GPU_D0[23] GPU_D0#[23]
GPU_CLK[23] GPU_CLK#[23]
C510 0.1u/16V_4 C507 0.1u/16V_4
C506 0.1u/16V_4 C505 0.1u/16V_4
C504 0.1u/16V_4 C503 0.1u/16V_4
C499 0.1u/16V_4 C498 0.1u/16V_4
GPU_D2_C GPU_D2#_C HDMI_HPD_DC GPU_D1_C GPU_D1#_C
GPU_D0_C GPU_D0#_C
GPU_CLK_C GPU_CLK#_C
From GPU
D D
PS8409 strap pin
+3V_HDMI
C C
I2C_SEL_PIN EQ_SEL_A0 HDMI_SEL#_A1
DCIN_ENB EQ_SEL_A0 PRE_SEL
DCIN_ENB DC coupling enable; Internal pull up, 3.3V I/O. L: DC coupling input H: Default,AC coupling input
EQ_SEL_A0 Receiver equalization setting; Internal pull up , 3.3V I/O. L: Compensaton for channel loss up to 13dB H: Default , Compensation for channel loss up to 17dB
B B
M: Compensation for channel loss up to 11dB
PRE_SEL Output pre-emphasis setting; Internal pull up, 3.3V I/O. L: Pre-emphasis =2.5dB H: Default, No Pre-emphasis
HDMI_SEL#_A1 HDMI_ID enable ; Internal pull down , 3.3V I/O. L: Default, HDMI ID enable H: HDMI ID disable
I2C_SEL_PIN I2C Slave Address selection; Internal pull down, 3.3V I/O. L: Default, Slave address 0x10-0x2F. H: Alternative salve address 0x90-0x9F, 0xD0-0xDF.
A A
R658 *4.7K_5%_4
R648 *4.7K_5%_4
R1 *4.7K_5%_4
R6 *4.7K_5%_4
R659 *4.7K_5%_4
SI
R3
4.7K_5%_4
+1.8V_MAIN
+1.8V_MAIN
GPU_DDCDATA_Q GPU_DDCCLK_Q HDMI_RST#
R652 4.99K_1%_4
36
34
33
32
35
HDMI_HPD_DC
MV
+1.2V +1.2V
+1.2V +1.2V
+3V_HDMI
REXT
RESETB
HDMI_ID
SCL_SRC/AUXP
37
POWERSWITCH
38
IN_D2p
39
IN_D2n
40
HPD_SRC
41
IN_D1p
42
IN_D1n
43
VDDRX12#1
44
IN_D0p
45
IN_D0n
46
VDDRX12#2
47
IN_CLKp
48
IN_CLKn
49
EPAD
SDA_SRC/AUXN
PDB4DCIN_ENB
VDD33#1
EQ
TESTMODEB
3
1
5
2
DCIN_ENB HDMI_SDATA EQ_SEL_A0 HDMI_SCLK
CSCL CSDA PRE_SEL
+1.2V
31
27
30
26
25
29
28
NC
PRE
RSV2
CSCL
CSDA
VDD12#2
I2C_ADDR
VDD33#2 OUT_D2p OUT_D2n HPD_SNK OUT_D1p OUT_D1n
VDDTX12#1
OUT_D0p OUT_D0n
VDDTX12#2
OUT_CLKp OUT_CLKn
VDDA12
SDA_SNK8SCL_SNK
VDD12#1
HDMI_CEC9CEC_EN
RSV1
7
6
11
12
10
+1.2V
+1.2V
Prevent current leakage when GPU is power off add R12317/R1231 is for HMDI verify
R676 2.2K_5%_4
GPU_DDCCLK[23]
GPU_DDCDATA[23]
R679 2.2K_5%_4
+1.2V
Ci
Cj
C3
0.01u/50V_4
+1.2V
Place Cp,Cq,Cr close to U12 pin15,18 Place Cs,Ct close to U12 pin30
Cp
Cq
C8
0.01u/50V_4
+3V_HDMI
Place Cu,Cv close to U12 pin24 Place Cw close to U12 pin1
Cu
Cv
C2
0.01u/50V_4
C4
0.1u/16V_4
C13
0.1u/16V_4
C1
0.1u/16V_4
R682 *0_5%_4 R677 *short_0402
R678 *short_0402 R683 *0_5%_4
co-layout
Place Ci,Cj,Ck close to U12 pin7,11 Place Cl,Cm,Cn,Co close to U12 pin46
Ck
Cl
C11
C5
0.1u/16V_4
0.1u/16V_4
Cr
Cs
C16
C21
0.1u/16V_4
0.01u/50V_4
Cw
C516
C515
10u/6.3V_6
0.1u/16V_4
U34 PS8209AQFN48GTR2-A2
+3V_HDMI
C_TX2_HDMI+
R644 *short_0402
C_TX2_HDMI-
R639 *short_0402
C_TX1_HDMI+
R638 *short_0402
C_TX1_HDMI-
R637 *short_0402
C_TX0_HDMI+
R636 *short_0402
C_TX0_HDMI-
R635 *short_0402
C_TXC_HDMI+
R634 *short_0402
C_TXC_HDMI-
R632 *short_0402
+3V_HDMI
R681
*2.2K_5%_4
GPU_DDCCLK_Q DDCCLK_NOR DDCCLK_NOR-1 HDMI_SCLK
DDCDATA_NOR DDCDATA_NOR-1 HDMI_SDATA GPU_DDCDATA_Q
Co
Cn
C17
0.01u/50V_4
Cm
24 23 22 21 20 19 18 17 16 15 14 13
C15
0.1u/16V_4
Ct
C22
0.1u/16V_4
Reset
HDMI_RST#
R684 *2.2K_5%_4
C20 10u/6.3V_4
+3V_HDMI
5
2
SSM6N43FU
+5V
R657 10K_1%_4
C525 1u/6.3V_4
TX2_HDMI+ TX2_HDMI­HDMI_HPD TX1_HDMI+ TX1_HDMI-
TX0_HDMI+ TX0_HDMI-
TXC_HDMI+ TXC_HDMI-
+1.8V_MAIN
34
Q62A Q62B
61
40 mils
U35
3
IN
Reserve
TXC_HDMI+
TXC_HDMI-
R675 *short_0402
R674 *short_0402
Close CN5
OUT
GND
G5250Q1T73U
1
2
C501 *3.3p/50V_4
Optional
+3V_HDMI
R654 *10K_1%_4
MAINON[38,57,62,64,68,69]
CSCL CSDA
R660 *10K_1%_4
R16 *100K_5%_4
R17 *0_5%_4
Layout note:Place close to HDMI Conn
+5V_HDMIC
C502 *220p/50V_4
R10 2.2K_5%_4 R11 2.2K_5%_4
RV3 *TVM0G5R5M220R_22p RV4 *TVM0G5R5M220R_22p
RV2 *TVM0G5R5M220R_22p
MV
R14 *short_0603
+3V
R19 *0_5%_6
+3V_S5
+3VS5_HDMI
C14 1u/6.3V_4
C23 *1u/6.3V_4
TX2_HDMI+ TX2_HDMI+
TX1_HDMI+ TX1_HDMI+ TX1_HDMI- TX1_HDMI-
TX0_HDMI+ TX0_HDMI-
TXC_HDMI+ TXC_HDMI-
TX2_HDMI+ TX2_HDMI-
TX1_HDMI+ TX1_HDMI-
TX0_HDMI+ TX0_HDMI-
TXC_HDMI+ TXC_HDMI-
HDMI_SCLK HDMI_SDATA
+5V_HDMIC HDMI_HPD
RV1 *TVM0G5R5M220R_22p
U2
5
IN#2
4
IN#1
3
EN
*G5245AT11U
For ESD
Layout note:Place close to HDMI Conn
U37
1
Line-1
2
Line-2
3
GND#1
4
Line-3 Line-45NC#1
*AZ1045-04F.R7G
U33
1
Line-1
2
Line-2
3
GND#1
4
Line-3 Line-45NC#1
*AZ1045-04F.R7G
C9 220p/50V_4
R13 *short_0603
20 21
1 2
D2_shield
3 4
Data1+
5 6
Data1-
7 8
D0_shield
9
10
CLK+
11 12
CLK-
13 14
Reserved
15 16
DDC DATA
17 18
+5V
19
NC#4 NC#3
NC#2
NC#4 NC#3
NC#2
Data2+
Data2-
D1_shield
Data0+
Data0-
CLK_shield
CEC
DDC CLK
DDC/CEC GND
Hot Plug DET
35
+3V_HDMI
1
OUT
2
GND
10
TX2_HDMI-TX2_HDMI-
9
7 6
TX0_HDMI+
10
TX0_HDMI-
9
TXC_HDMI+
7
TXC_HDMI-
6
2322
CN1 HDM-020-1S19HG
C12
0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
HDMI Re-driver(PS8409)
HDMI Re-driver(PS8409)
HDMI Re-driver(PS8409)
ZGE
ZGE
ZGE
35 78Friday, May 03, 2019
35 78Friday, May 03, 2019
1
35 78Friday, May 03, 2019
1A
1A
1A
Page 36
5
4
3
2
1
36
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
HDMI
HDMI
HDMI
ZGE
ZGE
ZGE
1A
1A
1A
36 78Friday, May 03, 2019
36 78Friday, May 03, 2019
36 78Friday, May 03, 2019
1
Page 37
5
+3V_TYPEC_DP1
Typ . 0.2A
1 2
+3V
+3V_S5
D D
+3VPCU
L31 PBY160808T-600Y-N
L30
L29
1 2
1 2
*PBY160808T-600Y-N
*PBY160808T-600Y-N
4
C154
0.1u/10V_2
+3V_TYPEC_DP1
C155 *1u/6.3V_2
+3V_TYPEC_DP1
C156
0.1u/10V_2
3
2
1
+3V_TYPEC_DP1
C214
0.1u/10V_2
37
I2C_EN_TBT
I2C Programming or pin strap programming select. I2C is only disable when this pin is '0' 0 : Pin Strap(I2C disable)(Default) R : TI test mode(I2C enable at 3.3V) F : I2C enabled at 1.8V 1 : I2C enabled at 3.3V
R815 *1K_1%_4
R817 1K_1%_4
+3V_TYPEC_DP1
Min of 15 Vias for GND Pad
42
41
48
6
49
1
C211
0.1u/10V_2
C153 10u/6.3V_4
Impedance S-50ohm/D-90ohm, Intra-Pair within 2mils
GPU_TBT_D0[23] GPU_TBT_D0#[23]
GPU_TBT_D3[23]
C C
B B
GPU_TBT_D3#[23]
GPU_TBT_D2[23] GPU_TBT_D2#[23]
GPU_TBT_D1[23] GPU_TBT_D1#[23]
GPU_TBT_AUXP[23,38] GPU_TBT_AUXN[23,38]
+3V_TYPEC_DP1
A A
C167 0.1u/10V_2 C172 0.1u/10V_2
C203 0.1u/10V_2 C208 0.1u/10V_2
C193 0.1u/10V_2 C201 0.1u/10V_2
C182 0.1u/10V_2 C187 0.1u/10V_2
C233 0.1u/10V_2 C230 0.1u/10V_2
R213 100K_1%_4
R212 100K_1%_4
C_GPU_TBT_D0 C_GPU_TBT_D0#
C_GPU_TBT_D3 C_GPU_TBT_D3#
C_GPU_TBT_D2 C_GPU_TBT_D2#
C_GPU_TBT_D1 C_GPU_TBT_D1#
C_GPU_TBT_AUXP C_GPU_TBT_AUXN
C_GPU_TBT_AUXN
C_GPU_TBT_AUXP
9
DP0p
10
DP0n
18
DP3p
19
DP3n
5
SSRXp
4
SSRXn
8
SSTXp
7
SSTXn
15
DP2p
16
DP2n
12
DP1p
13
DP1n
24
AUXp
25
AUXn
I2C_EN_TBT A0_TBT
DPEQ0_A1_TBT DPEQ1_TBT
GND#143GND#344GND#445GND#546GND#647GND#7
GND#2
I2C_EN
17
GND#8
GND#9
VCC#2
SSEQ0/A011EQ038EQ135DPEQ0/A1
14
T4
CAD_SNK/DCI_DAT
SSEQ1
3
T5
T15
VCC#428VCC#320VCC#1
RX1p RX1n
RX2p RX2n
TX1p TX1n
TX2p TX2n
CTL1/HPDIN
CTL0/SDA
FLIP/SCL
SBU1 SBU2
HPDIN/DCI_CLK
DPEQ1
2
Impedance S-50ohm/D-90ohm, Intra-Pair within 2mils
30 31
40 39
33 34
37 36
29
CTL1_TBT_HPDIN
23
CTL0_TBT_SDA
22
FLIP_TBT_CLK
21 27
26
TBT_HPD
32
U10 TUSB546-DCIRNQR
R818 4.7K_1%_4 R813 *4.7K_1%_4
R211 *0_5%_4
T6
T7
R807 *short_0402
+3V_TYPEC_DP1
DDI1_TX3_DP [38] DDI1_TX3_DN [38]
DDI1_TX0_DP [38] DDI1_TX0_DN [38]
DDI1_TX2_DP [38] DDI1_TX2_DN [38]
DDI1_TX1_DP [38] DDI1_TX1_DN [38]
TBT_HPD
TBT_DP_HPD [13,23,38]
CTL1_TBT_HPDIN
R826 1K_1%_4
R210 *1K_1%_4
+3V_TYPEC_DP1
CTL0_TBT_SDA
C782
R209 1K_1%_4
1u/6.3V_2
+3V_TYPEC_DP1
FLIP_TBT_CLK
R823 *1K_1%_4 R208 1K_1%_4
+3V_TYPEC_DP1
A0_TBT
SSEQ0,SSEQ1 : USB receiver equalizer gain for upstream facing SSTXP/N F,F(Default) When I2C_EN is not '0' SSEQ0 sets I2C adress
R795 1K_1%_4 R794 *1K_1%_4
+3V_TYPEC_DP1
DPEQ0_A1_TBT
R800 1K_1%_4 R806 *1K_1%_4
+3V_TYPEC_DP1
DPEQ1_TBT
DPEQ0,DPEQ1 : DP Receiver equalization gain F,F(Default) When I2C_EN is not '0' DPEQ0 sets I2C adress
R788 *1K_1%_4 R792 1K_1%_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Type C DP re-Driver
Type C DP re-Driver
Type C DP re-Driver
ZGE
ZGE
ZGE
1A
1A
1A
37 78Friday, May 03, 2019
37 78Friday, May 03, 2019
37 78Friday, May 03, 2019
1
Page 38
5
4
3
2
1
TBT(Apline Ridge)
NOTE: SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD. SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU
D D
and/or appropriate AUX/DDC demux control SNK1_DDC_clk ?connect to 100k PD.
PCIE_TXP17_TBT[11] PCIE_TXN17_TBT[11]
PCIE_TXP18_TBT[11]
CPU PCIE TX CPU PCIE RX
GPU IFPF
C C
Type-C Port1
B B
PCIE_CLKREQ_TBT#[11]
PCIE_TXN18_TBT[11] PCIE_TXP19_TBT[11]
PCIE_TXN19_TBT[11] PCIE_TXP20_TBT[11]
PCIE_TXN20_TBT[11]
CLK_PCIE_TBTP[11] CLK_PCIE_TBTN[11]
DDI1_TX0_DP[37] DDI1_TX0_DN[37]
DDI1_TX1_DP[37] DDI1_TX1_DN[37]
DDI1_TX2_DP[37] DDI1_TX2_DN[37]
DDI1_TX3_DP[37] DDI1_TX3_DN[37]
GPU_TBT_AUXP[23,37] GPU_TBT_AUXN[23,3 7]
TBT_DP_HPD[13,23,37]
+VCC3P3_LC
KEEP short(Back of IC)
TBTA_CA2HD_1_P[40] TBTA_CA2HD_1_N[40]
TBTA_HD2CA_1_P[40] TBTA_HD2CA_1_N[40]
TBTA_HD2CA_0_P[40] TBTA_HD2CA_0_N[40]
TBTA_CA2HD_0_P[40] TBTA_CA2HD_0_N[40]
TBTA_DPSRC_AUX_P[40 ] TBTA_DPSRC_AUX_N[40]
R772 10 0K_1%_4 R751 10 0K_1%_4
R809 14 K_1%_4 R756 10 K_1%_2
R754 10 K_1%_2 R753 10 K_1%_2 R755 10 K_1%_2
R765 4.75 K_0.1%_4
TBTA_LSTX[40] TBTA_LSRX[40] TBTA_HPD[40 ]
R812 499_1%_2
Close to Pin
+VCC3P3_SX
+3V
Q69 *2N7002KTB
321
*short_0402
R791
this symbol is not built by AJSLLSN0U04!!
change PCIE port for RAID 2/1
C168 0.1u/10V_2 C173 0.1u/10V_2
C183 0.1u/10V_2 C188 0.1u/10V_2
C202 0.1u/10V_2 C194 0.1u/10V_2
C209 0.1u/10V_2 C204 0.1u/10V_2
C737 0.1u/10V_2 C731 0.1u/10V_2
R763 100K_1%_4 R752 100K_1%_4
C748 0.22u/6.3 V_2 C755 0.22u/6.3 V_2
C190 0.22u/6.3 V_2 C185 0.22u/6.3 V_2
C751 0.1u/10V_2 C758 0.1u/10V_2
change USB 22. from PCH
R767 *10K_1%_2
PCIE_CLKREQ_TBT#_C
PCIE_CLKREQ_TBT#_C
DDI1_TX0_DP_C DDI1_TX0_DN_C
DDI1_TX1_DP_C DDI1_TX1_DN_C
DDI1_TX2_DP_C DDI1_TX2_DN_C
DDI1_TX3_DP_C DDI1_TX3_DN_C
AUX_SRCP_TBT_C
AUX_SRCN_TBT_C
TBT_DP_HPD
TBT_DPSNK0_DDC_CLK TBT_DPSNK0_DDC_DATA
TBT2_DP_HPD
TBT_DPSNK1_DDC_CLK
DPSNK_RBIAS_1
TBT_JTAG_TDI TBT_JTAG_TMS TBT_JTAG_TCK TBT_JTAG_TDO
TBT_RSENSE
TBT_RBIAS
TBTA_TX1_P TBTA_TX1_N
TBTA_TX0_P TBTA_TX0_N
TBTA_AUX_P TBTA_AUX_N
TBTA_LSTX TBTA_LSRX TBTA_HPD
PA_USB2_RBIAS
+3V_AR
U7A
Y23
PCIE_RX0_P
Y22
PCIE_RX0_N
T23
PCIE_RX1_P
T22
PCIE_RX1_N
M23
PCIE_RX2_P
M22
PCIE_RX2_N
H23
PCIE_RX3_P
H22
PCIE_RX3_N
V19
PCIE_REFCLK_100_IN_P
T19
PCIE_REFCLK_100_IN_N
AC5
PCIE_CLKREQ_N
AB7
DPSNK0_ML0_P
AC7
DPSNK0_ML0_N
AB9
DPSNK0_ML1_P
AC9
DPSNK0_ML1_N
AB11
DPSNK0_ML2_P
AC11
DPSNK0_ML2_N
AB13
DPSNK0_ML3_P
AC13
DPSNK0_ML3_N
Y11
DPSNK0_AUX_P
W11
DPSNK0_AUX_N
AA2
DPSNK0_HPD
Y5
DPSNK0_DDC_CLK
R4
DPSNK0_DDC_DATA
AB15
DPSNK1_ML0_P
AC15
DPSNK1_ML0_N
AB17
DPSNK1_ML1_P
AC17
DPSNK1_ML1_N
AB19
DPSNK1_ML2_P
AC19
DPSNK1_ML2_N
AB21
DPSNK1_ML3_P
AC21
DPSNK1_ML3_N
Y12
DPSNK1_AUX_P
W12
DPSNK1_AUX_N
Y6
DPSNK1_HPD
Y8
DPSNK1_DDC_CLK
N4
DPSNK1_DDC_DATA
Y18
DPSNK_RBIAS
Y4
TDI
V4
TMS
T4
TCK
W4
TDO
H6
RBIAS
J6
RSENSE
A15
PA_RX1_P
B15
PA_RX1_N
A17
PA_TX1_P
B17
PA_TX1_N
A19
PA_TX0_P
B19
PA_TX0_N
B21
PA_RX0_P
A21
PA_RX0_N
Y15
PA_DPSRC_AUX_P
W15
PA_DPSRC_AUX_N
E20
PA_USB2_D_P
D20
PA_USB2_D_N
A5
PA_LSTX
A4
PA_LSRX
M4
PA_DPSRC_HPD
H19
PA_USB2_RBIAS
AC23
THERMDA#2
AB23
THERMDA#1
V18
PCIE_ATEST
AC1
TEST_EDM
L15
FUSE_VQPS_64
N15
FUSE_VQPS_128
C23
MONDC_CIO_0
C22
MONDC_CIO_1
R762 *2.2K_5%_4 R741 *2.2K_5%_4 R777 *2.2K_5%_4 R740 *2.2K_5%_4
TBT_DPSNK0_DDC_CLK TBT_DPSNK0_DDC_DATA TBT_DPSNK1_DDC_CLK TBT_DPSNK1_DDC_DATA
PCIE_RXP17_TBT_C
V23
PCIE_TX0_P PCIE_TX0_N
PCIE_TX1_P PCIE_TX1_N
PCIE_TX2_P PCIE_TX2_N
PCIE_TX3_P PCIE_TX3_N
PCIe GEN3
PCIE_RBIAS
DPSRC_ML0_P
DPSRC_ML0_N
DPSRC_ML1_P
DPSRC_ML1_N
DPSRC_ML2_P
DPSRC_ML2_N
DPSRC_ML3_P
DPSRC_ML3_N DPSRC_AUX_P
DPSRC_AUX_N
SINK PORT 0
SOURCE PORT 0
DPSRC_HPD
DPSRC_RBIAS
LC GPIOPOC GPIO
POC_GPIO_0 POC_GPIO_1 POC_GPIO_2 POC_GPIO_3 POC_GPIO_4 POC_GPIO_5 POC_GPIO_6
SINK PORT 1
TEST_PWR_GOOD
Misc
XTAL_25_IN
TBT PORTS
PB_DPSRC_AUX_P PB_DPSRC_AUX_N
PORT B
PB_DPSRC_HPD
POC
PB_USB2_RBIAS
MONDC_DPSNK_0 MONDC_DPSNK_1
MONDC_DPSRC
XTAL_25_OUT
PB_USB2_D_P PB_USB2_D_N
MONDC_SVR
USB2_ATEST
DSL6540-SLL44
MISC
Port A
POC
DEBUG
PERST_N
GPIO_0 GPIO_1 GPIO_2 GPIO_3 GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_8
TEST_EN
RESET_N
EE_DI
EE_DO
EE_CS_N
EE_CLK
PB_RX1_P PB_RX1_N
PB_TX1_P PB_TX1_N
PB_TX0_P PB_TX0_N
PB_RX0_P PB_RX0_N
PB_LSTX PB_LSRX
ATEST_P ATEST_N
PCIE_RXN17_TBT_C
V22
PCIE_RXP18_TBT_C
P23
PCIE_RXN18_TBT_C
P22
PCIE_RXP19_TBT_C
K23
PCIE_RXN19_TBT_C
K22
PCIE_RXP20_TBT_C
F23
PCIE_RXN20_TBT_C
F22 L4
TBT1_PCIE_RBIAS
N16 R2
R1 N2
N1 L2
L1 J2
J1 W19
Y19 G1
AN_DPSRC_RBIAS_1
N6
TBT_I2C_SDA
U1
TBT_I2C_SCL
U2
TBT_EE_WP_N
V1
TMU_CLK_OUT
V2
PCIE_WAKE#_TBT
W1
TBT_CIO_PLUG_EVENT#
W2
TBT_SRC0_DDC_DATA
Y1
TBT_SRC0_DDC_CLK
Y2
TBT_SRC0_CFG1
AA1
TBTA_I2C_INT
J4
TBTB_I2C_INT
E2
DG_RTD3_USB_PWR_EN
D4
TBT_FORCE_PWR
H4
TBT_BATLOW#
F2
TBT_MAINON
D2
DG_RTD3_CIO_PWR_EN
F1
TBT_TEST_EN
E1
TBT_TEST_PWRGDTBT_DPSNK1_DDC_DATA
AB5
TBT_RESET_N
F4
TBT_XTL25_IN
D22
TBT_XTL25_OUT
D23
TBT_EE_DI
AB3
TBT_EE_DO
AC4
TBT_EE_CS_N
AC3
TBT_EE_CLK
AB4 B7
A7 A9
B9 A11
B11 A13
B13 Y16
W16 E19
D19
TBTB_LSTX
B4
TBTB_LSRX
B5
TBTB_HPD
G2
PB_USB2_RBIAS
F19 D6 A23
B23 E18 W13 W18 AB2
R804 3.01K_1%_4
TBT_DPSRC_HPD
VCC3V3_FLASH
C216 0.22u/6.3 V_2 C215 0.22u/6.3 V_2
C217 0.22u/6.3 V_2 C218 0.22u/6.3 V_2
C219 0.22u/6.3 V_2 C220 0.22u/6.3 V_2
C221 0.22u/6.3 V_2 C222 0.22u/6.3 V_2
R127 10 0K_1%_4 R766 14 K_1%_4
*short_0402
R739 R757 10 0_1%_2 R774 10 0_1%_2
R811 499_1%_2
Close to Pin
C781
R785 3.32 K_1%_4
R822 3.32 K_1%_4
0.1u/10V_2
PCIE_RXP17_TBT [11]
PCIE_RXN17_TBT [11]
PCIE_RXP18_TBT [11]
PCIE_RXN18_TBT [11]
PCIE_RXP19_TBT [11]
PCIE_RXN19_TBT [11]
PCIE_RXP20_TBT [11]
PCIE_RXN20_TBT [11]
TBT_PLTRST# [12 ]
Close to Pin
TBT_I2C_SDA [40] TBT_I2C_SCL [40]
TBTA_I2C_INT [40]
TP22
RTD3_CIO_PWR_EN [12]
TBT_RESET_N [40]
TBT_EE_WP_N
TBT_SPI_HOLD#
+VCC3P3_SX
R140 *10K_1%_2
D18 RB500V-40
Notice : Carefully It's Pull to Sx , If 0-ohm stuff to MAINON
U9
8
DI(IO0)
VCC
DO(IO1)
3
CLK
WP(IO2)
HOLD(IO3)7GND
W25Q80DVSSIG
Q22 *2N7002KTB
321
*0_5%_4
R130
*short_0402
R737
*short_0402
R1153
TBT_CIO_PLUG_EVENT_N: Connect to PCH (Make sure PCH supports SMI)
2
1
*0_5%_4
R129
*0_5%_4
R746
*0_5%_4
R738
*short_0402
R139
VCC3P3_SX
RESET_N
TBT_EE_DI
5
TBT_EE_DO
2
TBT_EE_CS_N
1
CS
TBT_EE_CLK
6
4
PCIE_WAKE# [10,50,59]
TBT_WAKE#_EC [57] PCH_WAKE# [9]
11/29 sutff D74
TBT_HTPLG_NL5 [13]
TP66
TBT_FORCE_PWR [13] BATLOW# [10]
MAINON [35,57,62,64,68,69]
>100us
>0.1ns & <500ns
R786 2.2K_5%_4 R775 2.2K_5%_4
VCC3V3_FLASH
TBTB_LSTX TBTB_LSRX TBTB_HPD TBT2_DP_HPD
R769 1M_1%_4 R773 1M_1%_4 R128 100K_1%_4 R784 100K_1%_4
Add PD for TBT2_DP_HPD 11/27
CCG4 PU
R137 *10K_1%_2
R138 *10K_1%_2 R134 *10K_1%_2
R135 10K_1%_2 R742 *10K_1%_2 R133 2.2K_5%_4 R132 2.2K_5%_4 R760 10K_1%_2 R136 10K_1%_2 R736 10K_1%_2 R744 *10K_1%_2 R759 10K_1%_2 R758 10K_1%_2 R131 100K_1%_4 R148 1M_1%_4 R147 100K_1%_4 R157 1M_1%_4 R158 1M_1%_4 R749 100K_1%_4 R143 100K_1%_4 R144 100K_1%_4 R745 *2.2K_5%_4 R149 *2.2K_5%_4
R126 *100K_1%_ 4 R732 10K_1%_2
TBT_MAINON
TBT_CIO_PLUG_EVENT# TBT_RESET_N TBT_I2C_SDA TBT_I2C_SCL TBTA_I2C_INT TBTB_I2C_INT TBT_BATLOW# TBT_FORCE_PWR
DG_RTD3_USB_PWR_EN
TMU_CLK_OUT
TBT_SRC0_CFG1 TBT_DP_HPD TBTA_LSTX TBTA_LSRX TBTA_HPD TBT_SRC0_DDC_DATA TBT_SRC0_DDC_CLK
DG_RTD3_CIO_PWR_EN
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW: GPIO | TERMINATION | Power Rail
---------------------------------------------------­GPIO_0 | 10K PU | VCC3V3_LC GPIO_1 | 10K PU | VCC3V3_LC GPIO_2 | 100K PD | GPIO_3 | 100k PD | GPIO_4 | 10K PU | VCC3V3_LC GPIO_5 | 10K PU | VCC3V3_LC GPIO_6 | 100K PD | GPIO_7 | 100K PD | GPIO_8 | 100K PD | POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX POC_GPIO_2 | 100K PD | POC_GPIO_3 | 100K PD | POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX POC_GPIO_5 | 10K PU | VCC3V3_TBT_SX POC_GPIO_6 | 100K PD |
DEBUG PINs: PIN | TERMINATION
------------------------------­MONDC_SVR | GND MONDC_DPSNK_0 | GND MONDC_DPSNK_1 | GND MONDC_DPSRC | GND MONDC_CIO_0 | GND MONDC_CIO_1 | GND TEST_EDM | GND FUSE_VQPS_64 | GND FUSE_VQPS_128 | GND ATEST_P/N | FLOATING USB2_ATEST | FLOATING PCIE_ATEST | FLOATING
CCG4 PU
modify 11/29
CCG4 PU
38
+VCC3P3_SX
+VCC3P3_S0
+VCC3P3_SX
+VCC3P3_S0
+VCC3P3_S0
+VCC3P3_SX
10p/50V_4
C224
A A
10p/50V_4
C223
5
2
4
1
3
4
Y1 25MHZ/30ppm
TBT_XTL25_IN TBT_XTL25_OUT
VCC3V3_FLASH
C792 0.1u/10V_2
R866 *3.32 K_1%_4
R851 *3.32 K_1%_4
TBT_EE_DI TBT_EE_DO TBT_EE_CS_N TBT_EE_CLK
3
U12
8
TI_TBT_EE_WP_N TI_TBT_EE_CLK
TI_TBT_SPI_HOLD#
VCC
3
WP(IO2)
HOLD(IO3)7GND
*W25Q80DVSSIG
R153 *shor t_0402 R150 *shor t_0402 R768 *shor t_0402 R154 *shor t_0402
DI(IO0)
DO(IO1)
5 2 1
CS
6
CLK
4
TI_TBT_EE_DI TI_TBT_EE_DO TI_TBT_EE_CS_N TI_TBT_EE_CLK
TI_TBT_EE_DI TI_TBT_EE_DO TI_TBT_EE_CS_N
R847 *2.2K_5%_4 R857 *2.2K_5%_4
TI_TBT_EE_DI [40]
TI_TBT_EE_DO [40] TI_TBT_EE_CS_N [40 ] TI_TBT_EE_CLK [40]
2
VCC3V3_FLASH
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZGE
PROJECT :
ZGE
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Friday, May 03, 2019
Friday, May 03, 2019
Friday, May 03, 2019
TBT(Apline Ridge)
TBT(Apline Ridge)
TBT(Apline Ridge)
1
ZGE
38 78
38 78
38 78
1A
1A
1A
Page 39
5
4
3
2
1
+VCC3P3_SX
TBT(Apline Ridge Power)
+VCC3P3_LC
0.19A0.03A
C720 1u/6.3V_2
D D
C722 1u/6.3V_2
0.9v @ 700mA
0.9v @ 580mA
0.9v @ 220mA
C C
B B
A A
5
0.9v @ 280mA
C713 1u/6.3V_2 C727 1u/6.3V_2 C714 1u/6.3V_2 C723 1u/6.3V_2 C736 1u/6.3V_2 C735 1u/6.3V_2
C762 1u/6.3V_2 C763 1u/6.3V_2 C764 1u/6.3V_2 C746 1u/6.3V_2 C753 1u/6.3V_2
C752 1u/6.3V_2 C745 1u/6.3V_2
C728 1u/6.3V_2 C732 1u/6.3V_2 C721 1u/6.3V_2
C742 1u/6.3V_2
VCC0P9_DP
VCC0P9_PCIE
VCC0P9_USB
VCC0P9_CIO
PW_VCC3_ANA_PCIE
PW_VCC3_ANA_USB
C750 1u/6.3V_2
C718 1u/6.3V_2
U7B
L8
VCC0P9_DP#3
L11
VCC0P9_DP#1
L12
VCC0P9_DP#2
M8
VCC0P9_DP#4
T11
VCC0P9_DP#5
T12
VCC0P9_DP#6
L6
VCC0P9_ANA_DPSRC#1
M6
VCC0P9_ANA_DPSRC#2
V11
VCC0P9_ANA_DPSNK#1
V12
VCC0P9_ANA_DPSNK#2
V13
VCC0P9_ANA_DPSNK#3
M13
VCC0P9_PCIE#1
M15
VCC0P9_PCIE#2
M16
VCC0P9_PCIE#3
L19
VCC0P9_ANA_PCIE_1#1
N19
VCC0P9_ANA_PCIE_1#2
L18
VCC0P9_ANA_PCIE_2#1
M18
VCC0P9_ANA_PCIE_2#2
N18
VCC0P9_ANA_PCIE_2#3
R15
VCC0P9_USB#1
R16
VCC0P9_USB#2
R8
VCC0P9_CIO#3
R9
VCC0P9_CIO#4
R11
VCC0P9_CIO#1
R12
VCC0P9_CIO#2
L16
VCC3P3_ANA_PCIE
J16
VCC3P3_ANA_USB2
A6
VSS_ANA#8
A8
VSS_ANA#9
A10
VSS_ANA#1
A12
VSS_ANA#2
A14
VSS_ANA#3
A16
VSS_ANA#4
A18
VSS_ANA#5
A20
VSS_ANA#6
A22
VSS_ANA#7
B6
VSS_ANA#37
B8
VSS_ANA#38
B10
VSS_ANA#30
B12
VSS_ANA#31
B14
VSS_ANA#32
B16
VSS_ANA#33
B18
VSS_ANA#34
B20
VSS_ANA#35
B22
VSS_ANA#36
D8
VSS_ANA#45
D9
VSS_ANA#46
D11
VSS_ANA#39
D12
VSS_ANA#40
D13
VSS_ANA#41
D15
VSS_ANA#42
D16
VSS_ANA#43
D18
VSS_ANA#44
E8
VSS_ANA#52
E9
VSS_ANA#53
E11
VSS_ANA#47
E15
VSS_ANA#48
E16
VSS_ANA#49
E22
VSS_ANA#50
E23
VSS_ANA#51
F9
VSS_ANA#56
F16
VSS_ANA#54
F20
VSS_ANA#55
G22
VSS_ANA#57
G23
VSS_ANA#58
H1
VSS_ANA#59
H2
VSS_ANA#64
H12
VSS_ANA#60
H13
VSS_ANA#61
H15
VSS_ANA#62
H16
VSS_ANA#63
H20
VSS_ANA#65
J5
VSS_ANA#71
J18
VSS_ANA#66
J19
VSS_ANA#67
J20
VSS_ANA#68
J22
VSS_ANA#69
J23
VSS_ANA#70
K1
VSS_ANA#72
K2
VSS_ANA#73
L5
VSS_ANA#77
L20
VSS_ANA#74
L22
VSS_ANA#75
L23
VSS_ANA#76
M1
VSS_ANA#78
M2
VSS_ANA#80
M5
VSS_ANA#82
M19
VSS_ANA#79
M20
VSS_ANA#81
N5
VSS_ANA#86
N20
VSS_ANA#83
N22
VSS_ANA#84
N23
VSS_ANA#85
4
R6
VCC3P3_LC
VSS_ANA#87P1VSS_ANA#88P2VSS_ANA#94R5VSS_ANA#89
F8
VCC3P3_SX
GND VCC
VSS_ANA#90
VSS_ANA#91
VSS_ANA#92
R18
R19
R20
R22
R23
C739 1u/6.3V_2
R13
H9
VCC3P3_SVR#1 VCC3P3_SVR#2 VCC3P3_SVR#3
VCC3P3A
VCC3P3_S0
VCC0P9_SVR#1
VCC0P9_SVR#2 VCC0P9_SVR_ANA#1 VCC0P9_SVR_ANA#2 VCC0P9_SVR_ANA#3 VCC0P9_SVR_ANA#4 VCC0P9_SVR_ANA#5 VCC0P9_SVR_ANA#6
VCC0P9_SVR_SENSE
VCC0P9_LVR#1
VCC0P9_LVR#2
VCC0P9_LVR#3
VCC0P9_LVR_SENSE
VSS_ANA#104 VSS_ANA#105 VSS_ANA#106 VSS_ANA#107 VSS_ANA#101 VSS_ANA#102 VSS_ANA#103 VSS_ANA#111 VSS_ANA#112 VSS_ANA#113 VSS_ANA#114 VSS_ANA#108 VSS_ANA#109 VSS_ANA#110 VSS_ANA#117 VSS_ANA#115 VSS_ANA#116
VSS_ANA#10 VSS_ANA#11 VSS_ANA#19 VSS_ANA#20 VSS_ANA#12 VSS_ANA#13 VSS_ANA#14 VSS_ANA#15 VSS_ANA#16 VSS_ANA#17 VSS_ANA#18 VSS_ANA#28 VSS_ANA#29 VSS_ANA#21 VSS_ANA#22 VSS_ANA#23 VSS_ANA#24 VSS_ANA#25 VSS_ANA#26 VSS_ANA#27
VSS_ANA#93
VSS_ANA#95T1VSS_ANA#96T2VSS_ANA#98T5VSS_ANA#97
VSS_ANA#99
T20
U23
U22
+VCC3P3_S0
SVR_IND#1 SVR_IND#2 SVR_IND#3
SVR_VSS#1 SVR_VSS#2 SVR_VSS#3
VSS#3 VSS#4 VSS#5 VSS#6 VSS#7 VSS#8
VSS#9 VSS#10 VSS#14 VSS#11 VSS#12 VSS#13 VSS#15 VSS#16 VSS#17 VSS#21 VSS#22 VSS#18 VSS#19 VSS#20 VSS#27 VSS#28 VSS#29 VSS#23 VSS#24 VSS#25 VSS#26
VSS#1
VSS#2
VSS_ANA#100
DSL6540-SLL44
C703 47u/6.3V_6
A2 A3 B3
L9 M9 E12 E13 F11 F12 F13 F15 J9
C1 C2 D1
A1 B1 B2
F18 H18 J11 H11
V5 V6 V8 V9 V15 V16 V20 W5 W6 W8 W9 W20 W22 W23 Y9 Y13 Y20 AA22 AA23 AB6 AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22 AC6 AC8 AC10 AC12 AC14 AC16 AC18 AC20 AC22 D5 E4 E5 E6 F5 F6 H5 H8 J8 J12 J13 J15 L13 M11 M12 N8 N9 N11 N12 N13 T6 T8 T9 T13 T15 T16 T18 AB1 AC2
1 2
L28 1uH_0.7A_0603
C704
NOTE1
47u/6.3V_6
C708 1u/6.3V_2 C726 1u/6.3V_2
10u/6.3V_4
C710
10u/6.3V_4
C717
10u/6.3V_4
C715
10u/6.3V_4
C716
VCC0P9_SVR
NOTE3
VCC0P9_SVR_IND
VCC0P9_LVR
L1
3
C738 1u/6.3V_2
1 2
10u/6.3V_4
C756 C733 1u/6.3V_2 C754 1u/6.3V_2
10u/6.3V_4
C730
<R3>
+3V_AR
NOTE2
Option 1 for wake support over TBT:
1. Connect 0Ohm to <R1> and <R3>. Keep <R2> empty.
2. Make sure VCC3v3_SX_SYS can support AR maximum power consumption.
3. Simple Bios implementation
Option 2 for wake support over TBT:
1. Connect 0Ohm to <R1> and <R2>. Keep <R3> empty.
2. Bios need to implement Sx entry pre-notice flow by PCIe2TBT.
No wake support at all from AR
1. Connect 0Ohm to <R2> and <R3>. Keep <R1> empty.
0.2A
3.3v @ 1050mA
C740 1u/6.3V_2
0.68uH_2.5x2.0x1.2
R764 0_5%_6
+3V_AR
C749 1u/6.3V_2
C144 47u/6.3V_6
0.9v @ 60mA
R780 *0_5%_6
R779 0_5%_6
<R1>
R750 *0_5%_6
<R2>
C743 1u/6.3V_2
C725 1u/6.3V_2
C145 47u/6.3V_6
NOTE2
NOTE1
40KHz LC Filter to reduce VCC3v3_S0_TBT ripple
L ( LQM18PN1R0MFHD): RDC < 0.2Ohm IDC > 0.2A
C (GRM188R60J476ME15): Need to notice the capacitance at 3.3 Vdc
C724
C719 1u/6.3V_2
C146 47u/6.3V_6
1u/6.3V_2
0.9v @ 1830mA
NOTE3
Inductor value should be 0.6uH or 0.68uH DCR should be as low as possible; 20m – 25m or lowerΩ Ω Saturation current should be above 5A
+3VPCU
+3V_DEEP_SUS+VCC3P3_SX
+3V
2
<S5> Acer S5 is off on AC/DC
NOTE3
Share Same GND plane with SVR_VSS of AR
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Friday, May 03, 2019
Date: Sheet of
Friday, May 03, 2019
Date: Sheet of
Friday, May 03, 2019
PROJECT :
TBT(Apline Ridge Power)
TBT(Apline Ridge Power)
TBT(Apline Ridge Power)
1
ZGE
ZGE
ZGE
39 78
39 78
39 78
39
1A
1A
1A
Page 40
5
+VCC3P3_SX
TBTA_DPSRC_AUX_N TBTA_DPSRC_AUX_P
TBTA_DPSRC_AUX_P[38] TBTA_DPSRC_AUX_N[38]
D D
C C
TBTA_LSTX[38] TBTA_LSRX[38]
R803 100K_1%_2 R799 100K_1%_2
TBTA_DPSRC_AUX_P TBTA_DPSRC_AUX_N
PA_POL
JS-SI2-0323 modify
TBT_RESET_N[38] S5_ON [57,62,63,68]
SBU MUX
U5
18
OUTA0+
17
OUTA0-
20
OUTA1+
19
OUTA1-
15
SAO
8
OUTB0+
9
OUTB0-
6
OUTB1+
7
OUTB1-
11
SBO
5
GND
21
EPAD
R370 *0_5%_4 R380 *0_5%_4 R361 *short_0402
VCC ENA INA+
INA-
SAI ENB INB+
INB-
SBI
GND#122GND#223GND#324GND#425GND#5
26
+3V_S5
R375 *100K_5%_4
R376 *100K_5%_4
TBT_RESET_C
4
+3V3PD-1
13
PA_DP_MODE
16 1
2 14
R163 *short_0402
PA_TBT_MODE
10 3
4 12
R155 *short_0402
TS3DS10224RUKR
JS-PVR-0626 ADD
C157 1u/10V_4
TBTA_SBU1 TBTA_SBU2
TBT_MRESET [57]
+3V3PD-1
+3V3PD-1 +3VPCU
R141 *0_1%_6
R142 *short_0603
R337 1M_5%_4 R311 1M_5%_4 R870 1M_5%_4 R884 1M_5%_4
For all unused GPIO pull down with 1M
+3V_S5
PD_GPIO1 PD_GPIO2 PD_GPIO16 PD_GPIO17
3
CQ-0724 [SI] Change to 988-CG (X38)
VCC3V3_FLASH
C347 10u/6.3V_6
C228 4.7u/6.3V_4
+5V_S5_TYPEC
C257 22u/6.3V_6
600mA
PD_LDO_1V8
S1
S2
S2
S1
2
U13B
35
LDO_1V8
9
LDO_3V3
25
PP_CABLE
46
GND#46
58
DRAIN1#58
8
DRAIN1#8
15
DRAIN1#15
19
DRAIN1#19
57
NC#57
7
NC#7
52
NC#52
56
NC#56
59
GND#59
51
GND#51
20
GND#20
TPS65987SDHRSHR U13C
60
NC#60
61
NC#61
62
NC#62
66
NC#66
67
NC#67
68
NC#68
VIA HOLE 60~82
69
DRAIN1#69
70
DRAIN1#70
71
DRAIN1#71
63
DRAIN1#63
64
DRAIN1#64
65
DRAIN1#65
TPS65987SDHRSHR
PP_HV1
VIN_3V3
GND#82 GND#81 GND#80 GND#79 GND#78 GND#77 GND#76 GND#75 GND#74 GND#73 GND#72
VBUS1
GND#3
GND#1
3A
13
3
3A
11
1
+3V3PD +3VPCU+3V3PD
5
82 81 80 79 78 77 76 75 74 73 72
+5V_S5_TYPEC
C346 10u/6.3V_6
C349 10u/6.3V_6
1
TBTA_VBUS_L
R379 *0_1%_6
R1148 *short_0603
+3V_S5
40
CQ-0725 [SI] Change net name
TBT_RESET_C
R352 *short_0402
TBTA_HPD[38]
TP77
TI_TBT_EE_DO[38] TI_TBT_EE_DI[38] TI_TBT_EE_CLK[38] TI_TBT_EE_CS_N[38]
+3V_S5
R942
2
CN3
A2
SSTXp1
A3
SSTXn1 SSRXp1 SSRXn1 VBUS#4
B2
SSTXp2
B3
SSTXn2 SSRXp2 SSRXn2
A6
Dp1
A7
Dn1
B6
Dp2
B7
Dn2
A5
CC1
B5
CC2
A8
SBU1
B8
SBU2
Q74B PJX8838
3.32K_1%_4
VBUS#1 VBUS#3 VBUS#2
GND#10
5
R997
I2C1_SDA[13]
B B
2ND_MBDATA[10,57,60] I2C1_SCL[13]
2ND_MBCLK[10,57,60]
*0_5%_2
R958
*short_0201
R996
*0_5%_2
R948
*short_0201
3 4
Q74A PJX8838
6 1
TypeC-Port1
TBTA_HD2CA_0_P[38] TBTA_HD2CA_0_N[38] TBTA_CA2HD_0_P[38] TBTA_CA2HD_0_N[38]
TBTA_HD2CA_1_P[38] TBTA_HD2CA_1_N[38] TBTA_CA2HD_1_P[38] TBTA_CA2HD_1_N[38]
TBTA_USB2_D_P[9] TBTA_USB2_D_N[9]
A A
TBTA_HD2CA_0_P TBTA_HD2CA_0_N TBTA_CA2HD_0_P TBTA_CA2HD_0_N
TBTA_HD2CA_1_P TBTA_HD2CA_1_N TBTA_CA2HD_1_P TBTA_CA2HD_1_N
R217 1_1%_4 R206 1_1%_4
modify 12/5
TBTA_USB2_D_P_T TBTA_USB2_D_N_T
TBTA_CC1
TBTA_CC2
TBTA_SBU1 TBTA_SBU2
B11 B10
A11 A10
GND#1 GND#2 GND#3 GND#4
GND#5 GND#6 GND#7 GND#8 GND#9
NC#1 NC#2
R964
3.32K_1%_4
TBTA_VBUS_L
A4 B4 A9 B9
A1 A12 B1 B12
1 2 3 4 5 6
7 8
TBT_I2C_SDA1
TBT_I2C_SCL1
C775
0.047u/16V_4
TBTA_VBUS_L
12
D94 AZ4520-01F.R7G
C773
0.047u/16V_4
C774
0.047u/16V_4
C744 *22u/25V_8
C772
0.047u/16V_4
0717: Add TYPEC_EN/PD_OVP/TYPEC_PL_CONTROL
ESD
TBTA_SBU1 TBTA_SBU2 TBTA_CC1 TBTA_CC2
TBTA_USB2_D_N_T TBTA_USB2_D_P_T
PD_GPIO1 PD_GPIO2
PA_DP_MODE PA_POL PA_TBT_MODE
TI_TBT_EE_DO TI_TBT_EE_DI TI_TBT_EE_CLK TI_TBT_EE_CS_N
PD_GPIO16 PD_GPIO17
TP94 TP98
D21 PESD5V0H1BSF D22 PESD5V0H1BSF D28 PESD5V0H1BSF D23 PESD5V0H1BSF
D26 PESD5V0H1BSF D27 PESD5V0H1BSF
U13A
16
GPIO0
17
GPIO1
18
GPIO2
30
GPIO3/HPD
31
GPIO4
21
GPIO5/I2C3_SCL
22
GPIO6/I2C3_SDA
23
GPIO7/I2C3_IRQ
36
SPI_MISO/GPIO8
37
SPI_MOSI/GPIO9
38
SPI_CLK/GPIO10
39
SPI_SS/GPIO11
40
GPIO12
41
GPIO13
42
GPIO14/PWM
43
GPIO15/PWM
48
GPIO16/PEXT1
49
GPIO17/PEXT2
50
C_USB_P/GPIO18
53
C1_USB_N/GPIO19
54
GPIO20
55
GPIO21
TPS65987SDHRSHR
12 12 12 12
12 12
I2C1_SCL
I2C1_SDA
I2C1_IRQ
GND#45 GND#47
I2C2_SCL
I2C2_SDA
I2C2_IRQ
HRESET
ADCIN1 ADCIN2
0712: C10396 C10397 change to 0201
24
C_CC1
C807 220p/25V_2
26
C_CC2
C803 220p/25V_2
27 28 29
45 47 32
33 34
44
6 10
TBTA_HD2CA_0_P TBTA_HD2CA_1_P TBTA_CA2HD_0_P TBTA_CA2HD_1_P TBTA_HD2CA_1_N TBTA_HD2CA_0_N TBTA_CA2HD_1_N TBTA_CA2HD_0_N
TBT_I2C_SCL1 TBT_I2C_SDA1
R843 10K_5%_4
R854 *short_0402
R918 100K_5%_4 R920 100K_5%_4
D30 PESD5V0H1BSF D95 PESD5V0H1BSF D98 PESD5V0H1BSF D24 PESD5V0H1BSF D96 PESD5V0H1BSF D29 PESD5V0H1BSF D25 PESD5V0H1BSF D97 PESD5V0H1BSF
TBTA_CC1 TBTA_CC2
TBTA_I2C_IRQ2Z_EC [57]
+3V_S5
TBT_I2C_SCL [38] TBT_I2C_SDA [38] TBTA_I2C_INT [38]
HRESET [11]
R917 *10K_5%_4 R916 10K_5%_4
12 12 12 12 12 12 12 12
TO SYSTEM
TO TBT
BP_NoResponse mode
VCC3V3_FLASH VCC3V3_FLASH
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
UCF3T-40N30-0P00
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
TI TPS65982
TI TPS65982
TI TPS65982
ZGE
ZGE
ZGE
40 78Friday, May 03, 2019
40 78Friday, May 03, 2019
1
40 78Friday, May 03, 2019
1A
1A
1A
Page 41
5
4
3
2
1
NV Type-C PPC (UTC)
CYPD
R984 *short_0402
1V8_ANX
3V3_SYS
D D
R1043 *short_0402
R1133
2.2K_5%_4
1V8_ANX
3
1
ANX
R987 *100K_1%_4
ANX
Q37 *PJA138K
USB_RESET
5V_VCONN
PPC_VBUS_MONITOR
USB_RESET_R
3V3_SYS
1V8_ANX
USB_DSCH_CTL[ 57,76]
USB_I2C_SDA
USB_I2C_SCL
1V8_ANX
C935 0.1u/16V_4
U27
3 5
NL17SZ08DFT2G
1V8_ANX
R1134
2.2K_5%_4
NV USE PJC138K
4
2
R1135 100K_1%_4
connect to
1. GPU pin BB7 & BB8
2. power IC
USB_I2C_SDA[24,76]
PPC I2C MASTER TO GPU USB-I2C SLAVE AND RETIMER/MUX CHIP
USB_I2C_SCL[24,76]
FROM M/B
C C
SYSTEM RESET
1
PLTRST#
PLTRST#
2
connect to power IC
ANX
R975 *0_5%_4
CYPD
R957 *short_0402
ANX
R959 *0_5%_4
CYPD
CYPD
C428
0.1u/16V_4
CYPD
R448 *short_0402
ANX
R1074 *0_5%_4
CYPD
R435 *short_0402
ANX
R1001 *0_5%_4
CYPD
R418 *short_0402
ANX
R424 *0_5%_4
ANX
R528 *0_5%_4
ANX
ANX
R1061 *0_5%_4
ANX
CYPD
CYPD
VBUS_PWR_EN[57,76]
C456 *0.1u/16V_4
C444 *0.1u/16V_4
R466 100K_1%_4
C369 1u/6.3V_4
C367
0.1u/16V_4
TP115
R425 *0_5%_4
ANX
PPC_DVDD_IO_C
PPC_VDDD_C
PPC_VCCD_C
PPC_VCON_5V
PPC_I2CM_SDA_C
PPC_I2CM_SCL_C
VBUS_PWR_EN
PPC_VBUS_MON_C
USB_AUX_SW_V1
PPC_FW_ID
0.300
0.300
PPC_DVDD_IO_13
USB_DSCH_CTL
PPC_I2CS_SCL_18
C368 1u/6.3V_4
0.300
0.300
0.300
0.300
PPC_VDDD_A
PPC_P36
R408 *0_5%_4
CYPD
21
20
22
5
16
17
24
2
3
8
12
13
15
18
23
1V8_ANX
CYPD4136
VDD_IO_1
VDDD
VCCD
V5V/VCONN
P3_2/SCB3_I2C_SDA
P3_3/SCB3_I2C_SCL
P1_1/GPIO/SW D_DATA
P1_3/GPIO
P1_5/GPIO
P1_7/GPIO
P2_5/GPIO/VBUS_DIS
P3_0/GPIO
P3_1/GPIO
P3_4/GPIO
P3_6/GPIO
ANX CYA
R525 10K_1%_4
ANX3411
M_SDA
INTP_OUT
M_SCL
TEST_S
HPD
CFG_SDA
SOURCE_CTL
RESET
TEST_EN
VBUS_OCP
AVDD33
DVDD_IO
DISCHARG_CTL
CFG_SCL
SINK_CTL
FW ID NOTEBOOK:PU TO 1.8V
PPC_FW_ID
ANX3411
AVDD33
ROLE_SELECT
CC1
I2C_ADR_1/
GPIO
GPIO1
CC2
VCONN_POWER
VBUS_SENSE
DVDD_IO
GND
R1076 *10K_1%_4
CYPD4136
P2_3/HPD
P1_2/GPIO/SWD_CLK
P2_6/GPIO
P0_0/SCB0_I2C_SDA
P0_1/SCB0_I2C_SCL
XRES/RESET_INPUT
GND_1
CYPD4136-24LQXQT
U23
CC1
CC2
VSS
ANX
C437 *0.1u/16V_4
PPC_CC1_6
6
PPC_CC2_4
4
PPC_HPD_11
11
PPC_I2C_ADR_1
1
VBUS_FET_EN
14
PPC_I2CS_SDA_C
9
PPC_I2CS_SCL_C
10
PPC_VBUS_MON_XRES
7
1V8_ANX
CYPD
R524 *4.7K_5%_4
DEBUG A
19 25
PCB CO-LAYOUT
PPC_DVDD_IO
R405 *short_0402
R521 *0_5%_4 R505 *short_0402 R445 *short_0402
R434 *0_5%_4
R527 *0_5%_4
R526 *short_0402
R406 *short_0402
R1046 *short_0402 R1060 *0_5%_4
R1013 *short_0402
R1077 *0_5%_4
ANX
C912 *0.1u/16V_4
ANXCYPD ANX
C854 *0.1u/16V_4
3V3_SYS
ANX
CYPD
CYPD
ANX
ANX
CYPD
CYPD
ANX
CYPD
ANX
DEBUG B
CYPD
R522 *short_0402
ANX
R523 *0_5%_4
ANX
R937 *0_5%_4
C386 *1u/6.3V_4
1V8_ANX
R394 100K_1%_4
PS_VBUS_ALT [76]
VBUS_FET_EN [57,76]
connect to PWR IC
5V_VCONN
USBC_VBUS
1V8_ANX
C928
0.1u/16V_4
USB_CC1 [44] USB_CC2 [44]
IFPB_I2C_SDA
R1136 348K_1%_4
R1116
49.9K_1%_4
R1083 100K_1%_4
To GPU GPIO24
1V8_ANX
R1005
R986
2.2K_5%_4
2.2K_5%_4
From GPU pin BG12 & BH12 or EC I2C MASTER
41
IFPB_I2C_SDA [23]
IFPB_I2C_SCL [23]
To GPU GPIO24 To PCH GPIO To EC GPIO
GPIO24_IFPF_HPD [11,24,57]
SCL
SDA
1V8_ANX
PIN 10CYPD I2C SLAVE
PIN 9 CYPD I2C MASTER ANX I2C SLAVE
B B
ANX I2C MASTER
USB_I2C_SDA_3V3OR1V8[42,43,44]
USB_I2C_SCL_3V3OR1V8[ 42,43,44]
PIN 17 PIN 18 PIN 22
PIN 16
PIN 17
PIN 21
3V3_SYS
3V3_SYS
R583 *2.2K_5%_4
R529 *2.2K_5%_4
1V8_ANX
1V8_ANX
5
Q47A *PJT138K
3 4
R1114 *short_0402
1V8_ANX
1V8_ANX
2
Q47B *PJT138K
6 1
R1109 *short_0402
RESERVE 3.3V POWER EN FOR RETIMER AND MUX CHIPS
R555 *0_5%_4
R564 *2.2K_5%_4
USB_I2C_SDA
R573 *2.2K_5%_4
USB_I2C_SCL
USB_RESET_OPTION
R556 *short_0402
1 2
1 2
PCB CO-LAYOUT
NV use PCA9509
A A
+3V_S5
R1147 R1139
120 mil 120 mil
*short_0805 *short_0805
Kyle say : 要 100% follow NV released 的 schematics
5
4
3V3_SYS
R1141
R1132
*0_5%_4
*short_0402
RST_BUF_PWR
C931 0.1u/16V_4
USB_RESET_BUFF USB_RESET_BUFF_R
4
U29
3 5
NL17SZ08DFT2G
4
U32 *M74VHC1GT08DFT2G
3 5
3V3_SYS
+1.8V_S5
R625 *short_0402 R630 *short_0402 R608 *short_0402 R614 *short_0402
R629 100K_1%_4
R1146 R1138
*short_0805 *short_0805
3
USB_RESET_BUFF_D
D77 1N4148WS
R628 14K_1%_4
2 1
NEED TUNE R/C VALUE TO MEET MUX EN/RESET POWER UP and POWER DOWN
C493
SEQUENCE REQUIRMENT IN SPEC
1u/6.3V_4
1V8_ANX
2 1
D79 1N4148WS
C487
0.33u/6.3V_4
R610
8.87K_1%_4
USB3_RT_POWER_EN [42] DP_USB_MUX_POWER_EN [44] USB3O2_MUX_PWR_EN [43]
USB3O2_MUX_RESET_N [43]
DEBUG WITH MINIPROG PROGRAMMING TOOL NOTE:WHEN USE THE FUNCTION,NEED STUFF (DEBUG A) AND NO STUFF (DEBUG B)
2
+5V_S5_TYPEC
C462
0.1u/16V_4
test points sequence and pitch. (2.54mm with PHY 1.02)
TP109 TP116 TP50 TP46 TP106
PPC_DVDD_IO_C
PPC_VBUS_MON_XRES
PPC_I2C_ADR_1
VBUS_PWR_EN
NV use APL3552 (Iout 0.44A)
C472
1u/6.3V_4
R569 10K_1%_4
PIN 21_VDDIO
GND
PIN 7_XRES
PIN 1_CLK
PIN 24_DATA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
IN
EN3NC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TC2 PPC(CYPD4136)
TC2 PPC(CYPD4136)
TC2 PPC(CYPD4136)
5
OUT#1
6
OUT#2
GND
EPAD
AP21510FM-7
1
7
1
1u/6.3V_4
4
ZGE
ZGE
ZGE
41 78Friday, May 03, 2019
41 78Friday, May 03, 2019
41 78Friday, May 03, 2019
5V_VCONN
U28
C470
1A
1A
1A
Page 42
5
4
3
2
1
NV Type-C USB3 Re-Timer (UTC)
symbol follow NV for easy check
D D
C831 1000p/50V_4
USB3_RT_VIN
Inductor chose:>500mA,DCR<100R.
1 2
L5 3.3uH_3x3x1.5
C240 0.22u/10V_4 C239 0.22u/10V_4 C241 0.22u/10V_4 C242 0.22u/10V_4
R853 *short_0402
USB3_RT_DCDC_GND
4.7u/6.3V_4
USB_I2C_SDA_3V3OR1V8[41,43,44] USB_I2C_SCL_3V3OR1V8[41,43,44]
3 4
C340
GPU_USB_L0+[24] GPU_USB_L0-[24]
L8
12
GPU_USB_L1+[24] GPU_USB_L1-[24]
USB3_RT_XTAL_O_R
C829
100p/50V_4
R277 1K_1%_4
C260 33p/50V_4
C341
1000p/50V_4
3V3_SYS
C827
1u/6.3V_4
C856 0.22u/10V_4 C857 0.22u/10V_4 C835 0.22u/10V_4 C834 0.22u/10V_4
USB3_RT_POWER_EN[41]
USB3_RT_XTAL_I USB3_RT_XTAL_O
3V3_SYS 1V8_ANX
R915 *0_5%_4
USB3_RT_PU_PWR
R359 *10K_1%_4 R883 4.7K_5%_4 R876 4.7K_5%_4
C828
1000p/50V_4
TP35 TP34
R349 *short_0402 R304 *short_0402
USB3_RT_DCI_CLK USB3_RT_DCI_DAT
USB3_RT_SSTXP USB3_RT_SSTXN USB3_RT_SSRXP USB3_RT_SSRXN
R898 *short_0402
4
AVDD09
USB3_RT_POWER_EN
USB3_RT_SDA USB3_RT_SCL
USB3_RT_XTAL_O USB3_RT_XTAL_I
USB3_RT_POWER_EN USB3_RT_I2C_ADR_SEL0 USB3_RT_I2C_ADR_SEL1
1
40
VDD33
32 31
39 38 35 34
4
26 24
21 20
AVDD09#1
DCI_CLK DCI_DAT
SSTXP SSTXN SSRXP SSRXN
POWER_EN SDA
SCL XTAL_O XTAL_I
23
USB3_RT_I2C_ADR_SEL0
R347 *10K_1%_4 R291 *10K_1%_4 R865 *10K_1%_4
36
AVDD09#2
USB3_RT_I2C_ADR_SEL1
5
28
DVDD09#1
ADR_SEL122ADR_SEL0
3
6
25
VDD18#2
VDD18#3
DVDD09#2
AVSS#1
AVSS#3
AVSS#4
2
13
17
37
USB3_RT_DCDC_GND
33
VDD18#1
AVSS#2
EPAD
7
41
AVDD18#1
AVDD18#2
TEST_EN
VGND
VIN
TX1P TX1N RX1P RX1N
TEST6
TEST_R
TEST_0 TEST_1
ANX7490QN-CB-R
8
VX
10
VFB
14 15 12 11
27 19 18 30 29
USB3_RT_VX
USB3_RT_TX1P USB3_RT_TX1N USB3_RT_RX1P USB3_RT_RX1N
USB3_RT_TEST_EN USB3_RT_TEST_R
USB3_RT_TEST_30 USB3_RT_TEST_29
U15
9
16
0 1 1
3
USB3_RT_0V9
C839
1u/6.3V_4
C C
1000p/50V_4
PBY160808T-221Y-N
C840
From GPU pin BA8 & BA7 From GPU pin BA2 & BA1
B B
A A
R247 1M_1%_4
Y2 24MHZ/20ppm
1 2
C237 33p/50V_4
01/31 Modify value
5
C823
0.1u/16V_4
USB3O2_MUX_SSTXP [43] USB3O2_MUX_SSTXN [43] USB3O2_MUX_SSRXP [43] USB3O2_MUX_SSRXN [43]
TP31 TP29
TP33 TP32
I2C_ADR_SEL1I2C_ADR_SEL0 00 1
1
C312 1u/6.3V_4
C238
0.1u/16V_4
I2C_ADR(8-bit) 0x22 0x26 0x2A0 0x2E(DEFAULT)
2
1V8_ANX
C812
0.1u/16V_4
C249 1000p/50V_4
C809 22u/6.3V_6
USB3_RT_DCDC_GND
C247
0.1u/16V_4
USB3_RT_0V9
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C248 10u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
TC2 USB3 Re-Timer ANX7490
TC2 USB3 Re-Timer ANX7490
TC2 USB3 Re-Timer ANX7490
C806 22u/6.3V_6
USB3_RT_DCDC_GND
1
42
L33
1 2
PBY160808T-221Y-N
ZGE
ZGE
ZGE
42 78Friday, May 03, 2019
42 78Friday, May 03, 2019
42 78Friday, May 03, 2019
1V8_ANX
1A
1A
1A
Page 43
5
4
NV USB3/2 MUX (UTC)
symbol follow NV for easy check
3
USB3O2_MUX_AVDD33
C351 1000p/50V_4
2
C337
0.1u/16V_4
L11 PBY160808T-221Y-N
1 2
C342 1u/6.3V_4
3V3_SYS
1
3V3_SYS 1V8_ANX
R254 *0_5%_4
R255 *short_0402
43
D D
40
24
TP82
USB3O2_MUX_SSRXP[42]
USB3O2_MUX_SSRXN[42]
USB3O2_MUX_SSTXP[42]
USB3O2_MUX_SSTXN[42]
NV_USB2_D_N[9]
From PCH USB2 signal
C C
USB_I2C_SDA_3V3OR1V8[41,42,44]
USB_I2C_SCL_3V3OR1V8[41,42,44]
B B
3V3_SYS 1V8_ANX
NV_USB2_D_P[9]
USB3O2_MUX_RESET_N[41]
R278 *short_0402 R269 *short_0402
TP86
TP85 TP92
TP45 TP47
TP78
TP93 TP96
TP37
TP84
USB3O2_MUX_DP_LN_0P USB3O2_MUX_DP_LN_0N
USB3O2_MUX_DP_LN_3P USB3O2_MUX_DP_LN_3N
USB3O2_MUX_AUXP USB3O2_MUX_AUXN
USB3O2_MUX_HPD
USB3O2_MUX_SSRX_N USB3O2_MUX_SSRX_P
USB3O2_MUX_RESET_N USB3O2_MUX_NC_23
USB3O2_MUX_CFG_SDA USB3O2_MUX_CFG_SCL
USB3O2_MUX_VBUS_CTRL USB3O2_MUX_USB_ID
USB3O2_MUX_TEST_EN
USB3O2_MUX_DRP_EN
USB3O2_MUX_I2C_ADR1
1
DP_LN_0P
2
DP_LN_0N
7
DP_LN_1P
8
DP_LN_1N
9
DP_LN_2P
10
DP_LN_2N
3
DP_LN_3P
4
DP_LN_3N
16
AUXP
17
AUXN
37
HPD
11
SSTX_N
12
SSTX_P
5
SSRX_N
6
SSRX_P
33
RESET_N
23
NC
38
CFG_SDA
39
CFG_SCL
43
VBUS_CTRL
42
USB_ID
34
TEST_EN
28
DRP_EN
47
I2C_ADR_1
48
I2C_ADR_0/VBUS_Discharge_CTRL
AVDD33#1313AVDD33#24
DVDD_IO
VCONN1_EN
VCONN2_EN
VBUS_DIV6
INTP_OUT
CABLE_DET
EPAD
DVSS
49
46
SSTXP1 SSTXN1
SSRXN2
SSRXP2
SSTXP2 SSTXN2
SSRXN1
SSRXP1
SBU1 SBU2
CC1
CC_CAP
CC2
PWR_EN
U16 ANX7428QN-AB-R
25 26
USB3O2_MUX_SSRX2N
35
USB3O2_MUX_SSRX2P
36
30 29
USB3O2_MUX_SSRX1N
32
USB3O2_MUX_SSRX1P
31
USB3O2_MUX_SBU1
19
USB3O2_MUX_SBU2
18
USB3O2_MUX_CC1
21
USB3O2_MUX_VCONN1_EN
45
USB3O2_MUX_CC_CAP
22
USB3O2_MUX_CC2
20
USB3O2_MUX_VCONN2_EN
44
USB3O2_MUX_VBUS_DIV6
15
USB3O2_MUX_INTP_OUT
41
USB3O2_MUX_CABLE_DET
14
USB3O2_MUX_PWR_ENUSB3O2_MUX_I2C_ADR0
27
USB3O2_MUX_SSTX1P [44] USB3O2_MUX_SSTX1N [44]
TP79 TP83
USB3O2_MUX_SSTX2P [44] USB3O2_MUX_SSTX2N [44]
TP90 TP89
TP41 TP36
TP44
TP80
TP42
TP43 TP81
TP40
USB3O2_MUX_PWR_EN [41]
C805 1000p/50V_4
C243
0.1u/16V_4
C804 1u/6.3V_4
R840 *0_5%_4
USB3O2_MUX_PU_PWR
R904 *10K_1%_4 R842 *10K_1%_4 R841 *10K_1%_4
A A
R285 *10K_1%_4 R897 *4.7K_5%_4 R386 *10K_1%_4
5
R839 *short_0402
USB3O2_MUX_PWR_EN USB3O2_MUX_I2C_ADR0 USB3O2_MUX_I2C_ADR1 USB3O2_MUX_RESET_N USB3O2_MUX_DRP_EN USB3O2_MUX_CABLE_DET USB3O2_MUX_VBUS_CTRL USB3O2_MUX_USB_ID USB3O2_MUX_INTP_OUT
R903 *10K_1%_4 R249 4.7K_5%_4 R250 4.7K_5%_4 R299 *10K_1%_4 R890 4.7K_5%_4 R387 *10K_1%_4 R251 4.7K_5%_4 R252 *10K_1%_4 R253 4.7K_5%_4
4
I2C_ADR_SEL0 0 0
1 1
3
I2C_ADR_SEL1 I2C_ADR(8-bit) 0 1 01
0x50(DEFAULT) 0x72 0x7C 0x80
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
TC2 USB3/2 MUX ANX7428
TC2 USB3/2 MUX ANX7428
TC2 USB3/2 MUX ANX7428
ZGE
ZGE
ZGE
1A
1A
1A
43 78Friday, May 03, 2019
43 78Friday, May 03, 2019
43 78Friday, May 03, 2019
1
Page 44
5
4
3
2
1
C796
0.1u/16V_4
C788 *22u/25V_8
44
NV DP and USB3 MUX (UTC)
symbol follow NV for easy check
L26
C925
0.01u/50V_4
PBY160808T-221Y-N
1 2
C465
4.7u/6.3V_4
D D
DP_USB_MUX_AVDD09
C874 1000p/50V_4
From GPU
From PCH USB3 signal
USB30_RX4-[9]
USB30_RX4+[9] USB30_TX4-[ 9] USB30_TX4+[9]
C C
B B
3V3_SYS 1V8_ANX
R624 *0_5%_4
DP_USB_MUX_PU_PWR
R622 *10K_1%_4 R1069 4.7K_5%_4 R1022 4.7K_5%_4 R563 4.7K_5%_4 R1093 *4.7K_5%_4 R1007 *4.7K_5%_4
I2C_ADR_SEL0
A A
DP_USB_MUX_POWER_EN[41]
USB_I2C_SDA_3V3OR1V8[41,42,43] USB_I2C_SCL_3V3OR1V8[41,42,43]
R601 *short_0402
DP_USB_MUX_POWER_EN DP_USB_MUX_I2C_ADR_SEL0 DP_USB_MUX_I2C_ADR_SEL1 DP_USB_MUX_OP_MODE0
DP_USB_MUX_OP_MODE1 DP_USB_MUX_FLIP
I2C_ADR_SEL1
0 0 1 1
I2C_ADR(8-bit)
0
0x20
1
0x24 0x28
0 DP2+USB3 1
0x2C(DEFAULT)
DP_USB_MUX_0V9
C455 1000p/50V_4
DP_USB_MUX_ML0P[24] DP_USB_MUX_ML0N[24] DP_USB_MUX_ML1P[24] DP_USB_MUX_ML1N[24] DP_USB_MUX_ML2P[24] DP_USB_MUX_ML2N[24] DP_USB_MUX_ML3P[24] DP_USB_MUX_ML3N[24]
DP_USB_MUX_AUXP[24] DP_USB_MUX_AUXN[24]
C482 0.22u/10V_4 C483 0.22u/10V_4 C480 0.22u/10V_4 C481 0.22u/10V_4
TP114
R507 *short_0402 R485 *short_0402
TP56 TP58
TP51
R1082 *10K_1%_4 R1042 *10K_1%_4 R1020 *10K_1%_4 R557 *4.7K_5%_4 R1092 4.7K_5%_4 R976 4.7K_5%_4
OP_MODE1
0 0 1 1
OP_MODE0
1V8_ANX
C484 1u/6.3V_4
C911 1u/6.3V_4
DP_USB_MUX_SSTXN DP_USB_MUX_SSTXP DP_USB_MUX_SSRXN DP_USB_MUX_SSRXP
DP_USB_MUX_POWER_EN DP_USB_MUX_TEST_R
DP_USB_MUX_SDA DP_USB_MUX_SCL
DP_USB_MUX_OP_MODE0 DP_USB_MUX_OP_MODE1
DP_USB_MUX_FLIP DP_USB_MUX_I2C_ADR_SEL0
DP_USB_MUX_I2C_ADR_SEL1
DP_USB_MUX_DCI_CLK DP_USB_MUX_DCI_DAT
DP_USB_MUX_TEST_EN
NV H:4.7K L:10K
WORK_MODE
0
CHIP DISABLED USB31
0
DP4
1
C414
0.1u/16V_4
55 56 58 59
2 3 5 6
8 9
52 53 49 50
7
28
38 37
43 42
29 36
35
47 46
40
ML0P ML0N ML1P ML1N ML2P ML2N ML3P ML3N
AUXP AUXN
SSTXN SSTXP SSRXN SSRXP
POWER_EN TEST_R
SDA SCL
OP_MODE0 OP_MODE1
FLIP I2C_ADR_SEL0
I2C_ADR_SEL1
DCI_CLK DCI_DAT
TEST_EN
41
61
C926 1000p/50V_4
10
DVDD09#1
DVDD09#2
DVSS#1
C923
1000p/50V_4
DP_USB_MUX_VDDIODP_USB_MUX_AVDD09
DP_USB_MUX_VIN
14
21
51
AVDD09#11AVDD09#2
AVDD09#3
11
54
22
60
32
VDD18#4
VDD18#1
VDD18#248VDD18#3
AVSS#14AVSS#218AVSS#3
AVSS#4
57
39
VDD33
VDD_IO#1
VDD_IO#2
RX1N
RX2N
PULL_1 PULL_2
VGND
XTAL_O
XTAL_I
25
VIN
C924
1u/6.3V_4
U24 ANX7440QN-CB-R
DP_USB_MUX_TX1P CON_UTC_TX1P
19
TX1P
DP_USB_MUX_TX1N CON_UTC_TX1N
20
TX1N
DP_USB_MUX_RX1N
16
DP_USB_MUX_RX1P
17
RX1P
DP_USB_MUX_TX2P CON_UTC_TX2P
24
TX2P
DP_USB_MUX_TX2N CON_UTC_TX2N
23
TX2N
DP_USB_MUX_RX2N
26
DP_USB_MUX_RX2P
27
RX2P
DP_USB_MUX_SBU1
34
SBU1
DP_USB_MUX_SBU2
33
SBU2
DP_USB_MUX_PULL1
45
DP_USB_MUX_PULL2
44
DP_USB_MUX_VX
13
VX
15
VFB
12
DP_USB_MUX_XTAL_O
31
DP_USB_MUX_XTAL_I
30
3V3_SYS
1 2
3V3_SYS 1V8_ANX
R1115 *0_5%_4
C375 0.22u/10V_4 C374 0.22u/10V_4
C373 0.33u/6.3V_4 C372 0.33u/6.3V_4
C379 0.22u/10V_4 C380 0.22u/10V_4
C378 0.33u/6.3V_4 C377 0.33u/6.3V_4
C429 0.1u/16V_4 C425 0.1u/16V_4
R595 100K_1%_4 R571 100K_1%_4
L17
3.3uH_3x3x1.5
R426 1K_1%_4
R414 1M_1%_4
Y3 24MHZ/20ppm
3 412
C395 33p/50V_4
01/31 Modify value
R1012 *short_0402
DP_USB_MUX_VDDIO
C919
0.1u/16V_4
MAKE SURE NO LAYOUT STUB
R396 220K_5%_4 R397 220K_5%_4 R398 220K_5%_4 R399 220K_5%_4
C900
0.1u/16V_4
DP_USB_MXU_DCDC_GND
DP_USB_MUX_XTAL_O_R
C383 33p/50V_4
C882 22u/6.3V_6
DP_USB_MUX_VIN
C384 1000p/50V_4
CON_UTC_RX1N CON_UTC_RX1P
CON_UTC_RX2N CON_UTC_RX2P
CON_UTC_SBU1 CON_UTC_SBU2
DP_USB_MUX_0V9
R963 *short_0402
DP_USB_MXU_DCDC_GND
Singal GND and GND_DCDC must be seperated.
USB3O2_MUX_SSTX1N[43] USB3O2_MUX_SSTX1P[43]
USB3O2_MUX_SSTX2N[43] USB3O2_MUX_SSTX2P[43]
C394
0.1u/16V_4
C405
C886
10u/6.3V_4
22u/6.3V_6
DP_USB_MXU_DCDC_GND
The cap is used to reduce the slew rate of AUX CH
USB_CC1[41]
USB_CC2[41]
PCB CO-LAYOUT
R327 *short_0402
*DLP11SN900HL2L
1
2
4 3
L6
R342 *short_0402
PCB CO-LAYOUT
R899 *short_0402
*DLP11SN900HL2L
1
2
4 3
L34
R892 *short_0402
1 2
L36
PBY160808T-221Y-N
CON_UTC_SBU1
C477 18p/50V_4
CON_UTC_SBU2
CON_UTC_D1N CON_UTC_D1P
CON_UTC_D2N CON_UTC_D2P
C270 390p/50V_4
C250 390p/50V_4
1V8_ANX
CON_UTC_TX1P CON_UTC_TX1N CON_UTC_RX1P CON_UTC_RX1N
CON_UTC_TX2P CON_UTC_TX2N CON_UTC_RX2P CON_UTC_RX2N
CON_UTC_D1P CON_UTC_D1N CON_UTC_D2P CON_UTC_D2N
USB_CC1 USB_CC2
CON_UTC_SBU1 CON_UTC_SBU2
USB_CC1
USB_CC2
Check P/N & F/P!!
VBUS_1 VBUS_3 VBUS_2 VBUS_4
GND_1 GND_2 GND_3 GND_4
GND_5 GND_6 GND_7 GND_8 GND_9
GND_10
NC_1 NC_2
ESD
USB_CC1 USB_CC2
CON_UTC_SBU1 CON_UTC_SBU2
CON_UTC_D1N CON_UTC_D1P
CON_UTC_D2N CON_UTC_D2P
CON_UTC_TX1P CON_UTC_TX1N
CON_UTC_RX1P CON_UTC_RX1N
CON_UTC_TX2P CON_UTC_TX2N
CON_UTC_RX2P CON_UTC_RX2N
USBC_VBUS
C795
0.1u/16V_4
A4 B4 A9 B9
USBC_VBUS A1 A12 B1 B12
1 2 3 4 5 6
7 8
D39 PESD5V0H1BSF D34 PESD5V0H1BSF
D41 PESD5V0H1BSF D42 PESD5V0H1BSF
D46 PESD5V0H1BSF D47 PESD5V0H1BSF
D103 PESD5V0H1BSF D101 PESD5V0H1BSF
D51 PESD5V0H1BSF D50 PESD5V0H1BSF
D105 PESD5V0H1BSF D104 PESD5V0H1BSF
D100 PESD5V0H1BSF D102 PESD5V0H1BSF
D45 PESD5V0H1BSF D48 PESD5V0H1BSF
Add & Reverved
CN4
A2
A3 B11 B10
B2
B3 A11 A10
A6
A7
B6
B7
A5
B5
A8
B8
MJ8E0B-T880-422
SSTXp1 SSTXn1 SSRXp1 SSRXn1
SSTXp2 SSTXn2 SSRXp2 SSRXn2
Dp1 Dn1 Dp2 Dn2
CC1 CC2
SBU1 SBU2
12
D99 AZ4520-01F.R7G
12 12
12 12
12 12
12 12
12 12
12 12
12 12
12 12
C794
0.1u/16V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
TC2 DP/USB3 MUX ANX7440
TC2 DP/USB3 MUX ANX7440
TC2 DP/USB3 MUX ANX7440
1
ZGE
ZGE
ZGE
1A
1A
1A
44 78Friday, May 03, 2019
44 78Friday, May 03, 2019
44 78Friday, May 03, 2019
Page 45
5
4
3
2
1
45
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Type C(USB3.1/DP) *2
Type C(USB3.1/DP) *2
Type C(USB3.1/DP) *2
ZGE
ZGE
ZGE
45 78Friday, May 03, 2019
45 78Friday, May 03, 2019
1
45 78Friday, May 03, 2019
1A
1A
1A
Page 46
5
USB Charger (UBC)_BC 1.2
Part Number
AL002544001
Description
TPS2544RTER
AL055544001 SLGC55544CVTR
D D
+5VPCU
C917 1u/6.3V_2
USB_CHARGE_ON[57,58]
USB_CLT1[57,58]
USB_BC_ON[57,58]
R1030
39K_1%_4
4
USB_BC_ON(Low)-->ILIM_L USB_BC_ON(High)-->ILIM_H
USBP3-[9] USBP3+[9]
+5VPCU
R1085 10K_1%_4 R1084 10K_1%_4 R1080 100K_1%_4
(RILIM_LO 1.2A) (RILIM_HI 2.3A)
R1029
20K_1%_4
ILIM_LO3 ILIM_HI3
CTL2_3 CTL3_3
U26
1
VIN
2
DM_OUT
3
DP_OUT
6
CTL1
7
CTL2
8
CTL3
5
EN
4
ILIM_SEL
15
ILIM_L
16
ILIM_H
SLGC55544CVTR
3
VOUT
DM_IN
DP_IN
FAULT
EPAD
GND
2
USBP3-_C USBP3+_C
120mil120mil
C474 100u/6.3V_12
USB_OC0# [9]
12 11
10
9
NC
13
17 14
C439 470p/50V_4
+USBPWR3
C454
0.1u/16V_4
1
46
USB3.0 Retimer (UB3)
double check connections From Host
C C
+3V_SUS
L39 BLM18KG331SN1D
1 2
+1.2VSUS
B B
+3V_U3 +VDD_DCI
R1137 *short_0402
C929 1u/6.3V_2
L40 BLM18KG331SN1D
1 2
+1.2V_U3
Decoupling caps need be placed as close to power pins as possible.
1.2 V power ripple requirement: < 30 mV
Vendor suggests to use I2C mode.
Intel: USB 3.1 transmit pairs require a 75–265 nF capacitor in the path between PCH and ESD/CMC protection.
C475 0.22u/25V_2 C478 0.22u/25V_2
C490 0.22u/25V_2 C494 0.22u/25V_2
VDD_DCI = 1.8V/2.5V/3.3V
C934 1u/6.3V_2
C938
0.01u/16V_2
C936
0.1u/10V_2
C937
4.7u/6.3V_2
USB30_TX3+[9] USB30_TX3-[9]
USB30_RX3+[9] USB30_RX3-[9]
C932
0.1u/10V_2
TP60 TP59
USB30_TX3+_RTI USB30_TX3-_RTI
USB30_RX3+_RTO USB30_RX3-_RTO
C933
0.01u/16V_2
EN_U3
MODE
C930
0.1u/10V_2
2 3
8 9
7 6
11
30
5
VDDDCI
A_INP A_INN
B_OUTP B_OUTN
DCI_DATA DCI_CLK
EN
MODE
C942
0.01u/16V_2
4
10
28
22
19
34
VDDD
VDDAX
VDDM#1
VDDM#3
VDDM#2
PS8811QFN36GTR2-A2
DCI_EN
B_EQ14B_DE
A_EQ
12
15
25
32
DCI_EN
+3V_U3+VDD_DCI +1.2V_U3
1
18
VDDAA24VDDBA23VDDBX
VDD33#1
A_OUTP A_OUTN
RESETB
ADDR036ADDR1
CSCL33CSDA
35
ADDR0
ADDR1
to I2C Master
PS8811_MBCLK PS8811_MBDATA
U30
VDD33#2
USB30_TX3+_RTO USB30_TX3+_C
27
USB30_TX3-_RTO USB30_TX3-_C
26
USB30_RX3+_RTI USB30_RX3+_R
21
B_INP
USB30_RX3-_RTI USB30_RX3-_R
20
B_INN
29
REXT
REXT
16
RESETB
17
TEST
13
GND#1
31
GND#2
37
EPAD
C479 0.22u/25V_2 C486 0.22u/25V_2
R621 *short_0201 R627 *short_0201
R561 4.99K_1%_4
3ND_MBCLK[23,24,53,54,57]
3ND_MBDATA[23,24,53,54,57]
+3V_U3
R631 10K_1%_2 R1144 4.7K_5%_4
Chip Enable. Active is high. Default is internal pull-down by 150K
R1131 *4.7K_5%_4 R1130 *4.7K_5%_4
I2C Slave address setting. ADDR0/1 is pulled down by 150K in default [ADDR1, ADDR0]: 00: 0x50-0x53 01: 0x54-0x57 10: 0xE0-0xE3 11: 0xE4-0xE7
R1143 *4.7K_5%_4
DCI_EN: Auto DCI enable or disable L: Disable M: Disable (default) H: Enable
Chip Operation Mode Selection. Default is Middle Level L: 5G redriver Mode, 10G retimer mode, adaptive EQ. M: 5G redriver Mode, 10G retimer mode, fixed EQ. (Default)
+3V
5
Q33A
3ND_MBCLK PS8811_MBCLK
3ND_MBDATA PS8811_MBDATA
PJX8838
34
+3V +3V_U3
2
Q33B PJX8838
61
+3V_U3
R1128
4.7K_5%_4
R1127
4.7K_5%_4
RESETB EN_U3
ADDR0 ADDR1
DCI_EN
MODE
C495 2.2u/10V_4
R1142 *4.7K_5%_4
R559 *4.7K_5%_4
USB3.0 (UB3)
USB30_RX3-_R USB30_RX3+_R
R1112 *short_0402
USBP3+_C USBP3+_C_R
A A
USBP3-_C USBP3-_C_R
R1113 *short_0402
USB30_TX3-_C USB30_TX3-_R USB30_TX3+_C USB30_TX3+_R
5
R613 *short_0402 R607 *short_0402
4
+USBPWR3
5 4 6 3 7 2 8 1 9
C448
0.1u/16V_4
Shield StdA_SSRX-
GND
StdA_SSRX+
D+
GND_Drain
D-
StdA_SSTX-
VBUS
StdA_SSTX+ Shield Shield
10 11
1213
CN7
Shield
2UB4006-152101F
3
+USBPWR3
USBP3+_C_R USBP3-_C_R
USB30_RX3-_R USB30_RX3+_R
USB30_TX3-_R USB30_TX3+_R
1 2
D72 AZ5725-01F.R7G
D112 PESD5V0X2UM
1
3
2
1 2
D81 PESD5V0H1BSF D80 PESD5V0H1BSF
1 2 1 2
D78 PESD5V0H1BSF D76 PESD5V0H1BSF
1 2
2
Quanta Computer Inc.
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Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
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Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
USB2.0*1/USB3.0*3/BC1.2
USB2.0*1/USB3.0*3/BC1.2
USB2.0*1/USB3.0*3/BC1.2
ZGE
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46 78Friday, May 03, 2019
46 78Friday, May 03, 2019
46 78Friday, May 03, 2019
1
1A
1A
1A
Page 47
A
Codec
2 2
+3VPCU
1 1
R623 *10K_5%_4
2
RB500V-40 RB500V-40
Near Codec
+3V
Near Codec
R604 10K_1%_2
Q53 DDTC144EUA-7-F
1 3
BEEP1
C272 10u/6.3V_4
C267 10u/6.3V_4
C261
0.1u/10V_2
C265
0.1u/10V_2
For debug
R587
SENSEA_EC
*0_5%_4
2
Q54 DDTC144EUA-7-F
1 3
1 2
1 2
D36 D32
PBY160808T-600Y-N
PBY160808T-600Y-N
PCBEEP_EC[57] ACZ_SPKR[10]
+3V +3V_DVDD
L3
+3V +3V_DVDD_IO
L2
1 1
HP_JD#_EC_CODEC[57]
H : Default and HP_JD#_EC is H L :HP_JD#_EC is L
B
R594 200K_1%_4
R565
R911 100K_1%_4
*short_0402
SENSEA
HP_JD#_EC
SPDIF_OUT[59]
+3V
C
+3.3V Dual or Stanby Power requires to have at least 150mA current budget
+3V_DVDD
change to 0603 size
2.2u/10V_6
HP-R1[59]
For Combo jack design
MIC-JD[59]
R344 *0_5%_4
+3V_DVDD
HP_JD#_EC [57,59]
HP-L1[59]
R373 *short_0402
C336 0.1u/16V_4 C331 10u/6.3V_4
R1149 100K_5%_4
R296 *short_0402
DMIC_DAT[32] DMIC_CLK[32]
ADOGND
EAPD[48]
R439 *short_0402
ADOGND
C355
SENSEA SENSEB
C285
0.1u/10V_2
ANALOG GNDDIGITAL GND
C421
0.1u/16V_4
C398
2.2u/10V_6
43 44 45 46 47 48 49 50 51 52 53 54 55 56
57
C287 10u/6.3V_4
R302 22_1%_2 R301 22_1%_2
C264 33p/50V_4
R886 *short_0201
ADOGND
DIP cap. is required for higher SNR/THD+N performance.
C424
+
100u/25V_D6.3H5.8
C879 10u/6.3V_4
C420 10u/6.3V_4
ADOGND
CBN CPVEE FRONT_R FRONT_L CPVREF FRONT/SURR/JD1 MIC1/CLFE/JD2 MIC2/LINE2/JD3 LINE/SIDEURR/JD4 LDO3_CAP SPDIF_OUT
MIC-GPI
I2C_SDA I2C_SCL HD_I2S_SEL
GPIO3/IRQOUT
EPAD
C263 33p/50V_4
C880 0.1u/16V_4
ADOGND
37
39
40
41
42
CBP
AVSS2
CPVDD
LINE1_L
LDO2_VRP38LDO2_CAP
Include Thermal Pad
QFN56 (7*7)
DVDD1LED_BEAT/GPIO0/DMIC-DAT122EAPD/GPIO1/DMIC_CLK/LED_PULSE3I2S_DIN/GPIO6/MIC-GPI/EAPD4I2S_OUT1/GPIO7/DSD_R5I2S_SCLK/GPIO2/DSD_SCLK6I2S_MCLK/I2S_OUT2/EAPD/MIC-GPI7I2S_LRCK/GPIO5/DSD_L8DVDD_IO9RSTB/MCLK10BCLK/BCLK11SYNC/LRCK12SDATA-IN/DOUT13SDATA-OUT/DIN
C280
0.1u/10V_2
D
ADOGND
30
31
32
33
34
35
36
MIC1_L
MIC2_L
LINE1_R
MIC1_R
MIC2_R
SIDESURR_L
SIDESURR_R
MIC1_VREFO_R
MIC1_VREFO_L
R294 22_1%_2
C277 22p/25V_2
R280 *short_0402
C279 10u/6.3V_4
IF DESIGN NEEDS SUPPORT TO LED MODULE IN S4 , THD DVDD-IO SHOULD CONNECT TO +3.3V_Dual or Stanby POWER
29
AVSS1
VREF
LDO1_CAP
AVDD1 SURR_L SURR_R LINE2_L LINE2_R
MIC2_VREFO
LINE2_VREFO
PCBEEP
14
U17 ALC1220-VA3-CG
28 27 26 25 24 23 22 21
CEN
20
LFE
19 18 17 16 15
BEEP3
C321
0.1u/10V_2
MHDA INTERFACE
PCH_AZ_CODEC_SDOUT [10]
PCH_AZ_CODEC_SDIN0 [ 10]
PCH_AZ_CODEC_SYNC [10]
PCH_AZ_CODEC_BITCLK [10]
PCH_AZ_CODEC_RST# [10]
+3V_DVDD_IO
MIC1-L [59] MIC1-R [59]
C396 10u/6.3V_4 C371 0.1u/16V_4 C370 10u/6.3V_4
SURR_L_SPK [48] SURR_R_SPK [48] FRONT_L_SPK [48] FRONT_R_SPK [48] CEN_SPK [48] WOOFER_SPK [48] MIC1-VREFO-R [59] MIC1-VREFO-L [59]
BEEP2 BEEP1
R293 47K_1%_2
R292
C289
4.7K_5%_2
*0.1u/10V_2
This color change to 0201
C360
0.1u/16V_4
E
ADOGND
C352 10u/6.3V_4
ADOGND
Spilt by DGND
+5VA
Analog
Digital
47
Codec PWR 5V(ADO)
+5V
12
D43 AZ5725-01F.R7G
Internal Speaker(ADO)
DIGITAL
L7
1 2
C268
C278
10u/6.3V_4
0.1u/10V_2
Bead RDC<30mohm
A
Moat
ANALOG
HCB2012KF-220T60
C343
0.1u/10V_2
+5VA
ADOGND
C338 10u/6.3V_4
Mute(ADO)
*short_0402
R992 R400 *short_0201
*0_5%_4
R431
*0_5%_4
R461
*0_5%_4
R956
*short_0402
DC-DET circuit(ADO)
ADOGND
B
C
D
R926
1000p/50V_4
C850
0.1u/10V_2
C463
AGND plane GND plane
Moat
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Azalia ALC299-CG,S-AMP
Azalia ALC299-CG,S-AMP
Azalia ALC299-CG,S-AMP
ZGQ MP Bom *
*short
*
*short
*
*short
*
*
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
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47 78Friday, May 03, 2019
47 78Friday, May 03, 2019
E
47 78Friday, May 03, 2019
1A
1A
1A
Page 48
5
4
3
2
1
SPK R1/L1
D D
FRONT_R_SPK[47]
FRONT_L_SPK[47]
C361 1u/6.3V_4
C381 1u/6.3V_4
ADOGND
R392
R407
R419
2K_5%_4
1K_5%_4
1K_5%_4
R427 2K_5%_4
ADOGND ADOGND
C366 0.33u/6.3V_4
C389 0.33u/6.3V_4
C358
2.2u/10V_4
PD1#
C362
0.1u/16V_4
U20
3
PVDD1
4
PVDD2
9
INPUT-R/DIFF+
7
PD#
10
INPUT-L/DIFF-
8
BYPASS
ALC1001-VB-CGT
Reserve for Input attenuation
To have optimization output power
SPK R2/L2
ADOGND
C C
SURR_R_SPK[47]
SURR_L_SPK[47]
C399 1u/6.3V_4
C385 1u/6.3V_4
R423
R415
1K_5%_4
1K_5%_4
ADOGND
R428 2K_5%_4
C401 0.33u/6.3V_4
C388 0.33u/6.3V_4
R409 2K_5%_4
C409
2.2u/10V_4
PD1#
ADOGND
C400
0.1u/16V_4
U22
3
PVDD1
4
PVDD2
9
INPUT-R/DIFF+
7
PD#
10
INPUT-L/DIFF-
8
BYPASS
ALC1001-VB-CGT
Reserve for Input attenuation
To have optimization output power
C363 10u/6.3V_4
OUT-RN OUT-RP
OUT-LN OUT-LP
C402 10u/6.3V_4
G1 G2
GND
OUT-RN OUT-RP
OUT-LN
OUT-LP
+5V
5 6
2 1
11 12
13
1 2
L10 PBY160808T-600Y-N
1 2
L9 PBY160808T-600Y-N
1 2
L16 PBY160808T-600Y-N
1 2
L18 PBY160808T-600Y-N
G1_FRONT G2_FRONT
C356 680p/50V_4
C348 680p/50V_4 C390 680p/50V_4
C408 680p/50V_4
Reserve for EMI Depression Close to IC
Speaker Loading =4Ohm +- 10%
+5V
1 2
5
L19
6
PBY160808T-600Y-N
1 2
L20 PBY160808T-600Y-N
1 2
2
L15
1
PBY160808T-600Y-N
1 2
11
L12
G1
12
PBY160808T-600Y-N
G2
13
GND
G1_REAR G2_REAR
C416 680p/50V_4
C434 680p/50V_4 C387 680p/50V_4
C359 680p/50V_4
Reserve for EMI Depression Close to IC
Speaker Loading =4Ohm +- 10%
FRONT SPK R1/L1/CENTER
CN21
F_SPKR­F_SPKR+
F_SPKL­F_SPKL+
C_SPKL­C_SPKL+
78
1 2 3 4 5 6
51288-0060N-001
+5V
G1_FRONT G2_FRONT
+5V
R952 *0_5%_4
R953 0_5%_4
ADOGND ADOGND
Center SPK
D59
AMP_MUTE#[57] EAPD[47]
D52
R1021 R475
2
1
2
1
REAR SPK R2/L2
R_SPKR­R_SPKR+
R_SPKL­R_SPKL+
CN13
56
1 2 3 4
50281-00401-001_Header
+5V
G1_REAR G2_REAR
R999 *0_5%_4
R971 0_5%_4
+5V
R968
*0_5%_4
R969
0_5%_4
RB500V-40
*SUB@0_5%_4 *SUB@0_5%_4
RB500V-40
ADOGNDADOGND
Output Gain Table
G2
0 0 1 101
+3V
Output Gain Table
R982 *0_5%_4
R954 0_5%_4
G2
0 0 1 101
G1
SE-input Stereo-output Gain
0 1
11dB 14dB
19dB
25dB
R511 10K_1%_2
PD1#
R503 *SUB@10K_1%_2
G1
SE-input Stereo-output Gain
0 1
11dB
14dB 19dB 25dB
48
SubWoofer/Center
B B
CEN_SPK[47]
WOOFER_SPK[47]
C863 1u/6.3V_4
C864 1u/6.3V_4
ADOGND
R1002 2K_5%_4
ADOGND
C418 0.33u/6.3V_4
C417 0.33u/6.3V_4
R1003 2K_5%_4
R974
1K_5%_4
R973
1K_5%_4
C419
2.2u/10V_4
PD1#
ADOGND
C459
0.1u/16V_4
U25
3
PVDD1
4
PVDD2
9
INPUT-R/DIFF+
7
PD#
10
INPUT-L/DIFF-
8
BYPASS
ALC1001-VB-CGT
Reserve for Input attenuation
To have optimization output power
A A
5
4
C460 10u/6.3V_4
OUT-RN OUT-RP
OUT-LN
OUT-LP
GND
+5V
5
1 2
L25
6
PBY160808T-600Y-N
1 2
L23
PBY160808T-600Y-N
2 1
1 2
L24
11
PBY160808T-600Y-N
G1
12
1 2
L22
G2
PBY160808T-600Y-N
13
G1_SUB G2_SUB
C471 680p/50V_4
C466 680p/50V_4 C473 680p/50V_4
C461 680p/50V_4
Reserve for EMI Depression Close to IC
Speaker Loading =4Ohm +- 10%
Center SPK
C_SPKL­C_SPKL+
S_SPKR­S_SPKR+
R504
3
1 2
50271-00201-001
SubWoofer
Output Gain Table
G2
G1
SE-input Stereo-output Gain
+5V
CN22
34
G1_SUB G2_SUB
+5V
R1039 *0_5%_4
R443 0_5%_4
ADOGND ADOGND
2
R1038 *0_5%_4
R442 0_5%_4
0
0
1
101
0 1
11dB 14dB
19dB
25dB
Quanta Computer Inc.
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Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
Subwoofer(ALC105)/HOL/EMI
Subwoofer(ALC105)/HOL/EMI
Subwoofer(ALC105)/HOL/EMI
1
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48 78Friday, May 03, 2019
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48 78Friday, May 03, 2019
1A
Page 49
5
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1
TPM NPCT750
C941
10mil
C939
C940
[email protected]/16V_4R1063 TPM@10K_5%_4
D D
C C
B B
+3V_S5
1 2
R1016 TPM@10K_5%_4
1 2 1 2
R1064 TPM@10K_5%_4
Layout Note: R1064 close to TPM IC
PCH_SLP_S0ix#[10,16]
PIRQ#[10]
PCH_SPI1_CLK_L[12]
PCH_SPI1_SI_L[12]
PCH_SPI1_SO_L[12]
SPI_TPM_CS#[12]
PIRQ#
PCH_SPI1_CLK_L PCH_SPI1_SI_L
PCH_SPI1_SO_L SPI_TPM_CS#
TPM_MISO TPM_SCS# PIRQ#_C
R1072 *0_5%_4
R1018 *short_0402
R1067 TPM@33_1%_2 R1066 TPM@33_1%_2 R1044 TPM@33_1%_2 R1017 *short_0402
T16
PLTRST#[12,21,41,50,51,52,57,59]
PIRQ#_C
TPM_MISO TPM_SCS#
PP
PLTRST#
30 29 18
19 21 24 20
6
13
4
17
SCL/GPIO1 SDA/GPIO0 PIRQ/GPIO2
TPM@NPCT750AAAYX
SCLK MOSI/GPIO7 MISO SCS/GPIO5
GPIO3 GPIO4 PP/GPIO6
PLTRST
TPM_VDD
22
8
VHIO#2
VHIO#1
U44
EPAD
33
GND#2
23
+3V_S5
1
VSB
GND#1
16
R1145
1 2
*short_0402
NC#1 NC#2 NC#3 NC#4 NC#5 NC#6 NC#7 NC#8
NC#9 NC#11 NC#12 NC#13 NC#14 NC#15 NC#16 NC#17
R1140
2 3 5 7 9 10 11 12 14 15 25 26 27 28 31 32
TPM@10u/6.3V_6
TPM_VDD
C916
TPM_VDD
C915
49
NOTE:
- Place 0.1 uF capacitors as close as possible to the device power pins.
- VHIO can be either +3.3V or +1.8V.
- It is recommended to connect VHIO to V_RUN.
- VALW can be either +3.3V or +1.8V.
- VALW power rail should be powered whenever the system is powered by any power source.
- For details regarding the TPM power sequence, see the NPCT75x Datasheet and Board Design Guidelines.
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Subwoofer(ALC105)/HOL/EMI
Subwoofer(ALC105)/HOL/EMI
Subwoofer(ALC105)/HOL/EMI
ZGE
ZGE
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1A
1A
1A
49 78Friday, May 03, 2019
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49 78Friday, May 03, 2019
1
Page 50
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1
NGFF_M.2 WiFi & BT (NGF)
E-Key
change USB to Port 14 for CFL-H
D D
C C
B B
WLANPWR#[57]
USBP14+[9]
USBP14-[9]
CNV_WRXN1[11]
CNV_WRXP1[11]
CNV_WRXN0[11]
CNV_WRXP0[11]
CNV_WR_CLKN[11] CNV_WR_CLKP[11]
PCIE_TXP15_WLAN[11] PCIE_TXN15_WLAN[11]
PCIE_RXP15_WLAN[11] PCIE_RXN15_WLAN[11]
CLK_PCIE_WLANP[11]
CLK_PCIE_WLANN[11]
CNV_WTXN1[11]
CNV_WTXP1[11]
CNV_WTXN0[11]
CNV_WTXP0[11]
CNV_WT_CLKN[11] CNV_WT_CLKP[11]
+3V_S5
C266
R300
CNV@10K_5%_4
CNV@1u/6.3V_4
change Footprint 11/30
WLAN_CLKREQ# WLAN_WAKE_R#
Q31 CNV@AO3413
1
R282 CNV@100K_5%_4
2
3
CN16 NASE0-S6701-TSH4
NGFF EKEY
1
GND#3
3
USB_D+
5
USB_D-
7
GND#4
9
SDIO CLK(O)
11
SDIO CMD(IO)
13
SDIO DAT0(IO)
15
SDIO DAT1(IO)
17
SDIO DAT2(IO)
19
SDIO DAT3(IO)
21
SDIO Wake(I)
23
SDIO Reset
33
GND#5
35
PETp0
37
PETn0
39
GND#6
41
PERp0
43
PERn0
45
GND#7
47
REFCLKP0
49
REFCLKN0
51
GND#8
53
CLKREQ0#
55
PEWake0#
57
GND#9
59
PETp1
61
PETn1
63
GND#10
65
PERp1
67
PERn1
69
GND#11
71
Reserved1
73
Reserved2
75
GND#12
GPIO0_NFC_RESET#
79
C288 10u/6.3V_4
update P/N and footpint 8/4
3.3Vaux#1
3.3Vaux#2 LED#1
PCM_CLK
PCM_SYNC
PCM_IN
PCM_OUT
LED#2
GND#13
UART Wake
UART Rx
UART Tx UART RTS UART CTS
Clink RESET
CLink DATA
CLink CLK
COEX3 COEX2 COEX1
SUSCLK(32KHz)
PERST0# W_DISABLE2# W_DISABLE1#
NFC_I2C_SM_DATA
NFC_I2C_SM_CLK
NFC_I2C_IRQ
UIM_SWP/PERST1#
UIM_POWER_SNK UIM_POWER_SRC
3.3Vaux#3
3.3Vaux#4
GND#176GND#277NC#178NC#2
C824
0.1u/10V_2
+WL_VDD
2 4 6 8 10 12 14 16 18 20 22
32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74
WIGIG_LED
CNV_BRI_RSP_R
CNV_RGI_RSP_R
C822
0.1u/10V_2
modify 8/23
R263 22_1%_4
R215 22_1%_4
WLAN_RST# BT_EN RF_EN LPC_LAD0_C CLK_PCI_LPC_C LPC_LFRAME#_C
R175 *short_0402
LPC_LAD1_C LPC_LAD2_C LPC_LAD3_C
+WL_VDD
+WL_VDD +3V +3V_S5
R362 *0_5%_6 R265 *0_5%_6
Add R for CNVi
R
C169
0.1u/10V_2
TP91
BT_EN [57] RF_EN [57]
CLKIN_XTAL [11]
+WL_VDD
10u/6.3V_4
C159
0.1u/10V_2
C164
0.1u/10V_2
C160
0.1u/10V_2
C152
0.1u/10V_2
PCM_CLK [10] CNV_RF_RESET# [10] PCM_IN [10] MODEM_CLKREQ [10]
CNV_BRI_DT [11]
TP128 TP129 TP130
CNV_PA_BLANKING [11]
CNV_MFUART2_TXD [11]
CNV_MFUART2_RXD [11]
SUSCLK [10]
C815
UART_WAKE_N [10] CNV_BRI_RSP [11]
CNV_RGI_DT [11] CNV_RGI_RSP [11]
Modify 8/10
R200 *short_0402
R179 *short_0402 R178 *short_0402 R176 *short_0402
R173 *short_0402 R168 *short_0402 R167 *short_0402
PLTRST#
PLTRST# [12,21,41,49,51,52,57,59]
LPC_LAD0 [9,57] CLK_PCI_LPC [9] LPC_LFRAME# [9,57]
LPC_LAD1 [9,57] LPC_LAD2 [9,57] LPC_LAD3 [9,57]
Change 80 port pin defined 7/19
WLAN_CLKREQ#
+WL_VDD
R220
4.7K_1%_4
R204 *4.7K_1%_4
BT_EN
R191 *10K_1%_4
RF_EN
R184 *10K_1%_4
Add it for CNVi 9/29
Close M.2 connector
CNV_RGI_DT
CNV_BRI_DT
+WL_VDD
2
3
1
Q28
2N7002KTB
+WL_VDD+WL_VDD
2
3
1
Q26
*2N7002KTB
+WL_VDD
20K_1%_4
R243 R417 *100K_1%_4
R225 10K_1%_4
R355 *4.7K_1%_4
PCIE_WAKE#WLAN_WAKE_R#
50
+1.8V_DEEP_SUS
+1.8V_DEEP_SUS
PCIE_CLKREQ_WLAN# [11]
PCIE_WAKE# [10,38,59]
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
NGFF WiFi & BT
NGFF WiFi & BT
NGFF WiFi & BT
ZGE
ZGE
ZGE
1A
1A
50 78Friday, May 03, 2019
50 78Friday, May 03, 2019
1
50 78Friday, May 03, 2019
1A
Page 51
5
NGFF_M.2 SSD #1 (NGF)
SATA/PCIE SSD
PCIE_RXN9_SSD[11] PCIE_RXP9_SSD[11]
PCIE_TXN9_SSD[11] PCIE_TXP9_SSD[11]
PCIE_RXN10_SSD[11]
(SATA/ PCIE)
PCIE_RXP10_SSD[11] PCIE_TXN10_SSD[11]
PCIE_TXP10_SSD[11] PCIE_RXN11_SSD[11]
PCIE_RXP11_SSD[11] PCIE_TXN11_SSD[11]
PCIE_TXP11_SSD[11] PCIE_RXP12_SSD[11]
PCIE_RXN12_SSD[11] PCIE_TXN12_SSD[11]
PCIE_TXP12_SSD[11]
CLK_PCIE_SSD1N[11]
CLK_PCIE_SSD1P[11]
NGFF1_DET1[11]
SSD SATA I/F --> H SSD PCIE I/F --> L
D D
C C
PCIE_RXN9_SSD PCIE_RXP9_SSD
PCIE_TXN9_SSD PCIE_TXP9_SSD
PCIE_RXN10_SSD PCIE_RXP10_SSD
PCIE_TXN10_SSD PCIE_TXP10_SSD
PCIE_RXN11_SSD PCIE_RXP11_SSD
PCIE_TXN11_SSD PCIE_TXP11_SSD
PCIE_RXP12_SSD PCIE_RXN12_SSD
PCIE_TXN12_SSD PCIE_TXP12_SSD NGFF1_RST#
R860 *100_1%_2
R782 *short_0402 R787 *short_0402
C734 0.22u/10V_4 C741 0.22u/10V_4
R796 *short_0402 R801 *short_0402
C760 0.22u/10V_4 C769 0.22u/10V_4
R810 *short_0402 R816 *short_0402
C779 0.22u/10V_4 C780 0.22u/10V_4
R819 *short_0402 R827 *short_0402
C783 0.22u/10V_4 C784 0.22u/10V_4
R834 *short_0402 R837 *short_0402
3
2
Q72
1
2N7002KTB
CLK_PCIE_SSD1N_R CLK_PCIE_SSD1P_R
R859 4.7K_5%_4
PCIE_RXN9_SSD_R PCIE_RXP9_SSD_R
PCIE_TXN9_SSD_R PCIE_TXP9_SSD_R
PCIE_RXN10_SSD_R PCIE_RXP10_SSD_R
PCIE_TXN10_SSD_R PCIE_TXP10_SSD_R
PCIE_RXN11_SSD_R PCIE_RXP11_SSD_R
PCIE_TXN11_SSD_R PCIE_TXP11_SSD_R
PCIE_RXP12_SSD_R PCIE_RXN12_SSD_R
PCIE_TXN12_SSD_R PCIE_TXP12_SSD_R
+3V_SSD1
NGFF1_PEDET1
4
R848 *0_5%_4
change footprint and P/N 9/25
CN15 NASM0-S6701-TS40
NGFF MKEY
1
GND#1
3
GND#3
5
PETN3
7
PETP3
9
GND#7
11
PERN3
13
PERP3
15
GND#8
17
PETN2
19
PETP2
21
GND#2
23
PERN2
25
PERP2
27
GND#9
29
PETN1
31
PETP1
33
GND#10
35
PERN1
37
PERP1
39
GND#11
41
SATA B+/PETN0
43
SATA B-/PETP0
45
GND#12
47
SATA A-/PERN0
49
SATA A+/PERP0
51
GND#13
53
REFCLKN
55
REFCLKP
57
GND#14
67
NC#1
69
PEDET(OC-PCIE/GND-SATA)
71
GND#4
73
GND#5
75
GND#6
76767777787879
3.3Vaux_1
3.3Vaux_2 NC#10 NC#11
DAS/DSS#(I)(OD)
3.3Vaux_3
3.3Vaux_4
3.3Vaux_5
3.3Vaux_6 NC#12 NC#13 NC#14 NC#15 NC#16 NC#17
NC#2 NC#3 NC#4
DEVSLP
NC#5 NC#6 NC#7 NC#8 NC#9
PERST#/NC
CLKREQ#/NC
PEWAKE#/NC
NC#18 NC#19
SUSCLK
3.3Vaux_7
3.3Vaux_8
3.3Vaux_9
79
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58
68 70
72 74
+3V_SSD1
DEVSLP_N1
+3V_SSD1
3
+3V_SSD1
R187 *short_0402
R196 *100K_1%_4
R201 *short_0402
TP72 TP76
SATA_LED# [11,52,59]
add it 8/9
DEVSLP1_SSD1 [9]
PLTRST# [12,21,41,49,50,52,57,59]
PCIE_CLKREQ_NGFF1# [11]
2
C148 *47u/6.3V_8
C150
10u/6.3V_4
C161
0.1u/10V_2
C165
0.1u/10V_2
C170
0.1u/10V_2
C180
0.1u/10V_2 C269 *47u/6.3V_8 C283 *47u/6.3V_8
+3V_SSD1
R146 *short_0805
1
+3V
C147 10u/6.3V_4 C149 0.1u/10V_2
51
HDD
B B
HDD Re-driever
R514 *short_0402
+3V
C921
C453 10u/6.3V_4
0.1u/16V_4
SATA_TXP0 SATA_TXP0_CN
SATA_TXP0[11] SATA_TXN0[11]
SATA_RXN0[11]
A A
SATA_RXP0[11]
SATA_TXN0 SATA_TXN0_CN
SATA_RXN0 SATA_RXN0_CN
SATA_RXP0 SATA_RXP0_CN
5
Xb
close to IC
C858
0.1u/16V_4
SATA_TXP_IN SATA_TXP_OUT SATA_TXN_IN SATA_TXN_OUT
SATA_RXN_IN SATA_RXN_OUT SATA_RXP_IN SATA_RXP_OUT
EN A_DE B_DE
A_EQ1 A_EQ2
U43 PS8527BTQFN20GTR2-A2
6
VDD#1
16
VDD#2
18
A_EQ1
19
A_EQ2
1
A_INP
2
A_INN
4
B_OUTN
5
B_OUTP
7
EN
9
A_DE
8
B_DE
GND#3
21
B_EQ2
B_EQ1
A_OUTP A_OUTN
GND#1 GND#2 GND#4 GND#5 GND#6
GND#7
25
REXT
B_INN B_INP
10
R1070 10K_5%_4
B_EQ2
17
B_EQ1
20
15 14
12 11
3 13 22 23 24
4
SATA re-driver IC stuff Rb,Cb,Xb , unstuff Ra,Ca
Normal stuff Ra,Ca , unstuff Rb,Cb
HDD connector
Equalization level setting for Channel x(x=A/B),internally tied to VDD/2 (default:12.2dB) [x_EQ2, x_EQ1] == L/L: for channel loss up to 7.4dB L/H: for channel loss up to 14.4dB H/L: for channel loss up to 11.2dB H/H: for channel loss up to 5dB
De-emphasis level setting for Channel x(x=A/B), internally tied to VDD/2(Default=-3.5dB) [x_DE] == L: 0 dB H: -6dB
3
A_EQ1 A_EQ2
B_EQ1 B_EQ2
A_DE B_DE
EN
R530 *short_0402
80 mils
+5V_HDD
C467
R927 *4.7K_5%_4 R929 *4.7K_5%_4
R930 *4.7K_5%_4 R928 *4.7K_5%_4
R512 *4.7K_5%_4 R513 *4.7K_5%_4
R515 *4.7K_5%_4
C464
HDD@10u/6.3V_6
*HDD@47u/6.3V_8
C458
DEVSLP0_HDD[9]
+5V
R459
C469
change BOM 9/4
R947 4.7K_5%_4 R955 4.7K_5%_4
R972 4.7K_5%_4 R949 4.7K_5%_4
R470 *4.7K_5%_4 R471 *4.7K_5%_4
C435 *0.1u/16V_4
*short_0805
C468
FAE suggest A-SMT use defalut setting (DNI)
2
+3V
DEVSLP0_R
SATA_RXP0_CN SATA_RXN0_CN
SATA_TXN0_CN SATA_TXP0_CN
2526
23
21
HDD@GS12201-1011-7H
1
CN20
2 3 4 5 6 7
C457 *HDD@47u/6.3V_8
R1111 *short_0402
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
8 9 10 11 12 13 14 15 16 17 18 19 20
22
24
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
NGFF SSD #1 / HDD
NGFF SSD #1 / HDD
NGFF SSD #1 / HDD
ZGE
ZGE
ZGE
1
1A
1A
51 78Friday, May 03, 2019
51 78Friday, May 03, 2019
51 78Friday, May 03, 2019
1A
Page 52
5
NGFF_M.2 SSD #2 (NGF)
Only for PCIE SSD
PCIE_RXN24_SSD[9]
D D
C C
PCIE_RXP24_SSD[9] PCIE_TXN24_SSD[9]
PCIE_TXP24_SSD[9] PCIE_RXN23_SSD[9]
PCIE_RXP23_SSD[9] PCIE_TXN23_SSD[9]
PCIE_TXP23_SSD[9] PCIE_RXN22_SSD[9]
PCIE_RXP22_SSD[9] PCIE_TXN22_SSD[9]
PCIE_TXP22_SSD[9] PCIE_RXP21_SSD[9]
PCIE_RXN21_SSD[9] PCIE_TXN21_SSD[9]
PCIE_TXP21_SSD[9]
CLK_PCIE_SSD2N[11]
CLK_PCIE_SSD2P[11]
PCIE_RXN24_SSD PCIE_RXP24_SSD
PCIE_TXN24_SSD PCIE_TXP24_SSD
PCIE_RXN23_SSD PCIE_RXP23_SSD
PCIE_TXN23_SSD PCIE_TXP23_SSD
PCIE_RXN22_SSD PCIE_RXP22_SSD
PCIE_TXN22_SSD PCIE_TXP22_SSD
PCIE_RXP21_SSD PCIE_RXN21_SSD
PCIE_TXN21_SSD PCIE_TXP21_SSD
R933 *short_0402 R934 *short_0402
C862 0.22u/10V_4 C869 0.22u/10V_4
R950 *short_0402 R966 *short_0402
C876 0.22u/10V_4 C885 0.22u/10V_4
R985 *short_0402 R1000 *short_0402
C899 0.22u/10V_4 C904 0.22u/10V_4
R1027 *short_0402 R1028 *short_0402
C913 0.22u/10V_4 C920 0.22u/10V_4
R1075 *short_0402 R1086 *short_0402
4
change footprint and P/N 9/25
PCIE_RXN24_SSD_R PCIE_RXP24_SSD_R
PCIE_TXN24_SSD_R PCIE_TXP24_SSD_R
PCIE_RXN23_SSD_R PCIE_RXP23_SSD_R
PCIE_TXN23_SSD_R PCIE_TXP23_SSD_R
PCIE_RXN22_SSD_R PCIE_RXP22_SSD_R
PCIE_TXN22_SSD_R PCIE_TXP22_SSD_R
PCIE_RXP21_SSD_R PCIE_RXN21_SSD_R
PCIE_TXN21_SSD_R PCIE_TXP21_SSD_R
CLK_PCIE_SSD2N_R CLK_PCIE_SSD2P_R
CN18 NASM0-S6701-TS40
NGFF MKEY
1
GND#1
3
GND#3
5
PETN3
7
PETP3
9
GND#7
11
PERN3
13
PERP3
15
GND#8
17
PETN2
19
PETP2
21
GND#2
23
PERN2
25
PERP2
27
GND#9
29
PETN1
31
PETP1
33
GND#10
35
PERN1
37
PERP1
39
GND#11
41
SATA B+/PETN0
43
SATA B-/PETP0
45
GND#12
47
SATA A-/PERN0
49
SATA A+/PERP0
51
GND#13
53
REFCLKN
55
REFCLKP
57
GND#14
3
3.3Vaux_1
3.3Vaux_2 NC#10 NC#11
DAS/DSS#(I)(OD)
3.3Vaux_3
3.3Vaux_4
3.3Vaux_5
3.3Vaux_6 NC#12 NC#13 NC#14 NC#15 NC#16 NC#17
NC#2 NC#3 NC#4
DEVSLP
NC#5 NC#6 NC#7 NC#8 NC#9
PERST#/NC
CLKREQ#/NC
PEWAKE#/NC
NC#18 NC#19
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58
+3V_SSD2
DEVSLP_N2
NGFF2_RST#
+3V_SSD2
R520 *short_0402
R501 *100K_1%_4
R609 *short_0402
TP123 TP124
2
SATA_LED# [11,51,59]
add it 8/9
DEVSLP4_SSD2 [9]
PLTRST# [12,21,41,49,50,51,57,59]
PCIE_CLKREQ_NGFF2# [11]
1
52
67
NC#1
69
PEDET(OC-PCIE/GND-SATA)
71
GND#4
73
GND#5
75
Del SSD detcet circuit for PCIE SSD RAID 2/1
B B
*47u/6.3V_8 C403 10u/6.3V_4 C412 0.1u/10V_2 C413 0.1u/10V_2 C410 0.1u/10V_2 C411 0.1u/10V_2
*47u/6.3V_8
C485
*47u/6.3V_8
C491
A A
5
4
+3V_SSD2 +3V
GND#6
76767777787879
R391 *short_0805C376
79
SUSCLK
3.3Vaux_7
3.3Vaux_8
3.3Vaux_9
C345 10u/6.3V_4
C354 0.1u/10V_2
3
+3V_SSD2
68 70
72 74
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
NGFF SSD #2
NGFF SSD #2
NGFF SSD #2
ZGE
ZGE
ZGE
1A
1A
1A
52 78Friday, May 03, 2019
52 78Friday, May 03, 2019
52 78Friday, May 03, 2019
1
Page 53
5
50271-0040N-V01
CPU FAN (THM)
12V-PWM
D D
FAN1_PWM[57]
C C
+3V
2
1 3
Q67
1K_1%_4
METR3904-G
+5V
R728 10K_1%_4
FAN1_RPM[57]
FAN1_PWM_Q
4
+3V
R743
10K_1%_4
1
Q68 2N7002K
R748 *0_5%_4
+3V
3
+3V
2
3
R747 10K_1%_4
C707
220p/50V_4
+12V_FAN
R761 *short_0402
C711
0.1u/16V_4
+12V_FAN1
C701 220p/50V_4
1 2 3 4
GPU FAN (THM)
12V-PWM
CN12
56
50271-0040N-V01
FAN2_PWM[57]
1 3
Q25
+3V
2
R174 1K_1%_4R733
METR3904-G
+5V
R734 10K_1%_4
2
FAN2_RPM[57]
FAN2_PWM_Q
1
R735 10K_1%_4
+12V_FAN
C696 *220p/50V_4
+3V
R156
10K_1%_4 C698
+3V
1
R731 *0_5%_4
2
2N7002K
+3V
3
Q24
C697
*220p/50V_4
R729 *short_0402
0.1u/16V_4
40mil
+12V_FAN2
53
56
1 2 3 4
CN11
CPU Thermal Sensor,Local CPU Thermal Sensor
+3V
U38
3ND_MBCLK_THM
R669
5
Q61A
+3V
*PJX8838
2
Q61B *PJX8838
3ND_MBCLK[23,24,46,54,57]
B B
3ND_MBDATA[23,24,46,54,57]
A A
5
3 4
R1154 *short_0402
6 1
R1155 *short_0402
*2.2K_5%_4
R673 *2.2K_5%_4
4
3ND_MBDATA_THM
PM_THRMTRIP#[2,11,17,18,19,20]
D88
+3V
R666
2
3
*RB500V-40
1
MB_THRMTRIP#
10K_1%_2
8 7 6 4
2
SMBCLK SMBDATA ALERT THERM
G781P8
VCC
DXN
GND
+3V
1 2
DXP
3 5
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
FAN,Thermal,FAN LED
FAN,Thermal,FAN LED
FAN,Thermal,FAN LED
CPU_THERMDA
C519 *2200p/50V_4
CPU_THERMDC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
2
Q59 *METR3904-G
1 3
ZGE
ZGE
ZGE
53 78Friday, May 03, 2019
53 78Friday, May 03, 2019
53 78Friday, May 03, 2019
1
1A
1A
1A
Page 54
5
4
3
2
1
UIF Controller
+5V +5V_MCU
R125 *shor t_0805
D D
3ND_MBCLK[23,24,46 ,53,57]
3ND_MBDATA[23,24,46,53,57]
1
2
50 mil
D15 *SBR3U40P1-7
close to 6K5130
+3V
2
Q19B PJX8838
TP_LED_PWR_CTL
GLS_LED_CTL_B
GLS_LED_CTL_G
GLS_LED_CTL_R
GLS_LED_PWR_CTL
MCR_LED_T_CTL_B
U4 6K5130UA0
25
26
27
28
32
29
30
1 2 3 4 5 6 7 8
PWM21/RXD PWM22/MCLK PWM23/MDAT ICK/SCLK IDA/SDAT PA4/STRP1 PA5/STRP2 VDD
33
EPAD
PWM20/TX D
VSS9PWM0/PA 610PWM1/PA 711PWM2/PB 012PWM3/PB 113PWM4/PB 214PWM5/PB 315PWM6/PB 4
PD0
PD1
PWM17/P C7
PWM19/IN T131PWM18/IN T0
MCR_LED_PWR_CTL_P
PWM16/S PIMOSI
16
MCR_LED_PWR_CTL_1
PWM14/PC4
PWM15/S PICLK
PWM13/PC3 PWM12/PC2 PWM11/PC1 PWM10/PC0
PWM9/PB7 PWM8/PB6 PWM7/PB5
24
MCR_LED_T_CTL_R
23
MCR_LED_PWR_CTL_T
22 21 20 19
MCR_LED_PWR_CTL_3
18
MCR_LED_PWR_CTL_2
17
MACRO_BTN_P MACRO_BTN_1
MACRO_BTN_2
MACRO_BTN_3
MACRO_BTN_T
MCR_LED_CTL_R
D93 *AZ5725-01F.R7G D92 *AZ5725-01F.R7G
D91 *AZ5725-01F.R7G D90 *AZ5725-01F.R7G D89 *AZ5725-01F.R7G
1 2
1 2
1 2 1 2 1 2
Macro-Key/B Button
+3V
R118
4.7K_5%_4
R119 4.7K_5%_4 R120 4.7K_5%_4
TP_LED_CTL_W MCR_LED_T_CTL_G
3ND_MBCLK_C MCR_LED_CTL_B 3ND_MBDATA_C MCR_LED_CTL_G
STRP1 STRP2
+5V_MCU
MACRO_BTN_P MACRO_BTN_1 MACRO_BTN_2 MACRO_BTN_3 MACRO_BTN_T
Need Internal PU by FW
MACRO_P~MACRO_T active LOW
C101
C100
10u/6.3V_4
0.1u/16V_4
MCU_INT#[57]
+5V_MCU
R122
R123
4.7K_1%_4
5
34
Q19A PJX8838
61
4.7K_1%_4
3ND_MBCLK_C
3ND_MBDATA_C
RGB CLASS
+5V_MCU
R145 *4.7K_ 5%_4
R152 *shor t_0402
GLS_LED_CTL_R
GLS_LED_EN_R
GLS_LED_CTL_G
GLS_LED_EN_G
GLS_LED_CTL_B
GLS_LED_EN_B
1
2
Q23 *PJA3413
3
3 4
6 1
GLS_LED_PWR_CTL
GLS_LED_PWR
R124 100K_1%_4
Q21A
5
2N7002KDW
R121 100K_1%_4
Q21B
2
2N7002KDW
R117 100 K_1%_4
Q20 2N7002K
321
20 mil
20 mil
GLS_LED_PWR
C10
0.1u/10V_2
GLS_LED_PWR GLS_LED_EN_R GLS_LED_EN_G GLS_LED_EN_B
GLS_LED_PWR
GLS_LED_EN_R GLS_LED_EN_G GLS_LED_EN_B
D20 *AZ5725-01F.R7G
1 2
D17 *AZ5725-01F.R7G
1 2
D19 *AZ5725-01F.R7G
1 2
D16 *AZ5725-01F.R7G
1 2
CN9
910
51619-0080N-001
1 2 3 4 5 6 7 8
54
MACRO LED
+5V_MCU
C C
C451 *10u/6.3V_4
B B
Metal KB(Z=6.8mm)
USBP7-[9] USBP7+[9]
A A
MKB_INT#[57]
C447
0.1u/16V_4
MKB_PWR_EN[57]
R993 *short_040 2 R980 *short_040 2
R596 4.7K_ 5%_4
1
R519 4.7K_ 5%_4
4
R588 4.7K_ 5%_4
1
R582 4.7K_ 5%_4
4
R462 *4.7K_ 5%_4
1
R472 *shor t_0402
+5V_S5
R1158 100K_1%_4
USBP7-_R USBP7+_R
R510 M_KB@10K_1%_2
5
MCR_LED_PWR_CTL_P MCR_LED_CTL_R
2
Q45A BSS84DW
MCR_LED_PWR_P
6
MCR_LED_PWR_CTL_1 MCR_LED_CTL_G
5
Q45B BSS84DW
MCR_LED_PWR_1
3
MCR_LED_PWR_CTL_2
2
Q50A BSS84DW
MCR_LED_PWR_2
6
MCR_LED_PWR_CTL_3
5
Q50B BSS84DW
MCR_LED_PWR_3
3
MCR_LED_PWR_CTL_T
2
Q36 *PJA3413
MCR_LED_PWR_T MCR_LED_T_EN_G
3
C909
0.1u/10V_2 R597 *shor t_0402
Q77
3
2N7002K
2
1
12
D108 *AZ5725-01F.R7G
+3V_S5 +5V_KB_M
R509 M_KB@10K_1%_2
321
Q39 M_KB@2N7002KTB
R1014
1
Q75 PJA34 13
12
D107 *AZ5725-01F.R7G
MKB_INT#_R
stuff MKB connector 9/16
MCR_LED_EN_R
MCR_LED_EN_G
MCR_LED_CTL_B
MCR_LED_EN_B
MCR_LED_T_CTL_R
MCR_LED_T_EN_R
MCR_LED_T_CTL_G
MCR_LED_T_CTL_B
MCR_LED_T_EN_B
*0_5%_6
3
2
C873
R1159 10K_1%_2
+5V_S5
*1000p/50V_4
+5V_KB_M MKB_INT#_R
R589 100K_1%_4
Q51A
5
2N7002KDW
3 4
R590 100K_1%_4
Q51B
2
2N7002KDW
6 1
R560 100 K_1%_4
Q43 2N7002K
321
R591 100K_1%_4
Q52A
5
2N7002KDW
3 4
R592 100K_1%_4
Q52B
2
2N7002KDW
6 1
R506 100 K_1%_4
Q44 2N7002K
321
C907
0.1u/10V_2
D111 *AZ5725- 01F.R7G D57 *AZ5725-01F.R7G
+5V_KB_M
1 2 1 2
+5V_MCU
4
MCR_LED_PWR_P MCR_LED_PWR_1
MCR_LED_PWR_2 MCR_LED_PWR_3
MCR_LED_PWR_T
MCR_LED_EN_R
MCR_LED_EN_G
MCR_LED_EN_B MCR_LED_T_EN_R
MCR_LED_T_EN_G
MCR_LED_T_EN_B
Plastic-Touch PAD
I2C0_SDA[13]
I2C0_SCL[1 3]
R989 10 K_1%_2
C877
0.1u/16V_4
R600 *shor t_0402
R585 *shor t_0402
TPD_INT#[57]
TPD_INT#_PCH[13]
2
Q76 PJA3413
3
1
D60 *AZ5725-01F.R7G
1 2
D61 *AZ5725-01F.R7G
1 2
D62 *AZ5725-01F.R7G
1 2
D63 *AZ5725-01F.R7G
1 2
D64 *AZ5725-01F.R7G
1 2
D65 *AZ5725-01F.R7G
1 2
D66 *AZ5725-01F.R7G
1 2
D67 *AZ5725-01F.R7G
1 2
D68 *AZ5725-01F.R7G
1 2
D69 *AZ5725-01F.R7G
1 2
D70 *AZ5725-01F.R7G
1 2
+TPVDD
Q48A
5
*PJX8838
3 4
R599 *shor t_0402
R598 *short_0402
TP_LED_PWR_CTL TP_LED_CTL_W
TP_LED_PWR
C896
C901
0.22u/25V_6
0.1u/16V_4
3
2
6 1
R558 *shor t_0402
+TPVDD
321 C898
Q42 *2N7002KTB R584 *short_0402
TP_LED_EN_W
20mil
R568 *2.2K_5%_4
Q48B *PJX8838
R570 *2.2K_5%_4
I2C_TP_SDA_R
I2C_TP_SCL_R
R572 *10K_1%_2
TPD_INT#_R
R593 100 K_1%_4
Q40 2N7002K
321
+5V_KB_M
TP_LED_PWR
D109 *AZ5725- 01F.R7G
1 2
D54 *AZ5725-01F.R7G
TPCLK TPDATA I2C_TP_SDA_R I2C_TP_SCL_R TPD_EN TPD_INT#_R +TPVDD TP_LED_EN_W TP_LED_CTL_W
1 2
D53 *AZ5725-01F.R7G
1 2
D73 *AZ5725-01F.R7G
1 2
D74 *AZ5725-01F.R7G
1 2
D110 *AZ5725- 01F.R7G
1 2
D55 *AZ5725-01F.R7G
1 2
D56 *AZ5725-01F.R7G
1 2
D71 *AZ5725-01F.R7G
1 2
D75 *AZ5725-01F.R7G
1 2
Keyboard Transfer D/B
MACRO_BTN_P MACRO_BTN_1 MACRO_BTN_2 MACRO_BTN_3
MACRO_BTN_T
MCR_LED_PWR_P MCR_LED_PWR_1 MCR_LED_PWR_2
10 mil
MCR_LED_PWR_3 MCR_LED_PWR_T
20 mil
TP120
20mil
+TPVDD
MCR_LED_EN_R MCR_LED_EN_G MCR_LED_EN_B MCR_LED_T_EN_R MCR_LED_T_EN_G MCR_LED_T_EN_B
TP_LED_PWR
TP_LED_EN_W
LID#_MACRO USBP7+_R
USBP7-_R MKB_INT#_R
TPD_EN TPD_INT#_R I2C_TP_SCL_R I2C_TP_SDA_R
+TPVDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
TP LED
C906
+3VPCU
10u/6.3V_4
0.1u/16V_4 C905
*10u/6.3V_4
+TPVDD
R482
TPDATA[57]
TPCLK[57]
+3V_S5
PTP_PWR_EN#[57]
10K_1%_2
C443 *1000p/50V_4
R502 *0_ 5%_6
50mil
C446
0.1u/16V_4
R1161 0_5%_4
Reserve TP power control 4/25
2
1
C430 *1000p/50V_4
C895
0.1u/16V_4
R465 10K_1%_2
3
Q79
AO3413
2
C945 1000p/50V_4
LID#_MACRO[57]
Pin13, 14 change to GND 4/23
TPD_EN[57]
CN19 51540-04401-V0 1
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
45 46
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
MCU PWM/LED Driver
MCU PWM/LED Driver
MCU PWM/LED Driver
1
ZGE
ZGE
ZGE
1A
1A
1A
54 78Friday, May 03, 2019
54 78Friday, May 03, 2019
54 78Friday, May 03, 2019
Page 55
5
4
3
2
1
55
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
KeyBoard
KeyBoard
KeyBoard
ZGE
ZGE
ZGE
1A
1A
55 78Friday, May 03, 2019
55 78Friday, May 03, 2019
55 78Friday, May 03, 2019
1
1A
Page 56
5
4
3
2
1
56
D D
C C
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
Macro key/LCD Cover/TP
Macro key/LCD Cover/TP
Macro key/LCD Cover/TP
ZGE
ZGE
ZGE
1A
1A
1A
56 78Friday, May 03, 2019
56 78Friday, May 03, 2019
56 78Friday, May 03, 2019
1
Page 57
5
L14
1 2
EC(KBC)
+3V_LDO_EC
D D
C C
B B
A A
R356 2.2_1%_6
C251
0.1u/10V_2
PLTRST#[12,21,41,49,50,51,52,59]
C353 *180p/50V_4
ADP_Board_ID
11/30 modify
R257
4.7K_1%_4
2
MKB_PWR_EN[54]
R388 *short_0402
R365 *short_0402
R500 *short_0402
Modify 8/16
1
D44 RB500V-40
WRST#
NBSWON#
USB KB Backlight OFF or KB PWEN
PBLED[59]
USB KB Crisis Disk Feature
Crisis_disk_enable
TBT_WAKE#_EC[38]
3/6 modify PD resistor for ADP issue
+3V_LDO_EC
R287 100K_1%_4
C282 1u/6.3V_2
CLK_PCI_EC
R939 *22_5%_4
C866 *10p/50V_4
+3V_LDO_EC
5
C258
0.1u/10V_2
+3V_S5
R412 *short_0402
CLK_PCI_EC[9]
LPC_LFRAME#[9,50]
DGPU_THER_ALERT#[23]
SIO_EXT_SCI#[13]
LAN_PWR#[59]
HP_JD#_EC[47,59]
PCH_BLON_EC[32]
TEMP_MBAT#[61] PCBEEP_EC[47]
3ND_MBDATA[2 3,24,46,53,54]
PCH_SPI_CLK_EC[12] SPI_CS0#_UR_ME[12]
PCH_SPI_SI_EC[1 2]
PCH_SPI_SO_EC[12]
PTP_PWR_EN#[54] VBUS_PWR_EN[41,76] VBUS_FET_EN[41,76]
TBT_MRESET[40]
R261 10K_1%_2
C254
0.1u/10V_2
BLM15AG121SN1D
12 mils
C333
C415
0.1u/10V_2
0.1u/10V_2
R357 *2.2_1%_6
+3V
R339 2.2_1%_6
LPC_LAD0[9,50] LPC_LAD1[9,50] LPC_LAD2[9,50] LPC_LAD3[9,50]
SERIRQ[9]
SIO_RCIN#[9]
DNBSWON#[10]
EC_PWROK[10]
ME_WR#[10]
AMP_MUTE#[48]
3ND_MBCLK[23,24,46,53,54]
FAN1_PWM[53]
11/30 modify
SUSB#[10,1 6]
S5_ON[40,62,63,68]
R259 *short_0201 R367 *short_0402
R925 *0_5%_4
TP103
R389 *short_0402
PBLED_R
ACIN[61]
Reserve switch for test (MP remove)
DGPU_OPP#
ADP_Board_ID
3ND_MBDATA 3ND_MBCLK
R1162 0_5%_2 R518 *0 _5%_2 R517 *0 _5%_2
S5_ON
TBT_MRESET
11/29 unsutff SW1
SW1
*T3AL-23S-Q-T/R
1 3 2 4
PLTRST#_EC
PROCHOT_EC
WRST#
C252
0.1u/10V_2
+A3VPCU
11/11 FAE suggestion
C392
pin106 +3V_RTC
0.1u/10V_2
change to +3VPCU_EC
ECAGND
+3VPCU_EC
C332
0.1u/10V_2
+3V_EC
C329
0.1u/10V_2
10
LAD0/GPM0(3)
9
LAD1/GPM1(3)
8
LAD2/GPM2(3)
7
LAD3/GPM3(3)
22
LPCRST#/GPD2
13
LPCCLK/GPM4(3)
6
LFRAME#/GPM5(3)
17
LPCPD#/GPE6
126
GA20/GPB5(3)
5
SERIRQ/GPM6(3)
15
ECSMI#/GPD4(3)
23
ECSCI#/GPD3
14
WRST#
4
KBRST#/GPB6(3)
16
PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
113
CRX0/GPC0
123
CTX0/TMA0/GPB2(3)
80
DAC4/DCD0#/GPJ4(3)
119
DSR0#/GPG6
33
GINT/CTS0#/GPD5
88
PS2DAT1/RTS0#/GPF3
81
DAC5/RIG0#/GPJ5(3)
87
PS2CLK1/DTR0#/GPF2
109
TXD/SOUT0/GPB1
108
RXD/SIN0/GPB0
71
ADC5/DCD1#/GPI5(3)
72
ADC6/DSR1#/GPI6(3)
73
ADC7/CTS1#/GPI7(3)
35
RTS1#/GPE5
34
PWM7/RIG1#/GP A7
122
DTR1#/SBUSY/GPG1/ID7
95
CTX1/SOUT1/GPH2/SMDAT3/ID2
94
CRX1/SIN1/SMCLK3/GP H1/ID1
105
FSCK/GPG7
101
FSCE#/GPG3
102
FMOSI/GPG4
103
FMISO/GPG5
56
KSO16/SMOSI/GPC3 (3)
57
KSO17/SMISO/GPC5 (3)
32
PWM6/SSCK/GPA6
100
SSCE0#/GPG2
125
SSCE1#/GPG0
36
KSO0/PD0
37
KSO1/PD1
38
KSO2/PD2
39
KSO3/PD3
40
KSO4/PD4
41
KSO5/PD5
42
KSO6/PD6
43
KSO7/PD7
44
KSO8/ACK#
45
KSO9/BUSY
46
KSO10/PE
51
KSO11/ERR#
52
KSO12/SLCT
53
KSO13
54
KSO14
55
KSO15
C890
0.1u/10V_2
4
+3VPCU_ECPLL
VSTBY_FSPI
R235
2.2_1%_6
C256
0.1u/10V_2
106
11
114
127
121
74
VCC
VSTBY#126VSTBY#250VSTBY#392VSTBY#4
AVCC
VSTBY#5
VSTBY(PLL)
VSTBY_FSPI
LPC
IT8987E/CX LQFP
CIR
UART port
EXTERNAL SERIAL FLASH
SPI ENABLE
KBMX
KSI0/STB#58KSI1/AFD#59KSI2/INIT#60KSI3/SLIN#61KSI462KSI563KSI664KSI7
VSS#1
1
65
1 2
TP131
TP132
4
L4 BLM15AG121SN1D
C262
0.1u/10V_2
R401 *short_0402
84
3
82
20
19
97
GPH7
EGAD/GPE1
EGCS#/GPE283EGCLK/GPE3
ID5/GPH598ID6/GPH699ID3/GPH396ID4/GPH4
L80LLAT/GPE7
L80HLAT/BAO/GPE0
GPIO
WAKE UP
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
VSS#5
VSS#227VSS#3
VSS#4
49
91
L13 BLM15A G121SN1D
VCORE
AVSS
12
75
104
ECAGND
1 2
93
SM BUS
SMDAT2/PECIRQT#/GPF7(3)
CLKRUN#/ID0/GPH0
PWM
A/D D/A
CLOCK
C334
0.1u/10V_2
(For PLL Power)
+3VPCU_EC
ACPRESENT [1 0] WLANPWR# [50]
CLR_CMOS [10 ]
HP_JD#_EC_CODEC [47]
R326 *short_0402
TRI_EN# [74] USB_BC_ON [46,58]
USB_CHARGE_ON [46,58]
CLKRUN# [10]
110
SMCLK0/GPB3
111
SMDAT0/GPB4
115
SMCLK1/GPC1
116
SMDAT1/GPC2
PS2CLK2/GPF4 PS2DAT2/GPF5
PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5
TMRI0/GPC4(3) TMRI1/GPC6(3)
PWRSW/GPE4
RI1#/GPD0(3)
RI2#/GPD1
ADC0/GPI0(3) ADC1/GPI1(3) ADC2/GPI2(3) ADC3/GPI3(3) ADC4/GPI4(3)
TACH2/GPJ0(3)
GPJ1(3)
GPJ7 GPJ6
U18 IT8987E/CX
117 118
85 86 89 90
24 25 28 29 30 31
47 48
120 124
107 18 21
112
66 67
EC_GPI2
68 69 70
76 77
R395 *0 _5%_2
78 79
2 128
PECI/SMCLK2/GPF6(3)
PS/2
PS2CLK0/CEC/TMB0/GPF0
PS2DAT0/TMB1/GPF1
TACH0A/GPD6(3)
TACH1A/TMA1/GPD7(3)
DAC2/TACH0B/GPJ2(3) DAC3/TACH1B/GPJ3(3)
AJ089870F02 IT8987E/CX
SM BUS ARRANGEMENT TABLE
SM Bus 1
Battery
SM Bus 2
TBT3 PD/Subwoofer/Thermal Sensor
SM Bus 3
LED PWM/Audio AMP
SM Bus 4
3
R374 33_1%_2 C344
C253 180p/50V_4
MBCLK MBDATA
2ND_MBCLK 2ND_MBDATA
EC_PECR_R
LID#_EC_L
MAINON
SUSON
SYS_HWPG
NBSWON#
HWPG
ICMNT
10u/6.3V_4
C422
R440 *0 _5%_2
VRON
R297 *short_0402
R284 33_1%_2
C275 180p/50V_4
3
+3V_LDO_EC
+3V_S5 VSTBY_FSPI
180p/50V_4
R298 33_1%_2 C259
D40 AZ5725-01F.R7G
1 2
R227 *short_0402
modify 8/15
2ND_MBCLK [10,40,60] 2ND_MBDATA [10,40,60]
R226 33_1%_2
180p/50V_4
C245
D31 AZ5725-01F.R7G
1 2
SYS_SHDN# [2,62,6 8]
EC_FPBACK# [32] TPCLK [54] TPDATA [54]
R420 *short_0402 R430 *short_0402
R458 *short_0402
MAINON [35,38,62,64,68,69] FAN2_PWM [53 ]
FAN1_RPM [53] FAN2_RPM [53]
SUSON [63,64,69]
NBSWON# [16,59] SUSC# [10,16] HWPG [2]
RSMRST# [10]
ICMNT [61]
ECAGND
VRON [65 ]
MKB_INT# [54]
USB_DSCH_CTL [41,76] PCH_PWROK [10]
USB_CLT1 [46,58]
R1165 *10K_1%_2
R236 *0_5%_4 R221 *short_0402
180p/50V_4
TBTA_I2C_IRQ2Z_EC [40]
R274 *short_0201 R275 *short_0201
R266 33_1%_2
R450 33_1%_2
C426 180p/50V_4
GPIO24_IFPF_HPD [1 1,24,41]
+3V
GC6FBEN_Q_EC [23]
BT_EN [50]
PWRLED# [59] BATLED1# [59]
DDR4_SUSON_2V5 [64]
BATLED0# [59]MCU_INT#[54]
R421 33_1%_2
C404 180p/50V_4
TPD_INT#
LID#_MACRO [54]
GPUT_CLK [23] GPUT_DATA [23]
MBCLK [61] MBDATA [61]
EC_PECI [2]
LID# [32,59]
RF_EN [50]
TPD_EN [54]
TPD_INT# [54]
2
modify R364 to 10K ohm for boot issue 2/1
S5_ON NBSWON#
DGPU_THER_ALERT# EC_GPI2
SM BUS PU(KBC)
MBCLK MBDATA
2ND_MBCLK 2ND_MBDATA
DGPU_OPP#
HWPG(KBC)
HWPG_2.5V[64] HWPG_VDDR[64] HWPG_1VS5[63] SYS_HWPG[62] HWPG_1.8VS5[68]
Reset SW (FSW)
Crisis_disk_enable
R869 *short_0402
BI[61]
Add 12/01
Vgs = 1.5V
change BI SW 8/11
2
R273 10K_1%_2 R240 *100K_5%_2
R230 10K_1%_2 R446 *10K_1%_2
R238 4.7K_1%_2 R237 4.7K_1%_2
R246 4.7K_1%_2 R245 4.7K_1%_2
R318 *short_0402
C393
R410
*0.1u/10V_2
*100K_1%_4
D38 D106 D35 D37 D33
R912 *short_0402
3
2
Q73
1
PJA138K
change SW3 P/N 10/19
1
+3V_LDO_EC
2
+3V_LDO_EC
MAINON SUSON VRON
+3V
PCH_SPI_SI_EC PCH_SPI_SO_EC
+3V_LDO_EC
+3V_S5
Q32
3
*2N7002KTB
1
1 1 1 1 1
C830 *0.1u/10V_2
TPD_INT#
3ND_MBCLK 3ND_MBDATA
DGPU_OPP#_PROCHOT# [23]
PROCHOT_EC
C246
0.1u/10V_2
*SDM20U30-7
2
*SDM20U30-7
2
SDM20U30-7
2
*SDM20U30-7
2
*SDM20U30-7
2
+3V_RTC
R262
R901
100K_1%_4
*100K_1%_4
SW2
3
4
TME-533B-Q-T/R
5
6
1
2
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R464 100K_1%_4 R231 100K_1%_4 R429 100K_1%_4 R276 *10K_1%_2 R272 *10K_1%_2
R267 *10K_1%_2
R312 4.7K_1%_2 R307 4.7K_1%_2
3
Q29
2
2N7002KTB
1
R268 100K_1%_4
+3V
R368 10K_1%_2
HWPG
R260 *0_5%_4
R286 *0_5%_4
R290 *10K_1%_2
C276 *0.1u/10V_2
BI_GATE
34
5
Q30A *PJ4N3KDW
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
KBC IT8987
KBC IT8987
KBC IT8987
1
ZGE
ZGE
ZGE
57
+3VPCU
+3V
H_PROCHOT# [2,61,65]
+3V_RTC
+3VPCU
WRST#
61
2
Q30B *PJ4N3KDW
57 78Friday, May 03, 2019
57 78Friday, May 03, 2019
57 78Friday, May 03, 2019
1A
1A
1A
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1
USB Charger (UBC)_BC 1.2
Part Number Description
AL002544001 TPS2544RTER
D D
AL055544001 SLGC55544CVTR
+5VPCU +USBPWR
C189 1u/6.3V_2
USB_CLT1[46,57]
USB_CHARGE_ON[46,57]
USB_BC_ON[46,57]
USB Charger (UBC)_BC 1.2
Part Number Description
AL002544001 TPS2544RTER
C C
AL055544001 SLGC55544CVTR
+5VPCU +USBPWR
C226 1u/6.3V_2
USB_BC_ON(Low)-->ILIM_L USB_BC_ON(High)-->ILIM_H
120mil 120mil
USBP1-[9] USBP1-_C [59] USBP1+[9]
R180
39K_1%_2
R228
39K_1%_2
USB_CLT1
+5VPCU
USB_BC_ON
USB_CLT1
USB_BC_ON
R165 10K_1%_2 R166 10K_1%_2 R161 100K_1%_2
USB_CHARGE_ON
(RILIM_LO 1.2A) (RILIM_HI 2.3A)
R181
20K_1%_2
USB_BC_ON(Low)-->ILIM_L USB_BC_ON(High)-->ILIM_H
USBP2-[9] USBP2+[9]
R229
20K_1%_2
R183 10K_1%_2 R182 10K_1%_2 R194 100K_1%_2
USB_CHARGE_ON
(RILIM_LO 1.2A) (RILIM_HI 2.3A)
+5VPCU
U8
1
VIN
2
DM_OUT
3
DP_OUT
6
CTL1
CTL2_1
7
CTL2
CTL3_1
8
CTL3
5
EN
4
ILIM_SEL
ILIM_LO1
15
ILIM_L
ILIM_HI1
16
ILIM_H
SLGC55544CVTR
CTL2_2 CTL3_2
ILIM_LO2 ILIM_HI2
U11
1
VIN
2
DM_OUT
3
DP_OUT
6
CTL1
7
CTL2
8
CTL3
5
EN
4
ILIM_SEL
15
ILIM_L
16
ILIM_H
SLGC55544CVTR
120mil 120mil
VOUT DM_IN
DP_IN
FAULT
EPAD
GND
VOUT
DM_IN
DP_IN
FAULT
NC
EPAD
12
USBP1-_C
11
USBP1+_C
10
9 13
17 14
12
USBP2-_C
11
USBP2+_C
10
9
NC
13
17 14
GND
USBP1+_C [59]
USB_OC1# [9]
USBP2-_C [59]
USBP2+_C [59]
USB_OC2# [9]
58
Hole
BOT side BOT side
WiFi nut SSD nut
HOLE22
1
H-TC228IBC181D130P2
B B
HOLE26
*HG-C276D118P2
7 8 9
123
HOLE20
1
*H-C315D220P2
SPAD2
1
*SPAD-C315
A A
HOLE17
*hg-c315d118p2
7
6
8
5
9
4
123
HOLE15
1
*H-TIC220BC283D146P2
HOLE23
1
*H-C102D102N
SSD CHASIS nut
HOLE25
1
h-tc228ibc189d146p2
HOLE12
*HG-TIC315BC394D118P2
6
7
5
8
4
9
123
HOLE14
1
*H-TIC220BC283D146P2
HOLE21
H-TC228BC181D138P2
6 5 4
1
HOLE13
*hg-c315d118p2
6
7
5
8
4
9
123
HOLE6
1
*H-TIC220BC283D146P2
HOLE10
1
*H-ZGE-1N
HOLE27
1
H-TC228BC181D138P2
HOLE24
*hg-c315d118p2
6
7
5
8
4
9
123
HOLE18
1
*H-O114X102D114X102N
HOLE28
*hg-tic315bc394d118p2
7 8 9
123
HOLE4
*hg-c315d118p2
7 8 9
123
HOLE8
1
*H-TIC220BC283D146P2
*hg-tic315bc394d118p2
6
7
5
8
4
9
HOLE5
*hg-c315d118p2
7
6
8
5
9
4
123
*H-TIC220BC283D146P2
2D barcode 2D barcode
HOLE3
1
*2D-BARCODE-8X8-S
HOLE1
123
6 5 4
HOLE7
1
*hg-c315d118p2
7 8 9
6 5 4
HOLE29
123
HOLE31
1
*2D-BARCODE-8X8-S
HOLE2
*hg-tic315bc394d118p2
6
7
5
8
4
9
123
6 5 4
HOLE11
1
*H-TIC220BC283D146P2
HOLE19
*hg-tic315bc394d118p2
6
7
5
8
4
9
123
HOLE30
1
*H-TIC220BC283D146P2
HOLE16
*HG-TIC315BC394D118P2
6
7
5
8
4
9
123
HOLE9
1
*H-TIC220BC283D146P2
VGA Shrapnel
S1
CLIP-39X35-100X18-3P
CLIP-39X35-100X18-3P
*PAD-ZGE-1
12 13 14
SPAD3
S14
11
123
1
1
9710
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
8
6 5
4
S3
1
S12
1
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
S6
1
S11
1
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
S7
1
S9
1
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
S8
1
S5
1
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
S10
S4
1
1
CLIP-39X35-100X18-3P
23
CLIP-39X35-100X18-3P
23
S13
1
S2
1
CLIP-39X35-100X18-3P
23
23
S15
23
1
WLAN M.2 Nut MBLI8001010
SSD Nut X 2 MBZHP001010
SSD Nut (CHASIS)
P/N
MBZS8001010
5
Description
WLAN NUT LI8(MBLI8001,3A)COPPER
SMT NUT THERMAL ZHP(MBZHP001,3A)COPPER
MB STEEL NUT WIFI ZS8(MBZS8001,REV3A)
4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
PROJECT :
DB USB3 Charger/HOLE
DB USB3 Charger/HOLE
DB USB3 Charger/HOLE
ZGE
ZGE
ZGE
58 78Friday, May 03, 2019
58 78Friday, May 03, 2019
1
58 78Friday, May 03, 2019
1A
1A
1A
Page 59
5
4
3
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1
Audio/USB/LAN Board Conn Power & LED Board Conn
+3VPCU +3V_S5 +3V
CN17
47
51695-0450M-V01
D D
C C
PCIE_TXP14_LAN[11] PCIE_TXN14_LAN[11]
CLK_PCIE_LANN[11] CLK_PCIE_LANP[11]
PCIE_RXN14_LAN[11] PCIE_RXP14_LAN[11]
PLTRST#[12,21,41,49,50,51,52,57] PCIE_WAKE#[10,38,50] PCIE_CLKREQ_LAN#[11]
USBP1+_C[58] USBP1-_C[58]
USB30_RX2-_R[60] USB30_RX2+_R[60]
USB30_TX2-_R[60] USB30_TX2+_R[60]
USBP2+_C[58] USBP2-_C[58]
USB30_RX1-_R[60] USB30_RX1+_R[60]
USB30_TX1-_R[60] USB30_TX1+_R[60]
PS8817_MBCLK[60] PS8817_MBDATA[60]
SPDIF_OUT[47]
MIC-JD[47] MIC1-VREFO-R[47] MIC1-VREFO-L[47] MIC1-R[47] MIC1-L[47] HP_JD#_EC[47,57] HP-R1[47] HP-L1[47]
PCIE_TXP14_LAN PCIE_TXN14_LAN
CLK_PCIE_LANN CLK_PCIE_LANP
PCIE_RXN14_LAN PCIE_RXP14_LAN
PLTRST# PCIE_WAKE# PCIE_CLKREQ_LAN#
USBP1+_C USBP1-_C
USB30_RX2-_R USB30_RX2+_R
USB30_TX2-_R USB30_TX2+_R
USBP2+_C USBP2-_C
USB30_RX1-_R USB30_RX1+_R
USB30_TX1-_R USB30_TX1+_R
SPDIF_OUT
ADOGND
MIC-JD MIC1-VREFO-R MIC1-VREFO-L MIC1-R MIC1-L HP_JD#_EC HP-R1 HP-L1
ADOGND
45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
46
19
20
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18
51619-0180N-001 CN8
+3VPCU +5VPCU
PBLED#
LID#
R645 33_1%_2
Modify pin defined for Hall sensor 8/7
Modify 8/10
LID# [32,57] NBSWON# [16,57]
C514
+3V_S5 +3V
PWRLED# [57] SATA_LED# [11,51,52] BATLED0# [57] BATLED1# [57]
180p/50V_4
EMI RESERVE
SATA_LED#
EC7 *10p/50V_4
Add 12/19
D9 *AZ5725-01F.R7G
PBLED# NBSWON# LID#
PWRLED# SATA_LED#
BATLED0# BATLED1#
1 2
D87 *AZ5725-01F.R7G
1 2
D86 *AZ5725-01F.R7G
1 2
D85 *AZ5725-01F.R7G
1 2
D84 *AZ5725-01F.R7G
1 2
D83 *AZ5725-01F.R7G
1 2
D82 *AZ5725-01F.R7G
1 2
C496
0.1u/16V_4
3
1
Q1
2N7002K
2
C497 10u/6.3V_4
R12 100K_1%_4
C520
0.1u/16V_4
PBLED [57]
C513 10u/6.3V_4
+5VPCU
C524
0.1u/16V_4
C518
0.1u/16V_4
C523 10u/6.3V_4
C517 10u/6.3V_4
59
B B
IO Power Conn
3
+3V_S5 LANVCC
LAN_PWR#[57]
A A
5
1
R829 100K_5%_4
R824 10K_1%_4
2
C757 1000p/50V_4
Q71 PJA3413
+3VPCU
LANVCC
+3V
+1.2VSUS
4
3
+USBPWR
+3V_SUS
+3V_SUS [46,60,62,63] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,62,63,64,65,68,70,73,75] +3VPCU [9,10,12,14,16,32,37,39,40,47,54,57,61,62,68,70,75] +1.2VSUS [2,6,10,14,17,18,19,20,46,60,64,75]
1 2 3 4 5 6 7 8
10
9
50224-00801-001 CN14
+USBPWR +3V_SUS
C227
C234
10u/6.3V_4
0.1u/16V_4
LANVCC +3V +1.2VSUS
C777
C776
0.1u/16V_4
10u/6.3V_4
2
C768
C767
0.1u/16V_4
10u/6.3V_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C212
C213
0.1u/16V_4
10u/6.3V_4
C199
C200
0.1u/16V_4
10u/6.3V_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
IO/B
IO/B
IO/B
ZGE
ZGE
ZGE
1
1A
1A
59 78Friday, May 03, 2019
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USB3 RE-TIMER FOR IO/DB
(1) 1.2V Power rail is very important for PS8817, which recommend place at least one de-coupling cap as close as possble to each power pin. Its VDDA/VDDB are much more sensitivity, better to reserve more caps nearby.
D D
C C
(2) 1.2V power ripple requirement: < 30 mV
+1.2VSUS +VDD12
L37 BLM18KG331SN1D
1 2
C893 0.01u/16V_2
C853 4.7u/6.3V_2
+3V_SUS +VDD33
L21 BLM18KG331SN1D
1 2
C324 1u/6.3V_2
+3V_SUS +VDDIO
L35 BLM18KG331SN1D
1 2
C897 0.01u/16V_2
C865 0.01u/16V_2
C871 0.1u/10V_2
C859 1u/6.3V_2
C842 0.1u/10V_2
C325
0.1u/10V_2
C847 0.1u/10V_2
C861 0.1u/10V_2
C855 0.01u/16V_2
C326
0.01u/16V_2
C868 0.01u/16V_2
C872 0.1u/10V_2
C427
0.01u/16V_2
C878 0.01u/16V_2
C843 0.01u/16V_2
C875 0.01u/16V_2
C894 0.1u/10V_2
C449
0.1u/10V_2
C860 0.1u/10V_2
C841 0.01u/16V_2
C884 0.1u/10V_2
C440
0.01u/16V_2
C888 0.1u/10V_2
USB30_TX1+[9] USB30_TX1+_R [59] USB30_TX1-[9] USB30_TX1-_R [59]
USB30_RX1+[9] USB30_RX1+_R [59] USB30_RX1-[9] USB30_RX1-_R [59]
USB30_TX2+[9] USB30_TX2+_R [59] USB30_TX2-[9] USB30_TX2-_R [59]
C892 0.01u/16V_2
USB30_RX2+[9] USB30_RX2+_R [59] USB30_RX2-[9] USB30_RX2-_R [59]
C423 0.22u/25V_2 C406 0.22u/25V_2
C397 0.22u/25V_2 C382 0.22u/25V_2
C364 0.22u/25V_2 C357 0.22u/25V_2
C350 0.22u/25V_2 C339 0.22u/25V_2
TP39 TP38
+VDD33
R363 10K_1%_4
5
3 4
+VDDIO +VDD33
USB30_TX1+_C USB30_TX1+_RT USB30_TX1-_C USB30_TX1-_RT
USB30_RX1+_C USB30_RX1+_RT USB30_RX1-_C USB30_RX1-_RT
USB30_TX2+_C USB30_TX2+_RT USB30_TX2-_C USB30_TX2-_RT
USB30_RX2+_C USB30_RX2+_RT USB30_RX2-_C USB30_RX2-_RT
PS8817_DCI_CLK PS8817_DCI_DATA PS8817_DCI_EN PS8817_MBDATA
PS8817_MODE PS8817_ADDR
PS8817_RESETB
PS8817_EN
R567
Q46A
PJX8838
4.7K_5%_4
14 28
54
2 3
8 9
11 12
17 18
15 16 21
48
26 20
U21
VDDIO VDD33#28
VDD33#54
A1_INP A1_INN
B1_OUTP B1_OUTN
A2_INP A2_INN
B2_OUTP B2_OUTN
DCI_CLK DCI_DATA DCI_EN
MODE
RESETB EN
+VDD12
1
10
37
46
VDDM#10
VDDM#37
VDDM#46
PS8817QFN54GTR-A2
B2_EQ
A2_EQ
A1_EQ
7
23
34
43
PS8817_A1_EQ
PS8817_A2_EQ
PS8817_B1_EQ
PS8817_B2_EQ
19
4
13
42
VDDA1X
VDDA2X
VDDB1X40VDDB1A41VDDA1A
VDDM#1
VDDM#19
A1_OUTP A1_OUTN
A2_OUTP A2_OUTN
B1_DE6B1_EQ
GND#22
B2_DE
GND#49
EPAD
22
25
49
55
PS8817_B1_DE
PS8817_B2_DE
+VDD12
52
VDDD#52
24
VDDD#24
31
VDDB2X
32
VDDB2A
33
VDDA2A
45 44
39
B1_INP
38
B1_INN
36 35
30
B2_INP
29
B2_INN
50
CSDA
CSCL
ADDR
TEST
REXT
47
PS8817_REXT
R463
4.99K_1%_4
PS8817_MBCLK
51 53
27 5
NC
2ND_MBDATA[10,40,57]2ND_MBCLK[10,40,57] PS8817_MBCLK [59] PS8817_MBDATA [59]
R444 *short_0201 R433 *short_0201
R422 *short_0201 R413 *short_0201
R402 *short_0201 R390 *short_0201
R381 *short_0201 R371 *short_0201
connect to EC
In I2C control mode, should use Master I2C control PS8817
+VDD33+VDD33
2
Q46B
2ND_MBDATA PS8817_MBDATA2ND_MBCLK PS8817_MBCLK
6 1
PJX8838
60
R562
4.7K_5%_4
B B
A A
+VDD33 +VDD33
A1_EQ:USB Host facing RX channel receiver equalization setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD
R923 *4.7K_5%_4
R979 *4.7K_5%_4
R309 *4.7K_5%_4
R1009 *4.7K_5%_4
PS8817_A1_EQ PS8817_A2_EQ PS8817_DCI_EN
PS8817_B1_EQ PS8817_B1_DE PS8817_B2_EQ PS8817_B2_DE
R353 *4.7K_5%_4
R994 *4.7K_5%_4
R938 *4.7K_5%_4
R962 *4.7K_5%_4
5
M: TBD(Default) H: TBD
A2_EQ:USB Host facing RX channel receiver equalization setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
B1_EQ:USB connector facing RX channel receiver equalization setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
B2_EQ:USB connector facing RX channel receiver equalization setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
4
+VDD33
A1_DE:USB connector facing TX channel De-emphasis setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default)
R310 *4.7K_5%_4
R995 *4.7K_5%_4
R308 *4.7K_5%_4
R350 *4.7K_5%_4
R354 *4.7K_5%_4
R1010 *4.7K_5%_4
H: TBD A2_DE: USB connector facing TX channel De-emphasis setting;
3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
B1_DE:USB Host facing TX channel De-emphasis setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
B2_DE: USB Host facing TX channel De-emphasis setting; 3-state input, internally tied to VDD33/2, 3.3V tolerance. L: TBD M: TBD(Default) H: TBD
3
2
PS8817_ADDR PS8817_RESETB PS8817_MODE
ADDR: I2C control bus address. Internally pull down at 150k次, 3.3V I/O. L: 0x50~0x57(Default I2C slave address) H: 0xE0~0xE7
MODE: Operation mode configuration, default is in middle level L: 5G redriver mode, 10G retimer mode, adaptive EQ. M: 5G redriver mode, 10G retimer mode, fix EQ (default)
R499 *10K_1%_4
R467 *10K_1%_4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
R306 10K_1%_4
R516 *10K_1%_4
C327
R469
2.2u/10V_4
*10K_1%_4
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Power Board / UIF LED
Power Board / UIF LED
Power Board / UIF LED
1
ZGE
ZGE
ZGE
1A
1A
60 78Friday, May 03, 2019
60 78Friday, May 03, 2019
60 78Friday, May 03, 2019
1A
Page 61
5
ADP(MAX)=330W
PJ1 JPD113D-DB570-7H
5
V+(power pin#5,6)
6
ID(pin#7)
7
ADP_ID [61]
8 9
V-(power pin#8,9)
123
4
10
D D
C C
B B
11
VA
*Short_0201 PR500 1M_5%_2
3
ADP_ID[61]
+VIN
PR487 *102K_1%_4
PR490 *31.6K_1%_2
V_ PMON=K*Total*R
1.2V=1uA*Total*R
CS32262FB15RES CHIP 22.6K 1/16W +-1%(0402) for 330W
PJ22 50458-01001-V02
10
9 8 7 6 5 4 3 2 1
11 12
PR516 1M_5%_2
24780_CMPIN_R
MBCLK_Conn MBDATA_Conn
2
PQ54
2N7002KW
1
PC412
0.1u/50V_4
PC413
*100p/50V_4
Double Check BATT Connector with ME
PC409
*47p/50V_4
A A
5
4/29 RAMP 4/29 RAMP
PC306
PC48
0.1u/50V_4
PR282
24780_ACDET
ACIN[57]
4/29 RAMP
PR505 *0_5%_2
PR504 100_5%_2
PR501 100_5%_2
2 1
PD5 PDZ5.6B
2 1
PD4 PDZ5.6B
PC301 2200p/50V_4
REGN6V
PR502 100_5%_2
PC307
BAT-V BI
TEMP_MBAT#TEMP_MBAT#_Conn
PC71
0.1u/50V_4
PR276 100K_1%_2
PR280 100K_1%_2
PMON[65]
PR503 1M_5%_2
PC410 *47p/50V_4
680p/50V_4
1000p/50V_4 PC222
ICMNT[ 57]
PMON
PR193
22.6K_1%_4
+3VPCU
BI [57]
TEMP_MBAT# [57]
+3VPCU
MBCLK [57]
MBDATA [57]
VA
PD1 P4SMAFJ20A
2 1
PR258 137K_1%_4
MBDATA MBCLK ICMNT
TP23
D/C#
PC169 *100p/50V_2
PR182 10K_1%_2 PR196 *10K_1%_2
PR181
316K_1%_4
PR174 100K_1%_2
4
PR499 866K_1%_4
4
5
PC72 1000p/50V_4
BAT-V
PD6 BAT54CW
PC182 100p/50V_2
PC158
0.01u/50V_4
PQ5 AONS32304
PR259 20_1%_6
D
G
24780_ILIM
3
S
2 1
4
PR270
4.02K_1%_4
2
1
3
PC186
0.47u/25V_4
PR263 *Short_0201 PR497 *Short_0201 PR498 *Short_0201 PR254 *Short_0201 PR253 *Short_0201 PR252 *Short_0201
PC187 100p/50V_2
24780_CMPIN
PR492 100K_1%_2
PR489 *10K_1%_2
24780_CMP IN_R
PC73
0.047u/50V_6
24780_ACDRV 24780_VCC
24780_ACDET
24780_BM# 24780_CMPOUT
PR269
4.02K_1%_4
24780_CMSRC
PR488 *100K_1%_2
ICMNT
PQ4
AONS32304
S
3 215
G
4
PC200
0.1u/50V_4
PU23
3
CMSRC
4
ACDRV
28
VCC
6
ACDET
5
ACOK
11
SDA
12
SCL
7
IADP
8
IDCHG
9
PMON
16
TB_STAT
14
CMPOUT
21
ILIM
13
CMPIN
GND#835GND#936GND#1037GND#11
D
38
PC196
0.1u/50V_4
2
ACP
PROCHOT
BATPRES
10
15
TEMP_MB AT#
H_PROCHOT#_R
PR67
0.005_1%_2512
GND#1
GND#229GND#330GND#431GND#532GND#633GND#7
22
PR184 *Short_0201
24780_CMPOUT
1
ACN
24780_ACP
24780_ACN
PC199
0.1u/50V_4
BATDRV BATSRC
REGN
BTST
HIDRV
PHASE
LODRV
34
PD=3W
SRP
SRN
BQ24780SRUYR
PR183 *0_5%_2
3
PR69 *Short_0201
PR70 *Short_0201
24780_BATDRV
18
24780_BATSRC
17
REGN6V
24
*Short_0603
24780_BST
25
24780_DH
26
24780_LX
27
24780_DL
23
PR179
20
*Short_0201
PR180
19
*Short_0201
PR197
*0_5%_2
3
PR243
24780_ACN
24780_ACP
24780_SRP
24780_SRN
PC170
2.2u/10V_4
PC183
0.047u/50V_4
PC156
0.1u/25V_2
PC145
0.1u/25V_2
PQ30 AON7408
PQ27 AON7752
PC146
0.1u/25V_2
PC216 1000p/50V_4
G
4
G
4
PR507 10K_1%_2
2
153
5
213
+3VPCU
2
PR194 10K_1%_2
D
S
D
S
1
3
PC214 680p/50V_4
PR493 100K_1%_2
+3VPCU
2
+VIN
PQ52 PJA3411
1
3
PC211
0.1u/50V_4
PR175 10_1%_6
PC224 2200p/50V_4
PR310 *4.7_5%_6
PC207 *680p/50V_6
2
PQ53 PJA3411
PR277 100K_1%_2
3
1
*Short_0201
PQ50 2N7002KW
2
PC218
0.1u/50V_4
+VIN
PL20
6.8uH_7x7x3
1 2
PR484
*Short_0201
3
PQ25 2N7002KW
1
PC219 10u/25V_8
PR291
2
PQ32 AONS32304
5
2200p/50V_4
H_PROCHOT# [2,57,65]
2
3
D
S
2 1
G
4
PC209 *0.01u/50V_4
PR303
*Short_0603
PD=3W
PR296
0.005_1%_2037
*Short_0201
24780_SRP 24780_SRN
REGN MAX voltage 6.5V V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr =0.793V for 7.93A current limit
ILIM=0.793V Rsr = 0.01ohm
GPU_THROTTING# [23]
PR286
*Short_0201
1
61
BAT-V
PC195
PC192
2200p/50V_4PR302
22u/25V_8
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PC190
PC191
*22u/25V_8
22u/25V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
Charger (BQ24780S)
Charger (BQ24780S)
Charger (BQ24780S)
1
PC189 *22u/25V_8
ZGE
ZGE
ZGE
1A
1A
1A
61 78Friday, May 03, 2019
61 78Friday, May 03, 2019
61 78Friday, May 03, 2019
Page 62
5
+VIN [32,61,63,64,65,66,67,68,69,73 ,75,76] +5VPCU [46,58,59,63,75] +3VPCU [9,10,12,14,16,32,3 7,39,40,47,54,57,59,61,68,70,75]
SYS_SHDN# [2,57,68] 3V_LDO [68,74]
+VIN +VIN
+
+5VPCU
220u/6.3V_D6.3H4.2
PC248 33u/25V_D6.3H4.5
+5VPCU 5 Volt +/- 5% TDC : 15A PEAK : 20.3A OCP : 28A Width : 720mil
PC244
PC285 10u/25V_8
Isat=27A Isat=27A
PL23
2.2uH_10x10x4
PR563
PR564
*Short_0201
PC276
0.1u/50V_4
*Short_0201
PR391 10K_1%_4
PR377
15.8K_1%_4
+
Power auto recovery
D D
C C
OCP:28A (For BAT 4S1P)
L(ripple current) =(12-5)*5/(2.2u*0.3M*12) =4.419A Iocp=28-(4.419/2)=25.79A Vth=(25.79A*2.99mOhm)+1mV=78.113mV R(Ilim)=(78.113mV*8)/10uA ~62.49K
12
+3VPCU
PC282 2200p/50V_4
51225_SW1
PR423 *4.7_5%_6
PC291 *680p/50V_6
3V_LDO
4
9
2
D1
D1
S1/D2
S2S2S2
567
PR390
*Short_0603
PR400 *0_5%_6
SYS_HWPG[57]
PQ34 AONY36354
D1
SYS_SHDN#
PR403
*Short_0201
G1
1
PC263
0.1u/50V_4
8
G2
Rds(on)=3m ohm
+3V_LDO_EC
+3V_LDO_EC
PR397 *Short_0201
PR392 100K_1%_2
PR409
1_1%_6
+3VPCU
PR402 10K_1%_2
51225_EN1 51225_DH1 51225_VBST1 51225_SW1 51225_DL1
51225_FB1
+3V_LDO_EC [57]
7 20 16 17 18 15
2 14
PC273 10u/6.3V_4
PGOOD EN1 DRVH1 VBST1 SW1 DRVL1 VFB1 VO1
PR398
63.4K_1%_2
3
19
VL
13
VREG5
TPS51225RUKR
CS11CS25VCLK
51225_CS1
51225_CS2
51225_VIN
12
VIN
PU28
26
PR378
78.7K_1%_4
PC272
0.1u/50V_4
3
VREG3
DRVH2
VBST2
DRVL2
GND#1 GND#2 GND#323GND#424GND#525GND#6
PR369
*Short_0603
VFB2
2
1
62
PR419
*Short_0603
3V_LDO
PR381 10K_1%_2
PC247
4.7u/6.3V_2
PQ37
PC264
0.1u/50V_4
AONY36354
1
8
G1
S1/D2
G2
SYS_SHDN#
6
EN2
51225_DH2
10 9 8
SW2
11 4 21 22
51225_VBST2 51225_SW2 51225_DL2 51225_FB2
PR410
1_1%_6
Rds(on)=4.9m ohm
OCP:21A (For BAT 4S1P)
L(ripple current) =(12-3.3)*3.3/(1u*0.355M*12) ~3.0633A Iocp=21-(3.0633/2)=19.468A Vth=(19.468A*4.9mOhm)+1mV=96.393mV R(Ilim)=(96.393mV*8)/10uA =77.11K
PC281 2200p/50V_4
+3VPCU
3.3 Volt +/- 5%
PL22
2.2uH_10x10x4
TDC : 13A PEAK : 16A OCP : 21A Width : 520mil
12
2
D1
D1
D1
51225_SW2
9
PR422 *4.7_5%_6
S2S2S2
567
PC277 *680p/50V_6
PC284 10u/25V_8
PR396 *Short_0201
PR380
6.49K_1%_4
PR379
9.31K_1%_4
+
PC259
0.1u/50V_4
PC236 33u/25V_D6.3H4.5
+3VPCU
+
PC235 220u/6.3V_D6.3H4.2
+5V_S5 [54,64,65,66,67,69,70,71,72,73,75] +5V [35,4 7,48,51,53,54,68,74] +3V_S5 [14,24,25,35,37,40,41,49,50,54,57,59,64,7 4]
TDC : 2.2A PEAK : 2.9A Width : 100mil
+5V_S5
B B
TDC :6A PEAK : 8A Width : 200mil
+5V_S5_TYPEC
A A
PR562
*Short_0805
PR560
*Short_0805
PC427 10u/6.3V_4
+5VPCU
S5_ON[40,57,63,68 ]
+5VPCU
PR566
*Short_0402
S5_ON
PR569
*Short_0201
+5V_S5_TYPEC_R +5V_S5_TYPEC_R
PC431 10u/6.3V_4
PR568
*Short_0402
S5_ON S5_ON_R S5_ON_R
PR570
*Short_0201
5
+5VPCU
PC428
0.1u/50V_4
PC438 0.1u/50V_4
PC437
*0.1u/50V_4
+5VPCU
PC436 1u/25V_4
PC432
0.1u/50V_4
PC439 0.1u/50V_4
PC440
*0.1u/50V_4
PC434 1u/25V_4
13 14
13 14
VOUT1#1 VOUT1#2
4
VBIAS
3
ON1
PC425
1000p/50V_2
VOUT1#1 VOUT1#2
4
VBIAS
3
ON1
PC423
1000p/50V_2
1
JW7110DFNC_TRPBF
12
1
VIN1#22VIN1#1
JW7110DFNC_TRPBF
CT1
12
+5VPCU
PC433 1u/25V_4
7
VIN1#22VIN1#1
VIN2#16VIN2#2
8
OUT2#1 OUT2#2
PU31
GND#1 GND#2
ON2
CT1
CT2
10
PC426 1000p/50V_2
7
VIN2#16VIN2#2
OUT2#1 OUT2#2
PU32
GND#1 GND#2
ON2
CT2
10
PC424 1000p/50V_2
4
PC429
9
0.1u/50V_4
11 15
5
PR567
*Short_0201
PC441 *0.1u/50V_4
PC435 1u/25V_4
8 9
11 15
5
PC430 10u/6.3V_4
MAINON
TDC : 5.1A PEAK : 6.8A Width : 220mil
PR565
*Short_0805
PR561
*Short_0805
MAINON [35,38,57,6 4,68,69]
+5V
TDC : 3.3A PEAK : 4.4A Width : 140mil
+5VPCU
S5_ON
*DDTC144EUA-7-F
3
+3V_S5
PQ58
PR412
*Short_0805
PR411
*Short_0805
PR395
*Short_0402
S5_ON
PR406
*Short_0201
*1M_5%_6
2
1 3
+3V [2,9,1 0,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47 ,48,50,51,52,53,54,57,59,63,64,65,68,70,73,75]
+3VPCU
PC240 1u/25V_4
1
7
VIN1#22VIN1#1
PC254 10u/6.3V_4
+VIN +3V_S5
PR580
PR582 *1M_5%_6
PC261
0.1u/50V_4
PC251 0.1u/5 0V_4
PC260
*0.1u/50V_4
PR581
*22_5%_8
3
2
1
PQ59 *2N7002K
13 14
4
3
1000p/50V_2
VOUT1#1 VOUT1#2
JW7110DFNC_TRPBF
VBIAS
ON1
12
PC252
2
VIN2#16VIN2#2
OUT2#1 OUT2#2
PU26
GND#1 GND#2
ON2
CT1
CT2
10
PC249 1000p/50V_2
+3VPCU
PC262 1u/25V_4
8
PC242
9
0.1u/50V_4
11 15
5
PC245 *0.1u/50V_4
SUSD
SUSD[63]
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
SYSTEM 5V/3V (TPS51225R)
SYSTEM 5V/3V (TPS51225R)
SYSTEM 5V/3V (TPS51225R)
Date: Sheet of
Date: Sheet of
Date: Sheet of
TDC : 5.62A PEAK : 7.49A Width : 240mil
PR355
*Short_0805
PC234 10u/6.3V_4
PR356
*Short_0805
MAINON
PR371
*Short_0201
+3VPCU
3
2
PQ56 AO3404
1
+3V_SUS [46,59,60,63]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
+3V
TDC : 0.11A PEAK : 0.15A
ZGE
ZGE
ZGE
62 78Friday, May 03, 2019
62 78Friday, May 03, 2019
62 78Friday, May 03, 2019
1A
1A
1A
Page 63
5
+VIN [32,61,62,64,65,66,67,68,69,73,75,76] +1V_S5 [10,11,14] +5VPCU [46,58,59,62,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,64,65,68,70,73,75] +1V_SUS [6] +VCCIO [2,3,6,65,68]
4
3
2
1
63
+1V_S5_VIN
9 10 8 6 11
3
PQ21 2N7002K
1
+5VPCU
PC275 1u/10V_4
51211V_DRVH
51211V_SW 51211V_DRVL
VFB=0.7V
+VIN
PR178 1M_5%_6
PC168 *2200p/50V_4
PQ35 AON6996
4/29 RAMP
PC278
PR421
0.1u/50V_4
*Short_0603
1
S1/D2
8
RDSon=4.9mohm
Vo=0.7*(1+R1/R2)=1V
+1V_S5
3
SUSD
2
PQ20 AO3404
1
PC280 2200p/50V_4
2
D1
D1
D1
G1
9
G2
S2S2S2
567
Isat=25A
51211V_SW +1V_S5_SRC
0.68uH/15.5A_7x7x3
1 2
*4.7_5%_6
PC292 *680p/50V_6
PL24
PC274 10u/25V_8
*Short_0201
PR420
4/29 RAMP
MAIND[64,68]
CPU_VCCIO_PWR_GATE[11]
TDC : 0.23A PEAK : 0.31A
+1V_SUS
D D
+3V
PR386 100K_1%_2
HWPG_1VS5[57]
S5_ON[40,57,62,68]
C C
B B
SUSON[57,64,69]
PR385 1K_1%_2
PR384 57.6K_1%_2
PR195
+VIN
PR217 1M_5%_6
PR408 470K_1%_2
PC449
0.47u/6.3V_2 PR424
OCP=17A L ripple current =(19-1)*1/(0.68u*290k*19) =4.804A Vtrip=17-(4.804/2)*4.9mohm =71.5302mV Rlimit=71.5302mV/10uA*8=57.22Kohm
1M_5%_6
2
PQ23
DDTC144EUA-7-F
1 3
51211V_EN 51211V_VBST 51211V_TRIP 51211V_TST
+1V_SUS
PR172
22_5%_8
3
2
PQ19
1
2N7002K
PU29 RT8237CZQW_2
1
PGOOD
3
EN
2
CS
5
RF
+3V_SUS
2
3
1
PR579 22_5%_8
PQ57 2N7002K
7
VCC
FB
4
51211V_FB
PR399 10K_1%_4
UGATE
BOOT
PHASE
LGATE GND#1
PR382
4.3K_1%_4
2
Width : 20mil
SUSD [62]
A A
+VIN
PC279
0.1u/50V_4
4/29 RAMP
PR285
*Short_0201
PR289 *0_5%_2
+
PC283 330u/2V_7343H1.9
4
+1V_S5
+1V_S5
1.0 Volt +/- 5% TDC : 7.51A PEAK : 10A OCP : 17A Width : 440mil
+1V_S5
D
G
153
PQ24
S
AONS32314
2
TDC : 4.8A PEAK : 6.4A Width : 200mil
+VCCIO
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
+1V_S5 (RT8237CZQW_2)
+1V_S5 (RT8237CZQW_2)
+1V_S5 (RT8237CZQW_2)
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
1
ZGE
ZGE
ZGE
1A
1A
1A
63 78Friday, May 03, 2019
63 78Friday, May 03, 2019
63 78Friday, May 03, 2019
Page 64
5
+3V
PR366 100K_1%_2
PR374
*Short_0201
PR393 100_5%_2
+1.2VSUS_TEMP
1P35V_S3
PR373 *Short_0201 PR367 *0_5%_2 PR365 *Short_0201
4/29 RAMP
PC238 *0.1u/50V_4
DDR_VTT
PC267 10u/6.3V_4
PC256
0.033u/16V_4
4/29 RAMP
PC269 *10u/6.3V_6
+5V_S5
HWPG_VDDR[57]
HWPG_2.5V
D D
TDC : 0.38A PEAK : 0.5A Width : 20mil
C C
DDR_VTTT_PG_CTRL[2]
SUSON[57,63,69]
MAINON[35,38,57,62,68,69]
TDC : 0.75A PEAK : 1A Width : 40mil
+VDDQ
PC246
0.1u/50V_4
PR376
1P35V_S3 1P35V_S5
*0_5%_2
PR364 *0_5%_2
VID
High Low
OCP=22A L ripple current =(19-1.2)*1.2/(1u*500k*19) =2.248A Vtrip=22-(2.248/2)*4.9mohm =102.291mV
B B
Rlimit=102.291mV/5uA*10=204.58Kohm
4
PC239 *0.1u/50V_4
20
VTT
2
VTTSNS
1
VTTGND
4
VTTREF
19
VLDOIN
PR404
*Short_0201
PR375
*Short_0201
PR388 *0_5%_2
Ref. Voltage
0.675V
0.75V
1P35V_S5
1P35V_S3
7
GND
3
1P35V_CS
1P35V_PGOOD
13
10
S58S3
CS
PGOOD
PU27
RT8231BGQW
VID
FB
6
14
11
1P35V_VID
1P35V_FB
R2
DDR=1.2V R1=7.87K/F_4 R2=10K/F_4
OCP=22A
PR405 205K_1%_4
1P35V_TON
9
TON
PAD
VDDQ5PGND
21
1P35V_VDDQ
R1
PR389
8.2K_1%_4
PR370 10K_1%_4
UGATE
BOOT
PHASE
LGATE
3
PR372 499K_1%_4
Fsw=500KHz
1P35V_UGATE
17
1P35V_BOOT
18
1P35V_PHASE
16
1P35V_LGATE
15
1P35V_VDD
12
VDD
PC257
1u/6.3V_2
PR394
*Short_0402
PR414
2.2_5%_6
PC266
0.1u/50V_4
+5V_S5
Vo=0.675*(1+R1/R2)=1.2285V
1
S4/S5
2
+VIN [32,61,62,63,65,66,67,68,69,73,75,76] +1.2VSUS [2,6,10,14,17,18,19,20,46,59,60,75] DDR_VTT [17,18,19,20]
+5V_S5 [54,62,65,66,67,69,70,71,72,73,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,65,68,70,73,75]
+1.2VSUS_VIN
PC290 10u/25V_8
+1.2VSUS_TEMP
PC286 2200p/50V_4
PC230
0.1u/50V_4
PQ36 AON6996
1
8
G1
S1/D2
G2
PC289
0.1u/50V_4
2
D1
D1
D1
1P35V_PHASE
9
S2S2S2
567
PR425 *4.7_5%_6
PC293 *680p/50V_6
PC288 10u/25V_8
Isat=22A
1uH/11A_7x7x3
1 2
PL25
PR401
*Short_0201
Rds(on)=4.9m ohm
MAIND[63,68]
VDDQ VTTREF VTT
S5S3
ON
1
1S3 (mainon off)S00
OFF0 OFF
0
ONON
OFF
ONON
OFF
PC287
0.1u/50V_4
PC250 22u/6.3V_8
MAIND
PC237 22u/6.3V_8
2
+VIN
+1.2VSUS
3
1
+1.2VSUS
1.2 Volt +/- 5% TDC :11.8A PEAK : 14.7A OCP : 22A Width : 560mil
PC232 22u/6.3V_8
PQ46 AO3404
TDC : 0.22A PEAK : 0.29A
1
PC258 22u/6.3V_8
+1.2V
+1.2V [35,68]
+1.2VSUS
64
+
PC268 330u/2V_7343H1.9
+2.5VSUS Power Rail For DDR4
PR148
+3V_S5
+3V_S5
PR149 100K_1%_2
PR150
HWPG_2.5V[57]
PR163
SUSON
DDR4_SUSON_2V5[57]
A A
5
*0_5%_2
PR162
*Short_0201
4/29 RAMP
*Short_0201
PR161
*Short_0201
*Short_0603
PC135 *0.47u/6.3V_4
4
5
1
PG
G5719CTB1U
EN
R2
PU13
4
VIN
VFB
6
LX
GND
PR151 15K_1%_4
PC132
4.7u/6.3V_6
3
G5719LX2.5V
2
PR152
47.5K_1%_4
R1
+3V_S5 [14,24,25,35,37,40,41,49,50,54,57,59,62,74] +2.5VSUS [17,18,19,20]
PL10
2.2uH_2.5x2.0x1.2
1 2
PR164 *Short_0201
Vo=(0.6(R1+R2)/R2) =2.5V
PC134 10u/6.3V_6
3
PC133 *10u/6.3V_6
+2.5VSUS
2.5Volt +/- 5% TDC : 0.22A PEAK : 0.29A Width : 20mil
PC136
0.1u/50V_4
+2.5VSUS
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
DDR4_+1.2VSUS (RT8231BGQW)
DDR4_+1.2VSUS (RT8231BGQW)
DDR4_+1.2VSUS (RT8231BGQW)
ZGE
ZGE
ZGE
64 78Friday, May 03, 2019
64 78Friday, May 03, 2019
64 78Friday, May 03, 2019
1
1A
1A
1A
Page 65
5
+VIN [32,61,62,63,64,66,67,6 8,69,73,75,76] +VCC_CORE [7,66] +VCC_SA [6,67]
+5V_S5 [54,62,64,66,67,69,70,71,72,73,75] +3V [2,9,1 0,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47 ,48,50,51,52,53,54,57,59,62,63,64,68,70,73,75] +VCCST [2,6] +VCCIO [ 2,3,6,63,68]
For H82 sku
D D
C C
220K_NTC_4_5%
Place close to VCORE Inductor
SW1_4PH_A[65,66] SW2_4PH_A[65,66] SW3_4PH_A[65,66] SW4_4PH_A[65,66]
CSREF_4PH_A[65,66]
B B
TSENSE_4PH_A
PR68 78.7K_1%_4 PR30 78.7K_1%_4 PR24 78.7K_1%_4 PR19 78.7K_1%_4
SW1_4PH_A[65,66] CSREF_4PH_A[65,66]
SW2_4PH_A[65,66] CSREF_4PH_A[65,66]
SW3_4PH_A[65,66] CSREF_4PH_A[65,66]
PR72
*Short_0201
VCCSA_VCCSENSE[6]
VCCSA_VSSSENSE[6]
VCCSENSE[7]
VSSSENSE[7]
3K_1%_4
PR117
Place close to VCORE Mosfet
+VCC_SA
+VCC_CORE
PC25 47p/50V_4
PR33
1 2
PR73 4.02K_1%_4 PC50 0.1u/50V_4
PR31 4.02K_1%_4 PC54 0.1u/50V_4
PR18 4.02K_1%_4 PC58 0.1u/50V_4
PR77
15K_1%_2
PR78
220K_NTC_4_5%
PC22
2200p/50V_4
12
PR40 75K_1%_2
PR49 165K_1%_4
PR120 100_1%_4
PR118 100_1%_4
PR123 100_1%_4
PR122 100_1%_4
PR29
49.9_1%_2
PC36 470p/50V_4
4
PR28 1K_1%_2
PC35 1200p/50V_4
PR121
*Short_0201
PR119
*Short_0201
PR129
*Short_0201
PR128
*Short_0201
PC18 470p/50V_4
PC6
1000p/50V_2
PC15
1000p/50V_2
Place close to VCCSA Inductor
PC11 1000p/50V_2
PR437
2.61K_1%_4
PR15 1K_1%_2
PC12 1000p/50V_2
PR23 1K_1%_2
PC14 1000p/50V_2
Rc
PC299 470p/50V_4
Rb
PC300 0.01u/50V_4
+VIN
PR457 1K_1%_4
+5V_S5
PC67
0.01u/50V_4
DRVON[66,67]
PWM1_4PH_A[66]
PWM2_4PH_A[66]
PWM3_4PH_A[66]
PWM4_4PH_A[66]
CSN_1PH[67]
VSP_4PH_A VSN_4PH_A
DIFFOUT_4PH_A FB_4PH_A COMP_4PH_A ILIM_4PH_A CSCOMP_4PH_A CSSUM_4PH_A
CSP1_3PH_A CSP2_3PH_A CSP3_3PH_A
PR458
2.2_5%_6
3
PR114
100K_NTC_4_1%
PC9 0.012u/25V_4
PC4 4700p/50V_4 PR430 10_1%_4 PC8 2200p/50V_4
PR441 16.9K_1%_4
PC296 1000p/50V_2
PR10 1K_1%_2
PC5 47p/50V_2
1
VSP_3PH_A
2
VSN_3PH_A
3
IMON_3PH_A
4
DIFFOUT_3PH_A
5
FB_3PH_A
6
COMP_3PH_A
7
ILIM_3PH_A
8
CSCOMP_3PH_A
9
CSSUM_3PH_A
10
CSREF_3PH_A
11
CSP1_3PH_A
12
CSP2_3PH_A
13
CSP3_3PH_A
PC66
0.1u/50V_4
TSENSE_4PH_A
PC68
PR454 *1K_1%_2
1u/6.3V_4
PC65 *2200p/50V_4
PR456 SP@140K_1%_4
PR74 4.3K_1%_4
PR453 24.9K_1%_2
PR455 130K_1%_2
VSP_1PH
VSN_1PH
53
EPAD
12
PC7
0.01u/50V_4
PR432 14K_1%_2
50
51
52
VSP_1PH
VSN_1PH
VCC16TTSENSE_3PH_A14VRMP
17
15
Ra
47
48
49
ILIM_1PH
CSN_1PH
COMP_1PH
PWM1_3PH_A/ICCMAX_3PH_A18PWM2_3PH_A/ADDR19PWM3_3PH_A/VBOOT20PWM3_3PH_B/ROSC_3PH21PWM2_3PH/ROSC_1PH22PWM1_3PH/ICCMAX_3PH_B
DRON
46
CSP_1PH
PR9
7.5K_1%_4
PC298 470p/50V_4
44
45
VR_RDY
IMON_1PH
23
PWM1_1PH/ICCMAX_1PH
PR440
44.2K_1%_4
PR436 *Short_0201
PR439 37.4K_1%_4
PC297 *0.1u/25V_2
81215_SCLK
81215_ALERT 81215_SDIO
PU2
40
41
42EN43
NCP81205FMNTXG
SDIO
SCLK
ALRT#
VRHOT# VSP_3PH_B VSN_3PH_B
IMON_3PH_B
DIFFOUT_3PH_B
FB_3PH_B
COMP_3PH_B
ILIM_3PH_B
CSCOMP_3PH_B
CSSUM_3PH_B
CSREF_3PH_B
CSP1_3PH_B CSP2_3PH_B
TTSENSE_1PH/PSYS24TTSENSE_3PH_B25CSP4_3PH_B
26
CSP4_4PH_A
PR451 *Short_0201
PR452 130K_1%_2
FSW for 1ph Rai l
SW_1PH [67]
+3V
39 38 37 36 35 34 33 32 31 30 29
28 27
Check Total Pow er
PR75 20K_1%_2
2
VR_SVID_DATA VR_SVID_ALERT# VR_SVID_CLK
PR429 10K_1%_2
IMVP_PWRGD [2,10] PWM1_1PH [67]
PR438 *Short_0201
PR13 49.9_1%_4
PR17 *Short_0201 PR14 10_1%_4
PR25 *Short_0201
PR442 *Short_0201 PR445 *Short_0201 PR446 *Short_0201
PR448 *Short_0201
PR449 *Short_0201 PR450 *Short_0201
PR56 2K_1%_2 PR61 2K_1%_2
PR71 *0_5%_2
PR434 100_1%_4
VRON [57]
VR_SVID_CLK [2]
VR_SVID_ALERT# [2] VR_SVID_DATA [2]
PR22
*10K_1%_2
+5V_S5
PR20 4.02K_1%_4 PC64 0.1u/50V_4
PMON [61]
+VCCST
PR433 *Short_0201
PR431
PR435
45.3_1%_4
*110_1%_4
+VCCIO
H_PROCHOT# [2,57,61]
SW4_4PH_A [65,66]
CSREF_4PH_A [65,66]
1
PC295 1000p/50V_4
65
Default Setting( H82 / K SKU)
CFL-H82 & (K SKU= H82*1.25) (4+1 Phase)
VCORE
Icc TDC:86A (K=108A) Icc Max:140A (K=175A) OCP:185A (K=225A)
A A
VCORE L/L::::
R_DC_LL:1.8mV/A R_AC_LL:1.8mV/A
VCCSA
Icc TDC:10A Icc Max:11.1A OCP:20A
VCORE L/L::::
R_DC_LL:10.3mV/A R_AC_LL:10.3mV/A
Item
PR456 CS41402FB14 140K ohm
Ra
PR447 33.2K ohmCS33322FB13
Rb Rc
H82
113K ohmCS41132FB17
26.1K ohmCS32612FB09PR443 CS32612FB09 26.1K ohm
K SKULocation
41.2K ohmCS34122FB19
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
CPU VR IC (NCP81215MNTXG)
CPU VR IC (NCP81215MNTXG)
CPU VR IC (NCP81215MNTXG)
ZGE
ZGE
ZGE
65 78Friday, May 03, 2019
65 78Friday, May 03, 2019
65 78Friday, May 03, 2019
1
1A
1A
1A
Page 66
5
VCORE
D D
PR37
*Short_0402
+5V_S5
PC63
2.2u/10V_4
PR52 *Short_0201
PR60 *Short_0201
PWM1_4PH_A[65]
PR66 *Short_0201
DRVON[65,66,67]
PR47
2.2_1%_4
PC39
2.2u/10V_4
4
PU4 NCP302045MNTWG
29
VCCD
3
VCC
2
SMOD#
1
PWM
30
DISB#
6
nc
31
THWN
CGND
PGND#2
PGND#1
4
28
12
32
3
+VIN_VCC_CORE
4/29 RAMP
PC305
PC59
PC311
10u/25V_6
10u/25V_8
8
VIN#1
9
VIN#2
PC31
PR42
0.22U/25V_6
3.3_1%_6
5
BOOT
7
PHASE
16
VSW
24
SW
27
GL#1
33
GL#2
AGND
PR465
2.2_1%_6
PC316 1000p/50V_4
0.1u/50V_4
PC47 2200p/50V_4
PR98
*Short_0201
+
PC13
Isat=70A
PL7
0.22uH/50A_10x10x4
1 2
33u/25V_D7H3
PR111 *Short_0201
2
+VIN
DCR=0.6mOhm
PC98
PC102
0.1u/50V_4
22u/6.3V_8
+VIN [32,61,62,63,64,65,67,68,69,73,75,76] +VCC_CORE [7,65] +5V_S5 [54,62,64,65,67,69,70,71,72,73,75]
+VCC_CORE
PC107
+
PC323
22u/6.3V_8
330u/2V_7343H1.9
1
66
PR76 10_1%_4
PR38
*Short_0402
+5V_S5
C C
+5V_S5
B B
+5V_S5
A A
*Short_0402
PR36
*Short_0402
PR39
PC62
PR50
2.2u/10V_4
2.2_1%_4
PU6 NCP302045MNTWG
PC41
29
2.2u/10V_4
VCCD
3
VCC
PR51
2.2_1%_4
PC42
2.2u/10V_4
PR48
2.2_1%_4
PC40
2.2u/10V_4
2
SMOD#
1
PWM
30
DISB#
6
nc
31
THWN
PU3 NCP302045MNTWG
29
VCCD
3
VCC
2
SMOD#
1
PWM
30
DISB#
6
nc
31
THWN
PU5 NCP302045MNTWG
29
VCCD
3
VCC
2
SMOD#
1
PWM
30
DISB#
6
nc
31
THWN
PR54 *Short_0201
PR59 *Short_0201
PWM2_4PH_A[65]
PR65 *Short_0201
DRVON[65,66,67]
PC60
2.2u/10V_4
PR53 *Short_0201
PR58 *Short_0201
PWM3_4PH_A[65]
PR63 *Short_0201
DRVON[65,66,67]
PC61
2.2u/10V_4
PR55 *Short_0201
PR57 *Short_0201
PWM4_4PH_A[65]
PR64 *Short_0201
DRVON[65,66,67]
VIN#1 VIN#2
BOOT
PHASE
VSW
SW
GL#1 GL#2
CGND
PGND#2
PGND#1
AGND
4
28
12
32
VIN#1 VIN#2
BOOT
PHASE
VSW
SW
GL#1 GL#2
CGND
PGND#2
PGND#1
AGND
4
28
12
32
VIN#1 VIN#2
BOOT
PHASE
VSW
SW
GL#1 GL#2
CGND
PGND#2
PGND#1
AGND
4
28
12
32
PC56 10u/25V_6
8 9
PC34
PR44
0.22U/25V_6
3.3_1%_6
5
7
16 24
27 33
PC308 10u/25V_8
8 9
PR43
PC32
3.3_1%_6
0.22U/25V_6
5
7
16 24
27 33
PC57 10u/25V_6
8 9
PC37
PR46
0.22U/25V_6
3.3_1%_6
5
7
16 24
27 33
PC310 10u/25V_8
PR463
2.2_1%_6
PC315 1000p/50V_4
PC302 10u/25V_6
PR462
2.2_1%_6
PC314 1000p/50V_4
PC309 10u/25V_8
PR460
2.2_1%_6
PC313 1000p/50V_4
4/29 RAMP
PC304
0.1u/50V_4
4/29 RAMP
PC55
0.1u/50V_4
4/29 RAMP
PC45
0.1u/50V_4
+VIN_VCC_CORE
+VIN_VCC_CORE
+VIN_VCC_CORE
PC46 2200p/50V_4
PR96
*Short_0201
PC44 2200p/50V_4
PR99
*Short_0201
PC303 2200p/50V_4
PR97
*Short_0201
Isat=70A
PL6
0.22uH/50A_10x10x4
1 2
Isat=70A
PL5
0.22uH/50A_10x10x4
1 2
Isat=70A
PL4
0.22uH/50A_10x10x4
1 2
PR112
*Short_0201
PR81 10_1%_4
PR113
*Short_0201
PR83 10_1%_4
PR110
*Short_0201
DCR=0.6mOhm
PC99
0.1u/50V_4
DCR=0.6mOhm
PC101
0.1u/50V_4
DCR=0.6mOhm
PC100
0.1u/50V_4
PC103 22u/6.3V_8
PC110 22u/6.3V_8
PC104 22u/6.3V_8
CSREF_4PH_A [65,66] SW1_4PH_A [65]
+VCC_CORE
PC108
+
22u/6.3V_8
CSREF_4PH_A [65,66] SW2_4PH_A [65]
+VCC_CORE
PC105
+
22u/6.3V_8
CSREF_4PH_A [65,66] SW3_4PH_A [65]
+VCC_CORE
PC109 22u/6.3V_8
PC322 330u/2V_7343H1.9
PC332 330u/2V_7343H1.9
+
PC333 330u/2V_7343H1.9
PR82 10_1%_4
5
4
3
CSREF_4PH_A [65,66] SW4_4PH_A [65]
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
ZGE
PROJECT :
ZGE
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
VCORE 4-Phase Power Stage
VCORE 4-Phase Power Stage
VCORE 4-Phase Power Stage
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
ZGE
1A
1A
1A
66 78Friday, May 03, 2019
66 78Friday, May 03, 2019
66 78Friday, May 03, 2019
1
Page 67
5
4
3
2
1
67
VCCSA
D D
PR86
+5V_S5
C C
*Short_0402
PWM1_1PH[65] DRVON[65,66]
PC78
2.2u/10V_4
PR93 *Short_0201
PR90 *Short_0201 PR89 *Short_0201
PR100
2.2_1%_4
PC82
2.2u/10V_4
PU8 NCP302045MNTWG
29
VCCD
3
VCC
2
SMOD#
1
PWM
30
DISB#
6
nc
31
THWN
CGND
PGND#2
PGND#1
AGND
4
28
12
32
+VIN [32,61,62,63,64,65,66,68,69,73,75,76] +VCC_SA [6,65] +5V_S5 [54,62,64,65,66,69,70,71,72,73,75]
8
VIN#1
9
VIN#2
PR106
3.3_1%_6
BOOT
PHASE
VSW
GL#1 GL#2
5
7
16 24
SW
27 33
0.22U/25V_6
PC85
PC88 10u/25V_8
PC94 10u/25V_8
PR468
2.2_1%_6
PC321 1000p/50V_4
PC327
0.1u/50V_4
4/29 RAMP
PC326 2200p/50V_4
0.47uH/17.5A_7x7x3
PR94
*Short_0201
Isat=26A
PL3
1 2
+VIN
DCR=4.2mOhm
PC328
0.1u/50V_4
PR108
*Short_0201
PC96 22u/6.3V_8
PC89 22u/6.3V_8
+VCC_SA
PC97 22u/6.3V_8
PC90 22u/6.3V_8
B B
PR79 10_1%_4
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
VCCSA 1-Phase Power Stage
VCCSA 1-Phase Power Stage
VCCSA 1-Phase Power Stage
CSN_1PH [65] SW_1PH [65]
ZGE
ZGE
ZGE
1
1A
1A
67 78Friday, May 03, 2019
67 78Friday, May 03, 2019
67 78Friday, May 03, 2019
1A
Page 68
5
4
3
2
1
PQ49
2
1 3
+VIN [32 ,61,62,63,64,65,66,67,69,73,75,76] +5V [35,47,48,51,53,54,62,74] +VCCIO [2,3,6,63,65]+1.8V_S5 [14,41]
+VIN +VIN
PR467 1M_5%_6
MAINON_ON_G
PR85
2
1M_5%_6
3
1
PR80 *22_5%_8
PQ8 *2N7002K
+5V+3V
2
2
3
1
PR496 *220_5%_8
PQ51 *2N7002K
+VCCIO
PR91 22_5%_8
3
2
PQ9
1
2N7002K
+1.2V
3
2
1
PR469 22_5%_8
PQ42 2N7002K
+1.8V
PR109 22_5%_8
3
2
PQ11
1
2N7002K
Size Docu ment Number R ev
Size Docu ment Number R ev
Size Docu ment Number R ev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PR466 1M_5%_6
MAIND
3
2
+1.8V_S5/Thermal Protect
+1.8V_S5/Thermal Protect
+1.8V_S5/Thermal Protect
PC319
PQ41
2200p/50V_4
1
2N7002K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
1
ZGE
ZGE
ZGE
68
MAIND [63,64]
68 78Friday, May 03, 2019
68 78Friday, May 03, 2019
68 78Friday, May 03, 2019
1A
1A
1A
+3VPCU [9,10,12,14,16,32,37,39,40,47,54,57, 59,61,62,70,75] +1.8V [25,32]
+3V [2,9,10,11,13,17,18,19,20,23,31,32,3 3,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62, 63,64,65,70,73,75] 3V_LDO [62,74]
D D
+1.8V_S5
1.8Volt +/- 5% TDC : 1.5A PEAK : 2A
+3V
PR416 100K_1%_2
PR415
*Short_0201
PR368 10_5%_6
PC233 10u/6.3V_4
8068PG_1.8V
8068SVIN_1.8V
PC253 1u/6.3V_2
C C
B B
HWPG_1.8V S5[57]
+3VPCU
PC231
0.01u/50V_4
4 9
10
8
11
PU30
POK VIN#1 VIN#2
VCC GND
M5671RE1U
PC271
*2200p/50V_4
NC#1 SW#1 SW#2 NC#2
EN
FB
PR418
*2.2_5%_6
1 2 3 7 6 5
8068LX_1.8V
8068NC_1.8V 8068FB_1.8V 8068EN_1.8V
PC270 *0.1u/50V_4
PL21
1uH_5x5x1.8
1 2
PC255 *68p/50V_4
PR417
*Short_0201
PC265
*22p/50V_4
8068FB_1.8V_S
R1
R2
PR407
20.5K_1%_4
PR413 10K_1%_4
Width : 80mil
PR383
*Short_0201
PC243
0.1u/50V_4
Vo=0.6*(R1+R2)/R2 =1.83V
S5_ON [40,57,62,63]
+1.8V_S5
PC241 22u/6.3V_6
MAIND
+1.8V_S5
3
2
1
TDC : 0.78A PEAK : 1.04A Width : 40mil
PQ10 AO3404
+1.8V
Thermal protection
3V_LDO
PR116 10K_5%_4
PC93
0.1u/50V_4
PR101
20.5K_1%_4
A A
5
94 degree C
Rset(Kohm)=0.0012T*T-0.9308T+96.147 =19.255 K ohm
1
SET
PU9
TMP708AIDBVR
GND
2
(1) Need fine tune for thermal protect point
(2) Note placement position
5
3
OT
VCC
HYST
4
HYST=VCC for 10 degree Hys. HYST=GND for 30 degree Hys.
TEMP=94C
PR103
*Short_0201
4
SYS_SHDN#
SYS_SHDN# [2,57,62]
DDTC144EU A-7-F
MAINON[35,38,57,62,64,69]
3
MAINON
PR486
*100K_1%_6
Page 69
5
4
3
2
1
69
PC387 1u/25V_4
+5V_S5[54,62,64,65,66,67,70,71,72,73,75] +12V_FAN[53] +VIN[32,61,62,63,64,65,66,67,68,73,75,76]
PR185
*Short_0402
PC159
0.1u/50V_4
FREQ: HI = f-->1.2MHz
PR251 *Short_0201
PR208 *0_5%_2
61087EN
61087FREQ
PU22 TPS61087DRCR
8
IN
3
EN
9
FREQ
4
AGND
5
PGND
PL19
3.3uH_5x5x1.8
1 2
EPAD#111EPAD#212EPAD#313EPAD#414EPAD#515EPAD#6
+12V_FAN
+12V_FAN
40V, 2A
PD3
0.1u/50V_4
SS2040HE
2
VFB=1.238V
PR218 100K_5%_4
PC180 820p/50V_4
1
PR199
R1
174K_1%_4
PR198
R2
20K_1%_4
Vo =1.238*(1+R1/R2) =12V
PC155 22u/25V_8
6
61087SW
SW#1
7
SW#2
2
61087FB
FB
1
61087COMP
COMP
10
61087SS
SS
16
12 Volt +/- 5% TDC : 0.75A PEAK : 1A Width : 40mil
PC442 22u/25V_8
FAN POWER (TPS61087)
D D
+5V_S5
PR483
*Short_0603
PC379
C C
MAINON[35,38,57,62,64,68]
SUSON[57,63,64]
*0.1u/50V_4
MAINON
SUSON
PR485
100K_1%_4
4/29 RAMP
PR494 *Short_0201 PC181
PR495 *0_5%_2
S
1
PR491
10K_5%_4
2
PQ47 AO3415
3
2
G
VGS=-4.5V
3
PQ48 2N7002K
1
D
PC443 10u/25V_8
PC356 10u/25V_8
Low = f--> 650KHz
B B
Discharge Circuit For +12V_FAN
+VIN
PR509 1M_5%_6
PQ22
PR510
*100K_1%_6
3
DDTC144EUA-7-F
2
PR508 1M_5%_6
1 3
PR512
*Short_0402
MAINON
A A
5
4
+12V_FAN
2
PR176 22_5%_8
3
PQ18 2N7002KTB
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGE
ZGE
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
PROJECT :
FAN POWER (TPS61087)
FAN POWER (TPS61087)
FAN POWER (TPS61087)
ZGE
1A
1A
69 78Friday, May 03, 2019
69 78Friday, May 03, 2019
1
69 78Friday, May 03, 2019
1A
Page 70
5
4
3
2
1
70
VGA Core - NVVDD
NVVDD [26,71,72] +5V_S5 [54,62,64,65,66,67,69,71,72,73,75]
Support 8 Phase
PR520 *Short_0201
9512_FBRTN
9512_TSENSE
33
32
TSENSE
9512_CSP2
9512_CSP3
[23]
[23]
9512_FBRTN
*EV@100K_1%_2
9512_FB
31
FB
FBRTN
VINMON
ADDR/FSW
REFOUT CSPSUM CSNSUM
20
9512_CSP1
GPU_TSENSE [71,72]
PC204
PC202 *[email protected]/25V_2
PR284 EV@1K_1%_2
PR281
PR262
*EV@0_5%_2
PC197
*EV@1000p/50V_2
9512_COMP
30
COMP
9512_EAP
29
EAP
9512_DAC
28
DAC
9512_VINMON
27
9512_ADDR
26
9512_IMON
25
IMON
9512_LPC
24
LPC
9512_REFOUT
23
9512_CSPSUM
22
9512_CSNSUM
21
EPAD
41
PC193 *[email protected]/25V_4
PR260 *[email protected]_1%_2
PR514
*Short_0201
PC194 [email protected]/25V_4
PR278 *Short_0201 PR256 EV@100K_1%_2 PR279 EV@2K_1%_2
*EV@2N7002KTB
3
PC188 [email protected]/25V_4
PR515
*Short_0201
PR513 *Short_0201
4/29 RAMP
9512_CSP2
9512_CSP3
9512_CSP4
9512_CSP5
9512_CSP6
9512_CSP7
9512_CSP8
PR521
*EV@22_5%_8
PQ26
PR517 EV@10_1%_2
PR506 EV@10_1%_2PC205
NVVDD
PC411
PR511 *Short_0201
*EV@1000p/50V_2
PR275 *Short_0201
PC198 EV@1u/6.3V_2 PR287 EV@402_1%_4
+5V_S5
PR518 *EV@0_5%_2 PC203 EV@220p/50V_2 PR290 *EV@0_5%_2 PC415 EV@220p/50V_2 PR523 *EV@0_5%_2 PC206 EV@220p/50V_2 PR525 *EV@0_5%_2 PC208 EV@220p/50V_2 PR530 *EV@0_5%_2 PC210 EV@220p/50V_2 PR534 *EV@0_5%_2 PC212 EV@220p/50V_2 PR538 *EV@0_5%_2 PC213 EV_SP@220p/50V_2
Ca
PR540 *EV@0_5%_2 PC215 EV_SP@220p/50V_2
Cb
NVVDD
+5V_S5
3
2
1
VSS_GPU_SENSE [26] VGPU_CORE_SENSE [26]
OCP=540A @N18E-G3 OCP=450A @N18E-G2
DRMOS_REFIN9512_CSP1
PR301 *EV@100K_1%_2
PR306 *EV@1M_5%_2
3
1
+VIN_VGACORE
PR265 EV@10K_1%_4
Rg
DRMOS_REFIN
PR332 *EV@0_5%_2
2
PQ29 *EV@DMG1012T-7
PC185 [email protected]/50V_4
PR273
2
PC414 *EV@1000p/50V_2
DRMOS_REFIN [71,72]
9512_EN_1
D D
PD7 *EV@RB500V-40
1
NVVDD_CORE1_EN[25]
C C
9512_FBRTN
9512_PWM8_S[72] 9512_PWM7_S[72] 9512_PWM6_S[71] 9512_PWM5_S[71] 9512_PWM4_S[71]
9512_PWM3_S[71]
9512_PWM2_S[71]
9512_PWM1_S[71]
B B
PR330 *EV@100K_1%_2 PR541 EV@180K_1%_2 PR542 [email protected]_1%_2 PR543 [email protected]_1%_2 PR544 [email protected]_1%_2 PR545 EV_SP@36K_1%_2
Rh
PR546 *EV@100K_1%_2 PR547 *EV@100K_1%_2
N18E-G2(1170)
RbRaStuff Un-Stuff
A A
Rc StuffUn-Stuff
Rd Un-StuffStuff
Ca Un-Stuff Stuff
Cb Un-Stuff Stuff
14.7K
Rg
CS31471FE01
Rh
Un-Stuff
9512_PWM1 9512_PWM2 9512_PWM3 9512_PWM4 9512_PWM5 9512_PWM6 9512_PWM7 9512_PWM8
Default Setting
5
PR320
EV@10K_1%_2
9512_FBRTN
PR334 EV@309_1%_4
PC223 EV@1u/10V_2 PR321 EV@150K_1%_2 PR322 *Short_0201 PR323 *Short_0201 PR324 *Short_0201 PR325 *Short_0201 PR326 *Short_0201
PR327 *Short_0201
PR328 *Short_0201
PR548 *Short_0201
L/L
APL/MID
APL1
APL2
APL3
APL4
RAMP slope
Soft-start
N18E-G3(1180)
StuffUn-Stuff
12.4K CS31241FE02
36K CS33601FE02
2
9512_EN_1
+1.8V_AON NVVDD_PSI[23] +1.8V_AON
NVVDDPG[25]
NVVDD_PWM_GPU[23]
PC221 EV@4700p/50V_4
PC225 *EV@1500p/50V_4
+5V_S5
9512_EN_S[71,72]
+3VPCU
PQ31 EV@DMG1012T-7
PC217 *[email protected]/25V_4
PR311 EV@10K_1%_2
PR312 EV@10K_1%_2
DRMOS_IMON8[72]
DRMOS_IMON7[72]
DRMOS_IMON6[71]
DRMOS_IMON5[71]
DRMOS_IMON4[71]
DRMOS_IMON3[71]
DRMOS_IMON2[71]
DRMOS_IMON1[71]
PR531 *Short_0201
PR529 EV@100K_1%_2
3
2
1
PR532 *Short_0201
PR527 *Short_0201 PR314 *Short_0201
9512_REFADJ
9512_VREF
9512_REFIN
1
9512_VREF
2
9512_CH_OC
3
9512_PWM8
4
9512_PWM7
5
9512_PWM6
6
9512_PWM5
7
9512_PWM4
8
9512_PWM3
9
9512_PWM2
10
9512_PWM1
9512_5VCC
PR318 EV_SP@0_5%_2 PR539 *EV_SP@100K_1%_2
+5V_S5
PR316 EV_SP@0_5%_2 PR537 *EV_SP@100K_1%_2
+5V_S5
PR313 *Short_0201 PR533 *EV@100K_1%_2
+5V_S5
PR309 *Short_0201 PR528 *EV@100K_1%_2
+5V_S5
PR307 *Short_0201 PR526 *EV@100K_1%_2
+5V_S5
PR300 *Short_0201 PR524 *EV@100K_1%_2
+5V_S5
PR288 *Short_0201 PR522 *EV@100K_1%_2
+5V_S5
PR283 *Short_0201 PR519 *EV@100K_1%_2
+5V_S5
4
3
2
PQ28 EV@2N7002K
1
PR536 EV@1M_5%_2
40
REFADJ
REFIN VREF CH_OC PWM8/T_RAMP PWM7/RAMP_SLP PWM6/APL4 PWM5/APL3 PWM4/APL2
PWM3/APL1
PWM2
PC220 [email protected]/6.3V_2
Ra
Rb
Rc
Rd
EV@10K_1%_2
9512_VID
9512_PGOOD
39
38
VID
PGOOD
PWM1/LL
12
11
4/29 RAMP
4/29 RAMP
4/29 RAMP
4/29 RAMP
4/29 RAMP
4/29 RAMP
PR535 EV@10K_1%_2
PR308
9512_PSI
37
PSI
EV@UP9512PQGJ
CSP8135VCC
CSP7
14
9512_CSP7
9512_CSP8
MBCLK1_GPU
MBDATA1_GPU
PR305 *Short_0201
PR297 *Short_0201
9512_EN
9512_SCL
9512_SDA
36
34
35
EN
SCL
SDA
PU24
CSP4
CSP615CSP516CSP318CSP219CSP1
17
9512_CSP4
9512_CSP5
9512_CSP6
+1.8V_AON [21,23,24,25,27,28,29,30,73,75]+VIN_VGACORE [71,72] +3VPCU [9,10,12,14,16,32,37,39,40,47,54,57,59,61,62,68,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47,48,50,51,52,53,54,57,59,62,63,64,65,68,73,75]
+3V
PR292 *Short_0201
PR304 EV@10K_1%_2
PR255
*Short_0201
PR293 EV@10K_1%_2
MBDATA1_GPU MBCLK1_GPU
N18E-G3(150W) 1180 MAX P 8 Phase
NVVDD EDP-Continous:156A EDP-Peak:450A OCP:540A
N18E-G2(115W) 1170 MAX P 6 Phase
NVVDD EDP-Continous:116A EDP-Peak:375A OCP:450A
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+5V_S5
PR268 EV@20K_1%_2
9512_ADDR
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
9512_LPC
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
ZGE
1
PR264 EV@20K_1%_2
70 78Friday, May 03, 2019
70 78Friday, May 03, 2019
70 78Friday, May 03, 2019
1A
1A
1A
Page 71
+VIN_GPU_TOTAL [73] +VIN_VGACORE [70,72] NVVDD [26,70,72] +5V_S5 [54,62,64,65,66,67,69,70,72,73,75]
5
4
3
2
1
71
PR192
PC380
EV@2_1%_4
34
35
36
37
38
39
34
35
36
37
38
39
34
35
36
37
38
39
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP21
PR191 EV@2_1%_4
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP20
PR190 EV@2_1%_4
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP19
4
VDRV
EV@QD9619AQR1
GL#6
GL#41
6
41
4
VDRV
PU20
EV@QD9619AQR1
GL#6
GL#41
6
41
4
VDRV
PU19
EV@QD9619AQR1
GL#6
GL#41
6
41
3
VCC
PU21
PC381 [email protected]/10V_4
3
VCC
PC382 [email protected]/10V_4
3
VCC
25
30
VIN#30
PGND#5
7
5
25
30
VIN#30
PGND#5
7
5
25
30
VIN#30
PGND#5
7
5
VIN#25
9619_BST1
33
BOOT
9619_PHASE1
32
PHASE
9619_SW1
10
SW
9619_VOS1
1
VOS
31
ZCSET
PGND#72LGND
PGND#40
PR250 EV@100K_1%_2
40
VIN#25
9619_BST2
33
BOOT
9619_PHASE2
32
PHASE
9619_SW2
10
SW
9619_VOS2
1
VOS
31
ZCSET
PGND#72LGND
PGND#40
PR249 EV@100K_1%_2
40
VIN#25
9619_BST3
33
BOOT
9619_PHASE3
32
PHASE
9619_SW3
10
SW
9619_VOS3
1
VOS
31
ZCSET
PGND#72LGND
PGND#40
PR248 EV@100K_1%_2
40
+5V_S5
PC371
D D
9512_PWM1_S[70]
9512_EN_S[70,72]
GPU_TSENSE[70,72]
DRMOS_IMON1[70]
DRMOS_REFIN[70,72]
C C
9512_PWM2_S[70]
9512_EN_S
GPU_TSENSE
DRMOS_IMON2[70]
DRMOS_REFIN
B B
9512_PWM3_S[70]
9512_EN_S
GPU_TSENSE
DRMOS_IMON3[70]
DRMOS_REFIN
A A
PR240 *Short_0201
PR241 *Short_0201
PR242 *EV@30K_1%_2
PR206 *Short_0201
+5V_S5
PR237 *Short_0201
PR238 *Short_0201
PR239
*EV@30K_1%_2
PR205 *Short_0201
+5V_S5
PC373
PR234 *Short_0201
PR235 *Short_0201
PR236
*EV@30K_1%_2
PR204 *Short_0201
PC372
PC364
EV@10u/25V_8
PC390
EV@10u/25V_6
PC177
EV@10u/25V_6
PC357
PC403 [email protected]/25V_6
PC358
PC404 [email protected]/25V_6
PC359
PC402 [email protected]/25V_6
+VIN_VGACORE
PC389
EV@10u/25V_8
PC144 EV@2200p/50V_4
+VIN_VGACORE
PC365
EV@10u/25V_8
PC138 EV@2200p/50V_4
PC366
EV@10u/25V_8
PC137 EV@2200p/50V_4
EV@10u/25V_6
EV@10u/25V_8
EV@10u/25V_8
+VIN_VGACORE
PC154
PC167
PC179
EV@10u/25V_6
EV@2200p/50V_4
Isat=68A DCR(Typ)=0.5mohm
PL18
1 2
+VIN_VGACORE
PC178
PC166
PC397
EV@10u/25V_6
EV@2200p/50V_4
Isat=68A DCR(Typ)=0.5mohm
PL17
1 2
+VIN_VGACORE
PC165
PC398
PC391
EV@10u/25V_6
EV@2200p/50V_4
Isat=68A DCR(Typ)=0.5mohm
PL16
1 2
PR159 *Short_0201
PR158 *Short_0201
PC396
PR160 *Short_0201
PC153
PC152
+
PC201
EV@33u/25V_D6.3H4.5
+
PC341 EV@330u/2V_7343H1.9
+
PC342 EV@330u/2V_7343H1.9
+
PC344 EV@330u/2V_7343H1.9
PR271 [email protected]_1%_2037
PR298 *Short_0201
PR299 *Short_0201
NVVDD_SENSE_V NVVDD_SENSE_I
NVVDD
+
PC128 EV@330u/2V_7343H1.9
+
PC125 EV@330u/2V_7343H1.9
+
PC127 EV@330u/2V_7343H1.9
+VIN_GPU_TOTAL
NVVDD
NVVDD_SENSE_V [74] NVVDD_SENSE_I [74]
9512_PWM4_S[70]
DRMOS_IMON4[70]
9512_PWM5_S[70]
DRMOS_IMON5[70]
9512_PWM6_S[70]
DRMOS_IMON6[70]
9512_EN_S
GPU_TSENSE
DRMOS_REFIN
9512_EN_S
GPU_TSENSE
DRMOS_REFIN
9512_EN_S
GPU_TSENSE
DRMOS_REFIN
+5V_S5
PR231 *Short_0201
PR232 *Short_0201
PR233
*EV@30K_1%_2
PR203 *Short_0201
+5V_S5
PR228 *Short_0201
PR229 *Short_0201
PR230
*EV@30K_1%_2
PR202 *Short_0201
+5V_S5
PR225 *Short_0201
PR226 *Short_0201
PR227
*EV@30K_1%_2
PR201 *Short_0201
PC164
PC151
PC392
EV@10u/25V_6
Isat=68A DCR(Typ)=0.5mohm
PL15
1 2
PC393
PC163
PC400
EV@10u/25V_6
Isat=68A DCR(Typ)=0.5mohm
PL14
1 2
PC401
PC162
PC174
EV@10u/25V_6
Isat=68A DCR(Typ)=0.5mohm
PL13
1 2
+VIN_VGACORE
EV@2200p/50V_4
PR157 *Short_0201
+VIN_VGACORE
EV@2200p/50V_4
PR156 *Short_0201
+VIN_VGACORE
EV@2200p/50V_4
PR155 *Short_0201
PC399
NVVDD
+
PC346 EV@330u/2V_7343H1.9
PC150
+
PC348 EV@330u/2V_7343H1.9
PC149
+
PC350 EV@330u/2V_7343H1.9
NVVDD
+
PC126 EV@330u/2V_7343H1.9
+
PC347 EV@330u/2V_7343H1.9
+
PC343 EV@330u/2V_7343H1.9
N18E-G3(150W) 1180 MAX P 8 Phase
NVVDD EDP-Continous:156A EDP-Peak:450A OCP:540A
N18E-G2(115W) 1170 MAX P 6 Phase
NVVDD EDP-Continous:116A EDP-Peak:375A OCP:450A
PC383
PR189
EV@2_1%_4
PC374
4
3
25
30
VCC
VDRV
34
35
36
37
38
39
PC375
34
35
36
37
38
39
PC376
34
35
36
37
38
39
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP18
PR188 EV@2_1%_4
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP17
PR187 EV@2_1%_4
PWM
EN
TOUT/FLT
OCSET
IOUT
REFIN
TP16
PU18
EV@QD9619AQR1
GL#6
GL#41
6
41
4
VDRV
PU17
EV@QD9619AQR1
GL#6
GL#41
6
41
4
VDRV
PU16
EV@QD9619AQR1
GL#6
GL#41
6
41
PC384 [email protected]/10V_4
3
VCC
PC385 [email protected]/10V_4
3
VCC
VIN#30
PGND#5
7
5
25
30
VIN#30
PGND#5
7
5
25
30
VIN#30
PGND#5
7
5
VIN#25
9619_BST4
33
BOOT
9619_PHASE4
32
PHASE
9619_SW4
10
SW
9619_VOS4
1
VOS
31
ZCSET
PGND#72LGND
PGND#40
PR247 EV@100K_1%_2
40
VIN#25
9619_BST5
33
BOOT
9619_PHASE5
32
PHASE
9619_SW5
10
SW
9619_VOS5
1
VOS
31
ZCSET
PGND#72LGND
PGND#40
PR246 EV@100K_1%_2
40
PR212
VIN#25
PHASE
ZCSET
PGND#72LGND
40
9619_BST6
33
BOOT
9619_PHASE6
32
9619_SW6
10
SW
9619_VOS6
1
VOS
31
PGND#40
PR245 EV@100K_1%_2
PC176
EV@10u/25V_6
PC175
EV@10u/25V_6
PC394
EV@10u/25V_6
PC367
PC405 [email protected]/25V_6
PC368
PC406 [email protected]/25V_6
PC369
PC407 [email protected]/25V_6
+VIN_VGACORE
PC360
EV@10u/25V_8
PC141 EV@2200p/50V_4
+VIN_VGACORE
PC361
EV@10u/25V_8
PC143 EV@2200p/50V_4
+VIN_VGACORE
PC362
EV@10u/25V_8
PC140 EV@2200p/50V_4
EV@10u/25V_8
EV@10u/25V_8
EV@10u/25V_8
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGE
ZGE
ZGE
PROJECT :
PROJECT :
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
1
PROJECT :
1A
1A
1A
71 78Friday, May 03, 2019
71 78Friday, May 03, 2019
71 78Friday, May 03, 2019
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Page 72
5
+VIN_VGACORE [70,71] NVVDD [26,70,71] +5V_S5 [54,62,64,65,66,67,69,70,71,73,75]
4
3
2
1
72
4
VDRV
PU15
G3@QD9619AQR1
GL#6
GL#41
6
41
TP15
PC386 [email protected]/10V_4
3
30
VCC
5
+VIN_VGACORE
PC139 G3@2200p/50V_4
PC363 G3@10u/25V_8
PR211
PC370 G3@10u/25V_8
PC408 [email protected]/25V_6
PC173
VIN#25
BOOT
PHASE
ZCSET
PGND#72LGND
PGND#40
40
G3@10u/25V_6
9619_BST7
33
9619_PHASE7
32
9619_SW7
10
SW
9619_VOS7
1
VOS
31
PR244 G3@100K_1%_2
25
VIN#30
PGND#5
7
PC395 G3@10u/25V_6
Isat=68A DCR(Typ)=0.5mohm
PL12
1 2
PR154 G3@0_5%_2
PC388 [email protected]/50V_4
+
PC345 G3@330u/2V_7343H1.9
PC161 G3@2200p/50V_4
PC148 [email protected]/50V_4
NVVDD
+
PC352 G3@330u/2V_7343H1.9
NVVDD
N18E-G3(150W) 1180 MAX P 8 Phase
NVVDD EDP-Continous:156A EDP-Peak:450A OCP:540A
D D
+5V_S5
9512_PWM7_S[70]
9512_EN_S[70,71]
GPU_TSENSE[70,71]
C C
DRMOS_IMON7[70]
DRMOS_REFIN[70,71]
PR222 G3@0_5%_2
PR223 G3@0_5%_2
PR224
*G3@30K_1%_2
PR200 G3@0_5%_2
PC377
PR186
G3@2_1%_4
34
PWM
35
EN
36
TOUT/FLT
37
OCSET
38
IOUT
39
REFIN
N18E-G2(115W)
PC355
PR177
G3@2_1%_4
+5V_S5
PC378
B B
9512_PWM8_S[70]
9512_EN_S
GPU_TSENSE
DRMOS_IMON8[70]
DRMOS_REFIN
PR219 G3@0_5%_2
PR220 G3@0_5%_2
PR221
*G3@30K_1%_2
PR207 G3@0_5%_2
34
PWM
35
EN
36
TOUT/FLT
37
OCSET
38
IOUT
39
REFIN
4
3
VCC
VDRV
PU14
G3@QD9619AQR1
GL#6
GL#41
6
41
PC354 G3@10u/25V_8
PC142 G3@2200p/50V_4
PC171 G3@10u/25V_6
Isat=68A DCR(Typ)=0.5mohm
PL11
1 2
PC160 [email protected]/50V_4
PR153 G3@0_5%_2
PR257
PC353 G3@10u/25V_8
PC184 [email protected]/25V_6
PC172 G3@10u/25V_6
25
30
VIN#25
VIN#30
PGND#5
7
5
BOOT
PHASE
ZCSET
PGND#72LGND
PGND#40
40
9619_BST8
33
9619_PHASE8
32
9619_SW8
10
SW
9619_VOS8
1
VOS
31
PR209 G3@100K_1%_2
PC157 G3@2200p/50V_4
+
PC349 G3@330u/2V_7343H1.9
+VIN_VGACORE
PC147 [email protected]/50V_4
+
PC351 G3@330u/2V_7343H1.9
1170 MAX P 6 Phase
NVVDD EDP-Continous:116A EDP-Peak:375A OCP:450A
TP14
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGE
ZGE
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
+VGPU (UP9512PQGJ)
ZGE
1A
1A
72 78Friday, May 03, 2019
72 78Friday, May 03, 2019
1
72 78Friday, May 03, 2019
1A
Page 73
5
4
3
2
1
+VIN +VIN_GPU_TOTAL
PR295 *Short_0201
FBVDDQ_MEM
+
PC331
EV@330u/2V_7343H1.9
+VIN_GPU_TOTAL
PC53 EV@2200p/50V_4
FBVDDQ_MEM
+
PC325
EV@330u/2V_7343H1.9
8816AEN
PR272 [email protected]_1%_2037
+
PC20
EV@330u/2V_7343H1.9
+
PC320
EV@330u/2V_7343H1.9
PR294 *Short_0201
FVDDQ_SENSE_I FVDDQ_SENSE_V
N18E-G3(150W) 1180 MAX P 2 Phase
FBVDDQ_MEM EDP-Continous:46A EDP-Peak:63A OCP:75A
N18E-G2(115W) 1170 MAX P 2 Phase
FBVDDQ_MEM EDP-Continous:46A EDP-Peak:63A OCP:75A
FVDDQ_SENSE_I [ 74] FVDDQ_SENSE_V [74]
VGA Core ­ FBVDDQ_MEM
D D
C C
B B
+VIN [32,61,62,63,64, 65,66,67,68,69,75,76] +VIN_GPU_TOTAL [71] FBVDDQ_MEM [21,22,25,27,28,29,30] +5V_S5 [54,62,64,65,66,67,69,70,71,72,75] +1.8V_AON [21,23,24, 25,27,28,29,30,70,75] +3V [2,9,10,11,13,17,18,19,20,23,31,32,33,35, 37,38,39,46,47,48,50,51,52,53,54,57,59, 62,63,64,65,68,70,75]
+5V_S5
PR41 EV@10K_1%_2
+3V
PS_FBVDD_PGOOD[25,33]
PR35 *Short_0201
RT8816AGQW
PSI
Mode
1 Phase DCM
<0.4V
1 Phase CCM
0.8V-1V
2/3 Phase CCM
1.4V-5.5V
FBVDDQ_MEMMEM_VDD_CTRL
1
0
FBVDDQ_MEM R2
1.35V/1.25V
MEM_VDD_CTRL[23]
21K (CS32102FB14)
PR12 EV@75K_1%_2
PR16
*EV@100K_1%_2
+VIN_GPU_TOTAL
1.35V
1.25V
R1
FBVDD_EN[ 25]
Double Check EN Sequence with HW
PSI=1.8V 2/3 Phase CCM
+1.8V_AON
FBVDD_PSI[23]
82.5K (CS38252FB17)
EV@10K_1%_2
+5V_S5
R2 R1
1 3
PR21
PR1 EV@1M_5%_2
PR45
EV@402K_1%_4
Re
PC38 EV@1u/25V_4
2
EV@100K_1%_2
2
PQ38
EV@METR3904-G
PR32 EV@1_5%_6
PR2
PR8 EV@15K_1%_2
8816AVREF
PR27
3
1
PQ1 EV@2N7002K
PC33 *[email protected]/25V_2
PR11 EV@1_5%_6
PC2 *EV@820p/50V_4
for VGA sequence
PR6 *EV@12K_1%_2
PR5 *Short_0201
PR26 EV@21K_1%_2
Fsw : 400KHz
8816ATON
Ra
8816APVCC
8816APG
8816AEN
8816APSI
PR7 *EV@10K_1%_2
VREF=2V
8816AVREF
8816AREFIN
PC17 EV@100p/50V_4
PR573
PU1 EV@RT8816BGQW
18
13
UGATE1
PVCC
BOOT1
PGOOD
PHASE1
3
EN
LGATE1
4
PSI
UGATE2
5
VID
BOOT2
PHASE2
8
VREF
LGATE2
6
REFADJ
7
REFIN
OCSET
9
TON
PR3 EV@0_1%_6
2
8816AUGATE1
1
8816ABOOT1
20
8816APHASE1
19
14
8816AUGATE2
15
8816ABOOT2
16
8816APHASE2
17
10
8816ARGDN
RGND
11
8816AVSNS
VSNS
Ca Cb Cc
12
8816ASS
21
GND
8816AUGATE1_1
4/29 RAMP
PR62 EV@0_1%_6
8816AUGATE2_1
4/29 RAMP
PC19 *EV@56p/25V_2
PC43
*EV@56p/25V_2 PC26 *EV@33p/50V_2
PR572
Rb Rc
OCP=75A @Rds(on)=2.6m/2
4
3
9
PQ3
D1
EV@AOE6936
G1
1
D2/S1
S1/D2
2
Don't Connect Pin2 to Phase
G2
8
S2
10
Rds(on)=3mohm(MAX)
4
3
9
D1
G1
1
D2/S1
S1/D2
2
Don't Connect Pin2 to Phase Don't Connect Pin2 to Phase
G2
8
S2
10
8816AUGATE1_1
5 6
8816APHASE1 8816APHASE1
7
8816ALGATE18816ALGATE1
8816AUGATE2_1
PQ6 EV@AOE6936
5 6
8816APHASE2
7
8816ALGATE28816ALGATE2
D1
G1
1
S1/D2
2
Don't Connect Pin2 to Phase
G2
8
D1
G1
1
S1/D2
2
G2
8
Rds(on)=3mohm(MAX)
PR461 *Short_0201
PC30
*EV@1000p/16V_2
PR34 EV@0_5%_2
Rd
PR574
PC29 *EV@56p/25V_2
PC23 *EV@56p/25V_2
PR459 *Short_0201
PR464 EV@100_1%_2
4
3
9
5
D2/S1
6 7
S2
10
4
3
9
5
D2/S1
6 7
S2
10
FBVDDQ_MEM
PC49
EV@10u/25V_6
PQ2 EV@AOE6936
[email protected]/30A_10x10x4
PC1 *EV@2200p/50V_4
PQ7 EV@AOE6936
8816APHASE2
PR115 *[email protected]_5%_6
PC95 *EV@2200p/50V_4
FBVDDQ_SENSE [25]
EV@22_5%_8
EV@2N7002KTB
PC294 EV@10u/25V_8
Isat=50A DCR(Typ)=1.05mohm
PL1
1 2
PC318
EV@47u/6.3V_6
PC312 EV@10u/25V_8
Isat=50A DCR(Typ)=1.05mohm
PL8
[email protected]/30A_10x10x4
1 2
PC91
EV@47u/6.3V_6
FBVDDQ_MEM +5V_S5
PR444
3
2
PQ40
1
PC317 *EV@47u/6.3V_6
PC92 *EV@47u/6.3V_6
PR427 EV@100K_1%_2
PR426 EV@1M_5%_2
PC24 EV@2200p/50V_4
PC69 EV@10u/25V_6
+VIN_GPU_TOTAL
PC330
*EV@47u/6.3V_6
PC77 *EV@47u/6.3V_6
3
*Short_0201
2
1
PQ39 EV@DMG1012T-7
PR428
73
ON semi NCP81278(AL081278001)
Ra
Rb
A A
5
Rc
Rd
Re un stuff
Ca
Cb
Cc
RT8816A(AL008816002)
stuff
10K 0201
stuff
un stuff
0 ohm
stuff
un stuff
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
PROJECT :
+FBVDDQ_MEM (RT8816BGQW)
+FBVDDQ_MEM (RT8816BGQW)
+FBVDDQ_MEM (RT8816BGQW)
1
ZGE
ZGE
ZGE
1A
1A
73 78Friday, May 03, 2019
73 78Friday, May 03, 2019
73 78Friday, May 03, 2019
1A
Page 74
5
4
3
2
1
Power Monitoring with OVR-M
4/29 RAMP
+3V_S5 [14,24,25,35,37,40,41,49,50,54,57,59,62,64]
D D
C C
TRI_EN#[57]
PR551 EV@100K_1%_2
B B
+5V [35,47,48,51,53,54,62,68]
FVDDQ_SENSE_V
NVVDD_SENSE_V
5650_BSIN1
OVRM_VCC
PR349 *EV@10K_1%_2
5650_EN
3
2
PQ55 EV@2N7002KW
1
GPIO28_OC_WARN#[23]
PR555 *EV@10K_1%_2
EV@1K_1%_2
PR341
Rb
Rb
PC421 EV@1000p/25V_2
PR357 EV@75K_1%_2
PC420 EV@1000p/25V_2
PR358 EV@75K_1%_2
PR347 *Short_0201
PR345 *Short_0201
PC229 [email protected]/25V_4 PR363 EV_SP@127_1%_4 PC422 [email protected]/25V_4 PR556 EV_SP@127_1%_4
PR351 *Short_0201
PR553 *[email protected]_1%_2
*EV@10K_1%_2
+5V
PR343
OVRM_VCC
5650_BSIN1
5650_BSIN2
5650_BSIN3
5650_BSIN4
5650_SH01
5650_SH02
5650_MUX
5650_EN
5650_SKIP
5650_MODE
PR552 *EV@10K_1%_2
PU25 EV@US5650QQKI
3
BS_IN1
6
BS_IN2
11
BS_IN3
14
BS_IN4
32
SH_O1
7
SH_O2
10
SH_O3
17
SH_O4
29
MUX_SEL
28
ENABLE
25
SKIP
26
MODE
CUSTOM88CUSTOM1818CUSTOM2121CUSTOM31
5650_BSIN1 5650_BSIN2
31
Ra
PR350 EV@487_1%_4 PR352 EV@487_1%_4
27
VCC
2
SH_IN_P1
1
SH_IN_N1
5
SH_IN_P2
4
SH_IN_N2
12
SH_IN_P3
13
SH_IN_N3
15
SH_IN_P4
16
SH_IN_N4
BS_OK
BS_REF
CM_REF_IN
PR354 *EV@0_5%_2
20 19
30
23
24
22
DIFF_OUT_P DIFF_OUT_N
BG_REF_OUT
GND
GND_FET
9
33
GND_FET
PC228 [email protected]/10V_4
5650_VCC
PR346 *Short_0201
5650_SHP1
PR360 EV@100_1%_4
5650_SHN1
PR359 *Short_0402
5650_SHP2
PR362 EV@100_1%_4
5650_SHN2
PR361 *Short_0402
5650_SH_P3
PR554 *Short_0201
5650_SHN3
5650_SHP4 5650_SHN4
5650_BSOK
5650_REFOUT
5650_BSREF
5650_CMREF_IN
PR344 *EV@10K_1%_2
PR550 *EV@0_5%_2
PR338 *Short_0201 PR339 *Short_0201
PR549 *EV@0_5%_2
PC418 EV@1000p/50V_2
PR336 EV@365K_1%_4
PR335 EV@324K_1%_4
PC226
EV@1000p/50V_2
PC417 *EV@47p/50V_2
PC419
EV@1000p/50V_2
OVRM_VCC
FVDDQ_SENSE_V [73] FVDDQ_SENSE_I [73]
NVVDD_SENSE_V [71] NVVDD_SENSE_I [71]
OVRM_VCC
GPU_ADC_INP [23] GPU_ADC_INN [23]
PC416 *EV@47p/50V_2
5650_CMREF_IN
Rc
PR340 EV@10K_1%_2
PR333 EV@681K_1%_4
EV@1000p/50V_2
+3V_S5
3V_LDO
PC227
PR348 *Short_0402 PR342 *EV@0_5%_4
74
OVRM_VCC
CH1 FVDDQ VOLTAGE
CH1 FVDDQ CURRENT
CH2 NVVDD VOLTAGE
CH2 NVVDD CURRENT
OVRM_VCC
PR353 EV@10K_1%_2
2
PQ33
1 3
EV@METR3904-G
Ra
UPI US5650PQKION semi NCP45491
N18E-G3(1180) 150W
PR350
Ra
PR352
PR363
Rb
PR556
A A
Rc
649 Ohm 487 Ohm
CS16492FB13
CS11912FB00
169 Ohm
CS11692FB09 143 Ohm191 Ohm
CS42432FB02
PR350
PR352
PR363
PR556
N18E-G2(1170) 115W
487 Ohm649 Ohm
CS14872FB05CS16492FB13
CS11432FB00
324k OhmPR335243k Ohm
CS43242FB11CS42432FB02243k Ohm CS43242FB11
Default Setting
N18E-G3(1180) 150WN18E-G2(1170) 115W
CS14872FB05
127 Ohm
CS11272FB21
324k OhmPR335
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
ZGE
ZGE
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
OVR-M (US5650PQKI)
OVR-M (US5650PQKI)
OVR-M (US5650PQKI)
ZGE
1A
1A
74 78Friday, May 03, 2019
74 78Friday, May 03, 2019
74 78Friday, May 03, 2019
1
1A
Page 75
1
+3VPCU [9,10,12,14 ,16,32,37,39,40,47,54,57,59,61,62,68,70] +1.8V_AON [2 1,23,24,25,27,28,29,30,70,73] +1.8V_MAIN [21,23,25,35] +5VPCU [46,58,59,6 2,63] +VIN [32,61,62,63,64,65,66,67,68,69 ,73,76]
A A
Q80
*DDTC144EUA-7-F
1V8_AON_EN
2
1V8_MAIN_EN
R1169 *EV@100K_1%_2
PQ45
DDTC144EUA-7-F
2
PR478 EV@100K_1%_2
B B
2
+3VPCU
+VIN
1 3
+VIN
1 3
R1166 *EV@1M_5%_2
R1168 *EV@1M_5%_2
PR475 EV@1M_5%_2
PR476 EV@1M_5%_2
+1.8V_AON
2
+1.8V_MAIN
2
+1.8V_AON
R1167 *EV@22_5%_8
3
Q81 *EV@2N7002KW
1
PR474 EV@22_5%_8
3
PQ44 EV@2N7002KW
1
3
PR144 EV@100K_1%_2
PC131
PR145
*Short_0201
8068PG1_1.8V
PR147 EV@10_5%_6
PC130 EV@10u/6.3V_4
4
8068SVIN1_1.8V
PC340 EV@1u/6.3V_2
TDC : 0.08A PEAK : 0.1A Width : 20mil
+1.8V_MAIN
1V8_MAIN_EN[25]
4 9
10
8
11
PR131
*Short_0805
+5VPCU
*EV@2200p/50V_4
PU12
POK VIN#1 VIN#2
VCC GND
EV@M5671RE1U
PC113
EV@10u/6.3V_6
PC129
1V8_MAIN_S
PR479
*Short_0402 PR477 *Short_0201
5
PR146
1
NC#1
2
SW#1
3
SW#2
7
NC#2
6
FB
5
EN
PC118
[email protected]/50V_4 PR578
8068LX1_1.8V
8068NC1_1.8V 8068FB1_1.8V 8068EN1_1.8V
PC124
+1.8V_AON
PC335
PC334
PL9
EV@1uH_5x5x1.8
1 2
PC339 *EV@68p/50V_4
PR143
*Short_0201
PC120 EV@1u/25V_4
13
VOUT1#1
14
VOUT1#2
4
VBIAS
3
ON1
PC112
EV@1000p/50V_4
6
8068FB1_1.8V_S
PC338
*EV@22p/50V_4
1
7
VIN1#22VIN1#1
VIN2#16VIN2#2
OUT2#1 OUT2#2
PU11
EV@JW7110DFNC_TRPBF
GND#1 GND#2
CT1
CT2
12
10
PC448 EV@1000p/50V_4
R1
PR482 EV@10K_1%_4
R2
ON2
+1.8V_AON
1.8Volt +/- 5% TDC : 3A PEAK : 4A Width : 120mil
PR480
*Short_0201
PC336 [email protected]/50V_4
Vo=0.6*(R1+R2)/R2 =1.83V
1V8_AON_EN [25,75]
+3VPCU
PR575 *Short_0402
PC444 EV@1u/25V_4
8 9
11 15
5
PC447
*Short_0201
7
+1.8V_AON
PC337 EV@22u/6.3V_6
+3.3V_AON_S
1V8_AON_EN [25,75]
TDC : 0.04A PEAK : 0.04A Width : 10mil
PR576
*Short_0402
PC445 EV@10u/6.3V_6
8
75
+3.3V_AON
+1.2VSUS [2,6,1 0,14,17,18,19,20,46,59,60,64] +1V_GFX [21,23,24] +5V_S5 [54,62,64,65,66,67,69,70,71,72,73] +3V [2,9,1 0,11,13,17,18,19,20,23,31,32,33,35,37,38,39,46,47 ,48,50,51,52,53,54,57,59,62,63,64,65,68,70,73]
PR137 EV@10K_1%_2
PR136
*Short_0201
+5V_S5
+1.2VSUS
3
PC119 [email protected]/50V_4
3 4
1
PC114 [email protected]/50V_4
PC123 EV@10u/6.3V_4
PU10 EV@G9336ADJTP1U
PGD EN
VCC
GND
2
PQ17 EV@AON7408
3
D
S
2
5
1
G
4
9336DRV
PR135
6
DRV
5
ADJ
EV@47_1%_4
PR134 EV@100_1%_4
9336ADJ
PR133
R2
EV@100_1%_4
4
R1
PC117 EV@10u/6.3V_4
+1V_GFX_S
PC115 EV@10u/6.3V_4
PD2 EV@1SS355
21
PC121 [email protected]/50V_4
+1V_GFX_S
Vout1=(1+R1/R2)*0.5 =1V
5
C C
+1.8V_AON
+1V_GFX_PG[25]
+1V_GFX_EN[25]
D D
1
PR138
EV@10K_1%_2
2
PC122 [email protected]/50V_4
PC116 [email protected]/50V_4
+3V
PR142 EV@10K_1%_2
3
1
PQ16 EV@2N7002K
+1V_GFX
2
6
+1V_GFX TDC : 1.65A PEAK : 2.2A Width : 80mil
+5V_S5
PR139
3
PQ14
EV@2N7002K
1
Size Docu ment Number Rev
Size Docu ment Number Rev
Size Docu ment Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
EV@100K_1%_2
2
+1.8V_AON & +1.8V_MAIN & +1V_GFX
+1.8V_AON & +1.8V_MAIN & +1V_GFX
+1.8V_AON & +1.8V_MAIN & +1V_GFX
7
PQ15 EV@DMG1012T-7
3
2
PR140 EV@1M_5%_2
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
PROJECT :
ZGE
ZGE
ZGE
1A
1A
75 78Friday, May 03, 2019
75 78Friday, May 03, 2019
75 78Friday, May 03, 2019
1A
8
Page 76
5
USB-C VBUS Buckboost
D D
VBUS_PWR_EN
VBUS_PWR_EN[41,5 7]
USB_I2C_SCL[24 ,41]
USB_I2C_SDA[24,41]
C C
<25%VCC 7'h60H 8'hC0H
50-75% 7'h64H 8'hC8H
B B
PR87 1K_5%_2 MP8858GQ-0001-ZPU7
PC76
0.1u/10V_2
USB_I2C_SCL USB_I2C_SDA
4/27 RAMP
PR92 *Short_0201 PR95 *Short_0201
8'hC4H7'h62H25-50%
8'hCCH7'h66H>75%VCC
PS_VBUS_ALT[41]
PR107 499K_1%_2
PR84 301K_1%_2
PC80
0.022u/25V_2
4
PS_USBC_PD_VCC
PC83 1u/6.3V_2
PS_USBC_PD_EN
PS_VBUS_ALT
USBC_PD_ADD
PS_USBC_PD_OC
PR102
15K_1%_2
Set constant current limit
PR105
*Short_0201
POWER FROM BATTERY OR AC ADAPTER
9
VCC
3
EN
8
ALT
5
SCL
6
SDA
4
ADD
7
OC
2
GND1
11
GND2
10
AGND
1
IN
16
BST1
PS_USBC_PD_SW 1
15
SW1
PS_USBC_PD_SW 2
14
SW2
PS_USBC_PD_BST2 PS_USBC_PD_BST2_R
13
BST2
PS_USBC_PD_VOUT_1
12
OUT
PC74
0.1u/25V_4
PR88
*Short_0402
PR104
*Short_0402
3
PC70 22u/25V_8
PS_USBC_PD_BST1_RPS_USBC_PD_BST1
Adaptor : 19V Battery : 12V (4S)
+VIN
PC75 22u/25V_8
PC79
0.1u/25V_4
PC81
0.1u/25V_4
VBUS_FET_EN[41,57]
Isat=4.5A
PL2
4.7uH/3.5A_5x5x3
1 2
PC86
0.1u/25V_4
PC87 22u/25V_8
PR472
*Short_0201
2
+VIN [32,61,62,63,64,65,66,67,68,6 9,73,75] USBC_VBUS [41,44]
PC84 22u/25V_8
USB_FET_EN_R
3
1
PR473 10K_5%_4
2
+
PC324 100u/16V_7343H1.9
PQ43 PMZ370UNE
PR471 49.9K_1%_4
USB_VBUS
PR125 300_5%_6
PC329 0.1u/10V_2
PR470 200K_1%_2
USB_FET_EN_Q
1
76
7
PQ12A
D
EMF20B02V
G
2
S
1
5V
USB_VBUS_Q
3
S
4
PQ12B EMF20B02V
G
D
USBC_VBUS
PC111
0.1u/25V_4
5V@3A
5
PC106
4.7u/25V_6
Only 5V FOR VBUS.
DISCHARGE
PS_USB_VBUS_DSH_QR
3
2
USB_DSCH_CTL[41,57]
A A
5
4
3
2
PR130
*Short_0201
PQ13 AO3414
1
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Docum ent Number Rev
Size Docum ent Number Rev
Size Docum ent Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
PROJECT :
USB-C Buckboost (MP8858GQ)
USB-C Buckboost (MP8858GQ)
USB-C Buckboost (MP8858GQ)
1
ZGE
ZGE
ZGE
1A
1A
76 78Friday, May 03, 2019
76 78Friday, May 03, 2019
76 78Friday, May 03, 2019
1A
Page 77
5
4
3
2
1
9
LOAD SW
JW7110DFNC_TRPBF
D D
2
VL
3V_LDO enable
10
+5VPCU
3V_LDO enable
System Power
TPS51225RUKR
Power Tree Table
AC
DC
C C
1
Smart Charger
BQ24780SRUYR
P.61
3
+1.2VSUS
RT8231BGQW
4
+1V_S5
RT8237CZQW_2
3V_LDO
AC/DC Insert enable
+3VPCU
3V_LDO enable
P.62
DDR_VTT
MAINON enable
+VDDQ
MAINON enable
+1.2VSUS
P.64
SUSON enable
+1V_S5
S5_ON enable
P.63
5
CPU POWER
NCP81205FMNTXG NCP302045MNTWG*5
B B
P.65, 66, 67
+VCC_CORE
VRON enable
+VCC_SA
VRON enable
LOAD SW
JW7110DFNC_TRPBF
11
LOAD SW
JW7110DFNC_TRPBF
12
PWM converter
M5671RE1U
13
PWM converter
M5671RE1U
14
LDO
G9336ADJTP1U
15
LOAD SW
AON6414AL
16
LOAD SW
AO3404
+5V_S5_TYPEC
S5_ON enable
P.62
+5V
MAINON enable
+5V_S5
S5_ON enable
P.62
+3V
MAINON enable
+3V_S5
S5_ON enable
P.62
+1.8V_S5
S5_ON enable
P.68
+1.8V_AON
1V8_AON_EN enable
P.75
+1V_GFX
+1V_GFX_EN enable
P.75
+VCCIO
MAIND enable
P.63
+1V_SUS
SUSON enable
P.63
17
BOOST
TPS61087DRCR
P.69
18
PWM converter
G5719CTB1U
P.64
19
LOAD SW
AO3404
20
LOAD SW
JW7110DFNC_TRPBF
P.68
P.75
+12V_FAN
MAINON enable
+2.5VSUS
SUSON enable
+1.8V
MAIND enable
+1.8V_MAIN
1V8_MAIN_EN enable
77
6
GPU POWER
UP9512PQGJ+ QD9619AQR1*8
NVVDD
NVVDD_CORE1_EN enable
P.70, 71, 72
7
GPU POWER
RT8816AGQW
FBVDDQ_MEM
FBVDD_EN enable
P.73
A A
8
USBC_VBUS
MP8858GQ-0001-Z
5V
VBUS_PWR_EN
P.76
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
PROJECT :
PROJECT :
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
PROJECT :
POWER TREE TABLE
POWER TREE TABLE
POWER TREE TABLE
ZGE
ZGE
ZGE
1
1A
1A
1A
77 78Friday, May 03, 2019
77 78Friday, May 03, 2019
77 78Friday, May 03, 2019
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