Acer Ferrari 5000 Schematics
1
A A
DOCKING PORT
Page 32
Mini Card/WLAN
B B
Page 29
New Card
Page 33
USB 2.0 * 1(USB5)
2
2X PCI-E 0,1
1X PCI-E 3
1X PCI-E 2
ZC3 BLOCK DIAGRAM
CPU THERMAL
SENSOR
Page 13
3
4
AMD K8/RX485/SB460
AMD S1
Turion 64
(638 S1g1 socket)
Page 3,4,5,6
HyperThansport I/O BUS
LINK 16X16
NORTH BRIDGE
RX485
465 FCBGA
Page 9,10,11,12
A-LINK
DDR II
533,667MHz
PCIE 16X
5
REV:B
DDR II-SODIMM1
DDR II-SODIMM2
ATI
M56-P
Page
18,19,20,21,22,24
VRAM X4
（
GDDR3 500MHZ
Page 23
Page 7,8
Page 7,8
）
6
BOM
VRAM@ ->(Samsung,Infineon,Hynix)
UC@ ->(ATMEL,SST)
MEMID@ ->(Samsung,Infineon,Hynix)
2@ ->Add second source
HOST 133/166MHz
Clock GEN
ICS951462
Page 2
R,G,B
LCD
TV-OUT
TMDS
PCIE 100MHz
VGA 96MHz
USB 48MHz
PCI 33MHz
REF 14MHz
CRT port
LCD CONN
S-VIDEO
HDMI
Page 26
Page 25
Page 25
Page 34
AD25
AD20
7
8
SYSTEM POWER
MAX1999
Page 44
CPU CORE(MAX8774)
Page 41
+1.2V/+1.5V/+2.5V
Page 42
+1.8V / VGA_CORE
Page 43,46
DISCHARGE CIRCUIT
Page 44
REQ# / GNT#PCI DEVICE InterruptsIDSEL#
REQ0# / GNT0# INTE#,F#,G#TI 7412
REQ2# / GNT2# INTH#BCM5788M
CLOCK
PCICLK2
PCICLK5
PCI/33MHz
USB PORT X4
Page 29
USB 2.0 * 4(USB0 ~ 3)
Azalia
BLUETOOTH
Page 29
1.3M Camera Module
C C
Page 25
USB0: M/B IO
USB1: M/B IO
USB2: D/B IO
USB3: D/B IO
USB4:
USB5: NEW CARD
USB6: BLUETOOTH
USB7: CAMERA
USB 2.0 * 1(USB6)
USB 2.0 * 1(USB7)
Primary IDE
HDD
Page 35
Media bay
CDROM
Page 35
SATA
ATA 66/100
SUPER I/O
D D
1
PC87383
FIR
Page 38
2
Page 38
BIOS TouchpadKeyboard SWITCH & LED
Page 39 Page 40Page 40
SOUTH BRIDGE
SB460
549 BGA
Page 14,15,16,17
LPC/33MHZ
Embedded Controller
NS 551
Page 40 Page 13
3
RTC
Battery
Page 14
AUDIO CODEC
ALC883
MDC1.5
MODEM
CARDBUS/1394/Card reader
TI 7412
Giga LAN
Broadcom
BCM5788MG
1394
Page 30
Page 32
Page 30,31
6 in 1
Cardreader
Page 31
PCI-Express X 2
TV out / CRT
Audio
DVI
10/100/1G
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Quanta Computer Inc.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
7
Page 27
RJ45
Page 28
Switch
Page 25,26
Switch
Switch
Switch
146Thursday, June 08, 2006
146Thursday, June 08, 2006
146Thursday, June 08, 2006
of
of
of
8
Page 37
Page 34
Page 28
B2A
B2A
B2A
Page 36 Page 36
HP AMP
Page 37
HP/
SPDIF
Page 37
Page 39
4
SPK AMP
Page 37
INT
SPK
Page 37
FAN
5
Line-in
& MIC
Page 37
RJ11
Page 45
PCMCIA
Page 31
EZ4 Docking
Connector
PCIE1~2 , Lan
Ser & Par Port
PS2 , VGA, DVI
SPDIF,SM BUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
6
Date: Sheet
5
4
3
2
1
+3V
L104 BK1608HS600_6L104 BK1608HS600_6
22 ohm/1A
D D
1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U800
2- PUT DECOUPLING CAPS CLOSE TO
Clock Gen.POWER PIN
C C
PDAT_SMB15,29,32,33
PCLK_SMB15,29,32,33
B B
CLK_VDD
C620
C949
C949
22U/10V_8
22U/10V_8
C582
C582
.1U_4
.1U_4
C618
C618
.1U_4
.1U_4
C620
.1U_4
.1U_4
+3V
L105 BK1608HS600_6L105 BK1608HS600_6
C619
C619
.1U_4
.1U_4
300ohm/200mA
+3V
L106 BK1608HS600_6L106 BK1608HS600_6
300ohm/200mA
CLK_VDD
R376
R376
10K_4
10K_4
C977
C977
1U/10V_4
1U/10V_4
B2A:Delete SYS_RST#
+3V
3
R735 0_4R735 0_4
+3V
3
R391 0_4R391 0_4
Q43
Q43
*2N7002E-LF
*2N7002E-LF
2
1
Q23
Q23
2
*2N7002E-LF
*2N7002E-LF
1
B2A:Stuff R376 for RESET_IN#
R704
R704
R387
R387
*10K_4
*10K_4
*10K_4
*10K_4
SMBDT
SMBCK
EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2
FS0
FS1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 1
CPU
Hi-Z
X
180.00
220.00
100.00
133.33
200.00
SRCCLK
[2:1]
100.00
100.00
100.00
100.00
100.00
100.00
100.00
HTT
PCI
Hi-Z
Hi-Z
X/3 X/6
60.00
30.00
73.12
36.56
66.66
33.33
66.66
33.33
66.66
33.33 48.00
C584
C621
C621
C583
C583
.1U_4
.1U_4
.1U_4
.1U_4
C970
C970
1U/10V_4
1U/10V_4
CLK_VDD_REF
C971
C971
.1U_4
.1U_4
Parallel Resonance Crystal
C964 33P_4C964 33P_4
C939 33P_4C939 33P_4
C585
C585
.1U_4
.1U_4
CLK_VDD_USB
C976
C976
.1U_4
.1U_4
21
Y9
Y9
14.31818MHZ
14.31818MHZ
Ioh = 5 * Iref
(2.32mA)
C584
.1U_4
.1U_4
CLK_XOUT_R
Voh = 0.71V @ 60 ohm
COMMENT
USB
48.00
Reserved
48.00
Reserved
Reserved
48.00
Reserved
48.00
48.00
Reserved
Reserved
48.00
Normal ATHLON64 operation
R685
R685
*1M_4
*1M_4
CLK_VDD
R678 0_4R678 0_4
SMBCK7
SMBDT7
U49
U49
54
VDDCPU
14
VDD_SRC1
23
VDD_SRC2
28
VDD_SRC3
44
VDD_SRC4
5
VDD_48
39
VDD_ATIG
2
VDD_REF
60
VDDHTT
53
GND_CPU
15
GND_SRC1
22
GND_SRC2
29
GND_SRC3
45
GND_SRC4
8
GND_48
38
GND_ATIG
1
GND_REF
58
CLK_XIN
CLK_XOUT
R343
R343
475/F_4
475/F_4
D3A:remove R820 , docking
side already pull low 10K
GNDHTT
3
XIN
4
XOUT
11
RESET_IN#
61
NC
9
SMBCLK
10
SMBDAT
48
IREF
ICS951462
ICS951462
EZ_CLKREQ#
NEW_CLKREQ#
C3A:pull up
to +3V
CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT3
SRCCLKC3
SRCCLKT4
SRCCLKC4
SRCCLKT5
SRCCLKC5
SRCCLKT6
SRCCLKC6
SRCCLKT7
SRCCLKC7
CLKREQA#
CLKREQB#
CLKREQC#
48MHz_1
48MHz_0
FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0
R820 *10K_4R820 *10K_4
R821 10K_4R821 10K_4
VDDA
GNDA
50
49
56
55
52
51
47
46
43
42
41
40
37
36
35
34
30
31
26
27
24
25
20
21
18
19
16
17
12
13
57
32
33
7
6
63
64
62
59
+3V
CLK_VDDA
CPUCLK_EXT_R
CPUCLK#_EXT_R
SBLINK_CLKP_R
SBLINK_CLKN_R
SBSRC_CLKP_R
SBSRC_CLKN_R
NBSRC_CLKP_R
NBSRC_CLKN_R
GPP_CLK1P_R
GPP_CLK1N_R
GPP_CLK0P_R
GPP_CLK0N_R
GPP_CLK2P_R
GPP_CLK2N_R
GPP_CLK3P_R
GPP_CLK3N_R
GPP_CLK4P_R
GPP_CLK4N_R
R646 0_4R646 0_4
R695 0_4R695 0_4
CLK_48M_1_R
CLK_48M_2_R
C570
C570
.1U_4
.1U_4
T155T155
USBCLK 15
L45 BK1608HS600_6L45 BK1608HS600_6
C560
C560
22U/10V_8
22U/10V_8
R622 261/F_4R622 261/F_4
R627 49.9/F_4R627 49.9/F_4
R626 49.9/F_4R626 49.9/F_4
R651 33/F_4R651 33/F_4
R653 33/F_4R653 33/F_4
R649 33/F_4R649 33/F_4
R647 33/F_4R647 33/F_4
CLK_VDDA
R639 47/F_6R639 47/F_6
R638 47/F_6R638 47/F_6
R645 33/F_4R645 33/F_4
R644 33/F_4R644 33/F_4
R643 33/F_4R643 33/F_4
R642 33/F_4R642 33/F_4
R641 33/F_4R641 33/F_4
R640 33/F_4R640 33/F_4
R708 33/F_4R708 33/F_4
R707 33/F_4R707 33/F_4
R706 33/F_4R706 33/F_4
R705 33/F_4R705 33/F_4
T174T174
T175T175
R710 33/F_4R710 33/F_4
R709 33/F_4R709 33/F_4
R712 33/F_4R712 33/F_4
R711 33/F_4R711 33/F_4
R714 33/F_4R714 33/F_4
R713 33/F_4R713 33/F_4
T176T176
T177T177
EZ_CLKREQ# 32,39
NEW_CLKREQ# 33
T148T148
R731 *33/F_4R731 *33/F_4
R715 33/F_4R715 33/F_4
CLKREQA# Controls SRC5,6,7
CLKREQB# Controls SRC2,3,4,ATIG3
CLKREQC# Controls SRC0,1,ATIG0,1,2
SB_OSCIN_R
NB_OSCIN_R
HTREFCLK_R
R727 49.9/F_4R727 49.9/F_4
R729 49.9/F_4R729 49.9/F_4
R730 49.9/F_4R730 49.9/F_4
R650 8.2K_4R650 8.2K_4
R652 8.2K_4R652 8.2K_4
R648 8.2K_4R648 8.2K_4
+3V
CPUCLK 5
CPUCLK# 5
D3A:change NBSRC
to ATIG
R726 49.9/F_4R726 49.9/F_4
R728 49.9/F_4R728 49.9/F_4
R725 49.9/F_4R725 49.9/F_4
CLK_VDD
R634
R634
2.2K_4
2.2K_4
R630
R630
49.9/F_4
49.9/F_4
SBSRCCLK ->SB PCIE CLK
SBLINK_CLKP ->NB A-Link clock
NBSRC_CLKP ->NB PCI-E graphic clock
R624 49.9/F_4R624 49.9/F_4
R722 49.9/F_4R722 49.9/F_4
R628 49.9/F_4R628 49.9/F_4
R625 49.9/F_4R625 49.9/F_4
14.318MHz
14.318MHz
14.318MHz
66MHz
R723 49.9/F_4R723 49.9/F_4
R724 49.9/F_4R724 49.9/F_4
R721 49.9/F_4R721 49.9/F_4
R632
R632
R636
R636
2.2K_4
2.2K_4
2.2K_4
2.2K_4
SB_OSCIN 11,15
SIO_14M 38
NB_OSC 11
HTREFCLK 11
R633 *0_4R633 *0_4
R635 *0_4R635 *0_4
R631 *0_4R631 *0_4
R629 49.9/F_4R629 49.9/F_4
SBLINK_CLKP 11
SBLINK_CLKN 11
SBSRCCLK 14
SBSRCCLK# 14
CLK_PCIE_M56 18
CLK_PCIE_M56# 18
NBSRC_CLKP 11
NBSRC_CLKN 11
CLK_PCIE_MINI_A 29
CLK_PCIE_MINI_A# 29
CLK_PCIE_NEW 33
CLK_PCIE_NEW# 33
CLK_PCIE_EZ1 32
CLK_PCIE_EZ1# 32
CLK_PCIE_EZ2 32
CLK_PCIE_EZ2# 32
Check AMD clock
A A
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
EXTERNAL CLOCK GENERATOR
EXTERNAL CLOCK GENERATOR
EXTERNAL CLOCK GENERATOR
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
246Thursday, June 08, 2006
246Thursday, June 08, 2006
246Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
5
4
3
2
1
PROCESSOR HYPERTRANSPORT INTERFACE
D D
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VLDT_RUN
HT_CADIN15_P9
HT_CADIN15_N9
HT_CADIN14_P9
HT_CADIN14_N9
HT_CADIN13_P9
HT_CADIN13_N9
HT_CADIN12_P9
HT_CADIN12_N9
HT_CADIN11_P9
HT_CADIN11_N9
HT_CADIN10_P9
HT_CADIN10_N9
HT_CADIN9_P9
HT_CADIN9_N9
HT_CADIN8_P9
C C
VLDT_RUN
B B
HT_CADIN8_N9
HT_CADIN7_P9
HT_CADIN7_N9
HT_CADIN6_P9
HT_CADIN6_N9
HT_CADIN5_P9
HT_CADIN5_N9
HT_CADIN4_P9
HT_CADIN4_N9
HT_CADIN3_P9
HT_CADIN3_N9
HT_CADIN2_P9
HT_CADIN2_N9
HT_CADIN1_P9
HT_CADIN1_N9
HT_CADIN0_P9
HT_CADIN0_N9
HT_CLKIN1_P9
HT_CLKIN1_N9
HT_CLKIN0_P9
HT_CLKIN0_N9
R274 49.9/F_4R274 49.9/F_4
R272
R272
HT_CTLIN0_P9
HT_CTLIN0_N9
+1.2V
L97
L97
L98
L98
FBJ3216HS800_1206
FBJ3216HS800_1206
FBJ3216HS800_1206
FBJ3216HS800_1206
49.9/F_4
49.9/F_4
80 ohm(4A)
VLDT_RUN
C845
C845
4.7U/6.3V_6
4.7U/6.3V_6
C855
C855
4.7U/6.3V_6
4.7U/6.3V_6
U43AU43A
D4
D3
D2
D1
N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2
J5
K5
J3
J2
P3
P4
N1
P1
VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
C853
C853
.22U/6V_4
.22U/6V_4
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
Athlon 64 S1
Processor Socket
C847
C847
.22U/6V_4
.22U/6V_4
C495
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
AE5
AE4
AE3
AE2
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
Y4
Y3
Y1
W1
T5
R5
R2
R3
C495
4.7U/6.3V_6
4.7U/6.3V_6
HT_CPU_CTLOUT1_PHT_CTLIN1_P
HT_CPU_CTLOUT1_NHT_CTLIN1_N
A1A:Change from 10pf to 180pf
C852
C852
180P_4
180P_4
C846
C846
180P_4
180P_4
HT_CADOUT15_P 9
HT_CADOUT15_N 9
HT_CADOUT14_P 9
HT_CADOUT14_N 9
HT_CADOUT13_P 9
HT_CADOUT13_N 9
HT_CADOUT12_P 9
HT_CADOUT12_N 9
HT_CADOUT11_P 9
HT_CADOUT11_N 9
HT_CADOUT10_P 9
HT_CADOUT10_N 9
HT_CADOUT9_P 9
HT_CADOUT9_N 9
HT_CADOUT8_P 9
HT_CADOUT8_N 9
HT_CADOUT7_P 9
HT_CADOUT7_N 9
HT_CADOUT6_P 9
HT_CADOUT6_N 9
HT_CADOUT5_P 9
HT_CADOUT5_N 9
HT_CADOUT4_P 9
HT_CADOUT4_N 9
HT_CADOUT3_P 9
HT_CADOUT3_N 9
HT_CADOUT2_P 9
HT_CADOUT2_N 9
HT_CADOUT1_P 9
HT_CADOUT1_N 9
HT_CADOUT0_P 9
HT_CADOUT0_N 9
HT_CLKOUT1_P 9
HT_CLKOUT1_N 9
HT_CLKOUT0_P 9
HT_CLKOUT0_N 9
T53T53
T44T44
HT_CTLOUT0_P 9
HT_CTLOUT0_N 9
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
A A
5
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
4
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ATHLON64 HT I/F
ATHLON64 HT I/F
ATHLON64 HT I/F
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Quanta Computer Inc.
346Thursday, June 08, 2006
346Thursday, June 08, 2006
346Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
A
B
C
D
E
C488
C488
.1U_4
.1U_4
W17
Y10
V19
J22
V22
T19
Y26
J24
W24
U23
H26
J23
J20
J21
K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21
K22
R20
T22
T20
U20
U21
C487
C487
.22U/6V_4
.22U/6V_4
C503
C503
1000p/50V_4
1000p/50V_4
U43B
U43B
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
C338
C338
.22U/6V_4
.22U/6V_4
+1.8VSUS
R279
R279
2K/F_4
2K/F_4
R282
R282
2K/F_4
2K/F_4
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1
Processor Socket
C504
C504
1000p/50V_4
1000p/50V_4
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
C335
C335
1000p/50V_4
1000p/50V_4
D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10
Y16
AA16
E16
F16
AF18
AF17
A17
A18
W23
W26
V20
U19
J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24
K26
T26
U26
U24
V26
U22
+0.9V_VTER
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
C509
C509
1000p/50V_4
1000p/50V_4
M_ODT3 7,8
M_ODT2 7,8
M_ODT1 7,8
M_ODT0 7,8
M_B_BS#2 7,8
M_B_BS#1 7,8
M_B_BS#0 7,8
M_B_RAS# 7,8
M_B_CAS# 7,8
M_B_WE# 7,8
C352
C352
1000p/50V_4
1000p/50V_4
M_CLKOUT1 7
M_CLKOUT1# 7
M_CLKOUT0 7
M_CLKOUT0# 7
M_CLKOUT4 7
M_CLKOUT4# 7
M_CLKOUT3 7
M_CLKOUT3# 7
M_B_A[0..15] 7,8
C339
C339
C344
C344
180P_4
180P_4
180P_4
180P_4
C475
C475
180P_4
180P_4
C496
C496
180P_4
180P_4
Processor DDR2 Memory Interface
U43C
AD11
AC12
AC18
AD14
AC14
AD18
AD20
AC20
AD22
AC22
AD26
AD24
AD12
AC16
AD16
AC25
AC26
AF11
AF14
AE14
AB11
AF13
AF15
AF16
AF19
AE18
AF23
AF24
AF20
AE20
AE25
AA25
AA26
AE24
AA23
AA24
AE22
AB26
AF12
AE12
AE16
AF21
AF22
Y11
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
E25
A22
B16
A12
F26
E26
A24
A23
D16
C16
C12
B12
U43C
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
DDR: DATA
DDR: DATA
Athlon 64 S1
Processor Socket
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
M_B_DQ[0..63]7
To SODIMM socket B (Far)
M_B_DM[0..7]7 M_A_DM[0..7] 7
M_B_DQS[0..7]7
M_B_DQS#[0..7]7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ1
M_B_DQ0
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
Y13
AB16
Y19
AC24
F24
E19
C15
E12
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
M_A_DQS7
M_A_DQS#7
M_A_DQS6
M_A_DQS#6
M_A_DQS5
M_A_DQS#5
M_A_DQS4
M_A_DQS#4
M_A_DQS3
M_A_DQS#3
M_A_DQS2
M_A_DQS#2
M_A_DQS1
M_A_DQS#1
M_A_DQS0
M_A_DQS#0
M_A_DQS#[0..7]7
M_A_DQ[0..63] 7
To SODIMM socket A (near)
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS[0..7]7
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
CPU_M_VREF
4 4
+1.8VSUS
R574
R574
39.2F_4
39.2F_4
1 2
R573
R573
39.2F_4
39.2F_4
1 2
PLACE THEM CLOSE TO
CPU WITHIN 1"
3 3
2 2
C517
C517
C332
C332
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
T56T56
M_A_CS#37,8
M_A_CS#27,8
M_A_CS#17,8
M_A_CS#07,8
M_B_CS#37,8
M_B_CS#27,8
M_B_CS#17,8
M_B_CS#07,8
M_A_A[0..15]7,8
+0.9V_VTER
VTT decoupling capacitor,place near CPU
C330
C330
C512
C512
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
4.7U/6.3V_6
VTT_SENSE
M_ZN
M_ZP
M_CKE37,8
M_CKE27,8
M_CKE17,8
M_CKE07,8
M_A_BS#27,8
M_A_BS#17,8
M_A_BS#07,8
M_A_RAS#7,8
M_A_CAS#7,8
M_A_WE#7,8
C350
C350
.22U/6V_4
.22U/6V_4
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
C485
C485
.22U/6V_4
.22U/6V_4
AE10
AF10
1 1
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ATHLON64 DDRII MEMORY I/F
ATHLON64 DDRII MEMORY I/F
ATHLON64 DDRII MEMORY I/F
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Quanta Computer Inc.
446Thursday, June 08, 2006
446Thursday, June 08, 2006
446Thursday, June 08, 2006
of
of
E
of
1A
1A
1A
5
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
CPU_VDDA_RUN
50 mil
CPU_VDDA_RUN
C336
D D
C336
4.7U/6.3V_6
4.7U/6.3V_6
33 ohm(3000mA)
L29 BLM18PG330SN1DL29 BLM18PG330SN1D
C351
C351
C345
C345
.22U/6V_4
.22U/6V_4
3300p/25V_4
3300p/25V_4
A1A:Change from 3900pf to 3300pf
C837 3900p/25V_4C837 3900p/25V_4
CPUCLK2
CPUCLK#2
C838 3900p/25V_4C838 3900p/25V_4
SB460 only
+1.8V +3V
Q19
Q19
MMBT3904
MMBT3904
+1.8VSUS
R558
R558
4.7K/F_4
4.7K/F_4
5
1
2
3
+1.8VSUS
5
1
2
3
+1.8VSUS
5
1
2
3
CPU_EC_PROCHOT# 39
CPU_PROCHOT# 15
C331 .1U_4C331 .1U_4
B2A:ati suggestion to avoid hynix ram s3 issue
stuff R558,R560 del R561
CPU_PWRGD14,15
C C
LDT_STOP#11,14,15
LDT_RST#14
EC_PWRGD14,15,39
NB_PWRGD11,39
B B
+1.8VSUS
R295
R295
300_4
300_4
H_PROCHOT#
R559
R559
300_4
300_4
+1.8V
R300
R300
*0_4
*0_4
R556
R556
300_4
300_4
2
R557
R557
300_4
300_4
R304
R304
330_4
330_4
+1.8V
13
+1.8V
R560 0_4R560 0_4
R561 *0_4R561 *0_4
R563
R563
169F_6
169F_6
C840 .1U_4C840 .1U_4
4
U41
U41
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
U21
U21
NC7SZ08P5X_NL
NC7SZ08P5X_NL
C841 .1U_4C841 .1U_4
4
U42
U42
NC7SZ08P5X_NL
NC7SZ08P5X_NL
+2.5V
C839
C839
100U/6.3V_3528
100U/6.3V_3528
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_HT_RESET#
4
If AMD SI is not used, the SID pin can be left
unconnected and SIC should have a 300-Ω (±5%)
pulldown to VSS.
R583 *300_4R583 *300_4
+1.8V
R584 *300_4R584 *300_4
R585 300_4R585 300_4
CPU_SIC_R
CPU_SID_R
place them to CPU within 1"
To Power
10/5/5/5/10
COREFB+V41
COREFB-41
B2A:Add LEVEL-SHIFT circuit(R806,R807,Q47) on PSI# that between CPU and POWER.
+1.8VSUS +3V
R806
+1.8VSUS
+1.8V
R303300_4 R303300_4
R305 *330_4R305 *330_4
H_THERMTRIP#
1 3
2
R806
10K_4
10K_4
Q47
Q47
2
MMBT3904
MMBT3904
Q21
Q21
*MMBT3904
*MMBT3904
1 3
R807
R807
10K_4
10K_4
PSI#PSI_L#
SB_THERMTRIP# 15
separated input voltage
0104
R309
R309
4.7K/F_4
4.7K/F_4
Q20
Q20
2
MMBT3904
MMBT3904
1 3
PSI# 41
CPU_TEST5_THERMDC13
CPU_TEST4_THERMDA13
R310
R310
4.7K/F_4
4.7K/F_4
THERM_SYS_PWR 44
3
ATHLON Control and Debug
CPU_VDDA_RUN
CPU_HT_RESET#
T106T106
CPU_ALL_PWROK
T107T107
CPU_LDTSTOP#
EC_PWRGD
VLDT_RUN
R276 44.2F_4R276 44.2F_4
R277 44.2F_4R277 44.2F_4
CPU_VDDIO_SUS_FB_H
T58T58
CPU_VDDIO_SUS_FB_L
T57T57
T21T21
T32T32
T27T27
T60T60
T59T59
T64T64
T49T49
T51T51
T42T42
T43T43
T46T46
T47T47
T48T48
T50T50
B2A:AMD suggestion not stuff
R577,R580,R581,R579,R292,R213,R209
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN#
CPU_PRESENT#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST24_SCANCLK1
CPU_TEST22_SCANSHIFTEN
CPU_TEST12_SCANSHIFTENB
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
T31T31
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST17_BP3
CPU_TEST16_BP2
CPU_TEST15_BP1
CPU_TEST14_BP0
CPU_TEST12_SCANSHIFTENB
CPU_TEST07_ANALOG_T
CPU_TEST6_DIECRACKMON
CPU_TEST5_THERMDC
CPU_TEST4_THERMDA
CPU_TEST3_GATE0
CPU_TEST2_DRAIN0
CPU_RSVD_MA0_CLK3_P
CPU_RSVD_MA0_CLK3_N
CPU_RSVD_MA0_CLK0_P
CPU_RSVD_MA0_CLK0_N
CPU_RSVD_MB0_CLK3_P
CPU_RSVD_MB0_CLK3_N
CPU_RSVD_MB0_CLK0_P
CPU_RSVD_MB0_CLK0_N
CPU_SIC_R
CPU_SID_R
CPU_HTREF1
CPU_HTREF0
T22T22
T23T23
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
R577 *300_4R577 *300_4
R582 300_4R582 300_4
R294 1K/F_4R294 1K/F_4
R210 510/F_4R210 510/F_4
R293 300_4R293 300_4
R580 *300_4R580 *300_4
R581 *300_4R581 *300_4
R579 *300_4R579 *300_4
R292 *300_4R292 *300_4
R213 *300_4R213 *300_4
R209 *300_4R209 *300_4
R214 510/F_4R214 510/F_4
R208 300_4R208 300_4
R212 300_4R212 300_4
2
U43D
U43D
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
AF4
SIC
AF5
SID
P6
HT_REF1
R6
HT_REF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_H
Y9
VDDIO_FB_L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
E9
TEST25_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
TEST5
W8
TEST4
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
+1.8VSUS
IF no use which Net
need pull-up or down
THERMTRIP_L
PROCHOT_L
CPU_PRESENT_L
DBREQ_L
TEST29_H
TEST29_L
TEST28_H
TEST28_L
MISC
MISC
AMD NPT S1 SOCKET
Processor Socket
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.
VID5
VID4
VID3
VID2
VID1
VID0
PSI_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST27
TEST26
TEST10
TEST8
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
TDO
H_PROCHOT#
AC7
A5
C6
A6
A4
C5
B5
CPU_PRESENT#
AC6
A3
E10
AE9
CPU_TEST29_H_FBCLKOUT_P
C9
CPU_TEST29_L_FBCLKOUT_N
C8
AE7
AD7
AE8
AB8
AF7
J7
H8
AF8
AE6
K8
C4
H16
B18
B3
C1
H6
G6
D5
R24
W18
R23
AA8
H18
H19
+1.8VSUS
R576 *220_4R576 *220_4
CPU_TRST#
CPU_TDO
H_THERMTRIP#
AF6
1
+1.8VSUS
Only VID1 need pullup to VDDIO
R215
R215
300_4
300_4
VID5 41
VID4 41
VID3 41
VID2 41
VID1 41
VID0 41
PSI_L#
T19T19
Power Status Indicator for the VDD Power Supply
regulator. This signal may be used by the
regulator to improve effeciency when the
processor is in low power states.
CPU_DBREQ#
CPU_TDO
R220 80.6F_4R220 80.6F_4
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
CPU_TEST24_SCANCLK1
CPU_TEST23_TSTUPD
CPU_TEST22_SCANSHIFTEN
CPU_TEST21_SCANEN
CPU_TEST20_SCANCLK2
CPU_TEST28_H_PLLCHRZ_P
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST27_SINGLECHAIN
CPU_TEST26_BURNIN#
CPU_TEST10_ANALOGOUT
CPU_TEST08_DIG_T
CPU_MA_RESET#
CPU_MB_RESET#
CPU_RSVD_VIDSTRB1
CPU_RSVD_VIDSTRB0
CPU_RSVD_VDDNB_FB_P
CPU_RSVD_VDDNB_FB_N
CPU_RSVD_CORE_TYPE
R575 *220_4R575 *220_4
R211 *220_4R211 *220_4
R578 *220_4R578 *220_4
R296 *220_4R296 *220_4
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
HDT CONNECTOR
LDT_RST#
T137T137
T54T54
T55T55
T52T52
T20T20
T25T25
T26T26
T18T18
T29T29
T40T40
T45T45
T24T24
T28T28
T30T30
T136T136
T65T65
T133T133
T135T135
T134T134
T105T105
PUT CLOSE ON LAYOUT
A A
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ATHLON64 CTRL & DEBUG
ATHLON64 CTRL & DEBUG
ATHLON64 CTRL & DEBUG
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
546Thursday, June 08, 2006
546Thursday, June 08, 2006
546Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
5
D D
VCC_CORE VCC_CORE
C C
B B
U43E
U43E
AC4
VDD1
AD2
VDD2
G4
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8
K10
VDD9
K12
VDD10
K14
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
L11
VDD15
L13
VDD16
M2
VDD17
M6
VDD18
M8
VDD19
M10
VDD20
N7
VDD21
N9
VDD22
N11
VDD23
P8
VDD24
P10
VDD25
R4
VDD26
R7
VDD27
R9
VDD28
R11
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
T10
VDD33
T12
VDD34
T14
VDD35
U7
VDD36
U9
VDD37
U11
VDD38
U13
VDD39
V6
VDD40
V8
VDD41
V10
VDD42
Athlon 64 S1
Processor Socket
POWER
POWER
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
+1.8VSUS
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
4
U43F
U43F
AA11
AA13
AA15
AA17
AA19
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
AA4
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
AD6
VSS18
AD8
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
GROUND
GROUND
Athlon 64 S1
Processor Socket
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
3
2
1
BOTTOMSIDE DECOUPLING
VCC_CORE
C467
VCC_CORE
+1.8VSUS
C467
C430
C430
22U/10V_8
22U/10V_8
22U/10V_8
22U/10V_8
C425
C425
C444
C444
.22U/6V_4
.22U/6V_4
.22U/6V_4
.22U/6V_4
Under the CPU socket
C446
C446
C449
C449
22U/10V_8
22U/10V_8
22U/10V_8
22U/10V_8
C483
C483
22U/10V_8
22U/10V_8
C454
C454
*.01U_4
*.01U_4
C437
C437
.22U/6V_4
.22U/6V_4
C480
C480
22U/10V_8
22U/10V_8
C443
C443
180P_4
180P_4
C463
C463
.22U/6V_4
.22U/6V_4
C489
C489
22U/10V_8
22U/10V_8
C492
C492
22U/10V_8
22U/10V_8
C459
C459
22U/10V_8
22U/10V_8
C471
C471
22U/10V_8
22U/10V_8
C431
C431
22U/10V_8
22U/10V_8
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
C404
C404
4.7U/6.3V_6
4.7U/6.3V_6
+1.8VSUS
C410
C410
4.7U/6.3V_6
4.7U/6.3V_6
C376
C376
4.7U/6.3V_6
4.7U/6.3V_6
C415
C415
4.7U/6.3V_6
4.7U/6.3V_6
C460
C460
.22U/6V_4
.22U/6V_4
C407
C407
.22U/6V_4
.22U/6V_4
C455
C455
.22U/6V_4
.22U/6V_4
C456
C456
.22U/6V_4
.22U/6V_4
C384
C384
.01U_4
.01U_4
C466
C466
.01U_4
.01U_4
Along the DDIO/VSS plane split
C862
C862
C844
C844
C393
C393
10P_4
10P_4
180P_4
180P_4
180P_4
180P_4
A1
A A
A26
PROCESSOR POWER AND GROUND
Athlon 64 S1g1
uPGA638
Top View
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
AF1
5
4
3
2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
ATHLON64 PWR & GND
ATHLON64 PWR & GND
ATHLON64 PWR & GND
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
646Thursday, June 08, 2006
646Thursday, June 08, 2006
646Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
A
+1.8VSUS
M_A_A[0..15]4,8
4 4
M_A_BS#04,8
M_A_BS#14,8
M_A_BS#24,8
M_A_DM[0..7]4
3 3
M_A_DQS[0..7]4
M_A_DQS#[0..7]4
M_CLKOUT04
M_CLKOUT0#4
M_CLKOUT14
M_CLKOUT1#4
M_CLKOUT0
C349
C349
1.5P_4
1.5P_4
M_CLKOUT0#
2 2
M_CLKOUT1
C506
C506
1.5P_4
1.5P_4
M_CLKOUT1#
SMBDT2
SMBCK2
+3V
C300 .1U_4C300 .1U_4
+1.8VSUS
1 1
M_A_RAS#4,8
M_A_CAS#4,8
M_A_WE#4,8
M_A_CS#04,8
M_A_CS#14,8
SMbus address A0
C511 .1U_4C511 .1U_4
MVREF_DIM
C292
C292
2.2U/10V/X5R_8
2.2U/10V/X5R_8
1 2
C3A:change DDR conn form FOX to AMP
M_A_A0
102
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A14
M_A_A15
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_CKE04,8
M_CKE14,8
M_ODT04,8
M_ODT14,8
C304
C304
.1U_4
.1U_4
A
A0
101
A1
1
2
3
8
9
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
CN27
CN27
REVERSE
(H=5.2)
59
100
99
98
97
94
92
93
91
105
90
89
116
86
84
107
106
85
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
30
32
164
166
79
80
108
113
109
110
115
114
119
198
200
195
197
199
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
117
103
111
104
112
VDD8
VDD7
VDD9
VDD10
SO-DIMM
SO-DIMM
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
127
122
121
118
DQ0
DQ1
DQ2
VDD11
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
132
128
DDRII_SODIMM_R
DDRII_SODIMM_R
B
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
50
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
B
M_A_DQ1
M_A_DQ5
M_A_DQ2
M_A_DQ3
M_A_DQ0
M_A_DQ4
M_A_DQ7
M_A_DQ6
M_A_DQ12
M_A_DQ8
M_A_DQ10
M_A_DQ14
M_A_DQ13
M_A_DQ9
M_A_DQ15
M_A_DQ11
M_A_DQ21
M_A_DQ17
M_A_DQ23
M_A_DQ18
M_A_DQ20
M_A_DQ19
M_A_DQ22
M_A_DQ16
M_A_DQ29
M_A_DQ28
M_A_DQ31
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ27
M_A_DQ30
M_A_DQ32
M_A_DQ36
M_A_DQ37
M_A_DQ35
M_A_DQ33
M_A_DQ38
M_A_DQ34
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ46
M_A_DQ44
M_A_DQ45
M_A_DQ43
M_A_DQ47
M_A_DQ55
M_A_DQ54
M_A_DQ50
M_A_DQ51
M_A_DQ53
M_A_DQ48
M_A_DQ49
M_A_DQ52
M_A_DQ56
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
M_A_DQ61
M_A_DQ63
M_A_DQ62
C
M_B_A[0..15]4,8
M_A_DQ[0..63] 4
M_B_BS#04,8
M_B_BS#14,8
M_B_BS#24,8
M_B_DM[0..7]4
M_B_DQS[0..7]4
M_B_DQS#[0..7]4
M_CLKOUT34
M_CLKOUT3#4
M_CLKOUT44
M_CLKOUT4#4
M_CLKOUT3
C334
C334
1.5P_4
1.5P_4
M_CLKOUT3#
M_CLKOUT4
C507
C507
1.5P_4
1.5P_4
M_CLKOUT4#
M_A_CS#2 4,8
M_A_CS#3 4,8
C295 .1U_4C295 .1U_4
+1.8VSUS
MVREF_DIM
C312
C312
1U/10V_4
1U/10V_4
1.This part should not contain any substances which are specified in SS-00259-1
2.Purchase ink, paint, wire rods and molding resins only from the business partners that Sony approves as Green Partners.
+0.9V_REF
R186
R186
+1.8VSUS
*0_4
*0_4
+3V
SMbus address A4
+3V
R179
R179
1K/F_4
1K/F_4
R189
R189
1K/F_4
1K/F_4
M_CKE24,8
M_CKE34,8
M_B_RAS#4,8
M_B_CAS#4,8
M_B_WE#4,8
M_B_CS#04,8
M_B_CS#14,8
M_ODT24,8
M_ODT34,8
R289 0_4R289 0_4
R290 10K_4R290 10K_4
C510 .1U_4C510 .1U_4
C291
C291
2.2U/10V/X5R_8
2.2U/10V/X5R_8
1 2
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_CLKOUT3
M_CLKOUT3#
M_CLKOUT4
M_CLKOUT4#
SMBDT
SMBCK
MVREF_DIM
C299
C299
.1U_4
.1U_4
C
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15M_A_A13
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14
84
A15
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
+1.8VSUS
103
111
104
112
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
CN26
CN26
VDD7
VDD8
VDD9
REVERSE
SO-DIMM
SO-DIMM
(H=9.2)
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
59
122
121
117
118
VDD10
VDD11
NC/TEST
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
132
128
127
DDRII_SODIMM_R
DDRII_SODIMM_R
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
D
M_B_DQ4
5
M_B_DQ1
7
M_B_DQ2
17
M_B_DQ3
19
M_B_DQ5
4
M_B_DQ0
6
M_B_DQ6
14
M_B_DQ7
16
M_B_DQ8
23
M_B_DQ9
25
M_B_DQ10
35
M_B_DQ15
37
M_B_DQ12
20
M_B_DQ13
22
M_B_DQ14
36
M_B_DQ11
38
M_B_DQ16
43
M_B_DQ21
45
M_B_DQ19
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ17
46
M_B_DQ18
56
M_B_DQ22
58
M_B_DQ29
61
M_B_DQ28
63
M_B_DQ26
73
M_B_DQ27
75
M_B_DQ24
62
M_B_DQ25
64
M_B_DQ30
74
M_B_DQ31
76
M_B_DQ32
123
M_B_DQ36
125
M_B_DQ39
135
M_B_DQ35
137
M_B_DQ33
124
M_B_DQ37
126
M_B_DQ34
134
M_B_DQ38
136
M_B_DQ40
141
M_B_DQ41
143
M_B_DQ46
151
M_B_DQ43
153
M_B_DQ44
140
M_B_DQ45
142
M_B_DQ47
152
M_B_DQ42
154
M_B_DQ53
157
M_B_DQ49
159
M_B_DQ51
173
M_B_DQ50
175
M_B_DQ48
158
M_B_DQ52
160
M_B_DQ54
174
M_B_DQ55
176
M_B_DQ60
179
M_B_DQ57
181
M_B_DQ62
189
M_B_DQ59
191
M_B_DQ61
180
M_B_DQ56
182
M_B_DQ63
192
M_B_DQ58
194
50
69
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
D
M_B_DQ[0..63] 4
M_B_CS#2 4,8
M_B_CS#3 4,8
E
15
+1.8VSUS
*10U/6.3V/X5R_8C441 *10U/6.3V/X5R_8C441
*10U/6.3V/X5R_8C435 *10U/6.3V/X5R_8C435
10U/10V/X5R_8C440 10U/10V/X5R_8C440
10U/10V/X5R_8C439 10U/10V/X5R_8C439
.1U_4C371 .1U_4C371
.1U_4C353 .1U_4C353
.1U_4C361 .1U_4C361
.1U_4C403 .1U_4C403
.1U_4C392 .1U_4C392
.1U_4C356 .1U_4C356
.1U_4C372 .1U_4C372
.1U_4C358 .1U_4C358
.1U_4C386 .1U_4C386
.1U_4C359 .1U_4C359
.1U_4C382 .1U_4C382
.1U_4C429 .1U_4C429
.1U_4C409 .1U_4C409
.1U_4C398 .1U_4C398
.1U_4C427 .1U_4C427
.1U_4C417 .1U_4C417
.1U_4C390 .1U_4C390
.1U_4C397 .1U_4C397
.1U_4C402 .1U_4C402
.1U_4C436 .1U_4C436
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR-II SODIMM*2
DDR-II SODIMM*2
DDR-II SODIMM*2
Date: Sheet of
Date: Sheet
Date: Sheet
E
of
of
746Thursday, June 08, 2006
746Thursday, June 08, 2006
746Thursday, June 08, 2006
1A
1A
1A
1
2
3
4
5
6
7
8
A1A:Change RTT termination from 56 to 47 ohm
+0.9V_VTER
M_CKE04,7
M_CKE14,7
M_CKE24,7
A A
VTT is decoupled to VDDIO,VTT is decoupled to VSS
+0.9V_VTER
*10U/6.3V/X5R_8C391 *10U/6.3V/X5R_8C391
*10U/6.3V/X5R_8C337 *10U/6.3V/X5R_8C337
.1U_4C342 .1U_4C342
.1U_4C401 .1U_4C401
.1U_4C421 .1U_4C421
.1U_4C413 .1U_4C413
.1U_4C412 .1U_4C412
.1U_4C341 .1U_4C341
.1U_4C346 .1U_4C346
.1U_4C385 .1U_4C385
B B
C C
decoupling capacitors from VTT (+0.9V_VTER) to VDDIO (+1.8VSUS). Which
is (1) decoupling capacitor for every (4) signals terminated to VTT
D D
.1U_4C340 .1U_4C340
.1U_4C418 .1U_4C418
.1U_4C387 .1U_4C387
.1U_4C419 .1U_4C419
.1U_4C422 .1U_4C422
.1U_4C426 .1U_4C426
.1U_4C423 .1U_4C423
.1U_4C408 .1U_4C408
.1U_4C375 .1U_4C375
.1U_4C424 .1U_4C424
.1U_4C389 .1U_4C389
.1U_4C343 .1U_4C343
.1U_4C357 .1U_4C357
.1U_4C406 .1U_4C406
.1U_4C394 .1U_4C394
.1U_4C405 .1U_4C405
.1U_4C388 .1U_4C388
.1U_4C420 .1U_4C420
+1.8VSUS
M_A_A[0..15]4,7
M_B_A[0..15]4,7
M_CKE34,7
M_ODT04,7
M_ODT14,7
M_ODT24,7
M_ODT34,7
M_A_BS#04,7
M_A_BS#14,7
M_A_BS#24,7
M_A_WE#4,7
M_A_CAS#4,7
M_A_RAS#4,7
M_B_BS#04,7
M_B_BS#14,7
M_B_BS#24,7
M_B_WE#4,7
M_B_CAS#4,7
M_B_RAS#4,7
M_A_CS#04,7
M_A_CS#14,7
M_A_CS#24,7
M_A_CS#34,7
M_B_CS#04,7
M_B_CS#14,7
M_B_CS#24,7
M_B_CS#34,7
M_A_A13
M_A_A10
M_A_A0
M_A_A2
M_A_A4
M_A_A6
M_A_A7
M_A_A11
M_A_A12
M_A_A9
M_A_A3
M_A_A1
M_A_A8
M_A_A5
M_A_A14
M_A_A15
M_B_A0
M_B_A2
M_B_A4
M_B_A6
M_B_A7
M_B_A11
M_B_A3
M_B_A1
M_B_A8
M_B_A5
M_B_A12
M_B_A9
M_B_A10
M_B_A13
M_B_A14
M_B_A15
M_A_BS#0
M_A_BS#1
M_A_BS#2
M_A_WE#
M_A_CAS#
M_A_RAS#
M_B_BS#0
M_B_BS#1
M_B_BS#2
M_B_WE#
M_B_CAS#
M_B_RAS#
R216 47_4R216 47_4
R219 47_4R219 47_4
R218 47_4R218 47_4
R217 47_4R217 47_4
R255 47_4R255 47_4
R270 47_4R270 47_4
R257 47_4R257 47_4
R264 47_4R264 47_4
R251 47_4R251 47_4
R239 47_4R239 47_4
R223 47_4R223 47_4
R256 47_4R256 47_4
R262 47_4R262 47_4
R236 47_4R236 47_4
R249 47_4R249 47_4
R240 47_4R240 47_4
R224 47_4R224 47_4
R260 47_4R260 47_4
R254 47_4R254 47_4
R253 47_4R253 47_4
R261 47_4R261 47_4
R266 47_4R266 47_4
R221 47_4R221 47_4
R265 47_4R265 47_4
R263 47_4R263 47_4
R269 47_4R269 47_4
R222 47_4R222 47_4
R267 47_4R267 47_4
R250 47_4R250 47_4
R226 47_4R226 47_4
RP16 0404-47X2RP16 0404-47X2
1 2
3 4
RP12 0404-47X2RP12 0404-47X2
1 2
3 4
RP8 0404-47X2RP8 0404-47X2
1 2
3 4
RP9 0404-47X2RP9 0404-47X2
1 2
3 4
RP19 0404-47X2RP19 0404-47X2
1 2
3 4
RP14 0404-47X2RP14 0404-47X2
1 2
3 4
RP6 0404-47X2RP6 0404-47X2
1 2
3 4
RP18 0404-47X2RP18 0404-47X2
1 2
3 4
RP15 0404-47X2RP15 0404-47X2
1 2
3 4
RP11 0404-47X2RP11 0404-47X2
1 2
3 4
RP17 0404-47X2RP17 0404-47X2
1 2
3 4
RP13 0404-47X2RP13 0404-47X2
1 2
3 4
RP10 0404-47X2RP10 0404-47X2
1 2
3 4
R238 47_4R238 47_4
R271 47_4R271 47_4
RP7 0404-47X2RP7 0404-47X2
1 2
3 4
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
DDR-II TERMINATION
DDR-II TERMINATION
DDR-II TERMINATION
Date: Sheet
Date: Sheet
1
2
3
4
5
6
Date: Sheet
7
of
of
of
846Thursday, June 08, 2006
846Thursday, June 08, 2006
846Thursday, June 08, 2006
8
1A
1A
1A
5
D D
U44A
U44A
R19
W19
W20
AC21
AB22
AB20
AA20
AA19
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
W21
W22
W25
R18
R21
R22
U22
U21
U18
U19
Y19
T24
R25
U25
U24
V23
U23
V24
V25
Y24
P24
P25
A24
C24
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
RX485 A12 HT
RX485 A12 HT
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_CADOUT15_P3
HT_CADOUT15_N3
HT_CADOUT14_P3
HT_CADOUT14_N3
HT_CADOUT13_P3
HT_CADOUT13_N3
HT_CADOUT12_P3
HT_CADOUT12_N3
HT_CADOUT11_P3
HT_CADOUT11_N3
HT_CADOUT10_P3
HT_CADOUT10_N3
HT_CADOUT9_P3
HT_CADOUT9_N3
HT_CADOUT8_P3
HT_CADOUT8_N3
HT_CADOUT7_P3
C C
VDDHT_PKG
B B
HT_CADOUT7_N3
HT_CADOUT6_P3
HT_CADOUT6_N3
HT_CADOUT5_P3
HT_CADOUT5_N3
HT_CADOUT4_P3
HT_CADOUT4_N3
HT_CADOUT3_P3
HT_CADOUT3_N3
HT_CADOUT2_P3
HT_CADOUT2_N3
HT_CADOUT1_P3
HT_CADOUT1_N3
HT_CADOUT0_P3
HT_CADOUT0_N3
HT_CLKOUT1_P3
HT_CLKOUT1_N3
HT_CLKOUT0_P3
HT_CLKOUT0_N3
HT_CTLOUT0_P3
HT_CTLOUT0_N3
R570 49.9/F_4R570 49.9/F_4
R571
R571
49.9/F_4
49.9/F_4
HT_RXCALP
HT_RXCALN
4
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
HT_TXCALP
HT_TXCALN
HT_CADIN15_P 3
HT_CADIN15_N 3
HT_CADIN14_P 3
HT_CADIN14_N 3
HT_CADIN13_P 3
HT_CADIN13_N 3
HT_CADIN12_P 3
HT_CADIN12_N 3
HT_CADIN11_P 3
HT_CADIN11_N 3
HT_CADIN10_P 3
HT_CADIN10_N 3
HT_CADIN9_P 3
HT_CADIN9_N 3
HT_CADIN8_P 3
HT_CADIN8_N 3
HT_CADIN7_P 3
HT_CADIN7_N 3
HT_CADIN6_P 3
HT_CADIN6_N 3
HT_CADIN5_P 3
HT_CADIN5_N 3
HT_CADIN4_P 3
HT_CADIN4_N 3
HT_CADIN3_P 3
HT_CADIN3_N 3
HT_CADIN2_P 3
HT_CADIN2_N 3
HT_CADIN1_P 3
HT_CADIN1_N 3
HT_CADIN0_P 3
HT_CADIN0_N 3
HT_CLKIN1_P 3
HT_CLKIN1_N 3
HT_CLKIN0_P 3
HT_CLKIN0_N 3
HT_CTLIN0_P 3
HT_CTLIN0_N 3
R258 100/F_4R258 100/F_4
3
2
1
A A
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS485-HT LINK0 I/F
RS485-HT LINK0 I/F
RS485-HT LINK0 I/F
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
946Thursday, June 08, 2006
946Thursday, June 08, 2006
946Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
Stiching capacitor
VA
C146
C146
.1U_4
.1U_4
+3V
VA
C159
C159
.1U_4
.1U_4
C134
C134
.1U_4
.1U_4
5
+1.8V
C206
C206
.1U_4
.1U_4
VIN
C147
C147
.1U_4
.1U_4
VIN
C959
C959
.1U_4
.1U_4
+3V
C311
C311
.1U_4
.1U_4
VIN
C322
C322
.1U_4
.1U_4
+1.8V
C822
C822
.1U_4
.1U_4
4
VCC_CORE
C360
C360
.1U_4
.1U_4
3
2
1
VIN +1.8V
D D
VCC_NB
C461
C461
.1U_4
.1U_4
VCC_CORE
+5V
C1039
C1039
.1U_4
.1U_4
+3V
+1.2V_VPCIE
C C
C784
C784
.1U_4
.1U_4
+1.1V_VGA
+1.8VSUS
C907
C907
.1U_4
.1U_4
+3VPCU
B B
+3V
VCC_CORE
+5V
C921
C921
.1U_4
.1U_4
+3V
+1.2V_VPCIE
+3V
+3V
+3VPCU
C494
C494
.1U_4
.1U_4
C103
C103
.1U_4
.1U_4
C554
C554
.1U_4
.1U_4
VIN
+5V
+3V
+1.8VSUS
VCC_CORE
C26
C26
.1U_4
.1U_4
+5V
+1.1V_VGA
+3V
+3VPCU
VIN
C505
C505
.1U_4
.1U_4
+5V
+3V
+1.2V_VPCIE
C60
C60
.1U_4
.1U_4
C526
C526
.1U_4
.1U_4
+1.8VSUS
+3V
C662
C662
.1U_4
.1U_4
+1.8V
+3V
VDDQ_3V
+1.8V
C908
C908
.1U_4
.1U_4
+5V
+3V
C843
C843
.1U_4
.1U_4
C637
C637
.1U_4
.1U_4
C751
C751
.1U_4
.1U_4
+1.8VSUS
VIN
+3V
+1.2V
+3V
VDDQ_3V
+3V
+3V
+5V
+5V
C289
C289
.1U_4
.1U_4
+3V
VIN
C333
C333
.1U_4
.1U_4
C612
C612
.1U_4
.1U_4
C70
C70
.1U_4
.1U_4
+3V
+3V
+3V
C842
C842
.1U_4
.1U_4
VIN
C514
C514
.1U_4
.1U_4
VCC_CORE
C47
C47
.1U_4
.1U_4
+3V
+3V
VIN
+3V
VCC_CORE
VIN
C400
C400
.1U_4
.1U_4
C895
C895
.1U_4
.1U_4
C919
C919
.1U_4
.1U_4
+5V
VIN
+5V
VIN
+3V
VCC_CORE
+1.2V
C1044
C1044
.1U_4
.1U_4
C518
C518
.1U_4
.1U_4
C906
C906
.1U_4
.1U_4
+5V
VIN
+1.2V
+1.8VSUS
C468
C468
.1U_4
.1U_4
+0.9V_VTER
C553
C553
.1U_4
.1U_4
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
EZ4
EZ4
New card
WLAN
R214:
R213:
PEG_RXN[15:0] 18
PEG_RXP[15:0] 18
PCIE_RXP032
PCIE_RXN032
PCIE_RXP132
PCIE_RXN132
PCIE_RXP233
PCIE_RXN233
PCIE_RXP329
PCIE_RXN329
A_RX0P14
A_RX0N14
A_RX1P14
A_RX1N14
10KOhm FOR RS485
1.47KOhm FOR
RS690
8.25KOhm FOR RS485
DNI FOR RS690
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
R278 10K_4R278 10K_4
R281 8.25K/F_6R281 8.25K/F_6
U44B
U44B
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
W11
GPP_RX0P
W12
GPP_RX0N
AA11
GPP_RX1P
AB11
GPP_RX1N
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
AA14
PCE_ISET(PCE_CALI)
AB14
PCE_TXISET(NC)
RX485 A12 HT
RX485 A12 HT
PART 2 OF 5
PART 2 OF 5
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
C_PEG_TXP0
J1
GFX_TX0P
H2
GFX_TX0N
K2
GFX_TX1P
K1
GFX_TX1N
K3
GFX_TX2P
L3
GFX_TX2N
L1
GFX_TX3P
L2
GFX_TX3N
N2
GFX_TX4P
N1
GFX_TX4N
P2
GFX_TX5P
P1
GFX_TX5N
P3
GFX_TX6P
R3
GFX_TX6N
R1
GFX_TX7P
R2
GFX_TX7N
T2
GFX_TX8P
U1
GFX_TX8N
V2
GFX_TX9P
V1
GFX_TX9N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
AD8
AE8
AD7
AE7
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD11
AE11
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
150 Ohm FOR RS485
562 Ohm FOR RS690
Ward update to 100 Ohm FOR RS485
2KOhm FOR RS690
C866 .1U-10V_4C866 .1U-10V_4
C_PEG_TXN0
C863 .1U-10V_4C863 .1U-10V_4
C_PEG_TXP1
C865 .1U-10V_4C865 .1U-10V_4
C_PEG_TXN1
C864 .1U-10V_4C864 .1U-10V_4
C_PEG_TXP2
C867 .1U-10V_4C867 .1U-10V_4
C_PEG_TXN2
C869 .1U-10V_4C869 .1U-10V_4
C_PEG_TXP3
C870 .1U-10V_4C870 .1U-10V_4
C_PEG_TXN3
C868 .1U-10V_4C868 .1U-10V_4
C_PEG_TXP4
C871 .1U-10V_4C871 .1U-10V_4
C_PEG_TXN4
C873 .1U-10V_4C873 .1U-10V_4
C_PEG_TXP5
C874 .1U-10V_4C874 .1U-10V_4
C_PEG_TXN5
C872 .1U-10V_4C872 .1U-10V_4
C_PEG_TXP6
C875 .1U-10V_4C875 .1U-10V_4
C_PEG_TXN6
C877 .1U-10V_4C877 .1U-10V_4
C_PEG_TXP7
C878 .1U-10V_4C878 .1U-10V_4
C_PEG_TXN7
C876 .1U-10V_4C876 .1U-10V_4
C_PEG_TXP8
C879 .1U-10V_4C879 .1U-10V_4
C_PEG_TXN8
C881 .1U-10V_4C881 .1U-10V_4
C_PEG_TXP9
C882 .1U-10V_4C882 .1U-10V_4
C_PEG_TXN9
C880 .1U-10V_4C880 .1U-10V_4
C_PEG_TXP10
C_PEG_TXN10
C_PEG_TXP11
C_PEG_TXN11
C_PEG_TXP12
C_PEG_TXN12
C_PEG_TXP13
C_PEG_TXN13
C_PEG_TXP14
C_PEG_TXN14
C_PEG_TXP15
C_PEG_TXN15
R280 100/F_4R280 100/F_4
C883 .1U-10V_4C883 .1U-10V_4
C885 .1U-10V_4C885 .1U-10V_4
C886 .1U-10V_4C886 .1U-10V_4
C884 .1U-10V_4C884 .1U-10V_4
C887 .1U-10V_4C887 .1U-10V_4
C889 .1U-10V_4C889 .1U-10V_4
C890 .1U-10V_4C890 .1U-10V_4
C888 .1U-10V_4C888 .1U-10V_4
C891 .1U-10V_4C891 .1U-10V_4
C893 .1U-10V_4C893 .1U-10V_4
C894 .1U-10V_4C894 .1U-10V_4
C892 .1U-10V_4C892 .1U-10V_4
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1P_C
GPP_TX1N_C
GPP_TX2P_C
GPP_TX2N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
R572 150/F_4R572 150/F_4
C497 .1U_4C497 .1U_4
C491 .1U_4C491 .1U_4
C474 .1U_4C474 .1U_4
C479 .1U_4C479 .1U_4
C902 .1U_4C902 .1U_4
C901 .1U_4C901 .1U_4
C477 .1U_4C477 .1U_4
C476 .1U_4C476 .1U_4
C898 .1U_4C898 .1U_4
C897 .1U_4C897 .1U_4
C900 .1U_4C900 .1U_4
C899 .1U_4C899 .1U_4
VDDA12_PKG2
R216:
R215:
PEG_TXP0
PEG_TXN0
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
PCIE_TXP0 32
PCIE_TXN0 32
PCIE_TXP1 32
PCIE_TXN1 32
PCIE_TXP2 33
PCIE_TXN2 33
PCIE_TXP3 29
PCIE_TXN3 29
A_TX0P 14
A_TX0N 14
A_TX1P 14
A_TX1N 14
EZ4
EZ4
New card
WLAN
C3A:change footprint form c0402-c to c0402
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
A A
5
4
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
3
PEG_TXN[15:0] 18
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
2
PEG_TXP[15:0] 18
Place these caps
close to connector
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS485-PCIE LINK I/F
RS485-PCIE LINK I/F
RS485-PCIE LINK I/F
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
10 46Thursday, June 08, 2006
10 46Thursday, June 08, 2006
10 46Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
5
4
3
2
1
+1.8V PLLVDD
L96
L96
BK1608HS600_6
BK1608HS600_6
D D
C C
B B
for RX485, all power rails should be connected,
but ferrite bead and decoupling caps are not necessary
+1.8V
L39
L39
BK1608HS600_6
BK1608HS600_6
LDT_STOP#5,14,15
+3V
R247 2K/F_4R247 2K/F_4
R246 10K_4R246 10K_4
HTPVDD
C861
C861
10U/10V/X5R_8
10U/10V/X5R_8
+1.8V +3V
1 3
Q15
Q15
MMBT3904
MMBT3904
STRP_DATA
TV_SWITCH
C851
C851
*10U/10V/X5R_8
*10U/10V/X5R_8
R259
R259
10K_4
10K_4
2
C857
C857
*4.7U/6.3V_6
*4.7U/6.3V_6
C399
C399
4.7U/6.3V_6
4.7U/6.3V_6
R248
R248
1K/F_4
1K/F_4
LDT_STOP#_NB LDT_STOP#_NB
LOAD_ROM#: LOAD ROM STRAP ENABLE
L95
L95
BK1608HS600_6
BK1608HS600_6
High, LOAD ROM STRAP DISABLE
Low, LOAD ROM STRAP ENABLE
AVDDQ+1.8V
C848
C848
*10U/10V/X5R_8
*10U/10V/X5R_8
R568 0_6R568 0_6
GND_AVSSQ
C859
C859
*10P_4
*10P_4
C854
C854
*10P_4
*10P_4
C396
C396
*10P_4
*10P_4
1 2
R567
R567
*22_4
*22_4
R566
R566
*22_4
*22_4
R252
R252
*22_4
*22_4
PCI-E graphic clock
A-Link clock
C856
C856
*2.2U/10V/X5R_8
*2.2U/10V/X5R_8
NB_OSC
SB_OSCIN
HTREFCLK
NBSRC_CLKP2
NBSRC_CLKN2
SBLINK_CLKP2
SBLINK_CLKN2
BMREQ#14
+3V
L38
L38
BK1608HS600_6
BK1608HS600_6
ALINK_RST#14,18,29,32,33,34,38,39
NB_PWRGD5,39
R242 3K_4R242 3K_4
AVDD_NB
C374
C374
*4.7U/6.3V_6
*4.7U/6.3V_6
GND_AVSSQ
66MHz
NB_OSC2
SB_OSCIN2,15
D11 RB751D11 RB751
2 1
R234 0_4R234 0_4
LOAD_ROM#
+1.8V AVDD1
R565 0_6R565 0_6
C381
C381
*.1U_4
*.1U_4
AVDD_NB
C860
C860
.1U_4
.1U_4
AVDD1
AVDDQ
Do not stuff for RX485
PLLVDD
HTPVDD
R235 0_4R235 0_4
ALLOW_LDTSTOP14
R245
R245
4.7K/F_4
4.7K/F_4
R268 10K_4R268 10K_4
HTREFCLK2
R569 *22_4R569 *22_4
A1A:Add SB_OSCIN
R232 *2.7K_4R232 *2.7K_4
R243 *2.7K_4R243 *2.7K_4
R231 *2.7K_4R231 *2.7K_4
R244 *2.7K_4R244 *2.7K_4
R233 *2.7K_4R233 *2.7K_4
T116T116
T115T115
T61T61
T62T62
T111T111
T33T33
C850
C850
*2.2U/10V/X5R_8
*2.2U/10V/X5R_8
1 2
20 mil
20 mil
20 mil
R241 *715/F_6R241 *715/F_6
20 mil
20 mil
NB_RST#
TV_SWITCH
OSCOUT
DFT_GPIO0
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
PHL_CLK
PHL_DATA
STRP_DATA
U44C
U44C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C_R
C20
Y_G
D19
COMP_B
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD(PLLVDD18)
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQb
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
TESTMODE
A3
STRP_DATA
RX485 A12 HT
RX485 A12 HT
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
LVDS
LVDS
PLL PWR
PLL PWR
PM
PM
CLOCKs
CLOCKs
DVO_D0(GPP_TX4P)
DVO_D1(GPP_TX4N)
DVO_D3(GPP_RX4P)
DVO_D4(GPP_RX4N)
DVO_D7(GPP_TX5N)
DVO_D8(GPP_TX5P)
DVO_D9(GPP_RX5N)
DVO
DVO
MIS.
MIS.
DVO_D10(GPP_RX5P)
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LPVDD
LPVSS
LVDDR18D_1
LVDDR18D_2
LVDDR18A_1
LVDDR18A_2
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVSSR12
LVSSR13
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_D2(NC)
DVO_D5(NC)
DVO_D6(NC)
DVO_D11(NC)
DVO_VSYNC(NC)
DVO_DE(NC)
DVO_HSYNC(NC)
DVO_IDCKP(NC)
DVO_IDCKN(NC)
B14
B15
B13
A13
H14
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
E15
D15
H15
G15
D14
E14
A12
B12
C12
C13
A16
A14
D12
C19
C15
C16
F14
F15
E12
G12
F12
AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
AD13
AC13
AE13
AE17
AD17
for RX485, all power rails should be connected,
but ferrite bead and decoupling caps are not necessary
T36T36
T37T37
T114T114
T110T110
T35T35
T108T108
T34T34
T113T113
T112T112
T109T109
T38T38
20 mil
T41T41
LPVDD
C365
C365
C368
C368
*4.7U/6.3V_6
*4.7U/6.3V_6
*.1U_4
*.1U_4
LVDDR18D
T39T39
GND_LPVSS
LVDDR18A
C373
C373
C383
C383
*4.7U/6.3V_6
*4.7U/6.3V_6
*.1U_4
*.1U_4
T119T119
T132T132
T117T117
T131T131
T126T126
T123T123
T124T124
T129T129
Do not stuff for RX485
T121T121
T128T128
T122T122
T127T127
T118T118
T63T63
T120T120
T125T125
T130T130
R225 0_6R225 0_6
RS485: LVDDR18A=1.8V
L32 BK1608HS600_6L32 BK1608HS600_6
+1.8V
L34
L34
BK1608HS600_6
BK1608HS600_6
C369
C369
*.1U_4
*.1U_4
R227 0_6R227 0_6
+1.8V
C366
C366
*4.7U/6.3V_6
*4.7U/6.3V_6
GND_LVSSR
GND_LPVSS
L33
L33
BK1608HS600_6
BK1608HS600_6
2
RS690
PLLVDD12
GPP_TX4P
GPP_TX4N
GPP_RX4P
GPP_RX4NDVO_D4(AE16)
GPP_TX5N
GPP_TX5P
GPP_RX5N
GPP_RX5P
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS485-SYSTEM I/F & CLKGEN
RS485-SYSTEM I/F & CLKGEN
RS485-SYSTEM I/F & CLKGEN
Date: Sheet
Date: Sheet
Date: Sheet
Quanta Computer Inc.
11 46Thursday, June 08, 2006
11 46Thursday, June 08, 2006
11 46Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
RS485
OSCOUT(A11)
A A
DVO_D0(AD14)
DVO_D1(AD15) DVO_D1
DVO_D3(AD16)
DVO_D7(AE19)
DVO_D8(AD19)
DVO_D9(AE20)
DVO_D10(AD20)
5
4
3
OSCOUT
DVO_D0
DVO_D3
DVO_D4
DVO_D7
DVO_D8
DVO_D9
DVO_D10
5
V12
M3
VSSA2
D D
SUGGEST REMOVE L11 BEAD SAME AS CPU
VSSA1
PAR 5 OF 5
PAR 5 OF 5
V11
VSSA3
V14
VSSA4
4
AE6
AE10
V15
G3
VSSA5F3VSSA6
VSSA7A1VSSA8H1VSSA9
VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25U2VSSA26T3VSSA27U3VSSA28U6VSSA30Y1VSSA32W6VSSA33
VSSA14
VSSA12
P9
VSSA23
AC2
Y15
AC4
VSSA31
VSSA29
GROUND
GROUND
Y11
VSSA34Y3VSSA35Y9VSSA36
VSSA37R9VSSA38
AD1
AC5
AC6
VSSA39
AC7
VSSA40
VSSA41
AD3
AC9
VSSA42
3
AC10
G6
VSSA43
VSSA44
Y12
Y14
VSSA45
VSSA46
AA3
VSSA47
VSSA48
U44E
U44E
RX485 A12 HT
RX485 A12 HT
2
1
1.2 PLAN FSB UNDER THIS PLAN
VSS1
VSS2
VSS3
VSS4E9VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS44
VSS45
VSS46C4VSS47
VSS48
VSS49
VSS50
VSS52
VSS54
VSS56
VSS57D4VSS59
VLDT_RUN
80 ohm(4A)
VSS24
J22
J12
L12
L14
L20
F11
A25
Y23
P11
D23
R24
G11
M15
AE18
L23
G23
M11
M20
M23
M25
B7
L24
P13
P20
P15
N12
N14
Y25
R12
R14
R20
U20
H25
W23
W24
AD25
VSS43
Y22
D25
R23
H12
G24
AC23
AC14
AC22
120 mil
U44D
C490
C490
C484
C484
10U/10V/X5R_8
10U/10V/X5R_8
10U/10V/X5R_8
C C
10U/10V/X5R_8
D8
2 1
SW1010CD8SW1010C
2 1
C905
C905
10U/10V/X5R_8
10U/10V/X5R_8
+3V
+1.8V VDD18
L30 TI201209G121_8L30 TI201209G121_8
A1A:Change from
2.2UF*2 to 1UF*4
RS485: VDDA18=1.8V
+1.8V VDDA18
L99 BLM18PG330SN1DL99 BLM18PG330SN1D
33 ohm(3000mA)
D9
SW1010CD9SW1010C
C470
C470
1U/10V_4
1U/10V_4
D10
D10
2 1
SW1010C
SW1010C
C362
C362
1U/6.3V_6
1U/6.3V_6
C904
C904
100U/6.3V_3528
100U/6.3V_3528
C363
C363
1U/6.3V_6
1U/6.3V_6
C481
C481
1U/10V_4
1U/10V_4
C433
C433
C472
C472
1U/10V_4
1U/10V_4
20 mil
1U/6.3V_6
1U/6.3V_6
C473
C473
1U/10V_4
1U/10V_4
C438
C438
1U/6.3V_6
1U/6.3V_6
C478
C478
1U/10V_4
1U/10V_4
C464
C464
1U/10V_4
1U/10V_4
C896
C896
1U/10V_4
1U/10V_4
C482
C482
1U/10V_4
1U/10V_4
C469
C469
1U/10V_4
1U/10V_4
20 mil
C903 1U/10V_4C903 1U/10V_4
C465 1U/10V_4C465 1U/10V_4
A1A:Add 100uF capacitor
+3V VDDR3
L40 TI201209G121_8L40 TI201209G121_8
B B
+1.8V
L41 TI201209G121_8L41 TI201209G121_8
C515
C515
*47U/10V_1206
*47U/10V_1206
C414
C414
4.7U/6.3V_6
4.7U/6.3V_6
A1A:Add 47uF capacitor
VDDA12
R230 0_6R230 0_6
RS485: 0 Ohm RESISTOR
for RX485, VDD_DVO should be
connected to +1.8V, but ferrite bead
A A
and decoupling caps are not necessary
VDDDVO
C486
C486
*1U/10V_4
*1U/10V_4
C367
C367
4.7U/6.3V_6
4.7U/6.3V_6
C493
C493
*1U/10V_4
*1U/10V_4
VDDPLL
20 mil
C499
C499
*1U/10V_4
*1U/10V_4
C416
C416
1U/10V_4
1U/10V_4
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2
VDDA12_PKG1
C452
C452
10U/10V/X5R_8
10U/10V/X5R_8
U44D
AE24
VDD_HT1
AD24
VDD_HT2
AD22
VDD_HT3
AB17
VDD_HT4
AE23
VDD_HT5
Y17
VDD_HT6
W17
VDD_HT7
AC18
VDD_HT8
AD21
VDD_HT9
AC19
VDD_HT10
AC20
VDD_HT11
AB19
VDD_HT12
AD23
VDD_HT13
AA17
VDD_HT14
AE25
VDD_HT15
J14
VDD18_1
J15
VDD18_2
AE2
VDDA18_1(VDDA12_13)
AB3
VDDA18_2(VDDA12_14)
U7
VDDA18_3(VDDA12_15)
W7
VDDA18_4(VDDA12_16)
AB4
VDDA18_5(VDDA12_17)
AC3
VDDA18_6(VDDA12_18)
AD2
VDDA18_7(VDDA12_19)
AE1
VDDA18_8(VDDA12_20)
E11
VDDR3_1
D11
VDDR3_2
AC12
VDD_DVO1(VDDR_1)
AD12
VDD_DVO2(VDDR_2)
AE12
VDD_DVO3(VDDR_3)
E7
VDDA12_13(VDDPLL_1)
F7
VDDA12_14(VDDPLL_2)
F9
VSSA49(VSSPLL_1)
G9
VSSA50(VSSPLL_2)
D22
VDDHT_PKG
M1
VDDA12_PKG1
AC11
VDDA12_PKG2
RX485 A12 HT
RX485 A12 HT
PART 4 OF 5
PART 4 OF 5
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
VDDC_1
VDDC_2
VDDC_3
POWER
POWER
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
80 mil
C411
C411
1U/10V_4
1U/10V_4
A1A:Add 1UF X 4
T23
AE22
VDDA12
C448
C448
1U/10V_4
1U/10V_4
T25
AE14
VSS51
H23
R17
C442
C442
1U/10V_4
1U/10V_4
C354
C354
10U/10V/X5R_8
10U/10V/X5R_8
VSS53
M17
A23
VSS55
AC15
F17
VSS58
M13
AC16
C432
C432
1U/10V_4
1U/10V_4
C355
C355
10U/10V/X5R_8
10U/10V/X5R_8
C370
C370
10U/10V/X5R_8
10U/10V/X5R_8
C858
C858
1U/10V_4
1U/10V_4
C395
C395
1U/10V_4
1U/10V_4
+1.2V
C364
C364
10U/10V/X5R_8
10U/10V/X5R_8
C450
C450
1U/10V_4
1U/10V_4
C458
C458
1U/10V_4
1U/10V_4
80 ohm(4A)
L31
L31
FBJ3216HS800_1206
FBJ3216HS800_1206
12
C348
C348
+
+
A1A:Change C348 to 470UF
470U-2.5V_7343
470U-2.5V_7343
VCC_NB
C434
C434
C445
C445
1U/10V_4
1U/10V_4
1U/10V_4
1U/10V_4
C457
C457
1U/10V_4
1U/10V_4
B2A:Remove JP1
C347
C347
100U/6.3V_3528
100U/6.3V_3528
+1.2V
NB RS485 POWER STATES
Power Signal
VDDHT
VDDR
VDD18
VDDC
VDDA18
VDDA12
S0
ON
ON
ON
ON
ON
ON
ON
AVDDDI
PLLVDD
HTPVDD
VDDR3
LPVDD
LVDDR18D
ON
ON
ON
ON
ON
ON
LVDDR18A OFFON ON OFF OFF
S3
S1
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFFAVDD
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
S4/S5
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
G3
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
PROJECT : ZC3
PROJECT : ZC3
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
RS485-POWER
RS485-POWER
RS485-POWER
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Quanta Computer Inc.
12 46Thursday, June 08, 2006
12 46Thursday, June 08, 2006
12 46Thursday, June 08, 2006
of
of
1
of
1A
1A
1A
5
+3V
Q16
Q16
3
Q17
Q17
3
2
+3V
2
1
2
1
3
MAX6648_AL# 15
RHU002N06
RHU002N06
D D
C C
ECCLK39
ECDATA39
ALERT#
RHU002N06
RHU002N06
+3V
R297
R297
10K_4
10K_4
1
Q18 *2N7002E-LFQ18 *2N7002E-LF
4
+3V
R285
R285
200_4
200_4
LM86VCC
R286
R286
R291
R291
10K_4
10K_4
10K_4
+3V
R299 10K_4R299 10K_4
10K_4
LM86__SMC
LM86_SMD
ALERT#
THERM_OVER#
U24
U24
8
SCLK
7
SDA
6
ALERT#
4
OVERT#
MAX6657/GMT-781
MAX6657/GMT-781
ADDRESS: 98H
A1A:Add R299 for CPU thermal sensor
25mils
VCC
DXP
DXN
GND
3
1
2
3
5
C500
C500
.1U-10V_4
.1U-10V_4
CPU_TEST4_THERMDA
C513
C513
2200P-50V_4
2200P-50V_4
CPU_TEST5_THERMDC
10/20mils
CPU_TEST4_THERMDA 5
CPU_TEST5_THERMDC 5
2
1
C849
C849
.01U-16V_4
.01U-16V_4
CPU FAN
+3V
R564
R564
10K_4
10K_4
CN25
CN25
1
2
345
FAN_CON
FAN_CON
3
A1A:Change FAN CONN footprint
PROJECT : ZC3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Thermal Sensor,FAN
Thermal Sensor,FAN
Thermal Sensor,FAN
Date: Sheet of
Date: Sheet of
Date: Sheet
2
PROJECT : ZC3
Quanta Computer Inc.
Quanta Computer Inc.
of
13 46Thursday, June 08, 2006
13 46Thursday, June 08, 2006
13 46Thursday, June 08, 2006
1
1A
1A
1A
A1A:Add R105 for VGA thermal sensor
VGA_THERM#19
THERM_OVER# G993_VEN
B B
A A
+5V
CPUFAN#39
1 2
R105 0_4R105 0_4
1 2
R298 0_4R298 0_4
R237 *0_4R237 *0_4
5
G993_VEN
U22
U22
VIN2VO
1
FON#
4
VSET
G995P1U
G995P1U
GND
GND
GND
GND
FANSIG39
.01U-16V_4
.01U-16V_4
C377
C377
4
FAN_POWER_995
30 MIL
3
5
6
7
8
5
ALINK_RST#11,18,29,32,33,34,38,39
D D
R1735
R1737
R1738
SB CALIBRATION RESISITOR VALUE
SB600
562 OHM 1%
2.05K 1%
0 ohm
SB460
150 OHM 1%
150 OHM 1%
4.12K 1%
+1.8V
SBK160808T-301Y-S
SBK160808T-301Y-S
PCIE Power
+1.8V
C C
L46
L46
TI201209G121_8
TI201209G121_8
C561
C561
22U/10V_8
22U/10V_8
C558
C558
.1U_4
.1U_4
C557
C557
.1U_4
.1U_4
+3VSUS
U28
U28
NC7SZ08P5X_NL
NC7SZ08P5X_NL
4
R398 *0_4R398 *0_4
L103
L103
C566
C566
C559
C559
.1U_4
.1U_4
.1U_4
.1U_4
53
1
2
10U/10V/X5R_8
10U/10V/X5R_8
C643 .1U_4C643 .1U_4
EC_PWRGD
SBSRCCLK2
SBSRCCLK#2
A_RX0P10
A_RX0N10
A_RX1P10
A_RX1N10
A_TX0P10
A_TX0N10
A_TX1P10
A_TX1N10
PCIE_VDDR
C950
C950
C940
C940
1U/10V_4
1U/10V_4
C579
C579
C588
C588
.1U_4
.1U_4
.1U_4
.1U_4
RTC
D22 RB751D22 RB751
RTC_N02
2 1
D23 RB751D23 RB751
2 1
C640
C640
1U/10V_4
1U/10V_4
+3VPCU
R418
B B
R418
1K/F_4
1K/F_4
A1A:Change from 100 ohm to 1k
Q24
Q24
MMBT3904
MMBT3904
3VRTC
1 3
C665
C665
.1U_4
.1U_4
A A
RTC_N01
R416 1.5K/F_6R416 1.5K/F_6
2
RTC_N03
CN31
CN31
1
2
RTC CONN
RTC CONN
RTC_N04
1
2
VCCRTC
C645
C645
.1U_4
.1U_4
R412 1.5K/F_6R412 1.5K/F_6
1 2
R411
R411
4.7K/F_6
4.7K/F_6
R410
R410
15K/F_6
15K/F_6
JP2
JP2
*Clear PAD
*Clear PAD
FOR SB600, CONNECT TO CPU_PG/LDT_PG
FOR SB460, CONNECT TO SSMUXSEL/GPIO0
R404
R404
1K_4
1K_4
+5VPCU
SB-1
5
4
R397 8.2K_4R397 8.2K_4
16mA
C938 .01U_4C938 .01U_4
C933 .01U_4C933 .01U_4
C930 .01U_4C930 .01U_4
T149T149
T146T146
T145T145
T144T144
T76T76
T81T81
T77T77
T80T80
C580
C580
.1U_4
.1U_4
ALLOW_LDTSTOP11
CPU_PWR_SB
C941
C941
.1U_4
.1U_4
PCIE_VDDR
R342
R342
20M_4
20M_4
CPU_PWRGD5,15
LDT_STOP#5,11,15
LDT_RST#5
C928 .01U_4C928 .01U_4
R623 150/F_6R623 150/F_6
R637 150/F_6R637 150/F_6
R619 4.12K/F_6R619 4.12K/F_6
C565
C565
C571
C571
.1U_4
.1U_4
.1U_4
.1U_4
ATi Recommend
Vendor: NSK
Part Number: NXG 32.768KAE12FUD 16 PPM.
Y3 32.768KHZY3 32.768KHZ
41
2 3
R338 5.1M_4R338 5.1M_4
C569
C569
18P_4
18P_4
FOR SB460, R5047=5.1M
ATI recommand have internal pull-up
CPU_PWR_SB
R374
R374
*10K_4
*10K_4
T86T86
T84T84
T85T85
T87T87
T89T89
T83T83
T153T153
T163T163
H_DPSLP#15
T82T82
R384
R384
*10K_4
*10K_4
H_DPSLP#
R380
R380
10K_4
10K_4
4
R377 *0_4R377 *0_4
R326 *0_4R326 *0_4
R600 0_4R600 0_4
FOR SB460, THIS BALL
IS LDT_RST# ONLY
A1A:Don't implement DPSLP#,PD 10k
3
U48A
U48A
AG10
A_RST#
J24
PCIE_RCLKP
J25
A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
PCIE_CALRP
PCIE_CALRN
PCIE_CALI
PCIE_PVDD
32K_X1
32K_X232K_X232K_X232K_X2
C542
C542
18P_4
18P_4
32K_X1
32K_X2
H_INTR
H_NMI
H_INIT#
H_IGNNE# BMREQ#
H_A20M#
H_FERR#
STP_CPU#
DPRSLPVR
PCIE_RCLKN
P29
PCIE_TX0P
P28
PCIE_TX0N
M29
PCIE_TX1P
M28
PCIE_TX1N
K29
PCIE_TX2P
K28
PCIE_TX2N
H29
PCIE_TX3P
H28
PCIE_TX3N
T25
PCIE_RX0P
T26
PCIE_RX0N
T22
PCIE_RX1P
T23
PCIE_RX1N
M25
PCIE_RX2P
M26
PCIE_RX2N
M22
PCIE_RX3P
M23
PCIE_RX3N
E29
PCIE_CALRP
E28
PCIE_CALRN
E27
PCIE_CALI
U29
PCIE_PVDD
U28
PCIE_PVSS
F27
PCIE_VDDR_1
F28
PCIE_VDDR_2
F29
PCIE_VDDR_3
G26
PCIE_VDDR_4
G27
PCIE_VDDR_5
G28
PCIE_VDDR_6
G29
PCIE_VDDR_7
J27
PCIE_VDDR_8
J29
PCIE_VDDR_9
L25
PCIE_VDDR_10
L26
PCIE_VDDR_11
L29
PCIE_VDDR_12
N29
PCIE_VDDR_13
D2
X1
C1
X2
AC26
CPU_PG/LDT_PG
W26
INTR/LINT0
W24
NMI/LINT1
W25
INIT#
AA24
SMI#
AA23
SLP#/LDT_STP#
AA22
IGNNE#/SIC
AA26
A20M#/SID
Y27
FERR#
AA25
STPCLK#/ALLOW_LDTSTP
AH9
CPU_STP#/DPSLP_3V#
B24
DPSLP_OD#/GPIO37
W23
DPRSLPVR
AC25
LDT_RST#/DPRSTP#/PROCHOT#
SB460 A12
SB460 A12
SB460 SB 27x27mm
SB460 SB 27x27mm
Part 1 of 4
Part 1 of 4
PCI CLKS
PCI CLKS
SPDIF_OUT/PCICLK7/GPIO41
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
XTAL
XTAL
CPU
CPU
3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
PCI INTERFACE
PCI INTERFACE
DEVSEL#/ROMA0
TRDY#/ROMOE#
PAR/ROMA19
REQ3#/GPIO70
REQ4#/GPIO71
GNT3#/GPIO72
GNT4#/GPIO73
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPC
LPC
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
RTC_IRQ#/GPIO69
RTC
RTC
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCIRST#
AD8/ROMA9
AD9/ROMA8
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE3#
FRAME#
IRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
GNT0#
GNT1#
GNT2#
CLKRUN#
LOCK#
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
SERIRQ
RTCCLK
VBAT
RTC_GND
U2
T2
U1
V2
W3
U3
V1
T1
AJ9
W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6
AD3
AF1
AF4
AF3
AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23
D3
F5
E1
D1
AD25
AD20
PCI_MINI
PCI_591
PCI_PCM
PCI_SIO
PCI_CLK4
PCI_LAN
PCI_CLK6
SPDIF_RR
PCIRST#_C
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
GNT0#
GNT1#
GNT2#
GNT3#
GNT4#
CLKRUN#
PCI_LOCK#
INTE#
INTF#
INTG#
INTH#
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LFRAME#/FWH4
LDRQ#0
LDRQ#1
SERIRQ
2
B2A:for EMI
stuff
c945,c929,c948,c953,c932
R681 22_4R681 22_4
R659 22_4R659 22_4
R686 22_4R686 22_4
R692 22_4R692 22_4
R662 22_4R662 22_4
R688 22_4R688 22_4
R672 0_4R672 0_4
PCLK_MINI
PCLK_591
PCLK_PCM
PCLK_SIO
PCICLK4
PCLK_LAN
PCICLK6
FOR SB460, THIS BALL IS SPDIF_OUT/GPIO41 ONLY
AD[0..31]
CBE0# 27,29,30
CBE1# 27,29,30
CBE2# 27,29,30
CBE3# 27,29,30
FRAME# 27,29,30
DEVSEL# 27,29,30
IRDY# 27,29,30
TRDY# 27,29,30
PAR 27,30
STOP# 27,30
PERR# 27,30
SERR# 27,30
REQ0# 30
REQ2# 27
GNT0# 30
GNT2# 27,29
CLKRUN# 30,38,39
T168T168
INTE# 30
INTF# 30
INTG# 27,30
AD[0..31] 17,27,29,30
EC_PWRGD5,15,39
PCIRST#_C
C3A:disconnect
PCI_LOCK#
Add for debug.
LAD0/FWH0 29,38,39
LAD1/FWH1 29,38,39
LAD2/FWH2 29,38,39
LAD3/FWH3 29,38,39
LFRAME#/FWH4 17,29,38,39
LDRQ#0 38
LDRQ#1
BMREQ# 11
2
SERIRQ 30,38,39
RTC_CLK 17
AUTO_ON# 17
CLOCK
PCICLK2
PCICLK5
FOR SB460, THIS BALL IS BMREQ# ONLY
VCCRTC
C918
C918
REQ# / GNT#PCI DEVICE InterruptsIDSEL#
REQ0# / GNT0# INTE#,F#,G#TI 7412
REQ2# / GNT2# INTH#BCM5788M
FOR SB460, THIS BALL IS LDRQ1 ONLY
1U/10V_4
1U/10V_4
1
Reserved For EMI
PCLK_MINI
PCLK_MINI 17,29
PCLK_591 17,39
PCLK_PCM 17,30
PCLK_SIO 17,29,38
PCICLK4 17
PCLK_LAN 17,27
PCICLK6 17
SB_SPDIF_OUT 17
C995
C995
*82P_4
*82P_4
R744
R744
8.2K_4
8.2K_4
PCI_LOCK#
+3V
U54
U54
NC7SZ08P5X_NL
NC7SZ08P5X_NL
53
1
4
2
R738 *0_4R738 *0_4
Unmount R5131
R393 8.2K_4R393 8.2K_4
INTE#
R383 8.2K_4R383 8.2K_4
INTF#
R719 8.2K_4R719 8.2K_4
INTG#
R394 8.2K_4R394 8.2K_4
INTH#
R388 8.2K_4R388 8.2K_4
C1021
C1021
PCLK_591
PCLK_PCM
PCLK_SIO
PCICLK4
PCLK_LAN
PCICLK6
.1U_4
.1U_4
PCIRST#
C945 22P_4C945 22P_4
C929 22P_4C929 22P_4
C948 22P_4C948 22P_4R682 22_4R682 22_4
C953 22P_4C953 22P_4
C965 *22P_4C965 *22P_4
C932 22P_4C932 22P_4
C960 *22P_4C960 *22P_4
C1013
C1013
82P_4
82P_4
+3V
B2A:Stuff R388(8.2K_4) for INTH#
STOP#
FRAME#
TRDY#
REQ1#
IRDY#
REQ2#
SERR#
REQ4#
GNT1#
GNT2#
GNT3#
GNT0#
DEVSEL#
REQ3#
REQ0#
PERR#
GNT4#
PAR
C607
C607
18P_4
18P_4
BMREQ#
A1A:BMREQ# don't need pull high
SERIRQ
LAD3/FWH3
LAD2/FWH2
LAD1/FWH1
LAD0/FWH0
CLKRUN#
LDRQ#1
LDRQ#0
RN6 8.2KX4_4RN6 8.2KX4_4
1
2
3
4
5
6
78
RN8 8.2KX4_4RN8 8.2KX4_4
1
2
3
4
5
6
78
RN9 *8.2KX4_4RN9 *8.2KX4_4
1
2
3
4
5
6
78
RN7 8.2KX4_4RN7 8.2KX4_4
1
2
3
4
5
6
R379 10K_4R379 10K_4
2
4
6
78
1
3
5
78
R396 *8.2K_4R396 *8.2K_4
R405 *8.2K_4R405 *8.2K_4
R401 10K_4R401 10K_4
R409 100K/F_4R409 100K/F_4
R753 100K/F_4R753 100K/F_4
R407 100K/F_4R407 100K/F_4
R408 100K/F_4R408 100K/F_4
RN5 10KX4_4RN5 10KX4_4
LPC PULL UP(SB460 ONLY)
PROJECT : ZC3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
SB460M PCIE/PCI/CPU/LPC I/F
SB460M PCIE/PCI/CPU/LPC I/F
SB460M PCIE/PCI/CPU/LPC I/F
Date: Sheet
Date: Sheet
Date: Sheet
PROJECT : ZC3
Quanta Computer Inc.
Quanta Computer Inc.
1
PCIRST# 27,29,30,31
C630
C630
.1U_4
.1U_4
+3V
C644
C644
.1U_4
.1U_4
C1011
C1011
.1U_4
.1U_4
of
of
of
14 46Thursday, June 08, 2006
14 46Thursday, June 08, 2006
14 46Thursday, June 08, 2006
1A
1A
1A
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