Acer Extenza 5430, Exten 5530, TravelMate 5230, TravelMate 5530 Schematics

Olan (TM15") Block Diagram

Project code: 91.4Z701.001 PCB P/N : 48.4Z701.001

REVISION : 07249-2M

PCB STACKUP

TOP

VCC

GND

BOTTOM

SYSTEM DC/DC

TPS51125

INPUTS

DCBATOUT

OUTPUTS

5V_S5(7A) 3D3V_S5(7A)

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

1D1V_S0(9A) 1D2V_S0(5A)

SYSTEM DC/DC

TPS51117

INPUTS OUTPUTS

DCBATOUT 1D8V_S3(10A)

RT9026PFP

5V_S5

RT9166

3D3V_S0 2D5V_S0

G957

3D3V_S0

G9161

3D3V_S5

CHARGER

DCBATOUT

CPU DC/DC

INPUTS

DCBATOUT

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

BLOCK DIAGRAM

Olan

DDR_VREF_S3

0D9V_S3

(300mA)

1D5V_S0 (1A)

1D2V_S5 (400mA)

BQ24745

OUTPUTSINPUTS CHG_PWR

18V 6.0A

UP+5V

5V 100mA

ISL6265HR

OUTPUTS

VCC_CORE_S0_0

0~1.55V 18A

VCC_CORE_S0_1

0~1.55V 18A

VDDNB

0~1.55V 18A

158Monday, May 05, 2008

-2M

667/800MHz

AMD Giffin CPU S1G2 (35W)

638-Pin uFCPGA638

OUT

4,5,6,7

16X16

North Bridge

AMD RS780M

CPU I/F INTEGRATED GRAHPICS

LVDS, CRT I/F

G792

PCIex16

CRT

LCD

HDMI

45,46

CRT

DVI

DDR2

D D

667/800 MHz

8,9

DDR2

667/800 MHz

CLK GEN.

SILEGO SLG8SP628

8,9

VGA Borad

C C

Line In

Codec

AZALIA

11,12,13

A-Link 4X4

LAN

Giga LAN

BCM5764M

TXFM RJ45

36 36

ALC268

MIC In

Line Out

B B

(No-SPDIF)

OP AMP

G1454R

INT.SPKR

MODEM

RJ11

MDC Card

HDD SATA

South Bridge

AMD SB700

USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

ATA 66/100

ACPI 1.1 LPC I/F

PCI/PCI BRIDGE

20,21,22,23,24

SATA

Mini USB Blue Tooth

PCIex1

PCI

LPC BUS

USB

Camera

Finger

A A

ODD SATA

Printer

USB 4 Port

New card

Cardbus OZ711MZ

KBC

Winbond

WPC775

Touch Pad

INT. KB

43 43

38 38

Mini Card

Kedron

MS/MS Pro/xD /MMC/SD/SD IO

5 in 1

BIOS

Winbond W25X80

Launch Buttom

PWR SW TPS2231

a/b/g/n

LPC

DEBUG CONN.

PCMCIA SLOT

RJ45

Port Replicator

USBX4 HP OUT MIC IN LINE IN

5.Page 19: "HDMI1" add 2'nd source 62.10078.171.

6.Page 18: "F3" change to FUSE-1A6V-2-GP.

7.Page 30: "USBCN1" change to "20.F0765.020"

8.Page 26: ODD connector "SKT1" change to "62.10065.291"

9.Page 40: Add analog MIC schematic.

10.Page 46: Add "RN65" for NO duck LAN LED

11.Page All: Close PWR GAP

12.Page 03: Update "U18" foot print

13.Page 57: Add test point under Dimm Door

14.Page 55: "R32" pull hi from "3D3V_AUX_S5" to "BQ24745_VREF"

15.Page 41: Change audio AMP to G1454R41

16.Page 55: Change C34 size from 0402 to 0603

17.Page 57: Add EMI capacitor follow EMI recommend

18.Page 22: Add E-SATA schematic =========================================================== 2007/12/20

1.Page 12: "R109" change to "768R2F-1-GP"

D D

2.Page 46: Remove "RN19" "RN21" "RN22" "RN23" "RN53" "RN54" "RN55" "RN56"

3.Page 46" connect U12 HDMI switch to PEG_TX

Modify 5V & 3D3V 51125_ENTIP1 & 51125_ENTIP2 schematic.

4.Page 51

5.Page 06: PH 300 ohmo on "CPU_DBREQ#"; PL 300 ohmo on "CPU_TEST21" & "CPU_TEST24"

6.Page 12: PH "SUS_STAT#" 10K ohmo to 3D3V_S0

7.Page 45: Add "DOCK1" PIN 51 "CRT_DEC#"

8.Page 46: Modify HDMI switch to "PS8122QFN48G-GP" =========================================================== 2007/12/25

1.Page 46: Connect "3D3V_S0" to U12 remove "3D3V_S0_PI"

2.Page 45: Add "R497" "R498" "R499" for DIS CRT switch

3.Page 46: Add Pi filter before dock & C818 C819 for VSYNC_5 and HSYNC_5

4.Page 37: Add "R618" PU for "AC/BAT_DET" =========================================================== 2007/12/26

1.Page 21: Swap USB port 8 and Port 10.

2.Page 45: Follow net swap report.

3.Page 41: Add "R633" DY PL "1451_SD"

4.Page 46: RN19~RN23, RN42~RN45 & RN65 change to SRN0J-10-GP

5.page 43: Add R634 ,U17 pin120 connect “SPI_WP_R#”

6.Page 30: Follow Homa modify "USBCN1" =========================================================== 2007/12/27

1.Page 11: NEW CARD PCIE channel change to channel 3.

2.Page 21: "DOCK_DT1#" change to "GEVENT7#" and DY 0 ohmo resistor

3.Page 37: Add "R618" PU for "AC/BAT_DET" on MXM pin 157, Connect MXM SMB with "RN53"

4.Page 45: Add Pi filter before dock

5.Page 18: change R113, R114, R106 and R99 to 33ohm. change C471, C468 and C466 to 2.2pf.

6.Page 43: Change R186 to 150ohm for PLT_RST1#_1 (KBC U20A)

7.Page 35: Change C86 to 150pf LAN_RST (LAN U8 )

C C

8.Page 32: Change C631 to 150pf PLT_RST1#_MXM (U58 OZ711)

9.Page 37: Change C510 to 330pf for PLT_RST1#_MXM (MXM)

10.Page 33: Add C650 to 220pf for PCIRST1# (CR U67)

11.Page 38: Add C639 to 220pf for NEW_RST# (NEW U66)

12.Page 43: R181 change to 30KF for BOM integrate

13.Page 39: Change R226 to 470ohm for MINI_RST# (MINI MINIC1)

14.Page 12: Add 330pf C551 between R313 and ground for SYSREST# (NB U43C).

15.Page 40: Change C379 to 56pf for RESET# (AUDIO U24)

16.Page 06: Change R298 to 33ohm for LDT_RST#_CPU

17.Page 45: Change RN4 connect to "CRT_R_S" "CRT_G_S" "CRT_B_S"

18.Page 24: Change R89 to 10R2J-2-GP for BOM integrate

19.Page 46: Follow net swap report.

20.Page 57: Add Spring "GND1" "GND2" =========================================================== 2007/12/28

1.Page 57: Add EMI capacitor follow EMI recommend.

2.Page 45: ADD EC191 EC192 EC193 follow EMI recommend. =========================================================== 2007/12/28a

1.Page 40: Codec IC change to ALC268.

2.Page 41: ADD U69 G1412 AMP for Line out.

3.Page 33: Add EMI capacitor Follow EMI recommend =========================================================== 2007/12/31

1.Page 22: Change PlanarID to SB and ADD CLK_ID to identify Clock Gen.

2.Page 42: Modify "INTMIC1: to MONO MIC

3.Page 40: Modify ALC_268 to MONO MIC schematic, Add "DOCK_DT1#" on "GPIO1" =========================================================== 2008/01/02

1.Page 40: Change Speaker and Line-out channel.

B B

2.Page 40: Chanhe "DOCK_DT1#" connect to GPIO3 U24 pin 3.

3.Page 40: Modify "MIC" and "Line_in" schematic.

4.Page 30: Modify "USBCN1" schematic follow Homa.

5.Page 43: Add "R654" 10K PU 3D3V_S0 for "FP_DETECT#".

6.Page 21: Add "R200" 10K PU 3D3V_S0 for "FP_ID"

7.Page 51: Add "R549" 0 ohm for "MXM_THER".

8.Page 40: Change R196 to 64.39225.6DL 39.2K.

9.Page 21: Remove "R397" "R489" R490" "R491", add "RN56" for component count. =========================================================== 2008/01/03

1.Page 50: Change C4 to SC1U10V3KX-3GP for BOM integrate

2.Page 55: Change C296 form SC1U25V5KX-1GP (P/N 78.10522.21L) to SC1U25V0KX-GP (P/N 78.10522.5BL)

3.Page 43: Remove "R188" "R177" "R185" "R189", add "RN56" for component count.

4.Page 46: Swap U12 Pin 29 & Pin 28; add C394, C395 D01u.

5.Page 22: Add U41 E-STAT solution

6.Page 21: Add R326 for NB_PWRGD

7.Page 48: Add R498 for NB_PWRGD =========================================================== 2008/01/03a

1.Page 46: Modify SM BUS PH resistor

2.Page 40: Add "R119" and "R177" for ALC268 GPIO1 =========================================================== 2008/01/04

1.Page 22: Swap RN68 net =========================================================== 2008/01/04a

1.Page 57: Remove H23; H24.

2.Page 06: Remove R300, R301, change to "RN71" =========================================================== 2008/01/07

A A

1.Page All: Follow Net swap report. =========================================================== 2008/01/07a

1.Page 22: Swap U41 Pin 3, 4 & Pin 17, 18. =========================================================== 2008/01/07b

1.Page 57: Add H23 screw holl. =========================================================== 2008/01/07c

1.Page All: Follow Net swap report. ===========================================================

=========================================================== 2008/02/01

1.Page 45: Change "DOCK1" to 20.F1257.001. =========================================================== 2008/02/04

1.Page 40: Add R327, R328, EC200, EC201 for EMI solution. =========================================================== 2008/02/05

1.Page 22: Add R397 follow caystal FAE recommend.

2.Page All: Short 0 ohm resistor with PAD.

3.Page 18: Remove "D2" "D3" "D4" for ME & Layout =========================================================== 2008/02/13

1.Page 41 & 42: Modify Line-out jack connection. =========================================================== 2008/02/13a

1.Page 06: Follow AMD recommend Add & Dummy "R503" to PU "CPU_LDT_REQ#". =========================================================== 2008/02/13b

1.Page 06: Change "R503" to "R304" to PU "ALLOW_LDTSTOP".

2.Page 06 & 12: Remove net "CPU_LDT_REQ#" Replace with "ALLOW_LDTSTOP"

3.Page 21: Add "R134" & "R185" for "HDMI" on SB700 "GPIO0".

4.Page 42: Change "C400" "C401" to "R301" & "R218" ===========================================================

=========================================================== 2008/03/03 page3, remove RN31 (control by SW) page12,merge R105,R107 to RN29 merge R309,R310,R311 to RN72 (R309 can use 3K) page14 merge R477,R476 to RN73 page16 RN1 change to 2 pcs 0ohm PAD "R476" "R477" merge R29,R30 to RN53 page18 merge R106,R99 to RN75 merge R113,R114 to RN74 merge R283,R284 to RN30 merge R275,R276 to RN32 merge R319,R98 to RN31 page20 change R165,R164,R404,R403 to 0 ohm PAD (only use for strap,don't need 22 ohm) page21 merge R170,R159 to RN34 merge R162,R160 to RN33 R185 for Dock(input can't floating) page22 Short R140,R138 C672,C671,C673,C674 for E-SATA only,need add DIS check with SW to remove CLK_ID setting(use SMBus) dummy all E-SATA re-driver change RN67,RN68 to PAD page24 merge R437,R421 to RN35 merge R344,R355 to RN36 del R360,R366,merge R361,R365 to RN37 page35 change R265,R263,R67,R87,R72,R269,R270,R79,R260,R58,R54,R56,R38,R44,R42,R46,R74,R83 TO 0ohm PAD page37 change r456 to PAD page39 check R224/R225,R222/R229, need confirm spec

page40 check R327,R328 with EMI change RN55,R325 to PAD Modify schematic for current leackage on "DOCK_DT1#" R119 for Dock (input can't floating) page42 merge R217,R220 to RN55 merge R214,R215 to RN67 merge R475,R479 to RN76 (need change to 48 ohm) page44 change ER1, ER2,ER4 to PAD dummy EC69 change ER3 to 33 ohm page47 change R316 to PAD page48 level shift for NB_PWRGD page50 change R12,R13,R14,R3,R4,R7 to PAD page53 change R261 to PAD page54 change R317,R318 to PAD page55 change R148,R147,R132,R131 to PAD merge R28,R32,R31,R37 to RN77 (please take care R32 power) =========================================================== 2008/03/04

1.Page 26: Modify "SKT1" ODD connector.

2.Page 45: Merge "R292" "R293" to "RN68".

3.Page 51: change R416,R441 to PAD for noise issue.

4.Page 16: "F2" change to "69.50007.A31". =========================================================== 2008/03/04b

1.Page 51: change R416,R442 to PAD and DY "R441" for noise issue.

2.Page 17: "LED3" change to "3D3V_S5" "LED2" change to "3D3V_AUX_S5".

3.Page 30: Modify "USBCN1" pin define.

4.Page 40: Remove "C377" "C379" short them

5.Page 40: Remove "R177" for new INTMIC connector

6.Page 42: Modify "INTMIC" schematic.

7.Page 45: Merge R497, R498, R499 to RN68; R287, R286, R289 to RN78.

8.Page 16: Add RN79 for ESD.

9.Page 45: "DOCK1" "PIN S51" change to "CRT_IN#_R" for ESD.

10.Page 45: Add "RN80" for ESD

11.Page 56: Add "D30" on "BAT_IN#" for ESD, Change "RN59" to 8P4R for "BAT_IN#" ESD =========================================================== 2008/03/05

1.Page 32: Add "R220" and Dummy for "PME" issue.

2.Page 39: Change "3D3V_S5_MINI1" to "3D3V_S5" and Change "3D3V_S0_MINI" to "3D3V_S5".

3.Page 17: Merge "R485" "R486" to "RN81"; Merge "R487" "R488" to "RN82".

4.Page 17: Change "R473" to "453R2F-1-GP"; Change "R480" to "150R2F-1-GP".

5.Page 14: Merge "R179" "R180" to "RN83".

6.Page All: Follow Swap report. =========================================================== 2008/03/06

1.Page 30: "USBCN1" pin 15 change to GND.

2.Page 22: Remove "U41" relative schematic.

3.Page 40: "RN41" change to 4P2R

4.Page 42: Merge "R474" "R475" to "RN84".

5.Page 42: Change "EC6" "EC7" "EC8" "EC9" to 0603

6.Page 40: Change "EC200" "EC201" to 0603

7.Page 38: "U66" change to 74.00577.A73

8.Page 57: ADD EMI capacitor "EC203" ~ "EC220".

9.Page 40: Merge "R329" "R330" "R325" to "RN85" for ESD.

10.Page 42: Short "RN67" with PAD. =========================================================== 2008/03/06a

1.Page 51: Change "TC17" "TC10" to 77.21561.00L & mount.

2.Page 50: Change "C7" "C8" to 77.21561.00L & mount.

3.Page 52: Change "TC19" to 79.10712.L02.

4.Page 55: Add "C826" for Vendor suggest added decoupling capacitor in CSSN to ground. =========================================================== 2008/03/07

1.Page 55: Change "D9" to 83.R0203.08F & mount.

2.Page 57: Add Spring "GND5 and EMI capacitor "EC221" ~ "EC229". =========================================================== 2008/03/10

1.Page 57: Add "GND11" for EMI, "GND8" "GND9" "GND10" change to "34.15F09.001".

2.Page 52: Change "TC21" to SE100U25VM-L1-GP.

3.Page All: Follow Swap net. =========================================================== 2008/03/10a

1.Page 55: Change "TC21" to SE100U25VM-L1-GP.

2.Page 57: Remove "GND6" "GND7". =========================================================== 2008/03/11

1.Page 57: Remove "EC204" "EC205". =========================================================== 2008/03/11a

1.Page 40: "R194" change to "51R2J-2-GP".

2.Page 29: "R235" change to "15R2J-GP" & DY "C424".

3.Page 21: Change "RN33" to "R655" & "R656" with "27R2J-1-GP"; Change "RN34" to "SRN47J-7-GP"; UNdummy "EC61" "EC63".

4.Page 48: Add "U70" for "NB_PWRGD" level shift. ===========================================================

UMA NODOCK

Title

Size Document Number Rev

Date: Sheet

HISTORY

Olan

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

258Friday, April 18, 2008

-1

3D3V_S0 3D3V_CLK_VDD

Do Not Stuff

1 2

R173

SC_0205

D D

-1_0301

3D3V_S0

Do Not Stuff

R139

1 2

1D1V_S0 1D1V_CLK_VDDIO

R145

1 2

Do Not Stuff

C317

C337

C315

SC10U10V5ZY-1GP

C314

SC10U10V5ZY-1GP

C320

C318

SCD1U10V2KX-4GP

C344

SCD1U10V2KX-4GP

C322

C341

SCD1U10V2KX-4GP

SC10U10V5ZY-1GP

1109

3D3V_CLK_VDD

Do Not Stuff

C C

CLK_PCIE_SB20

CLK_PCIE_SB#20

CLK_PCIE_LAN35

CLK_PCIE_LAN#35

CLK_NB_GPPSB12

CLK_NB_GPPSB#12

CLK_PCIE_MINI139

CLK_PCIE_MINI1#39

CLK_PCIE_NEW38

CLK_PCIE_NEW#38

TP66Do Not StuffTP66Do Not Stuff TP65Do Not StuffTP65Do Not Stuff

B B

3D3V_S0

1 2

R167

SC1U10V2KX-1GP

CLK_NBHT_CLK12 CLK_NBHT_CLK#12

C329

C321

SCD1U10V2KX-4GP

C319

C336

SCD1U10V2KX-4GP

SC_0205

C330

CLK_SRC0T_LPRS CLK_SRC0C_LPRS

SC_0205

3D3V_S0

R146 10KR2J-3-GPR146 10KR2J-3-GP

C343

C347

SCD1U10V2KX-4GP

1D1V_CLK_VDDIO

VDD_REF

3D3V_48MPWR_S0

C333

SCD1U10V2KX-4GP

3D3V_CLK_VDD

PD#

U18

VDDATIG

VDDATIG_IO

VDDCPU

VDDCPU_IO

VDDSRC

VDDSRC_IO

VDDSB_SRC

VDDSB_SRC_IO

VDDSATA

VDD

VDDHTT

VDDREF

VDD48

PD#

SRC0T_LPRS

SRC0C_LPRS

SRC1T_LPRS

SRC1C_LPRS

SRC2T_LPRS

SRC2C_LPRS

SRC3T_LPRS

SRC3C_LPRS

SRC4T_LPRS

SRC4C_LPRS SRC6T/SATAT_LPRS42GNDSATA

SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHZ_SS

SRC7C_LPRS/27MHZ_NS

SB_SRC0T_LPRS

SB_SRC0C_LPRS

SB_SRC1T_LPRS

SB_SRC1C_LPRS

HTT0T_LPRS/66M

HTT0C_LPRS/66M

ICS9LPRS480BKLFT-GP

71.09480.A03

71.09480.A03 2nd = SLG:71.08628.003

2nd = SLG:71.08628.003

-1_0310 change to 71.09480.A03

ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS

CPUKG0T_LPRS CPUKG0C_LPRS

REF0/SEL_HTT66

REF1/SEL_SATA

REF2/SEL_27

GNDSB_SRC

SMBCLK SMBDAT

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

48MHZ_0

GNDATIG

GND

GNDHTT GNDREF GNDCPU

GND48

GNDSRC GNDSRC

GND

2 3

30 29 28 27

23 45 44 39 38

50 49

59 58 57

43 24 7 52 60 46 1

10 18

33 65

3D3V_S0

GEN_XTAL_IN

GEN_XTAL_OUT

CLK_SMBCLK CLK_SMBDAT

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

CLK_48

REF0 REF1 REF2

R174

1 2

2R3J-GP

3000mA.80ohm

R171

1 2

X-14D31818M-35GP

Do Not Stuff

CL=20pF±0.2pF

G86

G86 G87

G87

Do Not Stuff

Do Not Stuff Do Not Stuff

Do Not Stuff

X-14D31818M-35GP

82.30005.891

2ND = 82.30005.951

12 12

-1_0301

TP64 Do Not StuffTP64 Do Not Stuff TP144 Do Not StuffTP144 Do Not Stuff TP146 Do Not StuffTP146 Do Not Stuff TP147 Do Not StuffTP147 Do Not Stuff TP154 Do Not StuffTP154 Do Not Stuff

R172 33R2J-2-GPR172 33R2J-2-GP

CLKREQ# Internal pull high

R141 Do Not Stuff

EC65

Do Not Stuff

3D3V_48MPWR_S0

C348

Do Not Stuff

SMBC0_SB 8,9,21

SMBD0_SB 8,9,21

C342

C342 SC1U10V2KX-1GP

SC1U10V2KX-1GP

C340

SC33P50V2JN

C346

SC33P50V2JN

CLK_PCIE_PEG 37 CLK_PCIE_PEG# 37

CLK_NB_GFX 12

CLK_NB_GFX# 12

CPU_CLK 6 CPU_CLK# 6

CLK48_USB 21

SB_0108

Due to PLL issue on current clock chip, the SBlink clock need to come from SRC clocks for RS740 and RS780. Future clock chip revision will fix this.

Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

* RS780 can be used as clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.

RS740 RX780 RS780

66M SE(SINGLE END)

14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref

100M DIFF NC 100M DIFF

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC or 100M DIFF OUTPUT

R151

Do Not Stuff

A A

R152

Do Not Stuff

1 2

Do Not Stuff

1 2

R156

R157

10KR2J-3-GP

1 2

Do Not Stuff

1 2

R154

R155

SEL_SATA

1 2

REF0 REF1 REF2

REF1

SEL_HTT66 REF0

* default

100 MHz non-spreading differential SRC clock

100 MHz spreading differential SRC clock

66 MHz 3.3V single ended HTT clock

0 * 100 MHz differential HTT clock

CPU_CLK(200MHz)

1 2

REF0

R14975R2F-2-GP R14975R2F-2-GP

OSC_14M_NB

1.1V 158R/90.9RRS780M

R150150R2F-1-GP R150150R2F-1-GP

CLK_NB_14M 12

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

CLKGEN_ICS9LPRS480

Olan

358Monday, May 05, 2008

-2M

D D

1D2V_S0

Place close to socket

SCD22U6D3V2KX-1GP

SC4D7U6D3V5KX-3GP

C450

C453

C C

B B

SCD22U6D3V2KX-1GP

SC4D7U6D3V5KX-3GP

C481

C478

SC180P50V2JN-1GP

SCD22U6D3V2KX-1GP

C454

HT_NB_CPU_CAD_H011 HT_NB_CPU_CAD_L011 HT_NB_CPU_CAD_H111 HT_NB_CPU_CAD_L111 HT_NB_CPU_CAD_H211 HT_NB_CPU_CAD_L211 HT_NB_CPU_CAD_H311 HT_NB_CPU_CAD_L311 HT_NB_CPU_CAD_H411 HT_NB_CPU_CAD_L411 HT_NB_CPU_CAD_H511 HT_NB_CPU_CAD_L511 HT_NB_CPU_CAD_H611 HT_NB_CPU_CAD_L611 HT_NB_CPU_CAD_H711 HT_NB_CPU_CAD_L711 HT_NB_CPU_CAD_H811 HT_NB_CPU_CAD_L811 HT_NB_CPU_CAD_H911 HT_NB_CPU_CAD_L911 HT_NB_CPU_CAD_H1011 HT_NB_CPU_CAD_L1011 HT_NB_CPU_CAD_H1111 HT_NB_CPU_CAD_L1111 HT_NB_CPU_CAD_H1211 HT_NB_CPU_CAD_L1211 HT_NB_CPU_CAD_H1311 HT_NB_CPU_CAD_L1311 HT_NB_CPU_CAD_H1411 HT_NB_CPU_CAD_L1411 HT_NB_CPU_CAD_H1511 HT_NB_CPU_CAD_L1511

HT_NB_CPU_CLK_H011 HT_NB_CPU_CLK_L011 HT_NB_CPU_CLK_H111 HT_NB_CPU_CLK_L111

HT_NB_CPU_CTL_H011 HT_NB_CPU_CTL_L011 HT_NB_CPU_CTL_H111 HT_NB_CPU_CTL_L111

C476

SC180P50V2JN-1GP

C456

U38A

VLDT_A0

VLDT_A1

VLDT_A2

VLDT_A3

L0_CADIN_H0

L0_CADIN_L0

L0_CADIN_H1

L0_CADIN_L1

L0_CADIN_H2

L0_CADIN_L2

L0_CADIN_H3

L0_CADIN_L3

L0_CADIN_H4

L0_CADIN_L4

L0_CADIN_H5

L0_CADIN_L5

L0_CADIN_H6

L0_CADIN_L6

L0_CADIN_H7

L0_CADIN_L7

L0_CADIN_H8

L0_CADIN_L8

L0_CADIN_H9

L0_CADIN_L9

L0_CADIN_H10

L0_CADIN_L10

L0_CADIN_H11

L0_CADIN_L11

L0_CADIN_H12

L0_CADIN_L12

L0_CADIN_H13

L0_CADIN_L13

L0_CADIN_H14

L0_CADIN_L14

L0_CADIN_H15

L0_CADIN_L15

L0_CLKIN_H0

L0_CLKIN_L0

L0_CLKIN_H1

L0_CLKIN_L1

L0_CTLIN_H0

L0_CTLIN_L0

L0_CTLIN_H1

L0_CTLIN_L1

SKT-CPU638P-GP-U1

62.10055.111

2ND = 62.10040.471

1.5Amp

HT LINK

L0_CADOUT_H0

L0_CADOUT_L0

L0_CADOUT_H1

L0_CADOUT_L1

L0_CADOUT_H2

L0_CADOUT_L2

L0_CADOUT_H3

L0_CADOUT_L3

L0_CADOUT_H4

L0_CADOUT_L4

L0_CADOUT_H5

L0_CADOUT_L5

L0_CADOUT_H6

L0_CADOUT_L6

L0_CADOUT_H7

L0_CADOUT_L7

L0_CADOUT_H8

L0_CADOUT_L8

L0_CADOUT_H9

L0_CADOUT_L9

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H15

L0_CADOUT_L15

L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 11 HT_CPU_NB_CAD_L0 11 HT_CPU_NB_CAD_H1 11 HT_CPU_NB_CAD_L1 11 HT_CPU_NB_CAD_H2 11 HT_CPU_NB_CAD_L2 11 HT_CPU_NB_CAD_H3 11 HT_CPU_NB_CAD_L3 11 HT_CPU_NB_CAD_H4 11 HT_CPU_NB_CAD_L4 11 HT_CPU_NB_CAD_H5 11 HT_CPU_NB_CAD_L5 11 HT_CPU_NB_CAD_H6 11 HT_CPU_NB_CAD_L6 11 HT_CPU_NB_CAD_H7 11 HT_CPU_NB_CAD_L7 11 HT_CPU_NB_CAD_H8 11 HT_CPU_NB_CAD_L8 11 HT_CPU_NB_CAD_H9 11 HT_CPU_NB_CAD_L9 11 HT_CPU_NB_CAD_H10 11 HT_CPU_NB_CAD_L10 11 HT_CPU_NB_CAD_H11 11 HT_CPU_NB_CAD_L11 11 HT_CPU_NB_CAD_H12 11 HT_CPU_NB_CAD_L12 11 HT_CPU_NB_CAD_H13 11 HT_CPU_NB_CAD_L13 11 HT_CPU_NB_CAD_H14 11 HT_CPU_NB_CAD_L14 11 HT_CPU_NB_CAD_H15 11 HT_CPU_NB_CAD_L15 11

HT_CPU_NB_CLK_H0 11 HT_CPU_NB_CLK_L0 11 HT_CPU_NB_CLK_H1 11 HT_CPU_NB_CLK_L1 11

HT_CPU_NB_CTL_H0 11 HT_CPU_NB_CTL_L0 11 HT_CPU_NB_CTL_H1 11 HT_CPU_NB_CTL_L1 11

SKT-BGA638H176

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

CPU_HT_LINK I/F_(1/4)

Olan

458Friday, April 18, 2008

-1

Place near to CPU

D D

C185

1D8V_S3

C C

B B

4.7u x 4 0.22u X 2 180P x 6

SCD22U6D3V2KX-1GP

SC4D7U6D3V5KX-3GP

MEM_MA0_ODT08,10 MEM_MA0_ODT18,10

MEM_MA0_CS#08,10 MEM_MA0_CS#18,10

MEM_MA_CKE08,10 MEM_MA_CKE18,10

MEM_MA_CLK0_P8 MEM_MA_CLK0_N8 MEM_MA_CLK1_P8 MEM_MA_CLK1_N8

MEM_MA_ADD08,10 MEM_MA_ADD18,10 MEM_MA_ADD28,10 MEM_MA_ADD38,10 MEM_MA_ADD48,10 MEM_MA_ADD58,10 MEM_MA_ADD68,10 MEM_MA_ADD78,10 MEM_MA_ADD88,10 MEM_MA_ADD98,10 MEM_MA_ADD108,10 MEM_MA_ADD118,10 MEM_MA_ADD128,10 MEM_MA_ADD138,10 MEM_MA_ADD148,10 MEM_MA_ADD158,10

MEM_MA_BANK08,10 MEM_MA_BANK18,10 MEM_MA_BANK28,10

MEM_MA_RAS#8,10 MEM_MA_CAS#8,10 MEM_MA_WE#8,10

C183

R257

R257 39D2R2F-L-GP

39D2R2F-L-GP

R258

R258 39D2R2F-L-GP

39D2R2F-L-GP

SC4D7U6D3V5KX-3GP

1 2 1 2

C184

TP7TP7

SCD22U6D3V2KX-1GP

C186

SC4D7U6D3V5KX-3GP

0D9V_S3

MEMZP MEMZN

MEM_RSVD_M1

C49

AD10

AF10

AE10

AA16

C164

U38B

D10

VTT1

C10

VTT2

B10

VTT3 VTT4

MEMZP MEMZN

H16

RSVD_M1

T19

MA0_ODT0

V22

MA0_ODT1

U21

MA1_ODT0

V19

MA1_ODT1

T20

MA0_CS_L0

U19

MA0_CS_L1

U20

MA1_CS_L0

V20

MA1_CS_L1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_H5

N20

MA_CLK_L5

E16

MA_CLK_H1

F16

MA_CLK_L1

Y16

MA_CLK_H7 MA_CLK_L7

P19

MA_CLK_H4

P20

MA_CLK_L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD10

L22

MA_ADD11

K20

MA_ADD12

V24

MA_ADD13

K24

MA_ADD14

K19

MA_ADD15

R20

MA_BANK0

R23

MA_BANK1

J21

MA_BANK2

R19

MA_RAS_L

T22

MA_CAS_L

T24

MA_WE_L

SKT-CPU638P-GP-U1

C180

C181

SC180P50V2JN-1GP

MEM:CMD/CTRL/CLK

SC180P50V2JN-1GP

VTT5 VTT6 VTT7 VTT8 VTT9

VTT_SENSE

MEMVREF

RSVD_M2

MB0_ODT0 MB0_ODT1 MB1_ODT0

MB0_CS_L0 MB0_CS_L1 MB1_CS_L0

MB_CKE0 MB_CKE1

MB_CLK_H5

MB_CLK_L5

MB_CLK_H1

MB_CLK_L1

MB_CLK_H7

MB_CLK_L7

MB_CLK_H4

MB_CLK_L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_RAS_L MB_CAS_L

MB_WE_L

C54

C52

C48

SC180P50V2JN-1GP

C72

SC180P50V2JN-1GP

CLOSE TO CPU

W10 AC10 AB10 AA10 A10

Y10 W17 B18 W26

W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24

R24 U26 J26

U25 U24 U23

VTT_SENSE

MEM_RSVD_M2

MEM_MB0_ODT0 9,10 MEM_MB0_ODT1 9,10

MEM_MB0_CS#0 9,10 MEM_MB0_CS#1 9,10

MEM_MB_CKE0 9,10 MEM_MB_CKE1 9,10

MEM_MB_CLK0_P 9 MEM_MB_CLK0_N 9 MEM_MB_CLK1_P 9 MEM_MB_CLK1_N 9

MEM_MB_ADD0 9,10 MEM_MB_ADD1 9,10 MEM_MB_ADD2 9,10 MEM_MB_ADD3 9,10 MEM_MB_ADD4 9,10 MEM_MB_ADD5 9,10 MEM_MB_ADD6 9,10 MEM_MB_ADD7 9,10 MEM_MB_ADD8 9,10 MEM_MB_ADD9 9,10 MEM_MB_ADD10 9,10 MEM_MB_ADD11 9,10 MEM_MB_ADD12 9,10 MEM_MB_ADD13 9,10 MEM_MB_ADD14 9,10 MEM_MB_ADD15 9,10

MEM_MB_BANK0 9,10 MEM_MB_BANK1 9,10 MEM_MB_BANK2 9,10

MEM_MB_RAS# 9,10 MEM_MB_CAS# 9,10 MEM_MB_WE# 9,10

TP5 Do Not StuffTP5 Do Not Stuff

TP84TP84

SCD1U10V2KX-4GP

VREF_DDR_CLAW

SC1KP50V2KX-1GP

C59

C81

SCD1U10V2KX-4GP

C77

1D8V_S3

RN3

1 2 3

SRN1KJ-7-GP

U38C

MEM_MA_DATA08 MEM_MA_DATA18 MEM_MA_DATA28 MEM_MA_DATA38 MEM_MA_DATA48 MEM_MA_DATA58 MEM_MA_DATA68 MEM_MA_DATA78 MEM_MA_DATA88 MEM_MA_DATA98 MEM_MA_DATA108 MEM_MA_DATA118 MEM_MA_DATA128 MEM_MA_DATA138 MEM_MA_DATA148 MEM_MA_DATA158 MEM_MA_DATA168 MEM_MA_DATA178 MEM_MA_DATA188 MEM_MA_DATA198 MEM_MA_DATA208 MEM_MA_DATA218 MEM_MA_DATA228 MEM_MA_DATA238 MEM_MA_DATA248 MEM_MA_DATA258 MEM_MA_DATA268 MEM_MA_DATA278 MEM_MA_DATA288 MEM_MA_DATA298 MEM_MA_DATA308 MEM_MA_DATA318 MEM_MA_DATA328 MEM_MA_DATA338 MEM_MA_DATA348 MEM_MA_DATA358 MEM_MA_DATA368 MEM_MA_DATA378 MEM_MA_DATA388 MEM_MA_DATA398 MEM_MA_DATA408

MEM_MA_DATA418 MEM_MA_DATA428 MEM_MA_DATA438 MEM_MA_DATA448 MEM_MA_DATA458 MEM_MA_DATA468 MEM_MA_DATA478 MEM_MA_DATA488 MEM_MA_DATA498 MEM_MA_DATA508 MEM_MA_DATA518 MEM_MA_DATA528 MEM_MA_DATA538 MEM_MA_DATA548 MEM_MA_DATA558 MEM_MA_DATA568 MEM_MA_DATA578 MEM_MA_DATA588 MEM_MA_DATA598 MEM_MA_DATA608 MEM_MA_DATA618 MEM_MA_DATA628 MEM_MA_DATA638

MEM_MA_DM08 MEM_MA_DM18 MEM_MA_DM28 MEM_MA_DM38 MEM_MA_DM48 MEM_MA_DM58 MEM_MA_DM68 MEM_MA_DM78

MEM_MA_DQS0_P8 MEM_MA_DQS0_N8 MEM_MA_DQS1_P8 MEM_MA_DQS1_N8 MEM_MA_DQS2_P8 MEM_MA_DQS2_N8 MEM_MA_DQS3_P8 MEM_MA_DQS3_N8 MEM_MA_DQS4_P8 MEM_MA_DQS4_N8 MEM_MA_DQS5_P8 MEM_MA_DQS5_N8 MEM_MA_DQS6_P8 MEM_MA_DQS6_N8 MEM_MA_DQS7_P8 MEM_MA_DQS7_N8

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22

Y24 AB24 AB22 AA21

W22 W21

Y22 AA22

Y20 AA20 AA18 AB18 AB21 AD21 AD19

Y18 AD17

W16 W14

Y14

Y17 AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24

AC24

Y19

AB16

Y13 G13

H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

SKT-CPU638P-GP-U1

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

MEM:DATA

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0

MB_DQS_L0

MB_DQS_H1

MB_DQS_L1

MB_DQS_H2

MB_DQS_L2

MB_DQS_H3

MB_DQS_L3

MB_DQS_H4

MB_DQS_L4

MB_DQS_H5

MB_DQS_L5

MB_DQS_H6

MB_DQS_L6

MB_DQS_H7

MB_DQS_L7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

MEM_MB_DATA0 9 MEM_MB_DATA1 9 MEM_MB_DATA2 9 MEM_MB_DATA3 9 MEM_MB_DATA4 9 MEM_MB_DATA5 9 MEM_MB_DATA6 9 MEM_MB_DATA7 9 MEM_MB_DATA8 9 MEM_MB_DATA9 9 MEM_MB_DATA10 9 MEM_MB_DATA11 9 MEM_MB_DATA12 9 MEM_MB_DATA13 9 MEM_MB_DATA14 9 MEM_MB_DATA15 9 MEM_MB_DATA16 9 MEM_MB_DATA17 9 MEM_MB_DATA18 9 MEM_MB_DATA19 9 MEM_MB_DATA20 9 MEM_MB_DATA21 9 MEM_MB_DATA22 9 MEM_MB_DATA23 9 MEM_MB_DATA24 9 MEM_MB_DATA25 9 MEM_MB_DATA26 9 MEM_MB_DATA27 9 MEM_MB_DATA28 9 MEM_MB_DATA29 9 MEM_MB_DATA30 9 MEM_MB_DATA31 9 MEM_MB_DATA32 9 MEM_MB_DATA33 9 MEM_MB_DATA34 9 MEM_MB_DATA35 9 MEM_MB_DATA36 9 MEM_MB_DATA37 9 MEM_MB_DATA38 9 MEM_MB_DATA39 9 MEM_MB_DATA40 9 MEM_MB_DATA41 9 MEM_MB_DATA42 9 MEM_MB_DATA43 9 MEM_MB_DATA44 9 MEM_MB_DATA45 9 MEM_MB_DATA46 9 MEM_MB_DATA47 9 MEM_MB_DATA48 9 MEM_MB_DATA49 9 MEM_MB_DATA50 9 MEM_MB_DATA51 9 MEM_MB_DATA52 9 MEM_MB_DATA53 9 MEM_MB_DATA54 9 MEM_MB_DATA55 9 MEM_MB_DATA56 9 MEM_MB_DATA57 9 MEM_MB_DATA58 9 MEM_MB_DATA59 9 MEM_MB_DATA60 9 MEM_MB_DATA61 9 MEM_MB_DATA62 9 MEM_MB_DATA63 9

MEM_MB_DM0 9 MEM_MB_DM1 9 MEM_MB_DM2 9 MEM_MB_DM3 9 MEM_MB_DM4 9 MEM_MB_DM5 9 MEM_MB_DM6 9 MEM_MB_DM7 9

MEM_MB_DQS0_P 9 MEM_MB_DQS0_N 9 MEM_MB_DQS1_P 9 MEM_MB_DQS1_N 9 MEM_MB_DQS2_P 9 MEM_MB_DQS2_N 9 MEM_MB_DQS3_P 9 MEM_MB_DQS3_N 9 MEM_MB_DQS4_P 9 MEM_MB_DQS4_N 9 MEM_MB_DQS5_P 9 MEM_MB_DQS5_N 9 MEM_MB_DQS6_P 9 MEM_MB_DQS6_N 9 MEM_MB_DQS7_P 9 MEM_MB_DQS7_N 9

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

CPU_DDR_(2/4)

Olan

558Friday, April 18, 2008

-1

1D8V_S0

SC_0213

R304

300R2J-4-GP

D D

C C

B B

CPU_LDT_RST#20,57

CPU_PWRGD20,57

CPU_LDT_STOP#20

ALLOW_LDTSTOP12,20

678

RN47

RN47 SRN300J-1-GP

123

SRN300J-1-GP

4 5

1 2

R298 33R2J-2-GPR298 33R2J-2-GP

1 2

R297 Do Not StuffR297 Do Not Stuff

1 2

R296 Do Not StuffR296 Do Not Stuff

1 2

R299 Do Not StuffR299 Do Not Stuff

1 2

LDT_RST#_CPU 12

LDT_PWROK

LDT_STP#_CPU 12

CPU_LDT_REQ#_CPU

IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491

R136

1 2

Do Not Stuff

SC_0205

C158

2D5V_VDDA_S02D5V_S0

C306

C159

SC4D7U10V5ZY-3GP

SC10U10V5ZY-1GP

SB with 0402 PAD

Cloce To CPU

CPU_CLK3 CPU_CLK#3

LDT_RST#_CPU

HDT_RST#

For HDT DBG

1 2

C489 SC3900P50V2KX-2GPC489 SC3900P50V2KX-2GP

1 2

C490 SC3900P50V2KX-2GPC490 SC3900P50V2KX-2GP

1 2

R94

R94 Do Not Stuff

Do Not Stuff

1D2V_S0

TP2TP2

1D8V_S3

3D3V_S0

R308

10KR2J-3-GP

CPU_PWRGD_SVID_REG50

MMBT3904-3-GP

2ND = 84.03904.H11

Q17

CBE

84.03904.T11

R306

R306 2K2R2J-2-GP

2K2R2J-2-GP

LDT_PWROK_G

Do Not Stuff

LDT_PWROK

C484

300R2J-4-GP

CPU_TEST21 CPU_TEST21

R495

1 2

R294 169R2F-GPR294 169R2F-GP

LDT_PWROK LDT_STP#_CPU CPU_LDT_REQ#_CPU

1 2

R80 44D2R2F-GPR80 44D2R2F-GP

1 2

R82 44D2R2F-GPR82 44D2R2F-GP

CPU_VDD0_RUN_FB_H50 CPU_VDD0_RUN_FB_L50

CPU_VDD1_RUN_FB_H50 CPU_VDD1_RUN_FB_L50

TP74TP74 TP11TP11

TP12TP12 TP15TP15

TP14TP14

TP73TP73

R494

300R2J-4-GP

1 2

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

C149

C160

SC3300P50V2KX-1GP

TP72Do Not StuffTP72Do Not Stuff TP75Do Not StuffTP75Do Not Stuff TP79Do Not StuffTP79Do Not Stuff

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

TP76TP76 TP78TP78

TP1TP1 TP77TP77

R290

1 2

Do Not Stuff

SC_0205

SCD22U16V3ZY-GP

SC10U10V5ZY-1GP

CLKCPU_IN

CLKCPU#_IN

CPU_SIC

CPU_SID

CPU_ALERT#

CPU_HTREF0 CPU_HTREF1

CPU_TEST23

CPU_TEST18

CPU_TEST19

CPU_TEST25_H

CPU_TEST25_L

CPU_TEST20

CPU_TEST24 CPU_TEST22

CPU_TEST12

CPU_TEST27

CPU_TEST9

U38D

VDDA1

VDDA2

CLKIN_H

CLKIN_L

RESET_L

PWROK

F10

LDTSTOP_L

LDTREQ_L

AF4

SIC

AF5

SID

AE6

ALERT_L

HT_REF0

HT_REF1

VDD0_FB_H

VDD0_FB_L

VDD1_FB_H

AB6

VDD1_FB_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI

AD7

TEST23

H10

TEST18

TEST19

TEST25_H

TEST25_L

AB8

TEST21

AF7

TEST20

AE7

TEST24

AE8

TEST22

AC8

TEST12

AF8

TEST27

TEST9

AA6

TEST6

RSVD1

RSVD2

RSVD3

RSVD4

RSVD5

SKT-CPU638P-GP-U1

KEY1 KEY2

SVC SVD

THERMTRIP_L

PROCHOT_L

MEMHOT_L

THERMDC THERMDA

VDDIO_FB_H

VDDIO_FB_L

VDDNB_FB_H

VDDNB_FB_L

DBREQ_L

TDO

TEST28_H

TEST28_L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_H

TEST29_L

RSVD10

RSVD9 RSVD8 RSVD7 RSVD6

1D8V_S3

RN71

RN71 SRN1KJ-7-GP

M11 W18

A6 A4

THERMTRIP#

AF6

PROCHOT#

AC7

CPU_MEMHOT#

AA8

internal pull high 300 ohm

W7 W8

1 2

C76

C76 Do Not Stuff

Do Not Stuff

CPU_VDDIO_SUS_FB_H

CPU_VDDIO_SUS_FB_L

Y9 H6

CPU_DBREQ#

E10

CPU_TDO

AE9

CPU_TEST28_H

CPU_TEST28_L

CPU_TEST17

CPU_TEST16

CPU_TEST15

CPU_TEST14

C7 C3

K8 C4

CPU_TEST29H

CPU_TEST29L

H18 H19 AA7 D5 C5

SRN1KJ-7-GP

2 3

CPU_SVC 50 CPU_SVD 50

H_THERMDC 25 H_THERMDA 25

1 1

CPU_VDDNB_RUN_FB_H 50 CPU_VDDNB_RUN_FB_L 50

LAYOUT: Route FBCLKOUT_H/L differentially impedance 80

TP8TP8

TP10TP10

TP16TP16

TP13TP13

TP9TP9

TP18TP18

TP19TP19

TP17TP17

TP6TP6 TP3TP3

1D8V_S3

678

123

RN64

RN64 SRN300J-1-GP

SRN300J-1-GP

4 5

CPU_DBREQ#

R246

1 2

Do Not Stuff

HDT Connectors

Near CPU PIN

1D8V_S3

A A

THERMTRIP#

CPU exceeds to 125

R291

R291 2K2R2J-2-GP

2K2R2J-2-GP

1D8V_SUS_Q2

SCD1U16V2ZY-2GP

Q15

MMBT3904-3-GP

84.03904.T11

LDT_PWROK

C483

1 2

2ND = 84.03904.H11

KBC_THERMTRIP# 25,43

UMA NODOCK

Title

Size Document Number Rev

Date: Sheet

CPU_Control&Debug_(3/4)

Olan

The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN

PROCHOT#_SB 20

HDT1

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO

Do Not Stuff

HDT_RST#

Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

24 26

658Monday, May 05, 2008

-2M

U38F

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

D D

C C

B B

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

VSS28

VSS29

VSS30

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

VSS40

VSS41

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

VSS51

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

VSS61

VSS62

H21

VSS63

H23

VSS64

VSS65

SKT-CPU638P-GP-U1

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

VCC_CORE_S0_0

Bottom Side Decoupling Bottom Side Decoupling

C82

C125

C119

SC10U6D3V5KX-1GP

VDDNB

SC10U6D3V5KX-1GP

1D8V_S3

C119

SC10U6D3V5KX-1GP

3A for VDDNB

SC10U6D3V5KX-1GP

C50

C118

Bottom Side Decoupling

C98

C84

C117

SC10U6D3V5KX-1GP

C117

SC10U6D3V5KX-1GP

SCD22U6D3V2KX-1GP

36A for VDD0&VDD1

U38E

VDD0_1

VDD0_2

VDD0_3

J11

VDD0_4

J13

C94

SC10U6D3V5KX-1GP

C115

C120

SCD22U6D3V2KX-1GP

SC10U6D3V5KX-1GP

C104

C99

SCD22U6D3V2KX-1GP

C129

SCD01U50V2KX-1GP

SC180P50V2JN-1GP

C97

C128

SC180P50V2JN-1GP

VDD0_5

J15

VDD0_6

VDD0_7

K10

VDD0_8

K12

VDD0_9

K14

VDD0_10

VDD0_11

VDD0_12

VDD0_13

L11

VDD0_14

L13

VDD0_15

L15

VDD0_16

VDD0_17

VDD0_18

VDD0_19

M10

VDD0_20

VDD0_21

VDD0_22

N11

VDD0_23

K16

VDDNB_1

M16

VDDNB_2

P16

VDDNB_3

T16

VDDNB_4

V16

VDDNB_5

H25

VDDIO1

J17

VDDIO2

K18

VDDIO3

K21

VDDIO4

K23

VDDIO5

K25

VDDIO6

L17

VDDIO7

M18

VDDIO8

M21

VDDIO9

M23

VDDIO10

M25

VDDIO11

N17

VDDIO12

SKT-CPU638P-GP-U1

VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8

VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26

VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

VCC_CORE_S0_1

C95

C57

C80

SC180P50V2JN-1GP

C57

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

C93

C102

SC10U6D3V5KX-1GP

Place near to CPU

C105

C101

SC180P50V2JN-1GP

C105

C127

SCD01U50V2KX-1GP

SCD22U6D3V2KX-1GP

C108

SCD22U6D3V2KX-1GP

C116

C103

C65

SC10U6D3V5KX-1GP

2A for VDDIO

C124

C111

C143

SCD22U6D3V2KX-1GP

C143

SCD22U6D3V2KX-1GP

SC4D7U6D3V3KX-GP

1D8V_S3

C150

C110

SC4D7U6D3V3KX-GP

C156

SC4D7U6D3V3KX-GP

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

CPU_Power_(4/4)

Olan

758Friday, April 18, 2008

-1

D D

MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215

C C

B B

A A

VREF_DDR_MEM

MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635

MEM_MA_DQS0_N5 MEM_MA_DQS1_N5 MEM_MA_DQS2_N5 MEM_MA_DQS3_N5 MEM_MA_DQS4_N5 MEM_MA_DQS5_N5 MEM_MA_DQS6_N5 MEM_MA_DQS7_N5

MEM_MA_DQS0_P5 MEM_MA_DQS1_P5 MEM_MA_DQS2_P5 MEM_MA_DQS3_P5 MEM_MA_DQS4_P5 MEM_MA_DQS5_P5 MEM_MA_DQS6_P5 MEM_MA_DQS7_P5

SC2D2U6D3V3KX-GP

MEM_MA_ADD05,10 MEM_MA_ADD15,10 MEM_MA_ADD25,10 MEM_MA_ADD35,10 MEM_MA_ADD45,10 MEM_MA_ADD55,10 MEM_MA_ADD65,10 MEM_MA_ADD75,10 MEM_MA_ADD85,10 MEM_MA_ADD95,10 MEM_MA_ADD105,10 MEM_MA_ADD115,10 MEM_MA_ADD125,10 MEM_MA_ADD135,10 MEM_MA_ADD145,10 MEM_MA_ADD155,10

MEM_MA_BANK25,10 MEM_MA_BANK05,10 MEM_MA_BANK15,10

MEM_MA0_ODT05,10 MEM_MA0_ODT15,10

SCD1U10V2KX-4GP

C265

C262

Place C2.2uF and 0.1uF < 500mils from DDR connector

DIMM2

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16/BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

VREF

VSS

202

GND

MH1

DDR2-200P-22-GP-U2

62.10017.A61

2ND = 62.10017.A51

HI 9.2mm

Main Source:

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

CKE0

CKE1

CK0

CK0#

164

CK1

166

CK1#

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NORMAL TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS GND MH2

69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

(A0)

1D8V_S3

MEM_MA_RAS# 5,10 MEM_MA_WE# 5,10 MEM_MA_CAS# 5,10

MEM_MA0_CS#0 5,10 MEM_MA0_CS#1 5,10

MEM_MA_CKE0 5,10 MEM_MA_CKE1 5,10

MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5

MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5

MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5

SMBD0_SB 3,9,21

SMBC0_SB 3,9,21

Do Not Stuff

SC1D5P50V2CN-1GP

1D8V_S3

C46

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

DDR_VREF

RN57

1 2 3

SRN1KJ-7-GP

LAYOUT: Locate close to DIMM

3D3V_S0

MEM_MA_CLK0_P

C505

MEM_MA_CLK0_N MEM_MA_CLK1_P

C70

MEM_MA_CLK1_N

SCD1U10V2KX-4GP

C45

C45 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VREF_DDR_MEM

C506

SCD1U10V2KX-4GP

C503

C267

SC1KP50V2KX-1GP

UMA NODOCK

Title

Size Document Number Rev

Custom

Date: Sheet

DDR_SO-DIMM SKT_1

Olan

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

858Friday, April 18, 2008

-1

MEM_MB_ADD05,10 MEM_MB_ADD15,10 MEM_MB_ADD25,10 MEM_MB_ADD35,10 MEM_MB_ADD45,10 MEM_MB_ADD55,10 MEM_MB_ADD65,10 MEM_MB_ADD75,10 MEM_MB_ADD85,10

MEM_MB_ADD95,10 MEM_MB_ADD105,10 MEM_MB_ADD115,10

D D

C C

B B

A A

VREF_DDR_MEM

MEM_MB_ADD125,10 MEM_MB_ADD135,10 MEM_MB_ADD145,10 MEM_MB_ADD155,10

MEM_MB_BANK25,10 MEM_MB_BANK05,10 MEM_MB_BANK15,10

MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 SMBD0_SB 3,8,21 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85

MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115 MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635

MEM_MB_DQS0_N5 MEM_MB_DQS1_N5 MEM_MB_DQS2_N5 MEM_MB_DQS3_N5 MEM_MB_DQS4_N5 MEM_MB_DQS5_N5 MEM_MB_DQS6_N5 MEM_MB_DQS7_N5

MEM_MB_DQS0_P5 MEM_MB_DQS1_P5 MEM_MB_DQS2_P5 MEM_MB_DQS3_P5 MEM_MB_DQS4_P5 MEM_MB_DQS5_P5 MEM_MB_DQS6_P5 MEM_MB_DQS7_P5

MEM_MB0_ODT05,10 MEM_MB0_ODT15,10

SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

Place C2.2uF and 0.1uF < 500mils from DDR connector

C509

C508

DIMM1

102

101

100

105

A10/AP

A11

A12

116

A13

A14

A15

A16/BA2

107

BA0

106

BA1

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

DQ8

DQ9

DQ10

DQ11

DQ12

DQ13

DQ14

DQ15

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

DQ24

DQ25

DQ26

DQ27

DQ28

DQ29

DQ30

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

DQS0#

DQS1#

DQS2#

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

DQS0

DQS1

DQS2

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

VREF

VSS

202

GND

MH1

SKT-SODIMM20020U3GP

62.10017.661

2ND = 62.10017.A41

LOW 5.2 mm

Main Source:

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

CKE0

CKE1

CK0

CK0#

164

CK1

166

CK1#

DM0

DM1

DM2

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

REVERSE TYPE

GND

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

MH2

DIMM2_SA1

198

SA0

200

SA1

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

R62 10KR2J-3-GPR62 10KR2J-3-GP

1D8V_S3

1 2

(A2)

MEM_MB_RAS# 5,10 MEM_MB_WE# 5,10 MEM_MB_CAS# 5,10

MEM_MB0_CS#0 5,10 MEM_MB0_CS#1 5,10

MEM_MB_CKE0 5,10 MEM_MB_CKE1 5,10

MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5

MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5

MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5

SMBC0_SB 3,8,21

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

3D3V_S0

Do Not Stuff

MEM_MB_CLK0_P

C504

C504 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK0_N MEM_MB_CLK1_P

C71

C71 SC1D5P50V2CN-1GP

SC1D5P50V2CN-1GP

MEM_MB_CLK1_N

C445

C447

C447 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA NODOCK

Title

Size Document Number Rev

Custom

Date: Sheet

DDR_SO-DIMM SKT_2

Olan

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

958Monday, May 05, 2008

-2M

Decoupling Capacitor

0D9V_S3

C171

SCD1U16V2ZY-2GP

D D

PARALLEL TERMINATION

SCD1U16V2ZY-2GP

Put decap near power(0.9V) and pull-up resistor

C123

SCD1U16V2ZY-2GP

C113

C161

SCD1U16V2ZY-2GP

C154

C172

SCD1U16V2ZY-2GP

C134

SCD1U16V2ZY-2GP

C169

SC1KP50V2KX-1GP

C170

SC1KP50V2KX-1GP

C130

SC1KP50V2KX-1GP

C168

SC1KP50V2KX-1GP

C174

C173

SC10P50V2JN-4GP

Put decap near power(0.9V) and pull-up resistor

0D9V_S30D9V_S3

RN13

RN7

1 2 3 4 5

C C

B B

1 2 3 4 5

SRN47J-4-GP

RN14

SRN47J-4-GP

RN12

SRN47J-4-GP

RN18

SRN47J-4-GP

RN10

SRN47J-4-GP

RN16

SRN47J-4-GP

RN5

SRN47J-4-GP

8 7 6

MEM_MA0_ODT1 5,8 MEM_MA0_CS#1 5,8 MEM_MA_WE# 5,8 MEM_MA_CAS# 5,8

MEM_MA_ADD5 5,8 MEM_MA_ADD6 5,8 MEM_MA_ADD8 5,8 MEM_MA_CKE1 5,8

MEM_MA_ADD2 5,8 MEM_MA_ADD4 5,8

MEM_MA_BANK1 5,8

MEM_MA_ADD0 5,8

MEM_MA_ADD12 5,8

MEM_MA_ADD9 5,8

MEM_MA_BANK2 5,8

MEM_MA_CKE0 5,8

MEM_MA_BANK0 5,8

MEM_MA_ADD10 5,8 MEM_MA_ADD3 5,8 MEM_MA_ADD1 5,8

MEM_MA_ADD15 5,8

MEM_MA_ADD14 5,8 MEM_MA_ADD7 5,8

MEM_MA_ADD11 5,8

MEM_MA_RAS# 5,8

MEM_MA0_CS#0 5,8

MEM_MA_ADD13 5,8

MEM_MA0_ODT0 5,8

RN13

1 2 3 4 5

SRN47J-4-GP

RN11

1 2 3 4 5

SRN47J-4-GP

RN8

1 2 3 4 5

SRN47J-4-GP

RN15

1 2 3 4 5

SRN47J-4-GP

RN17

1 2 3 4 5

SRN47J-4-GP

RN9

1 2 3 4 5

SRN47J-4-GP

SRN47J-4-GP RN6

RN6

1 2 3 4 5

SRN47J-4-GP

8 7 6

MEM_MB_ADD4 5,9 MEM_MB_ADD11 5,9 MEM_MB_ADD5 5,9 MEM_MB_ADD8 5,9

MEM_MB_ADD6 5,9 MEM_MB_ADD2 5,9 MEM_MB_ADD0 5,9 MEM_MB_BANK1 5,9

MEM_MB_RAS# 5,9 MEM_MB0_CS#0 5,9 MEM_MB0_ODT0 5,9 MEM_MB_ADD13 5,9

MEM_MB_BANK2 5,9 MEM_MB_ADD12 5,9 MEM_MB_ADD9 5,9 MEM_MB_CKE0 5,9

MEM_MB_CKE1 5,9 MEM_MB_ADD15 5,9 MEM_MB_ADD14 5,9 MEM_MB_ADD7 5,9

MEM_MB_BANK0 5,9 MEM_MB_ADD10 5,9 MEM_MB_ADD1 5,9 MEM_MB_ADD3 5,9

MEM_MB0_ODT1 5,9 MEM_MB0_CS#1 5,9 MEM_MB_CAS# 5,9 MEM_MB_WE# 5,9

Place these Caps near DM1

1D8V_S3

C147

SC2D2U6D3V3KX-GP

C473

SC2D2U6D3V3KX-GP

C133

SCD1U16V2ZY-2GP

C469

SC2D2U6D3V3KX-GP

C474

SC2D2U6D3V3KX-GP

C122

SCD1U16V2ZY-2GP

C136

SCD1U16V2ZY-2GP

C482

SCD01U50V2KX-1GP

C137

SCD1U16V2ZY-2GP

Place these Caps near DM2

Place these Caps near PARALLEL TERMINATION

0D9V_S3

C141

SCD1U16V2ZY-2GP

C146

C477

SC2D2U6D3V3KX-GP

1D8V_S3

SC2D2U6D3V3KX-GP

C166

SCD1U16V2ZY-2GP

C475

SC2D2U6D3V3KX-GP

C470

SC2D2U6D3V3KX-GP

C153

C152

SCD1U16V2ZY-2GP

C480

SCD01U50V2KX-1GP

C135

SCD1U16V2ZY-2GP

C139

SCD1U16V2ZY-2GP

C162

SC180P50V2JN-1GP

C144

SCD1U16V2ZY-2GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3

C165

SC180P50V2JN-1GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3

1D8V_S3

C148

SCD1U16V2ZY-2GP

Do not share the Term resistor between the DDR addess and Control Signals.

C126

C157

SCD1U16V2ZY-2GP

C175

SCD1U16V2ZY-2GP

C142

SCD1U16V2ZY-2GP

A A

C163

SCD1U16V2ZY-2GP

C151

SCD1U16V2ZY-2GP

C140

C131

SCD1U16V2ZY-2GP

C132

SCD1U16V2ZY-2GP

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR_DAMPING & TERMINATION

Size Document Number Rev

Date: Sheet

Olan

10 58Friday, April 18, 2008

-1

HT_CPU_NB_CAD_H04 HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44 HT_CPU_NB_CAD_H54

D D

C C

PEG_RXN[15..0]37 PEG_RXP[15..0]37

B B

MINICARD MINICARD NEW CARD

A A

A-LINK

HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74

HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154

HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14

HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14

1 2

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

LAN

ALINK_NBRX_SBTX_P020 ALINK_NBRX_SBTX_N020 ALINK_NBRX_SBTX_P120 ALINK_NBRX_SBTX_N120 ALINK_NBRX_SBTX_P220 ALINK_NBRX_SBTX_N220 ALINK_NBRX_SBTX_P320 ALINK_NBRX_SBTX_N320

R100

R100 301R2F-GP

301R2F-GP

PEG_RXP0

PEG_RXN0

PEG_RXP1

PEG_RXN1

PEG_RXP2

PEG_RXN2

PEG_RXP3

PEG_RXN3

PEG_RXP4

PEG_RXN4

PEG_RXP5

PEG_RXN5

PEG_RXP6

PEG_RXN6

PEG_RXP7

PEG_RXN7

PEG_RXP8

PEG_RXN8

PEG_RXP9

PEG_RXN9

PEG_RXP10

PEG_RXN10

PEG_RXP11

PEG_RXN11

PEG_RXP12

PEG_RXN12

PEG_RXP13

PEG_RXN13

PEG_RXP14

PEG_RXN14

PEG_RXP15

PEG_RXN15

PCIE_RXP135 PCIE_RXN135 PCIE_RXP239 PCIE_RXN239 PCIE_RXP538 PCIE_RXN538

TP187Do Not StuffTP187Do Not Stuff TP188Do Not StuffTP188Do Not Stuff

U43A

Y25

HT_RXCAD0P

Y24

HT_RXCAD0N

V22

HT_RXCAD1P

V23

HT_RXCAD1N

V25

HT_RXCAD2P

V24

HT_RXCAD2N

U24

HT_RXCAD3P

U25

HT_RXCAD3N

T25

HT_RXCAD4P

T24

HT_RXCAD4N

P22

HT_RXCAD5P

P23

HT_RXCAD5N

P25

HT_RXCAD6P

P24

HT_RXCAD6N

N24

HT_RXCAD7P

N25

HT_RXCAD7N

AC24

HT_RXCAD8P

AC25

HT_RXCAD8N

AB25

HT_RXCAD9P

AB24

HT_RXCAD9N

AA24

HT_RXCAD10P

AA25

HT_RXCAD10N

Y22

HT_RXCAD11P

Y23

HT_RXCAD11N

W21

HT_RXCAD12P

W20

HT_RXCAD12N

V21

HT_RXCAD13P

V20

HT_RXCAD13N

U20

HT_RXCAD14P

U21

HT_RXCAD14N

U19

HT_RXCAD15P

U18

HT_RXCAD15N

T22

HT_RXCLK0P

T23

HT_RXCLK0N

AB23

HT_RXCLK1P

AA22

HT_RXCLK1N

M22

HT_RXCTL0P

M23

HT_RXCTL0N

R21

HT_RXCTL1P

R20

HT_RXCALP HT_TXCALP HT_RXCALN

GPP_RX5P GPP_RX5N

HT_RXCTL1N

C23

HT_RXCALP

A24

HT_RXCALN

RS780M-GP-U1

U43B

GFX_RX0P

GFX_RX0N

GFX_RX1P

GFX_RX1N

GFX_RX2P

GFX_RX2N

GFX_RX3P

GFX_RX3N

GFX_RX4P

GFX_RX4N

GFX_RX5P

GFX_RX5N

GFX_RX6P

GFX_RX6N

GFX_RX7P

GFX_RX7N

GFX_RX8P

GFX_RX8N

GFX_RX9P

GFX_RX9N

GFX_RX10P

GFX_RX10N

GFX_RX11P

GFX_RX11N

GFX_RX12P

GFX_RX12N

GFX_RX13P

GFX_RX13N

GFX_RX14P

GFX_RX14N

GFX_RX15P

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

GPP_RX3P

GPP_RX3N

GPP_RX4P

GPP_RX4N

GPP_RX5P

GPP_RX5N

AA8

SB_RX0P

SB_RX0N

AA7

SB_RX1P

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

SB_RX3P

SB_RX3N

RS780M-GP-U1

PART 1 OF 6

PART 2 OF 6

PCIE I/F GPP

PCIE I/F SB

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P

HT_TXCLK0N

HT_TXCLK1P

HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P

HT_TXCTL0N

HT_TXCTL1P

HT_TXCTL1N

HT_TXCALP HT_TXCALN

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

PCIE I/F GFX

PCE_CALRP PCE_CALRN

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5

AC8 AB8

HT_TXCALN

Placement: close RS780

GTXP0 GTXN0 GTXP1 GTXN1 GTXP2 GTXN2 GTXP3 GTXN3 GTXP4 GTXN4 GTXP5 GTXN5 GTXP6 GTXN6 GTXP7 GTXN7 GTXP8 GTXN8 GTXP9 GTXN9 GTXP10 GTXN10 GTXP11 GTXN11 GTXP12 GTXN12 GTXP13 GTXN13 GTXP14 GTXN14 GTXP15 GTXN15

TXP1 TXN1 TXP2 TXN2 TXP5 TXN5

GPP_TX5P GPP_TX5N

ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3

PCE_PCAL PCE_NCAL

Place < 100mils from pin AC8 and AB8

HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4

HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4

HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4

HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4

1 2

C231 Do Not Stuff

1 2

DIS

C232 Do Not Stuff

1 2

DIS

C211 Do Not Stuff

1 2

DIS

C212 Do Not Stuff

1 2

DIS

C233 Do Not Stuff

1 2

DIS

C234 Do Not Stuff

1 2

DIS

C229 Do Not Stuff

1 2

DIS

C230 Do Not Stuff

1 2

DIS

C235 Do Not Stuff

1 2

DIS

C236 Do Not Stuff

1 2

DIS

C207 Do Not Stuff

1 2

DIS

C208 Do Not Stuff

1 2

DIS

C237 Do Not Stuff

1 2

DIS

C238 Do Not Stuff

1 2

DIS

C213 Do Not Stuff

1 2

DIS

C214 Do Not Stuff

1 2

DIS

C239 Do Not Stuff

1 2

DIS

C240 Do Not Stuff

1 2

DIS

C217 Do Not Stuff

1 2

DIS

C218 Do Not Stuff

1 2

DIS

C243 Do Not Stuff

1 2

DIS

C244 Do Not Stuff

1 2

DIS

C215 Do Not Stuff

1 2

DIS

C216 Do Not Stuff

1 2

DIS

C241 Do Not Stuff

1 2

DIS

C242 Do Not Stuff

1 2

DIS

C209 Do Not Stuff

1 2

DIS

C210 Do Not Stuff

1 2

DIS

C245 Do Not Stuff

1 2

DIS

C246 Do Not Stuff

1 2

DIS

C219 Do Not Stuff

1 2

DIS

C220 Do Not Stuff

1 2

DIS

C523 SCD1U10V2KX-4GPC523 SCD1U10V2KX-4GP

1 2

C525 SCD1U10V2KX-4GPC525 SCD1U10V2KX-4GP

1 2

C520 SCD1U10V2KX-4GPC520 SCD1U10V2KX-4GP

1 2

C522 SCD1U10V2KX-4GPC522 SCD1U10V2KX-4GP

1 2

C517 SCD1U10V2KX-4GPC517 SCD1U10V2KX-4GP

1 2

C519 SCD1U10V2KX-4GPC519 SCD1U10V2KX-4GP

1 2

C548 SCD1U10V2KX-4GPC548 SCD1U10V2KX-4GP C549 SCD1U10V2KX-4GPC549 SCD1U10V2KX-4GP C538 SCD1U10V2KX-4GPC538 SCD1U10V2KX-4GP C539 SCD1U10V2KX-4GPC539 SCD1U10V2KX-4GP C546 SCD1U10V2KX-4GPC546 SCD1U10V2KX-4GP C547 SCD1U10V2KX-4GPC547 SCD1U10V2KX-4GP C536 SCD1U10V2KX-4GPC536 SCD1U10V2KX-4GP C537 SCD1U10V2KX-4GPC537 SCD1U10V2KX-4GP

1 2

R354 1K27R2F-L-GPR354 1K27R2F-L-GP

1 2

R120 2KR2F-3-GPR120 2KR2F-3-GP

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

R104

R104 301R2F-GP

301R2F-GP

PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15

TP190 Do Not StuffTP190 Do Not Stuff TP189 Do Not StuffTP189 Do Not Stuff

1D1V_S0

GTXP0 GTXN0 GTXP1 GTXN1 GTXP2 GTXN2 GTXP3 GTXN3

RS780M Display Port Support(muxed on GFX)

DP0

PCIE_TXP1 35

PCIE_TXN1 35

PCIE_TXP2 39

PCIE_TXN2 39

PCIE_TXP5 38

PCIE_TXN5 38

ALINK_NBTX_C_SBRX_P0 20 ALINK_NBTX_C_SBRX_N0 20 ALINK_NBTX_C_SBRX_P1 20 ALINK_NBTX_C_SBRX_N1 20 ALINK_NBTX_C_SBRX_P2 20 ALINK_NBTX_C_SBRX_N2 20 ALINK_NBTX_C_SBRX_P3 20 ALINK_NBTX_C_SBRX_N3 20

C675 Do Not Stuff

UMA&Dock

UMA&Dock UMA&Dock

UMA&Dock

1 2

C676 Do Not Stuff

1 2

C677 Do Not Stuff

1 2

C678 Do Not Stuff

1 2

C679 Do Not Stuff

1 2

C680 Do Not Stuff

1 2

C681 Do Not Stuff

1 2

C682 Do Not Stuff

1 2

PEG_TXP[15..0] 37 PEG_TXN[15..0] 37

GFX_TX0,TX1,TX2,TX3,AUX0,HPD0 GFX_TX4,TX5,TX6,TX7,AUX1,HPD1DP1

LAN

NEW CARD

UMA NODOCK

Title

ATi-RS780M_HT LINK&PCIe(1/3)

Size Document Number Rev

Date: Sheet

Olan

TMDS_UMA_TX2+ 46

TMDS_UMA_TX2- 46

TMDS_UMA_TX1+ 46

TMDS_UMA_TX1- 46

TMDS_UMA_TX0+ 46

TMDS_UMA_TX0- 46

TMDS_UMA_TXC+ 46

TMDS_UMA_TXC- 46

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

11 58Monday, April 21, 2008

-1

1 2

LDT_RST#_CPU6

D D

PLT_RST1#20,35

R314 Do Not Stuff

1 2

R313 Do Not StuffR313 Do Not Stuff

C551

SC330P50V2KX-3GP

C551

SYSREST#

Do Not Stuff

NB_LDT_STOP#

NB_ALLOW_LDTSTOP

1D1V_S0

2ND = 68.00084.A81

1D8V_S0

2ND = 68.00084.A81

1 2

FCM1608CF-221T02-GP

220ohm 200mA

SC1U10V2KX-1GP

1 2

FCM1608CF-221T02-GP

220ohm 200mA

SC1U10V2KX-1GP

LDT_STP#_CPU6

C C

ALLOW_LDTSTOP6,20

1 2

R295 Do Not StuffR295 Do Not Stuff

SC_0205

R303

1 2

SC_0213

ENABLE External CLK GEN

1D8V_S0

B B

1 2

FCM1608CF-221T02-GP

220ohm 200mA

2ND = 68.00084.A81

1D8V_S0

1 2

FCM1608CF-221T02-GP

220ohm 200mA

2ND = 68.00084.A81

VDDA18HTPLL

C199

SC1U10V2KX-1GP

VDDA18PCIEPLL

C223

SC1U10V2KX-1GP

C206

C206 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C248

C248 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

GPIO MODE STRP_DATA 01 VCC_NB

1.0V 1.1V

3D3V_S0

FCM1608CF-221T02-GP

220ohm 200mA

2ND = 68.00084.A81

1D8V_S0

SC_0205

1D8V_S0

R95

1 2

FCM1608CF-221T02-GP

220ohm 200mA

2ND = 68.00084.A81

SC1U10V2KX-1GP

SC_0219

GMCH_RED45

GMCH_GREEN45

GMCH_BLUE45

Close to NB ball

1D1V_S0_PLLVDD

C202

C202 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP C196

C196

1D1V_S0

SCD1U10V2KX-4GP

RN20

1 2 3

SRN1KJ-7-GP

C203

C194

CLK_DDC_EDID16

DAT_DDC_EDID16

NB_HDMI_DATA46

NB_HDMI_CLK46

1 2

C193

1 2

Do Not Stuff

C191

GMCH_HSYNC18 GMCH_VSYNC18

GMCH_DDCCLK18

GMCH_DDCDATA18

C193

R96

C190

-2M_0421

TP93Do Not StuffTP93Do Not Stuff TP22Do Not StuffTP22Do Not Stuff

SC1U10V2KX-1GP

C182

C182 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

-2M_0421

R103 133R2F-GP

R103 133R2F-GP R102 150R2F-1-GP

R102 150R2F-1-GP R101 150R2F-1-GP

R101 150R2F-1-GP

NB_PWRGD21,48

CLK_NBHT_CLK3 CLK_NBHT_CLK#3

CLK_NB_14M3

1 2

R312

R312 150R2F-1-GP

150R2F-1-GP

3D3V_S0_AVDD

C192

C192 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_S0_AVDDDI

C189

C189 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_S0_AVDDQ

1 2 1 2 1 2

R109

1 2

715R2F-1-GP

1D8V_S0_PLVDD18

VDDA18HTPLL

VDDA18PCIEPLL

SYSREST#

NB_LDT_STOP#

NB_ALLOW_LDTSTOP

NB_REFCLK_N

CLK_NB_GFX3 CLK_NB_GFX#3

CLK_NBGPP_CLK

TP116Do Not StuffTP116Do Not Stuff

CLK_NBGPP_CLK#

TP115Do Not StuffTP115Do Not Stuff

CLK_NB_GPPSB3 CLK_NB_GPPSB#3

RS780_AUX_CAL

UMA

UMA UMA

UMA

DAC_RSET

NB_DVI_CLK NB_DVI_DATA

STRP_DATA

U43C

F12

AVDD1

E12

AVDD2

F14

AVDDDI

G15

AVSSDI

H15

AVDDQ

H14

AVSSQ

E17

C_Pr

F17

F15

COMP_Pb

G18

RED

G17

REDb

E18

GREEN

F18

GREENb

E19

BLUE

F19

BLUEb

A11

DAC_HSYNC

B11

DAC_VSYNC

DAC_SCL

DAC_SDA

G14

DAC_RSET

A12

PLLVDD

D14

PLLVDD18

B12

PLLVSS

H17

VDDA18HTPLL

VDDA18PCIEPLL1

VDDA18PCIEPLL2

SYSRESET#

A10

POWERGOOD

C10

LDTSTOP#

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN

F11

REFCLK_N

GFX_REFCLKP

GFX_REFCLKN

GPP_REFCLKP

GPP_REFCLKN

GPPSB_REFCLKP

GPPSB_REFCLKN

I2C_CLK

I2C_DATA

DDC_CLK0/AUX0P

DDC_DATA0/AUX0N

DDC_CLK1/AUX1P

DDC_DATA1/AUX1N

B10

STRP_DATA

G11

RESERVED

AUX_CAL

RS780M-GP-U1

3D3V_S0

678

123

4 5

-2_0403

DDC_DATA0/AUX0N DDC_CLK0/AUX0P

RN72

RN72 SRN3K3J-1-GP

SRN3K3J-1-GP

GMCH_VSYNC

GMCH_HSYNC

PART 3 OF 6

CRT/TVOUT

CLOCKs PLL PWR

MIS.

LVTM

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#) 1 :Disable 0 : Enable

RS780: Enables Side port memory ( RS780 use HSYNC#)

1 :Disable 0 : Enable

SUS_STAT#

Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values

0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected

TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N

TXOUT_U0P

TXOUT_U0N

TXOUT_U1P

TXOUT_U1N

TXOUT_U2P

TXOUT_U2N

TXOUT_U3P

TXOUT_U3N

TXCLK_LP

TXCLK_LN TXCLK_UP TXCLK_UN

VDDLTP18

VSSLTP18

VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

LVDS_DIGON

LVDS_BLON

LVDS_ENA_BL

TMDS_HPD

HPD

SUS_STAT#

THERMALDIODE_P

THERMALDIODE_N

TESTMODE

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

GMCH_BL_ON

LVDS_ENA_BL

G12

D9 D10

D12 AE8

AD8

TESTMODE_NB

D13

GMCH_TXAOUT0+ 16 GMCH_TXAOUT0- 16 GMCH_TXAOUT1+ 16 GMCH_TXAOUT1- 16 GMCH_TXAOUT2+ 16 GMCH_TXAOUT2- 16

GMCH_TXBOUT0+ 16 GMCH_TXBOUT0- 16 GMCH_TXBOUT1+ 16 GMCH_TXBOUT1- 16 GMCH_TXBOUT2+ 16 GMCH_TXBOUT2- 16

GMCH_TXACLK+ 16

GMCH_TXACLK- 16

GMCH_TXBCLK+ 16

GMCH_TXBCLK- 16

1D8V_S0_VDDLP18

C496

SC1U10V2KX-1GP

1D8V_S0_VDDLT18

SC4D7U6D3V3KX-GP

NB_DVI_HPD SUS_STAT#

L20

1 2

FCM1608CF-221T02-GP

C498

2ND = 68.00084.A81

SCD1U10V2KX-4GP

L21

1 2

PBY201209T-221Y-N-GP

C499

2ND = 68.00216.161

SCD1U10V2KX-4GP

C500

R110 Do Not Stuff

SCD1U10V2KX-4GP

RN29

2 3 1

UMA

SRN4K7J-8-GP

1 2

NB_HDMI_HPD 46

TP92 Do Not StuffTP92 Do Not Stuff

R496

10KR2J-3-GP

R108

R108 1K8R2F-GP

1K8R2F-GP

GMCH_BL_ON 43

-1_0301

3D3V_S0

1D8V_S0

GMCH_LCDVDD_ON 16

TP23 Do Not StuffTP23 Do Not Stuff

3D3V_S0

R310

A A

R310 Do Not Stuff

Do Not Stuff

STRP_DATA

-2_0403

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-RS780M_LVDS&CRT_(2/4)

Size Document Number Rev

Date: Sheet

Olan

12 58Monday, May 05, 2008

-2M

1D1V_S0

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

2ND = 68.00216.161

D D

1D1V_S0

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

2ND = 68.00216.161

1D2V_S0

1 2

PBY201209T-221Y-N-GP

220 ohm @ 100MHz,2A

2ND = 68.00216.161

C C

220 ohm @ 100MHz,2A

1D8V_S0

1 2

PBY201209T-221Y-N-GP

2ND = 68.00216.161

1D8V_S0

SC1U10V2KX-1GP

C288

SC4D7U6D3V3KX-GP

C542

80mil Width

SC4D7U6D3V3KX-GP

C284

0.6A per ANT Rev1.1, Page3

+1.1V_RUN_VDDHT

SCD1U10V2KX-4GP

C261

SCD1U10V2KX-4GP

C268

C266

SCD1U10V2KX-4GP

0.45A per ANT Rev1.1, Page3

+1.1V_RUN_VDDHTRX

SCD1U10V2KX-4GP

C247

SCD1U10V2KX-4GP

C540

C283

SCD1U10V2KX-4GP

C224

+1.2V_RUN_VDDHTTX

SCD1U10V2KX-4GP

C541

+1.8V_RUN_VDDA18PCIE

SCD1U10V2KX-4GP

C273

R121

1 2

Do Not Stuff

SC_0205

C251

SCD1U10V2KX-4GP

C260

SCD1U10V2KX-4GP

C264

+1.8V_RUN_VDD18_MEM

SC4D7U6D3V3KX-GP

C256

SCD1U10V2KX-4GP

C249

SCD1U10V2KX-4GP

C263

SCD1U10V2KX-4GP

C258

C271

Do Not Stuff

C276

M16 R16

H18 G19

D22

AE25 AD24 AC23 AB22 AA21

W19

U17 R17 M17

M10

R10 AA9

AB9 AD9 AE9 U10

AE11 AD11

J17 K16 L16

P16 T16

F20 E21

B23 A23

Y20 V18 T17 P17

J10 P10 K10

L10

T10

U43E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS780M-GP-U1

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13

POWER

VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

300mil Width

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

C198

C226

SC1U10V2KX-1GP

C252

7A per ANT Rev1.1, Page3 Per check list (Rev 0.02) RS780M: 1V ~ 1.1V, check PWR team

SCD1U10V2KX-4GP

C269

VDD_MEM

+3.3V_RUN_VDD33

SCD1U10V2KX-4GP

C200

SCD1U10V2KX-4GP

C270

1 2

Do Not Stuff

SC_0205

SCD1U10V2KX-4GP

R351

C201

SCD1U10V2KX-4GP

C281

SCD1U10V2KX-4GP

C277

R97

1 2

Do Not Stuff

SC_0205

SCD1U10V2KX-4GP

1D1V_S0

SC1U10V2KX-1GP

C195

C257

3D3V_S0

U43F

A25

VSSAHT1

D23 E22 G22

SC4D7U6D3V3KX-GP

C221

+NB_VCORE

1D1V_S0

SCD1U10V2KX-4GP

C286

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

C280

C274

SC10U6D3V5KX-1GP

C272

G24 G25 H19

M20 N22 P20 R19 R22 R24 R25 H20 U22

V19 W22 W24 W25

Y21

AD25

M14

N13

P12

P15

R11

R14

T12

U14

U11

U15

V12 W11 W15

AC12 AA14

Y18

AB11 AB15 AB17 AB19 AE20 AB21

K11

J22 L17 L22 L24 L25

L12

RS780M-GP-U1

VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

PART 6/6

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31

GROUND

VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

B B

A A

AB12 AE16

AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

AD16 AE17 AD17

W12

AD18 AB13 AB18

W14

AE12 AD12

V11

Y14

Y12

V14 V15

U43D

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS780M-GP-U1

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ2/DVO_DE

MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ12

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN

MEM_DQS1P MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

SBD_MEM/DVO_I/F

IOPLLVDD18

IOPLLVDD IOPLLVSS

MEM_VREF

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions

1D8V_S0

R342

1 2

Do Not Stuff

SC_0205

+1.8V_IOPLLVDD18

1 2

SC_0205

+1.1V_IOPLLVDD

R349

Do Not Stuff

1D1V_S0

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ATi-RS780M_Side Port&PWR&GND(3/3)

Size Document Number Rev

Date: Sheet

Olan

13 58Monday, April 21, 2008

-1

D D

WIRELESS_BTN#_1BLT_BTN#_1

C C

BT_BTN#43

WIRELESS_BTN#43

B B

123

BLUE2

SW-SLIDE58-GP

62.40018.331

2ND = 62.40068.001

EC116

EC117

Do Not Stuff

1 2 3 4 5

SRN470J-3-GP

Do Not Stuff

RN73

8 7 6

Wireless ON/OFFBlueTooth ON/OFF

123

SW-SLIDE58-GP

62.40018.331

2ND = 62.40068.001

BLT_BTN#_1 WIRELESS_BTN#_1

WLAN1

RN63

1 2 3

SRN10KJ-5-GP

3D3V_S0

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

SWITCH

Olan

14 58Friday, April 18, 2008

-1

D D

LAUNCH

RP1

INTERNET# EPRESENTATION# ELOCK# SYNC#

3D3V_S0

C C

3D3V_AUX_S5

R92

R92 10KR2J-3-GP

10KR2J-3-GP

LID_CLOSE#

EC17

EC17 Do Not Stuff

Do Not Stuff

B B

LID_CLOSE#43,58

EPRESENTATION#43,58

SYNC# ELOCK# EPRESENTATION# INTERNET# E-BUTTON# PROGRAM# MAIL#

1 2 3 4 5 6

3D3V_AUX_S5

ELOCK#43,58

SYNC#43,58 INTERNET#43,58 E-BUTTON#43,58 PROGRAM#43,58

MAIL#43,58

EC16 Do Not Stuff

EC16 Do Not Stuff EC15 Do Not Stuff

EC15 Do Not Stuff EC14 Do Not Stuff

EC14 Do Not Stuff EC13 Do Not Stuff

EC13 Do Not Stuff EC12 Do Not Stuff

EC12 Do Not Stuff EC11 Do Not Stuff

EC11 Do Not Stuff EC10 Do Not Stuff

EC10 Do Not Stuff

RP1

SRN10KJ-L3-GP

3D3V_S0

E-BUTTON#

PROGRAM#

MAIL#

SWITCHCN1

14 12 11 10

9 8 7 6 5 4 3 2

ACES-CON12-4-GP-U

20.K0228.012

2ND = 20.K0286.012

SB_0108_change 2nd source

1 2

20080307

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

LAUNCH

Olan

15 58Friday, April 18, 2008

-1

LCD/INVERTER/CCD CONN

RN49

LCDVDD

SC10U10V5ZY-1GP

-1_0301

R476

D D

DMIC_CLK40

DMIC_1240

C C

B B

USBPN821 USBPP821

DCBATOUT

C28

SC10U25V6KX-1GP

BRIGHTNESS_CN BLON_OUT_CN

EMI

GMCH_LCDVDD_ON12

EC1

Do Not Stuff

EC4

Do Not Stuff

EC3

LCDVDD_ON37

1 2

Do Not Stuff

1 2

Do Not Stuff

EC2

Do Not Stuff

3D3V_S0

1 2

-1_0301

1 2

POLYSW-1D1A24V-GP

Do Not Stuff

69.50007.A31

2ND = 69.50007.A41

-2M_0429

-1_0304

RN79

2 3 1

SRN33J-5-GP-U

EC5

Do Not Stuff

R477

BRIGHTNESS_CN

R34

USBPN8_R USBPP8_R

LCD_EDID_CLK LCD_EDID_DAT

CCD_PWR

BLON_OUT_CN

DCBATOUT_LCD1

R36

10KR2J-3-GP

1 2

UMA

R33 0R2J-2-GP

1 2

BRIGHTNESS 43 BLON_OUT 43

SCD1U16V2ZY-2GP

C31

10 12 14 16 18 20 22 24 26 28 30

LCDVDD

Layout 40 mil

LCD1

9 11 13 15 17 19 21 23 25 27 29 3132 3334 3536 3738 3940

TYCO-CONN40A-GP

20.F1048.040

2ND = 20.F0993.040

CCD_PWR

C24

SC4D7U10V5ZY-3GP

1 2 3 4

C29

SC4D7U6D3V3KX-GP

C22

CCD_PWR

C25

SCD1U16V2ZY-2GP

IN#1

GND

IN#8

OUT

IN#7

IN#6

GND

IN#5

G5281RC1U-GP

74.05281.093

C27

C26

Do Not Stuff

G72_TXBCLK+ 37

G72_TXBCLK- 37

G72_TXBOUT2+ 37

G72_TXBOUT2- 37

G72_TXBOUT1+ 37

G72_TXBOUT1- 37

G72_TXBOUT0+ 37

G72_TXBOUT0- 37

G72_TXACLK+ 37

G72_TXACLK- 37

G72_TXAOUT2+ 37

G72_TXAOUT2- 37

G72_TXAOUT1+ 37

G72_TXAOUT1- 37

G72_TXAOUT0+ 37

G72_TXAOUT0- 37

3D3V_S0 3D3V_S0

1 2

FUSE-1A6V-2-GP

69.50007.721

2ND = 69.50007.981

3D3V_S0

9 8 7 6 5

C19

SC4D7U6D3V3KX-GP

-2_0403

G72_TXACLKG72_TXACLK+ G72_TXAOUT2G72_TXAOUT2+

G72_TXAOUT1G72_TXAOUT1+ G72_TXAOUT0G72_TXAOUT0+

G72_TXBCLKG72_TXBCLK+ G72_TXBOUT2G72_TXBOUT2+

G72_TXBOUT1G72_TXBOUT1+ G72_TXBOUT0G72_TXBOUT0+

CRT_DDCCLK18,37 CRT_DDCDATA18,37

LCD_EDID_CLK37 LCD_EDID_DAT37

CLK_DDC_EDID12 DAT_DDC_EDID12

SRN4K7J-10-GP

1 2 3

UMA

4 5

SRN0J-7-GP

1 2 3

UMA

4 5

SRN0J-7-GP

1 2 3

UMA

4 5

SRN0J-7-GP

1 2 3

UMA

4 5

SRN0J-7-GP

RN2

RN53

2 3 1

UMA

SRN0J-10-GP-U

-1_0301

RN49

RN52

RN50

RN51

UMA

4 5

8 7 6

678

-2M_0421

123

GMCH_TXACLK- 12

GMCH_TXACLK+ 12

GMCH_TXAOUT2- 12

GMCH_TXAOUT2+ 12

GMCH_TXAOUT1- 12

GMCH_TXAOUT1+ 12

GMCH_TXAOUT0- 12

GMCH_TXAOUT0+ 12

GMCH_TXBCLK- 12

GMCH_TXBCLK+ 12

GMCH_TXBOUT2- 12

GMCH_TXBOUT2+ 12

GMCH_TXBOUT1- 12

GMCH_TXBOUT1+ 12

GMCH_TXBOUT0- 12

GMCH_TXBOUT0+ 12

-2_0403

A A

UMA NODOCK

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

LCD CONN

Olan

16 58Monday, May 05, 2008

-2M

LED

Q30

FRONT_PWRLED43

D D

STDBY_LED43

DC_BATFULL43

CHARGE_LED43

C C

BT_LED43

WLAN_LED#39

WLAN_TEST_LED43

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

Q29

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

Q28

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

Q27

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

Q25

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

R481

1 2

33R2J-2-GP

FRONT_PWRLED#_R

C E

SRN300J-3-GP

STDBY_LED#_R

C E

DC_BATFULL#_R

C E

SRN300J-3-GP

CHARGE_LED#_R

C E

WLAN_LED#_Q

-1_0305

1 2 3

-1_0305

1 2 3

2ND = 84.2N702.E31

S D

SC_0205

R483

1 2

Do Not Stuff

RN81

RN82

FRONT_PWRLED#_Q

STDBY_LED#_Q

SC_0205

R484

1 2

Do Not Stuff

DC_BATFULL#_Q

CHARGE_LED#_Q

-1_0305

1 2

R473 453R2F-1-GPR473 453R2F-1-GP

-1_0305

1 2

R480 150R2F-1-GPR480 150R2F-1-GP

Q26

2N7002-11-GP

84.2N702.D31

FRONT_PWRLED#_R1

STDBY_LED#_R1

BLT_LED#_1_RBLT_LED#_1_Q

WLAN_LED#_R

LED3

3 2

2ND = 83.00190.P70

2ND = 83.00190.S7A

LED-YG-50-GP

83.19223.B70

2ND = 83.00195.I70

LED2

LED-YG-50-GP

83.19223.B70

2ND = 83.00195.I70

5V_S0

LED1

LED-B-68-GP

83.19217.070

3D3V_S0

LED4

LED-Y-57-GP

83.01921.P70

3D3V_S5

-1_0304

3D3V_AUX_S5

NUM_LED43

CAP_LED43

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

PDTC143ZU-GP-U

84.00143.E1K

2ND = 84.00143.D1K

C E

NUM_LED#_R

CAP_LED#_R

-1_0305

RN83

1 2 3 4 5

SRN75J-1-GP

8 7 6

NUM_LED#

CAP_LED#

B B

3D3V_AUX_S5

R243

3D3V_S0 3D3V_S5

PWRCN1

A A

ACES-CON12-4-GP-U

20.K0228.012

2ND = 20.K0286.012

1 2

3 4 5 6 7 8 9 10 11 12

C437

SC1U16V3ZY-GP

EC78

EC79

Do Not Stuff

EC83

Do Not Stuff

C436

SC1U16V3ZY-GP

NUM_LED# CAP_LED#

KBC_PWRBTN#_CN

FRONT_PWRLED#_R1

STDBY_LED#_R1

EC85

EC77

Do Not Stuff

EC76

Do Not Stuff

NUM_LED# 58 CAP_LED# 58 MEDIA_LED# 22,58 KBC_PWRBTN#_CN 58 FRONT_PWRLED#_R1 58 STDBY_LED#_R1 58

SB_0108_change 2nd source

R243 10KR2J-3-GP

10KR2J-3-GP

KBC_PWRBTN#_CN

G58

G58 Do Not Stuff

Do Not Stuff

2 1

R245

470R2J-2-GP

C434

C434 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

KBC_PWRBTN# 43

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

LED & LAUNCH

Olan

-2M

17 58Monday, May 05, 2008

-2M

Layout Note: Place these resistors close to the CRT-out connector

CRT_R_SYS45

D D

CRT_G_SYS45

CRT_B_SYS45

R288

150R2F-1-GP

R285

R282

150R2F-1-GP

Ferrite bead impedance: 10 ohm@100MHz

L19

2ND = 68.00119.081

L18

2ND = 68.00119.081

L17

C467

Do Not Stuff

L17

C465

Do Not Stuff

2ND = 68.00119.081

C472

150R2F-1-GP

Do Not Stuff

1 2

FCB1608CF-GP

68.00230.021

1 2

FCB1608CF-GP

68.00230.021

1 2

FCB1608CF-GP

68.00230.021

CRT_R

CRT_G

CRT_B

C471

SC2D2P50V2CC-GP

C468

C466

SC2D2P50V2CC-GP

5V_S0

C225

C225 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Hsync & Vsync level shift

5 6

C222

Do Not Stuff

2 3

U13A

TSAHCT125PW-GP

2ND = 73.74125.L12

U13B

TSAHCT125PW-GP

CRT_HSYNC37

GMCH_HSYNC12 GMCH_VSYNC12

CRT_VSYNC37

RN31

1 2 3

UMA

SRN0J-6-GP

-1_0301

C507

Do Not Stuff

DOCK_IN1 45

CRT_HSYNC2

CRT_VSYNC2

RN74

2 3 1

SRN33J-5-GP-U

-1_0301

CRT_HSYNC1 CRT_VSYNC1

Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector. Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

C C

CRT_HSYNC37

For Dock CRT

CRT_VSYNC37

CRT I/F & CONNECTOR

DDC_CLK & DATA level shift

B B

A A

1 7 2 8 3 9 4 10 5

EC90

CRT_VSYNC1

SC22P50V2JN-4GP

EC91

5V_CRT_S0

C73

SCD01U50V2KX-1GP

CRT_HSYNC1

CLK_DDC1_5

SC22P50V2JN-4GP

EC89

SC100P50V2JN-3GP

CRT_R CRT_G CRT_B

DAT_DDC1_5

EC92

SC100P50V2JN-3GP

CRT1

VCC_CRT

CRT_R

CRT_G

CRT_B

JVGA_VS

JVGA_HS

DDCCLK_ID3

DDCDATA_ID1

VIDEO-15-78-GP-U1

20.20717.015

2ND = 20.20722.015

NP1

NP2

NC#11

NC#4

GND

CRT_IN#_R45

SC100P50V2JN-3GP

C462

CRT_DDCDATA16,37

GMCH_DDCDATA12

GMCH_DDCCLK12

CRT_DDCCLK16,37

RN32

1 2 3

UMA

SRN0J-6-GP

-1_0301

5V_S0

D14

Do Not Stuff

5V_S0

9 8

12 11

U13D

TSAHCT125PW-GP

5V_CRT_S0

3D3V_S0

U13C

TSAHCT125PW-GP

DOCK_DT1# 21,40,43,45,46

HSYNC_3

2 3

VSYNC_3

SRN33J-5-GP-U

RN75

HSYNC_5 45 VSYNC_5 45

-1_0301

5V_S0

D5 BAS16-1-GP

BAS16-1-GP

83.00016.B11

2ND = 83.00016.F11

1 2

FUSE-1A6V-2-GP

69.50007.721

2ND = 69.50007.981

U37

2N7002DW-1-GP

84.2N702.A3F

2 1

CRT Connector

5 6

2ND = 84.00512.03F

UMA NODOCK

Title

Size Document Number Rev

Date: Sheet

2ND = 83.00016.F11

5V_CRT_DDC

-1_0301

678

RN30

SRN4K7J-10-GP

123

4 5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Olan

DAT_DDC1_5 45

CLK_DDC1_5 45

18 58Monday, May 05, 2008

-2M

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