Acer Extensa 5220, Extensa 5620, Extensa 7220, Extensa 7620 Schematics Rev-1M

A

433

211

B

C

Columbia/Tangiz Block Diagram

Mobile CPU

4

533/667 MHz

533/667 MHz

Line In

MIC In

14

31

INT.SPKR

2

Line Out
(No-SPDIF)

CLK GEN.

ICS 9LPRS502

(RTM875T-605)

DDR2

DDR2

RJ11

71.09502.00W

12,13

12,13

Codec

ALC268

OP AMP

G1431Q

OP AMP
G1412

MODEM

MDC Card

3

533/667MHz

533/667MHz

AZALIA

30

31

31

22

Merom 479
2G/2.33G

2.0G : 71.MEROM.A0U

2.33G : 71.MEROM.B0U

HOST BUS

Crestline

AGTL+ CPU I/F
DDR Memory I/F

INTEGRATED GRAHPICS

LVDS, CRT I/F

71.CREST.00U

667/800MHz@1.05V

X4 DMI
400MHz

ICH8M

6 PCIe ports
PCI/PCI BRIDGE
ACPI 1.1
3 SATA
1 PATA 66/100
10 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio
LPC I/F
Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

71.0ICH8.A0U

4, 5

6,7,8,9,10,11

C-Link0

16,17,18,19

G792

PCI BUS

PCIex1

LPC BUS

20

TI

PCI7412

Cardbus
Cardreader

LAN

GIGA

BCM5787M

TV Out

CRT

15

LCD

14

VGA Borad

25/26

23

D

Project code: 91.4T301.001
PCB P/N : 48.4T301.01M
REVISION : -1M

PCB STACKUP

5 in 1

24

TOP

VCC

S

S

GND

BOTTOM

27

27

14

DVI

44

28

PCMCIA I/F

PWR SW

CP2211F

26

1394
CONN

27

TXFM RJ45

24

Mini Card

a/b/g/n

Kedron

29

PCMCIA
SLOT

Support
TypeII

MS/MS Pro/xD/
MMC/SD

E

SYSTEM DC/DC

MAX8744

INPUTS

DCBATOUT

OUTPUTS

5V_S5(6A)
3D3V_S5(7A)

SYSTEM DC/DC

Max8717

INPUTS OUTPUTS

DCBATOUT

TPS51100

1D8V_S3

APL5915

1D8V_S3 1D25V_S0

APL531230

3D3V_S0 2D5V_S0

APW5912

3D3V_S5 1D5V_S3

ISL CHARGER

DCBATOUT

INPUTS

DCBATOUT

1D05V_S0(9.5A)
1D8V_S3(8.5A)

DDR_VREF_S0
(1.5A)

DDR_VREF_S3

(2A)

(300mA)

(7.5A)

ISL6255

OUTPUTSINPUTS
CHG_PWR

18V 4.0A

UP+5V

5V 100mA

CPU DC/DC

MAX8770

OUTPUTS

VCC_CORE_S0

0~1.3V

47A

38

39

41

41

40

41

35,36

32

BIOS

W25X80-VSS

D

LPC

DEBUG

34

CONN.

35

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

145Monday, January 14, 2008

145Monday, January 14, 2008

145Monday, January 14, 2008

of

of

of

-1M

-1M

-1M

E

New card

PCI Express

29

SATA

PATA

USB

MINI USB
BlueTooth

22

KBC

Winbond

WPC8768L

SPI I/F

32

Finger print

P2231NFC1

29

HDD

21

CDROM

21

Touch

34

Pad

INT.
KB

33 33

FIR

USB

22

CAMERA

13

C

4 Port

A

B

A

433

211

ICH8M Functional Strap Definitions

4

Signal

HDA_SDOUT

HDA_SYNC

GNT2#

GPIO20
GNT1#/

GPIO51

GNT3#

GNT0#/
SPI_CS1#

INTVRMEN

LAN100_SLP

SATALED#

SPKR

TP3

GPIO33/
HDA_DOCK
_EN#

Usage/When Sampled

XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK

PCIE config1 bit0,
Rising Edge of PWROK.

PCIE config2 bit0,
Rising Edge of PWROK.

Reserved
ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block
Swap Override.
Rising Edge of PWROK.

Boot BIOS Destination
Selection.
Rising Edge of PWROK.

Integrated VccSus1_05,
VccSus1_5 and VccCL1_5
VRM Enable/Disable.
Always sampled.

Integrated VccLAN1_05
and VccCL1_05 VRM
Enable/Disable.
Always sampled.

PCI Express Lane
Reversal. Rising Edge
of PWROK.

No Reboot.
Rising Edge of PWROK.

XOR Chain Entrance.
Rising Edge of PWROK.

Flash Descriptor
Security Override Strap
Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)

This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.

ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Enables integrated VccSus1_05, VccSus1_5 and
VccCL1_5 VRM's when sampled high

Enables integrated VccLAN1_05 and VccCL1_05 VRM's
when sampled high

Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the
"No Reboot" mode(ICH8 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

This signal should not be pull low unless using
XOR Chain testing.

This signal has a weak internal pull-up.
Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.

ICH8-M EDS 21762 2.0V1

Comment

B

page 16

ICH8M Integrated Pull-up
and Pull-down Resistors

SIGNAL Resistor Type/Value

HDA_BIT_CLK
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GNT[3:0]
GPIO[20]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#
SPI_CS1#
SPI_CLK
SPI_MOSI
SPI_MISO
TACH_[3:0]
SPKR
TP[3]
USB[9:0][P,N]
CL_RST#

C

ICH8-M EDS 21762 2.0V1

PULL-DOWN 20K
NONE
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 10K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 15K
PULL-UP 13K

D

E

Crestline Strapping Signals and
Configuration

Pin Name

CFG[2:0]

CFG[4:3]
CFG5

CFG9

CFG[11:10] Reserved

CFG[13:12]

CFG[15:14]
CFG16

CFG[18:17]

CFG19

CFG20

SDVOCRTL
_DATA

NOTE:

Strap Description

FSB Frequency Select

Reserved
DMI x2 Select
ReservedCFG[8:6]

Low Power PCI Express

PCI Express Graphics
Lane Reversal

XOR/ALL Z test
straps

Reserved
FSB Dynamic ODT

Reserved

DMI Lane Reversal

SDVO/PCIE
Concurrent

SDVO Present

All strap signals are sampled with respect to the leading

edge of the Crestline GMCH PWORK in signal.

Crestline EDS 20954 1.0

Configuration

001 = FSB533
011 = FSB667
010 = FSB800
others = Reserved

0 = DMI x2

1 = DMI x4

0 = Normal mode

1 = Low Power mode

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane

00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled

11 = Normal Operation

Reserved

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = Normal operation (Default):lane

1 =Reverse Lane,4->0,3->1 ect...

0 = Only SDVO or PCIE x1 is

1 =SDVO and PCIE x1 are operating

0 = No SDVO Card present

1= SDVO Card present

(Default)

(Default)

Numbered in order

Numbered in order

operational (Default)

simultaneously via the PEG port

page 7

(Default)

(Default)

(Default)

History

2

ICH8M IDE Integrated Series
Termination Resistors

DIOR#,DIOW#,DD[15:0],

DREQ,

IDEIRQ

DA[2:0],

DCS1#,

page 17

DDACK#, IORDY,
DCS3#,

PCI Routing

INT REQ

AD22TI7412

G:CARDBUS
B:1394
F:Flash Media
G:SD Host

0 0

PCIE Routing

LAN BCM5787M

LANE1

MiniCard WLAN

LANE2
LANE3 NewCard WLAN

A

approximately 33 ohm

GNTIDSEL

USB Table

USB

Pair

Device

USB1

0

NC

1
2

USB2
USB4

3
4

USB3
BLUETOOTH

5

WEBCAM6
FT

7
8

MINICARD

9NEW1

UMA

UMA

UMA

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reference

Reference

Reference

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3
Date: Sheet

Date: Sheet

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

245Monday, January 14, 2008

245Monday, January 14, 2008

245Monday, January 14, 2008

E

-1M

-1M

-1M

of

of

of

A

3D3V_S0

R211

R211

3D3V_48MPWR_S0 3D3V_CLKPLL_S0

1 2

0R3-0-U-GP

0R3-0-U-GP

4 4

R207

R207
10KR2J-3-GP

10KR2J-3-GP

PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5

3 3

2 2

1 2

DY

DY

R192

R192
10KR2J-3-GP

10KR2J-3-GP

1 2

12

12

C266

C266

C265

C265

DY

DY

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

R208

R208
10KR2J-3-GP

10KR2J-3-GP

1 2

R193

R193
10KR2J-3-GP

10KR2J-3-GP

1 2

DY

DY

SB

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

EC119

DY

DY

R209

R209
10KR2J-3-GP

10KR2J-3-GP

1 2

R194

R194
10KR2J-3-GP

10KR2J-3-GP

1 2

EC119

DY

DY

3D3V_S0

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

12

C257

C257

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

R210

R210
10KR2J-3-GP

10KR2J-3-GP

1 2

R195

R195
10KR2J-3-GP

10KR2J-3-GP

1 2

C253

C253

SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

1 2

C244

C244

1 2

SC27P50V2JN-2-GP

SC27P50V2JN-2-GP

C255

C255
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

12

X2

X2

GEN_XTAL_OUT_R

B

GEN_XTAL_IN

X-14D31818M-44GP

X-14D31818M-44GP

12

C259

C259
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

PCLK_SIO32

PCLK_PCM26

R180 10MR2J-L-GP

R180 10MR2J-L-GP
R176

R176

1 2

0R0402-PAD

0R0402-PAD

CLK48_CARDBUS26

12

PCLK_FWH34
PCLK_KBC32
PCLK_ICH17

12

DY

DY

CLK48_ICH17

CPU_SEL04,7
CPU_SEL14,7

CPU_SEL24,7

CLK_ICH1417
CLK14_SIO32

C240

C240
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

-1

R187

R187

12

3D3V_CLKGEN_S0
3D3V_48MPWR_S0

3D3V_CLKPLL_S0

R604 22R2J-2-GPR604 22R2J-2-GP

R182 22R2J-2-GPR182 22R2J-2-GP
R183 22R2J-2-GPR183 22R2J-2-GP
R184 22R2J-2-GPR184 22R2J-2-GP
R185 22R2J-2-GPR185 22R2J-2-GP

GEN_XTAL_OUT

R188 22R2J-2-GPR188 22R2J-2-GP
R186 2K2R2J-2-GPR186 2K2R2J-2-GP

R172 2K2R2J-2-GPR172 2K2R2J-2-GP
R171 22R2J-2-GPR171 22R2J-2-GP
R605 22R2J-2-GPR605 22R2J-2-GP

12

22R2J-2-GP

22R2J-2-GP

C237

C237
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

TP66TPAD30 TP66TPAD30

12
12
12
12

12
12

12
12
12

CLK48

C

-1

R189

R189

0R0603-PAD

0R0603-PAD

12

C242

C242
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

PCLKCLK0
PCLKCLK1
PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5

CLK48

CPU_SEL2_R

CPU_SEL2_R

3D3V_S0

12

12

C272

C272
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

U14

U14

2

VDDPCI

9

VDD48

16

VDDPLL3

61

VDDREF

39

VDDSRC

55

VDDCPU

12

VDD96_IO

20

VDDPLL3_IO

26

VDDSRC_IO

36

VDDSRC_IO

45

VDDSRC_IO

49

VDDCPU_IO

1

PCI0/CR#_A

3

PCI1/CR#_B

4

PCI2/TME

5

PCI3

6

PCI4/27_SELECT

7

PCI_F5/ITP_EN

59

X2

60

X1

10

USB_48MHZ/FSLA

57

FSLB/TEST_MODE

62

REF0/FSLC/TEST_SEL

8

GNDPCI

11

GND48

15

GND

19

GND

23

GNDSRC

42

GNDSRC

52

GNDCPU

58

GNDREF

29

GNDSRC

ICS9LPRS365YGLFT-GP

ICS9LPRS365YGLFT-GP

71.09365.00W

71.09365.00W

12

C236

C236
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

SRCT0/DOTT_96

SRCC0/DOTC_96

27MHZ_NONSS/SRCT1/SE1

27MHZ_SS/SRCC1/SE2

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

CK_PWRGD/PD#

SRCC11/CR#_G
SRCT11/CR#_H

UMA:71.09502.A0W=>56pin

G72:71.09365.00W=>64pin

SDATA

SCLK

SRCT2/SATAT
SRCC2/SATAC

SRCT3/CR#_C
SRCC3/CR#_D

SRCT4
SRCC4

PCI_STOP#

CPU_STOP#

SRCT6
SRCC6

SRCT7/CR#_F
SRCC7/CR#_E

CPUT1_F
CPUC1_F

CPUT0
CPUC0

NC#48

SRCT9
SRCC9

SRCT10
SRCC10

D

12

C241

C241
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

63
64

13
14

17
18

21
22

24

CLK_MCH_3GPLL_1#

25
27

CLK_PCIE_MINI_12#

28
38

37
41

40
44

43
47

46
51

50
54

53

56
48

30
31

32
33

CLK_PCIE_PEG_1

34

CLK_PCIE_PEG_1#

35

SMBD_ICH 12,19

SMBC_ICH 12,19

DREFCLK_1
DREFCLK#_1

CLK_PCIE_NEW_R

CLK_PCIE_NEW#_R

CLK_PCIE_SATA_1#

CLK_PCIE_SATA_1

CLK_MCH_3GPLL_1

CLK_PCIE_MINI_12

CLK_PCIE_ICH_1

CLK_PCIE_ICH_1#

DREFSSCLK_1
DREFSSCLK#_1

CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R

CLK_MCH_BCLK_1

CLK_MCH_BCLK_1#

CLK_CPU_BCLK_1

CLK_CPU_BCLK_1#

CLK_PWRGD 17

10KR2J-3-GP

10KR2J-3-GP

1 2

SRN0J-6-GP

SRN0J-6-GP

2 3
1

U14上56pin

12

C256

C256
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

PM_STPPCI# 17
PM_STPCPU# 17

DY

DY

R173

R173

G72

G72

RN21

RN21

時

12

DY

DY

4

UMA

UMA

2 3
1

2 3
1

2 3
1

2 3
1

1
2 3

UMA

UMA

4
1

2 3
1

2 3
1

2 3

-1

4

DY

DY

3D3V_CLKGEN_S0

C238

C238
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

RN30

RN30

1

SRN33J-5-GP-U

SRN33J-5-GP-U

23

SRN0J-6-GP

SRN0J-6-GP

4

RN31

RN31
SRN0J-6-GP

SRN0J-6-GP

4

RN32

RN32
SRN0J-6-GP

SRN0J-6-GP

4

RN33

RN33
SRN0J-6-GP

SRN0J-6-GP

4

RN34

RN34

RN26

RN26

4

SRN0J-6-GP

SRN0J-6-GP

23

SRN33J-5-GP-U

SRN33J-5-GP-U

1

RN25

RN25
RN24

RN24

4

SRN0J-6-GP

SRN0J-6-GP
RN23

RN23

4

SRN0J-6-GP

SRN0J-6-GP
RN22

RN22

4

SRN0J-6-GP

SRN0J-6-GP

12

ER19

ER19
330R2J-3-GP

330R2J-3-GP

RN22,23,24,26,31,32,33,34改成66.33036.04L

E

-1

R170

R170

1 2

0R0603-PAD

0R0603-PAD

12

C239

C239

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

DREFCLK 7
DREFCLK# 7

CLK_PCIE_NEW 29
CLK_PCIE_NEW # 29

CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

CLK_PCIE_MINI1 29
CLK_PCIE_MINI1# 29

CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17

DREFSSCLK 7
DREFSSCLK# 7

CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23

CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

3D3V_S0

CLK_PCIE_PEG 28

CLK_PCIE_PEG# 28

3D3V_S0

12

C267

C267
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

ICS9LPR502HGLFT-GP setting table

PIN NAME DESCRIPTION

Byte 5, bit 7
0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

1 1

PCI2/TME

PCI4/SRC5_EN
PCI_F5/ITP_EN

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.
1 = Pins29,30 as SRC-5 differential pair.

0 =SRC8/SRC8#
1 = ITP/ITP#

A

B

RTM875T-605 setting table

PIN NAME

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME
PCI3/SRC-5_EN
PCI4/27M_SEL
PCI_F5/ITP_EN

DESCRIPTION

Byte 5, bit 7
0 = PCI0 enabled (default)
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair

Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed

0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.
1 = Pins29,30 as SRC-5 differential pair.

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

0 =SRC8/SRC8#
1 = ITP/ITP#

C

SEL1

SEL2
FSC

1
0
0101

UMA

UMA

UMA

Title

Title

Title

Clock Generator

Clock Generator

Clock Generator

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

SEL0

FSB

FSA

01
01

01

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

E

CPU

100M
133M
166M
200M

345Monday, January 14, 2008

345Monday, January 14, 2008

345Monday, January 14, 2008

FSB

X

X
667M
800M

-1M

-1M

of

of

of

-1M

A

B

C

D

E

H_A#[35..3]6

4 4

H_ADSTB#06
H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#16

H_FERR#16

H_IGNNE#16

H_STPCLK#16

H_INTR16
H_NMI16
H_SMI#16

2 2

1 1

H_A#[35..3]

1 OF 4

1 OF 4

U43A

U43A

H_A#3

J4

H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

RSVD_CPU_1

TP19TPAD30 TP19TPAD30

RSVD_CPU_2

TP18TPAD30 TP18TPAD30

RSVD_CPU_3

TP17TPAD30 TP17TPAD30

RSVD_CPU_4

TP16TPAD30 TP16TPAD30

RSVD_CPU_5

TP24TPAD30 TP24TPAD30

RSVD_CPU_6

TP30TPAD30 TP30TPAD30

RSVD_CPU_7

TP22TPAD30 TP22TPAD30

RSVD_CPU_8

TP26TPAD30 TP26TPAD30

RSVD_CPU_9

TP25TPAD30 TP25TPAD30

RSVD_CPU_10

TP21TPAD30 TP21TPAD30

RSVD_CPU_11

TP27TPAD30 TP27TPAD30

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

ICH

ICH

RESERVED

RESERVED

62.10079.001

62.10079.001

ADDR GROUP 0

ADDR GROUP 0

ADDR GROUP 1

ADDR GROUP 1

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL
THERMAL

THERMAL

THERMTRIP#

HCLK

HCLK

ADS#
BNR#
BPRI#

DEFER#

DRDY#

DBSY#

BR0#
IERR#

INIT#

LOCK#

RESET#

RS0#

RS1#

RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

TDI
TDO
TMS

TRST#

DBR#

PROCHOT#

THRMDA
THRMDC

BCLK0
BCLK1

XDP_TMS
XDP_TDI
XDP_BPM#5
XDP_TDO
H_CPURST#

XDP_DBRESET#

XDP_TCK
XDP_TRST#

H1
E2
G5

H5
F21
E1

F1
D20

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

R65 39R2F-GPR65 39R2F-GP
R66 150R2F-1-GPR66 150R2F-1-GP
R63 54D9R2F-L1-GP

R63 54D9R2F-L1-GP
R64 54D9R2F-L1-GP

R64 54D9R2F-L1-GP
R89 54D9R2F-L1-GP

R89 54D9R2F-L1-GP

R82 150R2F-1-GP

R82 150R2F-1-GP

R58 27D4R2F-L1-GPR58 27D4R2F-L1-GP
R59 649R2F-GPR59 649R2F-GP

H_RS#0
H_RS#1
H_RS#2

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK

XDP_TDI

XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

PM_THRMTRIP#
should connect to
ICH8 and MCH
without T-ing

( No stub)

1 2
1 2
1 2

DY

DY

1 2

DY

DY

1 2

DY

DY

1 2

DY

DY

1 2
1 2

TP20 TPAD30TP20 TPAD30

H_ADS# 6
H_BNR# 6

H_BPRI# 6

H_DEFER# 6
H_DRDY# 6
H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 16
H_LOCK# 6

H_CPURST# 6,33

H_TRDY# 6
H_HIT# 6

H_HITM# 6

TP6 TPAD30TP6 TPAD30
TP5 TPAD30TP5 TPAD30
TP7 TPAD30TP7 TPAD30
TP9 TPAD30TP9 TPAD30
TP8 TPAD30TP8 TPAD30
TP12 TPAD30TP12 TPAD30
TP13 TPAD30TP13 TPAD30
TP15 TPAD30TP15 TPAD30
TP10 TPAD30TP10 TPAD30
TP14 TPAD30TP14 TPAD30
TP11 TPAD30TP11 TPAD30
TP23 TPAD30TP23 TPAD30

CPU_PROCHOT#_R

H_THERMDA 20
H_THERMDC 20

R86

R86

12

0R0402-PAD

0R0402-PAD

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

1D05V_S0

3D3V_S0

H_RS#[2..0] 6

-1

1D05V_S0

12

1D05V_S0

R85

R85

R81

R81
56R2J-4-GP

56R2J-4-GP

12

Place testpoint on
H_IERR# with a GND

0.1" away

H_THERMDA

H_THERMDC

56R2J-4-GP

56R2J-4-GP

PM_THRMTRIP-A# 7,16,35

Layout Note:
"CPU_GTLREF0"

0.5" max length.

2KR2F-3-GP

2KR2F-3-GP

C30 SCD1U10V2KX-4GP

C30 SCD1U10V2KX-4GP

12

C88

C88
SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1D05V_S0

1KR2F-3-GP

1KR2F-3-GP
R57

R57

1 2
12

12

DY

R56

R56

1 2

R83 1KR2J-1-GP

R83 1KR2J-1-GP

1 2

R84 1KR2J-1-GP

R84 1KR2J-1-GP

DY

C32

C32

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

TEST1

DY

DY

TEST2

DY

DY

TEST4

12

DY

DY

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8

H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14

H_DSTBN#06
H_DSTBP#06
H_DINV#06

H_DSTBN#16
H_DSTBP#16
H_DINV#16

CPU_GTLREF0

TP28TPAD30 TP28TPAD30
TP150TPAD30 TP150TPAD30
TP4TPAD30 TP4TPAD30
TP31TPAD30 TP31TPAD30

CPU_SEL03,7
CPU_SEL13,7
CPU_SEL23,7

Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals

H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

TEST1
TEST2

RSVD_CPU_12

TEST4
RSVD_CPU_13
RSVD_CPU_14

AD26

AF26

U43B

U43B

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#
GTLREF

C23

TEST1

D25

TEST2

C24

TEST3
TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

2 OF 4

2 OF 4

DATA GRP0 DATA GRP1

DATA GRP0 DATA GRP1

MISC

MISC

DATA GRP2DATA GRP3

DATA GRP2DATA GRP3

PWRGOOD

All place within 2" to CPU

A

B

C

D

H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

H_D#32

Y22

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#

D47#
DSTBN2#
DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63#
DSTBN3#
DSTBP3#

DINV3#
COMP0

COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

SLP#

PSI#

H_D#33

AB24

H_D#34

V24

H_D#35

V26

H_D#36

V23

H_D#37

T22

H_D#38

U25

H_D#39

U23

H_D#40

Y25

H_D#41

W22

H_D#42

Y23

H_D#43

W24

H_D#44

W25

H_D#45

AA23

H_D#46

AA24

H_D#47

AB25
Y26
AA26
U22

H_D#48

AE24

H_D#49

AD24

H_D#50

AA21

H_D#51

AB22

H_D#52

AB21

H_D#53

AC26

H_D#54

AD20

H_D#55

AE22

H_D#56

AF23

H_D#57

AC25

H_D#58

AE21

H_D#59

AD21

H_D#60

AC22

H_D#61

AD23

H_D#62

AF22

H_D#63

AC23
AE25
AF24
AC20

COMP0

R26

COMP1

U26

COMP2

AA1

COMP3

Y1
E5

B5
D24
D6
D7
AE6

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .

UMA

UMA

UMA

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6

H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6

H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6

R71 27D4R2F-L1-GPR71 27D4R2F-L1-GP

1 2

R70 54D9R2F-L1-GPR70 54D9R2F-L1-GP

1 2

R62 27D4R2F-L1-GPR62 27D4R2F-L1-GP

1 2

R67 54D9R2F-L1-GPR67 54D9R2F-L1-GP

1 2

H_DPRSTP# 7,16,37
H_DPSLP# 16
H_DPWR# 6
H_PWRGD 16,33,35
H_CPUSLP# 6
PSI# 37

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

CPU (1 of 2)

CPU (1 of 2)

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

E

445Monday, January 14, 2008

445Monday, January 14, 2008

445Monday, January 14, 2008

-1M

-1M

of

of

of

-1M

A

VCC_CORE_S0

4 4

3 3

2 2

1 1

U43C

U43C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC

AA10

VCC

AA12

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA18

VCC

AA20

VCC

AB9

VCC

AC10

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB15

VCC

AB17

VCC

AB18

VCC

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

3 OF 4

3 OF 4

A

VCCSENSE

VSSSENSE

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCCA
VCCA

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

VCC_CORE_S0

CPU_G21
CPU_V6

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_VID0 37
H_VID1 37
H_VID2 37
H_VID3 37
H_VID4 37
H_VID5 37
H_VID6 37

1 2

R77 0R0402-PADR77 0R0402-PAD

R69 0R0402-PADR69 0R0402-PAD

1 2

12

12

C47

C47

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C79

C79

VCC_CORE_S0

12

R54

R54
100R2F-L1-GP-U

100R2F-L1-GP-U

12

R53

R53
100R2F-L1-GP-U

100R2F-L1-GP-U

B

VCC_CORE_S0

12

12

12

C60

C60

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_CORE_S0

12

12

C44

C44

C50

C50

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_S0

layout note: "1D5V_VCCA_S0"
as short as possible

1D5V_VCCA_S0

12

C86

C86

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

Layout Note:

VCCSENSE and VSSSENSE lines
should be of equal length.

Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.

B

C61

C61

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

DY

DY

12

C87

C87

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2

HCB1608KF121T30-GP

HCB1608KF121T30-GP

12

C85

C85
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

VCC_SENSE 37

VSS_SENSE 37

C84

C84

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

12

C91

C91

L1

L1

68.00230.041

68.00230.041

C

12

C81

C81

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

-1

SC

-1

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

1D5V_S0

12

12

C34

C34

C69

C69

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

12

C43

C43

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

-1

12

12

C55

C55

C82

C82

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

1D05V_S0

12

12

12

12

12

C54

C54

C78

C37

C37

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C77

C77

C57

C57

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

C

C78

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C64

C64

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C68

C68

C40

C40

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C67

C67

C56

C56

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C83

C83

C38

C38

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

DY

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

D

4 OF 4

4 OF 4

U43D

U43D

A4

VSS

A8

VSS

-1M

TP151

TP151

TPAD30

TPAD30

12

C51

C51

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

D

Date: Sheet

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU3

BGA479-SKT6-GPU3

CPU (2 of 2)

CPU (2 of 2)

CPU (2 of 2)

E

P6

VSS

P21

VSS

P24

VSS

R2

VSS

R5

VSS

R22

VSS

R25

VSS

T1

VSS

T4

VSS

T23

VSS

T26

VSS

U3

VSS

U6

VSS

U21

VSS

U24

VSS

V2

VSS

V5

VSS

V22

VSS

V25

VSS

W1

VSS

W4

VSS

W23

VSS

W26

VSS

Y3

VSS

Y6

VSS

Y21

VSS

Y24

VSS

AA2

VSS

AA5

VSS

AA8

VSS

AA11

VSS

AA14

VSS

AA16

VSS

AA19

VSS

AA22

VSS

AA25

VSS

AB1

VSS

AB4

VSS

AB8

VSS

AB11

VSS

AB13

VSS

AB16

VSS

AB19

VSS

AB23

VSS

AB26

VSS

AC3

VSS

AC6

VSS

AC8

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC19

VSS

AC21

VSS

AC24

VSS

AD2

VSS

AD5

VSS

AD8

VSS

AD11

VSS

AD13

VSS

AD16

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE1

VSS

AE4

VSS

AE8

VSS

AE11

VSS

AE14

VSS

AE16

VSS

AE19

VSS

AE23

VSS

AE26

VSS

A2

VSS

AF6

VSS

AF8

VSS

AF11

VSS

AF13

VSS

AF16

VSS

AF19

VSS

AF21

VSS

A25

VSS

AF25

VSS

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

545Monday, January 14, 2008

545Monday, January 14, 2008

545Monday, January 14, 2008

E

-1M

TP152

TP152

TPAD30

TPAD30

TP154

TP154

TPAD30

TPAD30
TPAD30

TPAD30

TP153

TP153

-1M

-1M

of

of

of

-1M

A

4 4

H_SWING

C444

C444

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_RCOMP

1D05V_S0

12

R331

R331
221R2F-2-GP

221R2F-2-GP

12

R334

R334
100R2F-L1-GP-U

100R2F-L1-GP-U

H_SWING routing Trace width and
Spacing use 10 / 20 mil

H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )

12

H_SCOMP and H_SCOMP# Resistors and
Capacitors close MCH 500 mil ( MAX )

3 3

H_RCOMP routing Trace width and
Spacing use 10 / 20 mil

1D05V_S0

1D05V_S0

1 2

R333

R333

1 2

R332

R332

1 2

R335

R335

H_SCOMP

54D9R2F-L1-GP

54D9R2F-L1-GP

H_SCOMP#

54D9R2F-L1-GP

54D9R2F-L1-GP

24D9R2F-L-GP

24D9R2F-L-GP

Place them near to the chip ( < 0.5")

2 2

H_REF Decoupling Crestline
close Crestline 100 mil

1D05V_S0

R340

R340
1KR2F-3-GP

1KR2F-3-GP

1 2

12

R339

R339
2KR2F-3-GP

2KR2F-3-GP

H_D#[63..0]4

B

H_D#[63..0]

H_AVREF

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C455

C455

C

1 OF 10

1 OF 10

U48A

W10

AD12

AC14
AD11
AC11

AJ14

AE11
AH12

AH13

M10
N12

P13

AE3
AD9
AC9
AC7

AB2
AD7
AB1

AC6
AE2
AC5
AG3

AH8
AE9

AH5
AE7

AE5
AH2

E2
G2
G7
M6
H7
H3
G4
F3
N8
H2

N9
H5

K9
M2

Y8
V4
M3
J1
N5

N3
W6
W9

N2

Y7

Y9

P4
W3

N1

Y3

AJ9

AJ5
AJ6
AJ7

AJ2
AJ3

B3

C2
W1

W2

B6

E5

B9

A9

U48A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CRESTLINE-GP-U

CRESTLINE-GP-U

H_ADSTB#0
H_ADSTB#1

HOST

HOST

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK#
H_TRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8

H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#

H_HITM#

H_RS#0
H_RS#1
H_RS#2

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

K5
L2
AD13
AE13

M7
K3
AD2
AH11

L7
K2
AC2
AJ10

M14
E13
A11
H13
B12

E12
D7
D8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_SCOMP
H_SCOMP#

H_CPURST#4,33

H_CPUSLP#4

1 2

H_A#[35..3]

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4
H_HIT# 4
H_HITM# 4

H_LOCK# 4
H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

D

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

E

1 1

A

CRB v0.9 REQUEST

UMA

UMA

UMA

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (1 of 6)

GMCH (1 of 6)

GMCH (1 of 6)

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

645Monday, January 14, 2008

645Monday, January 14, 2008

645Monday, January 14, 2008

E

-1M

-1M

of

of

of

-1M

A

4 4

1D8V_S3

R350 20R2F-GPR350 20R2F-GP

M_RCOMPP

1 2

R348 20R2F-GPR348 20R2F-GP

M_RCOMPN

1 2

3D3V_S0

R110 DUMMY-R2R110 DUMMY-R2

1 2

R104 DUMMY-R2R104 DUMMY-R2

1 2

R133 DUMMY-R2R133 DUMMY-R2

1 2

R106 DUMMY-R2R106 DUMMY-R2

1 2

R126 DUMMY-R2R126 DUMMY-R2

3 3

1 2

R117 DUMMY-R2R117 DUMMY-R2

1 2

R101 DUMMY-R2R101 DUMMY-R2

1 2

R121 DUMMY-R2R121 DUMMY-R2

1 2

R108 DUMMY-R2R108 DUMMY-R2

1 2

R107 DUMMY-R2R107 DUMMY-R2

1 2

R125 DUMMY-R2R125 DUMMY-R2

1 2

R122 DUMMY-R2R122 DUMMY-R2

1 2

R131 DUMMY-R2R131 DUMMY-R2

1 2

R124 DUMMY-R2R124 DUMMY-R2

1 2

R102 DUMMY-R2R102 DUMMY-R2

1 2

R120 DUMMY-R2R120 DUMMY-R2

1 2

R109 DUMMY-R2R109 DUMMY-R2

1 2

R127 DUMMY-R2R127 DUMMY-R2

1 2

H_DPRSTP#4,16,37

2 2

VGATE_PWRGD17,37

PWROK17,20

PLT_RST1#7,21,23,28,29,32,34

PM_THRMTRIP-A#4,16,35

PM_DPRSLPVR17,37

CFG18
CFG19
CFG20
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

PM_BMBUSY#17

R152

R152

1 2

0R0402-PAD

0R0402-PAD
R1590R2J-2-GPDYR1590R2J-2-GP

DY

R158 0R0402-PADR158 0R0402-PAD

1 2

100R2J-2-GP

100R2J-2-GP

C153

C153

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

R103 0R0402-PADR103 0R0402-PAD

1 2

R134 0R0402-PADR134 0R0402-PAD

1 2

12

R105

R105

12

CPU_SEL03,4
CPU_SEL13,4
CPU_SEL23,4

H_DPRSTP#_MCH

PWROK_GD

RSTIN#
NB_THERMTRIP#

PM_DPRSLPVR_MCH

12

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9

CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_EXTTS#0
PM_EXTTS#1

-1

3D3V_S0

12

R141

R141
10KR2J-3-GP

10KR2J-3-GP

1 1

CLK_3GPLLREQ#

AR12
AR13
AM12
AN13

AR37
AM36
AL36
AM37

BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24

BH39

AW20

BK20

AW49

AV20

BJ51
BK51
BK50
BL50
BL49

P36
P37
R35
N35

J12

D20

H10
B51

B44
C44
A35
B37
B36
B34
C34

P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35

G41
L39
L36
J36

N20
G36

BL3
BL2
BK1
BJ1

E1

A5
C51
B50
A50
A49
BK2

2 OF 10

2 OF 10

U48B

U48B

RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20

RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24

RSVD#BH39
RSVD#AW20
RSVD#BK20

RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2

CRESTLINE-GP-U

CRESTLINE-GP-U

RSVD

RSVD

CFG PM NC

CFG PM NC

B

SM_CK0
SM_CK1
SM_CK3
SM_CK4

SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4

SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

DDR MUXING

DDR MUXING

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_RCOMP

SM_RCOMP#

SM_VREF#AR49

SM_VREF#AW4

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

CLK

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2

DMI

DMI

DMI_RXP3
DMI_TXN0

DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

CLKREQ#

ICH_SYNC#

TEST1
TEST2

MISC ME GRAPHICS VID

MISC ME GRAPHICS VID

AV29
BB23
BA25
AV23

AW30
BA23
AW25
AW23

BE29
AY32
BD39
BG37

BG20
BK16
BG16
BE13

BH18
BJ15
BJ14
BE16

BK31
BL31

BL15
BK14

AR49
AW4

B42
C42
H48
H47

K44
K45

AN47
AJ38
AN42
AN46

AM47
AJ39
AN41
AN45

AJ46
AJ41
AM40
AM44

AJ47
AJ42
AM39
AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49
AM50

H35
K36
G39
G40

A37
R32

SM_RCOMP_VOH
SM_RCOMP_VOL

M_RCOMPP
M_RCOMPN

DREFCLK
DREFCLK#
DREFSSCLK
DREFSSCLK#

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2

DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN

CLPWROK_MCH

MCH_CLVREF

CLK_3GPLLREQ#

TEST2_GMCH

M_CLK_DDR0 12
M_CLK_DDR1 12
M_CLK_DDR2 12
M_CLK_DDR3 12

M_CLK_DDR#0 12
M_CLK_DDR#1 12
M_CLK_DDR#2 12
M_CLK_DDR#3 12

M_CKE0 12,13
M_CKE1 12,13
M_CKE2 12,13
M_CKE3 12,13

M_CS0# 12,13
M_CS1# 12,13
M_CS2# 12,13
M_CS3# 12,13

M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13

DREFSSCLK# 3

CLK_MCH_3GPLL 3

CLK_MCH_3GPLL# 3

DMI_TXN0 17
DMI_TXN1 17
DMI_TXN2 17
DMI_TXN3 17

DMI_TXP0 17
DMI_TXP1 17
DMI_TXP2 17
DMI_TXP3 17

DMI_RXN0 17
DMI_RXN1 17
DMI_RXN2 17
DMI_RXN3 17

DMI_RXP0 17
DMI_RXP1 17
DMI_RXP2 17
DMI_RXP3 17

TP48 TPAD28TP48 TPAD28
TP51 TPAD28TP51 TPAD28
TP116 TPAD28TP116 TPAD28
TP49 TPAD28TP49 TPAD28
TP50 TPAD28TP50 TPAD28

R156

R156

1 2

0R0402-PAD

0R0402-PAD

-1

12

R135

R135

20KR2J-L2-GP

20KR2J-L2-GP

DDR_VREF_S3

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

CL_CLK0 17

CL_DATA0 17
PWROK 17,20
CL_RST#0 17

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

MCH_ICH_SYNC# 17

C209

C209

UMA

GMCH_DDCCLK15
GMCH_DDCDATA15

GMCH_BLUE15

GMCH_GREEN15

GMCH_RED15

GMCH_VSYNC15
GMCH_HSYNC15

1D25V_S0

12

C

GMCH_LCDVDD_ON14

3D3V_S0

1
2
3
4 5

1 2

12

R157

R157
392R2F-GP

392R2F-GP

CLK_DDC_EDID14
DAT_DDC_EDID14

TP53TPAD30 TP53TPAD30

TP54TPAD30 TP54TPAD30

R161

R161
1KR2F-3-GP

1KR2F-3-GP

L_BKLTCTL14
GMCH_BL_ON32

TP52TPAD30 TP52TPAD30

GMCH_TXACLK-14
GMCH_TXACLK+14
GMCH_TXBCLK-14
GMCH_TXBCLK+14

GMCH_TXAOUT0-14
GMCH_TXAOUT1-14
GMCH_TXAOUT2-14

GMCH_TXAOUT0+14
GMCH_TXAOUT1+14
GMCH_TXAOUT2+14

GMCH_TXBOUT0-14
GMCH_TXBOUT1-14
GMCH_TXBOUT2-14

GMCH_TXBOUT0+14
GMCH_TXBOUT1+14
GMCH_TXBOUT2+14

TV_DACA15
TV_DACB15
TV_DACC15

RN15

RN15

8
7
6

SRN2K2J-2-GP

SRN2K2J-2-GP

GMCH_BLUE
GMCH_GREEN
GMCH_RED

1 2

UMA

UMA

R369 33R2F-3-GP

R369 33R2F-3-GP

1 2

UMA

UMA

R368 33R2F-3-GP

R368 33R2F-3-GP

1 2

R360 1K3R2F-1-GPR360 1K3R2F-1-GP

FOR Calero: 255 ohm
Crestline: 1.3k ohm

CRT_IREF routing Trace
width use 20 mil

R353 1KR2F-3-GPR353 1KR2F-3-GP

12

R356

R356
3K01R2F-3-GP

3K01R2F-3-GP

R358

R358
1KR2F-3-GP

1KR2F-3-GP

1 2

UMA

LCTLA_CLK

LCTLB_DATA
CLK_DDC_EDID
DAT_DDC_EDID

GMCH_LCDVDD_ON

LIBG

L_LVBG

GMCH_TXAOUT3-

GMCH_TXAOUT3+

TV_DCONSEL0

TV_DCONSEL1

GMCH_DDCCLK

GMCH_DDCDATA

GMCH_VS

GMCH_HS

CRT_IREF

1D8V_S3

12

12

C468

C468

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C473

C473

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

U48C

U48C

J40
H39
E39
E40
C37
D35
K40

L41
L43
N41
N40
D46
C45
D44
E42

G51

E51
F49

C48
G50

E50
F48

D47
G44

B47
B45

E44
A47
A45

E27
G27
K27

F27

J27
L27

M35
P33

H32
G32
K29

J29
F29
E29

K33
G35
E33
C32
F33

CRESTLINE-GP-U

CRESTLINE-GP-U

3 OF 10

3 OF 10

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2

TVA_DAC
TVB_DAC
TVC_DAC

TVA_RTN
TVB_RTN
TVC_RTN

TV_DCONSEL0
TV_DCONSEL1

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC

SM_RCOMP_VOH

12

C465

C465
SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

C474

C474
SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

LVDS

LVDS

TV VGA

TV VGA

D

N43

PEG_COMPI

M43

PEG_COMPO

J51

PEG_RX#0

L51

PEG_RX#1

N47

PEG_RX#2

T45

PEG_RX#3

T50

PEG_RX#4

U40

PEG_RX#5

Y44

PEG_RX#6

Y40

PEG_RX#7

AB51

PEG_RX#8

W49

PEG_RX#9

AD44

PEG_RX#10

AD40

PEG_RX#11

AG46

PEG_RX#12

AH49

PEG_RX#13

AG45

PEG_RX#14

AG41

PEG_RX#15

J50

PEG_RX0

L50

PEG_RX1

M47

PEG_RX2

U44

PEG_RX3

T49

PEG_RX4

T41

PEG_RX5

W45

PEG_RX6

W41

PEG_RX7

AB50

PEG_RX8

Y48

PEG_RX9

AC45

PEG_RX10

AC41

PEG_RX11

AH47

PEG_RX12

AG49

PEG_RX13

AH45

PEG_RX14

AG42

PEG_RX15
PEG_TX#0

PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9

PEG_TX#10

PCI_EXPRESS GRAPHICS

PCI_EXPRESS GRAPHICS

PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

GTXN0
GTXN1
GTXN2
GTXN3
GTXN4
GTXN5
GTXN6
GTXN7
GTXN8
GTXN9
GTXN10
GTXN11
GTXN12
GTXN13
GTXN14
GTXN15

GTXP0
GTXP1
GTXP2
GTXP3
GTXP4
GTXP5
GTXP6
GTXP7
GTXP8
GTXP9
GTXP10
GTXP11
GTXP12
GTXP13
GTXP14
GTXP15

UMA

GMCH_BLUE

GMCH_GREEN

GMCH_RED

FOR Discrete change R137,
R139 & R142 to 0 ohm

SB

R128

R128
150R2F-1-GP

150R2F-1-GP
R129

R129
150R2F-1-GP

150R2F-1-GP
R130

R130
150R2F-1-GP

150R2F-1-GP

PEG_CMP

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

12

UMA

UMA

12

UMA

UMA

12

UMA

UMA

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

1 2

G72

G72

R142

R142

UMA

UMA

150R2F-1-GP

150R2F-1-GP

1 2

R139

R139

UMA

UMA

150R2F-1-GP

150R2F-1-GP

1 2

R137

R137

UMA

UMA

150R2F-1-GP

150R2F-1-GP

1 2

TV_DACA

TV_DACB

TV_DACC

1D05V_S0

R155

R155

12

24D9R2F-L-GP

24D9R2F-L-GP

C203 SCD1U10V2KX-5GP

C203 SCD1U10V2KX-5GP
C189 SCD1U10V2KX-5GP

C189 SCD1U10V2KX-5GP
C205 SCD1U10V2KX-5GP

C205 SCD1U10V2KX-5GP
C211 SCD1U10V2KX-5GP

C211 SCD1U10V2KX-5GP
C213 SCD1U10V2KX-5GP

C213 SCD1U10V2KX-5GP
C200 SCD1U10V2KX-5GP

C200 SCD1U10V2KX-5GP
C192 SCD1U10V2KX-5GP

C192 SCD1U10V2KX-5GP
C207 SCD1U10V2KX-5GP

C207 SCD1U10V2KX-5GP
C229 SCD1U10V2KX-5GP

C229 SCD1U10V2KX-5GP
C221 SCD1U10V2KX-5GP

C221 SCD1U10V2KX-5GP
C217 SCD1U10V2KX-5GP

C217 SCD1U10V2KX-5GP
C517 SCD1U10V2KX-5GP

C517 SCD1U10V2KX-5GP
C228 SCD1U10V2KX-5GP

C228 SCD1U10V2KX-5GP
C226 SCD1U10V2KX-5GP

C226 SCD1U10V2KX-5GP
C514 SCD1U10V2KX-5GP

C514 SCD1U10V2KX-5GP
C219 SCD1U10V2KX-5GP

C219 SCD1U10V2KX-5GP
C201 SCD1U10V2KX-5GP

C201 SCD1U10V2KX-5GP
C187 SCD1U10V2KX-5GP

C187 SCD1U10V2KX-5GP
C204 SCD1U10V2KX-5GP

C204 SCD1U10V2KX-5GP
C208 SCD1U10V2KX-5GP

C208 SCD1U10V2KX-5GP
C215 SCD1U10V2KX-5GP

C215 SCD1U10V2KX-5GP
C193 SCD1U10V2KX-5GP

C193 SCD1U10V2KX-5GP
C190 SCD1U10V2KX-5GP

C190 SCD1U10V2KX-5GP
C206 SCD1U10V2KX-5GP

C206 SCD1U10V2KX-5GP
C224 SCD1U10V2KX-5GP

C224 SCD1U10V2KX-5GP
C220 SCD1U10V2KX-5GP

C220 SCD1U10V2KX-5GP
C216 SCD1U10V2KX-5GP

C216 SCD1U10V2KX-5GP
C518 SCD1U10V2KX-5GP

C518 SCD1U10V2KX-5GP
C227 SCD1U10V2KX-5GP

C227 SCD1U10V2KX-5GP
C225 SCD1U10V2KX-5GP

C225 SCD1U10V2KX-5GP
C515 SCD1U10V2KX-5GP

C515 SCD1U10V2KX-5GP
C218 SCD1U10V2KX-5GP

C218 SCD1U10V2KX-5GP

G72

PEG_RXN[15..0] 28

PEG_RXP[15..0] 28

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

GMCH_BL_ON
GMCH_LCDVDD_ON

LIBG

GMCH_VS
GMCH_HS

LCTLB_DATA
LCTLA_CLK
PM_EXTTS#0
PM_EXTTS#1

UMA

E

R149

R149

1 2

100KR2J-1-GP

100KR2J-1-GP
100KR2J-1-GP

100KR2J-1-GP

1 2

R138

R138

2K4R2F-GP

2K4R2F-GP

R154

R154

1 2

UMA

UMA

R153

R153

1 2

0R2J-2-GP

0R2J-2-GP

R148

R148

1 2

0R2J-2-GP

0R2J-2-GP

RN20

RN20

1
2
3
4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

UMA

UMA

UMA

UMA

G72

G72

G72

G72

PEG_TXN[15..0] 28

PEG_TXP[15..0] 28

3D3V_S0

8
7
6

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (2 of 6)

GMCH (2 of 6)

GMCH (2 of 6)

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

745Monday, January 14, 2008

745Monday, January 14, 2008

745Monday, January 14, 2008

E

-1

-1

-1

of

of

of

A

B

C

D

E

4 4

M_A_DQ[63..0]12

3 3

2 2

M_A_DQ[63..0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AR43

AW44

BA45
AY46
AR41
AR45

AT42

AW47

BB45

BF48

BG47

BJ45
BB47
BG50
BH49
BE45

AW43

BE44
BG42
BE40

BF44
BH45
BG40

BF40
AR40

AW40

AT39

AW36
AW41

AY41
AV38

AT38
AV13

AT13

AW11

AV11
AU15

AT11
BA13
BA11
BE10
BD10

BG10

AW9

AM8

AN10

AM9

AN11

BD8
AY9

BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3

AT9
AN9

4 OF 10

4 OF 10

U48D

U48D

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

CRESTLINE-GP-U

CRESTLINE-GP-U

SA_CAS#

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6

SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

SA_MA10

DDR SYSTEM MEMORRY A

DDR SYSTEM MEMORRY A

SA_MA11

SA_MA12

SA_MA13

SA_MA14

SA_RAS#

SA_RCVEN#

SA_WE#

SA_BS0
SA_BS1
SA_BS2

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9

BB19
BK19
BF29

BL17
AT45

BD44
BD42
AW38
AW13
BG8
AY5
AN6

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BJ29

BE18
AY20

BA19

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6

M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8

M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

SA_RCVEN#

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

TP42 TPAD30TP42 TPAD30

Place Test PAD Near to Chip
as could as possible

M_A_DQS[7..0] 12

M_A_RAS# 12,13

M_A_WE# 12,13

M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13

M_A_DM[7..0] 12

M_A_DQS#[7..0] 12

M_A_A[14..0] 12,13

5 OF 10

5 OF 10

U48E

M_B_DQ[63..0]12

M_B_DQ[63..0]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AP49

AR51
AW50
AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50

BF49

BJ50
BJ44
BJ43

BL43
BK47
BK49
BK43
BK42

BJ41

BL41

BJ37

BJ36
BK41

BJ40

BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12

BJ10

BK10

BG1

BL9
BK5
BL5
BK9

BJ8
BJ6
BF4
BH5

BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

U48E

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

CRESTLINE-GP-U

CRESTLINE-GP-U

SB_BS0
SB_BS1
SB_BS2

SB_CAS#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6

SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14

SB_RAS#

SB_RCVEN#

SB_WE#

AY17
BG18
BG36

BE17

M_B_DM0

AR50

M_B_DM1

BD49

M_B_DM2

BK45

M_B_DM3

BL39

M_B_DM4

BH12

M_B_DM5

BJ7

M_B_DM6

BF3

M_B_DM7

AW2

M_B_DQS0

AT50

M_B_DQS1

BD50

M_B_DQS2

BK46

M_B_DQS3

BK39

M_B_DQS4

BJ12

M_B_DQS5

BL7

M_B_DQS6

BE2

M_B_DQS7

AV2

M_B_DQS#0

AU50

M_B_DQS#1

BC50

M_B_DQS#2

BL45

M_B_DQS#3

BK38

M_B_DQS#4

BK12

M_B_DQS#5

BK7

M_B_DQS#6

BF2

M_B_DQS#7

AV3

M_B_A0

BC18

M_B_A1

BG28

M_B_A2

BG25

M_B_A3

AW17

M_B_A4

BF25

M_B_A5

BE25

M_B_A6

BA29

M_B_A7

BC28

M_B_A8

AY28

M_B_A9

BD37

M_B_A10

BG17

M_B_A11

BE37

M_B_A12

BA39

M_B_A13

BG13

M_B_A14

BE24
AV16

SB_RCVEN#

AY18
BC17

Place Test PAD Near to Chip
ascould as possible

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_DQS[7..0] 12

M_B_DQS#[7..0] 12

M_B_A[14..0] 12,13

M_B_RAS# 12,13

TP41TPAD30TP41 TPAD30

M_B_WE# 12,13

M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13

M_B_DM[7..0] 12

1 1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (3 of 6)

GMCH (3 of 6)

GMCH (3 of 6)

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

845Monday, January 14, 2008

845Monday, January 14, 2008

845Monday, January 14, 2008

E

-1

-1

of

of

of

-1

A

1D05V_S0

4 4

1 2

0R0402-PAD

0R0402-PAD

1D8V_S3

3138mA

3 3

2 2

1D05V_S0

1 1

12

C129

C129

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_NCTF + VCC=1573mA

U48F

A

AT35
AT34
AH28
AC32
AC31
AK32

AJ31

AJ28
AH32
AH31
AH29
AF32

AU32
AU33
AU35
AV33

AW33
AW35

AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35

BJ32

BJ33

BJ34
BK32
BK33
BK34
BK35
BL33
AU30

W13

W14
AA20

AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31

AJ20
AN14

R30

R20
T14

Y12

U48F

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

CRESTLINE-GP-U

CRESTLINE-GP-U

1573mA

-1

VCC_GMCH1

R143

R143

12

C210

C210

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

6 OF 10

6 OF 10

VCC CORE

VCC CORE

POWER

POWER

VCC SM

VCC SM

VCC GFX

VCC GFX

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC SM LF

VCC SM LF

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

AW45
BC39
BE39
BD17
BD4
AW8
AT6

B

1D05V_S0

SB

SB:Remove R123,R132,R136,R144

VCC_AXG_NCTF + VCC_AXG=7700mA

UMA

UMA

12

12

C158

C158

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA

UMA

DY

DY

12

12

C151

C151

C156

C156

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

UMA

UMA

SB:DIS remove 0 ohm on C129,C210,C158,C161

SM_LF1_GMCH
SM_LF2_GMCH
SM_LF3_GMCH
SM_LF4_GMCH
SM_LF5_GMCH
SM_LF6_GMCH
SM_LF7_GMCH

12

B

12

12

C135

C135

C143

C143

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C161

C161

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C139

C139

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

C152

C152

SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

UMA

UMA

SCD47U16V3ZY-3GP

SCD47U16V3ZY-3GP

12

12

C191

C191

C150

C150

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

C

D

E

FOR VCC CORE AND VCC NCTF

1D05V_S0

12

12

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

12

C140

C140

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C62

C62

C126

C126

C155

C155

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C45

C45

C141

C141

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U2D5VBM-2GP

ST220U2D5VBM-2GP

308 mils from
the Edge

1D05V_S0

12

DY

DY

12

C160

C160

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TC8

TC8

12

FOR VCC CORE

12

12

C136

C136

C183

C183

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C116

C116

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Coupling CAP

12

C178

C178

DY

DY

C430

C430

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Coupling CAP 370 mils from the Edge

-1

FOR VCC AXM NCTF AND VCC AXM

R147

R147

VCC_AXM_S3

12

12

12

C175

C175

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C185

C185

12

C186

C186

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Coupling CAP

12

12

C170

C167

C167

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C170

C169

C169

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D05V_S0

1 2

0R1206-PAD

0R1206-PAD

Place on the Edge

VCC_AXM_NCTF + VCC_AXM=540mA

Place CAP where
LVDS and DDR2 taps

C179

C179

1D8V_S3

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

FOR VCC SM

C184

C184

12

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TC11

ST220U4VDM-23GPDYTC11

ST220U4VDM-23GP

12

Place on the Edge

12

12

C182

C182

C188

C188

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

DY

DY

D

12

C448

C448

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Date: Sheet

Date: Sheet

Date: Sheet

12

C202

C202

C212

C212

12

12

C176

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C

C176

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37

AJ33

AJ35
AK33
AK35
AK36
AK37
AD33

AJ36
AM35

AL33

AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36

AL24

AL26

AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33

AL29

AL31

AL32
AR31
AR32
AR33

Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

7 OF 10

7 OF 10

U48G

U48G

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF

CRESTLINE-GP-U

CRESTLINE-GP-U

T27

VSS_NCTF

T37

VSS_NCTF

U24

VSS_NCTF

U28

VSS_NCTF

V31

VSS_NCTF

V35

VSS_NCTF

AA19

VSS_NCTF

AB17

VSS_NCTF

AB35

VSS_NCTF

AD19

VSS_NCTF

AD37

VSS_NCTF

AF17

VSS_NCTF

AF35

VSS_NCTF

AK17

VSS_NCTF

AM17

VSS_NCTF

VSS NCTF

VSS NCTF

VCC NCTF

VCC NCTF

POWER

POWER

VSS SCBVSS AXM

VSS SCBVSS AXM

GMCH (4 of 6)

GMCH (4 of 6)

GMCH (4 of 6)

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

AM24

VSS_NCTF

AP26

VSS_NCTF

AP28

VSS_NCTF

AR15

VSS_NCTF

AR19

VSS_NCTF

AR28

VSS_NCTF

A3

VSS_SCB

B2

VSS_SCB

C1

VSS_SCB

BL1

VSS_SCB

BL51

VSS_SCB

A51

VSS_SCB

AT33

VCC_AXM

AT31

VCC_AXM

AK29

VCC_AXM

AK24

VCC_AXM

AK23

VCC_AXM

AJ26

VCC_AXM

AJ23

VCC_AXM

VSS AXM NCTF

VSS AXM NCTF

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

VCC_AXM_S3

945Monday, January 14, 2008

945Monday, January 14, 2008

945Monday, January 14, 2008

of

of

of

-1M

TP155 TPAD30TP155 TPAD30
TP156 TPAD30TP156 TPAD30

TP157 TPAD30TP157 TPAD30
TP158 TPAD30TP158 TPAD30

-1M

-1M

-1M

A

3D3V_CRTDAC_S0

1D25V_S0

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

4 4

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D25V_S0

12

FCM1608KF-1-GP

FCM1608KF-1-GP

FCM1608KF-1-GP

FCM1608KF-1-GP

3 3

120ohm 100MHz

1D25V_S0

1 2

3D3VTVDAC 3D3V_S0

2 2

-1

R162

R162

12

0R0603-PAD

0R0603-PAD

R398

R398

12

0R0603-PAD

0R0603-PAD

1D25V_SUS_MCH_PLL2

R100

R100

0R0603-PAD

0R0603-PAD

120ohm 100MHz

1 2

L10

L10

1 2

L9

L9

220ohm 100MHz

BLM18BB221SN1D-GP

BLM18BB221SN1D-GP

L13

L13

180ohm 100MHz

L11

L11

1 2

HCB1608K-181T20GP

HCB1608K-181T20GP

-1

R349

R349

0R0402-PAD

0R0402-PAD

R352

R352

0R0402-PAD

0R0402-PAD

R351

R351

0R0402-PAD

0R0402-PAD

12

12

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C428

C428

DY

DY

UMA

UMA

M_VCCA_TVDACA

12

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_TVDACB

12

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_TVDACC

12

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C223

C223

C513

C513

C461

C461

UMA

UMA

C464

C464

UMA

UMA

C466

C466

UMA

UMA

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C429

C429

12

M_VCCA_DPLLA

12

C222

C222
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_DPLLB

12

C527

C527
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_HPLL

12

C437

C437
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_MPLL

1D25V_RUN_PEGPLL

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
C508

C508

12

C460

C460

UMA

UMA

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C463

C463

UMA

UMA

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C467

C467

UMA

UMA

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S0

12

C441

C441
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

FOR Discrete change C461,
C464, C466 to 0 ohm

C475

C475

UMA

UMA

180ohm 100MHz

R359

R359
0R3-0-U-GP

0R3-0-U-GP

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

M_VCCA_DAC_BG

12

UMA

UMA

C472

C472

20060809

1D5V_S0

1 1

-1

R150

R150

0R0603-PAD

0R0603-PAD

1D5VRUN_TVDAC

12

12

C181

C181
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

L2

L2

UMA

UMA

1 2

HCB1608K-181T20GP

HCB1608K-181T20GP

180ohm 100MHz

A

UMA

UMA

R146

R146
0R3-0-U-GP

0R3-0-U-GP

12

C180

C180
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C172

C172

UMA

UMA

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

1 2

1D5VRUN_QDAC

12

C166

C166

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCD_CRT

R151

R151
0R2J-2-GP

0R2J-2-GP

G72

G72

FOR Discrete change
C166 to 0 ohm

B

10mA

R119

R119
0R2J-2-GP

0R2J-2-GP

1 2

12

12

R357

R357
0R2J-2-GP

0R2J-2-GP

G72

G72

1D8V_TXLVDS_S3

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

3D3V_S0

R395

R395

0R0402-PAD

0R0402-PAD

400uA

1D25V_S0

C681

C681

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

DY

DY

DY

DY

1D25V_S0

12

C144

C144

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

60mA

1D25V_SUS_MCH_PLL2

12

1D8V_S3

B

3D3V_S0

12

R118

R118
0R2J-2-GP

0R2J-2-GP

G72

G72

UMA

UMA

12

C159

C159
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R362

R362

G72

G72

5mA

12

C509

C509

UMA

UMA

-1

3D3V_RUN_PEG_BG

12

12

C516

C516
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C682

C682

C131

C131

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

12

12

C164

C164

DY

DY

SC1U10V3KX-3GP

SC1U10V3KX-3GP

40mA
40mA
40mA

1D5VRUN_TVDAC
1D5VRUN_QDAC

1D25V_SUS_MCH_PLL2

1D25V_RUN_PEGPLL

12

C520

C520

C147

C147

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

UMA

UMA

R376

R376

12

0R3-0-U-GP

0R3-0-U-GP

0R2J-2-GP

0R2J-2-GP

1 2

G72

G72

R377

R377

80mA

180ohm 100MHz

R361

R361

12

0R3-0-U-GP

0R3-0-U-GP

UMA

UMA

3D3V_SYNC_S0

3D3V_CRTDAC_S0

UMA

UMA

12

M_VCCA_DAC_BG

0R2J-2-GP

0R2J-2-GP

80mA

M_VCCA_DPLLA

80mA

M_VCCA_DPLLB

50mA

M_VCCA_HPLL

150mA

M_VCCA_MPLL

0R2J-2-GP

0R2J-2-GP

1D8V_TXLVDS

1 2

R393

R393

UMA

UMA

0R2J-2-GP

0R2J-2-GP

1 2

G72

G72

R383

R383

1D25V_RUN_PEGPLL

12

12

C154

C154

DY

DY

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C168

C168

M_VCCA_TVDACA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_TVDACB
M_VCCA_TVDACC

60mA

250mA

100mA

1 2

R160 0R0402-PADR160 0R0402-PAD

-1

150mA

1D8V_SUS_DLVDS

12

C198

C198

UMA

UMA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

10mA

C148

C148

SC1U10V3KX-3GP

SC1U10V3KX-3GP

VCCD_CRT

5mA

PEGPLL_R

UMA

UMA

U48H

U48H

J32

VCC_SYNC

A33

VCCA_CRT_DAC

B33

VCCA_CRT_DAC

A30

VCCA_DAC_BG

B32

VSSA_DAC_BG

B49

VCCA_DPLLA

H49

VCCA_DPLLB

AL2

VCCA_HPLL

AM2

VCCA_MPLL

A41

VCCA_LVDS

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

U51

VCCA_PEG_PLL

AW18

VCCA_SM

AV19

VCCA_SM

AU19

VCCA_SM

AU18

VCCA_SM

AU17

VCCA_SM

AT22

VCCA_SM

AT21

VCCA_SM

AT19

VCCA_SM

AT18

VCCA_SM

AT17

VCCA_SM

AR17

VCCA_SM_NCTF

AR16

VCCA_SM_NCTF

BC29

VCCA_SM_CK

BB29

VCCA_SM_CK

C25

VCCA_TVA_DAC

B25

VCCA_TVA_DAC

C27

VCCA_TVB_DAC

B27

VCCA_TVB_DAC

B28

VCCA_TVC_DAC

A28

VCCA_TVC_DAC

M32

VCCD_CRT

L29

VCCD_TVDAC

N28

VCCD_QDAC

AN2

VCCD_HPLL

U48

VCCD_PEG_PLL

J41

VCCD_LVDS

H42

VCCD_LVDS

CRESTLINE-GP-U

CRESTLINE-GP-U

12

C499

C499
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C

8 OF 10

8 OF 10

C

POWER

POWER

A LVDS PLL CRT

A LVDS PLL CRT

AXD

AXD

APEG

APEG

SM CK

SM CK

TV A CK A SM

TV A CK A SM

DMI

DMI

LVDS TV/CRT

LVDS TV/CRT

VTT

VTT

VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD

VCC_AXD_NCTF

VCC_AXF
VCC_AXF

AXF

AXF

VCC_AXF

VCC_DMI

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

VCC_TX_LVDS

VCC_HV
VCC_HV

HV

HV

VCC_PEG
VCC_PEG
VCC_PEG

PEG

PEG

VCC_PEG
VCC_PEG

VCC_RXR_DMI
VCC_RXR_DMI

VTTLF
VTTLF
VTTLF

VTTLF

VTTLF

D

Place on the edge

12

C119

C119

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

C130

C130

12

C121

C121

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1D25V_SUS_AXD

1D25V_S0

12

C173

C173

SC1U10V3KX-3GP

SC1U10V3KX-3GP

100mA

1D8V_SUS_SM_CK

12

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

1200mA

250mA

12

C145

C145

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

D

12

DY

DY

U13

VTT

U12

VTT

U11

VTT

U9

VTT

U8

VTT

U7

VTT

U5

VTT

U3

VTT

U2

VTT

U1

VTT

T13

VTT

T11

VTT

T10

VTT

T9

VTT

T7

VTT

T6

VTT

T5

VTT

T3

VTT

T2

VTT

R3

VTT

R2

VTT

R1

VTT

AT23
AU28
AU24
AT29
AT25
AT30

AR29

B23
B21
A21

AJ50

BK24
BK23
BJ24
BJ23

A43

C40
B40

AD51
W50
W51
V49
V50

AH50
AH51

A7
F2
AH1

100mA

VTTLF1
VTTLF2
VTTLF3

C133

C133

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

200mA

350mA

1D8V_TXLVDS_S3

3D3V_HV_S0

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C120

C120

C123

C123

DY

DY

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

C174

C174

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C171

C171
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D25V_S0

12

C163

C163

C162

C162

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C199

C199

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C439

C439

12

C157

C157
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_S0

12

12

C443

C443

C438

C438

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R145

R145

0R0603-PAD

0R0603-PAD

12

C177

C177

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C165

C165

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

200mA

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

100mA

1D05V_S0

12

C146

C146
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

D31

D31

1

3

BAT54-7-F-GP

BAT54-7-F-GP

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

2

1D05V_S0

12

850mA

C66

C66

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D25V_S0

-1

-1

R140

R140

0R0603-PAD

0R0603-PAD

G72

G72

1D05V_S0

12

C132

C132
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_HV_S0

12

R394

R394
0R3-0-U-GP

0R3-0-U-GP

UMA

UMA

0R2J-2-GP

0R2J-2-GP

1 2

R392

R392

10R2J-2-GP

10R2J-2-GP

R399

R399

GMCH (5 of 6)

GMCH (5 of 6)

GMCH (5 of 6)

E

1D8V_S3

1D8V_S3

12

3D3V_S0 3D3V_HV_S0

12

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

R372

R372

0R0402-PAD

0R0402-PAD

E

-1

12

10 45Monday, January 14, 2008

10 45Monday, January 14, 2008

10 45Monday, January 14, 2008

12

C492

C492

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

-1M

-1M

of

of

of

-1M

5

D D

C C

B B

A A

5

AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13

AC39
AC43
AC47

AD21
AD26
AD29

AD41
AD45
AD49

AD50
AE10

AE14
AF20

AF23
AF24
AF31

AG2
AG38
AG43
AG47
AG50

AH40
AH41

AJ11

AJ13

AJ21

AJ24

AJ29

AJ32

AJ43

AJ45

AJ49
AK20
AK21
AK26
AK28
AK31
AK51

AM11
AM13

AM3

AM4
AM41
AM45

AN38
AN39
AN43

AP48
AP50
AR11

AR39
AR44
AR47

AT10
AT14
AT41
AT49

AU23
AU29

AU36
AU49
AU51
AV39
AV48

AW1

AW12
AW16

A13
A15
A17
A24

AC3

AD1

AD3

AD5
AD8

AE6

AH3

AH7
AH9

AL1

AN1

AN5
AN7
AP4

AR2

AR7

AU1

AU3

9 OF 10

9 OF 10

U48I

U48I

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS

VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CRESTLINE-GP-U

CRESTLINE-GP-U

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

4

4

3

10 OF 10

10 OF 10

U48J

U48J

C46

VSS

C50

VSS

C7

VSS

D13

VSS

D24

VSS

D3

VSS

D32

VSS

D39

VSS

D45

VSS

D49

VSS

E10

VSS

E16

VSS

E24

VSS

E28

VSS

E32

VSS

E47

VSS

F19

VSS

F36

VSS

F4

VSS

F40

VSS

F50

VSS

G1

VSS

G13

VSS

G16

VSS

G19

VSS

G24

VSS

G28

VSS

G29

VSS

G33

VSS

G42

VSS

G45

VSS

G48

VSS

G8

VSS

H24

VSS

H28

VSS

H4

VSS

H45

VSS

J11

VSS

VSS

VSS

J16

VSS

J2

VSS

J24

VSS

J28

VSS

J33

VSS

J35

VSS

J39

VSS

K12

VSS

K47

VSS

K8

VSS

L1

VSS

L17

VSS

L20

VSS

L24

VSS

L28

VSS

L3

VSS

L33

VSS

L49

VSS

M28

VSS

M42

VSS

M46

VSS

M49

VSS

M5

VSS

M50

VSS

M9

VSS

N11

VSS

N14

VSS

N17

VSS

N29

VSS

N32

VSS

N36

VSS

N39

VSS

N44

VSS

N49

VSS

N7

VSS

P19

VSS

P2

VSS

P23

VSS

P3

VSS

P50

VSS

R49

VSS

T39

VSS

T43

VSS

T47

VSS

U41

VSS

U45

VSS

U50

VSS

V2

VSS

V3

VSS

CRESTLINE-GP-U

CRESTLINE-GP-U

3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

GMCH (6 of 6)

GMCH (6 of 6)

GMCH (6 of 6)

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

11 45Monday, January 14, 2008

11 45Monday, January 14, 2008

11 45Monday, January 14, 2008

1

-1M

-1M

of

of

of

-1M

A

DM2

M_B_A[14..0]8,13

4 4

TPAD30

TPAD30

M_B_BS#28,13
M_B_BS#08,13

M_B_BS#18,13

M_B_DQ[63..0]8

3 3

2 2

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

1 1

DDR_VREF_S3

C197

C197

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

TP32

TP32

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_ODT27,13
M_ODT37,13

12

12

C196

C196

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

A

102
101
100

99
98
97
94
92
93
91

105

90
89

116

86
84
85

107
106

5

7
17
19

4

6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76

123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

11
29
49
68

129
146
167
186

13
31
51
70

131
148
169
188

114
119

1

2

202

MH1

DM2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

OTD0
OTD1

VREF
VSS

GND
MH1

DDR2-200P-22-GP-U1

DDR2-200P-22-GP-U1

62.10017.A61

62.10017.A61

High 9.2mm

VDDSPD

NC#120

NC#163/TEST

NORMAL TY PE

RAS#
CAS#

CKE0
CKE1

NC#50
NC#69
NC#83

CS0#
CS1#

CK0#

CK1#

WE#

GND

B

108
109
113

110
115

79
80

30

CK0

32
164

CK1

166

M_B_DM0

10

DM0

M_B_DM1

26

DM1

M_B_DM2

52

DM2

M_B_DM3

67

DM3

M_B_DM4

130

DM4

M_B_DM5

147

DM5

M_B_DM6

170

DM6

M_B_DM7

185

DM7

195

SDA

197

SCL

199
198

SA0

DDRB_SA0

200

SA1

50
69
83
120
163

81

VDD

82

VDD

87

VDD

88

VDD

95

VDD

96

VDD

103

VDD

104

VDD

111

VDD

112

VDD

117

VDD

118

VDD

3

VSS

8

VSS

9

VSS

12

VSS

15

VSS

18

VSS

21

VSS

24

VSS

27

VSS

28

VSS

33

VSS

34

VSS

39

VSS

40

VSS

41

VSS

42

VSS

47

VSS

48

VSS

53

VSS

54

VSS

59

VSS

60

VSS

65

VSS

66

VSS

71

VSS

72

VSS

77

VSS

78

VSS

121

VSS

122

VSS

127

VSS

128

VSS

132

VSS

133

VSS

138

VSS

139

VSS

144

VSS

145

VSS

149

VSS

150

VSS

155

VSS

156

VSS

161

VSS

162

VSS

165

VSS

168

VSS

171

VSS

172

VSS

177

VSS

178

VSS

183

VSS

184

VSS

187

VSS

190

VSS

193

VSS

196

VSS

201
MH2

MH2

B

R68

R68

10KR2J-3-GP

10KR2J-3-GP

M_B_RAS# 8,13
M_B_WE# 8,13
M_B_CAS# 8,13

M_CS2# 7,13
M_CS3# 7,13

M_CKE2 7,13
M_CKE3 7,13

M_CLK_DDR2 7
M_CLK_DDR#2 7

M_CLK_DDR3 7
M_CLK_DDR#3 7

SMBD_ICH 3,19
SMBC_ICH 3,19

12

12

C48

C48

1D8V_S3

M_B_DM[7..0] 8

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_S0

Place near DM2

M_CLK_DDR3

12

DY

DY

EC5

EC5

SC10P50V2JN-4GP

SC10P50V2JN-4GP

M_CLK_DDR#3
M_CLK_DDR2

12

DY

DY

EC73

EC73

SC10P50V2JN-4GP

SC10P50V2JN-4GP

M_CLK_DDR#2

C

C

M_A_A[14..0]8,13

M_A_BS#28,13

M_A_BS#08,13
M_A_BS#18,13

M_A_DQ[63..0]8

M_CS0#7,13

M_CS1#7,13
M_CKE07,13
M_CKE17,13

M_A_RAS#8,13
M_A_CAS#8,13

M_A_WE#8,13

DDR_VREF_S3

C195

C195

DM1

DM1

MH1

M_A_A15

MH1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16_BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

79

CKE0

80

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

1

VREF

201

GND

62.10017.661

62.10017.661

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

TPAD30

TPAD30

12

DY

DY

M_A_A14

TP33

TP33

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

SMBC_ICH
SMBD_ICH

M_ODT07,13
M_ODT17,13

12

C194

C194

High 5.2mm

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

D

MH2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6

DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

CK0

CK0#

CK1

CK1#

SA0
SA1

VDD_SPD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NORMAL TY PE

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

SKT-SODIMM20020U3GP

SKT-SODIMM20020U3GP

D

MH2

M_A_DQS0

13

M_A_DQS1

31

M_A_DQS2

51

M_A_DQS3

70

M_A_DQS4

131

M_A_DQS5

148

M_A_DQS6

169

M_A_DQS7

188

M_A_DQS#0

11

M_A_DQS#1

29

M_A_DQS#2

49

M_A_DQS#3

68

M_A_DQS#4

129

M_A_DQS#5

146

M_A_DQS#6

167

M_A_DQS#7

186

M_A_DM0

10

M_A_DM1

26

M_A_DM2

52

M_A_DM3

67

M_A_DM4

130

M_A_DM5

147

M_A_DM6

170

M_A_DM7

185
30

32
164
166

198
200

199

81
82
87
88
95
96
103
104
111
112
117
118

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

202

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_A_DQS[7..0] 8

M_A_DQS#[7..0] 8

M_A_DM[7..0] 8

M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7

3D3V_S0

C49

C49

12

1D8V_S3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

E

Place near DM1

M_CLK_DDR0

12

DY

DY

EC72

EC72

SC10P50V2JN-4GP

SC10P50V2JN-4GP

M_CLK_DDR#0
M_CLK_DDR1

12

DY

DY

EC6

EC6

SC10P50V2JN-4GP

SC10P50V2JN-4GP

M_CLK_DDR#1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Socket

DDR2 Socket

DDR2 Socket

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

12 45Monday, January 14, 2008

12 45Monday, January 14, 2008

12 45Monday, January 14, 2008

E

-1M

-1M

-1M

of

A

DDR_VREF_S0

RN13

RN13

M_A_A12

1

8

2

7

3

6

8

4 4

3 3

2 2

1 1

7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

A

SRN56J-5-GP

SRN56J-5-GP

RN12

RN12

SRN56J-5-GP

SRN56J-5-GP

RN14

RN14

SRN56J-5-GP

SRN56J-5-GP

RN7

RN7

SRN56J-5-GP

SRN56J-5-GP

RN1

RN1

SRN56J-5-GP

SRN56J-5-GP

RN5

RN5

SRN56J-5-GP

SRN56J-5-GP

RN9

RN9

SRN56J-5-GP

SRN56J-5-GP

RN4

RN4

SRN56J-5-GP

SRN56J-5-GP

RN3

RN3

SRN56J-5-GP

SRN56J-5-GP

RN8

RN8

SRN56J-5-GP

SRN56J-5-GP

RN2

RN2

SRN56J-5-GP

SRN56J-5-GP

RN10

RN10

SRN56J-5-GP

SRN56J-5-GP

RN11

RN11

SRN56J-5-GP

SRN56J-5-GP

RN6

RN6

SRN56J-5-GP

SRN56J-5-GP

45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

M_A_A8

M_B_A9
M_B_A5

M_B_A12

M_B_A13

M_B_A2
M_B_A0
M_B_A4

M_B_A14
M_B_A11
M_B_A7
M_B_A6

M_A_A13

M_A_A0
M_A_A2
M_A_A4

M_A_A9
M_A_A14
M_A_A5
M_A_A3

M_A_A6
M_A_A7
M_A_A11

M_A_A1
M_A_A10

PARALLEL TERMINATION

Put decap near power(0.9V) and pull-up resistor

M_CKE0 7,12
M_A_BS#2 8,12

M_B_A8

M_CKE3 7,12
M_B_BS#2 8,12

M_CKE2 7,12

M_B_A3
M_B_A1
M_B_A10

M_B_WE# 8,12

M_ODT2 7,12
M_ODT3 7,12
M_B_RAS# 8,12

M_B_BS#1 8,12

M_B_BS#0 8,12
M_B_CAS# 8,12
M_CS3# 7,12
M_CS2# 7,12

M_ODT0 7,12
M_CS0# 7,12
M_A_RAS# 8,12

M_A_BS#1 8,12

M_A_CAS# 8,12
M_ODT1 7,12

M_CS1# 7,12

M_CKE1 7,12

M_A_BS#0 8,12

M_A_WE# 8,12

B

C

D

E

Decoupling Capacitor

DDR_VREF_S0

12

C110

C110

DY

DY

M_A_A[14..0]
M_B_A[14..0]

B

M_A_A[14..0] 8,12
M_B_A[14..0] 8,12

12

C138

C138

1D8V_S3

Put decap near power(0.9V)
and pull-up resistor

12

12

C117

C117

C134

C134

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D8V_S3

DY

DY

12

C104

C104

12

C446

C446

12

C421

C421

DY

DY

DY

DY

C

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C98

C98

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

Place these Caps near DM1

12

C436

C436

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C427

C427

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

C447

C447

12

C445

C445

12

C440

C440

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C435

C435

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

12

C103

C103

12

C107

C107

12

C424

C424

12

C442

C442

12

C115

C115

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C127

C127

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C109

C109

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C106

C106

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C432

C432

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C434

C434

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

DY

DY

Place these Caps near DM2

12

C433

C433

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C431

C431

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

C426

C426

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C423

C423

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

C112

C112

12

C101

C101

12

C97

C97

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

C99

C99

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

12

C125

C125

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C105

C105

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

DY

12

C417

C417

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

12

C418

C418

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

D

12

12

C128

C128

C118

C118

12

C137

C137

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C102

C102

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR2 Termination Resistor

DDR2 Termination Resistor

DDR2 Termination Resistor

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

E

-1M

-1M

of

13 45Monday, January 14, 2008

13 45Monday, January 14, 2008

13 45Monday, January 14, 2008

-1M

R297

R297

UMA

UMA

GMCH_LCDVDD_ON7

NV_LCDVDD_ON28

1 2

0R2J-2-GP

0R2J-2-GP

3D3V_S0

12

R336

R336

DY

DY

10KR2J-3-GP

10KR2J-3-GP

Q19

Q19
2N7002-11-GP

2N7002-11-GP

G

DY

DY

S D

LCD/INVERTER CONN

LCD1

LCD1

-1

R302

R302

R300

R300

41

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

3132
3334
3536
3738
3940

42

ACES-CONN40A-2GP

ACES-CONN40A-2GP

20.F0993.040

20.F0993.040

F1 FUSE-1A6V-2-GPF1 FUSE-1A6V-2-GP

1 2

U39

U39

1

DY

DY

OUT

IN

2

GND
NC#33EN

G5240B1T1U-GP

G5240B1T1U-GP

USBPN6 17
USBPP6 17

DY

DY

12

0R2J-2-GP

0R2J-2-GP

12

0R2J-2-GP

0R2J-2-GP

10KR2J-3-GP

10KR2J-3-GP

12

R301

R301

-1

DCBATOUT

12

12

C372

C372

SC10U35V0ZY-GP

SC10U35V0ZY-GP

CCD_PWR

12

C363

C363
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

USB_6­USB_6+

BRIGHTNESS_CN
BLON_OUT

EC61

EC61

DY

DY

SB

FUSE-3A32V-8-GP

FUSE-3A32V-8-GP

69.43001.111

69.43001.111

SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

12

-1

12

C369

C369

SC100P50V2JN-3GP

SC100P50V2JN-3GP

USB_6­USB_6+

3D3V_S0

NV_EDID_CLK
NV_EDID_DAT

CCD_PWR
BRIGHTNESS_CN

BLON_OUT

F2

F2

1 2

C361

C361
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R3060R0402-PAD R3060R0402-PAD

1 2

R3070R0402-PAD R3070R0402-PAD

1 2

12

C368

C368

SC100P50V2JN-3GP

SC100P50V2JN-3GP

LCDVDD_ON_1

G72

G72

LCD_TXBCLK+
LCD_TXBCLK­LCD_TXBOUT2+
LCD_TXBOUT2­LCD_TXBOUT1+
LCD_TXBOUT1­LCD_TXBOUT0+
LCD_TXBOUT0­LCD_TXACLK+
LCD_TXACLK­LCD_TXAOUT2+
LCD_TXAOUT2­LCD_TXAOUT1+
LCD_TXAOUT1­LCD_TXAOUT0+
LCD_TXAOUT0-

3D3V_S0

3D3V_CCD

5
4

DY

DY

L_BKLTCTL 7
BRIGHTNESS 32

BLON_OUT 32

LCDVDD 3D3V_S0

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

R344

R344
1KR2J-1-GP

1KR2J-1-GP

LCDVDD

12

C357

C357
SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

ER1 0R2J-2-GP

ER1 0R2J-2-GP
ER2 0R2J-2-GP

ER2 0R2J-2-GP
ER3 0R2J-2-GP

ER3 0R2J-2-GP
ER4 0R2J-2-GP

ER4 0R2J-2-GP
ER5 0R2J-2-GP

ER5 0R2J-2-GP
ER6 0R2J-2-GP

ER6 0R2J-2-GP
ER7 0R2J-2-GP

ER7 0R2J-2-GP
ER8 0R2J-2-GP

ER8 0R2J-2-GP

12

DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY

C353

C353

WLAN_LED#

BT_LED

DY

DY

12
12
12
12
12
12
12
12

12

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C354

C354

D39

D39

3

BAV99-5-GP

BAV99-5-GP

D13

D13

3

BAV99-5-GP

BAV99-5-GP

12

C356

C356
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

U38

U38

1

IN#1

GND

2

IN#8

OUT

3

IN#7

EN

4

IN#6

GND

IN#5

G5281RC1U-GP

G5281RC1U-GP

5V_S0

DY

DY

2

1

DY

DY

2

1

LCDVDD

LCDVDD_ON_1

12

C355

C355
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

SB

12

R299

R299
0R0402-PAD

0R0402-PAD

C362

C362
SC4D7U10V5ZY-3GP

SC4D7U10V5ZY-3GP

1 2

DY

DY

12

C360

C360
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

CCD_ON 32

LCD_TXBOUT1-28
LCD_TXBOUT1+28
LCD_TXBOUT0-28
LCD_TXBOUT0+28

LCD_TXBCLK-28

LCD_TXBCLK+28
LCD_TXBOUT2-28
LCD_TXBOUT2+28

LCD_TXACLK-28

LCD_TXACLK+28

LCD_TXAOUT2-28

LCD_TXAOUT2+28

LCD_TXAOUT1-28

LCD_TXAOUT1+28

LCD_TXAOUT0-28

LCD_TXAOUT0+28

9
8
7
6
5

LCD_TXBOUT1­LCD_TXBOUT1+
LCD_TXBOUT0­LCD_TXBOUT0+

LCD_TXBCLK­LCD_TXBCLK+
LCD_TXBOUT2­LCD_TXBOUT2+

LCD_TXACLK­LCD_TXACLK+
LCD_TXAOUT2­LCD_TXAOUT2+

LCD_TXAOUT1­LCD_TXAOUT1+
LCD_TXAOUT0­LCD_TXAOUT0+

SC1U16V3ZY-GP

SC1U16V3ZY-GP

12

U37

U37

1

OUT

2

GND
ON/OFF#3IN

AAT4280IGU-3-T1GP

AAT4280IGU-3-T1GP

RN18

RN18

1
2
3
4 5

SRN0J-7-GP

SRN0J-7-GP

RN19

RN19

1
2
3
4 5

SRN0J-7-GP

SRN0J-7-GP

RN17

RN17

1
2
3
4 5

SRN0J-7-GP

SRN0J-7-GP

RN16

RN16

1
2
3
4 5

SRN0J-7-GP

SRN0J-7-GP

R2

R2

R2

R2

R1

R1

R1

R1

R1

R1

R1

R1

R1

R1

S D

R343

R343

R342

R342

OUT

OUT

3

84.00143.B1K

84.00143.B1K

OUT

OUT

3

84.00143.B1K

84.00143.B1K

OUT

OUT

3

84.00143.B1K

84.00143.B1K

OUT

OUT

3

84.00143.B1K

84.00143.B1K

OUT

OUT

3

84.00143.B1K

84.00143.B1K

2N7002-11-GP

2N7002-11-GP

UMA

UMA

1 2

0R2J-2-GP

0R2J-2-GP

UMA

UMA

1 2

0R2J-2-GP

0R2J-2-GP

SB

-1M

R524

R524

FRONT_PWRLED#_R

1 2

68R2-GP

68R2-GP
R523

R523

STDBY_LED#_R

1 2

100R2J-2-GP

100R2J-2-GP

R295

R295

BLT_LED#_1_R

1 2

390R2J-1-GP

390R2J-1-GP

-1M

R527

R527

CHARGE_LED#_R

1 2

100R2J-2-GP

100R2J-2-GP
R526

R526

DC_BATFULL#_R

1 2

68R2-GP

68R2-GP

-1M

R294

R294

1 2

75R2J-1-GP

75R2J-1-GP

WLAN_LED#_R

3D3V_S0

45

678

EC69

EC69

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SB

LED-GY-14-GP

LED-GY-14-GP

LED2

LED2

LED6

LED6

LED-B-27-U-GP

LED-B-27-U-GP

12

SB

LED4

LED4

LED-GY-14-GP

LED-GY-14-GP

LED1 LED-Y-29-GP

LED1 LED-Y-29-GP

12

83.00190.S70

83.00190.S70

123

RN46

RN46
SRN2K2J-2-GP

SRN2K2J-2-GP

NV_EDID_CLK

NV_EDID_DAT

12

12

EC70

EC70

DY

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

LCD CONN & LED

LCD CONN & LED

LCD CONN & LED

Columbia/Tangiz

Columbia/Tangiz

Columbia/Tangiz

14 45Monday, January 14, 2008

14 45Monday, January 14, 2008

14 45Monday, January 14, 2008

3D3V_S0

3D3V_S5

13

24

5V_S0

3D3V_S5

24

13

3D3V_S0

-1

-1

-1

of

of

of

Q29

Q29

GND

GND

2

R2

R589

R589

FRONT_PWRLED#_Q33

IN

IN

1

STDBY_LED#_Q33

GND

GND

IN

IN

GND

GND

IN

IN

GND

GND

IN

IN

GND

GND

IN

IN

R2

CHDTC143ZUPT-GP

CHDTC143ZUPT-GP

Q30

Q30

2

R2

R2

1

CHDTC143ZUPT-GP

CHDTC143ZUPT-GP

Q14

Q14

2

R2

R2

1

CHDTC143ZUPT-GP

CHDTC143ZUPT-GP

Q13

Q13

2

1

CHDTC143ZUPT-GP

CHDTC143ZUPT-GP

Q28

Q28

2

1

CHDTC143ZUPT-GP

CHDTC143ZUPT-GP

Q32

Q32

G

C359

C359

3D3V_S0

6

DY

DY

IN

5

GND

4

FRONT_PWRLED32

SB

STDBY_LED32

BT_LED32

CHARGE_LED32

DC_BATFULL32

-1

1 2

33R2J-2-GP

33R2J-2-GP

UMA

UMA

UMA

UMA

UMA

UMA

UMA

UMA

8
7
6

8
7
6

8
7
6

8
7
6

GMCH_TXBOUT1- 7

GMCH_TXBOUT1+ 7

GMCH_TXBOUT0- 7

GMCH_TXBOUT0+ 7

GMCH_TXBCLK- 7
GMCH_TXBCLK+ 7

GMCH_TXBOUT2- 7

GMCH_TXBOUT2+ 7

GMCH_TXACLK- 7

GMCH_TXACLK+ 7

GMCH_TXAOUT2- 7

GMCH_TXAOUT2+ 7

GMCH_TXAOUT1- 7

GMCH_TXAOUT1+ 7

GMCH_TXAOUT0- 7

GMCH_TXAOUT0+ 7

WLAN_LED#29

WLAN_TEST_LED32

CLK_DDC_EDID7
NV_EDID_CLK28

DAT_DDC_EDID7

NV_EDID_DAT28