Acer Exten 4620, Exten 4220 Schematics
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Date: 2009.12.19 05:15:24
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Project code: 91.4H001.001
Biwa Block Diagram
Mobile CPU
4 4
DDR2
533/667 MHz
533/667 MHz
3 3
Line In
30
Mic In
30
INT.MIC
30
2 2
1 1
INT.SPKR
30
Line Out
(No-SPDIF)
CLK GEN.
ICS 9LPR502
(RTM875T-605)
DDR2
RJ11
24
3
533/667MHz
12,13
533/667MHz
12,13
Codec
ALC268
29
OP AMP
APA2031
G1412
30
30
MODEM
MDC Card
22
400M Byte/s
AZALIA
HDD
Merom 479
2G/2.33G
2.0G : B0, QLYV
2.2G : B0, QLFS
HOST BUS
Crestline
AGTL+ CPU I/F
DDR Memory I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
71.CREST.M02, B0, QN12
X4 DMI
ICH8M
6 PCIe ports
PCI/PCI BRIDGE
ACPI 1.1
3 SATA
1 PATA 66/100
10 USB 2.0/1.1 ports
ETHERNET (10/100/1000MbE)
High Definition Audio
LPC I/F
Serial Peripheral I/F
Matrix Storage Technology(DO)
Active Managemnet Technology(DO)
71.0ICH8.A0U, B1, QN23
SATA
PATA
21
CDROM
USB
22
4 PORT
MINI USB
Blue-tooth
21
4, 5
800MHz@1.05V
6,7,8,9,10,11
C-Link0
16,17,18,19
CCD
14
22
Finger
PT
G792
PCI BUS
PCIex1
C Link1
LPC BUS
22
20
SVIDEO/COMP
LVDS
RGB CRT
TI 7412
CardBus
1394
CardReader
LAN
Giga LAN
BCM5787MKMLG
Mini Card
Kedron
Super I/O
Winbond
PC87381
33
FIR
32
-2-0226
25,26
23
a/b/g/n
28
Winbond
WPC8763L
Touch
Pad
PCB P/N : 55.4H001.XXX
REVISION : 06237-2(GCE, Hannstar)
PCB STACKUP
TOP
VCC
CRT
15
14
15
TVOUT
14" WXGA
LCD
PCMCIA I/F
PWR SW
TPS2211
27
1394
CONN
26
TXFM RJ45
24
New card
KBC
32 32
SPI I/F
31
INT.
KB
S
S
GND
BOTTOM
PCMCIA
SLOT
Support
TypeII
27
MS/MS Pro/xD/
MMC/SD/SDIO
6 in 1
24
PWR SW
28 28
P2231NFC
BIOS
W25X80-VSSI-G
33
27
LPC
DEBUG
CONN.
55.4H001.S03G
55.4H001.S03G
55.4H001.S03G
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
33
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
INPUTS
DCBATOUT
5V_AUX_S5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Biwa
Biwa
Biwa
CPU DC/DC
MAX8770
OUTPUTS
VCC_CORE_S0
0~1.3V
47A
SYSTEM DC/DC
ISL6236
INPUTS
DCBATOUT
OUTPUTS
5V_S5(5A)
3D3V_S5(5A)
5V_AUX_S5
SYSTEM DC/DC
MAX8717
INPUTS OUTPUTS
DCBATOUT
G971
1D8V_S3
APL5913
1D8V_S3 1D25V_S0
G2997F6U
1D8V_S3
G909
MAXIM CHARGER
DCBATOUT
1D05V_S0(13A)
1D8V_S3(10A)
1D5V_S0
(4A)
(1.5A)
DDR_VREF_S0
(1.2A)
DDR_VREF_S3
3D3V_AUX_S5
(100mA)
ISL6255
OUTPUTSINPUTS
CHG_PWR
19V 4.0A
UP+5V
5V 100mA
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142Thursday, March 01, 2007
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ICH8M Functional Strap Definitions
Signal
HDA_SDOUT
HDA_SYNC
4 4
GNT2#
GPIO20
GNT1#/
GPIO51
GNT3#
GNT0#/
SPI_CS1#
INTVRMEN
3 3
LAN100_SLP
SATALED#
SPKR
TP3
GPIO33/
HDA_DOCK
_EN#
Usage/When Sampled
XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK
PCIE config1 bit0,
Rising Edge of PWROK.
PCIE config2 bit0,
Rising Edge of PWROK.
Reserved
ESI Strap (Server Only)
Rising Edge of PWROK
Top-Block
Swap Override.
Rising Edge of PWROK.
Boot BIOS Destination
Selection.
Rising Edge of PWROK.
Integrated VccSus1_05,
VccSus1_5 and VccCL1_5
VRM Enable/Disable.
Always sampled.
Integrated VccLAN1_05
and VccCL1_05 VRM
Enable/Disable.
Always sampled.
PCI Express Lane
Reversal. Rising Edge
of PWROK.
No Reboot.
Rising Edge of PWROK.
XOR Chain Entrance.
Rising Edge of PWROK.
Flash Descriptor
Security Override Strap
Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3
pulled low.When TP3 not pulled low at rising edge
of PWROK,sets bit1 of RPC.PC(Config Registers:
offset 224h)
This signal has a weak internal pull-down.
Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal has a weak internal pull-up.
Sets bit2 of RPC.PC2(Config Registers:Offset 0224h)
This signal should not be pulled high.
ESI compatible mode is for server platforms only.
This signal should not be pulled low for desttop
and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit
(Config Registers:Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Enables integrated VccSus1_05, VccSus1_5 and
VccCL1_5 VRM's when sampled high
Enables integrated VccLAN1_05 and VccCL1_05 VRM's
when sampled high
Signal has weak internal pull-up. Sets bit 27
of MPC.LR(Device 28:Function 0:Offset D8)
If sampled high, the system is strapped to the
"No Reboot" mode(ICH8 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.
This signal should not be pull low unless using
XOR Chain testing.
This signal has a weak internal pull-up.
Sampled low:the Flash Descriptor Security will be
overridden. If high,the security measures will be
in effect.This should only be used in manufacturing
environments.
ICH8-M EDS 21762 2.0V1
Comment
page 16
2 2
ICH8M IDE Integrated Series
Termination Resistors
DIOR#,DIOW#,DD[15:0],
DREQ,
DDACK#, IORDY,
DCS3#,
IDEIRQ
DA[2:0],
PCI Routing
DCS1#,
page 17
INT REQ
AD22TI7412
G:CARDBUS
B:1394
F:Flash Media
G:SD Host
0 0
1 1
PCIE Routing
LANE1
LANE2
LANE3 NewCard WLAN
LAN BCM5787M
MiniCard WLAN
approximately 33 ohm
GNTIDSEL
USB Table
USB
Pair
Device
USB1
0
USB2
1
USB3
2
USB4
3
4
MINIC1
BT
5
CCD
6
Finger
7
8
NEW
9
NC
ICH8M Integrated Pull-up
and Pull-down Resistors
SIGNAL Resistor Type/Value
HDA_BIT_CLK
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GNT[3:0]
GPIO[20]
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#
SPI_CS1#
SPI_CLK
SPI_MOSI
SPI_MISO
TACH_[3:0]
SPKR
TP[3]
USB[9:0][P,N]
CL_RST#
ICH8-M EDS 21762 2.0V1
PULL-DOWN 20K
NONE
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K (?)
PULL-UP 20K
PULL-UP 10K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K (?)
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 15K
PULL-UP 13K
History
2007/02/16
1.Page 33: Add SIO 87381 for FIR Issue.
2.Page 31, change KBC from 8768L to 8763L.
3.Page 33, del U33(LPC golden Finger).
4.Page 24/32, change ERC1/ERC2 due to 77.61021.02L is Obsoleted Part !
5.Page 37, del TC22/TC19.
6.Page 38, del TC1/TC4.
===========================================================
2007/02/09
1.Page 14:Modify "Q14" "BTBTN1" "WLBTN1" symbol.
2.Page 36, 37, 38: Replace 0ohm with 0ohm pad.
===========================================================
2007/02/08a
1.Page 14:Modify R428 to“FRONT_PWRLED#_1”and RN58 pin7 to“STBY_LED#_2”due to LED brightness issue.
2.Page 38:Replace "TC26" with "77.C1561.01L".
===========================================================
2007/02/08
1.Page 10:Replace "R244" with "0603-PAD".
2.Page 36:Replace open power gap with close power gap.
3.Page 38:Add capacitor "TC26" for acoustic noise
===========================================================
Crestline Strapping Signals and
Configuration
Pin Name
CFG[2:0]
CFG[4:3]
CFG5
CFG9
CFG[11:10] Reserved
CFG[13:12]
CFG[15:14]
CFG16
CFG[18:17]
CFG19
CFG20
SDVOCRTL
_DATA
All strap signals are sampled with respect to the leading
NOTE:
Strap Description
FSB Frequency Select
Reserved
DMI x2 Select
ReservedCFG[8:6]
Low Power PCI Express
PCI Express Graphics
Lane Reversal
XOR/ALL Z test
straps
Reserved
FSB Dynamic ODT
Reserved
DMI Lane Reversal
SDVO/PCIE
Concurrent
SDVO Present
edge of the Crestline GMCH PWORK in signal.
55.4H001.S03G
55.4H001.S03G
55.4H001.S03G
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
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A3
A3
Date: Sheet
Date: Sheet of
Date: Sheet of
001 = FSB533
011 = FSB667
010 = FSB800
others = Reserved
0 = DMI x2
1 = DMI x4
0 = Normal mode
1 = Low Power mode
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane
Numbered in order
00 = Reserved
01 = XOR mode enabled
10 = All Z mode enabled
11 = Normal Operation
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled
0 = Normal operation (Default):lane
Numbered in order
1 =Reverse Lane,4->0,3->1 ect...
0 = Only SDVO or PCIE x1 is
operational (Default)
1 =SDVO and PCIE x1 are operating
simultaneously via the PEG port
0 = No SDVO Card present
1= SDVO Card present
Reference
Reference
Reference
Crestline EDS 20954 1.0
Configuration
(Default)
(Default)
Reserved
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Biwa
Biwa
Biwa
page 7
(Default)
(Default)
(Default)
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242Thursday, March 01, 2007
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3D3V_S0
3D3V_48MPWR_S0
12
R327 Do Not StuffR327 Do Not Stuff
4 4
PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5
3 3
CL=20pF±0.2pF
C237
C237
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
C236
C236
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
1 2
2 2
12
C492
C492
DY
DY
Do Not Stuff
Do Not Stuff
3D3V_S0
DY
DY
R180
R174
R174
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
R162
R162
Do Not Stuff
Do Not Stuff
1 2
R180
Do Not Stuff
Do Not Stuff
1 2
RTM
RTM
R163
R163
10KR2J-3-GP
10KR2J-3-GP
1 2
SA SIV Bug
GEN_XTAL_IN
12
X2
X2
X-14D31818M-44GP
X-14D31818M-44GP
82.30005.951
82.30005.951
GEN_XTAL_OUT_R
-1 2/16 modify
12
C261
C261
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
DY
DY
R179
R179
Do Not Stuff
Do Not Stuff
1 2
R164
R164
10KR2J-3-GP
10KR2J-3-GP
1 2
R154 Do Not Stuff
R154 Do Not Stuff
R153 0R2J-2-GPR153 0R2J-2-GP
CLK48_ICH17
CPU_SEL04,7
CPU_SEL14,7
CPU_SEL24,7
<--
CLK48_CARDBUS26
12
C264
C264
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
R173
R173
Do Not Stuff
Do Not Stuff
1 2
R165
R165
10KR2J-3-GP
10KR2J-3-GP
1 2
PCLK_KBC31
PCLK_SIO33
PCLK_PCM26
PCLK_ICH17
12
DY
DY
12
CLK_ICH1417
CLK14_SIO33
12
C487
C487
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
-1 2/16 modify
<--
R171 22R2J-2-GPR171 22R2J-2-GP
R178 22R2J-2-GPR178 22R2J-2-GP
R177
R177
1 2
33R2J-2-GP
33R2J-2-GP
R170 22R2J-2-GPR170 22R2J-2-GP
GEN_XTAL_OUT
R172 22R2J-2-GPR172 22R2J-2-GP
R169 2K2R2J-2-GPR169 2K2R2J-2-GP
R144 2K2R2J-2-GPR144 2K2R2J-2-GP
R145 22R2J-2-GPR145 22R2J-2-GP
R605 22R2J-2-GPR605 22R2J-2-GP
R176
R176
22R2J-2-GP
22R2J-2-GP
B
3D3V_CLKGEN_S0
3D3V_48MPWR_S0
3D3V_CLKPLL_S0
TP55Do Not StuffTP55Do Not Stuff
TP99Do Not StuffTP99Do Not Stuff
12
12
12
12
12
12
12
12
CLK48
12
3D3V_CLKPLL_S0
12
C235
C235
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PCLKCLK0
PCLKCLK1
PCLKCLK2
PCLKCLK3
PCLKCLK4
PCLKCLK5
CLK48
CPU_SEL2_R
CPU_SEL2_R
12
C239
C239
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U26
U26
2
VDDPCI
9
VDD48
16
VDD
53
VDDREF
31
VDDSRC
47
VDDCPU
12
VDDI/O96MHZ
20
VDDPLL3I/O
26
VDDSRCI/O
37
VDDSRCI/O
41
VDDI/OCPU
1
PCI0/CR#_A
3
PCI1/CR#_B
4
PCI2/TME
5
PCI3
6
PCI4/SRC5_EN
7
PCI_F5/ITP_EN
51
X2
52
X1
10
USB_48MHZ/FSLA
49
FSLB/TEST_MODE
54
REF0/FSLC/TEST_SEL
8
GNDPCI
11
GND48
15
GND
19
GND
23
GNDSRC
34
GNDSRC
44
GNDCPU
50
GNDREF
RTM875T-605-GP
RTM875T-605-GP
71.00875.A0W
71.00875.A0W
12
C265
C265
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CKS
CKS
C
R318 Do Not StuffR318 Do Not Stuff
12
C262
C262
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SDATA
SCLK
DOTT_96/SRCT0
DOTC_96/SRCC0
SRCT1/SE1
SRCC1/SE2
SRCT2/SATAT
SRCC2/SATAC
SRCT3/CR#_C
SRCC3/CR#_D
SRCT4
SRCC4
PCI_STOP#/SRCT5
CPU_STOP#/SRCC5
SRCT6
SRCC6
SRCT7/CR#_F
SRCC7/CR#_E
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
CPUT1
CPUC1
CPUT0
CPUC0
CK_PWRGD/PD#
NC#40
12
3D3V_S0
55
56
13
14
17
18
21
22
24
25
27
28
30
29
33
32
36
35
39
38
43
42
46
45
48
40
SMBD_ICH 12,19
SMBC_ICH 12,19
DREFCLK_1
DREFCLK#_1
DREFSSCLK_1
DREFSSCLK#_1
CLK_PCIE_SATA_1
CLK_PCIE_SATA_1#
CLK_MCH_3GPLL_1
CLK_MCH_3GPLL_1#
CLK_PCIE_MINI_12
CLK_PCIE_MINI_12#
PM_STPPCI# 17
CLK_PCIE_ICH_1
CLK_PCIE_ICH_1#
CLK_PCIE_NEW_1
CLK_PCIE_NEW_1#
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
CLK_MCH_BCLK_1
CLK_MCH_BCLK_1#
CLK_CPU_BCLK_1
CLK_CPU_BCLK_1#
PM_STPCPU# 17
Do Not Stuff
Do Not Stuff
2 3
1
CKS
CKS
2 3
1
CKS
CKS
2 3
1
CKS
CKS
2 3
1
CKS
CKS
2 3
1
CKS
CKS
1
2 3
CKS
CKS
1
2 3
NEW
NEW
1
2 3
CKS
CKS
1
2 3
CKS
CKS
1
2 3
CKS
CKS
CLK_PWRGD 17
1 2
DY
DY
R142
R142
RN21
RN21
SRN0J-6-GP
SRN0J-6-GP
4
RN22
RN22
SRN0J-6-GP
SRN0J-6-GP
4
RN23
RN23
SRN0J-6-GP
SRN0J-6-GP
4
RN24
RN24
SRN0J-6-GP
SRN0J-6-GP
4
RN25
RN25
SRN0J-6-GP
SRN0J-6-GP
4
RN19
RN19
4
SRN0J-6-GP
SRN0J-6-GP
RN18
RN18
4
Do Not Stuff
Do Not Stuff
RN17
RN17
4
SRN0J-6-GP
SRN0J-6-GP
RN16
RN16
4
SRN0J-6-GP
SRN0J-6-GP
RN15
RN15
4
SRN0J-6-GP
SRN0J-6-GP
D
12
C240
C240
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DREFCLK 7
DREFCLK# 7
DREFSSCLK 7
DREFSSCLK# 7
CLK_PCIE_SATA 16
CLK_PCIE_SATA# 16
CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7
CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28
CLK_PCIE_ICH 17
CLK_PCIE_ICH# 17
CLK_PCIE_NEW 28
CLK_PCIE_NEW# 28
CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
3D3V_S0
12
C234
C234
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_CLKGEN_S0
12
C260
C260
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
E
R325 Do Not StuffR325 Do Not Stuff
12
C263
C263
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
3D3V_S0
12
RTM875T-605 setting tableICS9LPR502HGLFT-GP setting table
PIN NAME DESCRIPTION
Byte 5, bit 7
0 = PCI0 enabled (default)
PCI0/CR#_A
PCI1/CR#_B
1 1
PCI2/TME
PCI4/SRC5_EN
PCI_F5/ITP_EN
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.
1 = Pins29,30 as SRC-5 differential pair.
0 =SRC8/SRC8#
1 = ITP/ITP#
A
B
PIN NAME DESCRIPTION
Byte 5, bit 7
0 = PCI0 enabled (default)
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3/SRC-5_EN
PCI4/27M_SEL
PCI_F5/ITP_EN
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair
Byte 5, bit 6
0 = CR#_A controls SRC0 pair (default),
1= CR#_A controls SRC2 pair
Byte 5, bit 5
0 = PCI1 enabled (default)
1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair
Byte 5, bit 4
0 = CR#_B controls SRC1 pair (default)
1= CR#_B controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed
1 = Overclocking of CPU and SRC NOT allowed
0 = Pin29 as CPU_STOP# , pin 30 as PCI_STOP#.
1 = Pins29,30 as SRC-5 differential pair.
0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96#
1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#
0 =SRC8/SRC8#
1 = ITP/ITP#
C
SEL2
FSC
SEL1
FSB
1
0
0101
55.4H001.S03G
55.4H001.S03G
55.4H001.S03G
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
D
Date: Sheet of
Clock Generator
Clock Generator
Clock Generator
SEL0
FSA
01
01
01
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Biwa
Biwa
Biwa
E
CPU
100M
133M
166M
200M
342Thursday, March 01, 2007
342Thursday, March 01, 2007
342Thursday, March 01, 2007
FSB
X
X
667M
800M
-2
-2
-2
of
of
A
www.kythuatvitinh.com
B
C
D
E
H_A#[35..3]6
4 4
H_ADSTB#06
H_REQ#[4..0]6
3 3
H_ADSTB#16
H_A20M#16
H_FERR#16
H_IGNNE#16
H_STPCLK#16
H_INTR16
H_NMI16
H_SMI#16
TP25Do Not StuffTP25Do Not Stuff
TP30Do Not StuffTP30Do Not Stuff
TP14Do Not StuffTP14Do Not Stuff
TP19Do Not StuffTP19Do Not Stuff
TP15Do Not StuffTP15Do Not Stuff
TP20Do Not StuffTP20Do Not Stuff
TP17Do Not StuffTP17Do Not Stuff
2 2
TP41Do Not StuffTP41Do Not Stuff
TP32Do Not StuffTP32Do Not Stuff
TP10Do Not StuffTP10Do Not Stuff
H_A#[35..3]
H_DINV#[3..0]
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
SLP#
PSI#
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]
H_D#32
Y22
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
V23
H_D#37
T22
H_D#38
U25
H_D#39
U23
H_D#40
Y25
H_D#41
W22
H_D#42
Y23
H_D#43
W24
H_D#44
W25
H_D#45
AA23
H_D#46
AA24
H_D#47
AB25
Y26
AA26
U22
H_D#48
AE24
H_D#49
AD24
H_D#50
AA21
H_D#51
AB22
H_D#52
AB21
H_D#53
AC26
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AC25
H_D#58
AE21
H_D#59
AD21
H_D#60
AC22
H_D#61
AD23
H_D#62
AF22
H_D#63
AC23
AE25
AF24
AC20
COMP0
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
R322 27D4R2F-L1-GPR322 27D4R2F-L1-GP
COMP1
COMP2
R75 27D4R2F-L1-GPR75 27D4R2F-L1-GP
COMP3
Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5" .
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5" .
1 OF 4
1 OF 4
U41A
U41A
H_A#3
J4
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35 CPU_PROCHOT#_R
RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
TP21Do Not StuffTP21Do Not Stuff
RSVD_CPU_10
RSVD_CPU_11
A3#
L5
A4#
L4
A5#
K5
A6#
M3
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L2
A13#
P4
A14#
P1
A15#
R1
A16#
M1
ADSTB0#
K3
REQ0#
H2
REQ1#
K2
REQ2#
J3
REQ3#
L1
REQ4#
Y2
A17#
U5
A18#
R3
A19#
W6
A20#
U4
A21#
Y5
A22#
U1
A23#
R4
A24#
T5
A25#
T3
A26#
W2
A27#
W5
A28#
Y4
A29#
U2
A30#
V4
A31#
W3
A32#
AA4
A33#
AB2
A34#
AA3
A35#
V1
ADSTB1#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD#M4
N5
RSVD#N5
T2
RSVD#T2
V3
RSVD#V3
B2
RSVD#B2
C3
RSVD#C3
D2
RSVD#D2
D22
RSVD#D22
D3
RSVD#D3
F6
RSVD#F6
B1
KEY_NC
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
ICH
ICH
RESERVED
RESERVED
62.10079.001
62.10079.001
XDP/ITP SIGNALS CONTROL
XDP/ITP SIGNALS CONTROL
THERMAL
THERMAL
PROCHOT#
THERMTRIP#
HCLK
HCLK
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
THRMDA
THRMDC
BCLK0
BCLK1
TDI
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
XDP_BPM#0
AD4
XDP_BPM#1
AD3
XDP_BPM#2
AD1
XDP_BPM#3
AC4
XDP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
D21
A24
B25
C7
A22
A21
2nd source: 62.10053.401
XDP_TMS
XDP_TDI
XDP_TCK
XDP_TRST#
R90 39R2F-GPR90 39R2F-GP
R98 150R2F-1-GPR98 150R2F-1-GP
R91 27D4R2F-L1-GPR91 27D4R2F-L1-GP
R103 649R2F-GPR103 649R2F-GP
H_RS#0
H_RS#1
H_RS#2
1 2
1 2
1 2
1 2
TP13 Do Not StuffTP13 Do Not Stuff
H_IERR#
56R2J-4-GP
56R2J-4-GP
1D05V_S0
1D05V_S0
12
R117
R117
56R2J-4-GP
56R2J-4-GP
H_RS#[2..0] 6
1D05V_S0
R118
R118
1 2
H_ADS# 6
H_BNR# 6
H_BPRI# 6
H_DEFER# 6
H_DRDY# 6
H_DBSY# 6
H_BREQ#0 6
H_INIT# 16
H_LOCK# 6
H_CPURST# 6,42
H_TRDY# 6
H_HIT# 6
H_HITM# 6
TP27 Do Not StuffTP27 Do Not Stuff
TP23 Do Not StuffTP23 Do Not Stuff
TP11 Do Not StuffTP11 Do Not Stuff
TP22 Do Not StuffTP22 Do Not Stuff
TP16 Do Not StuffTP16 Do Not Stuff
TP8 Do Not StuffTP8 Do Not Stuff
TP26 Do Not StuffTP26 Do Not Stuff
TP33 Do Not StuffTP33 Do Not Stuff
TP18 Do Not StuffTP18 Do Not Stuff
TP28 Do Not StuffTP28 Do Not Stuff
TP35 Do Not StuffTP35 Do Not Stuff
TP40 Do Not StuffTP40 Do Not Stuff
H_THERMDA 20
H_THERMDC 20
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
20060925 original 27R2F
Place testpoint on
H_IERR# with a GND
0.1" away
H_THERMDA
H_THERMDC
DY
DY
R119
R119
12
Do Not Stuff
Do Not Stuff
PM_THRMTRIP# 7,16,34
PM_THRMTRIP#
should connect to
ICH8 and MCH
without T-ing
( No stub)
12
CPU_PROCHOT# 36
1KR2F-3-GP
1KR2F-3-GP
2KR2F-3-GP
2KR2F-3-GP
C486
C486
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
Layout Note:
1D05V_S0
R320
R320
R319
R319
"CPU_GTLREF0"
0.5" max length.
1 2
12
1 2
DY
DY
R324 Do Not Stuff
R324 Do Not Stuff
1 2
DY
DY
R323 Do Not Stuff
R323 Do Not Stuff
H_DSTBN#06
H_DSTBP#06
H_DINV#06
H_DSTBN#16
H_DSTBP#16
H_DINV#16
CPU_GTLREF0
TP42Do Not StuffTP42Do Not Stuff
TP43Do Not StuffTP43Do Not Stuff
TP12Do Not StuffTP12Do Not Stuff
TP44Do Not StuffTP44Do Not Stuff
CPU_SEL03,7
CPU_SEL13,7
CPU_SEL23,7
TEST1
TEST2
2 OF 4
2 OF 4
U41B
U41B
H_D#0
E22
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
TEST1
TEST2
RSVD_CPU_12
TEST4
RSVD_CPU_13
RSVD_CPU_14
Net "TEST4" as short as possible,
make sure "TEST4" routing is
reference to GND and away other
noisy signals
D0#
F24
D1#
E26
D2#
G22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H22
D12#
F26
D13#
K22
D14#
H23
D15#
J26
DSTBN0#
H26
DSTBP0#
H25
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L23
D20#
M24
D21#
L22
D22#
M23
D23#
P25
D24#
P23
D25#
P22
D26#
T24
D27#
R24
D28#
L25
D29#
T25
D30#
N25
D31#
L26
DSTBN1#
M26
DSTBP1#
N24
DINV1#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
B22
BSEL0
B23
BSEL1
C21
BSEL2
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
DATA GRP0 DATA GRP1
DATA GRP0 DATA GRP1
DATA GRP2DATA GRP3
DATA GRP2DATA GRP3
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
MISC
MISC
DPRSTP#
PWRGOOD
DINV2#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPSLP#
DPWR#
H_DINV#[3..0] 6
H_DSTBN#[3..0] 6
H_DSTBP#[3..0] 6
H_D#[63..0] 6
H_DSTBN#2 6
H_DSTBP#2 6
H_DINV#2 6
H_DSTBN#3 6
H_DSTBP#3 6
H_DINV#3 6
1 2
R321 54D9R2F-L1-GPR321 54D9R2F-L1-GP
1 2
1 2
R74 54D9R2F-L1-GPR74 54D9R2F-L1-GP
1 2
H_DPRSTP# 7,16,36
H_DPSLP# 16
H_DPWR# 6
H_PWRGD 16,34,42
H_CPUSLP# 6
PSI# 36
All place within 2" to CPU
1 1
55.4H001.S03G
55.4H001.S03G
55.4H001.S03G
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
B
C
D
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (1 of 2)
CPU (1 of 2)
CPU (1 of 2)
Biwa
Biwa
Biwa
SA
SA
442Thursday, March 01, 2007
442Thursday, March 01, 2007
442Thursday, March 01, 2007
E
SA
A
www.kythuatvitinh.com
VCC_CORE_S0
4 4
3 3
AA10
AA12
2 2
1 1
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
3 OF 4
3 OF 4
U41C
U41C
A7
VCC
A9
VCC
A10
VCC
A12
VCC
A13
VCC
A15
VCC
A17
VCC
A18
VCC
A20
VCC
B7
VCC
B9
VCC
B10
VCC
B12
VCC
B14
VCC
B15
VCC
B17
VCC
B18
VCC
B20
VCC
C9
VCC
C10
VCC
C12
VCC
C13
VCC
C15
VCC
C17
VCC
C18
VCC
D9
VCC
D10
VCC
D12
VCC
D14
VCC
D15
VCC
D17
VCC
D18
VCC
E7
VCC
E9
VCC
E10
VCC
E12
VCC
E13
VCC
E15
VCC
E17
VCC
E18
VCC
E20
VCC
F7
VCC
F9
VCC
F10
VCC
F12
VCC
F14
VCC
F15
VCC
F17
VCC
F18
VCC
F20
VCC
AA7
VCC
AA9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AB9
VCC
VCC
VCC
VCC
VCC
VCCSENSE
VCC
VCC
VCC
VSSSENSE
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
62.10079.001
62.10079.001
2nd source: 62.10053.401
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCA
VCCA
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
VCC_CORE_S0
CPU_G21
CPU_V6
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
1 2
R116 Do Not StuffR116 Do Not Stuff
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C220
C220
H_VID[0..6]
VCC_CORE_S0
1D05V_S0
1 2
R102 Do Not StuffR102 Do Not Stuff
12
C131
C131
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
layout note: "1D5V_VCCA_S0"
as short as possible
H_VID[0..6] 36
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
R97
R97
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R89
R89
100R2F-L1-GP-U
100R2F-L1-GP-U
B
VCC_CORE_S0
VCC_CORE_S0
12
C151
C151
DY
DY
1D5V_VCCA_S0
C488
C488
12
C115
C115
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C434
C434
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
12
Layout Note:
VCCSENSE and VSSSENSE lines
should be of equal length.
Layout Note:
Provide a test point (with
no stub) to connect a
differential probe
between VCCSENSE and
VSSSENSE at the location
where the two 54.9ohm
resistors terminate the
55 ohm transmission line.
C214
C214
Do Not Stuff
Do Not Stuff
12
12
C463
C463
Do Not Stuff
Do Not Stuff
DY
DY
L15
L15
1 2
HCB1608KF121T30-GP
HCB1608KF121T30-GP
12
68.00230.041
68.00230.041
C489
C489
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
VCC_SENSE 36
VSS_SENSE 36
C126
C126
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C207
C207
12
12
C
12
C210
C210
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
12
12
C447
C447
Do Not Stuff
Do Not Stuff
DY
DY
1D5V_S0
12
C456
C152
C152
C456
Do Not Stuff
Do Not Stuff
1D05V_S0
C433
C433
Do Not Stuff
Do Not Stuff
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
DY
DY
12
C170
C170
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
12
C217
C217
12
C187
C187
C199
DY
DY
C199
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
12
12
C219
C219
C137
C137
Do Not Stuff
Do Not Stuff
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C462
C462
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
DY
DY
12
C125
C125
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C458
C458
C208
C208
SC10U6D3V6KX-4GP
SC10U6D3V6KX-4GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
Do Not Stuff
DY
DY
12
C133
C133
Do Not Stuff
Do Not Stuff
12
12
C130
C130
C216
C216
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
4 OF 4
4 OF 4
U41D
U41D
A4
VSS
A8
VSS
A11
VSS
A14
VSS
A16
VSS
A19
VSS
A23
VSS
AF2
VSS
B6
VSS
B8
VSS
B11
VSS
B13
VSS
B16
VSS
B19
VSS
B21
VSS
B24
VSS
C5
VSS
C8
VSS
C11
VSS
C14
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C25
VSS
D1
VSS
D4
VSS
D8
VSS
D11
VSS
D13
VSS
D16
VSS
D19
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E11
VSS
E14
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
F5
VSS
F8
VSS
F11
VSS
F13
VSS
F16
VSS
F19
VSS
F2
VSS
F22
VSS
12
C218
C218
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
F25
VSS
G4
VSS
G1
VSS
G23
VSS
G26
VSS
H3
VSS
H6
VSS
H21
VSS
H24
VSS
J2
VSS
J5
VSS
J22
VSS
J25
VSS
K1
VSS
K4
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L21
VSS
L24
VSS
M2
VSS
M5
VSS
M22
VSS
M25
VSS
N1
VSS
N4
VSS
N23
VSS
N26
VSS
P3
VSS
BGA479-SKT6-GPU3
BGA479-SKT6-GPU3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
B
C
D
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (2 of 2)
CPU (2 of 2)
CPU (2 of 2)
Biwa
Biwa
Biwa
SA
SA
542Thursday, March 01, 2007
542Thursday, March 01, 2007
542Thursday, March 01, 2007
E
SA
A
www.kythuatvitinh.com
4 4
H_SWING
C479
C479
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
H_RCOMP
1D05V_S0
12
R315
R315
221R2F-2-GP
221R2F-2-GP
12
R316
R316
100R2F-L1-GP-U
100R2F-L1-GP-U
H_SWING routing Trace width and
Spacing use 10 / 20 mil
H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )
12
H_SCOMP and H_SCOMP# Resistors and
Capacitors close MCH 500 mil ( MAX )
3 3
1D05V_S0
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
1 2
H_SCOMP
H_SCOMP#
24D9R2F-L-GP
24D9R2F-L-GP
1 2
R314
R314
1D05V_S0
1 2
R313
R313
H_RCOMP routing Trace width and
Spacing use 10 / 20 mil
R312
R312
Place them near to the chip ( < 0.5")
2 2
H_REF Decoupling Crestline
close Crestline 100 mil
1D05V_S0
R311
R311
1KR2F-3-GP
1KR2F-3-GP
1 2
R309
R309
Do Not Stuff
Do Not Stuff
12
12
R310
R310
2KR2F-3-GP
2KR2F-3-GP
H_D#[63..0]4
B
H_D#[63..0]
H_AVREF
C471
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C471
C
1 OF 10
1 OF 10
U40A
U40A
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#4,42
H_CPUSLP#4
1 2
M10
N12
W10
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
AC6
AE2
AC5
AG3
AH8
AJ14
AE9
AE11
AH12
AH5
AE7
AE5
AH2
AH13
P13
AJ9
AJ5
AJ6
AJ7
AJ2
AJ3
E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
N9
H5
K9
M2
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
Y3
B3
C2
W1
W2
B6
E5
B9
A9
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_CPURST#
H_CPUSLP#
H_AVREF
H_DVREF
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
HOST
HOST
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HITM#
H_LOCK#
H_TRDY#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_HIT#
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_RS#0
H_RS#1
H_RS#2
H_A#[35..3]
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 4
H_DRDY# 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
D
H_A#[35..3] 4
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
E
1 1
A
CRB v0.9 REQUEST
H_DVREF
B
55.4H001.S03G
55.4H001.S03G
55.4H001.S03G
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GMCH (1 of 6)
GMCH (1 of 6)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
GMCH (1 of 6)
Biwa
Biwa
Biwa
E
SA
SA
642Thursday, March 01, 2007
642Thursday, March 01, 2007
642Thursday, March 01, 2007
SA
A
www.kythuatvitinh.com
1D8V_S3
R299 20R2F-GPR299 20R2F-GP
1 2
R301 20R2F-GPR301 20R2F-GP
1 2
4 4
3D3V_S0
R94 Do Not StuffR94 Do Not Stuff
1 2
R81 Do Not StuffR81 Do Not Stuff
1 2
R79 Do Not StuffR79 Do Not Stuff
1 2
R307 Do Not StuffR307 Do Not Stuff
1 2
R304 Do Not StuffR304 Do Not Stuff
1 2
R300 Do Not StuffR300 Do Not Stuff
1 2
R111 Do Not StuffR111 Do Not Stuff
1 2
R110 Do Not StuffR110 Do Not Stuff
1 2
R308 Do Not StuffR308 Do Not Stuff
1 2
3 3
R306 Do Not StuffR306 Do Not Stuff
1 2
R107 Do Not StuffR107 Do Not Stuff
1 2
R109 Do Not StuffR109 Do Not Stuff
1 2
R113 Do Not StuffR113 Do Not Stuff
1 2
R302 Do Not StuffR302 Do Not Stuff
1 2
R305 Do Not StuffR305 Do Not Stuff
1 2
R112 Do Not StuffR112 Do Not Stuff
1 2
R114 Do Not StuffR114 Do Not Stuff
1 2
R108 Do Not StuffR108 Do Not Stuff
1 2
2 2
H_DPRSTP#4,16,36
VGATE_PWRGD17,36
PM_THRMTRIP#4,16,34
1 1
PWROK17,20
PLT_RST1#17,21,23,28,31,33
Do Not Stuff
Do Not Stuff
PM_DPRSLPVR17,36
M_RCOMPP
M_RCOMPN
100R2J-2-GP
100R2J-2-GP
C457
C457
CFG18
CFG19
CFG20
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
PM_BMBUSY#17
R77 Do Not StuffR77 Do Not Stuff
R252Do Not StuffDYR252Do Not Stuff
DY
R255Do Not Stuff R255Do Not Stuff
12
DY
DY
12
12
R303
R303
12
CPU_SEL03,4
CPU_SEL13,4
CPU_SEL23,4
12
H_DPRSTP#_MCH
PWROK_GD
RSTIN#
PM_DPRSLPVR_MCH
12
R82Do Not Stuff R82Do Not Stuff
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_EXTTS#0
PM_EXTTS#1
AR12
AR13
AM12
AN13
AR37
AM36
AM37
BK22
BH20
BK18
BG23
BC23
BD24
BH39
AW20
BK20
AW49
AV20
BK51
BK50
P36
P37
R35
N35
AL36
D20
H10
B51
BJ20
BF19
BJ18
BF23
B44
C44
A35
B37
B36
B34
C34
P27
N27
N24
C21
C23
F23
N23
G23
C20
R24
L23
E23
E20
K23
M20
M24
L32
N33
L35
G41
L39
L36
N20
G36
BJ51
BL50
BL49
BL3
BL2
BK1
BJ1
C51
B50
A50
A49
BK2
J12
J20
J23
J36
E1
A5
2 OF 10
2 OF 10
U40B
U40B
RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20
RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24
RSVD#BH39
RSVD#AW20
RSVD#BK20
RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR
NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2
A
B
RSVD
RSVD
DDR MUXING
DDR MUXING
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF#AR49
SM_VREF#AW4
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
DMI
DMI
CFG PM NC
CFG PM NC
SDVO_CTRL_CLK
SDVO_CTRL_DATA
MISC ME GRAPHICS VID
MISC ME GRAPHICS VID
B
SM_CK0
SM_CK1
SM_CK3
SM_CK4
SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4
SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4
SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
SM_RCOMP
SM_RCOMP#
PEG_CLK
PEG_CLK#
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
CLKREQ#
ICH_SYNC#
TEST1
TEST2
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BK31
BL31
BL15
BK14
AR49
AW4
DREFCLK
B42
DREFCLK#
C42
DREFSSCLK
H48
DREFSSCLK#
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
CLPWROK_MCH
AT43
AN49
AM50
H35
K36
G39
G40
TEST1_GMCH
A37
TEST2_GMCH
R32
M_CLK_DDR0 12
M_CLK_DDR1 12
M_CLK_DDR2 12
M_CLK_DDR3 12
M_CLK_DDR#0 12
M_CLK_DDR#1 12
M_CLK_DDR#2 12
M_CLK_DDR#3 12
M_CKE0 12,13
M_CKE1 12,13
M_CKE2 12,13
M_CKE3 12,13
M_CS0# 12,13
M_CS1# 12,13
M_CS2# 12,13
M_CS3# 12,13
M_ODT0 12,13
M_ODT1 12,13
M_ODT2 12,13
M_ODT3 12,13
SM_RCOMP_VOH
SM_RCOMP_VOL
M_RCOMPP
M_RCOMPN
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN
1 2
R246 0R2J-2-GPR246 0R2J-2-GP
MCH_CLVREF
CLK_3GPLLREQ#
MCH_ICH_SYNC# 17
12
R88
R88
20KR2J-L2-GP
20KR2J-L2-GP
1D8V_S3
1 2
DY
DY
R251 Do Not Stuff
R251 Do Not Stuff
1 2
DY
DY
R254 Do Not Stuff
R254 Do Not Stuff
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
DMI_TXN0 17
DMI_TXN1 17
DMI_TXN2 17
DMI_TXN3 17
DMI_TXP0 17
DMI_TXP1 17
DMI_TXP2 17
DMI_TXP3 17
DMI_RXN0 17
DMI_RXN1 17
DMI_RXN2 17
DMI_RXN3 17
DMI_RXP0 17
DMI_RXP1 17
DMI_RXP2 17
DMI_RXP3 17
TP29 Do Not StuffTP29 Do Not Stuff
TP95 Do Not StuffTP95 Do Not Stuff
TP96 Do Not StuffTP96 Do Not Stuff
TP94 Do Not StuffTP94 Do Not Stuff
TP24 Do Not StuffTP24 Do Not Stuff
20060908
CL_CLK0 17
CL_DATA0 17
PWROK 17,20
CL_RST#0 17
10KR2J-3-GP
10KR2J-3-GP
R78
R78
12
R80
R80
Do Not Stuff
Do Not Stuff
C
DDR_VREF_S3
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1D25V_S0
3D3V_S0
12
C404
C404
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C
R243
R243
1KR2F-3-GP
1KR2F-3-GP
1 2
12
R253
R253
392R2F-GP
392R2F-GP
C442
C442
C427
C427
GMCH_LCDVDD_ON14
SM_RCOMP_VOH
12
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SM_RCOMP_VOL
12
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
20060908
R106
R106
150R2F-1-GP
150R2F-1-GP
12
R104
R104
150R2F-1-GP
150R2F-1-GP
12
R105
R105
150R2F-1-GP
150R2F-1-GP
12
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
GMCH_BL_ON31
1D8V_S3
TV_DACA
TV_DACB
TV_DACC
R92
R92
12
R93
R93
12
R99
R99
12
12
C439
C439
3K01R2F-3-GP
3K01R2F-3-GP
12
C440
C440
GMCH_BLUE
GMCH_GREEN
GMCH_RED
R2961KR2F-3-GP R2961KR2F-3-GP
1 2
R295
R295
R289
R289
1KR2F-3-GP
1KR2F-3-GP
12
1 2
GMCH_DDCCLK15
GMCH_DDCDATA15
GMCH_VSYNC15
GMCH_HSYNC15
20060919
D
3D3V_S0
123
3D3V_S0
D
678
RN36
RN36
SRN10KJ-6-GP
SRN10KJ-6-GP
GMCH_BKLTCTL14
4 5
CLK_DDC_EDID14
DAT_DDC_EDID14
2K4R2F-GP
2K4R2F-GP
TP9Do Not StuffTP9Do Not Stuff
GMCH_TXACLK-14
GMCH_TXACLK+14
GMCH_TXBCLK-14
GMCH_TXBCLK+14
GMCH_TXAOUT0-14
GMCH_TXAOUT1-14
GMCH_TXAOUT2-14
TP6Do Not StuffTP6Do Not Stuff
GMCH_TXAOUT0+14
GMCH_TXAOUT1+14
GMCH_TXAOUT2+14
TP7Do Not StuffTP7Do Not Stuff
GMCH_TXBOUT0-14
GMCH_TXBOUT1-14
GMCH_TXBOUT2-14
GMCH_TXBOUT0+14
GMCH_TXBOUT1+14
GMCH_TXBOUT2+14
RN35
RN35
6
7
8
SRN10KJ-6-GP
SRN10KJ-6-GP
GMCH_BLUE15
GMCH_GREEN15
GMCH_RED15
R95 39R2F-GPR95 39R2F-GP
R27939R2F-GPR27939R2F-GP
1 2
R96 1K3R2F-1-GPR96 1K3R2F-1-GP
FOR Calero: 255 ohm
Crestline: 1.3k ohm
CRT_IREF routing Trace
width use 20 mil
LCTLA_CLK
LCTLB_DATA
R76
R76
12
L_LVBG
GMCH_TXAOUT3-
GMCH_TXAOUT3+
TV_DACA15
TV_DACB15
TV_DACC15
TV_DCONSEL0
45
TV_DCONSEL1
3
PM_EXTTS#0
2
PM_EXTTS#1
1
1 2
1 2
CRT_IREF
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LIBG
GMCH_VS
GMCH_HS
H39
E39
E40
C37
D35
K40
N41
N40
D46
C45
D44
E42
G51
E51
F49
C48
G50
E50
F48
D47
G44
B47
B45
E44
A47
A45
E27
G27
K27
F27
M35
P33
H32
G32
K29
F29
E29
K33
G35
E33
C32
F33
U40C
U40C
J40
L41
L43
J27
L27
J29
3 OF 10
3 OF 10
L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
TVA_DAC
TVB_DAC
TVC_DAC
TVA_RTN
TVB_RTN
TVC_RTN
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC
GMCH (2 of 6)
GMCH (2 of 6)
GMCH (2 of 6)
Biwa
Biwa
Biwa
E
1D05V_S0
R72
R72
24D9R2F-L-GP
24D9R2F-L-GP
PEG_CMP
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
742Thursday, March 01, 2007
742Thursday, March 01, 2007
742Thursday, March 01, 2007
N43
M43
J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41
J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42
N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44
M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43
PEG_COMPI
PEG_COMPO
LVDS
LVDS
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
TV VGA
TV VGA
PEG_TX#10
PCI_EXPRESS GRAPHICS
PCI_EXPRESS GRAPHICS
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
E
12
SA
SA
SA
A
www.kythuatvitinh.com
B
C
D
E
4 4
M_A_DQ[63..0]12
3 3
2 2
M_A_DQ[63..0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BG47
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BH45
BG40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BG10
AN10
AN11
BF48
BJ45
BF44
BF40
BD8
AY9
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AT9
AN9
AM9
U40D
U40D
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
4 OF 10
4 OF 10
BB19
SA_BS0
BK19
SA_BS1
BF29
SA_BS2
BL17
SA_CAS#
AT45
SA_DM0
BD44
SA_DM1
BD42
SA_DM2
AW38
SA_DM3
AW13
SA_DM4
BG8
SA_DM5
AY5
SA_DM6
AN6
SA_DM7
AT46
SA_DQS0
BE48
SA_DQS1
BB43
SA_DQS2
BC37
SA_DQS3
BB16
SA_DQS4
BH6
SA_DQS5
BB2
SA_DQS6
AP3
SA_DQS7
AT47
SA_DQS#0
BD47
SA_DQS#1
BC41
SA_DQS#2
BA37
SA_DQS#3
BA16
SA_DQS#4
BH7
SA_DQS#5
BC1
SA_DQS#6
AP2
SA_DQS#7
BJ19
SA_MA0
BD20
SA_MA1
BK27
SA_MA2
BH28
SA_MA3
BL24
SA_MA4
BK28
SA_MA5
BJ27
SA_MA6
BJ25
SA_MA7
BL28
SA_MA8
BA28
SA_MA9
BC19
SA_MA10
DDR SYSTEM MEMORRY A
DDR SYSTEM MEMORRY A
SA_RCVEN#
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_RAS#
SA_WE#
BE28
BG30
BJ16
BJ29
BE18
AY20
BA19
M_A_DM[7..0]
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
SA_RCVEN#
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
TP37 Do Not StuffTP37 Do Not Stuff
Place Test PAD Near to Chip
as could as possible
M_A_BS#0 12,13
M_A_BS#1 12,13
M_A_BS#2 12,13
M_A_CAS# 12,13
M_A_DM[7..0] 12
M_A_DQS[7..0] 12
M_A_DQS#[7..0] 12
M_A_A[14..0] 12,13
M_A_RAS# 12,13
M_A_WE# 12,13
5 OF 10
5 OF 10
U40E
M_B_DQ[63..0]12
M_B_DQ[63..0]
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BK10
BH5
BG1
BC2
BK3
BE4
BD3
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2
BL9
BK5
BL5
BK9
BJ8
BJ6
BF4
BJ2
U40E
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
AY17
SB_BS0
BG18
SB_BS1
BG36
SB_BS2
BE17
SB_CAS#
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_RAS#
SB_RCVEN#
SB_WE#
M_B_DM0
AR50
M_B_DM1
BD49
M_B_DM2
BK45
M_B_DM3
BL39
M_B_DM4
BH12
M_B_DM5
BJ7
M_B_DM6
BF3
M_B_DM7
AW2
M_B_DQS0
AT50
M_B_DQS1
BD50
M_B_DQS2
BK46
M_B_DQS3
BK39
M_B_DQS4
BJ12
M_B_DQS5
BL7
M_B_DQS6
BE2
M_B_DQS7
AV2
M_B_DQS#0
AU50
M_B_DQS#1
BC50
M_B_DQS#2
BL45
M_B_DQS#3
BK38
M_B_DQS#4
BK12
M_B_DQS#5
BK7
M_B_DQS#6
BF2
M_B_DQS#7
AV3
M_B_A0
BC18
M_B_A1
BG28
M_B_A2
BG25
M_B_A3
AW17
M_B_A4
BF25
M_B_A5
BE25
M_B_A6
BA29
M_B_A7
BC28
M_B_A8
AY28
M_B_A9
BD37
M_B_A10
BG17
M_B_A11
BE37
M_B_A12
BA39
M_B_A13
BG13
M_B_A14
BE24
AV16
SB_RCVEN#
AY18
BC17
Place Test PAD Near to Chip
ascould as possible
M_B_DM[7..0]
M_B_DQS[7..0]
M_B_DQS#[7..0]
M_B_A[14..0]
M_B_BS#0 12,13
M_B_BS#1 12,13
M_B_BS#2 12,13
M_B_CAS# 12,13
M_B_DM[7..0] 12
M_B_DQS[7..0] 12
M_B_DQS#[7..0] 12
M_B_A[14..0] 12,13
M_B_RAS# 12,13
TP38Do Not StuffTP38 Do Not Stuff
M_B_WE# 12,13
1 1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
B
C
D
Date: Sheet of
Date: Sheet of
Date: Sheet of
GMCH (3 of 6)
GMCH (3 of 6)
GMCH (3 of 6)
Biwa
Biwa
Biwa
842Thursday, March 01, 2007
842Thursday, March 01, 2007
842Thursday, March 01, 2007
E
SA
SA
SA
A
www.kythuatvitinh.com
FOR VCC CORE
1D05V_S0
12
C167
C167
4 4
Coupling CAP 370 mils from the Edge
3 3
2 2
1 1
12
12
C142
C142
C178
C178
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
Place CAP where
LVDS and DDR2 taps
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C176
C176
C192
C192
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
FOR VCC SM
12
C123
C123
C124
C124
-1_20070201
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place on the Edge
12
C127
C127
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
12
1D05V_S0
C141
C141
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C165
C165
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C134
C134
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C121
C121
12
C185
C185
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC_NCTF + VCC=1573mA
U40F
1573mA
1D8V_S3
3138mA
TC8
12
DY
12
C111
C111
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
Do Not StuffDYTC8
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C184
C184
UMA
UMA
AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32
AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30
W13
W14
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14
R30
R20
T14
Y12
U40F
6 OF 10
6 OF 10
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
POWER
POWER
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC CORE
VCC CORE
VCC SM
VCC SM
VCC GFX
VCC GFX
A
B
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC SM LF
VCC SM LF
B
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
SM_LF1_GMCH
AW45
SM_LF2_GMCH
BC39
SM_LF3_GMCH
BE39
SM_LF4_GMCH
BD17
SM_LF5_GMCH
BD4
SM_LF6_GMCH
AW8
SM_LF7_GMCH
AT6
C
1D05V_S0
VCC_AXG_NCTF + VCC_AXG=7700mA
UMA
UMA
12
C166
C166
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
UMA
UMA
UMA
UMA
12
12
C478
C478
C201
C201
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
12
TC6
TC6
12
12
C180
C180
C221
C221
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C188
C188
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C106
C106
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C169
C169
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
UMA
UMA
12
C103
C103
C107
C107
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C
1D05V_S0
12
12
C118
C118
C129
C129
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
308 mils from
the Edge
1D05V_S0
FOR VCC AXM NCTF AND VCC AXM
12
12
C108
C108
C110
C110
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C109
C109
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Coupling CAP
12
12
C146
C146
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Place on the Edge
VCC_AXM_NCTF + VCC_AXM=540mA
D
FOR VCC CORE AND VCC NCTF
AB33
AB36
12
C145
C145
D
12
C99
C99
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C153
C153
C112
C112
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C117
C117
C161
C161
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Coupling CAP
12
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
AL24
AL26
AL28
AM26
C191
C191
AM28
AM29
AM31
AM32
AM33
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37
U40G
U40G
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
E
7 OF 10
7 OF 10
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS NCTF
VSS NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VCC NCTF
VCC NCTF
POWER
POWER
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS SCBVSS AXM
VSS SCBVSS AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VSS AXM NCTF
VSS AXM NCTF
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (4 of 6)
GMCH (4 of 6)
GMCH (4 of 6)
Biwa
Biwa
Biwa
942Thursday, March 01, 2007
942Thursday, March 01, 2007
942Thursday, March 01, 2007
E
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
1D05V_S0
-1
-1
-1
A
www.kythuatvitinh.com
1D25V_S0
R249
R249
12
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4 4
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D25V_S0
12
R317
R317
Do Not Stuff
Do Not Stuff
R248
R248
12
C400
C400
12
12
C401
C401
1D25V_SUS_MCH_PLL2
M_VCCA_DPLLA
12
C97
C97
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_VCCA_DPLLB
12
C98
C98
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
180ohm 100MHz
M_VCCA_DAC_BG
R285
R285
12
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
UMA
UMA
C423
C423
120ohm 100MHz
C483
C483
M_VCCA_HPLL
12
C476
C476
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_VCCA_MPLL
12
C477
C477
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
FCM1608KF-121-GP
FCM1608KF-121-GP
L14
L14
68.00217.101
68.00217.101
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
FCM1608KF-121-GP
3 3
FCM1608KF-121-GP
L13
L13
68.00217.101
68.00217.101
120ohm 100MHz
1D25V_S0
12
220ohm 100MHz
R240
R240
12
Do Not Stuff
Do Not Stuff
2 2
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1D5V_S0
1 1
C452
C452
UMA
UMA
C444
C444
UMA
UMA
C438
C438
UMA
UMA
180ohm 100MHz
R258
R258
12
Do Not Stuff
Do Not Stuff
DY
DY
1D25V_PEGPLL
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C403
C403
3D3VTVDAC3D3V_S0
L9
L9
UMA
UMA
FCM1608CF-1-GP
FCM1608CF-1-GP
68.00217.141
68.00217.141
180ohm 100MHz
12
C449
C449
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C441
C441
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C435
C435
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C139
C139
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C148
C148
Do Not Stuff
Do Not Stuff
12
12
12
12
1D5V_TVDAC
12
C409
C409
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C135
C135
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Do Not Stuff
Do Not Stuff
A
B
10mA
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5mA
12
1D8V_TXLVDS_S3
UMA
UMA
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
3D3V_S0
400uA
1D25V_S0
12
DY
DY
TC7
TC7
1D25V_S0
12
12
C155
C155
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D25V_SUS_MCH_PLL2
12
C484
C484
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S3
B
3D3V_S0
12
R83
R83
Do Not Stuff
Do Not Stuff
12
C114
C114
12
C411
C411
12
12
C181
C181
12
C177
C177
SC1U10V2KX-GP
SC1U10V2KX-GP
40mA
40mA
40mA
60mA
60mA
5mA
1D25V_PEGPLL
12
C95
C95
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R244
R244
Do Not Stuff
Do Not Stuff
80mA
180ohm 100MHz
R286
R286
12
Do Not Stuff
Do Not Stuff
3D3V_SYNC_S0
3D3V_CRTDAC_S0
12
C424
C424
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
80mA
80mA
50mA
150mA
1 2
R266 Do Not StuffR266 Do Not Stuff
C402
C402
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D25V_PEGPLL
12
C159
C159
SC1U10V2KX-GP
C138
C138
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-GP
3D3VTVDAC
3D3VTVDAC
3D3VTVDAC
1D5V_TVDAC
1D5V_TVDAC
1D5V_TVDAC
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
250mA
100mA
1D8V_SUS_DLVDS
12
12
C105
C105
UMA
UMA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_VCCA_DAC_BG
M_VCCA_DPLLA
M_VCCA_DPLLB
M_VCCA_HPLL
M_VCCA_MPLL
10mA
1D8V_TXLVDS
100mA
12
C172
C172
SC1U10V2KX-GP
SC1U10V2KX-GP
150mA
12
U40H
U40H
J32
VCC_SYNC
A33
VCCA_CRT_DAC
B33
VCCA_CRT_DAC
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM
AV19
VCCA_SM
AU19
VCCA_SM
AU18
VCCA_SM
AU17
VCCA_SM
AT22
VCCA_SM
AT21
VCCA_SM
AT19
VCCA_SM
AT18
VCCA_SM
AT17
VCCA_SM
AR17
VCCA_SM_NCTF
AR16
VCCA_SM_NCTF
BC29
VCCA_SM_CK
BB29
VCCA_SM_CK
C25
VCCA_TVA_DAC
B25
VCCA_TVA_DAC
C27
VCCA_TVB_DAC
B27
VCCA_TVB_DAC
B28
VCCA_TVC_DAC
A28
VCCA_TVC_DAC
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS
H42
VCCD_LVDS
C393
C393
UMA
UMA
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C
8 OF 10
8 OF 10
C
POWER
POWER
A LVDS PLL CRT
A LVDS PLL CRT
AXD
AXD
VCC_AXD_NCTF
A PEG
A PEG
SM CK
SM CK
TV A CK A SM
TV A CK A SM
DMI
DMI
LVDS TV/CRT
LVDS TV/CRT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXF
VCC_AXF
AXF
AXF
VCC_AXF
VCC_DMI
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_TX_LVDS
VCC_HV
HV
HV
VCC_HV
VCC_PEG
VCC_PEG
VCC_PEG
PEG
PEG
VCC_PEG
VCC_PEG
VCC_RXR_DMI
VCC_RXR_DMI
VTTLF
VTTLF
VTTLF
VTTLF
VTTLF
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
350mA
100mA
200mA
100mA
100mA
1200mA
VTTLF1
VTTLF2
VTTLF3
C475
C475
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
Place on the edge
12
12
12
C481
C481
C482
C482
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
200mA
1D25V_S0
12
C157
C157
SC1U10V2KX-GP
SC1U10V2KX-GP
1D25V_S0
12
12
1D8V_TXLVDS_S3
3D3V_S0
1D05V_S0
12
C101
C101
12
12
C474
C474
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C102
C102
DY
DY
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C473
C473
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
12
C480
C480
C472
C472
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D25V_S0
12
C156
C156
SC1U10V2KX-GP
SC1U10V2KX-GP
12
C158
C158
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SB modify
C406
C406
1D8V_S3
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C453
C453
12
C164
C164
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R250
R250
Do Not Stuff
Do Not Stuff
12
C410
C410
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
250mA
12
C382
C382
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_S0
1D05V_S0
E
850mA
12
12
C206
C206
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C119
C119
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S3
12
1D05V_S0
1
2
12
C215
C215
C194
C194
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C100
C100
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
D17
D17
BAS16-1-GP
BAS16-1-GP
1D05V_HV_S0
3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
3D3V_S0
10R2J-2-GP
10R2J-2-GP
12
R237
R237
12
C422
C422
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
GMCH (5 of 6)
GMCH (5 of 6)
GMCH (5 of 6)
Biwa
Biwa
Biwa
10 42Thursday, March 01, 2007
10 42Thursday, March 01, 2007
10 42Thursday, March 01, 2007
E
SB
SB
SB
5
www.kythuatvitinh.com
AA21
AA24
AA29
AB20
AB23
AB26
D D
C C
B B
A A
AB28
AB31
AC10
AC13
AC39
AC43
AC47
AD21
AD26
AD29
AD41
AD45
AD49
AD50
AE10
AE14
AG38
AG43
AG47
AG50
AH40
AH41
AK20
AK21
AK26
AK28
AK31
AK51
AM11
AM13
AM41
AM45
AN38
AN39
AN43
AP48
AP50
AR11
AR39
AR44
AR47
AT10
AT14
AT41
AT49
AU23
AU29
AU36
AU49
AU51
AV39
AV48
AW12
AW16
A13
A15
A17
A24
AC3
AD1
AD3
AD5
AD8
AE6
AF20
AF23
AF24
AF31
AG2
AH3
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AL1
AM3
AM4
AN1
AN5
AN7
AP4
AR2
AR7
AU1
AU3
AW1
U40I
U40I
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9 OF 10
9 OF 10
VSS
VSS
5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
4
4
3
10 OF 10
10 OF 10
U40J
U40J
C46
VSS
C50
VSS
C7
VSS
D13
VSS
D24
VSS
D3
VSS
D32
VSS
D39
VSS
D45
VSS
D49
VSS
E10
VSS
E16
VSS
E24
VSS
E28
VSS
E32
VSS
E47
VSS
F19
VSS
F36
VSS
F4
VSS
F40
VSS
F50
VSS
G1
VSS
G13
VSS
G16
VSS
G19
VSS
G24
VSS
G28
VSS
G29
VSS
G33
VSS
G42
VSS
G45
VSS
G48
VSS
G8
VSS
H24
VSS
H28
VSS
H4
VSS
H45
VSS
J11
VSS
VSS
VSS
J16
VSS
J2
VSS
J24
VSS
J28
VSS
J33
VSS
J35
VSS
J39
VSS
K12
VSS
K47
VSS
K8
VSS
L1
VSS
L17
VSS
L20
VSS
L24
VSS
L28
VSS
L3
VSS
L33
VSS
L49
VSS
M28
VSS
M42
VSS
M46
VSS
M49
VSS
M5
VSS
M50
VSS
M9
VSS
N11
VSS
N14
VSS
N17
VSS
N29
VSS
N32
VSS
N36
VSS
N39
VSS
N44
VSS
N49
VSS
N7
VSS
P19
VSS
P2
VSS
P23
VSS
P3
VSS
P50
VSS
R49
VSS
T39
VSS
T43
VSS
T47
VSS
U41
VSS
U45
VSS
U50
VSS
V2
VSS
V3
VSS
3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
GMCH (6 of 6)
GMCH (6 of 6)
GMCH (6 of 6)
Biwa
Biwa
Biwa
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
11 42Thursday, March 01, 2007
11 42Thursday, March 01, 2007
11 42Thursday, March 01, 2007
1
SA
SA
SA
A
www.kythuatvitinh.com
M_B_A[14..0]8,13
4 4
Do Not Stuff
Do Not Stuff
M_B_BS#28,13
M_B_BS#08,13
M_B_BS#18,13
M_B_DQ[63..0]8
3 3
2 2
M_B_DQS#[7..0]8
M_B_DQS[7..0]8
DDR_VREF_S3
1 1
C86
C86
A
Do Not Stuff
Do Not Stuff
TP36
TP36
DY
DY
M_ODT27,13
M_ODT37,13
12
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
12
C85
C85
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DM1
DM1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
DDR2-200P-22-GP-U1
DDR2-200P-22-GP-U1
62.10017.A61
62.10017.A61
High 9.2mm
VDDSPD
NC#120
NC#163/TEST
NORMAL TYPE
B
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
NC#50
NC#69
NC#83
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
MH2
M_B_DM0
10
M_B_DM1
26
M_B_DM2
52
M_B_DM3
67
M_B_DM4
130
M_B_DM5
147
M_B_DM6
170
M_B_DM7
185
195
197
199
198
SA0
DDRB_SA0
200
SA1
50
69
83
120
163
81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
201
MH2
10KR2J-3-GP
10KR2J-3-GP
2nd source: 62.10017.A51
B
R135
R135
M_B_RAS# 8,13
M_B_WE# 8,13
M_B_CAS# 8,13
M_CS2# 7,13
M_CS3# 7,13
M_CKE2 7,13
M_CKE3 7,13
M_CLK_DDR2 7
M_CLK_DDR#2 7
M_CLK_DDR3 7
M_CLK_DDR#3 7
M_B_DM[7..0] 8
SMBD_ICH 3,19
SMBC_ICH 3,19
12
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C491
C491
1D8V_S3
3D3V_S0
Place near DM2
M_CLK_DDR3
12
DY
DY
C224
C224
Do Not Stuff
Do Not Stuff
M_CLK_DDR#3
M_CLK_DDR2
12
DY
DY
C94
C94
Do Not Stuff
Do Not Stuff
M_CLK_DDR#2
C
C
M_A_A[14..0]8,13
M_A_BS#28,13
M_A_BS#08,13
M_A_BS#18,13
M_A_DQ[63..0]8
M_CS0#7,13
M_CS1#7,13
M_CKE07,13
M_CKE17,13
M_A_RAS#8,13
M_A_CAS#8,13
M_A_WE#8,13
DDR_VREF_S3
DY
DY
C88
C88
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
DM2
DM2
MH1
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
TP34
TP34
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
SMBC_ICH
SMBD_ICH
M_ODT07,13
M_ODT17,13
12
C87
C87
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MH1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC#50
69
NC#69
83
NC#83
120
NC#120
163
NC#163/TEST
110
CS0#
115
CS1#
79
CKE0
80
CKE1
108
RAS#
113
CAS#
109
WE#
197
SCL
195
SDA
114
ODT0
119
ODT1
1
VREF
201
GND
SKT-SODIMM20020U3GP
SKT-SODIMM20020U3GP
62.10017.661
62.10017.661
High 5.2mm
2nd source: 62.10017.A41
D
MH2
MH2
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
CK0
CK0#
CK1
CK1#
SA0
SA1
VDD_SPD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NORMAL TYPE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GND
D
M_A_DQS0
13
M_A_DQS1
31
M_A_DQS2
51
M_A_DQS3
70
M_A_DQS4
131
M_A_DQS5
148
M_A_DQS6
169
M_A_DQS7
188
M_A_DQS#0
11
M_A_DQS#1
29
M_A_DQS#2
49
M_A_DQS#3
68
M_A_DQS#4
129
M_A_DQS#5
146
M_A_DQS#6
167
M_A_DQS#7
186
M_A_DM0
10
M_A_DM1
26
M_A_DM2
52
M_A_DM3
67
M_A_DM4
130
M_A_DM5
147
M_A_DM6
170
M_A_DM7
185
30
32
164
166
198
200
199
81
82
87
88
95
96
103
104
111
112
117
118
2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196
202
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_A_DQS[7..0] 8
M_A_DQS#[7..0] 8
M_A_DM[7..0] 8
M_CLK_DDR0 7
M_CLK_DDR#0 7
M_CLK_DDR1 7
M_CLK_DDR#1 7
3D3V_S0
C230
C230
12
1D8V_S3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
E
Place near DM1
M_CLK_DDR0
12
DY
DY
C408
C408
Do Not Stuff
Do Not Stuff
M_CLK_DDR#0
M_CLK_DDR1
12
DY
DY
C485
C485
Do Not Stuff
Do Not Stuff
M_CLK_DDR#1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR2 Socket
DDR2 Socket
DDR2 Socket
Biwa
Biwa
Biwa
12 42Thursday, March 01, 2007
12 42Thursday, March 01, 2007
12 42Thursday, March 01, 2007
E
SA
SA
of
of
of
SA
A
www.kythuatvitinh.com
B
C
D
E
PARALLEL TERMINATION
DDR_VREF_S0
4 4
3 3
2 2
1 1
Put decap near power(0.9V) and pull-up resistor
RN40
RN40
M_B_A5
1 2
R288 56R2J-4-GPR288 56R2J-4-GP
1 2
R100 56R2J-4-GPR100 56R2J-4-GP
1 2
R115 56R2J-4-GPR115 56R2J-4-GP
1 2
R290 56R2J-4-GPR290 56R2J-4-GP
1 2
R101 56R2J-4-GPR101 56R2J-4-GP
1 2
R293 56R2J-4-GPR293 56R2J-4-GP
RN42
RN42
RN12
RN12
RN9
RN9
RN7
RN7
RN44
RN44
RN43
RN43
RN41
RN41
RN11
RN11
RN8
RN8
RN38
RN38
RN10
RN10
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
1
2
3
45
M_B_A8
M_B_A9
M_B_A12
M_B_A10
M_B_A1
M_B_A3
M_B_A13
M_B_A0
M_B_A4
M_B_A2
M_B_A11
M_B_A7
M_B_A6
M_B_A14
M_A_A13
M_A_A4
M_A_A2
M_A_A0
M_A_A12
M_A_A9
M_A_A5
M_A_A14
M_A_A11
M_A_A7
M_A_A6
M_A_A8
M_A_A1
M_A_A3
M_A_A10
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
8
7
6
SRN56J-5-GP
SRN56J-5-GP
M_CKE1 7,12
M_CKE3 7,12
M_ODT1 7,12
M_CKE2 7,12
M_CKE0 7,12
M_B_BS#2 8,12
M_B_BS#0 8,12
M_ODT2 7,12
M_CS2# 7,12
M_B_RAS# 8,12
M_B_BS#1 8,12
M_ODT3 7,12
M_CS3# 7,12
M_B_CAS# 8,12
M_B_WE# 8,12
M_A_RAS# 8,12
M_CS0# 7,12
M_ODT0 7,12
M_A_BS#1 8,12
M_A_BS#0 8,12
M_A_WE# 8,12
M_A_CAS# 8,12
M_CS1# 7,12
M_A_BS#2 8,12
M_A_A[14..0]
M_B_A[14..0]
M_A_A[14..0] 8,12
M_B_A[14..0] 8,12
DDR_VREF_S0
12
C464
C464
12
C461
C461
1D8V_S3
Put decap near power(0.9V)
and pull-up resistor
12
C120
C120
12
C171
C171
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C189
C189
12
C174
C174
12
C132
C132
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C466
C466
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Place these Caps near DM1
12
C200
C200
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C186
C186
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C198
C198
12
C175
C175
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S3
12
C182
C182
12
C432
C432
12
C460
C460
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C426
C426
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C160
C160
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C113
C113
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Place these Caps near DM2
12
C147
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C147
12
C168
C168
A
B
C
Decoupling Capacitor
12
C162
C162
12
C469
C469
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C190
C190
12
C173
C173
12
C197
C197
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C122
C122
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C205
C205
12
C136
C136
12
C446
C446
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C204
C204
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C144
C144
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C116
C116
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C163
C163
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
12
C209
C209
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D
12
C183
C183
12
C196
C196
12
C455
C455
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C465
C465
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
12
C429
C429
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C128
C128
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR2 Termination Resistor
DDR2 Termination Resistor
DDR2 Termination Resistor
Biwa
Biwa
Biwa
13 42Thursday, March 01, 2007
13 42Thursday, March 01, 2007
13 42Thursday, March 01, 2007
E
SB
SB
SB
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